SP305 Spartan-3
Development Platform
User Guide
UG216 (v1.1) March 3, 2006
UG216 (v1.1) March 3, 2006 SP305 Spartan-3 Development Platform User Guide
www.xilinx.com
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other trademarks are the property of their respective owners.
SP305 Spartan-3 Development Platform User Guide UG216 (v1.1) March 3, 2006
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Revision History
SP305 Spartan-3 Development Platform User Guide
UG216 (v1.1) March 3, 2006
The following table shows the revision history for this document..
Version Revision
11/23/05 1.0 Initial Xilinx release.
3/3/06 1.1
In USB Controller with Host and Peripheral Ports (25) section, added note indicating
non-support for 2nd USB feature.
UG216 (v1.1) March 3, 2006 SP305 Spartan-3 Development Platform User Guide
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SP305 Spartan-3 Development Platform User Guide UG216 (v1.1) March 3, 2006
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Table of Contents
About This Guide
Guide Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Additional Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Typographical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Online Document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
SP305 Spartan-3 Development Platform User Guide
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Package Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Additional Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Detailed Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Spartan-3 FPGA (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
AC Adapter and Input Power Switch/Jack (2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Power Indicator LED (3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
On-board Power Supplies (4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Oscillator Sockets (5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
DIP Switches (6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
User LEDs (7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
User Push Buttons (8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
User Push Button LEDs (9) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
CPU Reset Button (10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Program Switch (11) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
JTAG Configuration Port (12) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Configuration Address and Mode DIP Switches (13) . . . . . . . . . . . . . . . . . . . . . . . . . . 12
FPGA HSWAP_EN (14) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Platform Flash Memory (15) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Platform Flash Configuration Select (16) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Platform Flash Enable and Reset Control (17) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Done and INIT LED (18) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Error LEDs (Active High) (19) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
RS-232 Serial Port 1 (20) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
RS-232 Serial Port 2 (21) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
SPI (22) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Character x 2-Line LCD (23) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
ROTARY ENCODER (24) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
USB Controller with Host and Peripheral Ports (25) . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
10/100 SMSC Ethernet MAC/PHY (26) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
10/100 Intel Ethernet PHY (27) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
A/D Converter (AD7928) (28) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Stereo AC97 Audio Codec (29) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
VGA Output (30) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Differential Clock Input And Output With SMA Connectors (31) . . . . . . . . . . . . . . . . 22
Expansion Headers (32) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
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PS/2 Mouse and Keyboard Ports (33) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
ChipScope (34) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
CAN Controller (MCP2515 and MPC2551) (35) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
DDR SDRAM (36) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
ZBT Synchronous SRAM (37) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Linear Flash Memory Chips (38) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Expansion JTAG Jumper (39) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Bank 3 Voltage selection (40) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
IIC Bus with 4Kb EEPROM (41) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
IFF (42) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Default Jumper Settings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
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About This Guide
The Xilinx Development Platform allows designers to investigate and experiment with
features of the Spartan™-3 family of Xilinx FPGAs. This document describes features and
operation of the
Guide Contents
This manual contains the following chapter:
• “SP305 Spartan-3 Development Platform User Guide.”
SP305 Development Platform.
Guide Contents
Additional Resources
To find additional documentation, see the Xilinx website at:
http://www.xilinx.com/literature/index/htm
To search the Answer Database of silicon, software, and IP questions and answers, or to
create a technical support WebCase, see the Xilinx website at:
http://www.xilinx.com/support.
Conventions
This document uses the following conventions. An example illustrates each convention.
Typographical
The following typographical conventions are used in this document:
Convention Meaning or Use Example
Courier font
Courier bold
.
Messages, prompts, and
program files that the system
displays
Literal commands that you
enter in a syntactical statement
speed grade: - 100
ngdbuild design_name
Helvetica bold
SP305 Spartan-3 Development Platform User Guide www.xilinx.com 1
UG216 (v1.1) March 3, 2006
Commands that you select
from a menu
Keyboard shortcuts Ctrl+C
File → Open
Chapter : About This Guide
Italic font
Square brackets [ ]
Convention Meaning or Use Example
Variables in a syntax
statement for which you must
ngdbuild design_name
supply values
See the Development System
References to other manuals
Reference Guide for more
information.
If a wire is drawn so that it
Emphasis in text
overlaps the pin of a symbol,
the two nets are not connected.
An optional entry or
parameter. However, in bus
specifications, such as
ngdbuild [ option_name]
design_name
bus[7:0], they are required.
R
Braces { }
Vertical bar |
Vertical ellipsis
.
.
.
Horizontal ellipsis . . .
Online Document
The following conventions are used in this document:
Convention Meaning or Use Example
Blue text
A list of items from which you
must choose one or more
Separates items in a list of
choices
Repetitive material that has
been omitted
Repetitive material that has
been omitted
Cross-reference link to a
location in the current
document
lowpwr ={on|off}
lowpwr ={on|off}
IOB #1: Name = QOUT’
IOB #2: Name = CLKIN’
.
.
.
allow block block_name
loc1 loc2 ... locn;
See the section “Additional
Resources” for details.
Refer to “Title Formats” in
Chapter 1 for details.
Red text
Blue, underlined text
2 www.xilinx.com SP305 Spartan-3 Development Platform User Guide
Cross-reference link to a
location in another document
Hyperlink to a website (URL)
See Figure 2-5 in the Virtex-II
Handbook.
Go to http://www.xilinx.com
for the latest speed files.
UG216 (v1.1) March 3, 2006
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Introduction
SP305 Spartan-3 Development Platform
User Guide
Introduction
The MicroBlaze™ development kit allows designers to investigate and experiment with
features of the Spartan™-3 family of FPGAs. This document describes features and
operation of the SP305 Development Platform.
Features
• Spartan-3 FPGA (XC3S1500-FG676-10)
• 64MB DDR SDRAM, 32-bit interface running up to 266 MHz data rate
• One differential clock input pair and differential clock output pair with SMA
connectors
• One 100 MHz clock oscillator (socketed) plus one extra open 3.3V clock oscillator
socket
• General purpose DIP switches, LEDs, and push buttons
• Rotary Encoder with a push button shaft
• Expansion header with 32 single-ended I/O, 16 LVDS capable differential pairs,
14 spare I/O’s, power, JTAG chain expansion capability, and IIC bus expansion
• Stereo AC97 audio codec with line-in, line-out, 50-mW headphone, and
microphone-in (mono) jacks
• Two RS-232 serial port (one stand alone and one attached to the USB Chipset)
• 16-character x 2-line LCD display
• 4Kb IIC EEPROM
• VGA output with 50 MHz / 24-bit video DAC
• PS/2 mouse and keyboard connectors
• ZBT synchronous SRAM (9Mb) on 32-bit data bus with four parity bits
• Intel StrataFlash (or compatible) linear flash memory chips (8MB)
• 10/100 Ethernet Mac-PHY transceiver
• 10/100 Ethernet PHY transceiver
• USB interface chip (Cypress CY7C67300) with host and peripheral ports
• CAN and SPI interface ports
• IFF one wire encryption device
• Xilinx XCF32P Platform Flash configuration storage device
• JTAG configuration port for use with Parallel Cable III or Parallel Cable IV cable
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SP305 Spartan-3 Development Platform User Guide
• Onboard power supplies for all necessary voltages
• 5V @ 3A AC adapter
• Power indicator LED
Package Contents
If the user purchased part number HW-SP305-US (EU, UK)
• SP305 Board
• 5 Volt Power Supply
• Evaluation version of the Xilinx ISE and EDK development tools (60 day evaluation)
If the user purchased part number DO-SP305-DVLP-US (UE,UK)
• SP305 Board
• 5 Volt Power Supply
• Full version of the Xilinx ISE and EDK development tools (1 year time-based license)
• USB Download and Debug Cable
• RS232 Null Modem Cable
• RJ45 Ethernet Cable
• Xilinx Embedded Development Kit Reference CD
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Additional Information
Please visit the SP305 web site at http://www.xilinx.com/sp305 for more information
about the SP305 Development Platform including:
• Current version of this user guide in PDF format
• Example design files for demonstration of Spartan-3 features and technology
• Demonstration hardware and software configuration files for the Platform Flash
configuration storage device, and linear flash memory chips
• MicroBlaze EDK reference design files
• Full schematics in PDF format and ViewDraw schematic format
• PC board layout in Pads PCB format
• Gerber files in *.pho and *.pdf for the PC board (There are many free or shareware
Gerber file viewers available on the internet for viewing and printing these files)
• Additional documentation, errata, frequently asked questions, and the latest news
For information about the Spartan-3 family of FPGA devices, including product highlights,
data sheets, user guides, and application notes, visit the Spartan-3 web site at
http://www.xilinx.com/spartan3.
Additional information is available from the data sheets and application notes supplied by
the component manufacturers.
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Block Diagram
Figure 2-1 shows a block diagram of the board.
Introduction
Flash
Flash
Rotary
Encoder
GPIO
(Button/LED/
DIP Switch
100 MHz XTAL
+ User
SMA
(Differential In/
Out Clocks)
Dual PS/2
IFF
Chipscope
High Speed
Debug
32
Sync
RAM
Platform
Flash
SEL MAP
SLV SERIAL
I/O Expansion
Header
PC
JTAG
JTAG
MSTR SERIAL
Spartan-3
FPGA
JTAG
USB
Controller
16
User IIC
Bus
IIC EEPROM
Host
Peripheral
Peripheral
10/100/1000
Enet Phy
10/100
Enet Phy
DDR
SDRAM
32
DDR
SDRAM
RJ-45
RJ-45
AC97
Audio CODEC
Video
RS-232 XCVR
16 x 32
Character LCD
Can
Controller
SPI
Line Out/Headphone
Mic In/Line in
VGA
Serial
5V to USB and PS/2
TPS54310
3A SWIFT
5V Brick 3A
TPS54310
6A SWIFT
TPS54310
3A SWIFT
TPS54310
150mA LDO
Figure 2-1: Spartan-3 SP-305 Development Platform Block Diagram
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5V
12 V
To FPGA Core
3.3 V
To FPGA I/O Digital Supply
1.8 V
To PROM
TPS51100
3A DDR LDO
2.5 V to DDR SDRAM
1.25 V
To VTT
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SP305 Spartan-3 Development Platform User Guide
14
30
32
23
26
19
18
22
34
37
10
11
12
13
17
15
16
36
24
29
28
27
20
21
25
33
35b
35a
35e
35f
31
Detailed Description
The SP305 Development Platform is shown in Figure 2-2 (front) and Figure 2-3 (back). The
features/components on the board are identified by numbered yellow balloons. These
features/components are then detailed or described in respectively numbered sections in
the subsequent sections of this document.
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20
21
22
25
24
35e
35f
19
28
15
27
14
29
34
30
36
35b
35a
1
37
5
23
16
10
13
17
6
11
26
18
12
Figure 2-2: SP305 Development Platform (front view)
4
31
3
32
2
33
7
9
8
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30
21
39
40
33
36
33
41
29
20
26
25
24
12
25
42
35d
35c
38
37
Detailed Description
33
33
30
42
29
12
38
37
39
24
25
2
4
36
5
40
41
26
20
21
25
35d
35c
Figure 2-3: SP305 Development Platform (back view)
Spartan-3 FPGA (1)
A Xilinx XC3S1500-FG676-10 FPGA is installed on the development platform (the board).
The FPGA is identified as component (1) in the heading above. The other
features/components are numbered accordingly in the subsequent sections.
Configuration
The board supports configuration in all modes: JTAG, Master Serial, Slave Serial, Master
SelectMAP, and Slave SelectMAP modes. See the
for more information.
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“Configuration Options,” page 11 section
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