UNITRODE bq2004E, bq2004H Technical data

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bq2004E/H

Features

Fast charge and conditioning of nickel cadmium or nickel-metal hydride batteries

Hysteretic PWM switch-mode current regulation or gated control of an external regulator

Easily integrated into systems or used as a stand-alone charger

Pre-charge qualification of temperature and voltage

Configurable, direct LED outputs display battery and charge status

Fast-charge termination by temperature/ time, peak volume detection, - V, maximum voltage, maximum temperature, and maximum time

Optional top-off charge and pulsed current maintenance charging

Logic-level controlled low-power mode (< 5µA standby current)

bq2004E/H

Fast-Charge ICs

General Description

The bq2004E and bq2004H Fast Charge ICs provide comprehensive fast charge control functions together with high-speed switching power control circuitry on a monolithic CMOS device.

Integration of closed-loop current control circuitry allows the bq2004 to be the basis of a cost-effective solution for stand-alone and systemintegrated chargers for batteries of one or more cells.

Switch-activated discharge-before- charge allows bq2004E/H-based chargers to support battery conditioning and capacity determination.

High-efficiency power conversion is accomplished using the bq2004E/H as a hysteretic PWM controller for switch-mode regulation of the charging current. The bq2004E/H may alternatively be used to gate an externally regulated charging current.

Fast charge may begin on application of the charging supply, replacement of the battery, or switch depression. For safety, fast charge is inhibited unless/until the battery tempera-

ture and voltage are within configured limits.

Temperature, voltage, and time are monitored throughout fast charge. Fast charge is terminated by any of the following:

Rate of temperature rise ( T/ t)

Peak voltage detection (PVD)

Negative delta voltage (- V)

Maximum voltage

Maximum temperature

Maximum time

After fast charge, optional top-off and pulsed current maintenance phases with appropriate display mode selections are available.

The bq2004H differs from the bq2004E only in that fast charge, hold-off, and top-off time units have been scaled up by a factor of two, and the bq2004H provides different display selections. Timing differences between the two ICs are illustrated in Table 1. Display differences are shown in Table 2.

Pin Connections

 

 

Pin Names

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Discharge command

SNS

Sense resistor input

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DCMD

 

 

 

 

 

 

 

 

 

 

DSEL

Display select

LED1

Charge status output 1

 

 

 

 

1

16

 

 

 

 

DCMD

 

 

INH

 

 

 

 

 

 

 

 

 

 

DSEL

 

2

15

 

DIS

 

VSEL

Voltage termination

LED2

Charge status output 2

 

VSEL

 

3

14

 

MOD

 

 

select

VSS

System ground

 

 

 

 

 

 

 

TM1

 

4

13

 

VCC

 

TM1

Timer mode select 1

VCC

5.0V ± 10% power

 

TM2

 

5

12

 

 

 

 

TM2

Timer mode select 2

 

 

 

VSS

 

MOD

Charge current control

 

TCO

 

6

11

 

LED2

 

TCO

Temperature cutoff

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DIS

Discharge control

 

TS

 

7

10

 

LED1

 

 

 

 

BAT

 

8

9

 

SNS

 

TS

Temperature sense

 

 

output

 

 

 

 

 

 

 

 

 

 

BAT

Battery voltage

 

 

Charge inhibit input

 

 

 

 

 

 

 

 

 

 

INH

 

 

 

16-Pin Narrow DIP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

or Narrow SOIC

 

 

 

 

 

 

 

 

 

 

 

 

 

PN2004E01.eps

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SLU S081 - JU

NE 1999

 

 

 

 

 

 

 

 

1

bq2004E/H

Pin Descriptions

DCMD

Discharge-before-charge control input

 

The

 

 

input controls the conditions

 

DCMD

 

that enable discharge-before-charge. DCMD

 

is pulled up internally. A negative-going

 

pulse on

DCMD

initiates a discharge to end-

 

of-discharge voltage (EDV) on the BAT pin,

 

followed by a new charge cycle start. Tying

 

DCMD to ground enables automatic

 

discharge-before-charge on every new charge

 

cycle start.

DSEL

Display select input

 

This three-state input configures the charge

 

status display mode of the LED1 and LED2 out-

 

puts and can be used to disable top-off and

 

pulsed-trickle. See Table 2.

VSEL

Voltage termination select input

 

This three-state input controls the voltage-

 

termination technique used by the

 

bq2004E/H. When high, PVD is active.

 

When floating, -

V is used. When pulled low,

 

both PVD and -

V are disabled.

TM1– Timer mode inputs

TM2

TM1 and TM2 are three-state inputs that configure the fast charge safety timer, voltage termination hold-off time, “top-off ”, and trickle charge control. See Table 1.

TCO

Temperature cut-off threshold input

 

Input to set maximum allowable battery

 

temperature. If the potential between TS

 

and SNS is less than the voltage at the TCO

 

input, then fast charge or top-off charge is ter-

 

minated.

TS

Temperature sense input

 

Input, referenced to SNS, for an external

 

thermister monitoring battery temperature.

BAT

Battery voltage input

 

BAT is the battery voltage sense input, refer-

 

enced to SNS. This is created by a high-

 

impedance resistor-divider network con-

 

nected between the positive and the negative

 

terminals of the battery.

SNS

Charging current sense input

 

SNS controls the switching of MOD based on

 

an external sense resistor in the current

 

path of the battery. SNS is the reference po-

 

tential for both the TS and BAT pins. If

 

SNS is connected to VSS, then MOD switches

 

high at the beginning of charge and low at

 

the end of charge.

LED1

Charge status outputs

LED2

Push-pull outputs indicating charging

 

 

 

 

status. See Table 2.

Vss

Ground

VCC

VCC supply input

 

 

5.0V, ±10% power input.

MOD

Charge current control output

 

 

MOD is a push-pull output that is used to

 

 

control the charging current to the battery.

 

 

MOD switches high to enable charging cur-

 

 

rent to flow and low to inhibit charging

 

 

current flow.

DIS

Discharge control output

 

 

Push-pull output used to control an external

 

 

transistor to discharge the battery before

 

 

charging.

 

 

Charge inhibit input

INH

 

 

When low, the bq2004E/H suspends all

 

 

charge actions, drives all outputs to high im-

 

 

pedance, and assumes a low-power opera-

 

 

tional state. When transitioning from low to

 

 

high, a new charge cycle is started.

2

bq2004E/H

Functional Description

Figure 2 shows a block diagram and Figure 3 shows a state diagram of the bq2004E/H.

Battery Voltage and Temperature

Measurements

Battery voltage and temperature are monitored for maximum allowable values. The voltage presented on the battery sense input, BAT, should represent a two-cell potential for the battery under charge. A resistor-divider ratio of:

RB1 = N - 1

RB2 2

is recommended to maintain the battery voltage within the valid range, where N is the number of cells, RB1 is the resistor connected to the positive battery terminal, and RB2 is the resistor connected to the negative battery terminal. See Figure 1.

Discharge-Before-Charge

The DCMD input is used to command discharge-before- charge via the DIS output. Once activated, DIS becomes active (high) until VCELL falls below VEDV, at which time DIS goes low and a new fast charge cycle begins.

The DCMD input is internally pulled up to VCC (its inactive state). Leaving the input unconnected, therefore, results in disabling discharge-before-charge. A negative going pulse on DCMD initiates discharge-before-charge at any time regardless of the current state of the bq2004. If DCMD is tied to VSS, discharge-before-charge will be the first step in all newly started charge cycles.

Starting A Charge Cycle

A new charge cycle is started by:

1.Application of VCC power.

2.VCELL falling through the maximum cell voltage, VMCV where:

Note: This resistor-divider network input impedance to end-to-end should be at least 200kΩ and less than 1MΩ.

A ground-referenced negative temperature coefficient thermistor placed in proximity to the battery may be used as a low-cost temperature-to-voltage transducer. The temperature sense voltage input at TS is developed using a resistor-thermistor network between VCC and VSS. See Figure 1. Both the BAT and TS inputs are referenced to SNS, so the signals used inside the IC are:

VMCV = 0.8 VCC ± 30mV

3.A transition on the INH input from low to high.

If DCMD is tied low, a discharge-before-charge will be executed as the first step of the new charge cycle. Otherwise, pre-charge qualification testing will be the first step.

The battery must be within the configured temperature and voltage limits before fast charging begins.

VBAT - VSNS = VCELL

and

VTS - VSNS = VTEMP

The valid battery voltage range is VEDV < VBAT < VMCV where:

VEDV = 0.4 VCC ± 30mV

 

 

Negative Temperature

 

 

 

Coefficient Thermister

 

 

 

 

VCC

 

 

 

 

RT1

PACK +

 

 

PACK+

 

 

 

 

 

bq2004E/H

RB1

TS

 

N

bq2004E/H

RT2

BAT

 

T

 

 

 

 

 

C

 

 

 

 

 

RB2

SNS

 

 

SNS

 

 

PACK -

 

PACK-

 

 

 

 

Fg2004a.eps

Figure 1. Voltage and Temperature Monitoring

3

UNITRODE bq2004E, bq2004H Technical data

bq2004E/H

 

 

 

 

 

 

 

TM1 TM2

 

TCO

 

 

OSC

Timing

 

TCO

TS

 

Control

 

Check

 

 

 

 

LED1

Display

 

 

LTF

 

LED2

 

 

 

Control

 

 

Check

 

DSEL

 

 

 

 

 

VTS - VSNS

 

 

 

 

 

A/D

 

DCMD

Charge Control

VBAT - VSNS

SNS

 

 

 

DVEN

State Machine

 

EDV

 

 

 

 

 

 

 

 

 

Check

 

 

Discharge

MOD

PWR

MCV

BAT

 

Control

Control

Control

Check

 

 

 

DIS

MOD

INH

VCC

VSS

 

 

 

 

 

BD200401.eps

Figure 2. Block Diagram

The valid temperature range is VHTF < VTEMP < VLTF, where:

VLTF = 0.4 VCC ± 30mV

VHTF = [(1/3 VLTF) + (2/3 VTCO)] ± 30mV

VTCO is the voltage presented at the TCO input pin, and is configured by the user with a resistor divider between VCC

and ground. The allowed range is 0.2 to 0.4 VCC.

If the temperature of the battery is out of range, or the voltage is too low, the chip enters the charge pending state and waits for both conditions to fall within their allowed limits. During the charge-pending mode, the IC first applies a top-off charge to the battery.

The top-off charge, at the rate of 18 of the fast charge, continues until the fast-charge conditions are met or the top-off time-out period is exceeded. The IC then trickle charges until the fast-charge conditions are met. There is no time limit on the charge pending state; the charger remains in this state as long as the voltage or temperature conditons are outside of the allowed limits. If the voltage is too high, the chip goes to the battery absent state and waits until a new charge cycle is started.

Fast charge continues until termination by one or more of the six possible termination conditions:

Delta temperature/delta time ( T/ t)

Peak voltage detection (PVD)

Negative delta voltage (- V)

Maximum voltage

Maximum temperature

Maximum time

PVD and - V Termination

The bq2004E/H samples the voltage at the BAT pin once every 34s. When - V termination is selected, if VCELL is lower than any previously measured value by 12mV

±4mV (6mV/cell), fast charge is terminated. When PVD termination is selected, if VCELL is lower than any previously measured value by 6mV ±2mV (3mV/cell), fast charge is terminated. The PVD and - V tests are valid in the range 0.4 VCC < VCELL < 0.8 VCC.

4

bq2004E/H

VSEL Input

Voltage Termination

Low

Disabled

Float

- V

High

PVD

Voltage Sampling

Each sample is an average of voltage measurements. The IC takes 32 measurements in PVD mode and 16 measurements in - V mode. The resulting sample periods (9.17ms and 18.18ms, respectively) filter out harmonics centered around 55Hz and 109Hz. This technique minimizes the effect of any AC line ripple that may feed through the power supply from either 50Hz or 60Hz AC sources. Tolerance on all timing is ±16%.

Temperature and Voltage Termination

Hold-off

A hold-off period occurs at the start of fast charging. During the hold-off period, - V and T/ t termination are disabled. The MOD pin is enabled at a duty cycle of 260µs active for every 1820µs inactive. This modulation results in an average rate 1/8th that of the fast charge rate. This avoids premature termination on the voltage spikes sometimes produced by older batteries when fast-charge current is first applied. Maximum voltage and maximum temperature terminations are not affected by the hold-off period.

T/ t Termination

The bq2004E/H samples at the voltage at the TS pin every 34s, and compares it to the value measured two samples earlier. If VTEMP has fallen 16mV ±4mV or more, fast charge is terminated. The T/ t termination test is valid only when VTCO < VTEMP < VLTF.

Temperature Sampling

Each sample is an average of 16 voltage measurements. The resulting sample period (18.18ms) filters out harmonics around 55Hz. This technique minimizes the effect of any AC line ripple that may feed through the power supply from either 50Hz or 60Hz AC sources. Tolerance on all timing is ±16%.

Maximum Voltage, Temperature, and Time

Anytime VCELL rises above VMCV, the LEDs go off and current flow into the battery ceases immediately. If VCELL then falls back below VMCV before tMCV = 1.5s ±0.5s, the chip transitions to the Charge Complete state (maximum voltage termination). If VCELL remains above VMCV at the expiration of tMCV, the bq2004E/H transitions to the Battery Absent state (battery removal). See Figure 3.

Maximum temperature termination occurs anytime VTEMP falls below the temperature cutoff threshold VTCO. Charge will also be terminated if VTEMP rises above the low temperature fault threshold, VLTF, after fast charge begins.

Table 1. Fast Charge Safety Time/Hold-Off/Top-Off Table

 

 

 

 

 

Typical

Typical

 

 

 

Pulse-

Corresponding

 

 

Fast-Charge

PVD, - V

 

 

 

Fast-Charge

 

 

Safety

Hold-Off

Top-Off

Pulse-

Trickle

 

Rate

 

 

Time (min)

Time (s)

Rate

Period (Hz)

 

 

 

Trickle

2004E

2004H

 

 

2004E

2004H

2004E

2004H

2004E

2004H

2004E

2004H

TM1

TM2

Rate

C/4

 

C/8

Low

Low

325

650

137

273

Disabled

Disabled

Disabled

C/2

 

C/4

Float

Low

154

325

546

546

Disabled

C/512

15

30

1C

 

C/2

High

Low

77

154

273

546

Disabled

C/512

7.5

15

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2C

 

1C

Low

Float

39

77

137

273

Disabled

C/512

3.75

7.5

4C

 

2C

Float

Float

19

39

68

137

Disabled

C/512

1.88

3.75

C/2

 

C/4

High

Float

154

325

546

546

C/16

C/32

C/512

15

30

1C

 

C/2

Low

High

77

154

273

546

C/8

C/16

C/512

7.5

15

2C

 

1C

Float

High

39

77

137

273

C/4

C/18

C/512

3.75

7.5

4C

 

2C

High

High

19

39

68

137

C/2

C/4

C/512

1.88

3.75

Note:

Typical conditions = 25°C, VCC = 5.0V.

 

 

 

 

 

 

 

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