UNITRODE UC1524, UC2524, UC3524 Technical data

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UNITRODE UC1524, UC2524, UC3524 Technical data

UC1524

UC1524

UC2524

UC3524

Advanced Regulating Pulse Width Modulators

FEATURES

Complete PWM Power Control Circuitry

Uncommitted Outputs for Single-ended or Push-pull Applications

Low Standby Current…8mA Typical

Interchangeable with SG1524, SG2524 and SG3524, Respectively

DESCRIPTION

The UC1524, UC2524 and UC3524 incorporate on a single monolithic chip all the functions required for the construction of regulating power supplies, inverters or switching regulators. They can also be used as the control element for high-power-output applications. The UC1524 family was designed for switching regulators of either polarity, transformer-coupled dc-to-dc converters, transformerless voltage doublers and polarity converter applications employing fixed-frequency, pulse-width modulation techniques. The dual alternating outputs allow either single-ended or push-pull applications. Each device includes an on-chip reference, error amplifier, programmable oscillator, pulse-steering flip-flop, two uncommitted output transistors, a high-gain comparator, and current-limiting and shut-down circuitry. The UC1524 is characterized for operation over the full military temperature range of -55°C to +125°C. The UC2524 and UC3524 are designed for operation from -25°C to +85°C and 0° to +70°C, respectively.

BLOCK DIAGRAM

 

 

VREF

OSC OUT

 

 

 

 

 

 

16

3

 

 

 

 

 

 

REFERENCE

 

 

+5V TO ALL

 

 

VIN

15

 

 

INTERNAL

 

 

REGULATOR

 

 

 

 

 

 

 

+5V

CIRCUITRY

12

CA

 

 

 

 

 

 

 

 

Q

 

 

 

RT

6

OSC

R

Q

 

 

 

 

 

 

 

 

CT

7

 

 

 

 

11

EA

(RAMP)

 

 

 

 

 

13

CB

 

 

 

 

 

+5V

 

 

+5V

 

 

 

 

INV INPUT

1

 

 

 

 

 

COMPARATOR

 

 

 

 

NI INPUT

2

E A

 

 

 

 

 

 

 

 

 

14

EB

 

 

 

 

 

 

GROUND

8

 

10k

 

 

5

–SENSE

(SUBSTRATE)

1k

 

 

 

 

 

C L

 

 

 

 

 

 

 

4

+SENSE

 

 

10

9

 

 

 

 

 

 

SHUTDOWN

COMPENSATION

 

 

 

 

SLUS180D - NOVEMBER 1999 - REVISED AUGUST 2002

 

 

 

 

ABSOLUTE MAXIMUM RATINGS (Note 1)

Supply Voltage, VCC (Notes 2 and 3) . . . . . . . . . . . . . . . . . 40V Collector Output Current. . . . . . . . . . . . . . . . . . . . . . . . . 100mA

Reference Output Current . . . . . . . . . . . . . . . . . . . . . . . . 50mA

Current Through CT Terminal . . . . . . . . . . . . . . . . . . . . . . –5mA Power Dissipation at TA = +25°C (Note 4). . . . . . . . . . 1000mW

Power Dissipation at TC = +25°C (Note 4). . . . . . . . . . 2000mW Operating Junction Temperature Range . . . . –55°C to +150°C Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C

Note 1: Over operating free-air temperature range unless otherwise noted.

Note 2: All voltage values are with respect to the ground terminal, pin 8.

Note 3: The reference regulator may be bypassed for operation from a fixed 5V supply by connecting the VCC and reference output pins both to the supply voltage. In this configuration the maximum supply voltage is 6V.

Note 4: Consult packaging section of databook for thermal limitations and considerations of package.

RECOMMENDED OPERATING CONDITIONS

Supply Voltage, VCC. . . . . . . . . . . . . . . . . . . . . . . . . . 8V to 40V Reference Output Current . . . . . . . . . . . . . . . . . . . . . 0 to 20mA

Current through CT Terminal . . . . . . . . . . . . . –0.03mA to –2mA

Timing Resistor, RT . . . . . . . . . . . . . . . . . . . . . 1.8kΩ to 100kΩ Timing Capacitor, CT . . . . . . . . . . . . . . . . . . . 0.001µF to 0.1µF Operating Ambient Temperature Range

UC1524 . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C UC2524 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –25°C to +85°C UC3524 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C

UC1524

UC2524

UC3524

CONNECTION DIAGRAM

INV INPUT

NON INV

INPUT

OSC OUT

CLSENSE(+)

CLSENSE (–-)

RT

CT

GND

1

EA

2

3

4

CL

5

6

OSC

7

8

REF

REG

S/D

16 VREF

15 VIN

14 EB

13 CB

12 CA

11 EA

10 S/D

9 COMP

ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications apply for TA = –55°C to +125°C for the UC1524, –25°C to +85°C for the UC2524, and 0°C to +70°C for the UC3524, VIN = 20V, and f = 20kHz,

TA = TJ.

PARAMETER

TEST CONDITIONS

UC1524/UC2524

 

UC3524

 

UNITS

MIN

 

MAX

MIN

 

MAX

 

 

 

 

 

 

Reference Section

 

 

 

 

 

 

 

 

Output Voltage

 

4.8

5.0

5.2

4.6

5.0

5.4

V

Line Regulation

VIN = 8 to 40V

 

10

20

 

10

30

mV

Load Regulation

IL = 0 to 20mA

 

20

50

 

20

50

mV

Ripple Rejection

f = 120Hz, TJ = 25°C

 

66

 

 

66

 

dB

Short Circuit Current Limit

VREF = 0, TJ = 25°C

 

100

 

 

100

 

mA

Temperature Stability

Over Operating Temperature Range

 

0.3

1

 

0.3

1

%

Long Term Stability

TJ = 125°C, t = 1000 Hrs.

 

20

 

 

20

 

mV

Oscillator Section

 

 

 

 

 

 

 

 

Maximum Frequency

CT = .001mfd, RT = 2kΩ

 

300

 

 

300

 

kHz

Initial Accuracy

RT and CT Constant

 

5

 

 

5

 

%

Voltage Stability

VIN = 8 to 40V, TJ = 25°C

 

 

1

 

 

1

%

Temperature Stability

Over Operating Temperature Range

 

 

5

 

 

5

%

Output Amplitude

Pin 3, TJ = 25°C

 

3.5

 

 

3.5

 

V

Output Pulse Width

CT = .01mfd, TJ = 25°C

 

0.5

 

 

0.5

 

µs

Error Amplifier Section

 

 

 

 

 

 

 

 

Input Offset Voltage

VCM = 2.5V

 

0.5

5

 

2

10

mV

Input Bias Current

VCM = 2.5V

 

2

10

 

2

10

µA

Open Loop Voltage Gain

 

72

80

 

60

80

 

dB

Common Mode Voltage

TJ = 25°C

1.8

 

3.4

1.8

 

3.4

V

2

UC1524

UC2524

UC3524

ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications apply for TA = –55°C to +125°C for the UC1524, –25°C to +85°C for the UC2524, and 0°C to +70°C for the UC3524, VIN = 20V, and f = 20kHz,

TA = TJ.

PARAMETER

TEST CONDITIONS

UC1524/UC2524

 

UC3524

 

UNITS

MIN

 

MAX

MIN

 

MAX

 

 

 

 

 

 

Error Amplifier Section (cont.)

 

 

 

 

 

 

 

 

Common Mode Rejection Ratio

TJ = 25°C

 

70

 

 

70

 

dB

Small Signal Bandwidth

AV = 0dB, TJ = 25°C

 

3

 

 

3

 

MHz

Output Voltage

TJ = 25°C

0.5

 

3.8

0.5

 

3.8

V

Comparator Section

 

 

 

 

 

 

 

 

Duty-Cycle

% Each Output On

0

 

45

0

 

45

%

Input Threshold

Zero Duty-Cycle

 

1

 

 

1

 

V

 

Maximum Duty-Cycle

 

3.5

 

 

3.5

 

V

Input Bias Current

 

 

1

 

 

1

 

µA

Current Limiting Section

 

 

 

 

 

 

 

 

Sense Voltage

Pin 9 = 2V with Error Amplifier

190

200

210

180

200

220

mV

 

Set for Maximum Out, TJ = 25°C

 

 

 

 

 

 

 

Sense Voltage T.C.

 

 

0.2

 

 

0.2

 

mV/°C

Common Mode Voltage

TJ = –55°C to 85°C

–1

 

+1

–1

 

+1

V

 

for the –1V to 1V Limit

 

 

 

 

 

 

 

 

TJ = 125°C

–0.3

 

+1

 

 

 

V

Output Section (Each Output)

 

 

 

 

 

 

 

 

Collector-Emitter Voltage

 

40

 

 

40

 

 

V

Collector Leakage Current

VCE = 40V

 

0.1

50

 

0.1

50

µA

Saturation Voltage

IC = 50mA

 

1

2

 

1

2

V

Emitter Output Voltage

VIN = 20V

17

18

 

17

18

 

V

Rise Time

RC = 2kΩ, TJ = 25°C

 

0.2

 

 

0.2

 

µs

Fall Time

RC = 2kΩ, TJ = 25°C

 

0.1

 

 

0.1

 

µs

Total Standby Current (Note)

VIN = 40V

 

8

10

 

8

10

mA

PRINCIPLES OF OPERATION

The UC1524 is a fixed-frequency pulse-width-modulation voltage regulator control circuit. The regulator operates at a frequency that is programmed by one timing resistor (RT), and one timing capacitor (CT), RT establishes a constant charging current for CT. This results in a linear voltage ramp at CT, which is fed to the comparator providing linear control of the output pulse width by the error amplifier. The UC1524 contains an on-board 5V regulator that serves as a reference as well as powering the UC1524’s internal control circuitry and is also useful in supplying external support functions. This reference voltage is lowered externally by a resistor divider to provide a reference within the common-mode range of the error amplifier or an external reference may be used. The power supply output is sensed by a second resistor divider network to generate a feedback signal to the error amplifier. The amplifier output voltage is then compared to the linear voltage ramp at CT. The resulting modulated pulse out of the high-gain comparator is then steered to

the appropriate output pass transistor (Q1 or Q2) by the pulse-steering flip-flop, which is synchronously toggled by the oscillator output. The oscillator output pulse also serves as a blanking pulse to assure both outputs are never on simultaneously during the transition times. The width of the blanking pulse is controlled by the valve of CT. The outputs may be applied in a push-pull configuration in which their frequency is half that of the base oscillator, or paralleled for single-ended applications in which the frequency is equal to that of the oscillator. The output of the error amplifier shares a common input to the comparator with the current limiting and shutdown circuitry and can be overridden by signals from either of these inputs. This common point is also available externally and may be employed to control the gain of, or to compensate, the error amplifier or to provide additional control to the regulator.

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