5962-9168901MXA
application
INFO
available
UC1625
UC2625
UC3625
Brushless DC Motor Controller
FEATURES
•Drives Power MOSFETs or Power Darlingtons Directly
•50V Open Collector High-Side Drivers
•Latched Soft Start
•High-speed Current-Sense Amplifier with Ideal Diode
•Pulse-by-Pulse and Average Current Sensing
•Over-Voltage and Under-Voltage Protection
•Direction Latch for Safe Direction Reversal
•Tachometer
•Trimmed Reference Sources 30mA
•Programmable Cross-Conduction Protection
•Two-Quadrant and Four-Quadrant Operation
DESCRIPTION
The UC3625 family of motor controller ICs integrate most of the functions required for high-performance brushless DC motor control into one package. When coupled with external power MOSFETs or Darlingtons, these ICs perform fixed-frequency PWM motor control in either voltage or current mode while implementing closed loop speed control and braking with smart noise rejection, safe direction reversal, and cross–conduction protection.
Although specified for operation from power supplies between 10V and 18V, the UC1625 can control higher voltage power devices with external level-shifting components. The UC1625 contains fast, high-current push-pull drivers for low-side power devices and 50V open-collector outputs for high-side power devices or level shifting circuitry.
The UC1625 is characterized for operation over the military temperature range of –55°C to +125°C, while the UC2625 is characterized from –40°C to +105°C and the UC3625 is characterized from 0°C to 70°C. (NOTE: ESD Protection to 2kV)
TYPICAL APPLICATION
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VREF |
+5V TO HALL |
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+15V |
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VMOTOR |
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SENSORS |
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3kΩ |
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+ |
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100nF |
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100nF |
+ |
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100µF |
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2N3904 |
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20µF |
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20µF |
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10Ω |
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10kΩ |
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3kΩ |
10kΩ |
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2 |
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19 |
11 |
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QUAD |
ROSC |
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2N3906 |
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33kΩ |
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22 |
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3kΩ |
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IRF9350 |
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DIR |
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16 |
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6 |
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TO |
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1k |
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1 |
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17 |
TO OTHER |
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MOTOR |
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18 |
CHANNELS |
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100nF |
28 |
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UC3625 |
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4kΩ |
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14 |
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REQUIRED |
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27 |
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TO OTHER |
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FOR BRAKE |
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CHANNELS |
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13 |
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AND FAST |
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25 |
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REVERSE |
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2200pF |
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10Ω |
IRF532 |
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12 |
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COSC |
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20 |
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BRAKE |
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21 |
26 |
3 |
24 |
23 |
8 |
9 |
10 |
4 |
5 |
7 |
10kΩ |
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3nF |
68kΩ |
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100nF |
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5nF |
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100nF |
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240Ω |
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REQUIRED |
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CT |
RT |
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FROM |
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FOR |
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HALL |
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0.02Ω |
AVERAGE |
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2nF |
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SENSORS |
5nF |
240Ω |
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CURRENT |
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RS |
SENSING |
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2nF |
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0.02Ω |
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2nF |
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UDG-99045 |
SLUS353A - NOVEMBER 1999 |
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ABSOLUTE MAXIMUM RATINGS
VCC Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +20V
Pwr VCC Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . +20V PWM In . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 to 6V
E/A IN(+), E/A IN(–) . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 to 12V
ISENSE1, ISENSE2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . –1.3 to 6V OV–Coast, Dir, Speed-In, SSTART, Quad Sel . . . . . . –0.3 to 8V
H1, H2, H3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 to 12V PU Output Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 to 50V PU Output Current . . . . . . . . . . . . . . . . . . +200 mA continuous PD Output Current . . . . . . . . . . . . . . . . . . ±200 mA continuous E/A Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±10 mA
ISENSE Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . –10 mA Tach Out Output Current . . . . . . . . . . . . . . . . . . . . . . . . ±10 mA
VREF Output Current . . . . . . . . . . . . . . . . . . –50 mA continuous Operating Temperature Range UC1625. . . . . . –55°C to 125°C
Operating Temperature Range UC2625. . . . . . –40°C to 105°C Operating Temperature Range UC3625. . . . . . . . . 0°C to 70°C
Note 1: Currents are positive into and negative out of the specified terminal.
Note 2: Consult Unitrode Integrated Circuits databook for information regarding thermal specifications and limitations of packages.
UC1625
UC2625
UC3625
CONNECTION DIAGRAM
DIL-28 (TOP VIEW)
J or N PACKAGE
Note 3: This pinout applies to the SOIC (DW), PLCC (Q), and LCC (L) packages (ie. pin 22 has the same function on all packages.)
ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications apply for: TA = 25°C; Pwr VCC = VCC = 12V; ROSC = 20k to VREF; COSC = 2nF; RTACH = 33k; CTACH = 10nF; and all outputs unloaded. TA = TJ.
PARAMETER |
TEST CONDITIONS |
MIN |
TYP |
MAX |
UNITS |
Overall |
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Supply current |
Over Operating Range |
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14.5 |
30.0 |
mA |
VCC Turn-On Threshold |
Over Operating Range |
8.65 |
8.95 |
9.45 |
V |
VCC Turn-Off Threshold |
Over Operating Range |
7.75 |
8.05 |
8.55 |
V |
Overvoltage/Coast |
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OV-Coast Inhibit Threshold |
Over Operating Range |
1.65 |
1.75 |
1.85 |
V |
OV-Coast Restart Threshold |
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1.55 |
1.65 |
1.75 |
V |
OV-Coast Hysteresis |
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0.05 |
0.10 |
0.15 |
V |
OV-Coast Input Current |
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–10 |
–1 |
0 |
A |
Logic Inputs |
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H1, H2, H3 Low Threshold |
Over Operating Range |
0.8 |
1.0 |
1.2 |
V |
H1, H2, H3 High Threshold |
Over Operating Range |
1.6 |
1.9 |
2.0 |
V |
H1, H2, H3 Input Current |
Over Operating Range, to 0V |
-400 |
-250 |
–120 |
A |
Quad Sel, Dir Thresholds |
Over Operating Range |
0.8 |
1.4 |
2.0 |
V |
Quad Sel Hysteresis |
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70 |
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mV |
Dir Hysteresis |
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0.6 |
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V |
Quad Sel Input Current |
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–30 |
50 |
150 |
A |
Dir Input Current |
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–30 |
–1 |
30 |
A |
PWM Amp/Comparator |
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E/A In(+), E/A In(–) Input Current |
To 2.5V |
–5.0 |
–0.1 |
5.0 |
A |
PWM In Input Current |
To 2.5V |
0 |
3 |
30 |
A |
Error Amp Input Offset |
0V < VCOMMON-MODE < 3V |
–10 |
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10 |
mV |
Error Amp Voltage Gain |
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70 |
90 |
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dB |
2
UC1625
UC2625
UC3625
ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications apply for: TA = 25°C; Pwr VCC = VCC = 12V; ROSC = 20k to VREF; COSC = 2nF; RTACH = 33k; CTACH = 10nF; and all outputs unloaded. TA = TJ.
PARAMETER |
TEST CONDITIONS |
MIN |
TYP |
MAX |
UNITS |
PWM Amp/Comparator (cont.) |
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E/A Out Range |
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0.25 |
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3.50 |
V |
SSTART Pull-up Current |
To 0V |
–16 |
–10 |
–5 |
A |
SSTART Discharge Current |
To 2.5V |
0.1 |
0.4 |
3.0 |
mA |
SSTART Restart Threshold |
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0.1 |
0.2 |
0.3 |
V |
Current Amp |
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Gain |
ISENSE1 = .3V, ISENSE2 = .5V to .7V |
1.75 |
1.95 |
2.15 |
V/V |
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Level Shift |
ISENSE1 = .3V, ISENSE2 = .3V |
2.4 |
2.5 |
2.65 |
V |
Peak Current Threshold |
ISENSE1 = 0V, Force ISENSE2 |
0.14 |
0.20 |
0.26 |
V |
Over Current Threshold |
ISENSE1 = 0V, Force ISENSE2 |
0.26 |
0.30 |
0.36 |
V |
ISENSE1, ISENSE2 Input Current |
To 0V |
–850 |
–320 |
0 |
A |
ISENSE1, ISENSE2 Offset Current |
To 0V |
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±2 |
±12 |
A |
Range ISENSE1, ISENSE2 |
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–1 |
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2 |
V |
Tachometer/Brake |
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Tach-Out High Level |
Over Operating Range, 10k to 2.5V |
4.7 |
5 |
5.3 |
V |
Tach-Out Low Level |
Over Operating Range, 10k to 2.5V |
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0.2 |
V |
On Time |
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170 |
220 |
280 |
s |
On Time Change With Temp |
Over Operating Range |
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0.1 |
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% |
RC-Brake Input Current |
To 0V |
–4.0 |
–1.9 |
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mA |
Threshold to Brake, RC-Brake |
Over Operating Range |
0.8 |
1.0 |
1.2 |
V |
Brake Hysteresis, RC-Brake |
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0.09 |
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V |
Speed-In Threshold |
Over Operating Range |
220 |
257 |
290 |
mV |
Speed-In Input Current |
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–30 |
–5 |
30 |
A |
Low-Side Drivers |
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Voh, –1mA, Down From VCC |
Over Operating Range |
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1.60 |
2.1 |
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V Voh, –50mA, Down From VCC |
Over Operating Range |
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1.75 |
2.2 |
V |
Vol, 1mA |
Over Operating Range |
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0.05 |
0.4 |
V |
Vol, 50mA |
Over Operating Range |
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0.36 |
0.8 |
V |
Rise/Fall Time |
10% to 90% Slew Time, into 1nF |
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50 |
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ns |
High-Side Drivers |
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Vol, 1mA |
Over Operating Range |
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0.1 |
0.4 |
V |
Vol, 50mA |
Over Operating Range |
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1.0 |
1.8 |
V |
Leakage Current |
Output Voltage = 50V |
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25 |
A |
Fall Time |
10% to 90% Slew Time, 50mA Load |
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50 |
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Oscillator |
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Frequency |
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40 |
50 |
60 |
kHz |
Frequency |
Over Operating Range |
35 |
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65 |
kHz |
Reference |
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Output Voltage |
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4.9 |
5.0 |
5.1 |
V |
Output Voltage |
Over Operating Range |
4.7 |
5.0 |
5.3 |
V |
Load Regulation |
0mA to –20mA Load |
–40 |
–5 |
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mV |
Line Regulation |
10V to 18V VCC |
–10 |
–1 |
10 |
mV |
Short Circuit Current |
Over Operating Range |
50 |
100 |
150 |
mA |
3
UC1625
UC2625
UC3625
ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications apply for: TA = 25°C; Pwr VCC = VCC = 12V; ROSC = 20k to VREF; COSC = 2nF; RTACH = 33k; CTACH = 10nF; and all outputs unloaded. TA = TJ.
PARAMETER |
TEST CONDITIONS |
MIN |
TYP |
MAX |
UNITS |
Miscellaneous |
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Output Turn-On Delay |
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1 |
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s |
Output Turn-Off Delay |
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1 |
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s |
BLOCK DIAGRAM
Quad Sel |
22 |
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5V |
2 |
VREF |
RC-Osc |
25 |
OSC |
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S |
Q |
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REFERENCE |
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PWM CLOCK |
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PWM In |
26 |
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R |
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E/A Out |
27 |
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E/A In(+) |
1 |
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2.9V |
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E/A In (–) |
28 |
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10µA |
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SSTART |
24 |
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ISENSE |
3 |
ABS VALUE |
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0.2V |
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R |
Q |
Q1 |
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250Ω |
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ISENSE1 |
4 |
2.5V |
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S |
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2X |
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ISENSE2 |
5 |
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3.1V |
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VCC |
19 |
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9V |
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PWM |
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OV-Coast |
23 |
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CLOCK |
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1.75V |
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18 |
PUA |
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Dir |
6 |
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17 |
PUB |
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DIRECTION |
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Speed-In |
7 |
LATCH |
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0.25V |
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16 |
PUC |
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+5V |
PWM CLOCK |
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DIR |
COAST |
CHOP |
QUAD |
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11 |
Pwr Vcc |
H1 |
8 |
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D |
Q |
H1 |
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CROSS |
14 |
PDA |
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CONDUCTION |
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+5V |
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L |
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PROTECTION |
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LATCHES |
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H2 |
9 |
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D |
Q |
H2 |
DECODER |
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+5V |
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L |
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13 |
PDB |
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H3 |
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D |
Q |
H3 |
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L |
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BRAKE |
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12 |
PDC |
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EDGE |
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DETECT |
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15 |
GND |
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+5V |
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2k |
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RC-Brake |
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ONE |
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20 |
Tach-Out |
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SHOT |
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1V |
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UDG-99044 |
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4 |
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PIN DESCRIPTIONS
Dir, Speed-In: The position decoder logic translates the Hall signals and the Dir signal to the correct driver signals (PUs and PDs). To prevent output stage damage, the signal on Dir is first loaded into a direction latch, then shifted through a two-bit register.
As long as Speed-In is less than 250mV, the direction latch is transparent. When Speed-In is higher than 250mV, the direction latch inhibits all changes in direction. Speed-In can be connected to Tach-Out through a filter, so that the direction latch is only transparent when the motor is spinning slowly, and has too little stored energy to damage power devices.
Additional circuitry detects when the input and output of the direction latch are different, or when the input and output of the shift register are different, and inhibits all output drives during that time. This can be used to allow the motor to coast to a safe speed before reversing.
The shift register guarantees that direction can't be changed instantaneously. The register is clocked by the PWM oscillator, so the delay between direction changes is always going to be between one and two oscillator periods. At 40kHz, this corresponds to a delay of between 25µs and 50µs. Regardless of output stage, 25µs dead time should be adequate to guarantee no overlap cross-conduction. Toggling DIR will cause an output pulse on Tach-Out regardless of motor speed.
E/A In(+), E/A In(–), E/A Out, PWM In: E/A In(+) and E/A In(–) are not internally committed to allow for a wide
variety of uses. They can be connected to the ISENSE, to Tach-Out through a filter, to an external command volt-
age, to a D/A converter for computer control, or to another op amp for more elegant feedback loops. The error amplifier is compensated for unity gain stability, so E/A Out can be tied to E/A In(–) for feedback and major loop compensation.
E/A Out and PWM In drive the PWM comparator. For voltage-mode PWM systems, PWM In can be connected to RC-Osc. The PWM comparator clears the PWM latch, commanding the outputs to chop.
The error amplifier can be biased off by connecting E/A In(–) to a higher voltage than E/A In(+). When biased off, E/A Out will appear to the application as a resistor to ground. E/A Out can then be driven by an external amplifier.
GND: All thresholds and outputs are referred to the GND pin except for the PD and PU outputs.
UC1625
UC2625
UC3625
H1, H2, H3: The three shaft-position sensor inputs consist of hysteresis comparators with input pull-up resistors. Logic thresholds meet TTL specifications and can be driven by 5V CMOS, 12V CMOS, NMOS, or open-collectors.
Connect these inputs to motor shaft position sensors that are positioned 120 electrical degrees apart. If noisy signals are expected, zener clamp and filter these inputs with 6V zeners and an RC filter. Suggested filtering components are 1kΩ and 2nF. Edge skew in the filter is not a problem, because sensors normally generate modified Gray code with only one output changing at a time, but rise and fall times must be shorter than 20µs for correct tachometer operation.
Motors with 60 electrical degree position sensor coding can be used if one or two of the position sensor signals is inverted.
ISENSE1, ISENSE2, ISENSE: The current sense amplifier has a fixed gain of approximately two. It also has a
built-in level shift of approximately 2.5V. The signal appearing on ISENSE is:
ISENSE = 2.5V + (2 • ABS(ISENSE1 – ISENSE 2 ))
ISENSE1 and ISENSE2 are interchangeable and can be used as differential inputs. The differential signal applied
can be as high as ±0.5V before saturation.
If spikes are expected on ISENSE1 or ISENSE2, they are best filtered by a capacitor from ISENSE to ground. Filtering this way allows fast signal inversions to be cor-
rectly processed by the absolute value circuit. The peak-current comparator allows the PWM to enter a cur- rent-limit mode with current in the windings never exceeding approximately 0.2V/RSENSE. The over current comparator provides a fail-safe shutdown in the unlikely
case of current exceeding 0.3V/RSENSE. Then, soft start is commanded, and all outputs are turned off until the
high current condition is removed. It is often essential to
use some filter driving ISENSE1 and ISENSE2 to reject extreme spikes and to control slew rate. Reasonable start-
ing values for filter components might be 250Ω series
resistors and a 5nF capacitor between ISENSE1 and ISENSE2. Input resistors should be kept small and matched to maintain gain accuracy.
OV-Coast: This input can be used as an over-voltage shutdown in put, as a coast input, or both. This input can be driven by TTL, 5V CMOS, or 12V CMOS.
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