UNITRODE UC1826, UC2826, UC3826 Technical data

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UNITRODE UC1826, UC2826, UC3826 Technical data

UC1826

UC1826

UC2826

UC3826

Secondary Side Average Current Mode Controller

FEATURES

Practical Secondary Side Control of Isolated Power Supplies

1MHz Operation

Tailored Loop Bandwidth Provides Excellent Noise Immunity

Voltage Feedforward Provides Superior Transient Response

Accurate Programmable Maximum Duty Cycle

Multiple Chips Can be Synchronized to Fastest Oscillator

Wide Gain Bandwidth Product (70MHz, Acl>10) Current Error Amplifier

Up to Ten Devices Can Easily Share a Common Load

BLOCK DIAGRAM

DESCRIPTION

The UC1826 family of average current mode controllers accurately accomplishes secondary side average current mode control. The secondary side output voltage is regulated by sensing the output voltage and differentially sensing the AC switching current. The sensed output voltage drives a voltage error amplifier. The AC switching current, monitored by a current sense resistor, drives a high bandwidth, low offset current error amplifier. The output of the voltage error amplifier can be used to drive the current amplifier which filters the measured inductor current. Fast transient response is accomplished by utilizing voltage feedforward in generating the PWM ramp.

The UC1826 features load share, oscillator synchronization, undervoltage lockout, and programmable output control. Multiple chip operation can be achieved by connecting up to ten UC1826 chips in parallel. The SHARE bus and CLKSYN bus provide load sharing and synchronization to the fastest oscillator respectively. With its tailored bandwidth, the UC1826 provides excellent noise immunity and is an ideal controller to achieve high power, secondary side average current mode control.

Pin Numbers refer to 24-pin packages.

UDG-95013

7/95

ABSOLUTE MAXIMUM RATINGS

Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20V Output Current Source or Sink . . . . . . . . . . . . . . . . . . . . . .0.3A Analog Input Voltages . . . . . . . . . . . . . . . . . . . . . . .0.3V to 7V ILIM, KILL, SEQ, ENBL, RUN, PWRSEN, PWROK . . . .0.3V to 7V CLKSYN Current Source . . . . . . . . . . . . . . . . . . . . . . . . .20mA RUN Current Sink . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20mA SEQ Current Sink . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20mA RDEAD Current Sink . . . . . . . . . . . . . . . . . . . . . . . . . . . .20mA RAMP Current Sink . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20mA Share Bus Voltage (voltage with respect to GND) . . .0V to 6.2V ADJ Voltage (voltage with respect to GND) . . . . . .0.9V to 6.3V VEE (voltage with respect to GND) . . . . . . . . . . . . . . . . . .1.5V

UC1826

UC2826

UC3826

Storage Temperature . . . . . . . . . . . . . . . . . . . .65°C to +150°C Junction Temperature . . . . . . . . . . . . . . . . . . .65°C to +150°C Lead Temperature (Soldering, 10 sec.) . . . . . . . . . . . . .+300°C

All voltages with respect to VEE except where noted; all currents are positive into, negative out of the specified terminal.

Consult Packaging Section of Databook for thermal limitations and considerations of packages.

RECOMMENDED OPERATING CONDITIONS

Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. .8V to 20V

Sink/Source Output Current . . . . . . . . . . . . . . . . . .

. . . .250mA

Timing Resistor RT . . . . . . . . . . . . . . . . . . . . . . . . .

.1k to 200k

Timing Capacitor CT . . . . . . . . . . . . . . . . . . . . . . . .

75pF to 2nF

CONNECTION DIAGRAMS

DIL-24, SOIC-24,TSSOP-24 (Top View)

J or N, DW, PW Packages

PLCC-28 (Top View)

Q Package

ELECTRICAL CHARACTERISTICS Unless otherwise stated these specifications apply for TA = 55°C to +125°C for UC1826; 40°C to +85°C for UC2826; and 0°C to +70°C for UC3826; VCC = 12V, VEE = GND, Output no load, CT = 345pF, RT = 4kΩ, RDEAD = 1000Ω, CRAMP = 345pF, RRAMP = 35.2kΩ, RCLKSYN = 1k, TA = TJ.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNITS

Current Error Amplifier

 

 

 

 

 

Ib

 

 

0.5

3

μA

 

 

 

 

 

 

Vio

TA = +25°C

 

0.75

3

mV

 

 

 

 

 

 

 

Over Temperature

 

 

5

mV

 

 

 

 

 

 

Avo

 

60

90

 

dB

GBW (Note 2)

Acl = 10, RIN = 1k, CC = 15pF, f = 200kHz (Note 1)

45

70

 

MHz

Vol

IO = 1mA, Voltage above VEE

 

0.5

 

V

Voh

IO = 0mA

 

3.8

 

V

 

IO = 1mA

 

3.5

 

V

Voltage Error Amplifier

 

 

 

 

 

Ib

 

 

0.5

3

μA

Vio

 

 

 

5

mV

Avo

 

60

90

 

dB

 

 

 

 

 

 

2

UC1826

UC2826

UC3826

ELECTRICAL CHARACTERISTICS (cont.) Unless otherwise stated these specifications apply for TA = 55°C to +125°C for UC1826; 40°C to +85°C for UC2826; and 0°C to +70°C for UC3826; VCC = 12V, VEE = GND, Output no load, CT = 345pF, RT = 4kΩ, RDEAD = 1000Ω, CRAMP = 345pF, RRAMP = 35.2kΩ, RCLKSYN = 1k, TA = TJ.

PARAMETER

TEST CONDITION

MIN

TYP

MAX

UNITS

Voltage Error Amplifier (cont.)

 

 

 

 

 

GBW (Note 2)

f = 200kHz

 

7

 

MHz

 

 

 

 

 

 

Vol

IO = 175mA, Volts above VEE

 

 

0.6

V

Voh

ILIM = 3V

2.85

3

3.15

V

 

 

 

 

 

 

Voh-ILIM

Tested ILIM = 0.5V, 1.0V, 2.0V

100

 

100

mV

2X Amplifier and Share Amplifier

 

 

 

 

 

V offset (b; y = mx + b)

 

 

 

20

mV

 

 

 

 

 

 

GAIN (m; y = mx + b)

Slope with AVOUT = 1V and 2V

1.98

 

2.02

V

 

 

 

 

 

 

GBW (Note 2)

 

 

100

 

kHZ

RSHARE

VCC = 0, VSHARE/ISHARE

 

200

 

kΩ

Total Offset

Negative supply is VEE, GND Open,VAO = GND

75

0

75

mV

Vol

VAO = Voltage Amp Vol, Volts above VEE

0.2

0.45

0.6

V

Voh

IO = 0mA, ILIM = 3V, VAO = Voltage Amp Voh

5.7

6

6.3

V

 

IO = 1mA, ILIM = 3V, VAO = Voltage Amp Voh

5.7

6

6.3

V

Adjust Amplifier

 

 

 

 

 

Vio

 

40

60

80

mV

gm

IO = 2μA to 2μA, CADJ = 0.1μF

 

0.1

0.3

mS

Vol

IOUT = 0

0.9

1

1.1

V

 

 

 

 

 

 

 

IOUT = 2μA

0.85

1

1.15

V

 

 

 

 

 

 

Voh

IOUT = 0, VSHARE = 6.5V

5.7

6

6.3

V

 

 

 

 

 

 

 

IOUT = −2μA, VSHARE = 6.5V

5.7

6

6.3

V

Oscillator

 

 

 

 

 

Frequency

 

450

500

550

kHz

 

 

 

 

 

 

Max Duty Cycle

 

72

76

80

%

OSC Ramp Amplitude

 

2

2.2

2.4

V

Ramp Saturation

IO = 10mA, OSC = 0V

 

0.44

0.8

V

Clock Driver/SYNC (CLKSYN)

 

 

 

 

 

Vol

 

 

0.02

0.2

V

Voh

 

 

3.6

 

V

 

RCLKSYN = 200Ω

 

3.5

 

V

ISOURCE

 

 

25

 

mA

 

 

 

 

 

 

RCLKSYN

VCC = 0, VCLKSYN/ICLKSYN

 

10

 

k

 

 

 

 

 

 

VTH

 

 

1.5

 

V

VREF Comparator

 

 

 

 

 

Turn-on Threshold

 

 

4.65

 

V

 

 

 

 

 

 

Hysteresis

 

 

0.4

 

V

VCC Comparator

 

 

 

 

 

Turn-on Threshold

 

7.9

8.4

8.9

V

Hysteresis

 

 

0.4

 

V

PWR Sense Comparator

 

 

 

 

 

Voltage Threshold

 

 

1.25

 

V

Vol

IO = 1mA

 

0.3

0.4

V

Voh

IO = −100μA

 

4

 

V

KILL Comparator

 

 

 

 

 

Voltage Threshold

 

 

3

 

V

 

 

 

 

 

 

3

UC1826

UC2826

UC3826

ELECTRICAL CHARACTERISTICS (cont.) Unless otherwise stated these specifications apply for TA = 55°C to +125°C for UC1826; 40°C to +85°C for UC2826; and 0°C to +70°C for UC3826; VCC = 12V, VEE = GND, Output no load, CT = 345pF, RT = 4kΩ, RDEAD = 1000Ω, CRAMP = 345pF, RRAMP = 35.2kΩ, RCLKSYN = 1k, TA = TJ.

PARAMETER

TEST CONDITION

MIN

TYP

MAX

UNITS

 

Sequence Comparator

 

 

 

 

 

 

Voltage Threshold

 

 

2.5

 

V

 

 

 

 

 

 

 

 

SEQ SAT

IO = 10mA

 

0.25

 

V

 

Enable Comparator

 

 

 

 

 

 

Voltage Threshold

 

 

2.5

 

V

 

 

 

 

 

 

 

 

RUN SAT

IO = 10mA

 

0.2

 

V

 

Reference

 

 

 

 

 

 

VREF

TA = 25°C

4.95

5

5.05

V

 

 

 

 

 

 

 

 

 

VCC = 15V

4.9

 

5.1

V

 

 

 

 

 

 

 

 

Line Regulation

10 < VCC < 20

 

3

15

mV

 

 

 

 

 

 

 

 

Load Regulation

0 < IO < 10mA

 

3

15

mV

 

Short Circuit I

VREF = 0V

30

60

90

mA

 

Output Stage

 

 

 

 

 

 

Rise Time

CL = 100pF

 

10

20

ns

 

Fall Time

CL = 100pF

 

10

20

ns

 

Voh

VCC > 11V, IO = −10mA

8.0

8.4

8.8

V

 

 

IO = 200mA

7.8

 

 

V

 

Vol

IO = 200mA

 

 

3.0

V

 

 

 

 

 

 

 

 

 

IO = 10mA

 

 

0.5

V

 

Virtual Ground

 

 

 

 

 

 

VGND VEE

VEE is externally supplied, GND is floating

0.2

0.75

 

V

 

 

and used as Signal GND.

 

 

 

 

 

Icc

 

 

 

 

 

 

Icc (run)

 

 

21

30

mA

 

Note 1: Guaranteed by design. Not 100% tested in production.

Note 2: Unless otherwise specified all voltages are with respect to GND. Currents are positive into, negative out of the specified terminal.

PIN DESCRIPTIONS

ADJ: The output of the transconductance (gm = 0.1mS) amplifier adjusts the control voltage to maintain equal current sharing. The chip sensing the highest output current will have its output clamped to 1V. A resistor divider between VREF and ADJ drives the control voltage (VA+) for the voltage amplifier. Each slave unit’s ADJ voltage increases (to a maximum of 6V) its control voltage (VA+) until its load current is equal to the master. The 60mV input offset on the gm amplifier guarantees that the unit sensing the highest load current is chosen as the master. The 60mV offset is guaranteed by design to be greater than the inherent offset of the gm amplifier and the buffer amplifier. While the 60mV offset represents an error in current sharing, the gain of the current and 2X amplifiers reduces it to only 30mV. The total current sense gain is

the current amplifier gain. This pin needs a 0.1μF capacitor to compensate the amplifier.

CA-, CA+: The inverting and non-inverting inputs to the current error amplifier. This amplifier needs a capacitor between CAand CAO to set its dominant pole.

CAO: The output of the current error amplifier which is internally clamped to 4V. It is internally connected to the inverting input of the PWM comparator.

CLKSYN: The clock and synchronization pin for the oscillator. This is a bidirectional pin that can be used to synchronize several chips to the fastest oscillator. Its input synchronization threshold is 1.4V. The CLKSYN voltage is 3.6V when the oscillator capacitor CT is being discharged, otherwise it is 0V.

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