Texas Instruments UC3907N, UC3907J, UC3907DW, UC3907DWTR, UC2907Q Datasheet
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UC1907
UC2907
UC3907
DESCRIPTION
The UC3907 family of Load Share Controller ICs provides all the necessary
features to allow multiple independent power modules to be paralleled such
that each module supplies only its proportionate share to total load current.
This sharing is accomplished by controlling each module’s power stage
with a command generated from a voltage feedback amplifier whose reference can be independently adjusted in response to a common share bus
voltage.By monitoring the current from each module, the current share bus
circuitry determines which paralleled module would normally have the highest output current and, with the designation of this unit as the master, adjusts all the other modules to increase their output current to within 2.5% of
that of the master.
The current share bus signal interconnecting all the paralleled modules is a
low-impedance, noise-insensitive line which will not interfere with allowing
each module to act independently should the bus become open or shorted
to ground. The UC3907 controller will reside on the output side of each
power module and its overall function is to supply a voltage feedback loop.
The specific architecture of the power stage is unimportant. Either switching or linear designs may be utilized and the control signal may be either directly coupled or isolated though the use of an opto coupler or other
isolated medium.
Other features of the UC3907 include 1.25% accurate reference: a
low-loss, fixed gain current sense amplifier, a fully differential,
high-impedance voltage sensing capability, and a status indicator to designate which module is performing as master.
Load Share Controller
FEATURES
Fully Differential High Impedance
Voltage Sensing
Accurate Current Amplifier for Precise
Current Sharing
Opto Coupler Driving Capability
1.25% Trimmed Reference
Master Status Indication
4.5V TO 35V Operation
SLUS165 - MARCH 1999
11
14
10
13
8
9
12
15
16
7
5
4
1
6
3
2
2k
2k
+
–
40k
40k
CURRENT SENSE
AMPLIFIER
100
+
–
BUFFER
AMPLIFIER
10k
+
–
+
50mV
ADJUST
AMPLIFIER
ADJ
17.5k
V
CC
1k
V
REF
1.750V
+
–
+
GROUND
AMPLIFIER
0.25V
GND
+
–
50k
20k
+
1.0V
1.75V
VOLTAGEERROR AMPLIFIER
ST ATUSINDICATE
CURRENT SHARE BUS
ADJ INPUT
ADJ OUT
ISET
OPTO DRIVE
COMP
(+) SENSE
VCC (4.5V TO35V)
(–) SENSE
POWER RTN
ARTIFICIAL GND
VREF
C/S OUT
C/S (–)
C/S (+)
DRIVE
AMPLIFIER
+
–
DRV
BLOCK DIAGRAM
UDG-99052
2
UC1907
UC2907
UC3907
DIL-16 (Top View)
J or N Package
ABSOLUTE MAXIMUM RATINGS
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +35V
Opto Out Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +35V
Opto Out Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +20mA
Status Indicate Sink Current. . . . . . . . . . . . . . . . . . . . . . +20mA
C/S Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +35V
Share Bus Voltage. . . . . . . . . . . . . . . . . . . . . . . – 0.3V to +35V
Other Analog Inputs and Outputs (Zener clamped)
Maximum Forced Voltage . . . . . . . . . . . . . . . – 0.3V to +10V
Maximum Forced Current. . . . . . . . . . . . . . . . . . . . . . ±10mA
Ground Amp Sink Current . . . . . . . . . . . . . . . . . . . . . . . +50mA
Pins 1, 9, 12, 15 Sink Current. . . . . . . . . . . . . . . . . . . . . +20mA
Storage Temperature Range. . . . . . . . . . . . . – 65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . – 55°C to +150°C
Lead Temperature (Solder 10 Seconds) . . . . . . . . . . . . +300°C
Pin Nos. refer to 16 Pin DIL Package
Currents are positive into, negative out of the specified
terminal. Consult packaging section of databook for thermal
limitations and considerations of package.
CONNECTION DIAGRAMS
ELECTRICAL CHARACTERISTICS:
Unless otherwise stated these specifications apply for TA= –55°C to +125°C for
UC1907; –40°C to +85°C for UC2907; and 0°C to +70°C for UC3907; VIN= 15V, TA=TJ.
PARAMETER TEST CONDITIONS
MIN TYP MAX UNITS
Voltage Amp Section
Input Voltage COMP = 1V, T
A
= 25°C 1.975 2.000 2.025 V
COMP = 1V, Over Temp 1.960 2.000 2.040 V
Line Regulation V
IN
= 4.5V to 35V 15 mV
Load Regulation I
L
Reference = 0.0mA to – 10mA 10 mV
Long Term Stability T
A
= 125°C, 1000hrs (Note 2) 5 25 mV
Total Output Variation Line, Load, Temp 1.960 2.040
Input Adjust Range ADJ OUT from max high to max low 85 100 115 mV
Input Bias Current –1 µA
Open Loop Gain COMP = 0.75V to 1.5V 65 dB
Unity Gain Bandwidth T
A
= 25°C (Note 2) 700 kHz
Output Sink Current (+) SENSE = 2.2V, COMP = 1V 6 15 mA
Output Source Current (+) SENSE = 1.8V, COMP = 1V 400 600 µA
V
OUT
High (+) SENSE = 1.8V, IL= – 400µa 1.85 2 V
V
OUT
Low (+) SENSE = 2.2V, IL= +1mA 0.15 0.40 V
PLCC–20, LCC–20 (Top View)
Q PACKAGE, L PACKAGE
SOIC-16 (Top View)
DW Package
3
UC1907
UC2907
UC3907
ELECTRICAL CHARACTERISTICS:
Unless otherwise stated these specifications apply for TA= –55°C to +125°C for
UC1907; –40°C to +85°C for UC2907; and 0°C to +70°C for UC3907; VIN= 15V, TA=TJ.
PARAMETER TEST CONDITIONS
MIN TYP MAX UNITS
Reference Section
Output Voltage T
A
= 25°C 1.970 2.000 2.030 V
Over Operating Temp 1.955 2.000 2.045 V
Short Circuit Current VREF = 0.0V – 15 – 30 – 60 mA
Ground Amp Section
Output Voltage 200 250 300 mV
Common Mode Variation (–) SENSE from 0.0V to 2V 5 mV
Load Regulation I
L
= 0.0mA to 20mA, TA= 25°C 10 mV
I
L
= 0.0mA to 20mA, Over Temp 15 mV
Adjust Amp Section
Input Offset Voltage ADJ OUT = 1.5V, Vcm = 0.0V 40 50 60 mV
Input Bias Current – 2 µA
Open Loop Gain 1.5V≤ADJ OUT≤ 2.25V 65 dB
Unity Gain Bandwidth T
A
= 25°C, C
OUT
=1µF (Note 2) 500 Hz
Transconductance I
OUT
= – 10µA to +10µA, V
OUT
= 1.5V 1.7 3 4.5 ms
Output Sink Current Vid = 0.0V, ADJ OUT = 1.5V 55 135 225 µA
Output Source Current Vid = 250mV, ADJ OUT = 1.5V 110 200 350 µA
V
OUT
High Vid = 250mV, I
OUT
= – 50µA 2.20 2.70 2.90 V
V
OUT
Low Vid = 0.0V, I
OUT
= 50µA 0.75 1.15 V
Common Mode Rejection Ratio Vcm = 0.0 to 10V 70 dB
Output Gain to V/A V
OUT
ADJ OUT = 1.5V to 2V 50 57 64 mV/V
∆(+) SENSE/ ∆ADJ OUT
Current Amp Section
Gain Vcm = 0.0V, Vid = 50mV to 100mV 19.2 19.6 20.1 V/V
Output Voltage Vc/s (+) = Vc/s (–) = 0.0V, T
A
= 25°C 210 250 290 mV
Vc/s (+) = Vc/s (–) = 0.0V, Over Temp 180 250 330 mV
Input Offset Change with Common Mode
Input
Vcm = 0V to 13V 600 µV/V
V
OUT
High Vid = 1V 10 14.5 V
V
OUT
Low Vid = – 1V, IL= 1mA 350 450 mV
Power Supply Rejection Ratio V
IN
= 4.5V to 35V, Vcm = 0.0V 60 dB
Slew Rate 0.4 V/µs
Drive Amp Section Rset = 500Ω to Artificial Gnd, Opto Drive = 15V
Voltage Gain COMP = 0.5V to 1V 2.3 2.5 2.6 V/V
I
SETVOUT
High (+) SENSE = 2.2V 3.8 4.1 4.4 V
I
SETVOUT
Low (+) SENSE = 1.8V 270 300 mV
Opto out Voltage Range 435V
Zero Current Input Threshold 1.55 1.65 1.75 V
Buffer Amp Section
Input Offset Voltage Input = 1V 5 mV
Output Off Impedance Input = 1V, Output = 1.5V to 2V 5 10 20 kΩ
Output Source Current Input = 1V, Output = 0.5V 6 15 mA
Common Mode Rejection Ratio Vcm = 0.3V to 10V 70 dB
Power Supply Rejection Ratio V
IN
= 4.5V to 35V 70 dB
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