SHARP XE-A41S Service Manual

Page 1
SERVICE MANUAL
MODEL
CONTENTS
CODE : 00Z
XEA41SUSME
ELECTRIC CASH REGISTER
XE-A41S
SRV KEY PRINTER
: Not necessary : PR-45MII
LEAD-FREE SOLDER
CHAPTER 1. SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
CHAPTER 2. OPTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
CHAPTER 3. MASTER RESET AND PROGRAM RESET. . . . . . . . . 4
CHAPTER 4. HARDWARE DESCRIPTION . . . . . . . . . . . . . . . . . . . . 5
CHAPTER 5. DIAGNOSTIC PROGRAM . . . . . . . . . . . . . . . . . . . . . 10
CHAPTER 6. CIRCUIT DIAGRAM AND PWB LAYOUT . . . . . . . . . 15
Parts marked with "!" are important for maintaining the safety of the set. Be sure to replace these parts with specified ones for maintaining the safety and performance of the set.
This document has been published to be used for after sales service only. The contents are subject to change without notice.
Page 2
CAUTION
RISK OF EXPLOSION IF BATTERY IS REPLACED
BY AN INCORRECT TYPE.
DISPOSE OF USED BATTERIES ACCORDING
TO THE INSTRUCTIONS.
AVOID: SHORT-CIRCUITING THE BATTERY TERMINALS.
KEEP THE BATTERY AWAY FROM FIRE.
* WHEN DISPOSING THE BATTERY, FOLLOW THE LOCAL
RULES AND REGULATIONS.
“BATTERY DISPOSAL”
THIS PRODUCT CONTAINS NICKEL-METAL HYDRIDE BATTERY.
THIS BATTERY MUST BE DISPOSED OF PROPERLY.
REMOVE THE BATTERY FROM THE PRODUCT AND CONTACT FEDERAL OR
STATE ENVIRONMENTAL AGENCIES FOR INFORMATION ON RECYCLING AND
DISPOSAL OPTIONS.
XE-A41S
Page 3
LEAD-FREE SOLDER
The PWB’ s of this model employs lead-free solder. The “LF” marks indicated on the PWB’s and the Service Manual mean “Lead-Free” solder. The alphabet following the LF mark shows the kind of lead-free solder.
Example:
<Solder composition code of lead-free solder>
Solder composition
Sn-Ag-Cu
Sn-Ag-Bi Sn-Ag-Bi-Cu
Sn-Zn-Bi
Sn-In-Ag-Bi
Sn-Cu-Ni
Sn-Ag-Sb
Bi-Sn-Ag-P Bi-Sn-Ag
5mm
Lead-Free
Solder composition code (Refer to the table at the right.)
a
(1) NOTE FOR THE USE OF LEAD-FREE SOLDER THREAD
When repairing a lead-free solder PWB, use lead-free solder thread. Never use conventional lead solder thread, which may cause a breakdown or an accident.
Since the melting point of lead-free solder thread is about 40°C higher than that of conventional lead solder thread, the use of the exclusive-use soldering iron is recommendable.
(2) NOTE FOR SOLDERING WORK
Solder composition code
a
b
z
i
n
s
p
Since the melting point of lead-free solder is about 220°C, which is about 40°C higher than that of conventional lead solder, and its soldering capacity is inferior to conventional one, it is apt to keep the soldering iron in contact with the PWB for longer time. This may cause land separation or may exceed the heat-resistive tem­perature of components. Use enough care to separate the soldering iron from the PWB when completion of soldering is confirmed.
Since lead-free solder includes a greater quantity of tin, the iron tip may corrode easily. Turn ON/OFF the soldering iron power frequently.
If different-kind solder remains on the soldering iron tip, it is melted together with lead-free solder. To avoid this, clean the soldering iron tip after com­pletion of soldering work. If the soldering iron tip is discolored black during soldering work, clean and file the tip with steel wool or a fine filer.
XE-A41S LEAD-FREE SOLDER
Page 4
PC-UM10M
CHAPTER 1. SPECIFICATIONS
1. APPEARANCE
Register rear viewRegister front view
Operator display Printer cover
Receipt paper Journal window
Keyboard
Drawer lock
Drawer
Customer display (Pop-up type)
AC power cord
SD memory card slot
Mode switch
USB port
Printer
Take-up spool
Paper roll cradle
Paper chute
Print head release lever
2. RATING
Model XE-A41S Weight 12.5 kg Dimensions 420 (W) x 430 (D) x 302 (H) mm Power source AC 120V, 60Hz Power consumption Stand-by 10.0W, Operating 44.0W (max.) Working temperature 32 °F to 104 °F (0 °C to 40 °C)
Key names
KEY TOP DESCRIPTION
2 (RECEIPT) 2 (JOURNAL)
RA/AMT
RCPT/PO
VOID
ESC/HELP
%1, %2
RFND
-
@/FOR
n
CL
00, 0-9
PLU/SUB
DEPT#
DEPT SHIFT
CLK# CONV
Dept1-40
INQ
Tax 1 SHIFT, Tax 2 SHIFT
AUTO
TA X
CHK
CH1, CH2
MDSE SBTL
#/TM SBTL
CA/AT/NS
4. MODE SWITCH
Receipt paper feed key
Journal paper feed key
Received-on account/Amount key Receipt print/Paid-out key
Voi d k ey
Escape/Help key
Percent 1and 2 key
Refund key
Discount key
Multiplication key
Decimal point key
Clear key
Numeric Keys
PLU/Sub-department key
Department code entry key
Department shift key
Clerk code entry/Conversion key
Department keys
Inquiry key
Tax 1 and 2 shift key
Automatic sequence key
Tax key
Check key
Charge 1 and 2 keys
Merchandise subtotal key
Non-add code/Time display/Subtotal key
Total/Amount tender/Non Sale key
3. KEYBOARD
3-1. KEYBOARD LAYOUT
Type Normal keyboard Key position STD/MAX 59 Key pitch 19 (W) x 19 (H) mm Key layout Fixed type
4-1. LAYOUT
• Rotary type
MA
OP
OP
OFF
VOID
PGM
Manager key (MA)
MA
REG
X/Z
MGR
1/Z1
X
X2/Z2
Operator key (OP)
OP
3-2. KEY LIST
Keyboard layout
[XE-A41S]
RECEIPT JOURNAL
RA
%1
/AMT
RCPT
%2
/PO
NUMBER
-
VOID
RFND
SHIFT
DC
ESC
/HELP
BS
SPACE
FOR
789
456
123
CL
0
00
.
@/
Note: The small characters on the bottom or lower right in each key
indicates functions or characters which can be used for character entries for text programming.
PLU
/SUB
5 F3010 K3515 P4020
4
3
2
1
DEPT
DEPT
SHIFT
#
25
A
24
29
B
23
C
22
D
21
E
34
G
9
L
14
28
33
H
8
M
13
27
32
I
7
N
12
26
31
J
6
O
11
CLK#
/CONV
19
18
17
16
39
Q
38
37
36
R
S
T
AUTO
INQ
U
TAX2
TAX1
SHIFT
SHIFT
YXV
TAX CH
1
ZW
CHK CH
2
MDSE
#/TM
SBTL
SBTL
CA/AT/NS
XE-A41S SPECIFICATIONS
The mode switch can be operated by inserting one of the two supplied mode keys - manager (MA) and operator (OP) keys. These keys can be inserted or removed only in the “REG” or “OFF” position.
1 –
Page 5
PC-UM10M
The mode switch has these settings:
OFF: This mode locks all register operations. (AC power turns off.)
No change occurs to register data.
OP X/Z: To take individual clerk X or Z reports, and to take flash
reports.
It can be used to toggle receipt state “ON” and “OFF” by press­ing he [RCP/PO] key.
REG: For entering sales.
PGM: To program various items.
VOID
: Enters into the void mode. This mode allows correction after
finalizing a transaction.
MGR: For manager’s entries. The manager can use this mode for an
X1/Z1: To take the X/Z report for various daily totals.
X2/Z2: To take the X/Z report for periodic (weekly or monthly) consoli-
override entry.
dation.
5. DISPLAY
5-1. OPERATOR DISPLAY
Display device : STN LCD module
Number of line : 2 line
Number of digits : 16 positions
Color of display : Yellow Green / Orange
Character form : 5 x 7 dots
Character size : 8.0 (H) x 4.8 (W) mm
Layout:
5-2. CUSTOMER DISPLAY
Display device : LED
Number of line : 1 line
Number of digits : 7 digits
Color of display : Yellow Green
Style : Pop up type
Character form : 7 segment + Dp
Character size : 14.0mm (H) x 8.0mm (W)
Layout:
Operator display
Function message display area
Clerk code or mode name
Receipt OFF indicator
Repeat / Sentinel mark / Power save mark
• Clerk code or Mode name
The mode you are in is displayed. When a clerk is assigned, the clerk code is displayed in the REG or OP X/Z mode. For example, “*01*” is displayed when clerk 01 is assigned.
• Repeat
The number of repeats is displayed, starting at “2” and incremental with each repeat. When you have registered ten times, the display
will show “0” (2 3 3......9 3 0 3 1 3 2...)
• Sentinel mark
When amount in the drawer reaches the amount you prepro­grammed, the sentinel mark “X” is displayed to advise you to remove the money to a safe place.
• Power save mark
When the cash register goes into the power save mode, the power save mark (decimal point) lights up.
• Function message display area
Item labels of departments and PLU/UPCs and function texts you use, such as %1, (-) and CASH are displayed.
When an amount is to be entered, ------ is displayed at the numeric entry area with a guidance message “ENTER PRICE”.
• Numeric entry display area
Numbers entered using numeric keys are displayed here.
Date and time display
Date and time appear on the display in the OP X/Z, REG, or MGR mode. In the REG or MGR mode, press the [#/TM/SBTL] key to dis­play the date and time.
Backlight of the LCD display
When an error occurs or the [RFND] or [VOID] key is pressed or enter the void mode, the green backlight will turn red.
Error message
When an error occurs, the corresponding error message is displayed in the function message display area.
Numeric entry display area
Customer display (Pop-up type)
XE-A41S SPECIFICATIONS
2 –
Page 6
PC-UM10M
6. USB port
[DEVICE]
USB B Type
[OUTLINE]
This ECR has 1 port. This is used in order to connect with a personal computer.
21
11.0
34
2.5
12.04
[SPECIFICATIONS]
1) Transmission rate : USB 2.0 Full Speed Max 12Mbps
2) Connector : USB B type
3) Pin assign : 1Pin 5V : 2Pin -D
: 3Pin +D : 4Pin GND
7-3. LOGO STAMP
• No
7-4. CUTTER
• Method : Manual
7-5. PRINTING AREA
Receipt & Journal
Number of themal head heater elements 864 dots
(688dots)
36
(288dots)
0.125
44.5 0.5
Receipt
(112dots)
4
8. SD MEMORY CARD SLOT
3614
(288dots)
44.5 0.5
Journal
4.5
(units;mm)
7. PRINTER
7-1. PRINTER
• Part number : PR-45M II
• NO. of station : 2 (Receipt and journal)
• Validation : No
• Printing system : Line thermal
• No. of dot : Receipt 288 dots
Journal 288 dots
• Dot pitch : Horizontal 0.125mm
Vertical 0.125mm
• Font : 10 dots (W) u 24 dots (H)
• Printing capacity : Receipt max. 24 characters
Journal max. 24 characters
• Character size : 1.25mm (W) u 3.0mm (H) at 10 u 24 dots
• Print pitch : Column distance 1.5mm
Row distance 3.75mm
• Print speed : Approximate 50mm/s (13.3 lines/sec)
• Paper feed speed : Approximate 40mm/s
(Manual feed)
• Reliability : Mechanism MCBF 5 million lines
Head life 12.5 million characters (at 4 dots/1 character/1 element)
• Paper end sensor : Set up (Receipt and journal)
• Cutter : Manual
• Near end sensor : No
7-2. PAPER
• Paper roll dimension: 44.5 m 0.5mm in width
Max. 80mm in diameter
• Paper quality : (Journal/Receipt)
High-quality paper paper thickness: 0.06 to 0.08mm Nihon seisi thermal paper : TF50KS-E Oji thermal paper : PD150R,
PD160R
[DEVICE]
SD Card (Version. 1.01)
[OUTLINE]
XE-A41S has a SD Memory Card Slot.
[SPECIFICATIONS]
Variable clock rate : 0-25MHz Other commands and memory access : 2.7-3.6V Bus Protocol : SPI Bus Correspondence capacity : 256MB-512MB Recommended manufacturer : SanDisk
9. DRAWER
[OUTLINE]
• Standard equipment: Yes
• Max. number of additional drawers: 1
• The drawer consists of:
1) Drawer box (outer case) and drawer
2) Coin case
3) Money case
4) Lock (attached to the drawer)
[SPECIFICATION]
9-1. DRAWER BOX AND DRAWER
Model name of the drawer box SJ423
Size
color Gray (PB-N8.0)
Material Metal
Bell
Release lever Standard equipment: situated at
Drawer open sensor
420 (W) x 427 (D) x 114 (H) mm
the bottom
XE-A41S SPECIFICATIONS
3 –
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PC-UM10M
9-2. MONEY CASE
Separation from the drawer Disallowed
Separation of the bill compartments from the coin compartments
Bill separator
Number of compartments 5B/6C
5B/6C
Allowed
9-3. LOCK (LOCK KEY : LKGIM7331BHZZ)
• Location of the lock: Front
• Method of locking and unlocking: To lock, insert the drawer lock key into the lock
and turn it 90 degrees counter clockwise. To unlock, insert the drawer lock key and turn it 90 degrees clockwise.
•Key No: SK1
SK1-1
k
c
o
L
k
c
o
l
n
u
10.BATTERY
10-1.MEMORY BACK UP BATTERY
Type : Rechargeable battery
Number of battery : 1pcs as standard RBRC license
CHAPTER 2. OPTIONS
1. OPTIONS (NO)
2. SERVICE OPTIONS
NO NAME PARTS CODE PRICE RANK DESCRIPTION
1 Spill-proof cover XXXXXXXXXXXX XXX
3. SUPPLIES
NO NAME PARTS CODE PRICE RANK DESCRIPTION
1 Thermal roll paper TPAPR6645RC05 AY 5 ROLLS/PACK
4. SPECIAL SERVICE TOOLS (NO)
CHAPTER 3. MASTER RESET AND PROGRAM RESET
1. MASTER RESETTING
Master resetting clears the entire memory and resumes initial values. Master resetting can be accomplished by using the following procedure: Procedure A: 1) Unplug the AC cord from the wall outlet.
2) Set the mode switch to the PGM position.
3) While holding down both the JOURNAL FEED key and [CL] key, plug in the AC cord to the wall outlet.
2. PROGRAM RESETTING (INITIALIZATION)
This resetting resumes the initial program without clearing memory.
This resetting can be operated at below sequence in PGM mode.
Procedure: 1) Unplug the AC cord from the wall outlet.
2) Set the mode switch to the PGM position.
3) While holding down both JOURNAL FEED key and RECEIPT FEED key, plug in the AC cord to the wall outlet.
XE-A41S OPTIONS
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PC-UM10M
CHAPTER 4. HARDWARE DESCRIPTION
1. BLOCK DIAGRAM
The block diagram of the XE-A41S is shown below.
FRONT DISPLAY
(2line LCD backlight)
POWER
SD
CARD
16
MHz
32.768kHz
CPU
Renesus
M30623MEP-A93GP
PRINTER DRIVER/
SENSOR
PRINTER
PR-45M
DRAWER IF
BUZZER
USB ONTROLLER
DECODER
4Mbit Flash ROM
4Mbit SRAM
KEY IF/POPUPDISPLAYIF
KEY
RESET IC
M66291GP
USB
B
POPUP DISPLAY
(LED 7SEG)
MODE SW
Port
2. MEMORY MAP
2-1. ADDRESS MAP
00000h SFR
Internal RAM 12KByte
00400h
(00400h-033FFh)
033FFh
03400h
04000h
Front Display POPUP Display
08000h
External RAM 124KByte/512KByte
27000h
28000h USB Controller /CS1 32K
30000h /CS0 832K
40000h External RAM
512KByte (256KByte x 2Bank)
80000h
External ROM 512KByte
C0000h
D0000h
FFFFFh
/CS3 16K
/CS2 124K
CPU
Renesus-make M30623MEP-A93GP (Internal RAM 12KB, internal ROM 192KB)
EXTERNAL MEMORY
RAM 512KB
CYPRESS CY62148ELL-45ZSXIT FLASH ROM 512KB SPANSION MBM29F400TC-70PFTN
PRINTER PR45M
External RAM/CS2 area: When RAMBANK=0, 48000h-66FFFh is shadow
40000h
48000h /CS2 area
50000h
60000h
66FFFh
67000h
70000h
7FFFFh
80000h RAMBANK=0 RAMBANK=1
00000h~ 40000h~ 3FFFFh 7FFFFFh
3. CPU SETTING
3-1. OUTLINE
Model : M30623MEP-A93GP
Internal RAM : 12 KByte Internal ROM : 192 KByte Operation clock : 16 MHz Sub clock : 32.768 KHz External data bus : 8 bit
3-2. WEIGHT SETTING
CS0# (FLASH ROM and EXTERNAL SRAM) 3 BCLK CS1# (USB CONTROLLER) 3 BCLK CS2# (EXTERNAL SRAM IMAGE SPACE) 3 BCLK CS3# (FRONT/POPUP DISPLAY) 2 BCLK
XE-A41S HARDWARE DESCRIPTION
5 –
Page 9
PC-UM10M
4. I/O
M16C/24 PORT MEMORY SPACE: NORMAL MODE
PROCESSOR MODE: MICRO PROCESSOR MODE It is used by (SEPARATE BUS 8bit Width)
PIN
PORT
No.
P00 88 I/O D0 Out L P54 42 O
P01 87 I/O D1 D1 Out L P55 41 I
P02 86 I/O D2 D2 Out L P56 40 O ALE (NU) Out L
P03 85 I/O D3 D3 Out L P57 39 I /RDY /RDY In
P04 84 I/O D4 D4 Out L P60 38 O P60 DR1 L Out L DRAWER 1 DRIVE
P05 83 I/O D5 D5 Out L P61 37 O CLK0 FSCK(NU) L Out L FMC FSCK
P06 82 I/O D6 D6 Out L P62 36 I RXD0 FRD(NU) L Out L FMC FRD
P07 81 I/O D7 D7 Out L P63 35 O TXD0 FSD (NU) L Out L FMC FSD
P10 80 O P10 RAS L Out L RECEIPT PAPER
P11 79 O P11 RBS L Out L RECEIPT PAPER
P12 78 O P12 RCS L Out L RECEIPT PAPER
P13 77 O P13 RDS L Out L RECEIPT PAPER
P14 76 O P14 JAS L Out L JOURNAL PAPER
P15 75 O P15 JBS L Out L JOURNAL PAPER
P16 74 O P16 JCS L Out L JOURNAL PAPER
P17 73 O P17 JDS L Out L JOURNAL PAPER
P20 72 O A0 A0 Out L P74 26 O P74 /ER H Out L RS-232 /ER
P21 71 O A1 A1 Out L P75 25 I P75 /CD In RS-232 /CD
P22 70 O A2 A2 Out L P76 24 I P76 /CS In RS-232 /CS
P23 69 O A3 A3 Out L P77 23 I P77 /DR In RS-232 /DR
P24 68 O A4 A4 Out L P80 22 O P80 BUZZER L Out L
P25 67 O A5 A5 Out L P81 21 O P81 VHCOM L In PRINTER HEAD
P26 66 O A6 A6 Out L P82 20 I /INT0 POFF In
P27 65 O A7 A7 Out L P83 19 I /INT1 /FRDY(NU) L Out L FMC /FRDY
P30 63 O A8 A8 Out L P84 18 O P84 /BUSY(NU) L Out L FMC #BUSY
P31 61 O A9 A9 Out L P85 17 I /NMI /NMI(NU) In
P32 60 O A10 A10 Out L P86 11 O
P33 59 O A11 A11 Out L P87 10 I XCIN XCIN 32.768kHz
P34 58 O A12 A12 Out L P90 7 I P90 MODE In
P35 57 O A13 A13 Out L P91 6 I P91 MSENS In
P36 56 O A14 A14 Out L P92 5 O P92 BA1 L Out L BANK signal 1
P37 55 O A15 A15 Out L P93 4 O P93 BA0 L Out L BANK signal 0
P40 54 O A16 A16 Out L P94 3 O P94 DATA /CE L Out L LCD DATA LATCH
P41 53 O A17 A17 Out L P95 2 O P95 BLON L Out L BACK LIGHT ON
P42 52 O A18 A18 Out L P96 1 O P96 LCDON L Out L LCD POWER ON
P43 51 O A19 A19 Out L P97 100 I P97 IPLON In IPL ON signal
P44 50 O /CS0 /CS0 Out H P100 97 I AN0 TM In
P45 49 O /CS1 /CS1 Out L P101 95 I AN1 VPTEST In HEAD voltage
P46 48 O /CS2 /CS2 Out H P102 94 I AN2 VREF In Reference voltage
P47 47 O /CS3 /CS3 Out L P103 93
P50 46 O /WR /WR Out L P104 92 O AN4 /STRB2 H In PRINTER STORE
P51 45 O /BHE (NU) Out L P105 91 O P105 /STRB3 H In PRINTER STORE
P52 44 O /RD /RD Out L P106 90 O P106 /STRB4 H In PRINTER STORE
P53 43 O BCLK BCLK Out L P107 89 O P107 LATCH L In PRINTER LATCH
I/O
Pin
name
Signal
name
Initial value
OFF
MODE
Function PORT
FEED A
FEED B
FEED C
FEED D
FEED A
FEED B
FEED C
FEED D
PIN No.
P64 34 O /RTS1 /RS H Out L RS-232 /RS
P65 33 O P65 /FRES(NU) L Out L FMC /FRES
P66 32 I RXD1 RD In RS-232 RD
P67 31 O TXD1 SD H Out L RS-232 SD
P70 30 O TXD2 SO L Out L PRINTER DATA
P71 29 I RXD2 SI In PRINTER DATA IN
P72 28 O CLK2 PCLK L Out L PRINTER CLOCK
P73 27 O P73 DR2 L Out L DRAWER 2 DRIVE
Pin
I/O
name
/HLDA
/HOLD
XCOUT
AN3 /STRB1 H In PRINTER STORE
O
Signal
name
(NU) Out L
/HOLD In
XCOUT 32.768kHz
Initial value
OFF
MODE
SIGNAL
OUT
SIGNAL
CONTROL
MODE KEY SENSE
MISCELLANEOUS SENSE
signal
HEAD temperature monitor
monitor
SIGNAL 1
SIGNAL 2
SIGNAL 3
SIGNAL 4
SIGNAL
Function
XE-A41S HARDWARE DESCRIPTION
6 –
Page 10
PC-UM10M
Power supply/CONTROL pins
PIN
PORT
BYTE 8 I BYTE Connected to VCC Vcc 62 Vcc Connected to VCC
CNVss 9 I CNVss Connected to GND Vss 64 Vss Connected to GND
/RESET 12 I /RESET AVss 96 AVss Connected to GND
Xout 13 O Xout OPEN Vref 98 Vref Connected to VCC
Vss 14 Vss Connected to GND AVcc 99 AVcc Connected to VCC
Xin 15 I Xin Connected to Spectram diffusion IC
Vcc 16 Vcc Connected to VCC
I/O Pin name Function PORT
No.
PIN
I/O Pin name Function
No.
5. DISPLAY
5-1. FRONT DISPLAY
The LCD display of 5 x 7dot, 2 lines, and 16 digits with the parallel IF
specifications using SPLC780C.
LCD-related Register
Function Address R/W
LCD Write Data 04001h (CS3 space) W
LCD Read Data 04001h (CS3 space) R
LCD Control Signal
Pin
CPU
No.
PORT
46 P137 LCDE Enable Signal Enable
122 P105 LCDON H : LCD ON L : LCD OFF
121 P106 LCDRW H : Data read L : Data Write
120 P107 LCDRS H : Data input L : Instruction Input
48 P135 BLON0 LCD Backlight Orange ON signal
47 P136 BLON1 LCD Backlight Yellow Green ON signal
32 P73 LCDCS# L : LCD write data latch
5-2. REAR (POPUP) DISPLAY
The rear display is of 7-digit, 7-segment LED.
Display digit signal
The four signals KS0~KS3 are assigned to the CPU port, and decoded
to the strobe signals of 16 lines externally.
Function
POPUP DISPLAY DIGIT signal and KEY STROBE sig­nal
Display SEGMENT signal
By writing the segment data to the /CS3 space, the LED segment signal
can be outputted.
Function Address R/W
POPUP DISPLAY Data 04000h (CS3 space) W
Signal
name
Signal
name
KS0 P120
KS1 P121
KS2 P122
KS3 P123
CPU
PORT
Remark
Remark
KS3 is decoded as MSB outside the CPU to be S0~S15. KS3 is used as the MSB. KS3~KS0 are decoded to be /S0~/S15. (KS3~KS0 are active at “H”)
6. KEY SCAN
6-1. STROBE SIGNAL
The 16 strobe signals common with the display digit signal are used.
6-2. RETURN SIGNAL
With the 10 return signal of the CPU port, the key status and the mode key status are detected.
Signal name CPU PORT Remark
KR0 P90 Key Return signal 0
KR1 P91 Key Return signal 1
KR2 P92 Key Return signal 2
KR3 P93 Key Return signal 3
KR4 P94 Key Return signal 4
KR5 P95 Key Return signal 5
KR6 P96 Key Return signal 6
KR7 P97 Key Return signal 7
MODR P124 Mode key position read signal
RJR P134 Receipt/Journal key read signal
7. PRINTER CONTROL
7-1. STEPPING MOTOR CONTROL
The stepping motor is driven by the STA471A made by Sanken at a constant voltage. 1step : 0.125mm, 1dot : 1step Print speed 50mm/s
<CPU PORT>
PIN No. CPU PORT Use signal
80 P10 RAS
79 P11 RBS
78 P12 RCS
77 P13 RDS
76 P14 JAS
75 P15 JBS
74 P16 JCS
73 P17 JDS
Each bit correspondence
Address Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bir1 Bit0
04000h dp g f e d c b a
XE-A41S HARDWARE DESCRIPTION
7 –
Page 11
PC-UM10M
<Drive STEP>
RECEIPT MOTOR
Driver IC input (CPU output) Motor drive signal
STEP RAS RBS RCS RDS /RPFA /RPFB /RPFC /RPFD
1HLLHL H H L
2LHLHH L H L
3LHHLH L L H
4HLHL L H L H
JOURNAL MOTOR
Driver IC input (CPU output)
Motor drive signal
STEP JAS JBS JCS JDS /JPFA /JPFB /JPFC /JPFD
1LHHLHL L H
2LHLHHL HL
3HLLHLH H L
4HLHLL HL H
7-2. HEAD CONTROL
HEAD : All 832 dots
Printable area (Receipt side) 384 dots
(Journal side) 384 dots
<CPU PORT>
PIN No. CPU PORT Use signal Remark
30 P70 SO Printer DATA signal
29 P61 SI Not used
28 P72 PCLK Printer Clock signal
93 P114 /STB1 Strobe signal 1
92 P115 /STB2 Strobe signal 2
91 P116 /STB3 Strobe signal 3
90 P117 /STB4 Strobe signal 4
89 P110 LATCH Printer DATA Latch
21 P71 VHCOM Printer power control signal
8. A/D CONVERSION
The following three signals are inputted to the A/D conversion port. A/D conversion is made in 9 bits.
<CPU PORT>
PIN No. CPU PORT Use signal Function
128 AN0 VREF Reference voltage
126 AN1 HTEMP PRINTER HEAD temperature
125 AN2 VPTEST1 PRINTER HEAD voltage
8-1. REFERENCE VOLTAGE
The reference voltage (2.495V m 0.085V) generated by KIA431F is inputted to the AN2 pin.
8-2. PRINTER HEAD TEMPERATURE
The voltage divided by the thermistor for detecting the printer head tem­perature and the resistor is inputted to the AN1 pin.
8-3. PRITER HEAD VOLTAGE MONITOR
The voltage supplied by the printer head power and passed through the printer and divided by the resistor is inputted to the AN2 pin. The printable voltage range for the printer is 15V~26.4V (282~497 in A/ D conversion value).
9. DRAWER CONTROL
The drawer port (1CH) is provided. Drawer solenoid drive time : 45ms (min) - 50ms (max)
Function Signal name CPU PORT Remark
DRAWER drive signal
DRAWER P141 Drawer drive at H
10. BUZZER CONTROL
The piezo-type buzzer is used. The oscillation frequency is
4.00kHz m 0.25kHz.
Function Signal name CPU PORT Remark
BUZZER drive signal BUZZER P80 Buzzer drive at H
11. USB I/F
The Renesus-make USB general-use ASSP device, M66291, is used to perform USB data send/receive. The M66291 is mapped to the /CS1 space (28000H~2FFFFFH).
M16C/62
A1
D0
Vcc
CS1
WRL
WRH
INT2
INT1
A0
RD
5V
A6
D7
7
8
M66291
IOVcc CoreVcc
D15/AD0 AD1
AD6
D0 D7
CS1 RD LWR HWR/BYTE
INT0
Dreq0
24MHz
<CPU PORT>
No. CPU PORT Use signal Purpose
24 P83 (INT1) /DREQUSB USB DMA channel 0 DMA request
23 P84 (INT2) /INTUSB USB interruption 0 request signal
26 P81 /REUSB USB controller reset signal
signal
3.3V
Vbus
Tr ON
XoutXin
1.5k
D+
27
-
D
27
1.0 F
µ
1
Vbus
3
D+
2
-
D
4
GND
USB CONNECTOR
HEAD
temperature
Less than -10°C
A/D conversion
value (DEC)
464~511 MOTOR LOCK
Operation
-10°C ~ 0°C 435~464 Print in the conduction time at 0°C.
0°C ~ 70°C 116~434 Print in the conduction time speci-
fied on the PR-45M specifications.
70°C or above 0~115 MOTOR LOCK
XE-A41S HARDWARE DESCRIPTION
8 –
Page 12
PC-UM10M
12. SD Card I/F
One port for SD card I/F is provided as a standard provision. It is con­nected with UART1 of the CPU. Communication with the SD card is made in the SPI mode.
<CPU PORT>
Pin
CPU
No.
PORT
31 P74 SD_WP# SD card write protect detection signal
116 P113 SD_CD# SD card insertion detection signal
118 P111 SD_CS# SD Card Chip Select signal
117 P112 SD_POWER# SD Card Power On signal
36 P67 SD_TXD TxD signal
38 P66 SD_RXD RxD signal
40 P65 SD_CLK Serial CLK signal
Use signal Purpose
13. RESET
The RESET signal is canceled when the voltage of the device which uses the 5V series (VCC, VDD, VLED) power reaches the operating volt­age level.
The RESET signal is generated under the following conditions.
• The mode key switch is shifted from SRV’ to another position (except for OFF).
• The power is turned ON after sec or more from power OFF and VCC reaches 5V.
• The mode key switch is shifted from OFF to another position (except for SRV’) and VCC reaches 5V.
(When the OFF time is 5sec or less, the RESET signal may not be gen­erated.)
14. POFF
The POFF signal is changed from 0 to 1 when the 5V series power and the 24V series power reach the operating voltage level. When it falls below the operating voltage level, it is changed from 1 to 0.
POFF, RESET timing chart
4.5V
5V
24V
RESET
POFF
20.8V
POWER ON
INSTANTANEOUS STOP
MODE SRV'
EXCEPT MODE SRV'
POWER OFF
* When both the RESET signal and the POFF signal are high, all the
functions are enabled.
XE-A41S HARDWARE DESCRIPTION
9 –
Page 13
CHAPTER 5. DIAGNOSTIC DESCRIPTIONS
PC-UM10M
1. LIST OF TEST ITEMS AND CODES
Codes Test items
1) 100 Display buzzer test
2) 102 Printer print test
3) 104 Keyboard test
4) 105 Mode switch test
5) 106 Printer sensor test
6) 107 Time display test
7) 110 Drawer open test
8) 116 LCD display test
9) 118 LCD backlight test
10) 120 External RAM test
11) 121 Internal RAM test
12) 130 External ROM test
13) 160 AD conversion port test
14) 520 USB communication test
15) 550 Sleep mode test
16) 620 SD card test
2. DIAG BOOTING
Mode SW : PRG mode
Key operation : “Above code” + “PO” key
3. DESCRIPTIONS OF EACH DIAG
1) DISPLAY BUZZER TEST
1 Key operation
100 3
2 Details of the test
The decimal point of the LED and the cursor of the LCD are shifted from the lowest digit upward one by one. (Every 200msec) After that, all segments are lighted. (About 1sec)
3 Display/Print
OP display
Rear
4 End of the test
Press any key to terminate the test, and the following print is made.
2) PRINTER PRINT TEST
1 Key operation
102 3
2 Details of the test
The following print pattern is printed. For the receipt side, the logo mark is also printed and a receipt is issued.
3 Display/Print
OP display
PO
DISP
BUZZER
0123456789ABCDEF
4. 5. 6. 7. 8. 9. 0.
100
PO
R/J
PRINTER
PGM
PGM
Patten enlargementPrint content
* As shown above, 5 lines of 30 digits are printed.
4 End of the test
After completion of printing, the test is automatically terminated.
XE-A41S Diagnos tic Descriptions
10 –
Page 14
PC-UM10M
3) KEYBOARD TEST
1 Key operation
_ _ _ _104 3
2
KEY sum check code
2 Details of the test
With the key code sum check code, the keyboard check is per­formed. When no sum code is entered, the sum code check is made with default key arrangement. The sum check data of each model are entered on the upper 4 digits of the diag code, and the entered data are compared with the data accumulated until the last key (CA/AT/NS) is pressed. If those data correspond with each other, the end print is made. If not, the error print is made.
3 Display/Print.
OP display
Rear
4 End of the test
Print
PO
KEY
BOARD
104
***
***= KEY CODE
104
PGM
***
5) PRINTER SENSOR TEST
1 Key operation
106 3
2 Details of the test
The paper end sensor status and the head-up sensor status are checked.
3 Display/Print
OP display
4 End of the test
Print
PO
Rear
R/J
106
Z
X : 1
0
Y : 1
0
Z : 1
0
SENSOR
XY
Receipt side paper presence Receipt side paper empty Journal side paper presence Journal side paper empty Normal position Head-up position
106
PGM
XZY
Error print
KEY SUM ERROR
XXXX-YYYY
104
4) MODE SWITCH TEST
1 Key operation
105 3
2 Details of the test
Shift the mode SW from “PGM” position to “X2/Z2” one by one, and return to “PGM” and check that the positions are changed in the proper sequence.
3 Display/Print
OP display
PO
MODE
SW
PGM
105
Rear
MODE: PGM VOID OFF OP X/Z REG MGR X1/Z1 X2/Z2 PGM
129 3456 71
X :
The above “X” must be read in the proper sequence. (“9” is displayed when the contact is open.)
4 End of the test
Print
X
105
6) TIME DISPLAY TEST
1 Key operation
107 3
2 Details of the test
The current time is displayed.
3 Display/Print
OP display
PO
TIM
ER
CHECK
PGM
hh ssmm
Rear
4 End of the test
When any key is pressed, the date and the time are printed and the test is terminated.
hh mm
* hh = hour‚ mm = minute‚ ss = sec
X
Print
yyMMdd - hhmmss
* yy = year, MM = month, dd = day,
hh = hour, mm = minute, ss = sec
107
Error print
MODE KEY ERROR
105
XE-A41S Diagnos tic Descriptions
11 –
Page 15
PC-UM10M
7) DRAWER OPEN TEST
1 Key operation
110 3
2 Details of the test
The drawer is opened.
3 Display/Print
OP display
4 End of the test
After opening the drawer, the end print is made and the test is auto­matically terminated.
Print
PO
DRAWER
PGM
110
8) LCD DISPLAY TEST
1 Key operation
116 3
2 Details of the test
The display CG is checked. Check procedures: The built-in 256 CG’s are divided into 16 blocks, and each block of 16 characters is displayed on the dot-display for check. Check is started with CG code of 00H ~ 0FH. When any key is pressed, the following block is displayed sequentially.
3 Display/Print
OP display
PO
XY
PGM
oooooooooooooooo
* X and Y: The head code of each block is displayed in hexadecimal number.
4 End of the test
When any key is pressed, the test is terminated and the following print is made.
Print
116
10) EXTERNAL RAM TEST
1 Key operation
120 3
2 Details of the test
The external SRAM (08000H~27FFFH area and 40000H~ 7FFFFH) of 512Kbyte (standard provision) is checked. The RA test is performed in the following procedures.
(1) Bus/decoder check
(2) Device check
3 Display/Print
OP display
PO
a) Test area data save
b) Write "00H"
c) Rear comparison after "00H", write "55H"
d) Rear comparison after "55H", write "AAH"
e) Read comparison "AAH"
f) Save data restore
RAM
PGM
120
4 End of the test
After completion of the test, the end print is made and the test is automatically terminated.
Print
Error print
RAM ERROR x *****h
* x = 1 : Data error, x = 2 : Address error * XX-YY : XX is the anticipated data. YY is the read data. * In case of an error, the error address is printed on "*****"
after the abnormal end print.
120
XX-YY
120
9) LCD BACKLIGHT TEST
1 Key operation
118 3
2 Details of the test
The backlight ON/OFF test is performed. First, the yellow and the green backlights are lighted. When any key is pressed, the orange backlight is lighted. When any key is pressed again, the backlight is turned off.
3
Display/Print
OP display
4 End of the test
When any key is pressed after turning OFF the backlight, the test is terminated and the following print is made.
Print
PO
BACKL IGHT
PGM
118
11) CPU INTERNAL RAM TEST
1 Key operation
121 3
2 Details of the test
The RAM (12Kbyte) in the CPU is checked. The RAM test is performed in the following procedure. Device check
3 Display/Print
OP display
PO
a) Test area data save
b) Write "00H"
c) Rear comparison after "00H", write "55H"
d) Rear comparison after "55H", write "AAH"
e) Read comparison "AAH"
f) Save data restore
RAM
PGM
121
XE-A41S Diagnos tic Descriptions
12 –
Page 16
PC-UM10M
0
4
End of the test After completion of the test, the end print is made and the test is automatically terminated.
Print
Error print
RAM ERROR x *****h
* x = 1 : Data error, x = 2 : Address error * XX-YY : XX is the anticipated data. YY is the read data. * In case of an error, the error address is printed on
"*****" after the abnormal end print.
121
XX-YY
121
12) EXTERNAL ROM TEST
1
Key operation
130 3
2 Details of the test
The check sum of the external Flash ROM is checked, and the ROM version is printed.
3
Display/Print
OP display
PO
FLASH
PGMROM
130
4
End of the test After completion of the test, the end print is made and the test is automatically terminated.
Print
Error print
ROM
ROM ERROR x *****h
ROM
* x = 1 : Data error, x = 2 : Address error * In case of an error, the error address is printed on "*****" after the abnormal end print.
********
********
140
******** ********
140
Model name Version
Model name Version
13) AD CONVERSION PORT TEST
1
Key operation
160 3
2 Details of the test
The AD conversion port voltage is displayed. TM (printer thermal head temperature) is displayed. When any key is pressed, VPTES (printer voltage) is displayed in 9 bits.
3
Display/Print
OP display
PO
A/D
Press any key.
PGMTEST
=
XXXTM
4 End of the test
When any key is pressed with VPTEST displayed, the end print is made and the test is automatically terminated.
Print
14)
USB COMMUNICATION TEST
1 Key operation
520 3
2 Details of the test
The USB revision, the vendor ID, the product ID, and the device address assigned by the host are printed.
3 Display/Print
OP display
HEAD TEMP HEAD VOLTAGE
PO
USB
*** ***
160
TEST1
PGM
520
Print
4 End of the test
After completion of printing, the test is terminated.
USB Rev. Ver. XXX VENDOR ID PRODUCT ID XXX DEVICE ADDRESS XXX
520
XXX
When the host is connected : 1~127
When the host is not connected :
15) SLEEP MODE TEST
1 Key operation
550 3
2 Details of the test
After execution of the diag, the machine enters the sleep mode.
3 Display/Print
PO
OP display
.
Rear
4 End of the test
When any key is pressed, the machine restores from the sleep mode. The following print is made and the diag is terminated.
End print
.
550
A/D
PGMTEST
=
XXXVP
XE-A41S Diagnos tic Descriptions
13 –
Page 17
16) SD CARD TEST
1 Key operation
620 3
2 Details of the test
The SD card is detected and the write protect status is displayed. After completion of the test, the SD card register value is printed.
3 Display/Print
PO
PC-UM10M
OP display
4 End of the test
When any key is pressed, the SD card register is read and the end print is made.
Print
Error print
Error print list
CARD NO DETECT SD Card not detected
READ ERROR SD read error
SD PGM
TEST1
620
*
X = SD card detection
SD card YES
*
Y = WP detection
WP state
CID XXXXXXXXXXXXXXXX-­ XXXXXXXXXXXXXXXXh CSD XXXXXXXXXXXXXXXX-­ XXXXXXXXXXXXXXXXh OCR 12345678h 620
SD TEST ERROR ****** 620
* "******" = Error print
Error print Error content
0 : SD card NO
0 : WP NO
-
X Y
XE-A41S Diagnos tic Descriptions
14 –
Page 18
PC-UM10M
1SS355D21SS355
1
1000pF
NOT MOUNT
R92
R91
C5
100pFC5100pF
X2
3
1
NOT MOUNT
R89
R16
R16
VCC
8
VDD
IC3
IC3
XIN
1
3
CSTLS16M
X3
2
100K
7
2
1
10K
10K
1
S0
XOUT
C14
C14
6
3
A
A
A
A
DREQUSB#
10K
10K
DREQUSB#
16MHzX216MHz
2
C7
X1
1 2
C6
+
+
C13
C13
5
VSS
FSOUT
LF
S1
4
R94
R94
A
A
A
A
INTUSB#
C11
C12
INTUSB#
27pFC727pF
32.768KHzX132.768KHz
18pFC618pF
10uF/10V,OS
10uF/10V,OS
2
0.1uF
0.1uF
FS781
FS781
C15
C15
33pF
33pF
R9533R95
3.3K
3.3K
330pF
330pF
21
21
21
21
3
3
3
3
NOT MOUNT
4
4
4
4
5
5
5
5
6
6
6
6
C16
C16
91pF
91pF
33
7
7
7
7
NOT MOUNT
8
8
8
8
B
B
B
CTS#
R18
VDD
CNVSS
VCC
R74
R35
CTS
39
41
40
VSS
P6_5/CLK1
P6_4/CTS1#/RTS1#
P10_1/AN1
AVSS
P10_0/AN0
128
126
127
VREF
HTEMP
HTEMP
VREF
12K
12K
VCCVDD
R19
R19
8 7 6
B
5
CN1
TEST PIN
VCC
1
2
SP2 SHORT PIN & SOCKETSP2
3
10K
SDRXD
SDCLK
SDTXD
47K
R119
10K
10K
NOT MOUNT
P6_6/RXD1 VCC1 P6_7/TXD1/SDA1 P7_0/TXD2/SDA2/TA0OUT P7_1/RXD2/SCL2/TA0IN/TB5IN P7_2/CLK2/TA1OUT/V P7_3/CTS2#/RTS2#/TA1IN//V P7_4/TA2OUT/W P7_5/TA2IN//W P7_6/TA3OUT P7_7/TA3IN P8_0/TA4OUT/U P8_1/TA4IN//U P8_2/INT0# P8_3/INT1# P8_4/INT2#/ZP P8_5/NMI# VCC1 XIN VSS XOUT RESET# P8_6/XCOUT P8_7/XCIN CNVSS BYTE P14_0 P14_1 P9_0/TB0IN/CLK3 P9_1/TB1IN/SIN3 P9_2/TB2IN/SOUT3 P9_3/DA0/TB3IN P9_4/DA1/TB4IN P9_5/ANEX0/CLK4 P9_6/ANEX1/SOUT4 P9_7/ADTRG#/SIN4 AVCC VREF
VDD AVCC
VDD
C98
C98
B
B
B
B
SDRXD
38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11
10 9 8 7 6 5 4 3 2 1
KR[0..7]
KR[0..7]
CPURESET#
10K
10K
R75
R75
R113
470
R113
470
VCC
RESET#
0.1uF
0.1uF
VCC
RXDPRG
0
0
R63
R65
PDATOUT
PDATOUT
R112
R112
1
234
TXDPRG
0
NOT MOUNT
R69
VCC
VHCOM
PCLK
VHCOM
LCDCS#
PCLK
R17
R17
KR7
KR6
KR5
CPURESET#
C3
330
330
IC2
IC2
1
NOT MOUNT
R15
R15
SDWP#
PHUPS
LCDCS#
SDWP#
HUS#
10K
10K
KR4
KR3
2SC1815Q12SC1815
Q1
2
3
2
RPES#
RPES#
JPES#
R700R70
R86
R86
KR2
KR1
C4
R841KR84
D1
1uFC31uF
KIA7045AF
+
+
10K
10K
JPES#
KR0
0.1uFC40.1uF
1K
BZ1
BZ1
B
2
1K
R851KR85
USBRESET#
R710R71
0
USBRESET
BUZZER
0
DR
DR
1
PIEZO BZ
D2
C10
C10
VCC
POFF#
POFF#
330
330
1SS355D11SS355
D
D
D
D
10K
10K
R25
R25
R90
10K
VCC
1/5
12345678
12345678
12345678
12345678
USE
NONE
NONE
XE-A41S
R24
R25
R90
MODEL
VCC
VCC VCC
R20
VCC
RP6
1 2 3 4
VCC
RP5
10K
1 2 3 4
VCC
VDD
C2
C2
+
+
12
C1
45 3 2 1
1 2 3 4
VCC
USE
R93
A[8..19]
A[8..19]
R29
R29
10K
10K
10uF/10V,OS
0.1uFC10.1uF
RP4
10K
RP4
10K
10K
10K
RP3
RP3
AVCC
VDD
10K
10K
10K
RP8
10K
RP8
10K
1 2 3 45
RP7
10K
RP7
10K
1 2 3 4
KS0
KS1
KS2
KS3
KS0
KS1
KS2
KS3
8 7 6
5
8 7 6 5
6 7 8
8 7 6 5
A7A3A2A6A1
A[0..7]
A[0..7]
C20
C20
FB1
FB1
EFCB322513TS
EFCB322513TS
C18
C18
R93
MODEL1
VCC
VDD
VCC
8 7 6
8 7 6 5
MODR
MODR
A5
0.1uF
0.1uF
FB2
FB2
0.1uF
0.1uF
R24
R24
MODEL2
A8
A11
A10
A9
A4
EFCB322513TS
EFCB322513TS
10K
10K
CS3#
CS2#
CS1#
CS0#
WR#
CS3#
CS0#
CS1#
CS2#
R34
R34
10K
10K
10K
10K
R33
R33
10K
10K
R28
R28
R32
R32
10K
10K
R31
R31
10K
10K
R30
10K
R30
10K
A13
A17
A18
A19
A15
A12
A14
A16
A0
JDS1
RCS1
JBS1
RBS1
RAS1
JAS1
RDS1
567
6
7
8
2.2K
2.2K
RP14
RP14
3
4
4 5
321
JAS
RAS
RBS
RCS
RDS
JBS
RCS
JAS
RAS
RBS
RDS
JBS
VCC
2.2K
2.2K
RP13
RP13
JCS1
8
2
1
JCS
JDS
JDS
JCS
CPU
VDD
C
C
C
C
RD#
ROMBANK
FRDY
RAMBANK
FRDY
ROMBANK
RAMBANK
10K
10K
10K
10K
VSS
RP1
RP1
RP2
RP2
D[0..7]
D[0..7]
10K
10K
P12_4 P12_3 P12_2 P12_1 P12_0
VCC2
64
P12_5
P4_3/A19 P4_2/A18 P4_1/A17 P4_0/A16 A3_7/A15 A3_6/A14 A3_5/A13 A3_4/A12 A3_3/A11 A3_2/A10
A3_1/A9
P1_4/D12 P1_3/D11 P1_2/D10
P1_1/D9
P1_0/D8
103
RP12 33RP12 33
1 2 3 4 5
1 2 3 4 5
WR#
63
62
61
P12_6
P12_7
P4_7/CS3# P4_6/CS2# P4_5/CS1# P4_4/CS0#
P3_0/A8(/-/D7)
P0_6/AN0_6/D6
P0_7/AN0_7/D7
106
105
104
567
321
4
D5
D6
R26
R27
TP1
65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102
IC1
IC1
8 7 6
8 7 6
SHORT PIN & SOCKET
SP1
VDD
47K
KBR8
KBR9
R6100
R60
0
0
RD#
KR8
KR9
59
60
56
58
57
P13_1
P13_0
P5_2/RD#
P5_3/BCLK
P5_0/WRL#/WR#
P5_1/WRH#/BHE#
P2_7/AN2_7/A7(D7/D6) P2_6/AN2_6/A6(D6/D5) P2_5/AN2_5/A5(D5/D4) P2_4/AN2_4/A4(D4/D3) P2_3/AN2_3/A3(D3/D2) P2_2/AN2_2/A2(D2/D1) P2_1/AN2_1/A1(D1/D0)
P2_0/AN2_0/A0(/D0/-) P1_7/D15/INT5# P1_6/D14/INT4# P1_5/D13/INT3#
P0_0/AN0_0/D0
P0_5/AN0_5/D5
P0_1/AN0_1/D1
P0_2/AN0_2/D2
P0_3/AN0_3/D3
P0_4/AN0_4/D4
109
108
111
110
107
8
8
6
7
3
214 5
D4
D2D7D0D1D3
2
1 3
R66
VCC
KBR10
KBR11
R6200
R64
NOT MOUNT
0
0
KR10
KR11
52
53
51
54
55
P13_3
P13_2
P5_6//ALE
P5_4/HLDA#
P5_5/HOLD#
M30623MEP-A93GP
M30623MEP-A93GP
P11_6
P11_7
P11_5
P11_4
P11_3
114
115
116
113
112
33
RP1133RP11
SDCD#
STRB4#
STRB3#
STRB2#
STRB1#
NOT MOUNT
R189
VCC
47K
PDATIN
RJR
LCDE
RTS#
BLON1
BLON0
BLON1
RJR
BLON0
PDATIN
RTS#
LCDE
45
44
46
50
48
47
49
P13_4
P13_7
P13_5
P13_6
P6_0/CTS0#/RTS0#
P5_7/RDY#/CLKOUT
P11_2
P11_0
P11_1
P10_7/AN7/K13#
P10_6/AN6/K12#
P10_5/AN5/K11#
120
122
123
117
119
118
121
LATCH#
MODEL2
LCDRS
LCDRW
LCDRS
SDCS#
LCDRW
SDPOWER#
LCDON
10K
10K
1 2 3 45
LATCH#
47K
RXD
TXD
R68
RXD
TXD
42
43
P6_1/CLK0
P6_3/TXD0/SDA0
P6_2/RXD0/SCL0
P10_4/AN4/K10#
P10_2/AN2
P10_3/AN3
124
125
VPTEST
MODEL1
VPTEST
R67
R67
RP9
RP9
10K
10K
VCC
CHAPTER 6. CIRCUIT DIAGRAM AND PWB LAYOUT
D
D
D
D
C
C
C
C
XE-A41S CIRCUIT DIAGRAM AND PWB LAYOUT
15 –
Page 19
PC-UM10M
12345678
12345678
12345678
12345678
VDD
2/5
VCC
NOT MOUNT
A0
A17
46
48
45
47
A16
VSS
/BYTE
DQ15/A-1
A12
A14
A15
A13
1
3
2
4
A15
A16
A14
A13
C26
C26
+
+
12
VDD
C17
C17
10uF/50V
10uF/50V
MEMORY & KIF
D7
44
5
A12
0.1uF
0.1uF
R590R59
R580R58
43
DQ7
DQ14
A11
A10
6
A11
VCC
A[0..19]
A[0..19]
D
D
D
D
0
0
D6
D5
41
42
40
DQ5
DQ6
DQ13
A97A88NC9NC
A9
A10
NOT MOUNT
R21
IC4
IC4
D
D
D
D
39
10
32
1
A19
DQ12
VCC
A17
D4
38
DQ4
/WE11/RESET12NC
WR#
A15
A1531A18
A162A14
A16
A14
R72 0R72 0
A17
A17
A18
1
36
37
VCC
13
VCC
10K
WR#
30
29
3
A12
0
R970R97
A16
C19
+
+
C9
D3
34
35
DQ3
DQ10
DQ11
RY/BY15NC16A17
NC
14
FRDY
FRDY
WR#
A13
A8
28
27
A8
A13
/WE
A6
A124A7
5
6
A7
A6
NOT MOUNT
A15
A14
0.1uF
2
10uF/50V
D2
D0
D1
29
32
31
33
DQ1
DQ9
DQ830DQ0
DQ2
A718A619A5
20
17
A6
A7
A8
ROMA18
RD#
A11
A10
A9
RD#
RAMCS#D7D6
23
24
26
25
22
A9
/OE
A11
A10
A48A3
A5
A2
7
9
11
10
A4
A5A2A1D0A0
A3
0
R73 0R73 0
R980R98
RAMA18
A9
A11
A10
A13
A12
RD#
28
A5
/CE
A1
12
A8
A1
25
27
26
A0
/CE
/OE
VSS
A223A1
A421A3
22
24
IC5
A3
A2
A4
FROM SPANSION MBM29F400TC/400BC-70 M19
D5
D3
D4
19
17
I/O418I/O3
I/O721I/O620I/O5
I/O1
GND
A0
I/O2
13
D[0..7]
A7
I/O0
14
D1
D[0..7]
A6
VDD VDD
15
16
SRAM 4M CY62148ELL-45ZSXI TSOPII
D2
VDD
C21
0.1uF
C21
0.1uF
D5
D6
D0
D3
D7
D1
D2
D4
A1
A0
A5
A3
A4
A2
VDD
14
14
VDD
VCC
IC25B
C
C
C
C
14
R13
IC24B
74LV04A
147
8
IC23C
9
6
4
5
A19
CS0#
CS0#
14
VDD
C
C
C
C
10K
VDD
IC25C
10
IC23A
IC23A
9
3 4
A19
7
1
CNVSS
CNVSS
ROMCS#
8
SN74LV32A
7
10
VCC
11
147
IC25D
IC25D
12
13
VDD
C22
C22
SN74LV08A
7
CS2#
SN74LV32A
SN74LV32A
VDD
3
7
2
SN74LV08A
A18
VCC
CS2#
IC24A
C23
C23
0.1uF
0.1uF
14
14
0.1uF
0.1uF
SN74LV32A
SN74LV32A
ROMA18
3
IC25A
1
VDD
74LV04A
2
1
CS0#
CS0#
SN74LV32A
7
2
147
IC23B
4
7
6
5
ROMBANK
VCC
VLED
147
VDD
SN74LV08A
10K
R14
IC23D
RAMA18
11
12
13
CS2#
RAMBANK
CN2
CN2
0.1uF
C24
VCC
SN74LV08A
VCC
VCC
B
B
B
B
34
VCC
VCC
B
B
B
B
313233
b
a
14
IC24F
14
IC24D
147
R12
13
12
IC24C
IC6
10K
A
A
A
A
21
21
21
21
FOR POP UP & KEY I/F
8
RESET#
RESET#
R124
IC24E
161718
KBR0
KBR1
KBR[0..7]
0
0
11
10
RJR
74HCT273
74HCT273
KBR2
KBR0
0
0
R102
KR0
D3
12
131415
KBR3
0
0
R103
74LV04A
POFF#
2
1
KBR4
KBR1
KR1
KBR5
KBR6
KBR2
0
0
R104
KR2
RESET#
1SS355
D4
1 2
234
567
VON#
KBR8
VON#
KBR3
R105 00
KR3
VCC
VCC
1SS355
KBR9
KBR8
KBR4
R106 00
KR4
VCC
KBR10
KBR9
KBR11
KBR10
KBR11
KBR5
0
0
R107
KR5
A
A
A
A
1
1.25-2-34P
R117
10K
R116
10K
R115
10K
R114
10K
KBR7
KBR6
0
0
R109 00
R108
KR6
KR7
VCC
C97
C97
R11
10K
3
14
IC26A
1
2
WR#
WR#
6
14
IC26B
4
5
CS3#
A0
NOT MOUNT
KR[0..7]
KR[0..7]
0.1uF
0.1uF
C8
100pF
SN74LV32A
7
SN74LV32A
7
CS3#
3
3
3
3
4
4
4
4
5
5
5
5
6
6
6
6
7
7
7
7
8
8
8
8
91011
KBR7
20
21
222324252627282930
19
KS0
KS2
KS3
KS1
g
f
dpce
d
7
KS3
KS2
KS0
KS1
74LV04A
0
0
R125
98
7
74LV04A
56
147
VCC
74LV04A
74LV04A
MODR
C25
0.1uF
C25
0.1uF
dp
D4D7eD5gfD6
17
20
VCC
MR#1Q0
19
2
a
12
16
11
13
18
14
D7
D4
D6
D5
Q7
Q515Q6
Q4
CP
D0
Q15Q2
GND10D3
D1
D27Q3
4
9
6
8
3
D3
D0
D2
D1
dcb
XE-A41S CIRCUIT DIAGRAM AND PWB LAYOUT
16 –
Page 20
PC-UM10M
3/5
12345678
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SD & USB
C51
C51
1uF
1uF
VCC
C41
1uF/50V
+
+
D:2,3,4,5pin
S:1pin
12
5
4
6
HAT1089C
213
Q2
VCC3
<<SD CARD>>
VCC
C35
10uF/50V
+
+
2
1
C27
0.1uF
A6
A5
A[0..19]
A[0..19]
D6
D7
D5D4D0D4D2
D[0..7]
D[0..7]
D
D
D
D
14Pin : VCC3
VCC3
20
VCC
IC8
IC8
QE
1
LCDCS#
A4
D3
R138
R138
R137
R137
R136
R136
R135
R135
R134
R134
R4
R5
R131
51
R130
10K
R6
7Pin : GND
SDPOWER#
DB6
D6
D7
DB7DB0
17
19
18
D7
D6
Q7
D1
Q02D0
3
4
D0D1D2
DB1
A0A6A3
A2
A1
D1
CN4
CN4
100K
100K
100K
100K
100K
100K
100K
100K
100K
100K
10KR410K
10KR510K
100K
IC12A
SDPOWER#
1 14
D5
DB5
16
Q515Q6
Q2
Q1
5
6
DB2
1
SD_CS
2 3
SDCS#
D4
13
D514D4
D27Q39GND10D3
8
D3
CS
DI
2
SD_TXD
DB4
12
Q4
DB3
VCC
VSS
3
C46
11
LE
VCC
VDD4SCLK5VSS2
6
SD_CLK
10pF
74LV125
7
74HCT374
74HCT374
R9
147
DO
7
8
SD_RXD
DB[0..7]
10KR910K
IC26C
IC26C
9
WR#
RSV
VCC3
WR#
9
C47
8
CD
RSV
10
SD_CD#
33
33
R139
SDCD#
10pF
10
CS3#
CS3#
C33
C33
GND
SW
WP
13
11
12
SD_WP#
33
33
R140
SDWP#
IC12B
4 14
SDPOWER#
VCC
12
100pF
100pF
VCC
SN74LV32A
SN74LV32A
VCC3
ALPS SCDA2A0300
ALPS SCDA2A0300
VCC
7Pin : GND
14Pin : VCC
VCC
C49
C49
0.1uF
0.1uF
VCC
C45
7
5 6
SDTXD
C36
C36
10uF/50V
10uF/50V
+
+
IC10
IC10
C28
C28
0.1uF
0.1uF
R7
10KR710K
14
VCC
IC26D
12
RD#
RD#
C53
C53
VCC3
3
147
4
IC13B
IC13B
1
147
2
IC13A
IC13A
R570R57
0
SDRXD
10pF
74LV125
D0
D1
20
19
Y118Y217Y415Y3
VCC
OE2#
OE1#
A2
A1
A34A4
1
2
3
DB1
DB0
DB2
C37
100pF
11
SN74LV32A
7
13
CS3#
CS3#
C
C
C
C
IC12D
IC12D
13 14
VCC3
D2
16
5
DB3
0.1uF
0.1uF
74HCT04
74HCT04
74HCT04
74HCT04
C57
C57
SDPOWER#
D3
D4
14
Y5
A5
A6
7
6
DB5
DB4
12 11
100pF
100pF
D5
13
8
DB6
Y6
IC12C
IC12C
10 14
D6
Y712Y8
A8
9
DB7
D7
11
GND10A7
74LV125
74LV125
7
VCC
9 8
SDCLK
74LV541A
74LV541A
74LV125
VLED
WP
#12
#7
#11 C OMMON
#8
SD Card Pin Layout
74HCT04
74HCT04
IC13C
IC13C
14
7
BA00ASFP
3
IC7
5 6
4
2
7
1
2
K
LCDON
VCC
12
R118
5.6KF
5
1
BLON0
14
34567
GND
C29
C29
22uF/10V,OS
22uF/10V,OS
+
+
6
C30
0.33uF
R10
IC13D
IC13D
LCD5V
1
10K
RS
R1260R126
0
8
9
RW
R1270R127
0
LCDRS
LCDRW
+
+
C31
C31
R120
#6
8
E
R1280R128
0
LCDE
2.4KF
VLED
#5
74HCT04
74HCT04
7
9
10
DB0
DB1
2
22uF/16V
22uF/16V
BA00ASFP
3
IC9
#3
#4
IC13E
IC13E
147
131415
11
12
DB2
DB5
DB4
DB3
C39
100pF
C40
100pF
C38
100pF
1
R122
4
2
B
B
B
B
#2
11 10
16
DB7
DB6
NOT MOUNT
+
+
C32
C32
2.4KF
R123
5.6KF
5
6
1
C34
R8
BLON1
#1
#9
74HCT04
74HCT04
147
LCD I/F
TJC3-16A
CN3
DB[0..7]
2
22uF/10V,OS
0.33uF
10K
IC13F
IC13F
GND
CD
#10
#13
74HCT04
74HCT04
12
13
VCC
VCC3
C52
C52
<<USB>>
FB32
FB32
USBRESET#
CS1#
DREQUSB#
CS1#
RST#
DREQUSB#
47
46
45
48
CS#
RST#
Dreq0#
Dack0#
CoreVcc1GND2D-3D+
4
0.1uF
0.1uF
27
R141 27
R142
2
BLM21PG221SN1D
BLM21PG221SN1D
1
L1
L1
1
234
CN5
CN5
5
678
EFCB322513TS
EFCB322513TS
RD#
WR#
INTUSB#
INTUSB#
WR#
RD#
43
42
44
41
RD#
INT0#
LWR#
HWR#/BYTE#
TEST7TrON6Dack1#8Dreq1#9TC1#
Vbus
5
0
0
1.5K
R143
R129
C56
2
2
L2
L2
3
4
DLP31SN121SL2
UBR20-4W2C00
ANALOG GND
A0
38
37
D15/A040D14/P639D13/P5
INT1#/SOF#
10
11
12
R145
3
1
X4
X4
1uF
D6
D5
C55
22pF
22pF
C54
L4
L4
VCC
VCC
R3 10kR3 10k
36
35
33
34
31
GND
IOVcc
D9/P132D8/P0
D10/P2
D12/P4
D11/P3
IOVcc
A1
Xout13Xin
CoreVcc
GND
17
14
18
16
15
1M
CSTCW24M0X11-R0
2
A1
A2
A0
1
UDZS 6.2B
UDZS 6.2B
1
UDZS 6.2B
UDZS 6.2B
BLM21PG221SN1D
A
A
A
A
C50
C50
C42
C42
+
+
1
D2
D6
D5
D7
D3
29
28
D730D6
A521A622D0
A2
A4
A3
20
19
23
A3
A5
A4
VCC3
BA033F
IC11
5V --> 3.3V
VCC
0.1uF
0.1uF
10uF/50V
10uF/50V
D1
D225D326D427D5
D1
24
6
4
2
FB31
1
D0
A[0..6]
C44
C48
+
+
21
21
21
21
3
3
3
3
D[0..7]
4
4
4
4
M66291GP
5
5
5
5
IC14
IC14
ANALOG GND
6
6
6
6
EFCB322513TS
0.1uF
7
7
7
7
22uF/10V OS
2
8
C43
0.47uF
8
8
8
8
B
B
B
D
D
D
D
C
C
C
C
B
A
A
A
A
XE-A41S CIRCUIT DIAGRAM AND PWB LAYOUT
17 –
Page 21
PC-UM10M
B
B
B
D
D
D
D
C
C
C
C
B
A
A
A
A
4/5
1234567
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1234567
1234567
R77
10K
R76
10K
R1
10K
VCC
VREF
2
IC15
IC15
KIA431F
KIA431F
1
3
R156
240
R156
240
VCC
PDATOUT
PDATOUT
VCC
IC17A
24V
PDATIN
PDATIN
R157
4.7K
BA10393F
PCLK
330pF
C72
C71
330pF
C70
330pF
PCLK
NOT MOUNT
123
CN6
22-04-1031
TO DRAWER SOLENOID
NOT MOUNT
2SD2212
E
B
470
470
1SS355
D14
D14
2
10uF/50V
TP2TP2
1
FB5FB5
1SR154-400
D11
1
C
C61
0.1uF
NOT MOUNT
C62
T500mA/250V SEMKO
R153
Q5
+
+
1 2
DR
VCC
R159
IC17B
RPES#
4.7K
BA10393F
7
+
-
+
-
6
2
C64
330pF
4 8
5
C77
1000pF
C68
R160
0.1uF
100K
FB33
<<DRAWER>>
EFCB322513TS
FB4
NOT MOUNT
24V
F2
JPES#
C65
330pF
1
+
-
+
4 8
2
3
C66
0.1uF
100K
R158
1
1
1
1
2
2
2
2
3
3
3
3
4
4
4
4
HTEMP
0.1uF
C67
4.7KF
C63
100pF
EFCB322513TS
VH
24V
VCC
40
CN7
IC16
FB7
36
37
3838393940
37
R155
R154
18KF
VCC
FB6
8
8
8
8
<<PRINTER>>
PRINTER DRIVING
JAS
JBS
JCS
6
2
4
STA471A
357
FB11
FB9
FB8
EFCB322513TS
34
32
35
35
36
333334
FB10
C58
12
R2
2200uF/35V
3
Q3
Q3
1
10KR210K
R149
5.6K
R149
5.6K
D
1K
R148
D8
D7
D7
VH
2SK2731Q42SK2731
Q4
1 2
1
2
4 2
NTD2955T
G
1SS355
1SS355
VHCOM
S
R151
D9
D9
C59
1
2
STRB1#
FB3
EFCB322513TS
F1
T1.6A/250V
15K
22uF/16V
1SS355
D10
D10
STRB2#
12
1
2
R152
C60
10uF/50V
1SS355
20K
765
765
765
765
12
12
D12
D12
D13
D13
1SS355
1SS355
1SS355
1SS355
STRB4#
STRB3#
8
8
8
8
JDS
8
9
30
313132
FB15
EFCB322513TS
1
10
CIM31J601NE
PDATOUT
FB13 CIM31J601NE
FB12
STRB3#
STRB4#
PDATIN
FB14 CIM31J601NE
24
29
25
28
27
29
28
30
19
18
20
19
21212222232324
262627
20
25
CIM31J601NE
FB18 CIM31J601NE
FB16
FB17 CIM31J601NE
PCLK
LATCH#DRSTRB2#
STRB1#
14
131314
15151616171718
12
12
FB19
11
10
11
EFCB322513TS
EFCB322513TS
EFCB322513TS
FB20
8
9
9
10
RAS
246
3
66778
RDS
RBS
RCS
IC18
IC18
8
STA471A
STA471A
1
10
579
FB22FB22
FB23FB23
FB24FB24
FB21FB21
VCC
1
5
1
2233445
T_PRINT CN(40Pin)00 6229 640 003 800
VCC
D15
1SS355
16KF
R164
R1661KR166
1 2
1K
VPTEST
PHUPS
R1671KR167
FB25
R165
C73
1000pF
1K
EFCB322513TS
3.6KF
24V
VCC
<<PRINTER SAFTY>>
B
B
B
D
D
D
D
C
C
C
C
B
A
A
A
A
XE-A41S CIRCUIT DIAGRAM AND PWB LAYOUT
18 –
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PC-UM10M
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B
B
B
D
D
D
D
24V
2200uF/50V
2200uF/50V
C76
C76
+
+
12
R169
22KF
R169
22KF
R171
1.2KF
R171
1.2KF
L5
180uHL5180uH
D17
D17
RB160L-60
RB160L-60
1 2
NOT MOUNT
R172
R172
with FUSE
R168
10(FUSE R)
R168
10(FUSE R)
KTD998Q6KTD998
32
1
Q6
LM2574HVN-ADJ
LM2574HVN-ADJ
1
3 2 4
IC19
IC19
5 7
1SR159-200
TP3TP3
F4
T2.0A/250VF4T2.0A/250V
1
BD1
BD1
4
-+
-+
3
1SR159-200
D16
D16
12
2
+
+
12
C75
C75
KPBC102
KPBC102
12
4700uF/50V
4700uF/50V
C69
C69
+
+
C
C
C
C
ANALOG GND
(5.6K)
(5.6K)
H: OFF
L: ON
6, 8 pin: N.C
R173
R173
0.1uF
0.1uF
18K
18K
R170
R170
C78
C78
100uF/50V
100uF/50V
ZD1
ZD1
UDZS5.1B
UDZS5.1B
ANALOG GNDANALOG GND
1 2
18K
18K
33
R17433R174
+
+
12
C79
C79
220uF/50V
220uF/50V
VON#
B
R183
R183
12
C86
C86
NOT MOUNT
1 2
D18
D18
VDD
POFF#
7
84
+
+
5
1
56K
56K
8
+
+
3
R182
10KF
R182
10KF
+
+
(1uF/50V)
(1uF/50V)
R176
R176
1 2
D19
D19
1SR159-200
1SR159-200
1SR159-200
1SR159-200
C80
C80
+
+
12
-
-
6
-
-
2
180
180
C84
C84
12
12
3KF
3KF
R175
R175
ZD2
ZD2
1000uF
1000uF
C85
C85
1000pF
1000pF
IC21B
IC21B
BA10393F
BA10393F
4
IC21A
IC21A
BA10393F
BA10393F
R184
R184
6.2KF
6.2KF
CN9
CN9
TP6TP6
C87
C87
R178
R178
150
150
/16V
/16V
+
+
47uF
47uF
C83
C83
/16V
/16V
+
+
330uF
330uF
1KF
1KF
R177
R177
PTZ6 .2 B
PTZ6 .2 B
1 2
/16V
/16V
ANALOG GND
FB30
FB30
EFCB322513TS
EFCB322513TS
R181
2.7K
R181
VCC VLED
24V
2.7K
R180
R180
9.1KF
9.1KF
3.9K
3.9K
R179
R179
VCC +5V
VCC
TP5TP5
VLED +5.8V
TP4TP4
A
ANALOG GND
21
21
21
P-OFF
ZD3
UDZS5.1B
ZD3
UDZS5.1B
ANALOG GND
1 2
1
2
TJC3-2 A(BL UE)
TJC3-2 A(BL UE)
FROM BATTERY
0.1uF
0.1uF
ANALOG GND
21
3
3
3
3
C74
C74
MYLOR
0.033uF
MYLOR
F3
F3
UL,CSA T3.15A/125V
UL,CSA T3.15A/125V
0.033uF
WITH HOLDER
WITH HOLDER
1
2
CN8
CN8
VH-2 A
VH-2 A
FROM TRANSFO RM ER
for USA
POW ER TRANS 120V
+20% INPUT & NO LO A D : VO UT<=40V
L6
180uHL6180uH
IPEAK>2.2A
2
PQ1CG2032FZ
PQ1CG2032FZ
4
HEAT SINK
1
IC20
IC20
F5
T1.0A/250VF5T1.0A/250V
D20
D20
RB060L40
RB060L40
1 2
5
C82
C82
0.01uF
0.01uF
3
+
+
12
C81
C81
220uF/50V
220uF/50V
87654
87654
87654
87654
POWER SUPPLY
24V VLED
B
B
B
D
D
D
D
C
C
C
C
B
XE-A41S CIRCUIT DIAGRAM AND PWB LAYOUT
19 –
A A
A A
A A
A
Page 23
PC-UM10M
B
B
B
D
D
D
D
1/1
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12345678
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C
C
C
C
B
A
21
21
21
21
3
3
3
3
87654
87654
87654
87654
KEY IF
B
B
B
D
D
D
D
C
C
C
C
XE-A41S CIRCUIT DIAGRAM AND PWB LAYOUT
20 –
B
A A
A A
A A
A
Page 24
PC-UM10M
1/1
12345678
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12345678
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B
B
B
D
D
D
D
C
C
C
C
B
A
21
21
21
21
3
3
3
3
87654
87654
87654
87654
POP UP
B
B
B
D
D
D
D
C
C
C
C
XE-A41S CIRCUIT DIAGRAM AND PWB LAYOUT
21 –
B
A A
A A
A A
A
Page 25
PWB LAYOUT
1. MAIN PWB LAYOUT
A. side
PC-UM10M
XE-A41S CIRCUIT DIAGRAM AND PWB LAYOUT
22 –
Page 26
PC-UM10M
B. side
XE-A41S CIRCUIT DIAGRAM AND PWB LAYOUT
23 –
Page 27
COPYRIGHT
No part of this publication may be reproduced,
electronic, mechanical, photocopying, recording, or otherwise,
without prior written permission of the publisher.
2006 BY SHARP CORPORATION
All rights reserved.
Printed in Japan.
stored in a retrieval system, or transmitted.
In any form or by any means,
SHARP CORPORATION
Information and Communication Systems Group
Quality Assurance Department Yamatokoriyama, Nara 639-1186, Japan
2006 October Printed in Japan t
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