System module DS98–2
Introduction8–2
Technical section8–2
External and internal connectors8–2
Internal signals between RF and ASIC8–5
Internal signals between RF and RFI8–6
Baseband block8–7
Interconnection diagram8–7
Technical specifications8–7
Functional descriptions8–8
Names of functional blocks8–10
RF block8–26
Functional description8–26
Block diagram of baseband8–29
Block diagram of RF8–30
Power distribution diagram8–31
Connections between system and RF blocks8–32
Parts list of DS98–33
8–1
Copyright Nokia Mobile Phones
Circuit Diagram of DS9; System BlocksA3/8–1
Circuit Diagram of DS9; CPU and Memories (Version 4.5 edit 65) A3/8–2
Circuit Diagram of DS9; Power Supply IC & Battery Charg. Unit A3/8–3
Circuit Diagram of DS9; Audio Codec ICA3/8–4
Circuit Diagram of DS9; DSP, Clock Generator & MemoriesA3/8–5
Circuit Diagram of DS9; ASIC IC (Version 4.5 edit 68)A3/8–6
Circuit Diagram of DS9; RFI IC (Version 4.5 edit 40)A3/8–7
Circuit Diagram of DS9; RF ReceiverA3/8–8
Circuit Diagram of DS9; RF Receiver (Version 4.3 edit 52)A3/8–9
Circuit Diagram of DS9; RF TransmitterA3/8–10
Circuit Diagram of DS9; RF Transmitter (Version 4.3 edit 94)A3/8–11
Layout Diagrams of DS9 Side 1A3/8–12
Layout Diagrams of DS9 Side 2A3/8–13
Layout Diagrams of DS9 Side 1 (Version 13)A3/8–14
Layout Diagrams of DS9 Side 2 (Version 13)A3/8–15
SYSTEM MODULE DS9
NHK–1
System module DS9
Related documentation
Introduction
DS9 is the baseband/RF module NHK–1 cellular tranceiver. The DS9 module
carries out all the system and RF functions of the tranceiver. System module
DS9 is designed for a handportable phone, that operate in PCN system.
Technical section
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Copyright Nokia Mobile Phones
All functional blocks of the system module are mounted on a single multi layer
printed circuit board. The chassis of the radio unit contains separating walls for
baseband and RF. All components of the baseband are surface mountable. The
connections to accessories are fed through the bottom connector of the radio
unit. The connections to user interface –module (UIF) are fed through a flex
connector. There is no physical connector between RF and baseband.
External and internal connectors
The system module has two connector, external bottom connector and internal
UIF module connector.
SYSTEM MODULE DS9
NHK–1
Bottom connector X100
Antenna
connector
2
1
16
System connector
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4
Battery connector
3
2
1
4
Charging connector
X100
9
18
3
30
12
X196
UIF module connector
Copyright Nokia Mobile Phones
1
D0000323
8–3
System connector
Pin:Name:Description:
1, 9GNDDigital ground
2MIC/JCONNExternal audio input from accessories or
3AGNDAnalog ground for accessories.
4TDATransmitted DBUS data to the accessories.
5M2BUSSerial bidirectional data and control between
6HOOK/RXD2HOOK indication. The phone has a 100 kΩ
7PHFS/TXD2Handsfree device power on/off, data to flash
8, 16VCHARBattery charging voltage.
10EAR/HFPWRExternal audio output to accessories or
handsfree microphone. Multiplexed with
junction box connection control signal.
the handportable and accessories.
pull–up resistor.
programming device.
handsfree speaker.
11DSYNCDBUS data bit sync clock
12RDADBUS received data from the accessories
13NCNo connection
14VFProgramming voltage for FLASH.
15DCLKDBUS data clock
SYSTEM MODULE DS9
NHK–1
Battery connector
Pin:Name:Description:
1GNDGround
2TBATBattery temperature
3BTYPEBattery type
4VBATTBattery voltage
Charging connector
Pin:Name:Description:
1VCHARBattery charging voltage
2GNDGround
3VCHARBattery charging voltage
4GNDGround
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Antenna connector
Pin:Name:Description:
1RF EXTExternal antenna signal
2GNDGround
UIF module connector X196
Pin:Name:Description:
1VL1Logic supply voltage 4.65 V
2, 29GNDGround
3, 30VBATTBattery voltage
4BACKLIGHTBacklights on/off
5 – 11UIF(0;6)Lines for keyboard read and LCD controller
12MIC ENAMicrophone bias enable
13 – 16COL(0;3)Lines for keyboar read
17CALL LEDCall LED enable
18MICPMicrophone (positive node)
19MICNMicrophone (negative node)
20EARPEarpiece (negative node)
21EARNEarpiece (positive node)
22BUZZERPWM signal buzzer control
SYSTEM MODULE DS9
NHK–1
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23XPWRONPower key (active low)
24VA1Analog supply voltage 4.65 V
25SIMCLKClock for SIM data
26SIMRESETReset for SIM
27VSIMSIM voltage supply voltage
28SIMDATASerial data for SIM
Internal signals between RF and ASIC
Symbol:Description:Values:
SCLKSynthesizer clock
• load impedance:
• frequency:
SDATASynthesizer data
• load impedance:
• data rate frequency:
8–5
Copyright Nokia Mobile Phones
10 k
Ω
3.25 MHz
10 k
Ω
3.25 MHz
SENARRX synthesizer enable
• VHF PLL contr. disabled:
• VHF PLL activated:
• current:
SENATTX synthesizer enable
• UHF PLL contr. disabled:
• UHF PLL activated:
• current:
RXPWRRX supply voltage on/off
• RX supply voltage on:
• RX supply voltage off:
• current:
SYNTHPWRSupply voltage on/off
• RF regulators on:
• RF regulators off:
• current:
TXPWRTX supply voltage on/off
• TX supply voltage on:
• TX supply volatge off:
• current:
4.5...4.65...4.8 V
0...0.2...0.7 V
50 µA
4.5...4.65...4.8 V
0...0.2...0.7 V
50 µA
4.5...4.65...4.8 V
0...0.2...0.7 V
0.5 mA
4.5...4.65...4.8 V
0...0.2...0.7 V
1.0 mA
4.5...4.65..4.8 V
0...0.2...0.7 V
0.5 mA
TXPTX enable
• transmitter power enable:
• transmitter power disable:
CLKIN26 MHz clock to ASIC
4.5...4.65...4.8 V
0...0.2...0.7 V
SYSTEM MODULE DS9
NHK–1
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Internal signals between RF and RFI
Symbol:Description:Values:
AFCAutomatic frequency control voltage
• voltage min/max:
• resolution:
• load impedance (dynamic):
TXCTX transmit power control voltage
• voltage range min/max:
• impedance:
TXQP,TXQNDifferential TX quadrature signal
• differential voltage swing:
• d.c. level:
• load impedance:
TXIP,TXINDifferential TX inphase signal
• differential voltage swing:
• d.c. level:
• load impedance:
8–6
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0.35...4.35 V
11 bits
10 k
Ω
0.3...4.2 V
10 k
Ω
1.15...1.2...1.25 V
PP
2.30...2.35...2.40 V
30 k
Ω
1.15...1.2...1.25 V
PP
2.30...2.35...2.40 V
30 k
Ω
PDATA0Parallel AGC data
• reduced front end gain:
• normal front end gain:
• current:
PDATA1Parallel AGC data
• AGC 3 dB reduction:
• normal front end gain:
• current:
PDATA2Parallel AGC data
• AGC 6 dB reduction:
• normal front end gain:
• current:
PDATA3Parallel AGC data
• AGC 12 dB reduction:
• normal front end gain:
• current:
PDATA4Parallel AGC data
• AGC 24 dB reduction:
• normal front end gain:
• current:
4.5...4.65...4.8 V
0...0.2...0.7 V
0.1 mA
4.5...4.65...4.8 V
0...0.2...0.7 V
10 µA
4.5...4.65...4.8 V
0...0.2...0.7 V
10 µA
4.5...4.65...4.8 V
0...0.2...0.7 V
10 µA
4.5...4.65...4.8 V
0...0.2...0.7 V
10 µA
PDATA5Parallel AGC data
• AGC 12 dB reduction:
• normal front end gain:
• current:
4.5...4.65...4.8 V
0...0.2...0.7 V
10 µA
SYSTEM MODULE DS9
NHK–1
RXQRX quadrature signal
RXIRX inphase signal
Baseband block
The purpose of the baseband module is to control the phone and process audio
signals to and from RF. The module also controls the user interface.
Interconnection diagram
Technical specifications
There are three different operation modes:
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• output level:
• source impedance:
• output level:
• source impedance:
8–7
Copyright Nokia Mobile Phones
25 mV
470
25 mV
470
PP
Ω
PP
Ω
– Active mode
– Idle mode
– Power off mode
In the active state all the circuits are supplied with power and part of the mod-
ule might be in idle state.
The module is usually in the idle mode when there is no call. In the idle mode
circuits are reset, powered down and clocks are stopped or the frequency reduced.
In power off mode only the circuits needed for power up are supplied with
power.
SYSTEM MODULE DS9
NHK–1
Functional descriptions
Clocking sceme
DSP Clock
60.2 MHz
differential sine
ear
AUDIO
CODEC
wave
mouth
oscillator
DSP
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RFI Clock 13 MHz
Sleep Mode: 135.4kHz
enable
RFI
ASIC
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RF System Clock
26 MHz
VCTCXO
SIMCLKSIMCLK
Codec Sync Clock
8 kHz
DBUSCLK 512kHz
DBUSSYNC 8kHz
All of the clock outputs can be disabled/enabled. DSP uses differential sinusoidal clock. DSP–clock buffer can be enabled/disabled.
Codec Main Clock and
data Transfer clock
512kHz
3.25 / 1.625
MHz
MCU Clock
26 MHz
MCU
SYSTEM MODULE DS9
NHK–1
Reset and power control
reset in
DSP
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RFI
Reset Out
Reset Out
ASIC
Vcc
Reset in
resetreg
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SIMReset
PSL+
VL1
XRESreset in
XPWRON
XPwrOff
approx 2Hz
The supply power is switched on by PWR key on keyboard. All devices are
powered up at the same time by PSL+.
PSL+ supplies the reset to ASIC at power up. ASIC starts the clocks to DSP
and MCU. After some time ASIC releases the resets to all circuitry. Power up
reset resets MCU and RFI. DSP has own, independent reset from the asic.
For powering of the phone, the user pushes PWR–key. MCU detects that it is
pushed. After that the MCU cuts the eventual ongoing call, exits all tasks, acts
dead to the user and leaves PSL+ watchdog without resets. After power–down
delay PSL+ cuts the supply voltage from all the circuitry.
XPWRON
MCU
SYSTEM MODULE DS9
NHK–1
Watchdog system
XPWROFF
PSL
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reset
DSP
1
5
2
POWER
3
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ASIC
4
reset
MCU
Normal operation:
1. MCU tests DSP
2. MCU updates ASIC watchdog timer (> 2Hz)
3. MCU pulses the XPWROFF input on the PSL+ (about 2Hz)
Failed operation:
4. ASIC resets MCU and DSP (after about 0.5 sec failure)
5. PSL+ switches the power off (after 1.5 sec failure)
The control block provides a microcomputer unit (MCU) and it’s environment.
The environment consists of three memory circuits (FLASH, SRAM, EEPROM),
20 bit address bus and 8 bit data bus.
Main Features of the CTRLU block:
MCU functions:
– system control
– communication control
– user interface
– authentication
– RF monitoring
– power up/down control
– accessory monitoring
– batttery monitoring and charging control
– self–test and production testing
– flash loading
Main components of CTRLU
– Hitachi H8/536
H8/536 is a CMOS microcomputer unit (MCU) comprising a CPU
core and on–chip supporting modules with 16 bit architecture. The
data bus to outside world has 8 bits.
– 512 k x 8 bit FLASH memory
– 100 ns maximum read access time.
– contains the main program code for the MCU; part of the DSP
program code locates also in FLASH.
– In teh product two 256 k x 8 bit FLASH memories will be used
ASIC can address also two 4 Mbit or one 8 Mbit memories.
– 32 k x 8 bit SRAM memory
– 100 ns maximum read access time.
– 8 k x 8 bit EEPROM memory
– 150 ns maximum read access time.
– contains user defined information.
SYSTEM MODULE DS9
NHK–1
Input signals of CTRLU
Name(from):Description:
VL1(PWRU)Power supply voltage for CTRLU block
VREF(PWRU)Reference voltage for MCU A/D converter
VBATDET(PWRU)Battery voltage detection
VC(PWRU)Charger voltage monitoring
EROMSELX(ASIC)Chip select for the EEPROM memory
ROMSELX(ASIC)Chip select for the FLASH memory
ROM2SELX(ASIC)Chip select for the 2nd FLASH memory
RAMSELX(ASIC)Chip select for the SRAM memory
RESETX(ASIC)Reset signal for MCU
NMI(ASIC)Non–maskable interrupt request
MCUCLK(ASIC)Main clock for MCU
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IRQX(ASIC)Interrup request
PCMCDO(AUDIO)Audio codec control data receiving
TRF(RF)RF module temperature detection
VF(syst.conn.)Programming voltage for FLASH memory
RXD2_HOOKThe use of handsfree monitoring
(syst.conn.)FLASH programming data input on the production line
TBAT(batt.conn.)Battery temperature detection
BTYPE(batt.conn.)Battery size identification
JCON(syst.conn.)Junction box connection identification
Output signals of CTRLU
Name(to):Description:
XPWROFF(PWRU) Power off control, PSL+ watchdog reset
PWM(PWRU)Charger on/off control
WSTROBEX(ASIC) MCU write strobe
RSTROBEX(ASIC)MCU read strobe
MCUAD(19:0)(ASIC)20 bit MCU address bus
MBUSDET(ASIC)MBUS activity detection
PCMCLK(AUDIO)Clock for audio cedec control data transfer
PCMCDI(AUDIO)Audio codec control data transmitting
XSELPCMC(AUDIO)Chip select for audio codec
SYSTEM MODULE DS9
NHK–1
TXD2_PHFSPower on/off control for HF device, verification output
(syst.connector)of the programmed data of FLASH during programming
CALL_LED(UIF)Call ’coming’ indicator light control
BACKLIGHT(UIF)LCD and display backlight on/off control
BUZZER(UIF)Buzzer signal
Bidirectional signals of CTRLU
Name(to/from):Description:
MCUDA(7;0)(ASIC) MCU’s 8 bit data bus
M2BUSAsyncronous serial data bus
Block description of CTRLU
– MCU – memories
MCU has a 20 bits wide address bus A(19:0) and an 8–bit data bus
with memories. The address bits A(19:16) are used for chip select
decoding. The decoding is done in EDSA–asic.
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On the Hitachi HD647536 internal memory map there is the following:
• 00000 – 0F67F62k bytes internal ROM
• 0F680 – 0FE7F2k bytes internal RAM
• 0FE80 – 0FFFF384 bytes registers
External memory map is the following:
• 10000 – 17FFF32k bytes RAM
• 20000 – 21FFF8k bytes E
• 30000 – 300FF256 bytes ASIC
• 40000 – 7FFFF256k bytes FlashROM
• 80000 – BFFFF256k bytes FlashROM
– CTRLU – PWRU
MCU controls the watchdog timer in PSL+. It sends a positive pulse
at approximately 2 Hz to XPWROFF pin of the PSL+ to keep the
power on. If MCU fails to deliver this pulse, the PSL+ will remove
power from the system. MCU controls also the charger on/off switching in the PWRU block. When power off is requested MCU leaves
PSL+ watchdog without reset. After the watchdog has elapsed PSL+
cuts off the supply voltages from the phone.
2
PROM
SYSTEM MODULE DS9
NHK–1
– CTRLU – ASIC
MCU and ASIC have a common 8 bit data bus and a 9 bit address
bus. A(4:0) are used for normal addressing whereas bits A(19:16)
are decoded in ASIC to chip select inputs for CTRLU memories.
ASIC controls the main clock, main reset and interrupts to MCU. The
internal clock of MCU is half the MCUCLK clock speed. RESETX resets everything in MCU except the contents of the RAM. IRQX is
general purpose interrupt request line from ASIC. After IRQX request
the interrupt register of asic is read to find out the reason for interrupt. NMI–interrupt is used only to wake up MCU from software
standby mode.
– CTRLU – DSPU
MCU and DSP communicate through ASIC. ASIC has MCU–mailbox
and DSP–mailbox. MCU writes data to DSP–mailbox where DSP can
only read the incoming data. In MCU–mailbox data transfer direction
is opposite.
– CTRLU – AUDIO
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When the the chip select signal XSELPCMC goes low, MCU writes
or reads control data to or from the speech codec at the rate defined
by PCMCLK. PCMCDI is output data line from MCU to codec and
PCMCDO is input data line from codec to MCU.
– CTRLU – RF/BATTERY monitoring
MCU monitors RF and battery functions (BTEMP, BSI ,VBATDET,VC
and TRF) with the internal 8 channel 10 bit AD converter.
– CTRLU – keyboard and LCD driver interface
MCU and user interface communication is controlled through ASIC.
– CTRLU – ACCESSORIES
M2BUS is used to control external accessories. This interface can be
used also to factory testing and service and maintenance purposes.
SYSTEM MODULE DS9
NHK–1
PWRU
The power block makes the supply voltages for the baseband and includes also
the charging electronics.
Main components of PWRU
– PSL + ASIC
Generates the voltages, has power switch, charger and battery
detection and watchdog.
– Transistor BCP69–25 and schottky STPS340U
The charging current is passed through these components.
– Transistor BCX51
VL regulators of PSL+ external output transistors.
Input signals of PWRU
Name(from):Description:
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XPWRON(UIF)PWR on swith
XPWROFF(CTRLU) Power off control
VBATT(syst.conn.)Battery voltage
PWM(CTRLU)Charger on/off control
VCHAR(syst.conn.) Charging voltage
Output signals of PWRU
Name(from):Description:
XRES(ASIC)Master reset
VL1(CTRLU,ASIC,Logic supply voltage, max 150 mA
RFI,UIF)
VL2(DSPU)Logic supply voltage, max 150 mA
VA1(AUDIO,UIF)Analog supply voltage, max 40 mA
VA2(RFI)Analog supply voltage, max 80 mA
SYSTEM MODULE DS9
NHK–1
Block description of PWRU
The PSL+–IC produces the supply voltages:
Name:Description:
2 * VL150 mA for logic
VA140 mA for audios
VA280 mA for RFI
VREF5 mA reference
It also has internal watchdog, voltage detection and charger detection func-
tions. The watchdog will cut the output voltages if it is not resetted once in
about 0.7 seconds. The voltage detector resets the phone if the battery voltage
falls below 4.8 V (±0.2 V). The charger detection starts the phone if it is in power–off when the charging voltage is applied.
The charging electronics is controlled by the MCU. When the charging voltage
is applied to the phone while the phone is powered up, the MCU detects it and
starts controlling the charging.
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If the phone is in power–off state, the PSL+ will detect the charging voltage and
start the phone. If the battery voltage is high enough the reset will be released
and the MCU will start controlling the charging.
If the battery voltage is too low the phone is in reset and charging control circuitry will pass the charging current to the battery. When the battery voltage has
reached 5.25 V (±0.2 V) the reset will be removed and the MCU starts controlling the charging. This all is invisible to the user.
SYSTEM MODULE DS9
NHK–1
DSPU
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Main interfaces of the DSP:
– MCU via ASIC mailbox
– ASIC
– audio codec
– data bus interface (DBUS) for accessories
– digital audio interface (DAI) for type approval measurements
Main features of the DSP block:
– speech processing
– speech coding/decoding
– RPE–LTP–LPC (Regular pulse excitation long term
prediction linear predictive coding)
– voice activity detection (VAD) for discontinuous transmission
(DTX)
8–17
– comfort noise generation during silence
– acoustic echo cancellation
– channel coding and transmission
– block coding (with ASIC)
– convolutional coding
– interleaving
– ciphering (with ASIC)
– burst building and writing it to ASIC
– Reception
– reading the A/D conversion results from ASIC
– impulse response calculation
– matched filtering
– bit detection (with Viterbi on ASIC)
– deinterleaving of soft decisions
– convolutional decoding (with Viterbi)
– block decoding (with ASIC)
– functions for RF measurements
– debugging functions for product development
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– synthesizer control
– power ramp programming
– automatic gain control (AGC)
– automatic frequency control (AFC)
– controlling the operations during a TDMA frame (with
– controlling the multiframe structure
– channel configuration control
8–18
Main components of DSPU
– AT&T DSP 1616
– SRAMs for DSP external memory
Input signals of DSPU
Name(from):Description:
VL2(PWRU)Logic supply voltage, max 150 mA
DSPCLKEN(ASIC)Clock enable for DSP clock oscillator circuit
DSP1RSTX(ASIC)Reset for the DSP
PCMDATRCLKXPCM data input clock
(ASIC)DBUS data output clock
CODEC_CLKPCM data output clock
PCMOUT(AUDIO)Received audio in PCM format
DBUSCLKDBUS data output clock
DBUSSYNCDBUS data bit sync clock
RDADBUS received data
INT0, INT1(ASIC)Interrupts for the DSP
PCMCOSYCLKXPCM data bit sync clock
(ASIC)
SYSTEM MODULE DS9
NHK–1
Output signals of DSPU
Name(to):Description:
PCMIN(AUDIO)Transmitted audio in PCM format
IOX(ASIC)I/O enable, indicates access to DSP address space
RWX(ASIC)Read/write X
DSPAD(16;9)(ASIC) Address bus and control signals
DBUSDET(ASIC)DBUS activity detection
Bidirectional signals of DSPU
Name(from/to):Description:
DSPDA(15;0)(ASIC) 16 bit data bus
Block description of DSPU
Control unit communicates with DSP circuitry trough a mailbox in the ESA asic.
DSP communicates with PCM codec and DBUS with SIO serial busses. DSP
controls RFI through the ESA.
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In transmit mode DSP codes the speech and routes the resulting transmit slots
to ESA. ESA asic controls timing, and at specified intervals sends these bits to
RFI for DA conversion.
In digital receive mode RFI AD converts IF signal from RF unit under the control of ESA. DSP controls ESA and receives the converted bits. After channel
and speech decoding, bits are converted to an analog signal in the PCM codec,
routed and fed to the earpiece.
DSP controls RF trough the ESA asic, where all necessary timing functions are
implemented, and control IO lines are provided for eg. synte loading.
All clocks and timing are generated from the RFC clock.
DSP emulator can be connected to DSP pins TCK,TMS,TDO,TDI,GND and
VDD.
SYSTEM MODULE DS9
NHK–1
AUDIO
The block consists of audio codec with some peripheral components. The codec includes microphone and earpiece amplifier and all the necessary switches
for routing. The controlling of the codec is done by the MCU. The PCM data
comes from and goes to DSP.
Main components of AUDIO
– Audio codec ST5080
Includes e.g. PCM codec, audio routing switches, microphone and
earpiece amplifiers for 2 connections (internal and external devices)
and DTMF generator.
Input signals of AUDIO
Name(from):Description:
VA1(PWRU)Analog supply voltagee, max 40 mA
PCMIN(DSPU)Received audio in PCM format
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SYNC(ASIC)8 kHz frame sync
CODEC_CLK(ASIC) 512 kHz codec main clock
PCMCDI(CTRLU)Audio codec control data
PCMCLK(CTRLU)Clock for audio codec control data transfer
XSELPCMCAudio codec chip select
(CTRLU)
HFMIC(syst.conn.)External microphone
MICN,MICP(UIF)Differential microphone signal
Output signals of AUDIO
Name(to):Description:
PCMOUT(DSPU)Transmitted audio in PCM format
PCMCDO(CTRLU)Audio codec control data
MIC_EN(UIF)Microphone enable
EXTEAR(syst.conn.) External received audio
EARN,EARP(UIF)Internal received audio
JCONN(CTRLU)Junction box connected signal (multiplexed with HFMIC)
Block description of AUDIO
The audio codec communicates with the DSP (analog speech) through a SIO
(signals: PCMIN, SYNC, CODEC_CLK and PCMOUT) . MCU controls the audio codec functionality through a separate SIO (signals: PCMCDO, PCMCDI,
PCMCLK and XSELPCMC).
SYSTEM MODULE DS9
NHK–1
ASIC
The ASIC takes care of the following functions:
– interface between MCU and UIF
– interface between MCU, DSP and RFI
– hardware accelerator functions to DSP: Viterbi, ...
– clock generation and disable/enable
– RF–controls
– UIF–interface
– timers
– M2BUS interface
– SIM interface
Main components of ASIC
– ESA –ASIC
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– RFC –buffer
Input signals of ASIC
Name(from):Description:
VL1(PWRU)Logic supply voltage ax 150 mA
IOX(DSPU)I/O enable, indicates access to DSP address space
RWX(DSPU)Read/write X
WSTROBEXMCU’s write strobe
(CTRLU)
RSTROBEXMCU’s read strobe
(CTRLU)
RFC(RF)Reference clock from VCTCXO
XRES(PWRU)Master reset
DSPAD(16;0)(DSPU)Address bus and control signals
MCUAD(19;16,4;0)MCU’s address bus
(CTRLU)
Inverter buffer stage is used as a buffer for VCTCXO–clock.
(CTRLU,RFI)
DSP1RSTX(DSPU) Reset for the DSP
SIMRESETReset for the SIM
WRX(RFI)Write strobe
RDX(RFI)Read strobe
RFIAD(3;0)(RFI)RFI address bus
SCLK(RF)Synthesizer load clock
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SDATA(RF)Synthesizer load data
SENAR(RF)Receiver synthesizer enable
SENAT(RF)Transmit synthesizer enable
RXPWR(RF)RX circuitry power enable
TXPWR(RF)TX circuitry power enable
SYNTHPWR(RF)Synthesizer circuitry power enable
TXP(RF)Transmit enable
MCUCLK(CTRLU)Main clock for MCU
DSPCLKEN(DSPU) DSP clock circuit enable
RFICLK(RFI)RFI master clock
RFI2CLK(RFI)RFI sleep clock
CODEC_CLKPCM data clock
(DSPU,AUDIO)
PCMDATRCLKXInverted PCM data clock, used as input clock for
(DSPU)
DCLK(DSPU)DBUS data clock
DSYNC(DSPU)DBUS bit sync clock
SIMCLK(UIF)SIM data clock
VSIM(UIF)SIM power control
SYSTEM MODULE DS9
NHK–1
ROMSELX(CTRLU) Chip select for the FLASH memory
ROM2SELXChip select for the second FLASH memory
(CTRLU)
EROMSELXChip select for the EEPROM memory
(CTRLU)
RAMSELX(CTRLU) Chip select for the SRAM memory
COL(3;0)(UIF)Lines for keyboard column write
Bidirectional signals of ASIC
Name(from/to):Description:
DSPDA(15;0)16 bit data bus
(DSPU)
MCUDA(7;0)MCU’s 8 bit data bus
(CTRLU)
RFIDA(11;0)(RFI)12 bit data bus
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Technical Documentation
8–23
Copyright Nokia Mobile Phones
UIF(6;0)(UIF)LCD controller control and keyboard read bus
SIMDATA(UIF)Serial data to SIM
Block description of ASIC
RFC buffer buffers the 26 MHz clock from VCTCXO to ASIC. In ASIC that clock
is further buffered and divided for MCU, RFI and audio codec (main and sync
clocks). The clock outputs can be disabled in order to save current when the
clock is not needed. Also DSP oscillator can be stopped.
SYSTEM MODULE DS9
NHK–1
RFI
The block consists of RFI–ASIC and its reference voltage generator. This block
is an interface between RF and baseband. The block has the following functions:
– IF receiving and A/D conversion
– I/Q separation
– I and Q transmit and D/A conversion
– AFC D/A
– TXC
– digital AGC control through PDATA
The RFI is connected to ESA with a 12–bit databus. The registers in RFI are
accessed using 4 address bits.
Main components of RFI
– RFI –ASIC
9712OJ
Technical Documentation
8–24
Copyright Nokia Mobile Phones
– 4.096 V external voltage reference LM4040 for RFI
Input signals of RFI
Name(from):Description:
VL1(PWRU)Logic supply voltage, max 150 mA
VA2(PWRU)Analog supply voltage, max 80 mA
RESETX(PWRU)Master (power up) reset
RFIAD(3;0)(ASIC)RFI address bus
RDX(ASIC)Read strobe
WRX(ASIC)Write strobe
RFICLK(ASIC)RFI master clock
RFI2CLK(ASIC)RFI sleep clock
SYSTEM MODULE DS9
NHK–1
Output signals of RFI
Name(to):Description:
DAX(ASIC)Data acknowledge
AFC(RF)Automatic frequency control voltage
TXC(RF)TX transmit power control voltage
TXQP,TXQN(RF)Differential TX quadrature signal
TXIP,TXIN(RF)Differential TX inphase signal
PDATA(5;0)(RF)Parallel AGC data
RXQ(RF)RX quadrature signal
RXI(RF)RX inphase signal
Bidiractional signals of RFI
Name(to):Description:
9712OJ
Technical Documentation
8–25
Copyright Nokia Mobile Phones
RFIDA(11;0)(ASIC)12 bit data bus
SYSTEM MODULE DS9
NHK–1
RF block
The RF block carries out all the RF functions of the transceiver. The RF block
works in PCN (DCS11800) system.
Functional description
Regulators
There are two regulators in the RF unit. The 1st regulator is used for the synthesizers and the negative bias generator. The 2nd regulator is used for te other RF circuits. The regulators regulate the battery voltage to the fixed 4.75 V
level. The receiver, synthesizer and transmitter circuits can be switched ON and
OFF separately. Switching sequence timing depends on the operation mode of
the phone.
Power distribution
All currents in power distribution diagram are peak currents. Activity percentages are in SPEECH mode 22.5 % for RXPWR , 15.8 % for TXPWR and 100 %
for SYNTHPWR. In IDLE mode activities are 0.36 %, 0.0 % and 1.61 % respectively. The current of each block is controlled independently and for example
TXPWR and RXPWR are not on at the same time. Average current consumption in SPEECH mode is 340 mA and in IDLE mode 22 mA for whole tranceiver.
9712OJ
Technical Documentation
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Copyright Nokia Mobile Phones
Battery
6.0 V
RegulatorRegulator
4.75 V4.75 V
45 mA5 mA60 mA60 mA
UHF PLL
VHF PLL
Buffers
Negat. bias
generator
RF LNAs
IF amplifiers
Mixers
AGC amplifiers
Modulator
TX buffers
Power control
VCTCXO
Switch
Power
amplifier
2 mA
850 mA
VREF
SYNTHPWR
TXP
TXPWR
RXPWR
SYSTEM MODULE DS9
NHK–1
Control signals
In the following table (NO TAG) the RF current consumption can be seen with
different status of the control signals. The VCTCXO current is not included in
the results.
SYNTHPWR:RXPWR: TXPWR: TXP: Typ. load current: Notes:
LLLL0.05 mALeakage current
HLLL51 mASynthesizer active
HHLL110 mAReception
HLHL110 mATX active
HLHH960 mATransmission
Receiver
The received RF signal from the antenna is fed via a duplex filter to the receiver
unit. The signal is amplified by a discrete low noise preamplifier. The gain of the
amplifier is controlled by the AGC control line (PDATA0). The nominal gain of
10 dB is reduced in the strong field condition about 28 dB. After the preamplifier the signal is filtered by a three pole ceramic RF filter. The filter rejects spurious signals coming from the antenna and spurious emissions coming from the
receiver unit.
9712OJ
Technical Documentation
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Copyright Nokia Mobile Phones
The filtered signal is amplified by a transistor amplifier and down converted by
a passive diode mixer. The frequency of the first IF is 487 MHz. The first local
signal is generated by the UHF synthesizer. The IF signal is amplified and then
it is filtered by a microstripline filter. The filter has a differential output.
The filtered IF signal is fed to the receiver integrated circuit, PMB2403S. The
circuit down converts the first IF signal. The 2nd local signal is generated by the
VHF synthesizer. The frequency of the second IF is 87 MHz. The 2ndIF signal
is filtered by a SAW filter. The filter rejects adjacent channel signal, intermodulating signals and the 3rd IF image signal. After filtering the 2nd IF signal is amplified by a AGC amplifier. The AGC amplifier is a separate IC and the gain
control range is 45 dB. The gain is controlled digitally with four control lines.
The 2nd IF signal is fed back to the receiver IC (PMB3403S), which has one 12
dB AGC stage. The amplified IF signal is down converted in the 2nd mixer of
the IC. The 3rd local signal is generated from VHF VCO by dividing the original
VCO signal by four. The 3rd intermediate frequency is 13 MHz. After the downconversion the 3rd IF signal is amplified and fed out from the RX IC.
The 3rd IF signal is filtered by a ceramic filter. The filter rejects signals of the
adjacent channels. After the filtering the signal is amplified and divided into the I
and Q signals by an RC network. The I and Q signal are fed to the RFI interface IC.
SYSTEM MODULE DS9
NHK–1
Transmitter
The TX intermediate frequency of 400 MHz is modulated by an I/Q modulator
(PMB2205S). The TX I and Q signals are generated in the RFI interface circuit
and they are fed differentially to the modulator.
The final TX signal ia achieved by mixing the UHF VCO signal and the modulated TX intermediate signal. After mixing the TX signal is amplified and filtered
by two amplifiers and filters. After these stages the level of the sinal is typically
1 mW (0 dBm).
The power amplifier module amplifies the TX signal to the desired power level.
The maximum output level of the module is typically 2.0 W.
The power control loop controls the output level of the power amplifier. The
power detector consists of a directional coupler and a diode rectifier. The power
control signal (TXC), which has a raised cosine form, comes from the RF interface circuit, RFI.
Frequency synthesizers
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Copyright Nokia Mobile Phones
The stable frequency source for the synthesizers and base band circuits is the
voltage controlled temperature compensated crystal oscillator, VCTCXO. The
frequency of the VCTCXO is 26 MHz. The frequency of the oscillator is controlled by an AFC voltage, which is generated by the base band circuits.
The operating frequency range of the UHF synthesizer is from 1318 to 1393
MHz in the receiving mode and from 1310 to 1385 MHz in the transmitting
mode. The UHF VCO is a module. The dual modulus divider divides the VCO
signal by 32/33 for the PLL circuit (PMB2306). The UHF PLL generates the
down conversion signal for the receiver and the up conversion signal for the
transmitter.
The operating frequency of the VHF synthesizer is 400 MHz. This signal is directly used in the 2nd mixer of the receiver and in the I/Q modulator of the
transmitter chain. The VHF signal is divided by four, too. This signal is used in
the 3rd mixer of the receiver and in the PLL circuit.
SYSTEM MODULE DS9
NHK–1
9712OJ
Technical Documentation
Block diagram of baseband
32K x 16
SRAM
ear
PCM
CODEC
mic
sio
DAI
A14:0,
D15:0
sio
DSP
ext
sio
mem
A5:0,
D15:0
RFI
12 bit parallel +
8 x control
ASIC
8–29
Copyright Nokia Mobile Phones
RF
UIF–module
LCD
DRIVER
LCD
LCD
PSL+
CHRGR
FLASH
LOAD
M2 BUS
Interface
A4:0, A19:16, D7:0
A19:0,D7:0
io ext mem
io
sio
sio
MCU
sio
A12:0,D7:0
E2PROM
8K X 8
A17:0,D7:0
512K x 8
FLASH
A14:0,D7:0
32K x 8
SRAM
487 MHZ
87 MHZ
4
AGC
AMPLIFIER
PMB2403S V1.3
13 MHZ
6
AGC CONT.
RXI
RXQ
Block diagram of RF
SYSTEM MODULE DS9
9712OJ
Technical Documentation
SWITCH
EXT . ANTENNA
POWER
CONTROL
1310...1393 MHZ
UHF
VCO
DIV
32/33
PMB2306
UHF
PLL
400 MHZ
VHF
VCO
MODULATOR
DIV
4
PMB2205S
I/Q
PMB2306
VHF
PLL
PLL
REGUL.
RF
REGUL.
VCTCXO
26 MHZ
3
4
2
2
2
DC CONT.
AFC
SYS.CLOCK
PLL CONT.
TX CONT.
TXI
TXQ
Copyright Nokia Mobile Phones
NHK–1
8–30
SYSTEM MODULE DS9
NHK–1
9712OJ
Technical Documentation
Power distribution diagram
PSL+
VBATT
VCHAR
VL1
VL2
VA1
VA2
VREF
VA2 VL1
RFI
8–31
Copyright Nokia Mobile Phones
VBATT VREF
RF
VL2
32Kx16
SRAM
VA1
PCM
CODEC
DSP
VL2
VL1
ASIC
VREF VL1
MCU
MCU
VA1
VL1
VL1
E2PROM
8K x 8
UIF–module
UIF–module
LCD Driver
VL1
512K x 8
FLASH
VBATT
LCD
LCD
VL1
32K x 8
SRAM
SYSTEM MODULE DS9
NHK–1
9712OJ
Technical Documentation
Copyright Nokia Mobile Phones
Connections between system and RF blocks
8–32
SYSTEM MODULE DS9
NHK–1
9712OJ
Technical Documentation
Copyright Nokia Mobile Phones
Parts list of DS9 v.1.20 code 0200172
ITEMCODEDESCRIPTIONVALUETYPE
R0701430788Chip resistor22 k5 % 0.063 W 0402
R0711430794Chip resistor39 k5 % 0.063 W 0402
R0721430754Chip resistor1.0 k5 % 0.063 W 0402
R0731430764Chip resistor3.3 k5 % 0.063 W 0402
R0741430730Chip resistor150 5 % 0.063 W 0402
R0751430804Chip resistor100 k5 % 0.063 W 0402
R0761430744Chip resistor470 5 % 0.063 W 0402
R0771430796Chip resistor47 k5 % 0.063 W 0402
R0781430796Chip resistor47 k5 % 0.063 W 0402
R0791430804Chip resistor100 k5 % 0.063 W 0402
R1101430842Chip resistor680 k1 % 0.063 W 0402
R1111430840Chip resistor220 k1 % 0.063 W 0402
R1121430804Chip resistor100 k5 % 0.063 W 0402
R1131430804Chip resistor100 k5 % 0.063 W 0402
R1141430732Chip resistor180 5 % 0.063 W 0402
R1401430792Chip resistor33 k5 % 0.063 W 0402
R1411430788Chip resistor22 k5 % 0.063 W 0402
R1421430778Chip resistor10 k5 % 0.063 W 0402
R1431430764Chip resistor3.3 k5 % 0.063 W 0402
R1441430764Chip resistor3.3 k5 % 0.063 W 0402
R1451430732Chip resistor180 5 % 0.063 W 0402
R1461430846Chip resistor2.7 k1 % 0.063 W 0402
R1471430844Chip resistor3.9 k1 % 0.063 W 0402
R1481430762Chip resistor2.2 k5 % 0.063 W 0402
R1491430762Chip resistor2.2 k5 % 0.063 W 0402
R1501430778Chip resistor10 k5 % 0.063 W 0402
R1511430804Chip resistor100 k5 % 0.063 W 0402
R1521430778Chip resistor10 k5 % 0.063 W 0402
R1601430726Chip resistor100 5 % 0.063 W 0402
R1611430770Chip resistor4.7 k5 % 0.063 W 0402
R1621430778Chip resistor10 k5 % 0.063 W 0402
R1631430726Chip resistor100 5 % 0.063 W 0402
R1641430788Chip resistor22 k5 % 0.063 W 0402
R1651430804Chip resistor100 k5 % 0.063 W 0402
R1661430804Chip resistor100 k5 % 0.063 W 0402
R1691430804Chip resistor100 k5 % 0.063 W 0402
R1701430804Chip resistor100 k5 % 0.063 W 0402
R1711430788Chip resistor22 k5 % 0.063 W 0402
R1721430796Chip resistor47 k5 % 0.063 W 0402
R1731430796Chip resistor47 k5 % 0.063 W 0402
R1741430754Chip resistor1.0 k5 % 0.063 W 0402
R1751430700Chip resistor10 5 % 0.063 W 0402
R1761430726Chip resistor100 5 % 0.063 W 0402
8–33
SYSTEM MODULE DS9
NHK–1
9712OJ
Technical Documentation
R1771430726Chip resistor100 5 % 0.063 W 0402
R1781430726Chip resistor100 5 % 0.063 W 0402
R1791430726Chip resistor100 5 % 0.063 W 0402
R1811430726Chip resistor100 5 % 0.063 W 0402
R1821430726Chip resistor100 5 % 0.063 W 0402
R1831430734Chip resistor220 5 % 0.063 W 0402
R1841430726Chip resistor100 5 % 0.063 W 0402
R1851430726Chip resistor100 5 % 0.063 W 0402
R1861430726Chip resistor100 5 % 0.063 W 0402
R1901430726Chip resistor100 5 % 0.063 W 0402
R1911430754Chip resistor1.0 k5 % 0.063 W 0402
R1921430754Chip resistor1.0 k5 % 0.063 W 0402
R1931430754Chip resistor1.0 k5 % 0.063 W 0402
R1941430754Chip resistor1.0 k5 % 0.063 W 0402
R1951430754Chip resistor1.0 k5 % 0.063 W 0402
R1961430754Chip resistor1.0 k5 % 0.063 W 0402
R1971430754Chip resistor1.0 k5 % 0.063 W 0402
R1981430804Chip resistor100 k5 % 0.063 W 0402
R1991430804Chip resistor100 k5 % 0.063 W 0402
R2101430754Chip resistor1.0 k5 % 0.063 W 0402
R2301430804Chip resistor100 k5 % 0.063 W 0402
R2311430804Chip resistor100 k5 % 0.063 W 0402
R2321430842Chip resistor680 k1 % 0.063 W 0402
R2331430796Chip resistor47 k5 % 0.063 W 0402
R2341430778Chip resistor10 k5 % 0.063 W 0402
R2351430762Chip resistor2.2 k5 % 0.063 W 0402
R2361430762Chip resistor2.2 k5 % 0.063 W 0402
R2371430762Chip resistor2.2 k5 % 0.063 W 0402
R2381430762Chip resistor2.2 k5 % 0.063 W 0402
R2391430762Chip resistor2.2 k5 % 0.063 W 0402
R2401430762Chip resistor2.2 k5 % 0.063 W 0402
R2411430762Chip resistor2.2 k5 % 0.063 W 0402
R2431430774Chip resistor6.8 k5 % 0.063 W 0402
R2441430804Chip resistor100 k5 % 0.063 W 0402
R2451430804Chip resistor100 k5 % 0.063 W 0402
R2461430804Chip resistor100 k5 % 0.063 W 0402
R2471430762Chip resistor2.2 k5 % 0.063 W 0402
R2481430726Chip resistor100 5 % 0.063 W 0402
R2491430726Chip resistor100 5 % 0.063 W 0402
R2501430804Chip resistor100 k5 % 0.063 W 0402
R2511430792Chip resistor33 k5 % 0.063 W 0402
R2521430804Chip resistor100 k5 % 0.063 W 0402
R2531430770Chip resistor4.7 k5 % 0.063 W 0402
R2541430760Chip resistor1.8 k5 % 0.063 W 0402
R2551430726Chip resistor100 5 % 0.063 W 0402
R2561430726Chip resistor100 5 % 0.063 W 0402
R2571430726Chip resistor100 5 % 0.063 W 0402
R2601430726Chip resistor100 5 % 0.063 W 0402
Copyright Nokia Mobile Phones
8–34
SYSTEM MODULE DS9
NHK–1
9712OJ
Technical Documentation
R2611430784Chip resistor15 k5 % 0.063 W 0402
R2621430804Chip resistor100 k5 % 0.063 W 0402
R2631430760Chip resistor1.8 k5 % 0.063 W 0402
R2641430792Chip resistor33 k5 % 0.063 W 0402
R2651430792Chip resistor33 k5 % 0.063 W 0402
R2671430778Chip resistor10 k5 % 0.063 W 0402
R2701430752Chip resistor820 5 % 0.063 W 0402
R5021430770Chip resistor4.7 k5 % 0.063 W 0402
R5031430778Chip resistor10 k5 % 0.063 W 0402
R5041430772Chip resistor5.6 k5 % 0.063 W 0402
R5051430754Chip resistor1.0 k5 % 0.063 W 0402
R5061430734Chip resistor220 5 % 0.063 W 0402
R5071430700Chip resistor10 5 % 0.063 W 0402
R5081430700Chip resistor10 5 % 0.063 W 0402
R5091430762Chip resistor2.2 k5 % 0.063 W 0402
R5101430700Chip resistor10 5 % 0.063 W 0402
R5111430778Chip resistor10 k5 % 0.063 W 0402
R5121430726Chip resistor100 5 % 0.063 W 0402
R5131430778Chip resistor10 k5 % 0.063 W 0402
R5141430714Chip resistor33 5 % 0.063 W 0402
R5161430764Chip resistor3.3 k5 % 0.063 W 0402
R5171430720Chip resistor56 5 % 0.063 W 0402
R5181430740Chip resistor330 5 % 0.063 W 0402
R5191430700Chip resistor10 5 % 0.063 W 0402
R5201430740Chip resistor330 5 % 0.063 W 0402
R5211430764Chip resistor3.3 k5 % 0.063 W 0402
R5221430200Chip resistor120 2 % 0.063 W 0603
R5261430200Chip resistor120 2 % 0.063 W 0603
R5271430796Chip resistor47 k5 % 0.063 W 0402
R5281430796Chip resistor47 k5 % 0.063 W 0402
R5291430796Chip resistor47 k5 % 0.063 W 0402
R5301430796Chip resistor47 k5 % 0.063 W 0402
R5311430796Chip resistor47 k5 % 0.063 W 0402
R5331430734Chip resistor220 5 % 0.063 W 0402
R5341430748Chip resistor680 5 % 0.063 W 0402
R5351430734Chip resistor220 5 % 0.063 W 0402
R5361430748Chip resistor680 5 % 0.063 W 0402
R5371430764Chip resistor3.3 k5 % 0.063 W 0402
R5391430766Chip resistor3.9 k5 % 0.063 W 0402
R5401430770Chip resistor4.7 k5 % 0.063 W 0402
R5411430726Chip resistor100 5 % 0.063 W 0402
R5421430774Chip resistor6.8 k5 % 0.063 W 0402
R5431430754Chip resistor1.0 k5 % 0.063 W 0402
R5441430770Chip resistor4.7 k5 % 0.063 W 0402
R5451430748Chip resistor680 5 % 0.063 W 0402
R5461430748Chip resistor680 5 % 0.063 W 0402
R5481430790Chip resistor27 k5 % 0.063 W 0402
R5601430732Chip resistor180 5 % 0.063 W 0402
Copyright Nokia Mobile Phones
8–35
SYSTEM MODULE DS9
NHK–1
9712OJ
Technical Documentation
R5611430764Chip resistor3.3 k5 % 0.063 W 0402
R5621430764Chip resistor3.3 k5 % 0.063 W 0402
R5631430764Chip resistor3.3 k5 % 0.063 W 0402
R5641430744Chip resistor470 5 % 0.063 W 0402
R5651430754Chip resistor1.0 k5 % 0.063 W 0402
R5661800554NTC resistor4.7 k10 % 0.12 W 0805
R5671430740Chip resistor330 5 % 0.063 W 0402
R5681430796Chip resistor47 k5 % 0.063 W 0402
R5691430734Chip resistor220 5 % 0.063 W 0402
R6001430770Chip resistor4.7 k5 % 0.063 W 0402
R6011430770Chip resistor4.7 k5 % 0.063 W 0402
R6021430732Chip resistor180 5 % 0.063 W 0402
R6041430770Chip resistor4.7 k5 % 0.063 W 0402
R6051430770Chip resistor4.7 k5 % 0.063 W 0402
R6061430710Chip resistor22 5 % 0.063 W 0402
R6071430760Chip resistor1.8 k5 % 0.063 W 0402
R6081430754Chip resistor1.0 k5 % 0.063 W 0402
R6091430754Chip resistor1.0 k5 % 0.063 W 0402
R6101430754Chip resistor1.0 k5 % 0.063 W 0402
R6111430710Chip resistor22 5 % 0.063 W 0402
R6121430774Chip resistor6.8 k5 % 0.063 W 0402
R6131430794Chip resistor39 k5 % 0.063 W 0402
R6141430700Chip resistor10 5 % 0.063 W 0402
R6151430726Chip resistor100 5 % 0.063 W 0402
R6161430720Chip resistor56 5 % 0.063 W 0402
R6171430700Chip resistor10 5 % 0.063 W 0402
R6181430832Chip resistor2.7 k5 % 0.063 W 0402
R6191430778Chip resistor10 k5 % 0.063 W 0402
R6201430726Chip resistor100 5 % 0.063 W 0402
R6211430742Chip resistor390 5 % 0.063 W 0402
R7001430700Chip resistor10 5 % 0.063 W 0402
R7011430730Chip resistor150 5 % 0.063 W 0402
R7021412286Chip jumper0805
R7031430740Chip resistor330 5 % 0.063 W 0402
R7041430760Chip resistor1.8 k5 % 0.063 W 0402
R7051430774Chip resistor6.8 k5 % 0.063 W 0402
R7061430778Chip resistor10 k5 % 0.063 W 0402
R7071430784Chip resistor15 k5 % 0.063 W 0402
R7091430790Chip resistor27 k5 % 0.063 W 0402
R7101430710Chip resistor22 5 % 0.063 W 0402
R7111430760Chip resistor1.8 k5 % 0.063 W 0402
R7121430754Chip resistor1.0 k5 % 0.063 W 0402
R7131430754Chip resistor1.0 k5 % 0.063 W 0402
R7141430754Chip resistor1.0 k5 % 0.063 W 0402
R7151430794Chip resistor39 k5 % 0.063 W 0402
R8001430210Chip resistor7.5 k2 % 0.063 W 0603
R8011430210Chip resistor7.5 k2 % 0.063 W 0603
R8021430210Chip resistor7.5 k2 % 0.063 W 0603
Copyright Nokia Mobile Phones
8–36
SYSTEM MODULE DS9
NHK–1
9712OJ
Technical Documentation
R8031430210Chip resistor7.5 k2 % 0.063 W 0603
R8041430700Chip resistor10 5 % 0.063 W 0402
R8051430700Chip resistor10 5 % 0.063 W 0402
R8061430730Chip resistor150 5 % 0.063 W 0402
R8071430774Chip resistor6.8 k5 % 0.063 W 0402
R8081430764Chip resistor3.3 k5 % 0.063 W 0402
R8111430754Chip resistor1.0 k5 % 0.063 W 0402
R8121430754Chip resistor1.0 k5 % 0.063 W 0402
R8131430788Chip resistor22 k5 % 0.063 W 0402
R8141430762Chip resistor2.2 k5 % 0.063 W 0402
R8151430788Chip resistor22 k5 % 0.063 W 0402
R8161430726Chip resistor100 5 % 0.063 W 0402
R8171430762Chip resistor2.2 k5 % 0.063 W 0402
R8181430764Chip resistor3.3 k5 % 0.063 W 0402
R8191430744Chip resistor470 5 % 0.063 W 0402
R8201430786Chip resistor18 k5 % 0.063 W 0402
R8211430760Chip resistor1.8 k5 % 0.063 W 0402
R8231430754Chip resistor1.0 k5 % 0.063 W 0402
R8241430774Chip resistor6.8 k5 % 0.063 W 0402
R8251430770Chip resistor4.7 k5 % 0.063 W 0402
R8261430748Chip resistor680 5 % 0.063 W 0402
R8271430804Chip resistor100 k5 % 0.063 W 0402
R8281430794Chip resistor39 k5 % 0.063 W 0402
R8291430792Chip resistor33 k5 % 0.063 W 0402
R8301430726Chip resistor100 5 % 0.063 W 0402
R8311430766Chip resistor3.9 k5 % 0.063 W 0402
R8321430778Chip resistor10 k5 % 0.063 W 0402
R8331430762Chip resistor2.2 k5 % 0.063 W 0402
R8341430778Chip resistor10 k5 % 0.063 W 0402
R8361430730Chip resistor150 5 % 0.063 W 0402
R8371430744Chip resistor470 5 % 0.063 W 0402
R8381430732Chip resistor180 5 % 0.063 W 0402
R8391430770Chip resistor4.7 k5 % 0.063 W 0402
R8401430700Chip resistor10 5 % 0.063 W 0402
R8411430774Chip resistor6.8 k5 % 0.063 W 0402
R8421430778Chip resistor10 k5 % 0.063 W 0402
R8431430788Chip resistor22 k5 % 0.063 W 0402
R8441430718Chip resistor47 5 % 0.063 W 0402
R8451430754Chip resistor1.0 k5 % 0.063 W 0402
R8461430754Chip resistor1.0 k5 % 0.063 W 0402
R8471430740Chip resistor330 5 % 0.063 W 0402
R8511430778Chip resistor10 k5 % 0.063 W 0402
R8521430778Chip resistor10 k5 % 0.063 W 0402
R9001430754Chip resistor1.0 k5 % 0.063 W 0402
R9021430778Chip resistor10 k5 % 0.063 W 0402
R9081430778Chip resistor10 k5 % 0.063 W 0402
R9091430754Chip resistor1.0 k5 % 0.063 W 0402
R9141430770Chip resistor4.7 k5 % 0.063 W 0402
Copyright Nokia Mobile Phones
8–37
SYSTEM MODULE DS9
NHK–1
9712OJ
Technical Documentation
C0402320544Ceramic cap.22 p5 % 50 V 0402
C0412320544Ceramic cap.22 p5 % 50 V 0402
C0422320560Ceramic cap.100 p5 % 50 V 0402
C0432320598Ceramic cap.3.9 n5 % 50 V 0402
C0442320560Ceramic cap.100 p5 % 50 V 0402
C0452320560Ceramic cap.100 p5 % 50 V 0402
C0462320598Ceramic cap.3.9 n5 % 50 V 0402
C0472320598Ceramic cap.3.9 n5 % 50 V 0402
C1092320604Ceramic cap.18 p5 % 50 V 0402
C1102320107Ceramic cap.10 n5 % 50 V 0603
C1112604209Tantalum cap.1.0 u20 % 16 V 3.2x1.6x1.6
C1122320584Ceramic cap.1.0 n5 % 50 V 0402
C1132320107Ceramic cap.10 n5 % 50 V 0603
C1142320107Ceramic cap.10 n5 % 50 V 0603
C1152604329Tantalum cap.4.7 u20 % 10 V 3.5x2.8x1.9
C1162604329Tantalum cap.4.7 u20 % 10 V 3.5x2.8x1.9
C1172604329Tantalum cap.4.7 u20 % 10 V 3.5x2.8x1.9
C1182320107Ceramic cap.10 n5 % 50 V 0603
C1192320107Ceramic cap.10 n5 % 50 V 0603
C1202604329Tantalum cap.4.7 u20 % 10 V 3.5x2.8x1.9
C1212604329Tantalum cap.4.7 u20 % 10 V 3.5x2.8x1.9
C1222604209Tantalum cap.1.0 u20 % 16 V 3.2x1.6x1.6
C1232320560Ceramic cap.100 p5 % 50 V 0402
C1242320560Ceramic cap.100 p5 % 50 V 0402
C1252320560Ceramic cap.100 p5 % 50 V 0402
C1262320560Ceramic cap.100 p5 % 50 V 0402
C1402320107Ceramic cap.10 n5 % 50 V 0603
C1412604209Tantalum cap.1.0 u20 % 16 V 3.2x1.6x1.6
C1602320584Ceramic cap.1.0 n5 % 50 V 0402
C1702307816Ceramic cap.47 n20 % 25 V 0805
C1712307816Ceramic cap.47 n20 % 25 V 0805
C1722320107Ceramic cap.10 n5 % 50 V 0603
C1732320544Ceramic cap.22 p5 % 50 V 0402
C1752307816Ceramic cap.47 n20 % 25 V 0805
C1762320584Ceramic cap.1.0 n5 % 50 V 0402
C1772320584Ceramic cap.1.0 n5 % 50 V 0402
C1782320107Ceramic cap.10 n5 % 50 V 0603
C1812307816Ceramic cap.47 n20 % 25 V 0805
C1822320107Ceramic cap.10 n5 % 50 V 0603
C1832307816Ceramic cap.47 n20 % 25 V 0805
C1852320560Ceramic cap.100 p5 % 50 V 0402
C1862320584Ceramic cap.1.0 n5 % 50 V 0402
C1872320560Ceramic cap.100 p5 % 50 V 0402
C1882320560Ceramic cap.100 p5 % 50 V 0402
C1952320544Ceramic cap.22 p5 % 50 V 0402
C1962320560Ceramic cap.100 p5 % 50 V 0402
C1972320560Ceramic cap.100 p5 % 50 V 0402
C1982320560Ceramic cap.100 p5 % 50 V 0402
Copyright Nokia Mobile Phones
8–38
SYSTEM MODULE DS9
NHK–1
9712OJ
Technical Documentation
C2002307816Ceramic cap.47 n20 % 25 V 0805
C2012307816Ceramic cap.47 n20 % 25 V 0805
C2022307816Ceramic cap.47 n20 % 25 V 0805
C2032307816Ceramic cap.47 n20 % 25 V 0805
C2102307816Ceramic cap.47 n20 % 25 V 0805
C2112307816Ceramic cap.47 n20 % 25 V 0805
C2302307816Ceramic cap.47 n20 % 25 V 0805
C2312307816Ceramic cap.47 n20 % 25 V 0805
C2322307816Ceramic cap.47 n20 % 25 V 0805
C2332307816Ceramic cap.47 n20 % 25 V 0805
C2342320598Ceramic cap.3.9 n5 % 50 V 0402
C2352320598Ceramic cap.3.9 n5 % 50 V 0402
C2362320544Ceramic cap.22 p5 % 50 V 0402
C2372320544Ceramic cap.22 p5 % 50 V 0402
C2382320560Ceramic cap.100 p5 % 50 V 0402
C2392320560Ceramic cap.100 p5 % 50 V 0402
C2402320560Ceramic cap.100 p5 % 50 V 0402
C2412320560Ceramic cap.100 p5 % 50 V 0402
C2502320560Ceramic cap.100 p5 % 50 V 0402
C2512320560Ceramic cap.100 p5 % 50 V 0402
C2522320560Ceramic cap.100 p5 % 50 V 0402
C2532320560Ceramic cap.100 p5 % 50 V 0402
C2542320560Ceramic cap.100 p5 % 50 V 0402
C2552320107Ceramic cap.10 n5 % 50 V 0603
C2562320560Ceramic cap.100 p5 % 50 V 0402
C2572320560Ceramic cap.100 p5 % 50 V 0402
C2582320536Ceramic cap.10 p5 % 50 V 0402
C2592320544Ceramic cap.22 p5 % 50 V 0402
C2602307816Ceramic cap.47 n20 % 25 V 0805
C2612320107Ceramic cap.10 n5 % 50 V 0603
C2622307816Ceramic cap.47 n20 % 25 V 0805
C2632307816Ceramic cap.47 n20 % 25 V 0805
C2642307816Ceramic cap.47 n20 % 25 V 0805
C2652307816Ceramic cap.47 n20 % 25 V 0805
C2662320598Ceramic cap.3.9 n5 % 50 V 0402
C2672320584Ceramic cap.1.0 n5 % 50 V 0402
C2682320584Ceramic cap.1.0 n5 % 50 V 0402
C2692320560Ceramic cap.100 p5 % 50 V 0402
C2702610100Tantalum cap.1 u20 % 10 V 2.0x1.3x1.2
C2712307816Ceramic cap.47 n20 % 25 V 0805
C2722610100Tantalum cap.1 u20 % 10 V 2.0x1.3x1.2
C2762610100Tantalum cap.1 u20 % 10 V 2.0x1.3x1.2
C2772307816Ceramic cap.47 n20 % 25 V 0805
C2782610100Tantalum cap.1 u20 % 10 V 2.0x1.3x1.2
C2792307816Ceramic cap.47 n20 % 25 V 0805
C2822610100Tantalum cap.1 u20 % 10 V 2.0x1.3x1.2
C2832307816Ceramic cap.47 n20 % 25 V 0805
C2862307816Ceramic cap.47 n20 % 25 V 0805
Copyright Nokia Mobile Phones
8–39
SYSTEM MODULE DS9
NHK–1
9712OJ
Technical Documentation
C2872610100Tantalum cap.1 u20 % 10 V 2.0x1.3x1.2
C2902307816Ceramic cap.47 n20 % 25 V 0805
C2912610100Tantalum cap.1 u20 % 10 V 2.0x1.3x1.2
C2922320544Ceramic cap.22 p5 % 50 V 0402
C2932320544Ceramic cap.22 p5 % 50 V 0402
C5002320536Ceramic cap.10 p5 % 50 V 0402
C5012320522Ceramic cap.2.7 p0.25 % 50 V 0402
C5022320560Ceramic cap.100 p5 % 50 V 0402
C5042320107Ceramic cap.10 n5 % 50 V 0603
C5052320584Ceramic cap.1.0 n5 % 50 V 0402
C5062320560Ceramic cap.100 p5 % 50 V 0402
C5072320584Ceramic cap.1.0 n5 % 50 V 0402
C5082320560Ceramic cap.100 p5 % 50 V 0402
C5092320518Ceramic cap.1.8 p0.25 % 50 V 0402
C5102320540Ceramic cap.15 p5 % 50 V 0402
C5112320520Ceramic cap.2.2 p0.25 % 50 V 0402
C5132320538Ceramic cap.12 p5 % 50 V 0402
C5142320530Ceramic cap.5.6 p0.25 % 50 V 0402
C5152320538Ceramic cap.12 p5 % 50 V 0402
C5162320536Ceramic cap.10 p5 % 50 V 0402
C5172320530Ceramic cap.5.6 p0.25 % 50 V 0402
C5182320107Ceramic cap.10 n5 % 50 V 0603
C5192320107Ceramic cap.10 n5 % 50 V 0603
C5202320584Ceramic cap.1.0 n5 % 50 V 0402
C5212320584Ceramic cap.1.0 n5 % 50 V 0402
C5242320584Ceramic cap.1.0 n5 % 50 V 0402
C5252320584Ceramic cap.1.0 n5 % 50 V 0402
C5282320584Ceramic cap.1.0 n5 % 50 V 0402
C5292320584Ceramic cap.1.0 n5 % 50 V 0402
C5302320584Ceramic cap.1.0 n5 % 50 V 0402
C5312320598Ceramic cap.3.9 n5 % 50 V 0402
C5322320107Ceramic cap.10 n5 % 50 V 0603
C5332307816Ceramic cap.47 n20 % 25 V 0805
C5342320598Ceramic cap.3.9 n5 % 50 V 0402
C5352320348Ceramic cap.100 p2 % 50 V 0603
C5362320348Ceramic cap.100 p2 % 50 V 0603
C5372320556Ceramic cap.68 p5 % 50 V 0402
C5382320556Ceramic cap.68 p5 % 50 V 0402
C5392307816Ceramic cap.47 n20 % 25 V 0805
C5402320107Ceramic cap.10 n5 % 50 V 0603
C5412320524Ceramic cap.3.3 p0.25 % 50 V 0402
C5602320536Ceramic cap.10 p5 % 50 V 0402
C5612320548Ceramic cap.33 p5 % 50 V 0402
C5632320560Ceramic cap.100 p5 % 50 V 0402
C5642320584Ceramic cap.1.0 n5 % 50 V 0402
C5652320602Ceramic cap.4.7 p0.25 % 50 V 0402
C5802320520Ceramic cap.2.2 p0.25 % 50 V 0402
C5812320516Ceramic cap.1.5 p0.25 % 50 V 0402
Copyright Nokia Mobile Phones
8–40
SYSTEM MODULE DS9
NHK–1
9712OJ
Technical Documentation
C6002320598Ceramic cap.3.9 n5 % 50 V 0402
C6012320520Ceramic cap.2.2 p0.25 % 50 V 0402
C6022604209Tantalum cap.1.0 u20 % 16 V 3.2x1.6x1.6
C6032320544Ceramic cap.22 p5 % 50 V 0402
C6042320536Ceramic cap.10 p5 % 50 V 0402
C6052320536Ceramic cap.10 p5 % 50 V 0402
C6062320598Ceramic cap.3.9 n5 % 50 V 0402
C6072320602Ceramic cap.4.7 p0.25 % 50 V 0402
C6102320584Ceramic cap.1.0 n5 % 50 V 0402
C6122320107Ceramic cap.10 n5 % 50 V 0603
C6132320584Ceramic cap.1.0 n5 % 50 V 0402
C6142320602Ceramic cap.4.7 p0.25 % 50 V 0402
C6152604209Tantalum cap.1.0 u20 % 16 V 3.2x1.6x1.6
C6162320107Ceramic cap.10 n5 % 50 V 0603
C6172320584Ceramic cap.1.0 n5 % 50 V 0402
C6192604209Tantalum cap.1.0 u20 % 16 V 3.2x1.6x1.6
C6212320584Ceramic cap.1.0 n5 % 50 V 0402
C6222604079Tantalum cap.0.22 u20 % 35 V 3.2x1.6x1.6
C6232604209Tantalum cap.1.0 u20 % 16 V 3.2x1.6x1.6
C6242320598Ceramic cap.3.9 n5 % 50 V 0402
C6252320520Ceramic cap.2.2 p0.25 % 50 V 0402
C6262320598Ceramic cap.3.9 n5 % 50 V 0402
C6272320598Ceramic cap.3.9 n5 % 50 V 0402
C6282320552Ceramic cap.47 p5 % 50 V 0402
C6292320598Ceramic cap.3.9 n5 % 50 V 0402
C6302320584Ceramic cap.1.0 n5 % 50 V 0402
C7012320604Ceramic cap.18 p5 % 50 V 0402
C7022320107Ceramic cap.10 n5 % 50 V 0603
C7032320530Ceramic cap.5.6 p0.25 % 50 V 0402
C7042320526Ceramic cap.3.9 p0.25 % 50 V 0402
C7052320520Ceramic cap.2.2 p0.25 % 50 V 0402
C7072320544Ceramic cap.22 p5 % 50 V 0402
C7082320524Ceramic cap.3.3 p0.25 % 50 V 0402
C7092320552Ceramic cap.47 p5 % 50 V 0402
C7102320552Ceramic cap.47 p5 % 50 V 0402
C7122310181Ceramic cap.1.5 n5 % 50 V 1206
C7142320598Ceramic cap.3.9 n5 % 50 V 0402
C7152604209Tantalum cap.1.0 u20 % 16 V 3.2x1.6x1.6
C7162320604Ceramic cap.18 p5 % 50 V 0402
C7172320584Ceramic cap.1.0 n5 % 50 V 0402
C7182320584Ceramic cap.1.0 n5 % 50 V 0402
C7192320560Ceramic cap.100 p5 % 50 V 0402
C8002320348Ceramic cap.100 p2 % 50 V 0603
C8012320348Ceramic cap.100 p2 % 50 V 0603
C8042320514Ceramic cap.1.2 p0.25 % 50 V 0402
C8052320584Ceramic cap.1.0 n5 % 50 V 0402
C8062320584Ceramic cap.1.0 n5 % 50 V 0402
C8072320584Ceramic cap.1.0 n5 % 50 V 0402
Copyright Nokia Mobile Phones
8–41
SYSTEM MODULE DS9
NHK–1
9712OJ
Technical Documentation
C8082320584Ceramic cap.1.0 n5 % 50 V 0402
C8092320584Ceramic cap.1.0 n5 % 50 V 0402
C8102320524Ceramic cap.3.3 p0.25 % 50 V 0402
C8112604209Tantalum cap.1.0 u20 % 16 V 3.2x1.6x1.6
C8122320532Ceramic cap.6.8 p0.25 % 50 V 0402
C8132320518Ceramic cap.1.8 p0.25 % 50 V 0402
C8172320536Ceramic cap.10 p5 % 50 V 0402
C8182500708Electrol. cap.3300 u20 % 16 V
C8192320584Ceramic cap.1.0 n5 % 50 V 0402
C8202320536Ceramic cap.10 p5 % 50 V 0402
C8212320536Ceramic cap.10 p5 % 50 V 0402
C8232320508Ceramic cap.1.0 p0.25 % 50 V 0402
C8252320552Ceramic cap.47 p5 % 50 V 0402
C8262320584Ceramic cap.1.0 n5 % 50 V 0402
C8272320584Ceramic cap.1.0 n5 % 50 V 0402
C8282320584Ceramic cap.1.0 n5 % 50 V 0402
C8322604209Tantalum cap.1.0 u20 % 16 V 3.2x1.6x1.6
C8332604329Tantalum cap.4.7 u20 % 10 V 3.5x2.8x1.9
C8342604329Tantalum cap.4.7 u20 % 10 V 3.5x2.8x1.9
C8352604329Tantalum cap.4.7 u20 % 10 V 3.5x2.8x1.9
C8362604209Tantalum cap.1.0 u20 % 16 V 3.2x1.6x1.6
C8372604209Tantalum cap.1.0 u20 % 16 V 3.2x1.6x1.6
C8382320526Ceramic cap.3.9 p0.25 % 50 V 0402
C8392320598Ceramic cap.3.9 n5 % 50 V 0402
C8402320524Ceramic cap.3.3 p0.25 % 50 V 0402
C8412320576Ceramic cap.470 p5 % 50 V 0402
C8472320520Ceramic cap.2.2 p0.25 % 50 V 0402
C9002604329Tantalum cap.4.7 u20 % 10 V 3.5x2.8x1.9
C9022320584Ceramic cap.1.0 n5 % 50 V 0402
C9032320107Ceramic cap.10 n5 % 50 V 0603
C9042604329Tantalum cap.4.7 u20 % 10 V 3.5x2.8x1.9
C9062320107Ceramic cap.10 n5 % 50 V 0603
C9072320584Ceramic cap.1.0 n5 % 50 V 0402
C9082320546Ceramic cap.27 p5 % 50 V 0402
L0043641302Chip coil470 n5 % Q=30/25 MHz 1008
L1403606946Ferrite bead 0.2r 26r/100mhz 12061206
L1803606946Ferrite bead 0.2r 26r/100mhz 12061206
L2703641262Ferrite bead 30r/100mhz 2a 12061206
L2713641262Ferrite bead 30r/100mhz 2a 12061206
L2723606946Ferrite bead 0.2r 26r/100mhz 12061206
L2733606946Ferrite bead 0.2r 26r/100mhz 12061206
L5013641620Chip coil180 n5 % Q=35/100 MHz 0805
L5023641620Chip coil180 n5 % Q=35/100 MHz 0805
L5033641622Chip coil220 n5 % Q=30/100 MHz 0805
L5043641572Chip coil22 n5 % Q=45/250 MHz 0805
L5053641622Chip coil220 n5 % Q=30/100 MHz 0805
L5063641572Chip coil22 n5 % Q=45/250 MHz 0805
L6003641572Chip coil22 n5 % Q=45/250 MHz 0805
Copyright Nokia Mobile Phones
8–42
SYSTEM MODULE DS9
NHK–1
9712OJ
Technical Documentation
L6023641572Chip coil22 n5 % Q=45/250 MHz 0805
L6043641560Chip coil220 n10 % Q=30/100 MHz 0805
L6063641560Chip coil220 n10 % Q=30/100 MHz 0805
L6083608502Chip coil5 % Q=28/35 MHz 1206
L8003641572Chip coil22 n5 % Q=45/250 MHz 0805
L8023606946Ferrite bead 0.2r 26r/100mhz 12061206
L8033641536Chip coil33 n20 % Q=40/250 MHz 0805
L8053641536Chip coil33 n20 % Q=40/250 MHz 0805
L8063606946Ferrite bead 0.2r 26r/100mhz 12061206
G6004510038SM, VCTCXO 26mhz+–5ppm/–25c/+75c
G7004352806Vco 1310–1395mhz 4.5/10ma pcnPCN
Z5004512048Dupl 1710–1785/1805–1880mhz 31x1231x12
Z5034550096Cer.filt 1842.5+–37.5mhz 6.2x56.2X5
Z5144511028Saw filter87+–0.12 M
Z5154556998Cer.filt 13+–0.22mhz 330r 7x3rad7x3rad
Z8094550092Cer.filt 1747.5+–37.5mhz 6.2x5.36.2x5.3
Z8104550092Cer.filt 1747.5+–37.5mhz 6.2x5.36.2x5.3
T0703640402T ransformer 4:1 balun 800mhz smdSMD
T5003640404T ransformer 4:1 balun 2.5ghz smdSMD
T8003640402T ransformer 4:1 balun 800mhz smdSMD
T8013640404T ransformer 4:1 balun 2.5ghz smdSMD
V1104210020TransistorBCP69–25pnp 20 V 1 A SOT223
V1114200877TransistorBCX51–16pnp 45 V 1.5 A SOT89
V1414113828Trans. supr .SMBJ28ADO214AA
V1424210020TransistorBCP69–25pnp 20 V 1 A SOT223
V1434200226Darl. transistorBCV27npn 30 V 300 mA SOT23
V1444200226Darl. transistorBCV27npn 30 V 300 mA SOT23
V1454200909TransistorBC858B/BCW30pnp 30 V 100 mA SOT23
V1474110117Zener diodeBZX845 % 3.9 V 0.3 W SOT23
V1484110074Schottky diodeSTPS340U40 V 3 A SOD6
V1604210100TransistorBC848Wnpn 30 V SOT323
V1614210100TransistorBC848Wnpn 30 V SOT323
V2104110014Sch. diode x 2BAS70–0770 V 15 mA SOT143
V2144210079TransistorSOT23
V2154210079TransistorSOT23
V2164210050TransistorDTA114EEpnp RB V EM3
V2194210100TransistorBC848Wnpn 30 V SOT323
V2504200917TransistorBC848B/BCW32npn 30 V 100 mA SOT23
V2514211264MosFet2SJ16SOT23
V2524210102TransistorBC858Wpnp 30 V 100 mA 200MWSOT323
V2534110014Sch. diode x 2BAS70–0770 V 15 mA SOT143
V2704117998Precision voltage reference 4.0964.096
V5004210052TransistorDTC1 14EEnpn RB V EM3
V5014210046TransistorBFP182npn 20 V 35 mA SOT143
V5024210066TransistorBFR93AWnpn 12 V 35 mA SOT323
V5034210046TransistorBFP182npn 20 V 35 mA SOT143
V5044115802Sch. diode x 24V30 mA SOT23
V5054210066TransistorBFR93AWnpn 12 V 35 mA SOT323
Copyright Nokia Mobile Phones
8–43
SYSTEM MODULE DS9
NHK–1
9712OJ
Technical Documentation
V5074217070Transistor x 2IMD
V5094210050TransistorDTA114EEpnp RB V EM3
V6004210066TransistorBFR93AWnpn 12 V 35 mA SOT323
V6014110062Cap. diodeBB53530 V 2.1/18.7PFSOD323
V6024210066TransistorBFR93AWnpn 12 V 35 mA SOT323
V6034210066TransistorBFR93AWnpn 12 V 35 mA SOT323
V8004115802Sch. diode x 24V30 mA SOT23
V8014210046TransistorBFP182npn 20 V 35 mA SOT143
V8024211288MosFetp–ch 12 V SOT89
V8034200917TransistorBC848B/BCW32npn 30 V 100 mA SOT23
V8044217070Transistor x 2IMD
V8054200917TransistorBC848B/BCW32npn 30 V 100 mA SOT23
V8064110014Sch. diode x 2BAS70–0770 V 15 mA SOT143
V8074219916Transistor x 2FMS1pnp CE V 0.1 A FMT
V8084200917TransistorBC848B/BCW32npn 30 V 100 mA SOT23
V8094200917TransistorBC848B/BCW32npn 30 V 100 mA SOT23
V8104219920Transistor x 2FMW2npn CB V 0.1 A FMT
V8114211288MosFetp–ch 12 V SOT89
V8124200917TransistorBC848B/BCW32npn 30 V 100 mA SOT23
V8134217070Transistor x 2IMD
V9064210046TransistorBFP182npn 20 V 35 mA SOT143
D1814346010IC, SRAM32kx8 bit 70 ns TSOP28
D1844342282M28c64C150 EEPROM 8KX8
150NSTSO2150NSTSO28
D1854340146IC, flash memoryE28F008TSO40
D1914340126IC, 1xnand 2input cmos ssTC7S00FSSO5
D1924340126IC, 1xnand 2input cmos ssTC7S00FSSO5
D2004372212IC, ROMDSP1616–X11TQFP100
D2104346012IC, SRAM32kx8 bit 70 ns TSO28
D2114346010IC, SRAM32kx8 bit 70 ns TSOP28
D2304375070IC, ESA GSM/PCN ASICSQFP144
D2314375144IC, MCUSQFP80
N2604343132IC, PCM coded/filterST5080SO28W
N2704370015IC, ASICSQFP64
N2714375588IC, PSL+ power supplySO24W
N5014349626IC, v1.3 gsm/pcn rx vsoPMB2403SVSO24
N5024349648IC, if amp 100mhz ssoW1466BBLSSO14
N6004349660IC, PLLPMB2306TSO14S
N6014342466IC, prescaleruPB587GSO8/W4.4MM
N7014349660IC, PLLPMB2306TSO14S
N7024342472IC, prescalerMC12034ASO8S
N8004349620IC, modulatorPMB2205SVSO20
N8014349668IC, RF amp.G23DB/1GHZMM6
N8024359020IC, pow.amp.2W6 W PCN
N8034349576IC, v.conv+1.5–12vto neg soICL7660SO8
N9004340088IC, regulatorTK115474.75 V 180 mA SO8S
N9014340088IC, regulatorTK115474.75 V 180 mA SO8S
X0014510044Crystal60.2 M