NEC Electronics Inc UPA672T Datasheet
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DATA SHEET
MOS FIELD EFFECT TRANSISTOR
μPA672T
N-CHANNEL MOS FET ARRAY
FOR SWITCHING
The μPA672T is a super-mini-mold device provided with two MOS FET elements. It achieves high-density mounting and saves mounting costs.
FEATURES
•Two MOS FET circuits in package the same size as SC-70
•Automatic mounting supported
PACKAGE DIMENSIONS (in millimeters)
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0.2 –0+0.1 |
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0.15 |
+0.1 |
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–0.05 |
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±0.1 |
±0.1 |
6 |
5 |
4 |
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0 to 0.1 |
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2.1 |
1.25 |
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1 |
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3 |
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0.65 |
0.65 |
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0.7 |
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1.30.9 ±0.1
2.0±0.2
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PIN CONNECTION |
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6 |
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5 |
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1. |
Source 1 (S1) |
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2. |
Gate 1 |
(G1) |
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3. |
Drain 2 |
(D2) |
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4. |
Source 2 (S2) |
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5. |
Gate 2 |
(G2) |
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6. |
Drain 1 |
(D1) |
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Marking: MA |
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1 |
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2 |
3 |
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ABSOLUTE MAXIMUM RATINGS (TA = 25 ˚C) |
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PARAMETER |
SYMBOL |
TEST CONDITIONS |
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RATINGS |
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UNIT |
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Drain to Source Voltage |
VDSS |
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50 |
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V |
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Gate to Source Voltage |
VGSS |
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±7.0 |
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V |
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Drain Current (DC) |
ID(DC) |
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100 |
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mA |
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Drain Current (pulse) |
ID(pulse) |
PW ≤ 10 ms, Duty Cycle ≤ 50 % |
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200 |
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mA |
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Total Power Dissipation |
PT |
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200 (Total) |
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mW |
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Channel Temperature |
Tch |
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150 |
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˚C |
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Storage Temperature |
Tstg |
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–55 to +150 |
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˚C |
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Document No. G11259EJ1V0DS00 (1st edition) |
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Date Published June 1996 P |
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Printed in Japan |
© |
1996 |
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μPA672T |
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ELECTRICAL CHARACTERISTICS (TA = 25 ˚C) |
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PARAMETER |
SYMBOL |
TEST CONDITIONS |
MIN. |
TYP. |
MAX. |
UNIT |
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Drain Cut-off Current |
IDSS |
VDS = 50 V, VGS = 0 |
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10 |
μA |
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Gate Leakage Current |
IGSS |
VGS = ±7.0 V, VDS = 0 |
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±5.0 |
μA |
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Gate Cut-off Voltage |
VGS(off) |
VDS = 3.0 V, ID = 1.0 μA |
0.7 |
1.0 |
1.5 |
V |
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Forward Transfer Admittance |
|yfs| |
VDS = 3.0 V, ID = 10 mA |
20 |
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mS |
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Drain to Source On-State Resistance |
RDS(on)1 |
VGS = 2.5 V, ID = 10 mA |
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20 |
40 |
Ω |
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Drain to Source On-State Resistance |
RDS(on)2 |
VGS = 4.0 V, ID = 10 mA |
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15 |
20 |
Ω |
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Input Capacitance |
Ciss |
VDS = 3.0 V, VGS = 0, f = 1.0 MHz |
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6 |
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pF |
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Output Capacitance |
Coss |
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8 |
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pF |
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Reverse Transfer Capacitance |
Crss |
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1.2 |
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pF |
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Turn-On Delay Time |
td(on) |
VDD = 3 V, ID = 20 mA, VGS(on) = 3 V, |
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9 |
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ns |
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RG = 10 Ω, RL = 120 Ω |
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Rise Time |
tr |
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50 |
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ns |
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Turn-Off Delay Time |
td(off) |
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20 |
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ns |
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Fall Time |
tf |
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40 |
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ns |
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SWITCHING TIME MEASUREMENT CIRCUIT AND CONDITIONS
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VGS |
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90 % |
RL |
Gate |
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VGS(on) |
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10 % |
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DUT |
voltage |
0 |
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waveform |
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VDD |
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90 % |
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RG |
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ID |
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90 % |
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PG. |
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ID |
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Drain |
0 |
10 % |
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10 % |
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current |
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waveform |
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VGS |
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td(on) |
tr |
td(off) |
tf |
0 |
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τ |
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ton |
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toff |
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τ = 1μs |
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Duty Cycle ≤ 1 % |
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2