NEC UPA672T Datasheet
DATA SHEET
MOS FIELD EFFECT TRANSISTOR
N-CHANNEL MOS FET ARRAY
FOR SWITCHING
µ
PA672T
The µPA672T is a super-mini-mold device provided
with two MOS FET elements. It achieves high-density
mounting and saves mounting costs.
FEATURES
• Two MOS FET circuits in package the same size as
SC-70
• Automatic mounting supported
PACKAGE DIMENSIONS (in millimeters)
2.1 ±0.1
1.25 ±0.1
0.2
6
1
0.65
+0.1
–0
5
2
0.65
1.3
2.0 ±0.2
4
3
0.15
0.9 ±0.1
+0.1
–0.05
0.7
0 to 0.1
PIN CONNECTION
654
Source 1
123
1.
Gate 1
2.
Drain 2
3.
Source 2
4.
Gate 2
5.
Drain 1
6.
Marking: MA
(S1)
(G1)
(D2)
(S2)
(G2)
(D1)
ABSOLUTE MAXIMUM RATINGS (TA = 25 ˚C)
PARAMETER SYMBOL TEST CONDITIONS RATINGS UNIT
Drain to Source Voltage VDSS 50 V
Gate to Source Voltage VGSS ±7.0 V
Drain Current (DC) ID(DC) 100 mA
Drain Current (pulse) ID(pulse) PW ≤ 10 ms, Duty Cycle ≤ 50 % 200 mA
Total Power Dissipation PT 200 (Total) mW
Channel Temperature Tch 150 ˚C
Storage Temperature Tstg –55 to +150 ˚C
Document No. G11259EJ1V0DS00 (1st edition)
Date Published June 1996 P
Printed in Japan
©
1996
µ
PA672T
ELECTRICAL CHARACTERISTICS (TA = 25 ˚C)
PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Drain Cut-off Current IDSS VDS = 50 V, VGS = 0 10
Gate Leakage Current IGSS VGS = ±7.0 V, VDS = 0 ±5.0
Gate Cut-off Voltage VGS(off) VDS = 3.0 V, ID = 1.0 µA 0.7 1.0 1.5 V
Forward Transfer Admittance |yfs|VDS = 3.0 V, ID = 10 mA 20 mS
Drain to Source On-State Resistance
Drain to Source On-State Resistance
RDS(on)1 VGS = 2.5 V, ID = 10 mA 20 40 Ω
RDS(on)2 VGS = 4.0 V, ID = 10 mA 15 20 Ω
Input Capacitance Ciss VDS = 3.0 V, VGS = 0, f = 1.0 MHz 6 pF
Output Capacitance Coss 8pF
Reverse Transfer Capacitance Crss 1.2 pF
Turn-On Delay Time td(on) VDD = 3 V, ID = 20 mA, VGS(on) = 3 V, 9 ns
Rise Time tr
RG = 10 Ω, RL = 120 Ω
50 ns
Turn-Off Delay Time td(off) 20 ns
Fall Time tf 40 ns
µ
A
µ
A
SWITCHING TIME MEASUREMENT CIRCUIT AND CONDITIONS
V
GS
Gate
voltage
waveform
DD
I
D
Drain
current
waveform
PG.
V
GS
0
τ = 1 s
Duty Cycle ≤ 1 %
R
DUT
L
V
G
R
τ
µ
0
0
10 %
t
d(on)
90 %
t
on
V
I
trt
GS(on)
D
d(off)
90 %
t
off
90 %
10 %10 %
t
f
2
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