MXIC MX23L12811TC-12, MX23L12811TC-10, MX23L12811RC-12, MX23L12811RC-10 Datasheet

PRELIMINARY

MX23L12811

NEW 128M-BIT (16M x 8 / 8M x 16) MASK ROM WITH PAGE MODE (TSOPPACKAGE)

FEATURES

• Bit organization	• Supply voltage
- 16M x 8 (byte mode)	- 2.7V~3.6V for 120ns
- 8M x 16 (word mode)	- 3.0V~3.6V for 100ns
• Fast access time	• Package
- Random access: 100ns (max.)	- 48 pin TSOP (12mm x 20mm)
- Page access: 30ns (max.)	- 48 pin TSOP reverse type
• Page size	• Temperature
- 8 words per page	- 0 ~ 70°C
• Current
- Operating:40mA
- Standby:15uA

PIN CONFIGURATION

48 TSOP (Normal Type)

BYTE			1
A16			2
A15			3
A14			4
A13			5
A12			6
A11			7
A10			8
A9			9
A8			10
A19			11	MX23L12811
A21			12
A20			13	(Normal Type)
A18			14
A17			15
A7			16
A6			17
A5			18
A4			19
A3			20
A2			21
A1			22
A0			23
CE			24

48 VSS

47 VSS

46 D15/A-1

45 D7

44 D14

43 D6

42 D13

41 D5

40 D12

39 D4

38 VCC

37 VCC

36 A22

35 D11

34 D3

33 D10

32 D2

31 D9

30 D1

29 D8

28 D0

27 OE

26 VSS

25 VSS

48TSOP (Reverse Type)

VSS			48
VSS			47
D15/A-1			46
D7			45
D14			44
D6			43
D13			42
D5			41
D12			40
D4			39
VCC			38	MX23L12811
VCC			37
A22			36	(Reverse Type)
D11			35
D3			34
D10			33
D2			32
D9			31
D1			30
D8			29
D0			28
OE			27
VSS			26
VSS			25

1 BYTE

2 A16

3 A15

4 A14

5 A13

6 A12

7 A11

8 A10

9 A9

10 A8

11 A19

12 VSS

13 A20

14 A18

15 A17

16 A7

17 A6

18 A5

19 A4

20 A3

21 A2

22 A1

23 A0

24 CE

P/N:PM0594

REV. 1.7, OCT. 12, 2001

1

MX23L12811

PIN DESCRIPTION

Symbol			Pin Function
A0~A22			Address Inputs
D0~D14			Data Outputs
D15/A-1			D15 (Word Mode)/ LSB Address
			(Byte Mode)
			Chip Enable Input
	CE

	Symbol				Pin Function
		OE			Output Enable Input
					Word/ Byte Mode Selection
	Byte
	VCC				Power Supply Pin
	VSS				Ground Pin
	NC				No Connection

ORDER INFORMATION

Part No.	AccessTime	Page Time	Package	VCC
MX23L12811TC-10	100ns	30ns	48 pin TSOP	3.0V~3.6V
MX23L12811TC-12	120ns	30ns	48 pin TSOP	3.0V~3.6V
*MX23L12811TC-12	120ns	30ns	48 pin TSOP	2.7V~3.6V
				(under development)
MX23L12811RC-10	100ns	30ns	48 pin TSOP (Reverse type)	3.0V~3.6V
MX23L12811RC-12	120ns	30ns	48 pin TSOP (Reverse type)	3.0V~3.6V
*MX23L12811RC-12	120ns	30ns	48 pin TSOP (Reverse type)	2.7V~3.6V
				(under development)

MODE SELECTION

CE	OE	Byte	D15/A-1	D0~D7	D8~D15	Mode	Power
H	X	X	X	High Z	High Z	-	Stand-by
L	H	X	X	High Z	High Z	-	Active
L	L	H	Output	D0~D7	D8~D15	Word	Active
L	L	L	Input	D0~D7	High Z	Byte	Active

BLOCK DIAGRAM

A0/(A-1)

A2

A3

D0

Address

Memory

Page

Page

Word/

Output

Buffer

Array

Buffer

Decoder

Byte

Buffer

A22

D15/(D7)

CE

BYTE

OE

P/N:PM0594

REV. 1.7, OCT. 12, 2001

2

		MX23L12811
ABSOLUTE MAXIMUM RATINGS
Item	Symbol	Ratings
Voltage on any Pin Relative to VSS	VIN	-1.3V to VCC+2.0V (Note)
Ambient Operating Temperature	Topr	0°C to 70°C
Storage Temperature	Tstg	-65°C to 125°C

Note: Minimum DC voltage on input or I/O pins is -0.5V. During voltage transitions, inputs may undershoot VSS to - 1.3V for periods of up to 20ns. Maximum DC voltage on input or I/O pins is VCC+0.5V. During voltage transitions, inputs may overshoot VCC to VCC+2.0V for periods of up to 20ns.

DC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC =2.7V~3.6V)

Item	Symbol	MIN.	MAX.	Conditions
Output High Voltage	VOH	2.4V	-	IOH = -0.4mA
Output Low Voltage	VOL	-	0.4V	IOL = 1.6mA
Input High Voltage	VIH	2.2V	VCC+0.3V
Input Low Voltage	VIL	-0.3V	0.2 x VCC
Input Leakage Current	ILI	-	5uA	0V, VCC
Output Leakage Current	ILO	-	5uA	0V, VCC
Operating Current	ICC	-	40mA	f=5MHz, all outputs open,
						CE=VIL(Chip Enable)
							OE=VIH(Output Disabled)
Standby Current (TTL)	ISTB1	-	1mA						= VIH
				CE
Standby Current (CMOS)	ISTB2	-	15uA
					CE>VCC-0.2V
Input Capacitance	CIN	-	10pF	Ta = 25°C, f = 1MHZ
Output Capacitance	COUT	-	10pF	Ta = 25°C, f = 1MHZ

AC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 2.7V~3.6V)

Item	Symbol	23L12811-10		23L12811-12
		MIN.	MAX.	MIN.	MAX.
Read Cycle Time	tRC	100ns	-	120ns	-
Address Access Time	tAA	-	100ns	-	120ns
Chip Enable Access Time	tACE	-	100ns	-	120ns
Page Mode Access Time	tPA	-	30ns	-	30ns
Output Enable Time	tOE	-	30ns	-	30ns
Output Hold After Address	tOH	0ns	-	0ns	-
Output High Z Delay	tHZ	-	20ns	-	20ns

Note: Output high-impedance delay (tHZ) is measured from OE or CE going high, and this parameter guaranteed by design over the full voltage and temperature operating range - not tested.

P/N:PM0594

REV. 1.7, OCT. 12, 2001

3