PRELIMINARY
MX23L12811
NEW 128M-BIT (16M x 8 / 8M x 16) MASK ROM WITH PAGE MODE (TSOPPACKAGE)
FEATURES
• Bit organization |
• Supply voltage |
- 16M x 8 (byte mode) |
- 2.7V~3.6V for 120ns |
- 8M x 16 (word mode) |
- 3.0V~3.6V for 100ns |
• Fast access time |
• Package |
- Random access: 100ns (max.) |
- 48 pin TSOP (12mm x 20mm) |
- Page access: 30ns (max.) |
- 48 pin TSOP reverse type |
• Page size |
• Temperature |
- 8 words per page |
- 0 ~ 70°C |
• Current |
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- Operating:40mA |
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- Standby:15uA |
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PIN CONFIGURATION
48 TSOP (Normal Type)
BYTE |
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1 |
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A16 |
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2 |
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A15 |
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3 |
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A14 |
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4 |
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A13 |
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5 |
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A12 |
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6 |
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A11 |
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7 |
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A10 |
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8 |
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A9 |
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9 |
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A8 |
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10 |
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A19 |
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11 |
MX23L12811 |
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A21 |
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12 |
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A20 |
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13 |
(Normal Type) |
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A18 |
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14 |
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A17 |
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15 |
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A7 |
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16 |
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A6 |
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17 |
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A5 |
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18 |
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A4 |
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19 |
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A3 |
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20 |
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A2 |
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21 |
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A1 |
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22 |
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A0 |
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23 |
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CE |
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24 |
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48 
VSS
47 
VSS
46 
D15/A-1
45 
D7
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D14
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D6
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D13
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D5
40 
D12
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D4
38 
VCC
37 
VCC
36 
A22
35 
D11
34 
D3
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D10
32 
D2
31 
D9
30 
D1
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D8
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D0
27 
OE
26 
VSS
25 
VSS
48TSOP (Reverse Type)
VSS |
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48 |
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VSS |
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47 |
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D15/A-1 |
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46 |
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D7 |
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45 |
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D14 |
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44 |
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D6 |
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43 |
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D13 |
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42 |
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D5 |
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41 |
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D12 |
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40 |
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D4 |
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39 |
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VCC |
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38 |
MX23L12811 |
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VCC |
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37 |
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A22 |
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36 |
(Reverse Type) |
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D11 |
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35 |
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D3 |
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34 |
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D10 |
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33 |
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D2 |
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32 |
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D9 |
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31 |
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D1 |
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30 |
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D8 |
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29 |
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D0 |
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28 |
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OE |
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27 |
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VSS |
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26 |
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VSS |
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25 |
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1 
BYTE
2 
A16
3 
A15
4 
A14
5 
A13
6 
A12
7 
A11
8 
A10
9 
A9
10 
A8
11 
A19
12 
VSS
13 
A20
14 
A18
15 
A17
16 
A7
17 
A6
18 
A5
19 
A4
20 
A3
21 
A2
22 
A1
23 
A0
24 
CE
P/N:PM0594 |
REV. 1.7, OCT. 12, 2001 |
1
MX23L12811
PIN DESCRIPTION
Symbol |
Pin Function |
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A0~A22 |
Address Inputs |
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D0~D14 |
Data Outputs |
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D15/A-1 |
D15 (Word Mode)/ LSB Address |
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(Byte Mode) |
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Chip Enable Input |
CE |
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Symbol |
Pin Function |
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OE |
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Output Enable Input |
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Word/ Byte Mode Selection |
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Byte |
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VCC |
Power Supply Pin |
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VSS |
Ground Pin |
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NC |
No Connection |
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ORDER INFORMATION
Part No. |
AccessTime |
Page Time |
Package |
VCC |
MX23L12811TC-10 |
100ns |
30ns |
48 pin TSOP |
3.0V~3.6V |
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MX23L12811TC-12 |
120ns |
30ns |
48 pin TSOP |
3.0V~3.6V |
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*MX23L12811TC-12 |
120ns |
30ns |
48 pin TSOP |
2.7V~3.6V |
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(under development) |
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MX23L12811RC-10 |
100ns |
30ns |
48 pin TSOP (Reverse type) |
3.0V~3.6V |
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MX23L12811RC-12 |
120ns |
30ns |
48 pin TSOP (Reverse type) |
3.0V~3.6V |
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*MX23L12811RC-12 |
120ns |
30ns |
48 pin TSOP (Reverse type) |
2.7V~3.6V |
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(under development) |
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MODE SELECTION
CE |
OE |
Byte |
D15/A-1 |
D0~D7 |
D8~D15 |
Mode |
Power |
H |
X |
X |
X |
High Z |
High Z |
- |
Stand-by |
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L |
H |
X |
X |
High Z |
High Z |
- |
Active |
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L |
L |
H |
Output |
D0~D7 |
D8~D15 |
Word |
Active |
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L |
L |
L |
Input |
D0~D7 |
High Z |
Byte |
Active |
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BLOCK DIAGRAM
A0/(A-1) |
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A2 |
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A3 |
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D0 |
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Address |
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Memory |
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Page |
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Page |
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Word/ |
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Output |
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Buffer |
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Array |
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Buffer |
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Decoder |
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Byte |
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Buffer |
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A22 |
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D15/(D7) |
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CE
BYTE
OE
P/N:PM0594 |
REV. 1.7, OCT. 12, 2001 |
2
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MX23L12811 |
ABSOLUTE MAXIMUM RATINGS |
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Item |
Symbol |
Ratings |
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Voltage on any Pin Relative to VSS |
VIN |
-1.3V to VCC+2.0V (Note) |
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Ambient Operating Temperature |
Topr |
0°C to 70°C |
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Storage Temperature |
Tstg |
-65°C to 125°C |
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Note: Minimum DC voltage on input or I/O pins is -0.5V. During voltage transitions, inputs may undershoot VSS to - 1.3V for periods of up to 20ns. Maximum DC voltage on input or I/O pins is VCC+0.5V. During voltage transitions, inputs may overshoot VCC to VCC+2.0V for periods of up to 20ns.
DC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC =2.7V~3.6V)
Item |
Symbol |
MIN. |
MAX. |
Conditions |
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Output High Voltage |
VOH |
2.4V |
- |
IOH = -0.4mA |
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Output Low Voltage |
VOL |
- |
0.4V |
IOL = 1.6mA |
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Input High Voltage |
VIH |
2.2V |
VCC+0.3V |
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Input Low Voltage |
VIL |
-0.3V |
0.2 x VCC |
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Input Leakage Current |
ILI |
- |
5uA |
0V, VCC |
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Output Leakage Current |
ILO |
- |
5uA |
0V, VCC |
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Operating Current |
ICC |
- |
40mA |
f=5MHz, all outputs open, |
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CE=VIL(Chip Enable) |
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OE=VIH(Output Disabled) |
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Standby Current (TTL) |
ISTB1 |
- |
1mA |
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= VIH |
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CE |
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Standby Current (CMOS) |
ISTB2 |
- |
15uA |
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CE>VCC-0.2V |
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Input Capacitance |
CIN |
- |
10pF |
Ta = 25°C, f = 1MHZ |
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Output Capacitance |
COUT |
- |
10pF |
Ta = 25°C, f = 1MHZ |
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AC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 2.7V~3.6V)
Item |
Symbol |
23L12811-10 |
23L12811-12 |
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MIN. |
MAX. |
MIN. |
MAX. |
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Read Cycle Time |
tRC |
100ns |
- |
120ns |
- |
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Address Access Time |
tAA |
- |
100ns |
- |
120ns |
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Chip Enable Access Time |
tACE |
- |
100ns |
- |
120ns |
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Page Mode Access Time |
tPA |
- |
30ns |
- |
30ns |
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Output Enable Time |
tOE |
- |
30ns |
- |
30ns |
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Output Hold After Address |
tOH |
0ns |
- |
0ns |
- |
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Output High Z Delay |
tHZ |
- |
20ns |
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20ns |
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Note: Output high-impedance delay (tHZ) is measured from OE or CE going high, and this parameter guaranteed by design over the full voltage and temperature operating range - not tested.
P/N:PM0594 |
REV. 1.7, OCT. 12, 2001 |
3
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