Datasheet LB1987M, LB1987H, LB1987D, LB1987 Datasheet (SANYO)

Page 1
Ordering number : ENN6109A
81299RM (OT) No. 6109-1/17
Overview
The LB1987, LB1987D, LB1987M, and LB1987H are optimal capstan motor drivers for use in VCR sets.
Functions
• Three-phase full-wave current-linear drive
• Current limiter circuit with control characteristics gain switching
• Oversaturation prevention circuits for both the upper and lower sides of the output stage (No external capacitors are required.)
• FG amplifier
• Thermal shutdown circuit
Package Dimensions
unit: mm
3240-QFP34H-B
3147B-DIP28H
3129-MFP36S-LF
3233-HSOP28H
1
14
28
15
0.4
0.6
4.04.0
27.0
20.0
R1.7
8.4
1.93 1.78
1.0
12.7
11.2
SANYO: DIP28H
[LB1987D]
0.25
15.3
118
36
19
0.85
0.4
0.8
2.5max
2.250.1
7.9
9.2
10.5
0.65
SANYO: MFP36S-LF
[LB1987M]
6.2
28 15
114
0.8
15.3
2.7
0.3
4.9
1.3
10.5
0.65
0.25
0.85
7.9
2.25
2.5max
0.1
SANYO: HSOP28H
[LB1987H]
34
13.2
10.0
1.0
0.8
16
7
17
1823
24
13.2
10.0
0.8
4.8
1.0
1.6
1.0
2.2
8.4
0.35
1.6
0.1
4.0
0.2
SANYO: QFP34H-B
[LB1987]
LB1987, 1987D, 1987M, 1987H
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
Three-Phase Brushless Motor Driver
for VCR Capstan Motors
Monolithic Digital IC
Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft’s control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein.
Page 2
No. 6109-2/17
LB1987, 1987D, 1987M, 1987H
Parameter Symbol Conditions Ratings Unit
Maximum supply voltage
V
CC
max 7V
V
S
max 24 V
Maximum output current I
O
max 1.3 A
(LB1987) 0.77 W
Allowable power dissipation Pd max
(LB1987D) 3.0 W (LB1987M) 0.95 W
(LB1987H) 0.77 W Operating temperature Topr –20 to +75 °C Storage temperature Tstg –55 to +150 °C
Specifications
Absolute Maximum Ratings at Ta = 25°C
Parameter Symbol Conditions Ratings Unit
Supply voltage
V
S
5 to 22 V
V
CC
4.5 to 5.5 V
Hall input amplitude V
HALL
Between Hall inputs ±30 to ±80 mVo-p GSENSE pin input range V
GSENSE
Relative to the control system ground –0.20 to +0.20 V
Allowable Operating Ranges at Ta = 25°C
Parameter Symbol Conditions
Ratings
Unit
min typ max
V
CC
current drain I
CC
RL = , V
CTL
= 0 V (Quiescent) 12 18 mA
[Outputs]
Vosat1
I
O
= 500 mA, Rf = 0.5 , Sink + Source,
2.1 2.6 V
Output saturation voltage
V
CTL
= V
LIM
= 5 V (With saturation prevention)
Vosat2
I
O
= 1.0 A, Rf = 0.5 , Sink + Source,
2.6 3.5 V
V
CTL
= V
LIM
= 5 V (With saturation prevention)
Output leakage current I
O
leak 1.0 mA
[FR]
FR pin input threshold voltage V
FSR
2.25 2.50 2.75 V
FR pin input bias current Ib(FSR) –5.0 µA
[Control]
CTLREF pin voltage V
CREF
2.37 2.50 2.63 V
CTLREF pin input range V
CREF
IN 1.70 3.50 V
CTL pin input bias current Ib(CTL) V
CTL
= 5 V, CTLREF: open 8.0 µA
CTL pin control start voltage V
CTL
(ST)
Rf = 0.5 , V
LIM
= 5 V, IO≥ 10 mA
2.20 2.35 2.50 V
With the Hall input logic states fixed at (U, V, W = H, H, L)
CTL pin control switching voltage V
CTL
(ST2) Rf = 0.5 , V
LIM
= 5 V 3.00 3.15 3.30 V
CTL pin control Gm1 Gm1(CTL)
Rf = 0.5 , I
O
= 200 mA
0.52 0.65 0.78 A/V
With the Hall input logic states fixed at (U, V, W = H, H, L)
CTL pin control Gm2 Gm2(CTL)
Rf = 0.5 , V
CTL
= 200 mV
1.20 1.50 1.80 A/V
With the Hall input logic states fixed at (U, V, W = H, H, L)
[Current Limiter]
LIM current limiter offset voltage Voff(LIM)
Rf = 0.5 , V
CTL
= 5 V, IO≥ 10 mA
140 200 260 mV
With the Hall input logic states fixed at (U, V, W = H, H, L)
LIM pin input bias current Ib(LIM) V
CTL
= 5 V, V
CREF
: open, V
LIM
= 0 V –2.5 µA
LIM pin current limit level I
LIM
Rf = 0.5 , V
CTL
= 5 V, V
LIM
= 2.06 V
830 900 970 mA
With the Hall input logic states fixed at (U, V, W = H, H, L)
[Hall Amplifiers]
Input offset voltage Voff(HALL) –6 +6 mV Input bias current Ib(HALL) 1.0 3.0 µA Common-mode input voltage
Vcm(HALL)
1.3 3.3 V
Torque ripple correction ratio TRC
At the bottom and top of the Rf waveform
9%
when IO= 200 mA. (Rf = 0.5 ) (Note 1)
[FG Amplifier]
FG amplifier input offset voltage Voff(FG) –8 +8 mV FG amplifier input bias current Ib(FG) –100 nA FG amplifier output saturation voltage
Vosat(FG) At the sink side internal pull-up resistor. 0.5 V
FG amplifier common-mode input voltage
VCM(FG) 0.5 4.0 V
Electrical Characteristics at Ta = 25°C, VCC= 5 V, VS= 15 V
Continued on next page.
Page 3
No. 6109-3/17
LB1987, 1987D, 1987M, 1987H
Continued from preceding page.
Note: * Items marked with an asterisk are design target values and are not measured.
Note: 1. The torque ripple correction ratio is determined from the Rf voltage waveform as shown below.
Parameter Symbol Conditions
Ratings
Unit
min typ max
[Saturation Prevention]
Saturation prevention circuit
Vosat(DET)
IO= 10 mA, Rf = 0.5 ,
0.175 0.25 0.325 V
lower side voltage setting V
CTL
= L
VIM
= 5 V,
The voltage between each OUT and Rf.
[Schmitt Amplifier]
Duty ratio DUTY Under the specified conditions 47 50 53 % Upper side output saturation voltage
Vsatu(SH) 4.8 V
Lower side output saturation voltage
Vsatd(SH) 0.2 V Hysteresis Vhys 32 50 60 mV Thermal shutdown operating
T-TSD * 170 °C
temperature
Hall Logic Settings
2 · (Vp – Vb)
Correction ratio = ——————— 100 · (%)
Vp + Vb
Truth Table and Control Functions
Source sink
Hall input
FR
UVW
1
V → W
HHL
H
W VL
2
U W
HLL
H
W UL
3
U V
HLH
H
V UL
4
W → V
LLH
H
V WL
5
W → U
LHH
H
U WL
6
V → U
LHL
H
U VL
Note: 1. The “H” state for FR means a voltage of 2.75 V or higher, and the “L”
state means a voltage of 2.25 V or lower. (When V
CC
= 5 V.)
2. For the Hall inputs, the input “H” state means the state in which the (+) input for that phase is at least 0.01 V higher than the (–) input for that phase. Similarly, the “L” state means the state in which the (+) input for that phase is at least 0.01 V lower than the (–) input for that phase.
3. Since this drive technique is a 180° power application technique, the phase that is neither the source phase nor the sink phase does not turn completely off.
Vp
Vb
123456
GND level
A12204
Page 4
Pin Function Equivalent circuit diagram
Control and Current Limiting Functions
No. 6109-4/17
LB1987, 1987D, 1987M, 1987H
V
LIM
= 5 V
CTLREF: OPEN
I
OUT
Gm2 = 1.50 A/Vtyp
Gm1 = 0.65 A/Vty
p
V
CTL
2.35 Vtyp 3.15 Vtyp
01
2
345
I
OUT
V
CTL
= 5 V
CTLREF: OPEN
V
LIM
200 mVtyp
01
2
345
Control characteristics Current limiting characteristics
Slope = 0.50 A/V typ
V
LIM
= 5 V
CTLREF: open
Gm2 = 1.50 A/V typ
Gm1 = 0.65 A/V typ
2.35 V typ 3.15 V typ 200 mV typ
(+) inputs (–) inputs
Lower side oversaturation prevention circuit input block
OUT for each phase
V
CTL
= 5 V
CTLREF: open
Pin Functions
U phase Hall element input. Logic H refers to the state where IN
+
> IN
UIN+ U
IN
A12207
200
100 µA
200
A12208
150 µA
V
CC
Vs
30 k
Rf(POWER)
Rf(SENSE)
200 k
200
10 µA
V
CC
V phase Hall element input. Logic H refers to the state where IN
+
> IN
VIN+ V
IN
W phase Hall element input. Logic H refers to the state where IN
+
> IN
WIN+ W
IN
U phase output. V phase output. (These pins include internal spark killer diodes.) W phase output.
U
OUT
V
OUT
W
OUT
A12209
200
200 µA
V
CC
max
LIM
100 µA
200 200
CTL
V
CC
V
CC
5 k
5 k
CTLREF
Speed control. This circuit implements constant current drive based on current feedback from the Rf pin. Gm = 0.58 A/V typ at Rf = 0.5
CTL
Current limiter function control. The output current can be modified linearly by the voltage on this pin. Slope = 0.5 A/V typ at Rf = 0.5
LIM
CTLREF
(LB1987/D)
Output block power supply.
V
S
Rf(POWER)
Rf(SENSE)
Output current detection. Current feedback is applied to the control block by inserting the resistor Rf between these pins and ground. Also, both the lower side saturation prevention circuit and the torque ripple correction circuit operate according to the voltage on this pin. In particular, since this voltage sets the oversaturation prevention level, the lower side oversaturation prevention operation can be degraded if the value of this resistor is set too low. Note that the PWR pin and the SENSE pin must be connected together.
Continued on next page.
Page 5
No. 6109-5/17
LB1987, 1987D, 1987M, 1987H
Continued from preceding page.
Pin Function Equivalent circuit diagram
Forward/reverse selection. The direction (forward or reverse) is selected by the voltage applied to this pin. (Vth = 2.5 Vtyp at V
CC
= 5 V)
FR
A12210
200
FR
200 µA
1/2 V
CC
V
CC
V
CC
V
CC
V
CC
ADJ
10 k
6 k
10 k
500
6 k
10 k
10 k
20 µA
Input used when the FG amplifier inverting input is used. Connect a feedback resistor between the FG
OUT
pin and this pin.
FG
IN
300 300
5 µA
FGin(–) FGin(+)
A12211
10 k
2 k
300
100
FGOUT
VCCV
CC
V
CC
10 k
FC
A12212
10 k
5 k
FGS
VCCV
CC
V
CC
A12517
13.2 k
GSENSE
A12518
Non-inverting input used when the FG amplifier is used as a differential input amplifier. No bias is applied internally.
FG
IN
+
FG amplifier output. This pin includes an internal load resistor.
FG
OUT
Speed control loop frequency characteristics correction.FC
Ground for all systems other than the output transistors. Note that the lowest potential of the output transistors is determined by the Rf pin.
GND
FG pulse output. This pin includes an internal load resistor. (The output impedance is about 3 k.)
FGS
Power supply for all IC internal circuits other than the output block. This power supply must be stabilized to prevent ripple or other noise from entering the circuit.
V
CC
Ground sensing. The influence of the common ground impedance on Rf can be excluded by connecting this pin to ground near the Rf resistor side of the motor ground wiring that includes Rf. (This pin must not be left open.)
GSENSE
External torque ripple correction ratio adjustment. To adjust the correction ratio, apply the stipulated voltage to the ADJ pin from a low-impedance external circuit. If the applied voltage is increased, the correction ratio falls, and if the applied voltage is lowered, the correction ratio increases. The range of variation is from 0 to two times the correction ratio when the pin is left open. (This pin is set to about V
CC
/2 internally, and has an input impedance of
about 5 k.)
ADJ
Page 6
Pin Assignment
No. 6109-6/17
LB1987, 1987D, 1987M, 1987H
34
33
32
23
31
30
29
28
27
26
25
24
GND22Vs21FRAME
20
FRAME19V
CC
18
123 456
W
IN
FR
GSENSE
RF(SENSE)
W
OUT
V
OUT
U
OUT
RF(PWR)
GND
FRAME
FRAME
FG
IN
FG
IN
+
FG
OUT
FGS
CTL
CTLREF
FC
U
IN
+
U
IN
V
IN
+
V
IN
W
IN
+
LIM
LB1987
Top view
A12217
7
8
9
10
11
12
13
14
15
16
17
Note: The FRAME pins must be connected to ground for ground potential stabilization.
0
0.4
0.2
0.6
0.8
1.0
–20 0 20 40 60 10080
Pd max — Ta
0.77 W
0.46 W
Allowable power dissipation, Pdmax — W
Ambient temperature, Ta — °C
Page 7
Pin Assignment
No. 6109-7/17
LB1987, 1987D, 1987M, 1987H
1 2
3 4
5
6 7
8 9
10
11
12
13 14
28 27 26 25 24 23 22 21 20 19 18 17 16 15
LB1987D
FG
IN
GND
FR
GSENSE
RF(SENSE)
W
OUT
V
OUT
U
OUT
RF(PWR)
GND
VS
FG
IN
+
FG
OUT
FGS
CTL
CTLREF
LIM
FC
U
IN
+
U
IN
V
IN
+
V
IN
W
IN
+
W
IN
V
CC
Top view
A12214
0.5
0
1.0
1.5
2.0
2.5
3.0
3.5
–20 0 20 40 60 80 100
Pd max — Ta
3.0 W
1.8 W
Allowable power dissipation, Pdmax — W
Ambient temperature, Ta — °C
Page 8
Pin Assignment
No. 6109-8/17
LB1987, 1987D, 1987M, 1987H
FRAME
FRAME
FG
IN
FG
IN
+
FG
OUT
FGS
CTL
LIM
FC
U
IN
+
U
IN
V
IN
+
V
IN
W
IN
+
W
IN
V
CC
FRAME
FRAME
FRAME
FRAME
GND
FR
GSENSE
RF(SENSE)NCNC
W
OUT
V
OUT
U
OUT
NC
NC
RF(PWR)
GND
VS
FRAME
FRAME
LB1987M
Top view
A12216
1 2 3
4
5 6 7 8 9 10
11
12
13 14
15 16 17 18
36 35 34
33
32 31 30 29 28 27
26
25
24 23
22 21 20 19
Note: Although the FRAME pins and the GND pin are not connected internally in the IC, the FRAME pins must be connected to the GND pin externally for
ground potential stabilization.
0.2
0
0.4
0.6
0.8
1.0
1.2
–20 0 4020 60 80 100
Pd max — Ta
0.95 W
0.57 W
Allowable power dissipation, Pdmax — W
Ambient temperature, Ta — °C
Page 9
No. 6109-9/17
LB1987, 1987D, 1987M, 1987H
Pin Assignment
1 2 3 4 5
6
7 8 9 10
11
12 13 14
28 27 26 25 24 23 22 21 20 19 18 17 16 15
W
OUT
NC
NC
RF(SENSE)
GSENSE
FR
GND
FRAME GND
FG
IN
FG
IN
+
FG
OUT
FGS
CTL
LIM
FC
V
OUT
U
OUT
NC
NC
RF(PWR)
GND
VS
FRAME GND
VCCW
IN
W
IN
+
V
IN
V
IN
+
U
IN
U
IN
+
Top view
A12215
LB1987H
0
0.4
0.2
0.6
1.0
0.8
–20 0 20 40 60 10080
Pd max — Ta
0.77 W
0.46 W
Allowable power dissipation, Pdmax — W
Ambient temperature, Ta — °C
Page 10
Block Diagram
No. 6109-10/17
LB1987, 1987D, 1987M, 1987H
+
+
+
+
+
+
+
+
+
+
+
+
+
+
LIMREF
TSD
Bandgap 1.2 V
5 k
VS
U
OUT
V
OUT
W
OUT
RF(PWR)
FGSFG
OUT
FG
IN
FG
IN
+
RF(SENSE)
V
CC
LIM
CTL
CTLREF
FR
W
IN
W
IN
+
V
IN
V
IN
+
U
IN
U
IN
+
FC
A12213
Hall input synthesis block (Linear matrix)
Control
amplifier 1
Feedback
amplifier
Upper side saturation
prevention control
Schmitt amplifier
FG amplifier
Drive distribution circuit
and lower side
saturation prevention
control
Control
amplifier 2
Synthesized output logarithmic compression
Inverse logarithmic conversion
and differential distribution
Forward/
reverse
selection
Differential
distribution and
torque ripple
correction block
Reference
voltage
Page 11
Sample Application Circuit (LB1987)
No. 6109-11/17
LB1987, 1987D, 1987M, 1987H
L
L
L
R
MR
0.1 µF
39 k
0.1 µF
V
CC
Vs
0.5
0.1 µF
0.1 µF
0.1 µF
LB1987
A12218
7 8 9 10 11 12 13 14 15 16 17
34 33 32 31 30 29 28 27 26 25 24
18
19
20
21
22
23
6
5
4
3
2
1
We recommend the
use of GaAs devices
as Hall element.
Hall output
Hall output
Hall output
The Hall bias resistor R must
be selected according to the
sensor output.
Bias of V
CC
/2
Note: The component values shown in this application circuit example are merely provided as examples, and circuit operating characteristics are not guaranteed.
FG output
Hall input
Forward/reverse command
applied pin
Power system ground
Ground
Current limiter setting voltage
applied pin
CTLREF voltage applied pin
Torque command voltage
applied pin
39 k
Page 12
No. 6109-12/17
LB1987, 1987D, 1987M, 1987H
Sample Application Circuit (LB1987D)
28 27 26 25 24 23 22 21 20 19 18 17 16 15
L
L
L
R
MR
0.5
0.1 µF
0.1 µF
0.1 µF
Vs
V
CC
0.1 µF
R
39 k
0.1 µF
LB1987D
A122219
1 2 3 4 5 6 7 8 9 10 11 12 13 14
We recommend the
use of GaAs devices
as Hall element.
Hall output
Hall output
Hall output
The Hall bias resistor R must
be selected according to the
sensor output.
Bias of V
CC
/2
Note: The component values shown in this application circuit example are merely provided as examples, and circuit operating characteristics are not guaranteed.
FG output
Hall input
Forward/reverse
command applied pin
Power system ground
Ground
Current limiter setting voltage
applied pin
CTLREF voltage applied pin
Torque command voltage
applied pin
39 k
Page 13
No. 6109-13/17
LB1987, 1987D, 1987M, 1987H
Sample Application Circuit (LB1987M)
36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19
123456789101112131415161718
R
L
L
L
MR
V
CC
V
CC
0.1 µF
39 k
0.1 µF
0.1 µF
0.1 µF
Vs
FRAME
FRAME
FG
IN
FG
IN
+
FG
OUT
FGS
CTL
LIM
FC
U
IN
+
U
IN
V
IN
+
V
IN
W
IN
+
W
IN
V
CC
FRAME
FRAME
FRAME
FRAME
GND
FR
GSENSE
RF(SENSE)
NC
NC
W
OUT
V
OUT
U
OUT
NC
NC
RF(PWR)
GND
VS
FRAME
FRAME
LB1987M
A12220
We recommend the
use of GaAs devices
as Hall element.
Hall
output
Hall output
Hall output
Bias of V
CC
/2
MR pin
FG pulse output
Hall input
Forward/reverse
command applied pin
Power system ground
Ground
Current limiter setting voltage
applied pin
Supply voltage
Torque command voltage
applied pin
39 k
Page 14
No. 6109-14/17
LB1987, 1987D, 1987M, 1987H
Sample Application Circuit (LB1987H)
1 2 3 4 5 6 7 8 9 10 11 12 13 14
28 27 26 25 24 23 22 21 20 19 18 17 16 15
MR
V
CC
0.1 µF
0.1 µF
0.1 µF
0.1 µF
R
L
L
L
V
CC
0.5
39 k
W
OUT
NC
NC
RF
GSENSE
FR
GND
V
OUT
U
OUT
NC
NC
RF
GND
VS
FG
IN
FG
IN
+
FG
OUT
FGS
CTL
LIM
FC
V
CC
W
IN
FRAME
GND
FRAME
GND
W
IN
+
V
IN
V
IN
+
U
IN
U
IN
+
LB1987H
Vs
V
CC
0.1 µF
A12221
We recommend the
use of GaAs devices
as Hall element.
Hall
output
Hall output
Hall
output
Bias of V
CC
/2
FG pulse output
Hall input
Power system ground
Current limiter setting voltage
applied pin
Torque command voltage
applied pin
Forward/reverse
command applied pin
39 k
Page 15
No. 6109-15/17
LB1987, 1987D, 1987M, 1987H
Test Circuit 1
192021222324252627282930313233343536
181716151413121110987654321
A
A
A
A
A
V
V
V
FRAME
FRAME
FG
IN
FG
IN
+
FG
OUT
FGS
CTL
LIM
FC
UIN+
U
IN
V
IN
+
V
IN
W
IN
+
W
IN
V
CC
FRAME
FRAME
FRAME
FRAME
GND
FR
GSENSE
RF(SENSE)
NC
NC
W
OUT
V
OUT
U
OUT
NC
NC
RF(PWR)
GND
VS
FRAME
FRAME
LB1987/D/M/H
So
Vs
15 V
VFR
VLIM
Im 5
VCC5 V
200 k
2.4 k 2.4 k
SfSeSdSc
SbSa
2121212
211
21
0.1 µF
VFG1
VFG2
41
32
4
4
4
Sn
Vm1
Sm
Im2
0.1 µF
0.1 µF
0.1 µF
3
2
1
3
2
1
10 mA
Sk
Sj
0.5 A
Sh
1 A
Vm2
Sg
Vm3
0.5
Sq
A12222
VCTL
Unless specified
otherwise:
VCT = 5 V
VS = 15 V
VFR = 5 V, VLIM = 5 V
VCTR = 5 V
VCREF = 2.5 V
VFG1 = VFG = 2.5 V
Switch states:
O: Closed
X: Open
0.5 A
1 A
10 mA
5 V
2.4 k
200 k
2.4 k
Page 16
No. 6109-16/17
LB1987, 1987D, 1987M, 1987H
Test Circuit 2
22
13
2
1
3
13
2
13
2
13
2
13
18
A
Sa Sb Sc Sd Se Sf
0.1 µF
+
V
Vp-p = 1.0 V
V
V V
V
V
V V
V
V
f = 1 kHZ
S1
Sk
13 k
VFGIN
0.1 µF
100 k
LA6358
Si
1
2
Vm8
Vm9
VCTL
Sm
12
10 k
1 M
1 k
Sh
Sf
1
2
Im1
Sg
VH3
VH2
VH1
4
4
4
Vm5
Vm4
Vm6
Vm1
Vm2
U
V
W
0.1 µF
0.1 µF
0.1 µF
0.5
Vm7
VS 15 V
V
CC
5 V
FRAME
FRAME
FG
IN
FG
IN
+
FG
OUT
FGS
CTL
LIM
FC
U
IN
+
U
IN
V
IN
+
V
IN
W
IN
+
W
IN
V
CC
FRAME
FRAME
1716151413121110987654321
192021222324252627282930313233343536
FRAME
FRAME
GND
FR
GSENSE
RF(SENSE)
NC
NC
W
OUT
V
OUT
U
OUT
NC
NC
RF(PWR)
GND
VS
FRAME
FRAME
LB1987/1987D/1987M/1987H
A12223
Unless specified
otherwise:
V
CC
= 5 V
VS = 15 V
VCTL = 0 V
VH1 = 2.6 V
VH2 = 2.4 V
VH3 = 2.6 V
VFGF = 2.5 V
VFGIN = 2.5 V
Switch states:
O: Closed
X: Open
I = 1 kHz
Vp-p = 1.0 V
–20 dB
f = 1 kHz
100 k
±15 V
10 k
1 M
1 k
Page 17
PS No. 6109-17/17
LB1987, 1987D, 1987M, 1987H
This catalog provides information as of August, 1999. Specifications and information herein are subject to change without notice.
Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer’s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer’s products or equipment.
SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design.
In the event that any or all SANYO products (including technical data, services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co., Ltd.
Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the “Delivery Specification” for the SANYO product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties.
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