Datasheet LB1999M Datasheet (SANYO)

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Page 1

Ordering number : EN5975

O3098RM (OT) No. 5975-1/8

Overview

The LB1999M is a 3-phase brushless motor driver that is particularly appropriate for VCR capstan motor drivers.

Functions

· 3-phase full-wave drive

· Built-in torque ripple correction circuit (fixed correction ratio)

· Built-in current limiter circuit and control characteristics that include gain switching

· Upper and lower side output stage over-saturation prevention circuit that does not require external capacitors.

· FG amplifier with built-in Schmitt comparator

· Thermal shutdown circuit

Package Dimensions

unit: mm

3129-MFP36SLF

SANYO: MFP36SLF

[LB1999M]

LB1999M

SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

Three-Phase Brushless Motor Driver

for VCR Capstan Motors

Monolithic Digital IC

Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft’s control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications.

SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein.

Allowable power dissipation, Pdmax — W

Ambient temperature, Ta — °C

Independent IC

Page 2

Specifications

Absolute Maximum Ratings at Ta = 25°C

Allowable Operating Ranges at Ta = 25°C

Electrical Characteristics at Ta = 25°C, VCC= 5 V, VS= 15 V

Notes : 1.The torque ripple correction ratio is determined as follows from the Rf voltage waveform. Continued on next page.

2.Parameters that are indicated as design target values in the conditions column are not tested.

No. 5975-2/8

LB1999M

Parameter Symbol Conditions Ratings Unit

Maximum supply voltage

max 7 V

max 24 V

Maximum output current I

max 1.3 A Allowable power dissipation Pd max Independent device 0.95 W Operating temperature Topr –20 to + 75 °C Storage temperature Tstg –55 to + 150 °C

Parameter Symbol Conditions Ratings Unit

Supply voltage

5 to 22 V

4.5 to 5.5 V

Hall input amplitude V

HALL

Between the Hall inputs ±30 to ±80 mVo-p

GSENSE pin input range V

GSENSE

With respect to the control system ground –0.20 to + 0.20 V

Parameter Symbol Conditions

Ratings

Unit

min typ max

VCC supply current I

RL = ∞, V

CTL

= 0 V (Quiescent) 12 18 mA

[Outputs]

sat1

= 500 mA, Rf = 0.5 Ω, Sink + Source

2.1 2.6 V

Output saturation voltage

CTL

= V

LIM

= 5 V

(With saturation prevention)

VOsat2

= 1.0 A, Rf = 0.5 Ω, Sink + Source

2.6 3.5 V

CTL

= V

LIM

= 5 V

(With saturation prevention) Output leakage current IOleak 1.0 mA [FR] FR pin input threshold voltage V

FSR

2.25 2.50 2.75 V

FR pin input bias current I

(FSR) –5.0 µA [Control] CTLREF pin voltage V

CREF

2.37 2.50 2.63 V

CTLREF pin input range V

CREFIN

1.7 3.50 V

CTL pin input bias current I

(CTL) With V

CTL

= 5 V and the CTLREF pin open 8.0 µA

CTL pin control start voltage

CTL

(ST)

With Rf = 0.5 Ω, V

LIM

= 5 V, IO≥ 10 mA,

2.20 2.35 2.50 V

Hall input logic fixed (U, V, W = H, H, L)

CTL pin control switching voltage V

CTL

(ST2) With Rf = 0.5 Ω, V

LIM

= 5 V 3.00 3.15 3.30 V

CTL pin control Gm1 Gm (CTL)

With Rf = 0.5 Ω, ∆I

= 200 mA,

0.52 0.65 0.78 A/V

Hall input logic fixed (U, V, W = H, H, L)

CTL pin control Gm2 Gm2 (CTL)

With Rf = 0.5 Ω, ∆V

CTL

= 200 mV,

1.20 1.50 1.80 A/V

Hall input logic fixed (U, V, W = H, H, L)

[Current Limiter] LIM current limit offset voltage Voff (LIM)

With Rf = 0.5 Ω, V

CTL

= 5 V, IO≥ 10 mA,

140 200 260 mV

Hall input logic fixed (U, V, W = H, H, L)

LIM pin input bias current I

(LIM)

With V

CTL

= 5 V and the V

CREF

pin open,

LIM

= 0 V

–2.5 µA

LIM pin current control level I

LIM

With Rf = 0.5 Ω, V

CTL

= 5 V, V

LIM

= 2.06 V,

830 900 970 mA

Hall input logic fixed (U, V, W = H, H, L) [Hall Amplifier] Hall amplifier input offset voltage

Voff (HALL) –6 +6 mV Hall amplifier input bias current IB(HALL) 1.0 3.0 µA Hall amplifier common-mode input voltage range

VCM(HALL) 1.3 3.3 V

For the high and low peaks in the Rf waveform

Torque ripple correction ratio TRC when I

= 200 mA. 9 %

(Rf = 0.5 Ω)

[FG Amplifier] FG amplifier input offset voltage Voff (FG) –8 +8 mV FG amplifier input bias current I

(FG) –100 nA

FG amplifier output saturation voltage V

sat (FG)

Sink side, for the load provided by the internal

0.5 0.6 V

pull-up resistor

FG bias voltage V

FGBI

2.4 2.5 2.6 V

FG amplifier common-mode input voltage V

(FG) 0.5 4.0 V

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Continued from preceding page.

Notes : 1.The torque ripple correction ratio is determined as follows from the Rf voltage waveform.

2.Parameters that are indicated as design target values in the conditions column are not tested.

Truth Table and Control Functions

No. 5975-3/8

LB1999M

Correction ratio =

2 × (Vp– Vb)

100 × (%)

Vp– V

For each Hall logic setting

Ground level

Source → Sink

Hall input

U V W

Phase V → Phase W

H H L

Phase W → Phase V L

Phase U → Phase W

H L L

Phase W → Phase U L

Phase U → Phase V

H L H

Phase V → Phase U L

Phase W → Phase V

L L H

Phase V → Phase W L

Phase W → Phase U

L H H

Phase U → Phase W L

Phase V → Phase U

L H L

Phase U → Phase V L

Note: In the FR column, “H” refers to a voltage of 2.75 V or higher, and “L” refers

to 2.25 V or lower (when V

= 5 V.)

Note: In the Hall input column, “H” refers to the state in the corresponding phase

where the + input is at a potential at least 0.01 V higher than the – input, and “L” refers to the state where the – input is at a potential at least 0.01 V higher than the + input.

Note: Since the drive technique adopted is a 180° technique, phases

other than the sink and source phase do not turn off.

Parameter Symbol Conditions

Ratings

Unit

min typ max

[

Saturation

]

Saturation prevention circuit lower

The voltages between each OUT and

side voltage setting

VOsat (DET)

Rf pair when IO= 10 mA, Rf = 0.5 Ω, and 0.175 0.25 0.325 V V

CTL

= V

LIM

= 5 V

[

Schmitt Amplifier

]

Duty ratio DUTY Under the specified conditions (R

= 39 kΩ) 48.7 50 51.3 %

Upper side output saturation voltage Vsatu (SH) I

= –20 µA 4.8 V

Lower side output saturation voltage Vsatd (SH) I

= 100 µA 0.2 V Hysteresis width Vhys 32 46 60 mV TSD operating temperature T-TSD Design target value

170 °C

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Control Function and Current Limiter Function

Pin Descriptions

No. 5975-4/8

LB1999M

Control Characteristics Control Limiter Characteristics

Slope: 0.50 A/V (typical)

OUT

Pin No. Pin Function Equivalent circuit

Input used when the FG amplifier is used as an inverting input. A feedback resistor must be connected between FG

OUT

and this pin.

Noninverting input used when the FG amplifier is used as a differential input amplifier. No bias is applied internally.

–

FG amplifier output. There is an internal resistive load.5

OUT

Control reference voltage. While this pin is set to about

0.43 × V

internally, this voltage can be modified by applying a voltage from a low-impedance circuit. (The input impedance is about 4.3 kΩ).

6 FGS

Speed control loop frequency characteristics correction.9 FC

Speed control input. The control implemented is fixed current drive controlled by current feedback from Rf. Gm = 0.58/V (typical) when Rf = 0.5 Ω.

7 CTL

Current limiter function control. The output current can be varied linearly by applying a voltage to this pin. The slope is 0.5 A/V (typical) when Rf = 0.5 Ω.

8 LIM

U phase Hall element inputs. Logic high is defined as states where IN+> IN–.

10 11

–

V phase Hall element inputs. Logic high is defined as states where IN+> IN–.

12 13

–

W phase Hall element inputs. Logic high is defined as states where IN+> IN–.

14 15

–

Power supply for all internal blocks other than the output block. This voltage must be stabilized so that noise and ripple do not enter the IC.

Continued on next page.

Page 5

Continued from preceeding page.

Pin Assignment

Pin No. Pin Function Equivalent circuit

No. 5975-5/8

LB1999M

Output block power supply

23 31

Rf (PWR)

Rf (SNS)

Output current detection. The control block current limiter operates using the resistor Rf connected between these pins and ground. Also, the lower side saturation prevention circuit and the torque ripple correction circuit operate based on the voltages to this pin. It is especially important to note that, since the saturation prevention level is set using this voltage, the lower side saturation prevention circuit will become less effective in the large current region if the value of Rf is lowered excessively. Also, the PWR and SENSE pins must be connected together.

26 27 28

OUT

U phase output V phase output (Spark killer diodes are built-in.) W phase output

32 GSENSE

Ground sensing. The influence of the common ground impedance on Rf can be excluded by connecting this pin to nearest ground for the Rf resistor side of the motor ground wiring that includes Rf. (This pin must not be left open.)

33 FR

Forward/reverse selection. The voltage applied to this pin selects the motor direction (forward or reverse). (Vth = 2.5 V at V

= 5 V (typical))

Note: Although the FRAME pins and

the GND pins are not connected internally, the potentials of the GND pins and the FRAME pins externally be identical to assure ground potential stability.

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Block Diagram

No. 5975-6/8

LB1999M

Forward/

reverse

selection

Forward/

reverse

selection

Differential distribution

and torque ripple

correction block

Upper side saturation

prevention control

Drive distribution circuit

and lower side saturation

prevention circuit

Schmitt amplifier

amplifier

Control

amplifier 1

Control

amplifier 2

Feedback

amplifier

Hall input synthesis block

(linear matrix)

Synthesized output logarithmic

compression block

Antilogarithm conversion and

differential distribution

Page 7

Sample Application Circuit

No. 5975-7/8

LB1999M

GaAs Hall devices

are recommended

Hall output

MR pin

Hall output

Hall inputs

Hall output

/2 bias FG pulse

output

Forward/reverse

command voltage pin

Power system ground

Ground

Supply voltage

Current limiter setting

voltage pin

Torque command

voltage pin

Page 8

No. 5975-8/8

LB1999M

This catalog provides information as of October, 1998. Specifications and information herein are subject to change without notice.

Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer’s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer’s products or equipment.

SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design.

In the event that any or all SANYO products (including technical data, services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law.

No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co., Ltd.

Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the “Delivery Specification” for the SANYO product that you intend to use.

Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties.