LA-9063P VIWZ1 DIS
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Intel Ivy Bridge Processor with DDRIII + Panther Point PCH
VIWZ1/VIWZ2 DIS M/B Schematics Document
REV:1.0
Compal Confidential
2012-12-26
nVIDIA N14P-GV2
LA-9063P
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
Cover Page
Custom
1 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
Cover Page
Custom
1 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
Cover Page
Custom
1 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Compal Electronics, Inc.
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
File Name : VIWZ1/VIWZ2
Compal confidential
Page36
PCI-E x8
37.5mm*37.5mm
25mm*25mm
FDI *8
100MHz
2.7GT/s
Intel
LPC BUS
BANK 0, 1, 2, 3
Ivy Bridge
Socket-rPGA988B
DMI *4
FCBGA 989
Thermal Sensor
PCI-E(WLAN)
Intel
Panther Point
EC
Touch Pad Int. KBD
DDR3 SO-DIMM *2
Dual Channel
DDR3 1066MHz(1.5V)
DDR3 1333MHz(1.5V)
Up to 8GB
HDMI
Connector
CRT
Connector
LVDS
Connector
Mini PCIE Half size Slot *1
RTL8111F(GLAN)
RTL8105E-VD(10/100)
RJ-45
Connector
PCI-E x1 *6
SPIROM
BIOS
USB2.0 *14
SATA *6
SATA HDD
Mini PCIE Full size Slot *1
Audio Codec
ALC259-VC2
Realtek
Card Reader
RTS5178 for SDR50
Reltek
SDXC/MMC
Camera Conn.
BlueTooth Conn.
USB2.0 *2(Right)
AZALIA
2 channel speaker
Int. Digital MIC array
(Combine with webcam)
Combo Jack*1
ENE KB9012
Page5-11
Page12-13
Page14-22
Page33
Page34
Page35
Page37
Page38
Page39
EMC1403
Page36
Page40
Page41
Page40
Page42
Page14
Page43
Page43
Page41
Page41
Page43
Page44
Page33
Page 43
USB3.0 *1(Left)
include USB2.0*1
DDR3 1600MHz(1.5V)
HM70 / HM76
Realtek
LA9063
LVDS
eDP
SATA ODD
Page40
Page45
USB 3.0
USB2.0
SSD
WLAN
LS9062P USB/B
LS9061P PWR/B
VIWZ1
VIWZ2
LS9065P PWR/B
LS9062P USB/B
LS9064P LED/B
LS9063P ODD/B
Page23-32
VRAM 128Mb*16
DDR3*4 1GB
nVIDIA N14P-GV2
DDR3*4 2GB
VRAM 256Mb*16
LA9063
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
Block Diagram
Custom
2 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
Block Diagram
Custom
2 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
Block Diagram
Custom
2 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Compal Electronics, Inc.
U4
PCH-HM76
SA00005FH70
HM76@
ZZZ6
DA_PCB
DA8000XJ100
15@
U4
PCH-HM70
SA00005MQ80
HM70@ ZZZ
DA_PCB
DA8000XJ000
14@
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
USB3.0
USB 2.0
Port
3 External
USB Port
USB Port (Left Side)
Camera
Blue Tooth
0
1
2
3
4
5
6
7
8
9
10
11
12
13
UHCI0
UHCI1
UHCI2
UHCI3
UHCI4
UHCI5
UHCI6
EHCI1
EHCI2
USB Port Table
Board ID / SKU ID Table for AD channelBOARD ID Table
EC SM Bus1 address
Device
DDR DIMM0
1001 000Xb
DDR DIMM2
1001 010Xb
STATE
SIGNAL
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Vcc 3.3V +/- 5%
100K +/- 5%
Ra/Rc/Re
Board ID
Rb / Rd / Rf V min
0
1
2
3
0
8.2K +/- 5%
0 V
0.216 V 0.250 V 0.289 V
0.436 V
0.712 V
0.503 V
0.819 V
0.538 V
0.875 V
AD_BID
V typ
AD_BID
V
AD_BID
max
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
3.300 V
0 V 0 V
4
5
6
7
NC
1.036 V
1.453 V 1.650 V 1.759 V
1.935 V
2.500 V
2.200 V
3.300 V
2.341 V
1.185 V 1.264 V
Board ID
0
1
2
3
4
5
6
7
PCB Revision
0.1
PCH SM Bus address
Device Address
Address
Address
Voltage Rails
BTO Item BOM Structure
ON
ON
ON
ON
ON
ON
ON ON
ON
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
LOW
LOW LOW LOW LOW
LOWLOWLOW
LOW
LOW
LOW
HIGH HIGH HIGH HIGH
HIGHHIGHHIGH
HIGH
HIGH
HIGH
EC SM Bus2 address
Device
Smart Battery
0001 011X b
USB Port (Right Side USB-BD)
Card Reader
Mini Card(WLAN)
X
V
+3VALW
+3VALW
+3VALW
+3VALW
+3VALW
+3VALW
+3VS
XX
V
V
X
XX
PCH
Thermal
Sensor
X
X
X
SML0CLK
SML0DATA
PCH
SMB_EC_CK2
SOURCE
KB9012
VGA BATT KB9012 SODIMM
SMBUS Control Table
SMBCLK
SMBDATA
PCH
WLAN
WWAN
SMB_EC_DA2
SMB_EC_CK1
SMB_EC_DA1
X V
V
X
X
X
X
X
X
X
X
X
X
X
X
X
KB9012
SML1CLK
SML1DATA
PCH
XX X
X
X
USB Port (Right Side USB-BD)
V
+3VS
+3VS
+3VS
+3VS
V
+3VS
O
X
S3
+3VS
X
X
+3VALW
+5VS
O
+VCC_CORE
OO
X
X X
+V1.05S_VCCP
power
plane
O
O
O
O
X
S5 S4/ Battery only
X X X
+B
State
+1.5VS
+1.5V
S5 S4/AC & Battery
don't exist
S5 S4/AC
+5VALW
S0
O
O
+VCC_GFXCORE_AXG
+1.8VS
+0.75VS
+1.05VS
+VGA_CORE
BOM Structure Table
DVT
EVT
PVT
MP
Thermal Sensor EMC1403
1001_101xb
GV2@ GPU:N14P-GV2
MP
EVT
DVT
PVT
Porject Phase
Z-series
Z-series
Z-series
Z-series
USB3.0
NV-GPU SM Bus address
Device Address
Internal thermal sensor
1001 111Xb (0x9E)
TP
X
X
X
X
V
+3VS
OPTIMUS part
GPU:N14P-GV2 Strap
OPT@
GV2@
OPTNOGCLK@OPTIMUS no support GCLK
Camera CMOS@
For Z490 (14") 14@
HDMI HDMI@
Unpop
Connector ME@
@
Deep Sleep S3 DS3@
45 LEVEL 45@
10/100 LAN 8105@
GIGA LAN
ISCT AOAC@
GIGA@
For Z590 (15") 15@
OPTGCLK@OPTIMUS support GCLK
Support Green CLK GCLK@
not Support Green CLK NOGCLK@
OPT@
OPTNOGCLK@
BOM Structure
GV2@
N14P-GV2
V
V
V
GPU BOM Structure Table
Support HP Woofer woofer@
EC RESET function RESET@
USB Charger CHG@
not USBCharger NOCHG@
Keyboard Back Light KBL@
USB Charger
1010 111X b
HM76 by PCH HM76@
HM70 by PCH HM70@
Not Support Deep Sleep S3 NODS3@
Re-flash
Reserved
Reserved
Reserved
Support Green CLK 244
Support Green CLK 304
GCLK244@
GCLK304@
EHCI1
Touch Screen
Touch Screen TS@
Cardreader CR@
integrate Graphic part UMA@
BlueTooth BT@
Gastube@Gastube
RTS5178@Cardreader RTS5178
RTS5170@Cardreader RTS5170
0.2
0.3
1.0
ISCT not support NOAOAC@
TS_15@
TS_14@for 14" Touch Screen
for 15" Touch Screen
GPU:N14P-GV2 GC6 function
GC6@ Select
LA-9061P
LA-9061P
LA-9061P
LA-9061P
LA-9063P 0.2
GC6@
LA-9063P
0.2 15_TS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
Notes List
Custom
3 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
Notes List
Custom
3 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
Notes List
Custom
3 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Compal Electronics, Inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
1.all GPU power rails should be turned off within 10ms
I GC6_FB_CLAMPH
Tpower-off <10ms
PWM_VID-OUT
+3VS_VGA
+3VS_VGA
+3VS_VGA
+3VS_VGA
+3VS_VGA
FB[1]
3GIO_PAD_CFG_ADR[0]
USER[2] USER[1] USER[0]USER[3]
3GIO_PAD_CFG_ADR[2] 3GIO_PAD_CFG_ADR[1]3GIO_PAD_CFG_ADR[3]
PCI_DEVID[3] PCI_DEVID[2] PCI_DEVID[1] PCI_DEVID[0]
STRAP3
STRAP4
+3VS_VGA
+3VS_VGA
SOR3_EXPOSED
RESERVED PCIE_SPEED_
CHANGE_GEN3
PCIE_MAX_SPEED DP_PLL_VDD33V
SOR2_EXPOSED SOR1_EXPOSED
Power Rail
+3VS_VGA
ROM_SCLK
SOR0_EXPOSED
Logical
Strapping Bit3
Logical
Strapping Bit2
SLOT_CLK_CFG/PCI_DEVID[5]
Logical
Strapping Bit0
SUB_VENDOR
PEX_PLL_EN_TERM
RAM_CFG[0]
STRAP0
STRAP1
STRAP2
ROM_SI
RAM_CFG[1]RAM_CFG[3] RAM_CFG[2]
VGA_DEVICESMB_ALT_ADDR
PCI_DEVID[4]
ROM_SO FB[0]
Logical
Strapping Bit1
Physical
Strapping pin
TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD
+1.5VS_VGA
1. all power rail ramp up time should be larger than 40us
2. Optimus system VDD33 avoids drop down earlier than NVDD and FBVDDQ
+3VS_VGA
+1.05VS_VGA
+VGA_CORE
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
OUT
OUT
OUT
OUT
OUT
OUT
I/O
OUT
OUT
IN
OUT
OUT
Panel Back-Light brightness(PWM capable)
Panel Power Enable
Panel Back-Light On/Off (PWM)
RESERVED
GC6_FB_REQ
-
H
H
H
GPIO I/O ACTIVE Function Description
-
L
IN
OUT
IN
IN
IN
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
VGA and GDDR3 Voltage Rails (N13x GPIO)
-
(10K pull low)
N/A
N/A
Thermal Catastrophic Over Temperature
Thermal Alert
Memory VREF Control
AC Power Detect Input
N/A
N/A
L
L
-
Products
GPU Mem NVCLK
/MCLK NVVDD
FBVDD
FBVDDQ PCI Express I/O and
PLLVDD
I/O and
PLLVDD
Other
(3.3V)(1.05V)(1.8V)
(1.05V)
(1.35V)(1.35V)
(GPU+Mem)
(4) (1,5) (6)
(V) (A) (W) (A) (W)
Performance Mode P0 TDP at Tj = 102 C* (GDDR3)
(A) (W) (W)(mA) (W) (W) (W)(mA) (mA) (mA)
N13P-GL
64bit
1GB
GDDR3
(W) (W) (MHz)
TBD TBD
Hot plug detect for IFP link C
MEM_VDD_CTLOUT
PSI-
tFBVDDQ >0
tNVVDD >0
tPEX_VDD >0
3DVision
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
VGA Notes List
Custom
4 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
VGA Notes List
Custom
4 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
VGA Notes List
Custom
4 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Compal Electronics, Inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PEG_ICOMPI and RCOMPO signals should be
shorted and routed
with - max length = 500 mils - typical
impedance = 43 mohms
PEG_ICOMPO signals should be routed with -
max length = 500 mils
- typical impedance = 14.5 mohms
eDP_COMPIO and ICOMPO signals
should be shorted near balls
and routed with typical
impedance <25 mohms
PEG Static Lane Reversal - CFG2 is for the 16x
CFG2
0:Lane Reversed
1: Normal Operation; Lane # definition matches
socket pin map definition
*
EDP_COMP
PEG_COMP
PCIE_CRX_GTX_N15
PCIE_CRX_GTX_N10
PCIE_CRX_GTX_N14
PCIE_CRX_GTX_N0
PCIE_CRX_GTX_N8
PCIE_CRX_GTX_N6
PCIE_CRX_GTX_N7
PCIE_CRX_GTX_N4
PCIE_CRX_GTX_N3
PCIE_CRX_GTX_N9
PCIE_CRX_GTX_N12
PCIE_CRX_GTX_N13
PCIE_CRX_GTX_N5
PCIE_CRX_GTX_N2
PCIE_CRX_GTX_N1
PCIE_CRX_GTX_N11
PCIE_CRX_GTX_P15
PCIE_CRX_GTX_P14
PCIE_CRX_GTX_P8
PCIE_CRX_GTX_P4
PCIE_CRX_GTX_P0
PCIE_CRX_GTX_P10
PCIE_CRX_GTX_P7
PCIE_CRX_GTX_P9
PCIE_CRX_GTX_P13
PCIE_CRX_GTX_P6
PCIE_CRX_GTX_P3
PCIE_CRX_GTX_P12
PCIE_CRX_GTX_P5
PCIE_CRX_GTX_P11
PCIE_CRX_GTX_P1
PCIE_CRX_GTX_P2
PCIE_CTX_GRX_C_P0
PCIE_CTX_GRX_C_P10
PCIE_CTX_GRX_C_P15
PCIE_CTX_GRX_C_P14
PCIE_CTX_GRX_C_P8
PCIE_CTX_GRX_C_P6
PCIE_CTX_GRX_C_P4
PCIE_CTX_GRX_C_P13
PCIE_CTX_GRX_C_P7
PCIE_CTX_GRX_C_P1
PCIE_CTX_GRX_C_P9
PCIE_CTX_GRX_C_P12
PCIE_CTX_GRX_C_P3
PCIE_CTX_GRX_C_P5
PCIE_CTX_GRX_C_P2
PCIE_CTX_GRX_C_P11
PCIE_CTX_GRX_C_N14
PCIE_CTX_GRX_C_N15
PCIE_CTX_GRX_C_N0
PCIE_CTX_GRX_C_N10
PCIE_CTX_GRX_C_N6
PCIE_CTX_GRX_C_N8
PCIE_CTX_GRX_C_N13
PCIE_CTX_GRX_C_N4
PCIE_CTX_GRX_C_N9
PCIE_CTX_GRX_C_N5
PCIE_CTX_GRX_C_N2
PCIE_CTX_GRX_C_N12
PCIE_CTX_GRX_C_N7
PCIE_CTX_GRX_C_N1
PCIE_CTX_GRX_C_N11
PCIE_CTX_GRX_C_N3
PCIE_CTX_GRX_N15
PCIE_CTX_GRX_N14
PCIE_CTX_GRX_N13
PCIE_CTX_GRX_N12
PCIE_CTX_GRX_N11
PCIE_CTX_GRX_N10
PCIE_CTX_GRX_N9
PCIE_CTX_GRX_N8
PCIE_CTX_GRX_N7
PCIE_CTX_GRX_N6
PCIE_CTX_GRX_N5
PCIE_CTX_GRX_N4
PCIE_CTX_GRX_N3
PCIE_CTX_GRX_N2
PCIE_CTX_GRX_N1
PCIE_CTX_GRX_N0
PCIE_CTX_GRX_P15
PCIE_CTX_GRX_P14
PCIE_CTX_GRX_P12
PCIE_CTX_GRX_P13
PCIE_CTX_GRX_P11
PCIE_CTX_GRX_P10
PCIE_CTX_GRX_P8
PCIE_CTX_GRX_P9
PCIE_CTX_GRX_P7
PCIE_CTX_GRX_P6
PCIE_CTX_GRX_P4
PCIE_CTX_GRX_P5
PCIE_CTX_GRX_P3
PCIE_CTX_GRX_P2
PCIE_CTX_GRX_P0
PCIE_CTX_GRX_P1
DMI_CTX_PRX_P0<16>
DMI_CRX_PTX_P0<16>
DMI_CTX_PRX_N1<16>
DMI_CRX_PTX_N1<16>
DMI_CTX_PRX_P3<16>
DMI_CRX_PTX_P3<16>
DMI_CTX_PRX_P2<16>
DMI_CTX_PRX_N0<16>
DMI_CRX_PTX_N3<16>
DMI_CRX_PTX_P2<16>
DMI_CTX_PRX_N3<16>
DMI_CTX_PRX_P1<16>
DMI_CRX_PTX_N0<16>
DMI_CRX_PTX_N2<16>
DMI_CRX_PTX_P1<16>
DMI_CTX_PRX_N2<16>
FDI_CTX_PRX_N0<16>
FDI_CTX_PRX_N1<16>
FDI_CTX_PRX_N2<16>
FDI_CTX_PRX_N3<16>
FDI_CTX_PRX_N4<16>
FDI_CTX_PRX_N5<16>
FDI_CTX_PRX_N6<16>
FDI_CTX_PRX_N7<16>
FDI_CTX_PRX_P0<16>
FDI_CTX_PRX_P1<16>
FDI_CTX_PRX_P2<16>
FDI_CTX_PRX_P3<16>
FDI_CTX_PRX_P4<16>
FDI_CTX_PRX_P5<16>
FDI_CTX_PRX_P6<16>
FDI_CTX_PRX_P7<16>
FDI_FSYNC0<16>
FDI_FSYNC1<16>
FDI_INT<16>
FDI_LSYNC0<16>
FDI_LSYNC1<16>
PCIE_CRX_GTX_N[0..15] <23>
PCIE_CTX_GRX_P[0..15] <23>
PCIE_CTX_GRX_N[0..15] <23>
PCIE_CRX_GTX_P[0..15] <23>
+V1.05S_VCCP
+V1.05S_VCCP
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PROCESSOR(1/7) DMI,FDI,PEG
Custom
5 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PROCESSOR(1/7) DMI,FDI,PEG
Custom
5 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PROCESSOR(1/7) DMI,FDI,PEG
Custom
5 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
R1
24.9_0402_1%
12
C13 0.22U_0402_6.3V KOPT@
1 2
C28 0.22U_0402_6.3V KOPT@
1 2
C23 0.22U_0402_6.3V K@
1 2
C7 0.22U_0402_6.3V K@
1 2
C1 0.22U_0402_6.3V K@
1 2
C20 0.22U_0402_6.3V K@
1 2
C32 0.22U_0402_6.3V KOPT@
1 2
C4 0.22U_0402_6.3V K@
1 2
C11 0.22U_0402_6.3V KOPT@
1 2
C15 0.22U_0402_6.3V KOPT@
1 2
C24 0.22U_0402_6.3V K@
1 2
C8 0.22U_0402_6.3V K@
1 2
C18 0.22U_0402_6.3V K@
1 2
C12 0.22U_0402_6.3V KOPT@
1 2
C2 0.22U_0402_6.3V K@
1 2
C22 0.22U_0402_6.3V K@
1 2
C27 0.22U_0402_6.3V KOPT@
1 2
C6 0.22U_0402_6.3V K@
1 2
C31 0.22U_0402_6.3V KOPT@
1 2
C26 0.22U_0402_6.3V KOPT@
1 2
C10 0.22U_0402_6.3V KOPT@
1 2
C3 0.22U_0402_6.3V K@
1 2
C14 0.22U_0402_6.3V KOPT@
1 2
C5 0.22U_0402_6.3V K@
1 2
R7
24.9_0402_1%
12
C17 0.22U_0402_6.3V K@
1 2
C30 0.22U_0402_6.3V KOPT@
1 2
C21 0.22U_0402_6.3V K@
1 2
C29 0.22U_0402_6.3V KOPT@
1 2
C25 0.22U_0402_6.3V KOPT@
1 2
PCI EXPRESS* - GRAPHICS
DMI
Intel(R) FDI
eDP
JCPU1A
TYCO_2013620-2_IVY BRIDGE
DMI_RX#[0]
B27
DMI_RX#[1]
B25
DMI_RX#[2]
A25
DMI_RX#[3]
B24
DMI_RX[0]
B28
DMI_RX[1]
B26
DMI_RX[2]
A24
DMI_RX[3]
B23
DMI_TX#[0]
G21
DMI_TX#[1]
E22
DMI_TX#[2]
F21
DMI_TX#[3]
D21
DMI_TX[0]
G22
DMI_TX[1]
D22
DMI_TX[3]
C21
DMI_TX[2]
F20
FDI0_TX#[0]
A21
FDI0_TX#[1]
H19
FDI0_TX#[2]
E19
FDI0_TX#[3]
F18
FDI1_TX#[0]
B21
FDI1_TX#[1]
C20
FDI1_TX#[2]
D18
FDI1_TX#[3]
E17
FDI0_TX[0]
A22
FDI0_TX[1]
G19
FDI0_TX[2]
E20
FDI0_TX[3]
G18
FDI1_TX[0]
B20
FDI1_TX[1]
C19
FDI1_TX[2]
D19
FDI1_TX[3]
F17
FDI0_FSYNC
J18
FDI1_FSYNC
J17
FDI_INT
H20
FDI0_LSYNC
J19
FDI1_LSYNC
H17
PEG_ICOMPI
J22
PEG_ICOMPO
J21
PEG_RCOMPO
H22
PEG_RX#[0]
K33
PEG_RX#[1]
M35
PEG_RX#[2]
L34
PEG_RX#[3]
J35
PEG_RX#[4]
J32
PEG_RX#[5]
H34
PEG_RX#[6]
H31
PEG_RX#[7]
G33
PEG_RX#[8]
G30
PEG_RX#[9]
F35
PEG_RX#[10]
E34
PEG_RX#[11]
E32
PEG_RX#[12]
D33
PEG_RX#[13]
D31
PEG_RX#[14]
B33
PEG_RX#[15]
C32
PEG_RX[0]
J33
PEG_RX[1]
L35
PEG_RX[2]
K34
PEG_RX[3]
H35
PEG_RX[4]
H32
PEG_RX[5]
G34
PEG_RX[6]
G31
PEG_RX[7]
F33
PEG_RX[8]
F30
PEG_RX[9]
E35
PEG_RX[10]
E33
PEG_RX[11]
F32
PEG_RX[12]
D34
PEG_RX[13]
E31
PEG_RX[14]
C33
PEG_RX[15]
B32
PEG_TX#[0]
M29
PEG_TX#[1]
M32
PEG_TX#[2]
M31
PEG_TX#[3]
L32
PEG_TX#[4]
L29
PEG_TX#[5]
K31
PEG_TX#[6]
K28
PEG_TX#[7]
J30
PEG_TX#[8]
J28
PEG_TX#[9]
H29
PEG_TX#[10]
G27
PEG_TX#[11]
E29
PEG_TX#[12]
F27
PEG_TX#[13]
D28
PEG_TX#[14]
F26
PEG_TX#[15]
E25
PEG_TX[0]
M28
PEG_TX[1]
M33
PEG_TX[2]
M30
PEG_TX[3]
L31
PEG_TX[4]
L28
PEG_TX[5]
K30
PEG_TX[6]
K27
PEG_TX[7]
J29
PEG_TX[8]
J27
PEG_TX[9]
H28
PEG_TX[10]
G28
PEG_TX[11]
E28
PEG_TX[12]
F28
PEG_TX[13]
D27
PEG_TX[14]
E26
PEG_TX[15]
D25
eDP_AUX
C15
eDP_AUX#
D15
eDP_TX[0]
C17
eDP_TX[1]
F16
eDP_TX[2]
C16
eDP_TX[3]
G15
eDP_TX#[0]
C18
eDP_TX#[1]
E16
eDP_TX#[2]
D16
eDP_TX#[3]
F15
eDP_COMPIO
A18
eDP_HPD#
B16
eDP_ICOMPO
A17
C19 0.22U_0402_6.3V K@
1 2
C16 0.22U_0402_6.3V KOPT@
1 2
C9 0.22U_0402_6.3V KOPT@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR3 Compensation Signals
Compal Electronics, Inc.
Buffered reset to CPU
3V
R10;R11 put on U4 side
PU/PD for JTAG signals
R02
R02
R02
H_CATERR#
XDP_BPM#4
XDP_TRST#
XDP_PREQ#
SM_RCOMP0
XDP_BPM#7
PM_DRAM_PWRGD_R
XDP_TDO
SM_RCOMP2
XDP_BPM#1
XDP_BPM#6
CLK_CPU_DMI_R
CLK_CPU_DMI#_R
XDP_BPM#3
H_CPUPWRGD_R
XDP_TDI
XDP_BPM#0
BUF_CPU_RST#
XDP_DBRESET#
H_PROCHOT#_R
XDP_TCK
H_DRAMRST#
XDP_BPM#2
XDP_PRDY#
SM_RCOMP1
XDP_BPM#5
PCH_PLTRST#
BUFO_CPU_RST#
H_PROCHOT#
PM_SYS_PWRGD_BUF
BUF_CPU_RST#
XDP_TMS XDP_TDO
XDP_TCK
XDP_TRST#
XDP_TMS
XDP_TDI
H_PM_SYNC_R
PM_DRAM_PWRGD<16>
H_DRAMRST# <7>
H_PM_SYNC<16>
CLK_CPU_DMI# <15>
H_THRMTRIP#<19>
CLK_CPU_DMI <15>
H_CPUPWRGD<19>
H_SNB_IVB#<19>
H_PECI<42>
H_PROCHOT#<42,48>
PCH_PLTRST# <18>
SYS_PWROK<16>
+1.5V_CPU_VDDQ
+3VALW
+V1.05S_VCCP
+3VS
+3VS
+3VS
+V1.05S_VCCP
+V1.05S_VCCP
+V1.05S_VCCP
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PROCESSOR(2/7) PM,XDP,CLK
Custom
6 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PROCESSOR(2/7) PM,XDP,CLK
Custom
6 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PROCESSOR(2/7) PM,XDP,CLK
Custom
6 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
R23 51_0402_5%@
12
T95
R29
130_0402_5%
1 2
R24 51_0402_5%
12
T93
T97
R13 1K_0402_5%
12
T98
R18 200_0402_1%
12
R880 0_0402_5%
@
1 2
R30
200_0402_5%
12
R12 1K_0402_5%
12
R161
10K_0402_5%
1 2
U2
SN74LVC1G07DCKR_SC70-5
NC
1
A
2
G
3
Y
4
P
5
R17 25.5_0402_1%
12
T90
R28 1K_0402_5%
12
R10 0_0402_5%@
1 2
R25 51_0402_5%
12
R27
10K_0402_5%
1 2
R16 140_0402_1%
12
R22 0_0402_5%@
1 2
T94
R26 0_0402_5%@
1 2
R11 0_0402_5%@
1 2
T92
R32
75_0402_5%
12
R15
56_0402_5%
1 2
R21 51_0402_5%
12
T96
C34
0.1U_0402_16V7K
1
2
R34
43_0402_1%
1 2
R20 51_0402_5%
12
T49
T48
U1
74AHC1G09GW_TSSOP5
B
1
A
2
G
3
O
4
P
5
T91
CLOCKS
MISCTHERMALPWR MANAGEMENT
DDR3
MISC
JTAG & BPM
JCPU1B
TYCO_2013620-2_IVY BRIDGE
SM_RCOMP[1]
A5
SM_RCOMP[2]
A4
SM_DRAMRST#
R8
SM_RCOMP[0]
AK1
BCLK#
A27
BCLK
A28
DPLL_REF_CLK#
A15
DPLL_REF_CLK
A16
CATERR#
AL33
PECI
AN33
PROCHOT#
AL32
THERMTRIP#
AN32
SM_DRAMPWROK
V8
RESET#
AR33
PRDY#
AP29
PREQ#
AP27
TCK
AR26
TMS
AR27
TRST#
AP30
TDI
AR28
TDO
AP26
DBR#
AL35
BPM#[0]
AT28
BPM#[1]
AR29
BPM#[2]
AR30
BPM#[3]
AT30
BPM#[4]
AP32
BPM#[5]
AR31
BPM#[6]
AT31
BPM#[7]
AR32
PM_SYNC
AM34
SKTOCC#
AN34
PROC_SELECT#
C26
UNCOREPWRGOOD
AP33
C33
0.1U_0402_16V7K
1
2
R9
62_0402_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Compal Electronics, Inc.
For Deep S3
Eiffel used 0.01u
Module design used 0.047u
R02
DDR_A_D63
DDR_A_D62
DDR_A_D8
DDR_A_D3
DDR_A_D4
DDR_A_D7
DDR_A_D5
DDR_A_D6
DDR_A_D59
DDR_A_D58
DDR_A_D57
DDR_A_D56
DDR_A_D47
DDR_A_D46
DDR_A_D42
DDR_A_D43
DDR_A_D34
DDR_A_D39
DDR_A_D44
DDR_A_D45
DDR_A_D35
DDR_A_D41
DDR_A_D40
DDR_A_D38
DDR_A_D36
DDR_A_D37
DDR_A_D32
DDR_A_D33
DDR_A_D61
DDR_A_D60
DDR_A_D2
DDR_A_D1
DDR_A_D0
DDR_A_D55
DDR_A_D54
DDR_A_D51
DDR_A_D48
DDR_A_D50
DDR_A_D49
DDR_A_D52
DDR_A_D53
DDR_A_D31
DDR_A_D14
DDR_A_D15
DDR_A_D25
DDR_A_D24
DDR_A_D26
DDR_A_D27
DDR_A_D30
DDR_A_D9
DDR_A_D13
DDR_A_D12
DDR_A_D10
DDR_A_D11
DDR_A_D29
DDR_A_D28
DDR_A_D19
DDR_A_D20
DDR_A_D16
DDR_A_D21
DDR_A_D17
DDR_A_D22
DDR_A_D18
DDR_A_D23
DDR_A_MA15
DDR_A_DQS0
DDR_A_DQS2
DDR_A_DQS1
DDR_A_DQS6
DDR_A_DQS5
DDR_A_DQS4
DDR_A_DQS3
DDR_A_DQS7
DDR_A_DQS#7
DDR_A_DQS#0
DDR_A_DQS#2
DDR_A_DQS#5
DDR_A_DQS#3
DDR_A_DQS#1
DDR_A_DQS#4
DDR_A_DQS#6
DDR_A_MA0
DDR_A_MA14
DDR_A_MA5
DDR_A_MA4
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA9
DDR_A_MA7
DDR_A_MA6
DDR_A_MA12
DDR_A_MA13
DDR_A_MA8
DDR_A_MA11
DDR_A_MA10
DDR_B_D33
DDR_B_D14
DDR_B_D42
DDR_B_D59
DDR_B_D63
DDR_B_D43
DDR_B_D55
DDR_B_D53
DDR_B_D29
DDR_B_D24
DDR_B_D34
DDR_B_D4
DDR_B_D26
DDR_B_D13
DDR_B_D10
DDR_B_D21
DDR_B_D11
DDR_B_D57
DDR_B_D44
DDR_B_D0
DDR_B_D7
DDR_B_D46
DDR_B_D3
DDR_B_D15
DDR_B_D27
DDR_B_D30
DDR_B_D35
DDR_B_D40
DDR_B_D49
DDR_B_D23
DDR_B_D25
DDR_B_D19
DDR_B_D37
DDR_B_D48
DDR_B_D36
DDR_B_D18
DDR_B_D8
DDR_B_D47
DDR_B_D9
DDR_B_D60
DDR_B_D50
DDR_B_D62
DDR_B_D52
DDR_B_D2
DDR_B_D51
DDR_B_D56
DDR_B_D39
DDR_B_D22
DDR_B_D28
DDR_B_D6
DDR_B_D45
DDR_B_D17
DDR_B_D58
DDR_B_D61
DDR_B_D31
DDR_B_D54
DDR_B_D1
DDR_B_D41
DDR_B_D5
DDR_B_D12
DDR_B_D20
DDR_B_D38
DDR_B_D32
DDR_B_D16
DDR_B_MA15
DDR_B_DQS#1
DDR_B_DQS#7
DDR_B_DQS#5
DDR_B_DQS#4
DDR_B_DQS#0
DDR_B_DQS#3
DDR_B_DQS#6
DDR_B_DQS#2
DDR_B_DQS7
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS5
DDR_B_DQS4
DDR_B_DQS3
DDR_B_DQS2
DDR_B_DQS6
DDR_B_MA0
DDR_B_MA9
DDR_B_MA7
DDR_B_MA13
DDR_B_MA2
DDR_B_MA4
DDR_B_MA11
DDR_B_MA3
DDR_B_MA5
DDR_B_MA6
DDR_B_MA10
DDR_B_MA8
DDR_B_MA1
DDR_B_MA12
DDR_B_MA14
DDR3_DRAMRST#_RH_DRAMRST#
DRAMRST_CNTRL_R
DDR_A_D[0..63]<12>
DDR_A_BS0<12>
DDR_A_BS1<12>
DDR_A_BS2<12>
DDR_A_WE#<12>
DDR_A_RAS#<12>
DDR_A_CAS#<12>
M_CLK_DDR0 <12>
M_CLK_DDR#0 <12>
DDR_CKE0_DIMMA <12>
M_CLK_DDR1 <12>
M_CLK_DDR#1 <12>
DDR_CKE1_DIMMA <12>
DDR_CS0_DIMMA# <12>
DDR_CS1_DIMMA# <12>
M_ODT0 <12>
M_ODT1 <12>
DDR_A_DQS#[0..7] <12>
DDR_A_DQS[0..7] <12>
DDR_B_BS0<13>
DDR_B_BS1<13>
DDR_B_BS2<13>
DDR_B_WE#<13>
DDR_B_RAS#<13>
DDR_B_CAS#<13>
DDR_CS3_DIMMB# <13>
DDR_B_DQS[0..7] <13>
DDR_B_DQS#[0..7] <13>
M_CLK_DDR2 <13>
M_CLK_DDR#2 <13>
DDR_CKE2_DIMMB <13>
M_CLK_DDR3 <13>
DDR_CS2_DIMMB# <13>
M_ODT3 <13>
M_ODT2 <13>
DDR_CKE3_DIMMB <13>
M_CLK_DDR#3 <13>
DDR3_DRAMRST# <12,13>
H_DRAMRST#<6>
DDR_A_MA[0..15] <12> DDR_B_MA[0..15] <13>
DDR_B_D[0..63]<13>
DRAMRST_CNTRL_PCH<15>
DRAMRST_CNTRL<10>
DRAMRST_CNTRL_EC<42>
+1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PROCESSOR(3/7) DDRIII
Custom
7 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PROCESSOR(3/7) DDRIII
Custom
7 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PROCESSOR(3/7) DDRIII
Custom
7 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
R92 0_0402_5%
@
1 2
R40 0_0402_5%
NODS3@
1 2
C35
0.047U 16V K X7R 0402
1
2
R38
1K_0402_5%
1 2
R37
1K_0402_5%
12
R65 0_0402_5%DS3@
1 2
G
D
S
Q2
LBSS138LT1G_SOT-23-3
2
13
DDR SYSTEM MEMORY B
JCPU1D
TYCO_2013620-2_IVY BRIDGE
SB_BS[0]
AA9
SB_BS[1]
AA7
SB_BS[2]
R6
SB_CAS#
AA10
SB_RAS#
AB8
SB_WE#
AB9
SB_CLK[0]
AE2
SB_CLK[1]
AE1
SB_CLK#[0]
AD2
SB_CLK#[1]
AD1
SB_CKE[0]
R9
SB_CKE[1]
R10
SB_ODT[0]
AE4
SB_ODT[1]
AD4
SB_DQS[4]
AN6
SB_DQS#[4]
AN5
SB_DQS[5]
AP8
SB_DQS#[5]
AP9
SB_DQS[6]
AK11
SB_DQS#[6]
AK12
SB_DQS[7]
AP14
SB_DQS#[7]
AP15
SB_DQS[0]
C7
SB_DQS#[0]
D7
SB_DQS[1]
G3
SB_DQS#[1]
F3
SB_DQS[2]
J6
SB_DQS#[2]
K6
SB_DQS[3]
M3
SB_DQS#[3]
N3
SB_MA[0]
AA8
SB_MA[1]
T7
SB_MA[2]
R7
SB_MA[3]
T6
SB_MA[4]
T2
SB_MA[5]
T4
SB_MA[6]
T3
SB_MA[7]
R2
SB_MA[8]
T5
SB_MA[9]
R3
SB_MA[10]
AB7
SB_MA[11]
R1
SB_MA[12]
T1
SB_MA[13]
AB10
SB_MA[14]
R5
SB_MA[15]
R4
SB_DQ[0]
C9
SB_DQ[1]
A7
SB_DQ[2]
D10
SB_DQ[3]
C8
SB_DQ[4]
A9
SB_DQ[5]
A8
SB_DQ[6]
D9
SB_DQ[7]
D8
SB_DQ[8]
G4
SB_DQ[9]
F4
SB_DQ[10]
F1
SB_DQ[11]
G1
SB_DQ[12]
G5
SB_DQ[13]
F5
SB_DQ[14]
F2
SB_DQ[15]
G2
SB_DQ[16]
J7
SB_DQ[17]
J8
SB_DQ[18]
K10
SB_DQ[19]
K9
SB_DQ[20]
J9
SB_DQ[21]
J10
SB_DQ[22]
K8
SB_DQ[23]
K7
SB_DQ[24]
M5
SB_DQ[25]
N4
SB_DQ[26]
N2
SB_DQ[27]
N1
SB_DQ[28]
M4
SB_DQ[29]
N5
SB_DQ[30]
M2
SB_DQ[31]
M1
SB_DQ[32]
AM5
SB_DQ[33]
AM6
SB_DQ[34]
AR3
SB_DQ[35]
AP3
SB_DQ[36]
AN3
SB_DQ[37]
AN2
SB_DQ[38]
AN1
SB_DQ[39]
AP2
SB_DQ[40]
AP5
SB_DQ[41]
AN9
SB_DQ[42]
AT5
SB_DQ[43]
AT6
SB_DQ[44]
AP6
SB_DQ[45]
AN8
SB_DQ[46]
AR6
SB_DQ[47]
AR5
SB_DQ[48]
AR9
SB_DQ[49]
AJ11
SB_DQ[50]
AT8
SB_DQ[51]
AT9
SB_DQ[52]
AH11
SB_DQ[53]
AR8
SB_DQ[54]
AJ12
SB_DQ[55]
AH12
SB_DQ[56]
AT11
SB_DQ[57]
AN14
SB_DQ[58]
AR14
SB_DQ[59]
AT14
SB_DQ[60]
AT12
SB_DQ[61]
AN15
SB_DQ[62]
AR15
SB_DQ[63]
AT15
RSVD_TP[11]
AB2
RSVD_TP[12]
AA2
RSVD_TP[13]
T9
RSVD_TP[14]
AA1
RSVD_TP[15]
AB1
RSVD_TP[16]
T10
SB_CS#[0]
AD3
SB_CS#[1]
AE3
RSVD_TP[17]
AD6
RSVD_TP[18]
AE6
RSVD_TP[19]
AD5
RSVD_TP[20]
AE5
R39
4.99K_0402_1%
1 2
DDR SYSTEM MEMORY A
JCPU1C
TYCO_2013620-2_IVY BRIDGE
SA_BS[0]
AE10
SA_BS[1]
AF10
SA_BS[2]
V6
SA_CAS#
AE8
SA_RAS#
AD9
SA_WE#
AF9
SA_CLK[0]
AB6
SA_CLK[1]
AA5
SA_CLK#[0]
AA6
SA_CLK#[1]
AB5
SA_CKE[0]
V9
SA_CKE[1]
V10
SA_CS#[0]
AK3
SA_CS#[1]
AL3
SA_ODT[0]
AH3
SA_ODT[1]
AG3
SA_DQS[0]
D4
SA_DQS#[0]
C4
SA_DQS[1]
F6
SA_DQS#[1]
G6
SA_DQS[2]
K3
SA_DQS#[2]
J3
SA_DQS[3]
N6
SA_DQS#[3]
M6
SA_DQS[4]
AL5
SA_DQS#[4]
AL6
SA_DQS[5]
AM9
SA_DQS#[5]
AM8
SA_DQS[6]
AR11
SA_DQS#[6]
AR12
SA_DQS[7]
AM14
SA_DQS#[7]
AM15
SA_MA[0]
AD10
SA_MA[1]
W1
SA_MA[2]
W2
SA_MA[3]
W7
SA_MA[4]
V3
SA_MA[5]
V2
SA_MA[6]
W3
SA_MA[7]
W6
SA_MA[8]
V1
SA_MA[9]
W5
SA_MA[10]
AD8
SA_MA[11]
V4
SA_MA[12]
W4
SA_MA[13]
AF8
SA_MA[14]
V5
SA_MA[15]
V7
SA_DQ[0]
C5
SA_DQ[1]
D5
SA_DQ[2]
D3
SA_DQ[3]
D2
SA_DQ[4]
D6
SA_DQ[5]
C6
SA_DQ[6]
C2
SA_DQ[7]
C3
SA_DQ[8]
F10
SA_DQ[9]
F8
SA_DQ[10]
G10
SA_DQ[11]
G9
SA_DQ[12]
F9
SA_DQ[13]
F7
SA_DQ[14]
G8
SA_DQ[15]
G7
SA_DQ[16]
K4
SA_DQ[17]
K5
SA_DQ[18]
K1
SA_DQ[19]
J1
SA_DQ[20]
J5
SA_DQ[21]
J4
SA_DQ[22]
J2
SA_DQ[23]
K2
SA_DQ[24]
M8
SA_DQ[25]
N10
SA_DQ[26]
N8
SA_DQ[27]
N7
SA_DQ[28]
M10
SA_DQ[29]
M9
SA_DQ[30]
N9
SA_DQ[31]
M7
SA_DQ[32]
AG6
SA_DQ[33]
AG5
SA_DQ[34]
AK6
SA_DQ[35]
AK5
SA_DQ[36]
AH5
SA_DQ[37]
AH6
SA_DQ[38]
AJ5
SA_DQ[39]
AJ6
SA_DQ[40]
AJ8
SA_DQ[41]
AK8
SA_DQ[42]
AJ9
SA_DQ[43]
AK9
SA_DQ[44]
AH8
SA_DQ[45]
AH9
SA_DQ[46]
AL9
SA_DQ[47]
AL8
SA_DQ[48]
AP11
SA_DQ[49]
AN11
SA_DQ[50]
AL12
SA_DQ[51]
AM12
SA_DQ[52]
AM11
SA_DQ[53]
AL11
SA_DQ[54]
AP12
SA_DQ[55]
AN12
SA_DQ[56]
AJ14
SA_DQ[57]
AH14
SA_DQ[58]
AL15
SA_DQ[59]
AK15
SA_DQ[60]
AL14
SA_DQ[61]
AK14
SA_DQ[62]
AJ15
SA_DQ[63]
AH15
RSVD_TP[1]
AB4
RSVD_TP[2]
AA4
RSVD_TP[4]
AB3
RSVD_TP[5]
AA3
RSVD_TP[3]
W9
RSVD_TP[6]
W10
RSVD_TP[7]
AG1
RSVD_TP[8]
AH1
RSVD_TP[9]
AG2
RSVD_TP[10]
AH2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
10: x8, x8 - Device 1 function 1 enabled ; function 2
disabled
PCIE Port Bifurcation Straps
CFG[6:5]
11: (Default) x16 - Device 1 functions 1 and 2 disabled
CFG7
PEG DEFER TRAINING
0: PEG Wait for BIOS for training
1: (Default) PEG Train immediately following xxRESETB
de assertion
CFG4
Display Port Presence Strap
0 : Enabled; An external Display Port device is
connected to the Embedded Display Port
1 : Disabled; No Physical Display Port
attached to Embedded Display Port
CFG Straps for Processor
01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
PEG Static Lane Reversal - CFG2 is for the 16x
CFG2
0:Lane Reversed
1: Normal Operation; Lane # definition matches
socket pin map definition
Compal Electronics, Inc.
*
*
*
Need PWR add new circuit on 1.05V(refer CRB)
INTEL 12/28 recommand
to add RC120, RC121, RC122, RC123
Please place as close as JCPU1
Interl request AH26 short GND
check on EVT phase
R02
for N14P_GV2 GPU 11/13
CFG4
CFG6
CFG2
CFG7
CFG2
CFG4
CFG6
CFG7
CFG5
CFG5
VCC_VAL_SENSE
VCC_AXG_VAL_SENSE
VSS_AXG_VAL_SENSE
VSS_VAL_SENSE
VSS_VAL_SENSE
VSS_AXG_VAL_SENSE
+VCC_GFXCORE_AXG
+VCC_CORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PROCESSOR(4/7) RSVD,CFG
Custom
8 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PROCESSOR(4/7) RSVD,CFG
Custom
8 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PROCESSOR(4/7) RSVD,CFG
Custom
8 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
R88 100_0402_1%@
1 2
R255
49.9_0402_1%
1 2
R43
1K_0402_1%
GV2@
12
R42
1K_0402_1%
@
12
R257
49.9_0402_1%
1 2
R253
49.9_0402_1%
1 2
R82 100_0402_1%@
1 2
R44
1K_0402_1%
@
12
R252
49.9_0402_1%
1 2
RESERVED
CFG
JCPU1E
TYCO_2013620-2_IVY BRIDGE
CFG[0]
AK28
CFG[1]
AK29
CFG[2]
AL26
CFG[3]
AL27
CFG[4]
AK26
CFG[5]
AL29
CFG[6]
AL30
CFG[7]
AM31
CFG[8]
AM32
CFG[9]
AM30
CFG[10]
AM28
CFG[11]
AM26
CFG[12]
AN28
CFG[13]
AN31
CFG[14]
AN26
CFG[15]
AM27
CFG[16]
AK31
CFG[17]
AN29
RSVD34
AM33
RSVD35
AJ27
RSVD38
J16
RSVD_NCTF2
AT34
RSVD39
H16
RSVD40
G16
RSVD_NCTF1
AR35
RSVD_NCTF3
AT33
RSVD_NCTF5
AR34
RSVD_NCTF11
AT2
RSVD_NCTF12
AT1
RSVD_NCTF13
AR1
RSVD_NCTF6
B34
RSVD_NCTF7
A33
RSVD_NCTF8
A34
RSVD_NCTF9
B35
RSVD_NCTF10
C35
RSVD51
AJ32
RSVD52
AK32
RSVD27
J15
RSVD16
C30
RSVD15
D23
RSVD17
A31
RSVD18
B30
RSVD20
D30
RSVD19
B29
RSVD22
A30
RSVD21
B31
RSVD23
C29
RSVD37
T8
RSVD8
F25
RSVD9
F24
RSVD11
D24
RSVD12
G25
RSVD13
G24
RSVD14
E23
RSVD32
W8
RSVD33
AT26
RSVD_NCTF4
AP35
RSVD10
F23
RSVD5
AJ26
VAXG_VAL_SENSE
AJ31
VSSAXG_VAL_SENSE
AH31
VCC_VAL_SENSE
AJ33
VSS_VAL_SENSE
AH33
KEY
B1
VCC_DIE_SENSE
AH27
BCLK_ITP
AN35
BCLK_ITP#
AM35
VSS_DIE_SENSE
AH26
RSVD31
AK2
RSVD30
AE7
RSVD29
AG7
RSVD28
L7
RSVD24
J20
RSVD25
B18
R41
1K_0402_1%
12
R93 0_0402_5%@
1 2
T13PAD
R45
1K_0402_1%
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DC=53A
VR_SVID_CLK
QC=94A
series-resistors close to VR
VCC_SENCE 100ohm +-1% pull-up to VCC near processor
VSS_SENCE 100ohm +-1% pull-down to GND near processor
R74 & R79 put together
0.1uF on power side
Trace Impedance =27-33 ohm
Trace Length Matc < 25 mils
8.5A
R02
R02
R02
R02
VSSSENSE_R
VCCSENSE_R
H_CPU_SVIDCLK
H_CPU_SVIDDAT
H_CPU_SVIDALRT#
VSSIO_SENSEVSSIO_SENSE_L
VCCSENSE <55>
VSSSENSE <55>
VR_SVID_ALRT# <55>
VR_SVID_CLK <55>
VR_SVID_DAT <55>
VCCIO_SENSE <53>
VSSIO_SENSE_L <53>
+VCC_CORE
+VCC_CORE
+V1.05S_VCCP
+V1.05S_VCCP
+V1.05S_VCCP
+V1.05S_VCCP
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PROCESSOR(5/7) PWR,BYPASS
Custom
9 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PROCESSOR(5/7) PWR,BYPASS
Custom
9 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PROCESSOR(5/7) PWR,BYPASS
Custom
9 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
R51
100_0402_1%
12
R48 0_0402_5%@
1 2
R50 130_0402_5%
12
POWER
CORE SUPPLY
PEG AND DDR
SENSE LINES SVID
JCPU1F
TYCO_2013620-2_IVY BRIDGE
VCC_SENSE
AJ35
VSS_SENSE
AJ34
VIDALERT#
AJ29
VIDSCLK
AJ30
VIDSOUT
AJ28
VSS_SENSE_VCCIO
A10
VCC1
AG35
VCC2
AG34
VCC3
AG33
VCC4
AG32
VCC5
AG31
VCC6
AG30
VCC7
AG29
VCC8
AG28
VCC9
AG27
VCC10
AG26
VCC11
AF35
VCC12
AF34
VCC13
AF33
VCC14
AF32
VCC15
AF31
VCC16
AF30
VCC17
AF29
VCC18
AF28
VCC19
AF27
VCC20
AF26
VCC21
AD35
VCC22
AD34
VCC23
AD33
VCC24
AD32
VCC25
AD31
VCC26
AD30
VCC27
AD29
VCC28
AD28
VCC29
AD27
VCC30
AD26
VCC31
AC35
VCC32
AC34
VCC33
AC33
VCC34
AC32
VCC35
AC31
VCC36
AC30
VCC37
AC29
VCC38
AC28
VCC39
AC27
VCC40
AC26
VCC41
AA35
VCC42
AA34
VCC43
AA33
VCC44
AA32
VCC45
AA31
VCC46
AA30
VCC47
AA29
VCC48
AA28
VCC49
AA27
VCC50
AA26
VCC51
Y35
VCC52
Y34
VCC53
Y33
VCC54
Y32
VCC55
Y31
VCC56
Y30
VCC57
Y29
VCC58
Y28
VCC59
Y27
VCC60
Y26
VCC61
V35
VCC62
V34
VCC63
V33
VCC64
V32
VCC65
V31
VCC66
V30
VCC67
V29
VCC68
V28
VCC69
V27
VCC70
V26
VCC71
U35
VCC72
U34
VCC73
U33
VCC74
U32
VCC75
U31
VCC76
U30
VCC77
U29
VCC78
U28
VCC79
U27
VCC80
U26
VCC81
R35
VCC82
R34
VCC83
R33
VCC84
R32
VCC85
R31
VCC86
R30
VCC87
R29
VCC88
R28
VCC89
R27
VCC90
R26
VCC91
P35
VCC92
P34
VCC93
P33
VCC94
P32
VCC95
P31
VCC96
P30
VCC97
P29
VCC98
P28
VCC99
P27
VCC100
P26
VCCIO1
AH13
VCCIO12
J11
VCCIO18
G12
VCCIO19
F14
VCCIO20
F13
VCCIO21
F12
VCCIO22
F11
VCCIO23
E14
VCCIO24
E12
VCCIO2
AH10
VCCIO3
AG10
VCCIO4
AC10
VCCIO5
Y10
VCCIO6
U10
VCCIO7
P10
VCCIO8
L10
VCCIO9
J14
VCCIO10
J13
VCCIO11
J12
VCCIO13
H14
VCCIO14
H12
VCCIO15
H11
VCCIO16
G14
VCCIO17
G13
VCCIO25
E11
VCCIO32
C12
VCCIO33
C11
VCCIO34
B14
VCCIO35
B12
VCCIO36
A14
VCCIO37
A13
VCCIO38
A12
VCCIO39
A11
VCCIO26
D14
VCCIO27
D13
VCCIO28
D12
VCCIO29
D11
VCCIO30
C14
VCCIO31
C13
VCCIO_SENSE
B10
VCCIO40
J23
R52 0_0402_5%@
1 2
R46
75_0402_5%
12
R49 0_0402_5%@
1 2
R53 0_0402_5%@
1 2
C99
0.1U_0402_16V7K
1
2
R47 43_0402_5%
1 2
R54
100_0402_1%
12
R79
10_0402_1%
12
R74
10_0402_1%
@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AP4800
Id=9.6A
M3 Circuit (Processor Generated SO-DIMM VREF_DQ)
AP2302GN-HF_SOT23-3
SB523020210
Q5-orignal part
1.5A
+V_SM_VREF should
have 20 mil trace width
R20
R02
R02
80mil
+1.8VS_VCCPLL
RUN_ON_CPU1.5VS3
+VCCSA
H_VCCP_SEL
+V_DDR_REFA_R
+V_DDR_REFB_R
DRAMRST_CNTRL
DRAMRST_CNTRL
+V_DDR_REFB_R
+V_DDR_REFA_R
+V_SM_VREF_CNT
VCC_AXG_SENSE <55>
VSS_AXG_SENSE <55>
SUSP<25,46,51,54>
H_VCCSA_VID1 <52>
H_VCCSA_VID0 <52>
+VCCSA_SENSE <52>
DRAMRST_CNTRL <7>
+1.5V_CPU_VDDQ
+1.8VS
+1.5V +1.5V_CPU_VDDQ
+VSB
+VCCSA
+1.5V +1.5V_CPU_VDDQ
+3VS
+VCC_GFXCORE_AXG
+1.5V_CPU_VDDQ
+VCC_GFXCORE_AXG
+VREF_DQ_DIMMA
+VREF_DQ_DIMMB
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PROCESSOR(6/7) PWR
Custom
10 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PROCESSOR(6/7) PWR
Custom
10 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PROCESSOR(6/7) PWR
Custom
10 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
C117
10U_0603_6.3V6M
1
2
R77 0_0402_5%@
1 2
C122
10U_0603_6.3V6M
1
2
C132
1U_0402_6.3V6K
1
2
U3
AP4800BGM-HF_SO-8
36
5
7
8
2
4
1
+
C123
330U_2.5V_M
1
2
C119
10U_0603_6.3V6M
1
2
R78
1K_0402_1%
12
C120
10U_0603_6.3V6M
1
2
C131
1U_0402_6.3V6K
1
2
R670
0_0402_5%~D
@
1 2
R67
1K_0402_1%
12
R671
0_0402_5%~D
@
1 2
POWER
GRAPHICS
DDR3 -1.5V RAILS
SENSE
LINES
1.8V RAIL
SA RAIL
VREFMISC
JCPU1G
TYCO_2013620-2_IVY BRIDGE
SM_VREF
AL1
VSSAXG_SENSE
AK34
VAXG_SENSE
AK35
VAXG1
AT24
VAXG2
AT23
VAXG3
AT21
VAXG4
AT20
VAXG5
AT18
VAXG6
AT17
VAXG7
AR24
VAXG8
AR23
VAXG9
AR21
VAXG10
AR20
VAXG11
AR18
VAXG12
AR17
VAXG13
AP24
VAXG14
AP23
VAXG15
AP21
VAXG16
AP20
VAXG17
AP18
VAXG18
AP17
VAXG19
AN24
VAXG20
AN23
VAXG21
AN21
VAXG22
AN20
VAXG23
AN18
VAXG24
AN17
VAXG25
AM24
VAXG26
AM23
VAXG27
AM21
VAXG28
AM20
VAXG29
AM18
VAXG30
AM17
VAXG31
AL24
VAXG32
AL23
VAXG33
AL21
VAXG34
AL20
VAXG35
AL18
VAXG36
AL17
VAXG37
AK24
VAXG38
AK23
VAXG39
AK21
VAXG40
AK20
VAXG41
AK18
VAXG42
AK17
VAXG43
AJ24
VAXG44
AJ23
VAXG45
AJ21
VAXG46
AJ20
VAXG47
AJ18
VAXG48
AJ17
VAXG49
AH24
VAXG50
AH23
VAXG51
AH21
VAXG52
AH20
VAXG53
AH18
VAXG54
AH17
VDDQ11
U4
VDDQ12
U1
VDDQ13
P7
VDDQ14
P4
VDDQ15
P1
VDDQ1
AF7
VDDQ2
AF4
VDDQ3
AF1
VDDQ4
AC7
VDDQ5
AC4
VDDQ6
AC1
VDDQ7
Y7
VDDQ8
Y4
VDDQ9
Y1
VDDQ10
U7
VCCPLL1
B6
VCCPLL2
A6
VCCSA1
M27
VCCSA2
M26
VCCSA3
L26
VCCSA4
J26
VCCSA5
J25
VCCSA6
J24
VCCSA7
H26
VCCSA8
H25
VCCSA_SENSE
H23
VCCSA_VID[1]
C24
VCCPLL3
A2
VCCSA_VID[0]
C22
SA_DIMM_VREFDQ
B4
SB_DIMM_VREFDQ
D1
VCCIO_SEL
A19
R626
10_0402_1%
12
G
D
S
Q9
LBSS138LT1G_SOT-23-3
2
13
G
D
S
Q6
LBSS138LT1G_SOT-23-3
2
13
R668 0_0402_5%@
1 2
C118
10U_0603_6.3V6M
1
2
C127
10U_0603_6.3V6M
1
2
C98
0.1U_0402_16V7K
1
2
R885
15K_0402_1%
1 2
R75
10K_0402_5%
1 2
R64
1K_0402_1%
@
12
+
C128
330U_D2_2.5VY_R9M
@
1
2
R616
10_0402_1%
12
C121
10U_0603_6.3V6M
1
2
R353
1K_0402_1%
@
12
C130
10U_0603_6.3V6M
1
2
C95
0.1U_0402_16V7K
1 2
G
D
S
Q4
2N7002K_SOT23-3
2
13
J14
JUMP_43X79
@
1
1
2
2
C125
10U_0603_6.3V6M
1
2
C96
0.1U_0402_16V7K
1 2
C124
10U_0603_6.3V6M
1
2
C126
10U_0603_6.3V6M
1
2
J1
PAD-OPEN 4x4m
@
1 2
R56
82K_0402_5%
12
C97
0.047U_0603_25V7M
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PROCESSOR(7/7) VSS
Custom
11 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PROCESSOR(7/7) VSS
Custom
11 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PROCESSOR(7/7) VSS
Custom
11 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
VSS
JCPU1I
TYCO_2013620-2_IVY BRIDGE
VSS161
T35
VSS162
T34
VSS163
T33
VSS164
T32
VSS165
T31
VSS166
T30
VSS167
T29
VSS168
T28
VSS169
T27
VSS170
T26
VSS171
P9
VSS172
P8
VSS173
P6
VSS174
P5
VSS175
P3
VSS176
P2
VSS177
N35
VSS178
N34
VSS179
N33
VSS180
N32
VSS181
N31
VSS182
N30
VSS183
N29
VSS184
N28
VSS185
N27
VSS186
N26
VSS187
M34
VSS188
L33
VSS189
L30
VSS190
L27
VSS191
L9
VSS192
L8
VSS193
L6
VSS194
L5
VSS195
L4
VSS196
L3
VSS197
L2
VSS198
L1
VSS199
K35
VSS200
K32
VSS201
K29
VSS202
K26
VSS203
J34
VSS204
J31
VSS205
H33
VSS206
H30
VSS207
H27
VSS208
H24
VSS209
H21
VSS210
H18
VSS211
H15
VSS212
H13
VSS213
H10
VSS214
H9
VSS215
H8
VSS216
H7
VSS217
H6
VSS218
H5
VSS219
H4
VSS220
H3
VSS221
H2
VSS222
H1
VSS223
G35
VSS224
G32
VSS225
G29
VSS226
G26
VSS227
G23
VSS228
G20
VSS229
G17
VSS230
G11
VSS231
F34
VSS232
F31
VSS233
F29
VSS234
F22
VSS235
F19
VSS236
E30
VSS237
E27
VSS238
E24
VSS239
E21
VSS240
E18
VSS241
E15
VSS242
E13
VSS243
E10
VSS244
E9
VSS245
E8
VSS246
E7
VSS247
E6
VSS248
E5
VSS249
E4
VSS250
E3
VSS251
E2
VSS252
E1
VSS253
D35
VSS254
D32
VSS255
D29
VSS256
D26
VSS257
D20
VSS258
D17
VSS259
C34
VSS260
C31
VSS261
C28
VSS262
C27
VSS263
C25
VSS264
C23
VSS265
C10
VSS266
C1
VSS267
B22
VSS268
B19
VSS269
B17
VSS270
B15
VSS271
B13
VSS272
B11
VSS273
B9
VSS274
B8
VSS275
B7
VSS276
B5
VSS277
B3
VSS278
B2
VSS279
A35
VSS280
A32
VSS281
A29
VSS282
A26
VSS283
A23
VSS284
A20
VSS285
A3
VSS
JCPU1H
TYCO_2013620-2_IVY BRIDGE
VSS1
AT35
VSS2
AT32
VSS3
AT29
VSS4
AT27
VSS5
AT25
VSS6
AT22
VSS7
AT19
VSS8
AT16
VSS9
AT13
VSS10
AT10
VSS11
AT7
VSS12
AT4
VSS13
AT3
VSS14
AR25
VSS15
AR22
VSS16
AR19
VSS17
AR16
VSS18
AR13
VSS19
AR10
VSS20
AR7
VSS21
AR4
VSS22
AR2
VSS23
AP34
VSS24
AP31
VSS25
AP28
VSS26
AP25
VSS27
AP22
VSS28
AP19
VSS29
AP16
VSS30
AP13
VSS31
AP10
VSS32
AP7
VSS33
AP4
VSS34
AP1
VSS35
AN30
VSS36
AN27
VSS37
AN25
VSS38
AN22
VSS39
AN19
VSS40
AN16
VSS41
AN13
VSS42
AN10
VSS43
AN7
VSS44
AN4
VSS45
AM29
VSS46
AM25
VSS47
AM22
VSS48
AM19
VSS49
AM16
VSS50
AM13
VSS51
AM10
VSS52
AM7
VSS53
AM4
VSS54
AM3
VSS55
AM2
VSS56
AM1
VSS57
AL34
VSS58
AL31
VSS59
AL28
VSS60
AL25
VSS61
AL22
VSS62
AL19
VSS63
AL16
VSS64
AL13
VSS65
AL10
VSS66
AL7
VSS67
AL4
VSS68
AL2
VSS69
AK33
VSS70
AK30
VSS71
AK27
VSS72
AK25
VSS73
AK22
VSS74
AK19
VSS75
AK16
VSS76
AK13
VSS77
AK10
VSS78
AK7
VSS79
AK4
VSS80
AJ25
VSS81
AJ22
VSS82
AJ19
VSS83
AJ16
VSS84
AJ13
VSS85
AJ10
VSS86
AJ7
VSS87
AJ4
VSS88
AJ3
VSS89
AJ2
VSS90
AJ1
VSS91
AH35
VSS92
AH34
VSS93
AH32
VSS94
AH30
VSS95
AH29
VSS96
AH28
VSS98
AH25
VSS99
AH22
VSS100
AH19
VSS101
AH16
VSS102
AH7
VSS103
AH4
VSS104
AG9
VSS105
AG8
VSS106
AG4
VSS107
AF6
VSS108
AF5
VSS109
AF3
VSS110
AF2
VSS111
AE35
VSS112
AE34
VSS113
AE33
VSS114
AE32
VSS115
AE31
VSS116
AE30
VSS117
AE29
VSS118
AE28
VSS119
AE27
VSS120
AE26
VSS121
AE9
VSS122
AD7
VSS123
AC9
VSS124
AC8
VSS125
AC6
VSS126
AC5
VSS127
AC3
VSS128
AC2
VSS129
AB35
VSS130
AB34
VSS131
AB33
VSS132
AB32
VSS133
AB31
VSS134
AB30
VSS135
AB29
VSS136
AB28
VSS137
AB27
VSS138
AB26
VSS139
Y9
VSS140
Y8
VSS141
Y6
VSS142
Y5
VSS143
Y3
VSS144
Y2
VSS145
W35
VSS146
W34
VSS147
W33
VSS148
W32
VSS149
W31
VSS150
W30
VSS151
W29
VSS152
W28
VSS153
W27
VSS154
W26
VSS155
U9
VSS156
U8
VSS157
U6
VSS158
U5
VSS159
U3
VSS160
U2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR3 SO-DIMM A
Layout Note:
Place near DIMM
3A@1.5V
3A@1.5V3A@1.5V
3A@1.5V
0.65A@0.75V
0.65A@0.75V0.65A@0.75V
0.65A@0.75V
3*330uf / 12m ohm (TOTAL FOR 2 SO-DIMMs)
6*0603 10uf (PER CONNECTOR)
VDDQ(1.5V) =
3*0805 10uf
VTT(0.75V) =
4*0402 1uf
1*0402 0.1uf
VREF =
1*0402 2.2uf
VDDSPD (3.3V)=
1*0402 0.1uf 1*0402 2.2uf
Layout Note:
Place near DIMM
Layout Note:
Place near DIMM
(10uF_0603_6.3V)*8
(0.1uF_402_10V)*4
(220uF_6.3V_4.2L_ESR17m)*1=(SF000002Y00)OSCAN
7/28 Update connect GND directly
EVT Check
DDR_A_D31
DDR_A_D12
DDR_CKE0_DIMMA
DDR_A_D59
DDR_A_D6
DDR_A_MA3
DDR_CS1_DIMMA#
DDR_A_D39
DDR_A_BS1
DDR_A_DQS0
DDR_A_WE#
DDR_A_MA7
DDR_A_MA0
DDR_A_DM2
DDR_A_DM1
DDR_A_DQS7
DDR_A_D0
DDR_A_D57
DDR_A_D46
DDR_A_D28
DDR_A_D19
DDR_A_DQS#5
DDR_A_D51
DDR_A_D4
DDR_A_DM4
DDR_A_D30
DDR_A_DQS2
DDR_A_D44
DDR_A_RAS#
DDR_A_D33
DDR_A_D58
DDR_A_DM5
DDR_A_DQS3
DDR_A_MA8
DDR_CS0_DIMMA#
DDR_A_D10
DDR_A_MA6
DDR_A_D27
DDR_A_D3
DDR3_DRAMRST#
DDR_A_MA10
DDR_A_DQS#7
DDR_A_D1
DDR_A_DQS#6
DDR_A_D40
DDR_A_MA9
DDR_A_D16
DDR_A_D29
DDR_A_DQS#4
DDR_A_D52
DDR_A_DM3
DDR_A_DQS5
DDR_A_D54
DDR_A_D49
DDR_A_BS2
DDR_A_D45
DDR_A_D9
DDR_A_DM7
DDR_A_D7
DDR_A_MA1
DDR_A_D13
DDR_A_D20
DDR_A_D60
DDR_A_BS0
DDR_A_CAS# M_ODT0
DDR_A_D37
DDR_A_MA5
DDR_A_DQS#1
DDR_A_MA14
DDR_A_D55
DDR_A_MA4
DDR_A_D21
DDR_A_D62
DDR_A_D24
DDR_A_D15
DDR_A_D23
DDR_A_D56
DDR_A_D53
DDR_A_D47
DDR_A_D18
M_ODT1
DDR_A_D43
DDR_A_D34
M_CLK_DDR1
M_CLK_DDR#1
DDR_A_D48
DDR_A_DQS#2
DDR_A_D11
DDR_A_D38
M_CLK_DDR0
M_CLK_DDR#0
DDR_A_DQS#3
DDR_A_D32
DDR_A_D8
DDR_A_DQS1
DDR_A_MA13
DDR_A_MA11
DDR_A_D50
DDR_A_D61
DDR_A_MA2
DDR_A_D41
DDR_A_D17
DDR_A_D36
DDR_A_D26
DDR_A_D63
DDR_A_D2
DDR_A_D5
DDR_A_D22
DDR_A_D25
DDR_A_DQS6
DDR_A_D35
DDR_A_D14
DDR_A_MA12
DDR_A_DQS#0
DDR_A_DQS4
DDR_A_DM6
DDR_A_D42
DDR_CKE1_DIMMA
+VREF_DQ_DIMMA
+VREF_CA
DDR_A_MA15
DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7
SMB_CLK_S3
SMB_DATA_S3
DDR_A_DM0
DDR_A_DQS#[0..7]<7>
DDR_A_D[0..63]<7>
DDR_A_DQS[0..7]<7>
DDR_A_MA[0..15]<7>
DDR_CKE0_DIMMA<7>
DDR_A_BS2<7>
M_CLK_DDR0<7>
M_CLK_DDR#0<7>
DDR_A_BS0<7>
DDR_A_WE#<7>
DDR_A_CAS#<7>
DDR_CS1_DIMMA#<7>
DDR_CKE1_DIMMA <7>
DDR_A_BS1 <7>
DDR_A_RAS# <7>
DDR_CS0_DIMMA# <7>
M_ODT0 <7>
M_CLK_DDR1 <7>
M_CLK_DDR#1 <7>
M_ODT1 <7>
DDR3_DRAMRST# <7,13>
SMB_CLK_S3 <13,15,36,43>
SMB_DATA_S3 <13,15,36,43>
+0.75VS
+3VS
+1.5V +1.5V
+1.5V
+0.75VS
+1.5V
+1.5V
+VREF_DQ_DIMMA
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0
DDRIII-SODIMM SLOT1
Custom
12 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Compal Electronics, Inc.
LA-9603P
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0
DDRIII-SODIMM SLOT1
Custom
12 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Compal Electronics, Inc.
LA-9603P
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0
DDRIII-SODIMM SLOT1
Custom
12 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Compal Electronics, Inc.
LA-9603P
C146
0.1U_0402_16V7K
1
2
C140
10U_0603_6.3V6M
1
2
R70
1K_0402_1%
12
C156
0.1U_0402_16V7K
1
2
C155
2.2U_0603_6.3V6K
1
2
C152
1U_0402_6.3V6K
1
2
C147
0.1U_0402_16V7K
1
2
C139
10U_0603_6.3V6M
1
2
C144
10U_0603_6.3V6M
1
2
C143
10U_0603_6.3V6M
1
2
C142
10U_0603_6.3V6M
1
2
C135
0.1U_0402_16V7K
1
2
JDIMM1
LCN_DAN06-K4806-0103
ME@
VREF_DQ
1
VSS1
2
VSS2
3
DQ4
4
DQ0
5
DQ5
6
DQ1
7
VSS3
8
VSS4
9
DQS#0
10
DM0
11
DQS0
12
VSS5
13
VSS6
14
DQ2
15
DQ6
16
DQ3
17
DQ7
18
VSS7
19
VSS8
20
DQ8
21
DQ12
22
DQ9
23
DQ13
24
VSS9
25
VSS10
26
DQS#1
27
DM1
28
DQS1
29
RESET#
30
VSS11
31
VSS12
32
DQ10
33
DQ14
34
DQ11
35
DQ15
36
VSS13
37
VSS14
38
DQ16
39
DQ20
40
DQ17
41
DQ21
42
VSS15
43
VSS16
44
DQS#2
45
DM2
46
DQS2
47
VSS17
48
VSS18
49
DQ22
50
DQ18
51
DQ23
52
DQ19
53
VSS19
54
VSS20
55
DQ28
56
DQ24
57
DQ29
58
DQ25
59
VSS21
60
VSS22
61
DQS#3
62
DM3
63
DQS3
64
VSS23
65
VSS24
66
DQ26
67
DQ30
68
DQ27
69
DQ31
70
VSS25
71
VSS26
72
A12/BC#
83
A11
84
A9
85
A7
86
VDD5
87
VDD6
88
A8
89
A6
90
CKE0
73
CKE1
74
VDD1
75
VDD2
76
NC1
77
A15
78
BA2
79
A14
80
VDD3
81
VDD4
82
A5
91
A4
92
VDD7
93
VDD8
94
A3
95
A2
96
A1
97
A0
98
VDD9
99
VDD10
100
CK0
101
CK1
102
CK0#
103
CK1#
104
VDD11
105
VDD12
106
A10/AP
107
BA1
108
BA0
109
RAS#
110
VDD13
111
VDD14
112
WE#
113
S0#
114
CAS#
115
ODT0
116
VDD15
117
VDD16
118
A13
119
ODT1
120
S1#
121
NC2
122
VDD17
123
VDD18
124
NCTEST
125
VREF_CA
126
VSS27
127
VSS28
128
DQ32
129
DQ36
130
DQ33
131
DQ37
132
VSS29
133
VSS30
134
DQS#4
135
DM4
136
DQS4
137
VSS31
138
VSS32
139
DQ38
140
DQ34
141
DQ39
142
DQ35
143
VSS33
144
VSS34
145
DQ44
146
DQ40
147
DQ45
148
DQ41
149
VSS35
150
VSS36
151
DQS#5
152
DM5
153
DQS5
154
VSS37
155
VSS38
156
DQ42
157
DQ46
158
DQ43
159
DQ47
160
VSS39
161
VSS40
162
DQ48
163
DQ52
164
DQ49
165
DQ53
166
VSS41
167
VSS42
168
DQS#6
169
DM6
170
DQS6
171
VSS43
172
VSS44
173
DQ54
174
DQ50
175
DQ55
176
DQ51
177
VSS45
178
VSS46
179
DQ60
180
DQ56
181
DQ61
182
DQ57
183
VSS47
184
VSS48
185
DQS#7
186
DM7
187
DQS7
188
VSS49
189
VSS50
190
DQ58
191
DQ62
192
DQ59
193
DQ63
194
VSS51
195
VSS52
196
SA0
197
EVENT#
198
VDDSPD
199
SDA
200
SA1
201
SCL
202
VTT1
203
VTT2
204
G1
205
G2
206
R71
1K_0402_1%
12
C141
10U_0603_6.3V6M
1
2
+
C149
220U_6.3V_M
@
1
2
C145
0.1U_0402_16V7K
1
2
R83
10K_0402_5%
12
C136
2.2U_0603_6.3V6K
1
2
C133
0.1U_0402_16V7K
1
2
R73
1K_0402_1%
12
C134
2.2U_0603_6.3V6K
1
2
R81
10K_0402_5%
1 2
R72
1K_0402_1%
12
C148
0.1U_0402_16V7K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Layout Note:
Place near DIMM
3A@1.5V
3A@1.5V3A@1.5V
3A@1.5V
0.65A@0.75V
0.65A@0.75V0.65A@0.75V
0.65A@0.75V
1*0402 0.1uf
1*0402 2.2uf
3*330uf / 12m ohm (TOTAL FOR 2 SO-DIMMs)
6*0603 10uf (PER CONNECTOR)
3*0805 10uf
VTT(0.75V) =
4*0402 1uf
1*0402 0.1uf
VDDQ(1.5V) =
1*0402 2.2uf
VDDSPD (3.3V)=
Layout Note:
Place near DIMM
Layout Note:
Place near DIMM
(10uF_0603_6.3V)*8
(0.1uF_402_10V)*4
For Arranale only +VREF_DQ_DIMMB
supply from a external 1.5V voltage divide
circuit.
DDR_B_D36
DDR_B_D63
DDR_B_MA15
DDR_B_DM6
DDR_B_D39
DDR_B_BS1
DDR_B_MA7
DDR_B_MA0
DDR_B_DQS7
DDR_B_D46
DDR_B_DQS#5
DDR_B_DM4
DDR_B_D44
DDR_B_RAS#
DDR_CS2_DIMMB#
DDR_B_MA6
DDR_B_DQS#7
DDR_B_D52
DDR_B_DQS5
DDR_B_D54
DDR_B_D45
DDR_B_D60
M_ODT2
DDR_B_D37
DDR_B_MA14
DDR_B_D55
DDR_B_MA4
DDR_B_D62
DDR_B_D53
DDR_B_D47
M_ODT3
M_CLK_DDR3
M_CLK_DDR#3
DDR_B_D38
DDR_B_MA11
DDR_B_D61
DDR_B_MA2
SMB_CLK_S3
SMB_DATA_S3
DDR_B_DQS6
DDR_B_D35
DDR_B_MA12
DDR_B_DQS4
DDR_B_D42
DDR_CKE2_DIMMB
DDR_B_D59
DDR_B_MA3
DDR_CS3_DIMMB#
DDR_B_WE#
DDR_B_D57
DDR_B_D51
DDR_B_D33
DDR_B_D58
DDR_B_DM5
DDR_B_MA8
DDR_B_MA10
DDR_B_DQS#6
DDR_B_D40
DDR_B_MA9
DDR_B_DQS#4
DDR_B_D49
DDR_B_BS2
DDR_B_DM7
DDR_B_MA1
DDR_B_BS0
DDR_B_CAS#
DDR_B_MA5
DDR_B_D56
DDR_B_D43
DDR_B_D34
DDR_B_D48
M_CLK_DDR2
M_CLK_DDR#2
DDR_B_D32
DDR_B_MA13
DDR_B_D50
DDR_B_D41
DDR_B_DM6
DDR_B_DM7
DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
+VREF_CB
DDR_B_D5
DDR_B_D22
DDR_B_D14
DDR_B_DQS#0
DDR_B_D31
DDR_B_D12
DDR_B_D6
DDR_B_DQS0
DDR_B_DM2
DDR_B_DM1
DDR_B_D28
DDR_B_D4
DDR_B_D30
DDR_B_DQS3
DDR3_DRAMRST#
DDR_B_D29
DDR_B_D7
DDR_B_D13
DDR_B_D20
DDR_B_D21
DDR_B_D15
DDR_B_D23
DDR_B_DQS#3
DDR_CKE3_DIMMB
DDR_B_D26
DDR_B_D2
DDR_B_D25
+VREF_DQ_DIMMB
DDR_B_D0
DDR_B_DM0
DDR_B_D19
DDR_B_DQS2
DDR_B_D10
DDR_B_D27
DDR_B_D3
DDR_B_D1
DDR_B_D16
DDR_B_DM3
DDR_B_D9
DDR_B_DQS#1
DDR_B_D24
DDR_B_D18
DDR_B_DQS#2
DDR_B_D11
DDR_B_D8
DDR_B_DQS1
DDR_B_D17
DDR3_DRAMRST# <7,12>
DDR_B_DQS#[0..7]<7>
DDR_B_D[0..63]<7>
DDR_B_DQS[0..7]<7>
DDR_B_MA[0..15]<7>
DDR_CKE3_DIMMB <7>
M_CLK_DDR3 <7>
M_CLK_DDR#3 <7>
DDR_B_BS1 <7>
DDR_B_RAS# <7>
DDR_CS2_DIMMB# <7>
M_ODT2 <7>
M_ODT3 <7>
SMB_DATA_S3 <12,15,36,43>
SMB_CLK_S3 <12,15,36,43>
DDR_B_BS2<7>
DDR_CKE2_DIMMB<7>
M_CLK_DDR2<7>
M_CLK_DDR#2<7>
DDR_B_BS0<7>
DDR_B_WE#<7>
DDR_B_CAS#<7>
DDR_CS3_DIMMB#<7>
+0.75VS
+3VS
+1.5V
+0.75VS
+1.5V
+1.5V+1.5V
+1.5V
+VREF_DQ_DIMMB
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0
DDRIII-SODIMM SLOT2
13 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Compal Electronics, Inc.
LA-9603P
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0
DDRIII-SODIMM SLOT2
13 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Compal Electronics, Inc.
LA-9603P
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0
DDRIII-SODIMM SLOT2
13 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Compal Electronics, Inc.
LA-9603P
C168
10U_0603_6.3V6M
1
2
C158
2.2U_0603_6.3V6K
1
2
C170
0.1U_0402_16V7K
1
2
C166
10U_0603_6.3V6M
1
2
C176
1U_0402_6.3V6K
1
2
C171
0.1U_0402_16V7K
1
2
C174
1U_0402_6.3V6K
1
2
C172
0.1U_0402_16V7K
1
2
R85
1K_0402_1%
12
R87
1K_0402_1%
12
R95
10K_0402_5%
1 2
C160
2.2U_0603_6.3V6K
1
2
C164
10U_0603_6.3V6M
1
2
C165
10U_0603_6.3V6M
1
2
C167
10U_0603_6.3V6M
1
2
C157
0.1U_0402_16V7K
1
2
C178
0.1U_0402_16V7K
1
2
JDIMM2
LCN_DAN06-K4406-0103
ME@
VREF_DQ
1
VSS
3
DQ0
5
DQ1
7
VSS
9
DM0
11
VSS
13
DQ2
15
DQ3
17
VSS
19
DQ8
21
DQ9
23
VSS
25
DQS1#
27
DQS1
29
VSS
31
DQ10
33
DQ11
35
VSS
37
DQ16
39
VSS
2
DQ4
4
DQ5
6
VSS
8
DQS0#
10
DQS0
12
VSS
14
DQ6
16
DQ7
18
VSS
20
DQ12
22
DQ13
24
VSS
26
DM1
28
RESET#
30
VSS
32
DQ14
34
DQ15
36
VSS
38
DQ20
40
DQ17
41
VSS
43
DQS2#
45
DQS2
47
VSS
49
DQ18
51
DQ19
53
VSS
55
DQ24
57
DQ25
59
VSS
61
DM3
63
VSS
65
DQ26
67
DQ27
69
VSS
71
CKE0
73
VDD
75
NC
77
BA2
79
VDD
81
A12/BC#
83
A9
85
VDD
87
A8
89
A5
91
VDD
93
A3
95
A1
97
VDD
99
CK0
101
CK0#
103
VDD
105
A10/AP
107
BA0
109
VDD
111
WE#
113
CAS#
115
VDD
117
A13
119
S1#
121
VDD
123
TEST
125
VSS
127
DQ32
129
DQ33
131
VSS
133
DQS4#
135
DQS4
137
VSS
139
DQ34
141
DQ35
143
VSS
145
DQ40
147
DQ41
149
VSS
151
DM5
153
VSS
155
DQ42
157
DQ43
159
VSS
161
DQ48
163
DQ49
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SA0
197
VDDSPD
199
DQ21
42
VSS
44
DM2
46
VSS
48
DQ22
50
DQ23
52
VSS
54
DQ28
56
DQ29
58
VSS
60
DQS3#
62
DQS3
64
VSS
66
DQ30
68
DQ31
70
VSS
72
CKE1
74
VDD
76
A15
78
A14
80
VDD
82
A11
84
A7
86
VDD
88
A6
90
A4
92
VDD
94
A2
96
A0
98
VDD
100
CK1
102
CK1#
104
VDD
106
BA1
108
RAS#
110
VDD
112
S0#
114
ODT0
116
VDD
118
ODT1
120
NC
122
VDD
124
VREF_CA
126
VSS
128
DQ36
130
DQ37
132
VSS
134
DM4
136
VSS
138
DQ38
140
DQ39
142
VSS
144
DQ44
146
DQ45
148
VSS
150
DQS5#
152
DQS5
154
VSS
156
DQ46
158
DQ47
160
VSS
162
DQ52
164
DQ53
166
VSS
168
DM6
170
VSS
172
DQ54
174
DQ55
176
VSS
178
DQ60
180
DQ61
182
VSS
184
DQS7#
186
DQS7
188
VSS
190
DQ62
192
DQ63
194
VSS
196
EVENT#
198
SDA
200
SA1
201
VTT
203
GND1
205
SCL
202
VTT
204
GND2
206
BOSS1
207
BOSS2
208
C163
10U_0603_6.3V6M
1
2
C169
0.1U_0402_16V7K
1
2
R97 10K_0402_5%
1 2
R86
1K_0402_1%
12
R84
1K_0402_1%
12
C177
2.2U_0603_6.3V6K
1
2
C159
0.1U_0402_16V7K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CMOS
SSD
Compal Electronics, Inc.
H
Integrated VRM enable
L
Integrated VRM disable
INTVRMEN
*
LOW= Disable (Default)
HIGH= Enable ( No Reboot )
*
*
Low = Disabled (Default)
High = Enabled [Flash Descriptor Security Overide]
*
(INTVRMEN should always be pull high.)
8MB SPI ROM FOR ME
& Non-share ROM.
W=20milsW=20mils
EC and Mini card debug port
ODD
This signal has a weak internal pull-down
On Die PLL VR is supplied by
1.5V when smapled high
1.8V when sampled low
Needs to be pulled High for Chief River platfrom
R124;c190 close to U4.T3 pin
U6 Rersver 4M+2M Solution
CAP on Conn, side
Del Q10 check with codec
VDDIO using 3VALW
check with vender
HDD
CAP on Conn, side
HM70 Disable SATA Port 1,3
HDD
R02
R02
R02
R02
R02
Remove R176
R02
close to Y1
R03R03
PCH_RTCX1
PCH_RTCX2
PCH_RTCX1
PCH_RTCRST#
PCH_SRTCRST#
SM_INTRUDER#
PCH_INTVRMEN
SM_INTRUDER#
HDA_SPKR
SPI_CLK_PCH_R
SPI_SI
SPI_SO_R
SPI_SB_CS0#
PCH_JTAG_TCK
HDA_SYNC
HDA_RST#
HDA_SDIN0
HDA_SDOUT
PCH_GPIO21
PCH_RTCX2
HDA_BIT_CLK
LPC_AD2
LPC_FRAME#
LPC_AD0
LPC_AD3
LPC_AD1
SERIRQ
SATA_COMP
RBIAS_SATA3
SATA3_COMP
HDA_BIT_CLK
HDA_RST#
HDA_SDOUT
PCH_INTVRMEN
HDA_SPKR
HDA_SDOUT
HDA_SYNC
SPI_WP#
SPI_HOLD#
SPI_WP#
SPI_HOLD#
CS#
SPI_SO_R SPI_SO_L
SPI_SI_R
SPI_CLK_PCH SPI_CLK_PCH_R
SPI_SB_CS0#
PCH_GPIO33
SATA_ITX_DRX_P0
SATA_ITX_DRX_N0
SATA_DTX_C_IRX_P0
SATA_ITX_C_DRX_N0
SATA_ITX_C_DRX_P0
SPI_SI
SERIRQ
SATA_DTX_C_IRX_P2
SATA_ITX_C_DRX_N2
HDA_SYNC
BBS_BIT0_R
HDA_SYNC_R
SATA_DTX_C_IRX_N2
SATA_DTX_C_IRX_N0
ME_FLASH
SPI_CLK_PCH_R
SATALED#
SPI_WP#1
SPI_HOLD#1
CS1#
SPI_SO1
SPI_SI1
SPI_CLK1
SPI_SB_CS1#
SPI_SB_CS1#
SPI_SO_R
SPI_CLK_PCH_R
SPI_SI
SPI_WP#1
SPI_HOLD#1
GCLK_32K
SATA_ITX_DRX_P1
SATA_ITX_DRX_N1
SATA_DTX_C_IRX_P1
SATA_ITX_C_DRX_N1
SATA_ITX_C_DRX_P1
SATA_DTX_C_IRX_N1SATA_DTX_R_IRX_N1
SATA_DTX_R_IRX_P1
SATA_ITX_R_DRX_N1
SATA_ITX_R_DRX_P1
SATA_ITX_R_DRX_P4
SATA_DTX_C_IRX_P1
SATA_ITX_C_DRX_N1
SATA_ITX_C_DRX_P1
SATA_DTX_C_IRX_N1
SATA_DTX_R_IRX_P4
SATA_ITX_R_DRX_N4
SATA_DTX_R_IRX_N4
SATA_ITX_C_DRX_P2
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
HDA_SPKR<41>
HDA_SDIN0<41>
SERIRQ <42>
LPC_AD0 <36,42>
LPC_AD1 <36,42>
LPC_AD2 <36,42>
LPC_AD3 <36,42>
LPC_FRAME# <36,42>
HDA_SYNC_AUDIO<41>
HDA_SDOUT_AUDIO
HDA_RST_AUDIO#<41>
HDA_BITCLK_AUDIO
SATA_DTX_C_IRX_N0 <36>
SATA_DTX_C_IRX_P0 <36>
SATA_ITX_DRX_N0 <36>
SATA_ITX_DRX_P0 <36>
SATA_DTX_C_IRX_P2 <40>
SATA_DTX_C_IRX_N2 <40>
SATA_ITX_C_DRX_N2 <40>
SATA_ITX_C_DRX_P2 <40>
ME_FLASH<42>
GCLK_32K <44>
SATA_DTX_C_IRX_N1 <40>
SATA_DTX_C_IRX_P1 <40>
SATA_ITX_DRX_N1 <40>
SATA_ITX_DRX_P1 <40>
+RTCVCC
+RTCVCC
+1.05VS_VCC_SATA
+1.05VS_SATA3
+3VS
+3V_PCH
+3V_PCH
+3VS
+3VS
+RTCBATT+RTCVCC
+3VS
+3VS
+3VS
+3VS
+3V_PCH
+3VS
+5VS
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PCH (1/9) SATA,HDA,SPI, LPC, XDP
Custom
14 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PCH (1/9) SATA,HDA,SPI, LPC, XDP
Custom
14 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PCH (1/9) SATA,HDA,SPI, LPC, XDP
Custom
14 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
R114
33_0402_5%
1 2
R130
0_0402_5%
@
1 2
CLRP3
SHORT PADS
12
R187 10K_0402_5%
12
R104 10K_0402_5%
12
R106 1K_0402_5%@
12
CLRP2
SHORT PADS
12
C2290.01U_0402_16V7K
12
R101 1M_0402_5%
1 2
R129
3.3K_0402_5%
1 2
R119 10K_0402_5%
12
R109
0_0402_5%
@
1 2
R3180_0402_5% HM70@
1 2
C1840.01U_0402_16V7K@
12
R26410K_0402_5% @
12
C2370.01U_0402_16V7K
12
R100 20K_0402_5%
1 2
R199
0_0402_5%
@
1 2
R115
750_0402_1%
1 2
R112
33_0402_5%
1 2
R107 1K_0402_1%@
1 2
R117 10K_0402_5%
12
RTCIHDA
SATA
LPC
SPI
JTAG
SATA 6G
U4A
PANTHER-POINT_FCBGA989
RTCX1
A20
RTCX2
C20
INTVRMEN
C17
INTRUDER#
K22
HDA_BCLK
N34
HDA_SYNC
L34
HDA_RST#
K34
HDA_SDIN0
E34
HDA_SDIN1
G34
HDA_SDIN2
C34
HDA_SDO
A36
SATALED#
P3
FWH0 / LAD0
C38
FWH1 / LAD1
A38
FWH2 / LAD2
B37
FWH3 / LAD3
C37
LDRQ1# / GPIO23
K36
FWH4 / LFRAME#
D36
LDRQ0#
E36
RTCRST#
D20
HDA_SDIN3
A34
HDA_DOCK_EN# / GPIO33
C36
HDA_DOCK_RST# / GPIO13
N32
SRTCRST#
G22
SATA0RXN
AM3
SATA0RXP
AM1
SATA0TXN
AP7
SATA0TXP
AP5
SATA1RXN
AM10
SATA1RXP
AM8
SATA1TXN
AP11
SATA1TXP
AP10
SATA2RXN
AD7
SATA2RXP
AD5
SATA2TXN
AH5
SATA2TXP
AH4
SATA3RXN
AB8
SATA3RXP
AB10
SATA3TXN
AF3
SATA3TXP
AF1
SATA4RXN
Y7
SATA4RXP
Y5
SATA4TXN
AD3
SATA4TXP
AD1
SATA5RXN
Y3
SATA5RXP
Y1
SATA5TXN
AB3
SATA5TXP
AB1
SATAICOMPI
Y10
SPI_CLK
T3
SPI_CS0#
Y14
SPI_CS1#
T1
SPI_MOSI
V4
SPI_MISO
U3
SATA0GP / GPIO21
V14
SATA1GP / GPIO19
P1
JTAG_TCK
J3
JTAG_TMS
H7
JTAG_TDI
K5
JTAG_TDO
H1
SERIRQ
V5
SPKR
T10
SATAICOMPO
Y11
SATA3COMPI
AB13
SATA3RCOMPO
AB12
SATA3RBIAS
AH1
R3110_0402_5% HM76@
1 2
R98 10M_0402_5%
NOGCLK@
1 2
Y1
32.768KHZ_12.5PF_CM31532768DZFT
NOGCLK@
1 2
C1850.01U_0402_16V7K@
12
R124
33_0402_5%
@
12
R221
3.3K_0402_5%
1 2
G
D
S
Q10
LBSS138LT1G_SOT-23-3
2
13
R55930_0402_5% @
12
R132
0_0402_5%
@
1 2
R266
3.3K_0402_5%
1 2
U5
W25Q32BVSSIG_SO8
CS#
1
SO
2
WP#
3
GND
4
VCC
8
HOLD#
7
SCLK
6
SI
5
U6
16M W25Q16BVSSIG SOIC 8P
CS#
1
SO
2
WP#
3
GND
4
VCC
8
HOLD#
7
SCLK
6
SI
5
C183
1U_0402_6.3V6K
1
2
R105 1K_0402_5%@
1 2
C180
18P_0402_50V8J
NOGCLK@
1
2
R55940_0402_5% @
12
R131
33_0402_5%
1 2
R103 20K_0402_5%
1 2
R182
0_0402_5%
GCLK@
1 2
C181
18P_0402_50V8J
NOGCLK@
1
2
R196
33_0402_5%
1 2
R878
1M_0402_5%
1 2
R118
33_0402_5%
1 2
R102 330K_0402_5%
1 2
R99
1K_0402_5%
1 2
R108 1K_0402_5%
12
R111
37.4_0402_1%
1 2
R133
33_0402_5%
1 2
R113
49.9_0402_1%
1 2
R110
51_0402_5%
12
R3150_0402_5% HM70@
1 2
C190
22P_0402_50V8J
@
R127
3.3K_0402_5%
1 2
R291
0_0402_5%
@
1 2
C179
1U_0402_6.3V6K
1
2
R3120_0402_5% HM76@
1 2
C1980.01U_0402_16V7K
12
R116
33_0402_5%
1 2
CLRP1
SHORT PADS
12
C1990.01U_0402_16V7K
12
C191 0.1U_0402_16V7K
1 2
R188
33_0402_5%
1 2
C182
1U_0402_6.3V6K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
WLAN
LAN
Compal Electronics, Inc.
DIMM1
DIMM2
MINI CARD
EC
thermal sensor
VGA
27M_SSC
LAN
WLAN
BIOS Request SKU ID
HM70 not support
PCIE port 5-8
R02
R02
R02
R02
R02
R02
R02
Remove R1381
R02
close to Y2
XTAL25_OUT
SML1DATA
XCLK_RCOMP
CLK_PCI_LPBACK
CLK_CPU_DMI#
PCIE_PTX_DRX_N2
PCIE_PTX_DRX_P1
PCIE_PRX_DTX_P2
PCIE_PRX_DTX_N2
PCIE_PTX_DRX_P2
PCIE_PTX_DRX_N1
PCIE_PRX_DTX_P1
PCIE_PRX_DTX_N1
CLK_BUF_DREF_96M
CLK_BUF_DREF_96M#
CLK_BUF_CPU_DMI
CLK_BUF_CPU_DMI#
CLK_BUF_PCIE_SATA
CLK_BUF_PCIE_SATA#
PCH_GPIO44
XTAL25_OUT
XTAL25_IN
EC_SMB_CK2
EC_SMB_DA2
CLKIN_DMI2#
CLKIN_DMI2
PCH_GPIO56
CLK_PCIE_VGA#_R CLK_PCIE_VGA#
CLK_PCIE_VGACLK_PCIE_VGA_R
PEG_CLKREQ#_R
CLK_CPU_DMI
CLK_BUF_ICH_14M
PCH_SMBCLK
PCH_SMBDATA
PCH_GPI011
DRAMRST_CNTRL_PCH
SML1CLK
PCH_GPIO46
SMB_CLK_S3
SMB_DATA_S3
PCH_GPIO45
PCH_SML0DATA
PCH_SML0CLK
PCH_SML0CLK
PCH_SML0DATA
CLKREQ_LAN#_R
CLK_PCIE_LAN_R
CLK_PCIE_LAN#_R
CLK_PCIE_WLAN1_R
CLK_PCIE_WLAN1#_R
PCH_GPIO25
PCH_GPIO20
PCH_GPIO26
PCH_GPIO67
GCLK_PCH_25MHZXTAL25_IN
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
CLKREQ_WLAN#_R
CLK_CPU_DMI# <6>
CLK_CPU_DMI <6>
PCIE_PRX_DTX_N1<37>
PCIE_PTX_C_DRX_N1<37>
PCIE_PRX_DTX_P1<37>
PCIE_PTX_C_DRX_P1<37>
PCIE_PRX_DTX_N2<36>
PCIE_PRX_DTX_P2<36>
PCIE_PTX_C_DRX_N2<36>
PCIE_PTX_C_DRX_P2<36>
CLK_PCI_LPBACK <18>
DRAMRST_CNTRL_PCH <7>
EC_SMB_CK2 <23,39,42>
EC_SMB_DA2 <23,39,42>
CLK_PCIE_VGA# <23>
CLK_PCIE_VGA <23>
SMB_DATA_S3 <12,13,36,43>
SMB_CLK_S3 <12,13,36,43>
CLK_PCIE_LAN<37>
CLK_PCIE_LAN#<37>
CLKREQ_LAN#<37>
CLK_PCIE_WLAN1<36>
CLK_PCIE_WLAN1#<36>
CLKREQ_WLAN#<36>
CLK_REQ_VGA# <23>
PCH_GPIO67 <19>
GCLK_PCH_25MHZ <44>
+1.05VS_VCCDIFFCLKN
+3V_PCH
+3V_PCH
+3V_PCH
+3V_PCH
+3V_PCH +3VS
+3VS
+3V_PCH
+3V_PCH
+3V_PCH
+3V_PCH
+3V_PCH
+3V_PCH
+3V_PCH
+3VS
+3V_PCH
+3VS
+3V_PCH
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PCH (2/9) PCIE, SMBUS, CLK
Custom
15 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PCH (2/9) PCIE, SMBUS, CLK
Custom
15 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PCH (2/9) PCIE, SMBUS, CLK
Custom
15 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
R152 10K_0402_5%
12
R139
1K_0402_5%
12
R144 0_0402_5%
@
1 2
PCI-E*
CLOCKS
FLEX CLOCKS
SMBUSController
Link
U4B
PANTHER-POINT_FCBGA989
PERN1
BG34
PERP1
BJ34
PERN2
BE34
PERP2
BF34
PERN3
BG36
PERP3
BJ36
PERN4
BF36
PERP4
BE36
PERN5
BG37
PERP5
BH37
PERN6
BJ38
PERP6
BG38
PERN7
BG40
PERP7
BJ40
PERN8
BE38
PERP8
BC38
PETN1
AV32
PETP1
AU32
PETN2
BB32
PETP2
AY32
PETN3
AV34
PETP3
AU34
PETN4
AY34
PETP4
BB34
PETN5
AY36
PETP5
BB36
PETN6
AU36
PETP6
AV36
PETN7
AY40
PETP7
BB40
PETN8
AW38
PETP8
AY38
CLKOUT_PCIE0N
Y40
CLKOUT_PCIE0P
Y39
CLKOUT_PCIE1N
AB49
CLKOUT_PCIE1P
AB47
CLKOUT_PCIE2N
AA48
CLKOUT_PCIE2P
AA47
CLKOUT_PCIE3N
Y37
CLKOUT_PCIE3P
Y36
CLKOUT_PCIE4N
Y43
CLKOUT_PCIE4P
Y45
CLKOUT_PCIE5N
V45
CLKOUT_PCIE5P
V46
CLKIN_GND1_N
BJ30
CLKIN_GND1_P
BG30
CLKIN_DMI_N
BF18
CLKIN_DMI_P
BE18
CLKIN_DOT_96N
G24
CLKIN_DOT_96P
E24
CLKIN_SATA_N
AK7
CLKIN_SATA_P
AK5
XTAL25_IN
V47
XTAL25_OUT
V49
REFCLK14IN
K45
CLKIN_PCILOOPBACK
H45
CLKOUT_PEG_A_N
AB37
CLKOUT_PEG_A_P
AB38
PEG_A_CLKRQ# / GPIO47
M10
PCIECLKRQ0# / GPIO73
J2
PCIECLKRQ1# / GPIO18
M1
PCIECLKRQ2# / GPIO20
V10
PCIECLKRQ3# / GPIO25
A8
PCIECLKRQ4# / GPIO26
L12
PCIECLKRQ5# / GPIO44
L14
CLKOUTFLEX0 / GPIO64
K43
CLKOUTFLEX1 / GPIO65
F47
CLKOUTFLEX2 / GPIO66
H47
CLKOUTFLEX3 / GPIO67
K49
CLKOUT_DMI_N
AV22
CLKOUT_DMI_P
AU22
PEG_B_CLKRQ# / GPIO56
E6
CLKOUT_PEG_B_P
AB40
CLKOUT_PEG_B_N
AB42
XCLK_RCOMP
Y47
CLKOUT_DP_P
AM13
CLKOUT_DP_N
AM12
CLKOUT_PCIE6N
V40
CLKOUT_PCIE6P
V42
PCIECLKRQ7# / GPIO46
K12
CLKOUT_PCIE7N
V38
CLKOUT_PCIE7P
V37
CLKOUT_ITPXDP_N
AK14
CLKOUT_ITPXDP_P
AK13
SMBALERT# / GPIO11
E12
SMBCLK
H14
SMBDATA
C9
SML0ALERT# / GPIO60
A12
SML0CLK
C8
SML0DATA
G12
SML1ALERT# / PCHHOT# / GPIO74
C13
SML1CLK / GPIO58
E14
SML1DATA / GPIO75
M16
CL_CLK1
M7
CL_DATA1
T11
CL_RST1#
P10
PCIECLKRQ6# / GPIO45
T13
R301 10K_0402_5%
12
R169 1M_0402_5%
NOGCLK@
1 2
R137
2.2K_0402_5%
1 2
R165 10K_0402_5%
12
R136
2.2K_0402_5%
1 2
R157 10K_0402_5%
1 2
R167 10K_0402_5%
1 2
R140 10K_0402_5%
12
R166 10K_0402_5%
1 2
R171
90.9_0402_1%
1 2
C192 0.1U_0402_16V7K
1 2
Q61A
2N7002KDWH_SOT363-6
6 1
2
R172 10K_0402_5%
12
R146 0_0402_5%@
1 2
R164 10K_0402_5%
1 2
C194 0.1U_0402_16V7K
1 2
R143
10K_0402_5%
1 2
R174 10K_0402_5%
12
R135
2.2K_0402_5%
1 2
R142
2.2K_0402_5%
1 2
R545
2.2K_0402_5%
1 2
R160 10K_0402_5%
1 2
R159 10K_0402_5%
1 2
Q60A
2N7002KDWH_SOT363-6
6 1
2
R154 0_0402_5%@
1 2
R148 0_0402_5%@
1 2
R158 10K_0402_5%
12
R170 10K_0402_5%
12
R141
2.2K_0402_5%
1 2
R149 0_0402_5%@
1 2
Q61B
2N7002KDWH_SOT363-6
3
5
4
R163 10K_0402_5%
1 2
T52
R544
2.2K_0402_5%
1 2
R138
2.2K_0402_5%
1 2
R153 0_0402_5%@
1 2
R147 10K_0402_5%
12
Y2
25MHZ_10PF_7V25000014
NOGCLK@
NC
4
OSC
1
OSC
3
NC
2
T53
C197
12P_0402_50V8J
NOGCLK@
1
2
R156 0_0402_5%@
1 2
R168 10K_0402_5%
12
R162 10K_0402_5%
1 2
Q60B
2N7002KDWH_SOT363-6
3
5
4
R13820_0402_5%
GCLK@
12
C196
12P_0402_50V8J
NOGCLK@
1
2
R150 0_0402_5%@
1 2
R151 0_0402_5%@
1 2
R134
10K_0402_5%
12
C193 0.1U_0402_16V7K
1 2
R155 10K_0402_5%
1 2
C195 0.1U_0402_16V7K
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
4mil width and place
within 500mil of the PCH
Can be left NC
when IAMT is not
support on the
platfrom
Compal Electronics, Inc.
AEPWROK can be connect to
PWROK if iAMT disable
Can be left NC if no use
integrated LAN.
*
DSWODVREN - On Die DSW VR Enable
H
Enable
L
Disable
For Deep S3
For Deep S3
For Deep S3
For Deep S3
For Deep S3
R02
R02
R02
R02
R02
R20
R20
R20
DMI_IRCOMP
DMI_CRX_PTX_N1
DMI_CRX_PTX_P0
DMI_CRX_PTX_P3
DMI_CTX_PRX_P0
DMI_CRX_PTX_N2
DMI_CRX_PTX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
DMI_CTX_PRX_P3
DMI_CRX_PTX_P2
DMI_CTX_PRX_N1
DMI_CRX_PTX_N0
DMI_CTX_PRX_N0
DMI_CTX_PRX_P1
DMI_CRX_PTX_N3
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC1
FDI_LSYNC0
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_CTX_PRX_P5
PCH_GPIO72
RI#
SUSACK#_R
RBIAS_CPY
APWROK
PM_DRAM_PWRGD
PCH_RSMRST#_R
PBTN_OUT#_R
WAKE#
SLP_SUS#_R
SUS_STAT#
H_PM_SYNC
PCH_POK
SYS_RST#
PCH_RSMRST#_R
SYS_PWROK
PCH_PWROK
SUSWARN#_R
DSWODVREN
PM_CLKRUN#
AC_PRESENT_R
PCH_POK
PCH_PWROK
SYS_PWROK
PM_DRAM_PWRGD
PCH_GPIO29
SLP_A#
APWROK
AC_PRESENT_R
PCH_RSMRST#_R
PCH_DPWROK DPWROK_EC
SUSWARN#_R
AC_PRESENT_R
DMI_CTX_PRX_N0<5>
DMI_CRX_PTX_N2<5>
DMI_CTX_PRX_N1<5>
DMI_CTX_PRX_N3<5>
DMI_CTX_PRX_N2<5>
DMI_CTX_PRX_P0<5>
DMI_CTX_PRX_P1<5>
DMI_CTX_PRX_P3<5>
DMI_CTX_PRX_P2<5>
DMI_CRX_PTX_N3<5>
DMI_CRX_PTX_N1<5>
DMI_CRX_PTX_N0<5>
DMI_CRX_PTX_P2<5>
DMI_CRX_PTX_P3<5>
DMI_CRX_PTX_P1<5>
DMI_CRX_PTX_P0<5>
FDI_CTX_PRX_N0 <5>
FDI_CTX_PRX_N1 <5>
FDI_CTX_PRX_N2 <5>
FDI_CTX_PRX_N3 <5>
FDI_CTX_PRX_N4 <5>
FDI_CTX_PRX_N5 <5>
FDI_CTX_PRX_N6 <5>
FDI_CTX_PRX_N7 <5>
FDI_CTX_PRX_P0 <5>
FDI_CTX_PRX_P1 <5>
FDI_CTX_PRX_P2 <5>
FDI_CTX_PRX_P3 <5>
FDI_CTX_PRX_P4 <5>
FDI_CTX_PRX_P5 <5>
FDI_CTX_PRX_P6 <5>
FDI_CTX_PRX_P7 <5>
FDI_FSYNC1 <5>
FDI_LSYNC0 <5>
FDI_FSYNC0 <5>
FDI_INT <5>
FDI_LSYNC1 <5>
PM_DRAM_PWRGD<6>
PBTN_OUT#<42>
PCIE_WAKE# <36,37>
H_PM_SYNC <6>
PM_SLP_S3# <42>
PM_SLP_S4# <42>
PM_SLP_S5# <42>
EC_RSMRST#<42>
SUSCLK <42>
PCH_APWROK<42>
ACIN<42,49>
PCH_PWROK<42>
SYS_PWROK <6>
VGATE<55>
SUSACK#<42>
SUSWARN#<42>
SLP_SUS# <42,46>
DPWROK_EC <42>
+3V_PCH
+3VS
+3VS
+3V_PCH
+3V_PCH
+RTCVCC
+3V_PCH
+3VS
+V1.05S_VCCP
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PCH (3/9) DMI,FDI,PM,
Custom
16 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PCH (3/9) DMI,FDI,PM,
Custom
16 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PCH (3/9) DMI,FDI,PM,
Custom
16 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
R299 10K_0402_5%
12
R5574 200K_0402_5%NODS3@
12
R304 0_0402_5%@
1 2
R200
10K_0402_5%
12
R189 8.2K_0402_5%@
1 2
R197 10K_0402_5%
12
R194 10K_0402_5%
12
R267 0_0402_5%
DS3@
1 2
R178 750_0402_1%
1 2
T74
R201
10K_0402_5%
12
R181 0_0402_5%NODS3@
1 2
D29
CH751H-40PT_SOD323-2
21
R183
330K_0402_5%
@
12
R185 0_0402_5%@
1 2
T99
R193 0_0402_5%
@
1 2
R1455 0_0402_5%@
12
R195 200K_0402_5%DS3@
1 2
U15
MC74VHC1G08DFT2G_SC70-5
B
2
A
1
Y
4
P
5
G
3
R302 0_0402_5%
@
1 2
DMI
FDI
System Power Management
U4C
PANTHER-POINT_FCBGA989
DMI0RXN
BC24
DMI1RXN
BE20
DMI2RXN
BG18
DMI3RXN
BG20
DMI0RXP
BE24
DMI1RXP
BC20
DMI2RXP
BJ18
DMI3RXP
BJ20
DMI0TXN
AW24
DMI1TXN
AW20
DMI2TXN
BB18
DMI3TXN
AV18
DMI0TXP
AY24
DMI1TXP
AY20
DMI2TXP
AY18
DMI3TXP
AU18
DMI_ZCOMP
BJ24
DMI_IRCOMP
BG25
FDI_RXN0
BJ14
FDI_RXN1
AY14
FDI_RXN2
BE14
FDI_RXN3
BH13
FDI_RXN4
BC12
FDI_RXN5
BJ12
FDI_RXN6
BG10
FDI_RXN7
BG9
FDI_RXP0
BG14
FDI_RXP1
BB14
FDI_RXP2
BF14
FDI_RXP3
BG13
FDI_RXP4
BE12
FDI_RXP5
BG12
FDI_RXP6
BJ10
FDI_RXP7
BH9
FDI_FSYNC0
AV12
FDI_FSYNC1
BC10
FDI_LSYNC0
AV14
FDI_LSYNC1
BB10
FDI_INT
AW16
PMSYNCH
AP14
SLP_SUS#
G16
SLP_S3#
F4
SLP_S4#
H4
SLP_S5# / GPIO63
D10
SYS_RESET#
K3
SYS_PWROK
P12
PWRBTN#
E20
RI#
A10
WAKE#
B9
SUS_STAT# / GPIO61
G8
SUSCLK / GPIO62
N14
ACPRESENT / GPIO31
H20
BATLOW# / GPIO72
E10
PWROK
L22
CLKRUN# / GPIO32
N3
SUSWARN#/SUSPW RDNACK/GPIO30
K16
RSMRST#
C21
DRAMPWROK
B13
SLP_LAN# / GPIO29
K14
APWROK
L10
DPWROK
E22
DMI2RBIAS
BH21
SLP_A#
G10
DSWVRMEN
A18
SUSACK#
C12
R179
330K_0402_5%
12
R261
10K_0402_5%
@
1 2
R192 300_0402_5%
12
R186
10K_0402_5%
1 2
R191 0_0402_5%
@
1 2
R18410K_0402_5%
12
R177 49.9_0402_1%
1 2
R180
100K_0402_1%
@
12
R198 0_0402_5%
@
1 2
R190 0_0402_5%
@
1 2
R1447 0_0402_5%
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HDMI
HDMI D2
HDMI D1
HDMI D0
HDMI CLK
CAP move on Conn, side
CRT_IREF
CTRL_CLK
CTRL_DATA
LVDS_IBG
LVD_VREF
EDID_DATA
EDID_CLK
DAC_BLU
DAC_GRN
DAC_RED
CRT_DDC_DATA
CRT_DDC_CLK
HDMIDAT_NB
HDMICLK_NB
TMDS_B_CLK#_PCH
TMDS_B_DATA2_PCH
TMDS_B_DATA1#_PCH
TMDS_B_DATA0#_PCH
TMDS_B_DATA2#_PCH
TMDS_B_DATA1_PCH
TMDS_B_DATA0_PCH
TMDS_B_CLK_PCH
EDID_DATA
EDID_CLK
CRT_DDC_DATA
CRT_DDC_CLK
PCH_ENVDD<33>
PCH_PWM<33>
EDID_DATA<33>
EDID_CLK<33>
LVDS_ACLK#<33>
LVDS_ACLK<33>
LVDS_A0#<33>
LVDS_A1#<33>
LVDS_A2#<33>
LVDS_A0<33>
LVDS_A1<33>
LVDS_A2<33>
CRT_HSYNC<34>
CRT_VSYNC<34>
CRT_DDC_CLK<34>
CRT_DDC_DATA<34>
DAC_BLU<34>
DAC_GRN<34>
DAC_RED<34>
HDMIDAT_NB <35>
HDMICLK_NB <35>
HDMI_TX2-_CK <35>
HDMI_TX2+_CK <35>
HDMI_TX1-_CK <35>
HDMI_TX1+_CK <35>
HDMI_TX0-_CK <35>
HDMI_TX0+_CK <35>
HDMI_CLK-_CK <35>
HDMI_CLK+_CK <35>
TMDS_B_HPD# <35>
PCH_ENBKL<33>
LVDS_BCLK#<33>
LVDS_BCLK<33>
LVDS_B0#<33>
LVDS_B1#<33>
LVDS_B2#<33>
LVDS_B0<33>
LVDS_B1<33>
LVDS_B2<33>
+3VS
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PCH (4/9) LVDS,CRT,DP,HDMI
B
17 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PCH (4/9) LVDS,CRT,DP,HDMI
B
17 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PCH (4/9) LVDS,CRT,DP,HDMI
B
17 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
R524
2.2K_0402_5%
12
LVDS
Digital Display Interface
CRT
U4D
PANTHER-POINT_FCBGA989
L_BKLTCTL
P45
L_BKLTEN
J47
L_CTRL_CLK
T45
L_CTRL_DATA
P39
L_DDC_CLK
T40
L_DDC_DATA
K47
L_VDD_EN
M45
LVDSA_CLK#
AK39
LVDSA_CLK
AK40
LVDSA_DATA#0
AN48
LVDSA_DATA#1
AM47
LVDSA_DATA#2
AK47
LVDSA_DATA#3
AJ48
LVDSA_DATA0
AN47
LVDSA_DATA1
AM49
LVDSA_DATA2
AK49
LVDSA_DATA3
AJ47
LVDSB_CLK#
AF40
LVDSB_CLK
AF39
LVDSB_DATA#0
AH45
LVDSB_DATA#1
AH47
LVDSB_DATA#2
AF49
LVDSB_DATA#3
AF45
LVDSB_DATA0
AH43
DDPB_0N
AV42
DDPB_1N
AV45
LVD_VREFH
AE48
LVD_VREFL
AE47
DDPD_2N
BF42
DDPD_3N
BJ42
DDPB_2N
AU48
DDPB_3N
AV47
DDPC_0N
AY47
DDPC_1N
AY43
DDPC_2N
BA47
DDPC_3N
BB47
DDPD_0N
BB43
DDPD_1N
BF44
DDPB_0P
AV40
DDPB_1P
AV46
DDPD_2P
BE42
DDPD_3P
BG42
DDPB_2P
AU47
DDPB_3P
AV49
LVDSB_DATA1
AH49
LVDSB_DATA2
AF47
LVDSB_DATA3
AF43
LVD_IBG
AF37
LVD_VBG
AF36
DDPC_1P
AY45
DDPC_0P
AY49
DDPC_2P
BA48
DDPC_3P
BB49
DDPD_0P
BB45
DDPD_1P
BE44
CRT_BLUE
N48
CRT_DDC_CLK
T39
CRT_DDC_DATA
M40
CRT_GREEN
P49
CRT_HSYNC
M47
CRT_IRTN
T42
CRT_RED
T49
CRT_VSYNC
M49
DAC_IREF
T43
SDVO_CTRLCLK
P38
SDVO_CTRLDATA
M39
DDPC_CTRLCLK
P46
DDPC_CTRLDATA
P42
DDPD_CTRLCLK
M43
DDPD_CTRLDATA
M36
DDPB_AUXN
AT49
DDPC_AUXN
AP47
DDPD_AUXN
AT45
DDPB_AUXP
AT47
DDPC_AUXP
AP49
DDPD_AUXP
AT43
DDPB_HPD
AT40
DDPC_HPD
AT38
DDPD_HPD
BH41
SDVO_TVCLKINP
AP45
SDVO_TVCLKINN
AP43
SDVO_STALLP
AM40
SDVO_STALLN
AM42
SDVO_INTP
AP40
SDVO_INTN
AP39
R203
2.2K_0402_5%
HDMI@
12
C203 0.1U_0402_16V7KHDMI@
1 2
R234
2.2K_0402_5%
12
R208 150_0402_1%
12
R559
2.2K_0402_5%
12
R523
2.2K_0402_5%
12
C202 0.1U_0402_16V7KHDMI@
1 2
R202
2.2K_0402_5%
HDMI@
12
R2062.37K_0402_1%
12
C205 0.1U_0402_16V7KHDMI@
1 2
R210 150_0402_1%
12
C200 0.1U_0402_16V7KHDMI@
1 2
R2052.2K_0402_5%
1 2
C206 0.1U_0402_16V7KHDMI@
1 2
C207 0.1U_0402_16V7KHDMI@
1 2
R2042.2K_0402_5%
1 2
R209 150_0402_1%
12
R211
1K_0402_1%
12
C204 0.1U_0402_16V7KHDMI@
1 2
C201 0.1U_0402_16V7KHDMI@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Within 500 mils
USB Camera
CARD READER
Bluetooth
*
SPI
0
1
Reserved
0
Boot BIOS Strap bit1 BBS1
Bit11
LPC
Boot BIOS
Destination
GNT1#/
GPIO51
(Default)
Reserved
1
0
Bit10
0 1
1
(CR-B/D USB)
WLAN
*
override/Top-Block
Low=A16 swap
PCI_GNT3#
A16 swap overide Strap/Top-Block
Swap Override jumper
Swap Override enabled
High=Default
GPIO55
(CR-B/D USB)
PPT EDS DOC#474146
USB_OC0# Share with USB_OC4#
due to same power switch
HM70 not support USB port 4,5,6,7,12,13
HM70 not support USB3 port 3,4
(USB 3.0)
Touch Screen
LEFT USB
USB DEBUG=PORT1 AND PORT9
R02
R02
PCH_PLTRST#
PCH_WL_OFF#
PCI_PIRQA#
PCI_PIRQD#
PCI_PIRQC#
PCI_PIRQB#
PCH_GPIO4
USB_OC7#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC3#
USB_OC1#
USB_OC0#
USB_OC2#
PCH_GPIO53
PCH_GPIO2
USB_OC7#
USB_OC2#
PCH_GPIO51
PCH_GPIO2
DGPU_PWR_EN_R
PCH_GPIO4
ODD_DA#_R
PCI_PIRQA#
PCI_PIRQD#
PCI_PIRQC#
PCI_PIRQB#
PCH_GPIO5
PCH_PLTRST#
USBRBIAS
USB20_N11
USB20_P11
USB20_N2
USB20_P2
CLK_PCI_LPBACK_R
CLK_PCI_EC_R
PCH_GPIO5
USB20_N3
USB20_P3
DGPU_HOLD_RST#_R
ODD_DA#_R
PCH_WL_OFF#
USB30_RX_N3
USB30_TX_P1
USB30_RX_P4
USB30_TX_P4
USB30_RX_N1
USB30_RX_N4
USB30_TX_N1
USB30_TX_N4
USB30_RX_P3
USB30_RX_P1
USB30_TX_N3
USB30_TX_P3
PCH_GPIO51
USB20_P9
USB20_N9
USB20_N10
USB20_P10
CLK_PCI_DB_R
DGPU_PWR_EN1
DGPU_HOLD_RST#_R
PCH_GPIO53
PCH_WL_OFF#
NVDD_PWR_ENDGPU_PWR_EN_R
USB_OC4#
USB_OC3#
USB_OC1#
USB_OC5#
DGPU_HOLD_RST#_R
DGPU_PWR_EN_R
USB_OC0#
USB20_N8
USB20_P8
USB_OC6#
USB30_RX_N2
USB30_RX_P2
USB30_TX_N2
USB30_TX_P2
USB20_N1
USB20_P1
USB20_N0
USB20_P0
DGPU_PWR_EN1
DGPU_PWR_EN1
USBRBIAS
PCI_PME#<42>
PLT_RST#<23,36,37,42>
USB20_P11 <44>
USB20_N11 <44>
USB20_N2 <40>
USB20_P2 <40>
CLK_PCI_EC<42>
CLK_PCI_LPBACK<15>
PCH_PLTRST#<6>
USB20_N3 <33>
USB20_P3 <33>
PCH_WL_OFF#<36>
ODD_DA#<40>
DGPU_PWR_EN<23,25,42>
DGPU_HOLD_RST#<23>
USB20_N10 <36>
USB20_P10 <36>
CLK_PCI_DB<36>
USB_OC0# <45>
USB20_N8 <43>
USB20_P8 <43>
USB_OC4# <43>
USB20_P9 <43>
USB20_N9 <43>
USB20_N1 <43>
USB20_P1 <43>
USB20_N0 <45>
USB20_P0 <45>
USB30_TX_P1<45>
USB30_TX_N1<45>
USB30_RX_P1<45>
USB30_RX_N1<45>
NVDD_PWR_EN<54>
+3VS
+3V_PCH
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PCH (5/9) PCI, USB
Custom
18 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PCH (5/9) PCI, USB
Custom
18 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PCH (5/9) PCI, USB
Custom
18 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
R259 8.2K_0402_5%
1 2
U7
MC74VHC1G08DFT2G_SC70-5
@
B
2
A
1
Y
4
P
5
G
3
T1833
RSVD
PCI
USB
U4E
PANTHER-POINT_FCBGA989
RSVD23
AV5
RSVD1
AY7
RSVD2
AV7
RSVD3
AU3
RSVD4
BG4
RSVD5
AT10
RSVD6
BC8
RSVD7
AU2
RSVD8
AT4
RSVD17
BB5
RSVD18
BB3
RSVD19
BB7
RSVD20
BE8
RSVD21
BD4
RSVD22
BF6
RSVD9
AT3
RSVD10
AT1
RSVD11
AY3
RSVD12
AT5
RSVD13
AV3
RSVD14
AV1
RSVD15
BB1
RSVD16
BA3
RSVD25
AT8
RSVD24
AV10
RSVD26
AY5
RSVD27
BA2
RSVD28
AT12
RSVD29
BF3
PIRQA#
K40
PIRQB#
K38
PIRQC#
H38
PIRQD#
G38
REQ1# / GPIO50
C46
REQ2# / GPIO52
C44
REQ3# / GPIO54
E40
GNT1# / GPIO51
D47
GNT2# / GPIO53
E42
GNT3# / GPIO55
F46
PIRQE# / GPIO2
G42
PIRQF# / GPIO3
G40
PIRQG# / GPIO4
C42
PIRQH# / GPIO5
D44
USBP0N
C24
USBP0P
A24
USBP1N
C25
USBP1P
B25
USBP2N
C26
USBP2P
A26
USBP3N
K28
USBP3P
H28
USBP4N
E28
USBP4P
D28
USBP5N
C28
USBP5P
A28
USBP6N
C29
USBP6P
B29
USBP7N
N28
USBP7P
M28
USBP8N
L30
USBP8P
K30
USBP9N
G30
USBP9P
E30
USBP10N
C30
USBP10P
A30
USBP11N
L32
USBP11P
K32
USBP12N
G32
USBP12P
E32
USBP13N
C32
USBP13P
A32
PME#
K10
CLKOUT_PCI0
H49
CLKOUT_PCI1
H43
CLKOUT_PCI2
J48
USBRBIAS#
C33
USBRBIAS
B33
OC0# / GPIO59
A14
OC1# / GPIO40
K20
OC2# / GPIO41
B17
OC3# / GPIO42
C16
OC4# / GPIO43
L16
OC5# / GPIO9
A16
OC6# / GPIO10
D14
OC7# / GPIO14
C14
CLKOUT_PCI4
H40
CLKOUT_PCI3
K42
PLTRST#
C6
TP1
BG26
TP2
BJ26
TP3
BH25
TP6
AH38
TP7
AH37
TP8
AK43
TP9
AK45
TP16
Y13
TP17
K24
TP18
L24
TP19
AB46
TP20
AB45
TP21
B21
TP22
M20
TP23
AY16
USB3Rn1
BE28
USB3Rn2
BC30
USB3Rn3
BE32
USB3Rn4
BJ32
USB3Rp1
BC28
USB3Rp2
BE30
USB3Rp3
BF32
USB3Rp4
BG32
USB3Tn1
AV26
USB3Tn2
BB26
USB3Tn3
AU28
USB3Tn4
AY30
USB3Tp1
AU26
USB3Tp2
AY26
USB3Tp3
AV28
USB3Tp4
AW30
TP4
BJ16
TP5
BG16
TP15
AM5
TP14
AM4
TP13
AH12
TP12
H3
TP11
N30
TP10
C18
TP24
BG46
R225 8.2K_0402_5%
1 2
R292 8.2K_0402_5%@
1 2
R223
100K_0402_5%
12
T1834
R215 1K_0402_5%@
1 2
R553 0_0402_5%
@
1 2
RP310K_1206_8P4R_5%
1 8
2 7
3 6
4 5
R222 0_0402_5%
@
1 2
R319 0_0402_5%
@
1 2
R218
22.6_0402_1%
1 2
R212 8.2K_0402_5%
1 2
RP2
8.2K_8P4R_5%
18
27
36
45
T1835
R214 8.2K_0402_5%@
1 2
R691 0_0402_5%
@
1 2
T1832
T1825
R21922_0402_5%
1 2
R213 8.2K_0402_5%
1 2
T1826
T1836
T1829
T1827
T1828
R715 0_0402_5%@
1 2
T1831
R17322_0402_5% @
12
C208
0.1U_0402_16V7K
@
1
2
RP1
8.2K_8P4R_5%
18
27
36
45
T1830
RP410K_1206_8P4R_5%
1 8
2 7
3 6
4 5
R692 0_0402_5%@
1 2
R22022_0402_5%
1 2
R557 8.2K_0402_5%@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Compal Electronics, Inc.
*
This signal has a weak internal pull up
On-Die PLL Voltage Regulator
L
On-Die PLL Voltage Regulator disable
GPIO28
H
On-Die voltage regulator enable
Weak internal pull-high
*
INIT3_3V
This signal has weak internal PU,can't pull low
Set to Vcc when HIGH
DMI Termination Voltage
NV_CLE
Set to Vss when LOW
CLOSE TO THE BRANCHING POINT
Weak internal
PU,Do not pull low
BIOS Request SKU ID
UMA
0 0 Optimus
PCH_GPIO38 PCH_GPIO67
Function
1 1
PU on power side
0
1
UMA
PCH_GPIO70
Function
N14P-GV2
0
1
PCH_GPIO69
Function
HM76 by PCH
HM70 by PCH
For DS3
PCH_GPIO27 (Have internal Pull-High)
Deep S4,S5 wake event signal
Deep S4,S5 wake event signal
RTC alarm,Power BTN,GPIO27
R02
R03
PCH_GPIO12PCH_GPIO28
PCH_GPIO27
BT_DISABLE
PCH_GPIO38
PCH_GPIO27
PCH_GPIO6
PCH_GPIO69
PCH_GPIO48
EC_SCI#
PCH_GPIO28
PCH_GPIO71
KBRST#
H_THRMTRIP#
EC_SMI#
EC_SMI#
DGPU_PWROK_R
PCH_GPIO39
PCH_GPIO68
PCH_GPIO70
KBRST#
INTEL_BT_OFF#
ODD_EN
PCH_BT_ON#
PCH_GPIO1
PCH_GPIO49
PCH_GPIO37
EC_LID_OUT#
NV_CLE
PCH_THRMTRIP#_R
PCH_GPIO38
PCH_GPIO37
PCH_GPIO0
INTEL_BT_OFF#
PCH_GPIO67
PCH_GPIO70PCH_GPIO69
PCH_GPIO57
mSATA_DET#
PCH_GPIO35
GATEA20 <42>
EC_SCI#<42>
H_CPUPWRGD <6>
KBRST# <42>
H_THRMTRIP# <6>
ODD_EN<40>
EC_SMI#<42>
PCH_BT_ON#<36,40>
H_SNB_IVB# <6>
DGPU_PWROK<46,54>
EC_LID_OUT#<42>
PCH_GPIO67 <15>
BT_DISABLE<36>
mSATA_DET#<36>
PCH_THRMTRIP#_R <23>
INTEL_BT_OFF#<36>
+3V_PCH
+3VS
+3VS
+3VS
+3VS
+3VS
+3V_PCH
+3VS
+3VS
+3VS
+3VS
+1.8VS
+3VS
+3VS
+3V_PCH
+3VS
+3VS
+3VS
+3VS +3VS
+3V_PCH
+3VALW
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PCH (6/9) GPIO, CPU, MISC
Custom
19 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PCH (6/9) GPIO, CPU, MISC
Custom
19 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9603P
1.0
PCH (6/9) GPIO, CPU, MISC
Custom
19 62Wednesday, January 09, 2013
2012/12/26 2012/07/11
R245 10K_0402_5%@
1 2
R227 10K_0402_5%
1 2
R22410K_0402_5%
1 2
R248 10K_0402_5%
1 2
R230 1K_0402_5%
1 2
R247 10K_0402_5%
1 2
R239 390_0402_5%
1 2
R246
10K_0402_5%
UMA@
12
R216
2.2K_0402_5%
12
R251 10K_0402_5%
1 2
R705
200K_0402_5%
UMA@
1 2
R235 10K_0402_5%
1 2
R233 10K_0402_5%
1 2
R244
10K_0402_5%
@
12
R217 1K_0402_5%
12
R702
10K_0402_5%
HM70@
1 2
R231 10K_0402_5%
1 2
R70410K_0402_5%
12
R243 10K_0402_5%
1 2
R229 10K_0402_5%@
1 2
R707
10K_0402_5%
HM76@
1 2
R547
10K_0402_5%
12
R236
10K_0402_5%
1 2
R711
10K_0402_5%
UMA@
1 2
R226 10K_0402_5%
1 2
CPU/MISC
NCTF
GPIO
U4F
PANTHER-POINT_FCBGA989
GPIO27
E16
GPIO28
P8
GPIO24
E8
GPIO57
D6
LAN_PHY_PWR_CTRL / GPIO12
C4
VSS_NCTF_1
A4
VSS_NCTF_2
A44
VSS_NCTF_3
A45
VSS_NCTF_4
A46
VSS_NCTF_5
A5
VSS_NCTF_6
A6
VSS_NCTF_7
B3
VSS_NCTF_8
B47
VSS_NCTF_9
BD1
VSS_NCTF_10
BD49
VSS_NCTF_11
BE1
VSS_NCTF_12
BE49
TACH2 / GPIO6
H36
TACH0 / GPIO17
D40
TACH3 / GPIO7
E38
SATA3GP / GPIO37
M5
SATA5GP / GPIO49 / TEMP_ALERT#
V3
SCLOCK / GPIO22
T5
SLOAD / GPIO38
N2
SDATAOUT0 / GPIO39
M3
SDATAOUT1 / GPIO48
V13
PROCPWRGD
AY11
RCIN#
P5
PECI
AU16
THRMTRIP#
AY10
GPIO8
C10
BMBUSY# / GPIO0
T7
GPIO15
G2
TACH1 / GPIO1
A42
SATA2GP / GPIO36
V8
INIT3_3V#
T14
STP_PCI# / GPIO34
K1
GPIO35
K4
SATA4GP / GPIO16
U2
VSS_NCTF_32
F49
A20GATE
P4
TACH4 / GPIO68
C40
TACH6 / GPIO70
C41
TACH7 / GPIO71
A40
TACH5 / GPIO69
B41
VSS_NCTF_17
BH3
VSS_NCTF_18
BH47
VSS_NCTF_19
BJ4
VSS_NCTF_20
BJ44
VSS_NCTF_21
BJ45
VSS_NCTF_22
BJ46
VSS_NCTF_23
BJ5
VSS_NCTF_24
BJ6
VSS_NCTF_25
C2
VSS_NCTF_26
C48
VSS_NCTF_27
D1
VSS_NCTF_28
D49
VSS_NCTF_29
E1
VSS_NCTF_30
E49
VSS_NCTF_31
F1
TS_VSS4
AK10
TS_VSS3
AH10
TS_VSS2
AK11
TS_VSS1
AH8
NC_1
P37
VSS_NCTF_13
BF1
VSS_NCTF_14
BF49
VSS_NCTF_15
BG2
VSS_NCTF_16
BG48
DF_TVS
AY1
R238 10K_0402_5%
1 2
R232 10K_0402_1%@
1 2
R228 10K_0402_5%
1 2
R242 10K_0402_5%
1 2
R250
10K_0402_5%
@
12
R298
10K_0402_5%
OPT@
12
R708
10K_0402_5%
OPT@
1 2
R240 1K_0402_5%@
1 2
R881
10K_0402_5%
12
R241 10K_0402_5%
1 2
R297 0_0402_5%@
1 2
R249 10K_0402_5%
1 2
R5530 10K_0402_5%
DS3@
12
R703
10K_0402_5%
GV2@
1 2
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