LA-8712P QCL51 AMD
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
AMD Trinity APU / Hudson FCH / ATI Chelsea Pro M2
QCL51 Schematics Document
LA-8712P REV: 0.1
Compal Confidential
AMD Comal Platform
Muxless/UMA / PX 4.0 / PX 5.0
2011-10-26
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
Cover Page
B
1 56Monday, November 28, 2011
2011/07/08 2015/07/08
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
Cover Page
B
1 56Monday, November 28, 2011
2011/07/08 2015/07/08
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
Cover Page
B
1 56Monday, November 28, 2011
2011/07/08 2015/07/08
Compal Electronics, Inc.
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
LPC BUS
Compal Confidential
USB20
Sub/B*1
USB Charger
HD Audio
FCH
Page 25~29
Model Name : QCL51 AMD
SATA
page 30
port 0
CMOS
Camera
Port 0
USB
SATA ODD
page 30
port 1
page 40 page 22
uFCBGA-656
AMD Comal
AMD FS1R2 APU
uPGA-722 Package
Page 6~10
Trinity
Hudson-M3
Dual Channel
BANK 0, 1, 2, 3
204pin DDRIII-SO-DIMM X2
1.5V DDRIII 1333/1600MHz
Memory BUS(DDR3/DDR3L)
Page 11,12
page 23
Gen2GFX x 16
64M x16
128M x 16
VRAM DDR3
DDR3
page 19, 20
uFCBGA-962
ATI Chelsea Pro M2
page 14
Thermal Sensor
ADM1032
DP2
APU HDMI
(UMA / Muxless)
HDMI Conn.
LVDS Conn.
DP0
DP1
LVDS
Translator
ANX3112
page 21
DP x 4
(DP1 TXP/N 0~4)
UMI
MINI Card 1
(Wireless LAN with BT)
page 32
GPP0GPP1
Transformer / RJ45
page 31
SATA HDD
P_GPP x 3
GEN1
Page 13~18
Touch Pad Int.KBD
page 37
page 38page 39
ENE
KBC932
Port 5
USB 2.0 Port 8
page 41
USB30
M/B*2
page 33
HDA Codec
IDT 92HD91
USB 2.0 Port 10,11
page 39
LED
RTC CKT.
page 25
Fan Control
page 30
DC/DC
Interface CKT.
page 42
Power On/Off CKT.
page 38
Power Circuit
page 38
Power/B with LED
page 22
ML for FCH VGA
Card Reader/Gbe Lan
Realtek RTL8411
page 31
Gen2 3Gb/sGen3 6Gb/s
SD slot
page 31
FAN/LED
page 39
Sub Woofer
Amp
Sub Woofer
SPK
HP Amp
Combo
jack
CRT Conn.
page 24
page 34page 35
page 34
page 36
page 36
USB 3.0 Port 0,1
page 40
USB30
Sub*1
Repeater
USB 3.0 Port 2
USB 2.0 Port 12
page 38
EC BIOS (256K)
page 26
SYS BIOS (4M)
BIOS ROM
Daughter board
1 CH
1 CH
page 39
FP
Port 1
Daughter board
Daughter board
Daughter board
page 44~56
Board Name : LA-8712P
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
Block Diagrams
B
2 56Monday, November 28, 2011
2011/07/08 2015/07/08
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
Block Diagrams
B
2 56Monday, November 28, 2011
2011/07/08 2015/07/08
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
Block Diagrams
B
2 56Monday, November 28, 2011
2011/07/08 2015/07/08
Compal Electronics, Inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DP0
APU
DP0_TXP/N0
DP0_AUXP/N
C
RTD2132
LVDS_OUT
DP_IN
APU_TXOUT[0:2]+/-
APU_TXOUT_CLK+/-
APU_LVDS_CLK/DATA
C
VGA
DPFDPE
AMD
Chelsea Pro
ATI VGA
HDMI CONN
PCIE_GFX[0:15]
CRT CONN
PCIE_GFX[0:15]
DP1 DPA
FCH
DAC1
DISPLAY OUTPUT
CLOCK DISTRIBUTION
A_SODIMM
CPU FS1 SOCKET
FCH
Hudson-M2/M3
Internal CLK GEN
100MHz
APU_DISP_CLKP/N
100MHz
APU_CLKP/N
GbE LAN/
Card reader
25MHz
GPP_CLK
WLAN
Mini PCI Socket
GPP2 GPP3
DP0_AUX
LVDS Transtator
B_SODIMM
1066~1866MHz
DDRA_CLK1P/N
1066~1866MHz
AMD
AMD
100MHz
CLK_PEG_VGAP/N
100MHz
32.768KHz 25MHz
LVDS CONN
DP2
X1X5
DDRA_CLK0P/N
DDRB_CLK0P/N
DDRB_CLK1P/N
YL1
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
CLOCK / DISPLAY DISTRIBUTION
Custom
3 56Monday, November 28, 2011
2011/07/08 2015/07/08
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
CLOCK / DISPLAY DISTRIBUTION
Custom
3 56Monday, November 28, 2011
2011/07/08 2015/07/08
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
CLOCK / DISPLAY DISTRIBUTION
Custom
3 56Monday, November 28, 2011
2011/07/08 2015/07/08
Compal Electronics, Inc.
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
FCH (S0~S5)
SM Bus 1 address
DDR DIMM1
1010 000X b
DDR DIMM2
1010 001X b
FCH (S0)
SM Bus 0 address
Device Address Device Address
HEX
A0
A2
HEX
Device Address HEX
EC SM Bus1 address EC SM Bus2 address
Smart Battery
0001 011X b
16H
Device IDSEL# REQ#/GNT# Interrupts
External PCI Devices
+APU_CORE_NB ON OFF OFFVoltage for On-die VGA of APU
+APU_CORE
Voltage Rails
VIN
B+
S1 S3 S5
ON OFF
N/A N/A N/A
N/AN/AN/A
Power Plane Description
OFF
Adapter power supply (19V)
AC or battery power rail for power circuit.
Core voltage for CPU
+VGA_CORE OFFOFFON0.95-1.2V switched power rail
+0.75VS ONON OFF0.75V switched power rail for DDR terminator
+0.935VGS ON OFF OFF0.935V switched power rail for VGA
STATE
LOW
LOW
LOW
SIGNAL
Full ON
S1(Power On Suspend)
LOW
LOW LOW
LOW
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF) LOW
SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Vcc 3.3V +/- 5%
100K +/- 5%Ra/Rb
Board ID
Ra / Rb V min
0
1
2
3
0
8.2K +/- 5%
0 V
0.216 V 0.250 V 0.289 V
0.436 V
0.712 V
0.503 V
0.819 V
0.538 V
0.875 V
AD_BID
V typ
AD_BID
V
AD_BID
max
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
3.300 V
0 V 0 V
4
5
6
7 NC
1.036 V
1.453 V 1.650 V 1.759 V
1.935 V
2.500 V
2.200 V
3.300 V
2.341 V
1.185 V 1.264 V
Board ID / SKU ID Table for AD channel
ON
ON
ON
ON
ON
ON
ON ON
ON
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
LOW
LOW
LOW
HIGH HIGH HIGH HIGH
HIGHHIGHHIGH
HIGH
HIGH
HIGH
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
+RTCVCC
+2.5VS
+5VS
+3VS
+5VALW
+3VALW
+VSB ON ON*
ONON
ON
ON
ON ON*
+LAN_VDD_3V3 ON ON ON
ON
OFF
OFF
OFF
ON
OFFON
ON
ON
OFF
ON*
OFF
ON
RTC power
2.5V for CPU_VDDA
3.3V always on power rail
3.3V switched power rail
5V always on power rail
5V switched power rail
VSB always on power rail
3.3V power rail for LAN
+1.8VGS OFFON OFF1.8V switched power rail
+1.5V_PCIE
+1.5V ON
OFF
OFF
ON OFF
ON
1.5V switched power rail
1.5V power rail for CPU VDDIO and DDR
+1.1VS
+1.2VS ON OFF OFF
ON OFF OFF1.1V switched power rail for FCH
1.2V switched power rail for APU
+1.1ALW 1.1V switched power rail for FCH ON ON*ON
2
3
4
5
6
7
PCB Revision
BOARD ID Table
Board ID
0
1
Device Address HEX
ADI ADM1032 (GPU)
1001 101X b
9AH
PX@ PX function
BOM Option Table
x = 1 is read cmd, x= 0 is writee cmd.
DB
SB-TSI (APU)
1001 100X b
98H
BOM
Structure
Description
BOM Config
UMA PX
+VDDCI OFF0.95-1.2V switched power rail ON OFF
VGA Internal Thermal
1000 001X b
82H
V
Amplifier
Touch pad
LVDS TR
1010 100X b
A8H
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
Notes List
B
4 56Monday, November 28, 2011
2011/07/08 2015/07/08
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
Notes List
B
4 56Monday, November 28, 2011
2011/07/08 2015/07/08
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
Notes List
B
4 56Monday, November 28, 2011
2011/07/08 2015/07/08
Compal Electronics, Inc.
ZZZ1
PCB
Part Number = DA80000SH00
PCB 0OH LA-8712P REV0 M/B
ZZZ1
PCB
Part Number = DA80000SH00
PCB 0OH LA-8712P REV0 M/B
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
EC
ENE KB932
+1.5V
+0.75VS
+1.5VS 500mA
+3.3VS 1A
+3.3VALW 330mA
+3.3VS 3mA
+3.3VALW 30mA
SATA
HDD*1
ODD*1
+5V 45mA
+3.3VS 25mA
+3.3VALW 201mA
+5V 3A
BATTERY
12.6V
PU101
CHARGER
BQ24738ARGRR
AC ADAPTOR
19V 90W
LAN /Card reader
RTL8411
RAM DDRIII SODIMMX2
VDD_MEM 4A
Audio Codec
IDT 92HD91
RTC
Bettary
VTT_MEM 0.5A
Mini Card
WLAN
BATT+
V
IN
VDD CORE 60A
VDDNB 44A
VDDIO 3.2A
VDDR 8.5A
VDDA 0.5A
AMD APU FS1R2
0.7~1.475V
+2.5VS
+1.5V
+1.2VS
FCH AMD Hudson M3
VDDIO_33_PCIGP: 102 mA
VDDPL_33_SYS: 47 mA
VDDPL_33_DAC: 20 mA
VDDPL_33_ML: 12 mA
VDDAN_33_DAC: 30 mA
VDDPL_33_PCIE: 11 mA
VDDPL_33_SATA: 12 mA
VDDPL_33_USB_S: 14 mA
VDDPL_33_SSUSB_S: 11 mA
VDDIO_AZ_S: 26 mA
VDDAN_33_USB_S: 470 mA
VDDIO_33_S: 59 mA
VDDXL_33_S: 5 mA
VDDAN_33_HWM_S: 12 mA
VDDIO_GEB_S: 145mA
VDDIO_33_GBE_S: 2mA
VDDIO_33_GBE_S
VDDCR_11_GBE_S
VDDIO_GBE_S
VDDPL_11_DAC: 7 mA
VDDAN_11_ML: 226 mA
VDDCR_11: 1007 mA
VDDAN_11_CLK: 340 mA
VDDAN_11_PCIE: 1088 mA
VDDAN_11_SATA: 1337 mA
VDDAN_11_USB_S: 140 mA
VDDCR_11_USB_S: 42 mA
VDDAN_11_SSUSB_S: 282 mA
VDDCR_11_SSUSB_S: 424 mA
VDDCR_11_S: 187 mA
VDDPL_11_SYS: 70 mA
VDDCR_11_GBE_S:63mA
+1.1VALW
+1.1VS
+3VALW
+3VS
GND
VDDBT_RTC_GRTC BAT
VGA ATI
Chelsea Pro
PLL_PVDD: 75 mA
TSVDD: 5 mA
AVDD: 70 mA
VDD1DI: 45 mA
VDD_CT: 17mA
PCIE_VDDR: 440 mA
DP[A:F]_VDD18: 990 mA
SPV18: 50mA
MPV18: 150mA
VDDCI 4.6A
DPLL_VDDC: 125 mA
SPV10: 100 mA
PCIE_VDDC: 1100 mA
DP[A:E]_VDD10: 880 mA
VDDC 28A
VDDR3: 60 mA
+0.935VGS
+3VGS
0.85~1.1V
+1.5VGS
+1.8VGS
B+
+APU_CORE
+APU_CORE_NB
+5VALW
+3VALW
+USB3_VCCA
U61
TPS2540RTER
+APU_CORE
+APU_CORE_NB
0.9~1.0V
VDDR1: 1200 mA
VRAM 512/1GB/2GB
64M / 128Mx16 * 4 / 8
+1.5VGS 2.4 A
0.7~1.475V
+1.8VGS
+0.935VGS
PU2000
ISL6277HRTZ-T
+1.5V
PU501
RT8207MZQW
PU701
RT8237EZQW
+1.2VS
+1.2VS
+1.5V
PU900
ADP3211MNR2G
+VGA_CORE
+VGA_CORE
+VDDCI
+VDDCI
PU935
SY8809DFC
PU401
SY8033BDBC
+1.8VGS
PU702
APL5508
+2.5VS
PU301
RT8205LZQW
+1.1VALW
PU801
SY8809DFC
UV19
AO4430L
+1.5VGS
+0.75VS
U39
AO4430L
+1.1VS
+1.1VS
+1.1VALW
U40
SI4800
+3VALW
+3VS
JUMP @
+3VSG
+3VSG
+3.3 350mA
B+ 300mA
LCD panel
15.6"
+INVPWR_B+
+5V
Dual+1
2.5A
USB3.0 X2
RM13
+1.5VS_WLAN
+3VALW
+3VS
+5VS
+5VALW
+3VS
+5VS
U38
SI4800
FAN Control
APL5607
+5VS 500mA
+3VS
+0.75VS
PU1000
SY8033BDBC
+1.5V
+2.5VS
PU1501
SY8036DBC
+1.5V_PCIE
QV16
AP2301GN
U54
AP2301MPG
USB3.0 X1
USB2.0 X1
+5V
Dual+1
2.5A
+USB_BS
+0.935VGS
+1.5VGS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
POWER DELIVERY CHART
Custom
5 56Monday, November 28, 2011
2011/07/08 2015/07/08
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
POWER DELIVERY CHART
Custom
5 56Monday, November 28, 2011
2011/07/08 2015/07/08
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
POWER DELIVERY CHART
Custom
5 56Monday, November 28, 2011
2011/07/08 2015/07/08
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
GLAN/Card reader
WLAN
GPU
UMI
GPU
GLAN/Card reader
WLAN
UMI
P_ZVSS W/S=8/12 mil, <3000mil
L
P_ZVDDP W/S=8/12 mil, <3000mil
L
PCIE_GTX_C_FRX_P0
PCIE_GTX_C_FRX_N0
PCIE_GTX_C_FRX_P1
PCIE_GTX_C_FRX_N1
PCIE_GTX_C_FRX_P2
PCIE_GTX_C_FRX_P5
PCIE_FTX_GRX_P2
PCIE_FTX_GRX_P3
PCIE_FTX_C_GRX_P2
PCIE_FTX_C_GRX_P3
PCIE_GTX_C_FRX_N2
PCIE_GTX_C_FRX_P3
PCIE_GTX_C_FRX_N3
PCIE_GTX_C_FRX_P4
PCIE_GTX_C_FRX_N4
PCIE_GTX_C_FRX_N5
PCIE_GTX_C_FRX_P6
PCIE_GTX_C_FRX_N6
PCIE_GTX_C_FRX_P7
PCIE_GTX_C_FRX_N7
PCIE_GTX_C_FRX_P8
PCIE_GTX_C_FRX_N8
PCIE_GTX_C_FRX_P9
PCIE_GTX_C_FRX_N9
PCIE_GTX_C_FRX_P10
PCIE_GTX_C_FRX_N10
PCIE_GTX_C_FRX_P11
PCIE_GTX_C_FRX_N11
PCIE_GTX_C_FRX_P12
PCIE_GTX_C_FRX_N12
PCIE_GTX_C_FRX_P13
PCIE_GTX_C_FRX_N13
PCIE_GTX_C_FRX_P14
PCIE_GTX_C_FRX_N14
PCIE_GTX_C_FRX_P15
PCIE_GTX_C_FRX_N15
P_ZVDDP
PCIE_FTX_GRX_P0 PCIE_FTX_C_GRX_P0
PCIE_FTX_GRX_N0 PCIE_FTX_C_GRX_N0
PCIE_FTX_GRX_P1 PCIE_FTX_C_GRX_P1
PCIE_FTX_GRX_N1 PCIE_FTX_C_GRX_N1
PCIE_FTX_GRX_N2 PCIE_FTX_C_GRX_N2
PCIE_FTX_GRX_N3 PCIE_FTX_C_GRX_N3
PCIE_FTX_GRX_P4 PCIE_FTX_C_GRX_P4
PCIE_FTX_GRX_N4 PCIE_FTX_C_GRX_N4
PCIE_FTX_GRX_P5 PCIE_FTX_C_GRX_P5
PCIE_FTX_GRX_N5 PCIE_FTX_C_GRX_N5
PCIE_FTX_GRX_P6 PCIE_FTX_C_GRX_P6
PCIE_FTX_GRX_N6 PCIE_FTX_C_GRX_N6
PCIE_FTX_GRX_P7 PCIE_FTX_C_GRX_P7
PCIE_FTX_GRX_N7 PCIE_FTX_C_GRX_N7
PCIE_FTX_GRX_P8 PCIE_FTX_C_GRX_P8
PCIE_FTX_GRX_N8 PCIE_FTX_C_GRX_N8
PCIE_FTX_GRX_P9 PCIE_FTX_C_GRX_P9
PCIE_FTX_GRX_N9 PCIE_FTX_C_GRX_N9
PCIE_FTX_GRX_P10 PCIE_FTX_C_GRX_P10
PCIE_FTX_GRX_N10 PCIE_FTX_C_GRX_N10
PCIE_FTX_GRX_P11 PCIE_FTX_C_GRX_P11
PCIE_FTX_GRX_N11 PCIE_FTX_C_GRX_N11
PCIE_FTX_GRX_P12 PCIE_FTX_C_GRX_P12
PCIE_FTX_GRX_N12 PCIE_FTX_C_GRX_N12
PCIE_FTX_GRX_P13 PCIE_FTX_C_GRX_P13
PCIE_FTX_GRX_N13 PCIE_FTX_C_GRX_N13
PCIE_FTX_GRX_P14 PCIE_FTX_C_GRX_P14
PCIE_FTX_GRX_N14 PCIE_FTX_C_GRX_N14
PCIE_FTX_GRX_P15 PCIE_FTX_C_GRX_P15
PCIE_FTX_GRX_N15 PCIE_FTX_C_GRX_N15
PCIE_FTX_DRX_P0
PCIE_FTX_DRX_N0
PCIE_FTX_DRX_P1
PCIE_FTX_DRX_N1
UMI_FTX_MRX_P0
UMI_FTX_MRX_N0
UMI_FTX_MRX_P1
UMI_FTX_MRX_N1
UMI_FTX_MRX_P2
UMI_FTX_MRX_N2
UMI_FTX_MRX_P3
UMI_FTX_MRX_N3
P_ZVSS
PCIE_GTX_C_FRX_N[0..15]13
PCIE_GTX_C_FRX_P[0..15]13 PCIE_FTX_C_GRX_P[0..15] 13
PCIE_FTX_C_GRX_N[0..15] 1 3
PCIE_DTX_C_FRX_P031
PCIE_DTX_C_FRX_N031
PCIE_DTX_C_FRX_P132
PCIE_DTX_C_FRX_N132
UMI_MTX_C_FRX_P025
UMI_MTX_C_FRX_N025
UMI_MTX_C_FRX_P125
UMI_MTX_C_FRX_N125
UMI_MTX_C_FRX_P225
UMI_MTX_C_FRX_N225
UMI_MTX_C_FRX_P325
UMI_MTX_C_FRX_N325
PCIE_FTX_C_DRX_P0 31
PCIE_FTX_C_DRX_N0 31
PCIE_FTX_C_DRX_P1 32
PCIE_FTX_C_DRX_N1 32
UMI_FTX_C_MRX_P0 25
UMI_FTX_C_MRX_N0 25
UMI_FTX_C_MRX_P1 25
UMI_FTX_C_MRX_N1 25
UMI_FTX_C_MRX_P2 25
UMI_FTX_C_MRX_N2 25
UMI_FTX_C_MRX_P3 25
UMI_FTX_C_MRX_N3 25
+1.2VS
Title
Size Docum ent Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
AMD FS1R2 PCIE / GFX / UMI
B
6 56Monday, November 28, 2011
2011/07/08 2015/07/08
Compal Electronics, Inc.
Title
Size Docum ent Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
AMD FS1R2 PCIE / GFX / UMI
B
6 56Monday, November 28, 2011
2011/07/08 2015/07/08
Compal Electronics, Inc.
Title
Size Docum ent Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
AMD FS1R2 PCIE / GFX / UMI
B
6 56Monday, November 28, 2011
2011/07/08 2015/07/08
Compal Electronics, Inc.
C928 .1U_0402_16V7KPX@C928 .1U_0402_16V7KPX@
1 2
C936 .1U_0402_16V7KPX@C936 .1U_0402_16V7KPX@
1 2
C929 .1U_0402_16V7KPX@C929 .1U_0402_16V7KPX@
1 2
C938 .1U_0402_16V7KPX@C938 .1U_0402_16V7KPX@
1 2
PCI EXPRESS
GRAPHICS
GPPUMI
JCPU1A
LOTES_ACA-ZIF-109-P12-A_FS1R2
CONN@
PCI EXPRESS
GRAPHICS
GPPUMI
JCPU1A
LOTES_ACA-ZIF-109-P12-A_FS1R2
CONN@
P_GFX_RXP0
AB8
P_GFX_RXN0
AB7
P_GFX_RXP1
AA9
P_GFX_RXN1
AA8
P_GFX_RXP2
AA5
P_GFX_RXN2
AA6
P_GFX_RXP3
Y8
P_GFX_RXN3
Y7
P_GFX_RXP4
W9
P_GFX_RXN4
W8
P_GFX_RXP5
W5
P_GFX_RXN5
W6
P_GFX_RXP6
V8
P_GFX_RXN6
V7
P_GFX_RXP7
U9
P_GFX_RXN7
U8
P_GFX_RXP8
U5
P_GFX_RXN8
U6
P_GFX_RXP9
T8
P_GFX_RXN9
T7
P_GFX_RXP10
R9
P_GFX_RXN10
R8
P_GFX_RXP11
R5
P_GFX_RXN11
R6
P_GFX_RXP12
P8
P_GFX_RXN12
P7
P_GFX_RXP13
N9
P_GFX_RXN13
N8
P_GFX_RXP14
N5
P_GFX_RXN14
N6
P_GFX_RXP15
M8
P_GFX_RXN15
M7
P_GPP_RXP0
AE5
P_GPP_RXN0
AE6
P_GPP_RXP1
AD8
P_GPP_RXN1
AD7
P_GPP_RXP2
AC9
P_GPP_RXN2
AC8
P_GPP_RXP3
AC5
P_GPP_RXN3
AC6
P_UMI_RXP0
AG8
P_UMI_RXN0
AG9
P_UMI_RXP1
AG6
P_UMI_RXN1
AG5
P_UMI_RXP2
AF7
P_UMI_RXN2
AF8
P_UMI_RXP3
AE8
P_UMI_RXN3
AE9
P_ZVDDP
AG11
P_UMI_TXP0
AG2
P_UMI_TXN0
AG3
P_UMI_TXP1
AF4
P_UMI_TXN1
AF5
P_UMI_TXP2
AF1
P_UMI_TXN2
AF2
P_UMI_TXP3
AE2
P_UMI_TXN3
AE3
P_ZVSS
AH11
P_GPP_TXP0
AD5
P_GPP_TXN0
AD4
P_GPP_TXP1
AD2
P_GPP_TXN1
AD1
P_GPP_TXP2
AC3
P_GPP_TXN2
AC2
P_GPP_TXP3
AB5
P_GPP_TXN3
AB4
P_GFX_TXP0
AB2
P_GFX_TXN0
AB1
P_GFX_TXP1
AA3
P_GFX_TXN1
AA2
P_GFX_TXP2
Y5
P_GFX_TXN2
Y4
P_GFX_TXP3
Y2
P_GFX_TXN3
Y1
P_GFX_TXP4
W3
P_GFX_TXN4
W2
P_GFX_TXP5
V5
P_GFX_TXN5
V4
P_GFX_TXP6
V2
P_GFX_TXN6
V1
P_GFX_TXP7
U3
P_GFX_TXN7
U2
P_GFX_TXP8
T5
P_GFX_TXN8
T4
P_GFX_TXP9
T2
P_GFX_TXN9
T1
P_GFX_TXP10
R3
P_GFX_TXN10
R2
P_GFX_TXP11
P5
P_GFX_TXN11
P4
P_GFX_TXP12
P2
P_GFX_TXN12
P1
P_GFX_TXP13
N3
P_GFX_TXN13
N2
P_GFX_TXP14
M5
P_GFX_TXN14
M4
P_GFX_TXP15
M2
P_GFX_TXN15
M1
C943 .1U_0402_16V7KPX@C943 .1U_0402_16V7KPX@
1 2
R539 196_0402_1%R539 196_0402_1%
1 2
C931 .1U_0402_16V7KPX@C931 .1U_0402_16V7KPX@
1 2
C941 .1U_0402_16V7KPX@C941 .1U_0402_16V7KPX@
1 2
C945 .1U_0402_16V7KPX@C945 .1U_0402_16V7KPX@
1 2
C933 .1U_0402_16V7KPX@C933 .1U_0402_16V7KPX@
1 2
C922 .1U_0402_16V7KPX@C922 .1U_0402_16V7KPX@
1 2
C950 .1U_0402_16V7KC950 .1U _0402_16V7K
1 2
C925 .1U_0402_16V7KPX@C925 .1U_0402_16V7KPX@
1 2
C919 .1U_0402_16V7KPX@C919 .1U_0402_16V7KPX@
1 2
C940 .1U_0402_16V7KPX@C940 .1U_0402_16V7KPX@
1 2
C948 .1U_0402_16V7KPX@C948 .1U_0402_16V7KPX@
1 2
C942 .1U_0402_16V7KPX@C942 .1U_0402_16V7KPX@
1 2
C937 .1U_0402_16V7KPX@C937 .1U_0402_16V7KPX@
1 2
C956 .1U_0402_16V7KC956 .1U _0402_16V7K
1 2
C962 .1U_0402_16V7KC962 .1U _0402_16V7K
1 2
C959 .1U_0402_16V7KC959 .1U _0402_16V7K
1 2
C921 .1U_0402_16V7KPX@C921 .1U_0402_16V7KPX@
1 2
C960 .1U_0402_16V7KC960 .1U _0402_16V7K
1 2
C932 .1U_0402_16V7KPX@C932 .1U_0402_16V7KPX@
1 2
C961 .1U_0402_16V7KC961 .1U _0402_16V7K
1 2
C934 .1U_0402_16V7KPX@C934 .1U_0402_16V7KPX@
1 2
C930 .1U_0402_16V7KPX@C930 .1U_0402_16V7KPX@
1 2
C958 .1U_0402_16V7KC958 .1U _0402_16V7K
1 2
C939 .1U_0402_16V7KPX@C939 .1U_0402_16V7KPX@
1 2
C927 .1U_0402_16V7KPX@C927 .1U_0402_16V7KPX@
1 2
C923 .1U_0402_16V7KPX@C923 .1U_0402_16V7KPX@
1 2
C918 .1U_0402_16V7KPX@C918 .1U_0402_16V7KPX@
1 2
C924 .1U_0402_16V7KPX@C924 .1U_0402_16V7KPX@
1 2
R540 196_0402_1%R540 196_0402_1%
1 2
C947 .1U_0402_16V7KPX@C947 .1U_0402_16V7KPX@
1 2
C952 .1U_0402_16V7KC952 .1U _0402_16V7K
1 2
C917 .1U_0402_16V7KPX@C917 .1U_0402_16V7KPX@
1 2
C944 .1U_0402_16V7KPX@C944 .1U_0402_16V7KPX@
1 2
C949 .1U_0402_16V7KPX@C949 .1U_0402_16V7KPX@
1 2
C946 .1U_0402_16V7KPX@C946 .1U_0402_16V7KPX@
1 2
C957 .1U_0402_16V7KC957 .1U _0402_16V7K
1 2
C951 .1U_0402_16V7KC951 .1U _0402_16V7K
1 2
C926 .1U_0402_16V7KPX@C926 .1U_0402_16V7KPX@
1 2
C920 .1U_0402_16V7KPX@C920 .1U_0402_16V7KPX@
1 2
C963 .1U_0402_16V7KC963 .1U _0402_16V7K
1 2
C953 .1U_0402_16V7KC953 .1U _0402_16V7K
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
EVENT# pull high
0.75V reference voltage
M_ZVDDIO W/S=8/12 mil, <1000mil
L
+MEM_VREF 15mil
Close to JCPU1
L
DDRA_SDQ59
DDRA_SDQ60
DDRA_SDQ3
DDRA_SDQ13
DDRA_SDQ40
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQ61
DDRA_SDQ15
DDRA_SDQ34
DDRA_SDQ36
DDRA_SDQ4
DDRA_SDQ0
DDRA_SDQ53
DDRA_SDQ47
DDRA_SDQ43
DDRA_SDQ39
DDRA_SDQ46
DDRA_SDQ33
DDRA_SDQ24
DDRA_SDQ54
DDRA_SDQ5
DDRA_SDQ6
DDRA_SDQ8
DDRA_SDQ51
DDRA_SDQ9
DDRA_SDQ50
DDRA_SDQ12
DDRA_SDQ31
DDRA_SDQ7
DDRA_SDQ63
DDRA_SDQ62
DDRA_SDQ42
DDRA_SDQ26
DDRA_SDQ58
DDRA_SDQ25
DDRA_SDQ32
DDRA_SDQ1
DDRA_SDQ44
DDRA_SDQ48
DDRA_SDQ11
DDRA_SDQ55
DDRA_SDQ2
DDRA_SDQ38
DDRA_SDQ27
DDRA_SDQ41
DDRA_SDQ10
DDRA_SDQ14
DDRA_SDQ49
DDRA_SDQ30
DDRA_SDQ35
DDRA_SDQ37
DDRA_SDQ52
DDRA_SDQ45
DDRA_SDQ57
DDRA_SDQ56
DDRB_SDQ48
DDRB_SDQ39
DDRB_SDQ1
DDRB_SDQ42
DDRB_SDQ36
DDRB_SDQ2
DDRB_SDQ58
DDRB_SDQ33
DDRB_SDQ31
DDRB_SDQ21
DDRB_SDQ54
DDRB_SDQ62
DDRB_SDQ24
DDRB_SDQ15
DDRB_SDQ12
DDRB_SDQ49
DDRB_SDQ60
DDRB_SDQ43
DDRB_SDQ18
DDRB_SDQ34
DDRB_SDQ4
DDRB_SDQ61
DDRB_SDQ6
DDRB_SDQ25
DDRB_SDQ23
DDRB_SDQ57
DDRB_SDQ13
DDRB_SDQ0
DDRB_SDQ28
DDRB_SDQ16
DDRB_SDQ22
DDRB_SDQ19
DDRB_SDQ9
DDRB_SDQ50
DDRB_SDQ35
DDRB_SDQ46
DDRB_SDQ5
DDRB_SDQ37
DDRB_SDQ26
DDRB_SDQ3
DDRB_SDQ8
DDRB_SDQ29
DDRB_SDQ14
DDRB_SDQ7
DDRB_SDQ51
DDRB_SDQ10
DDRB_SDQ59
DDRB_SDQ17
DDRB_SDQ44
DDRB_SDQ41
DDRB_SDQ38
DDRB_SDQ47
DDRB_SDQ32
DDRB_SDQ20
DDRB_SDQ52
DDRB_SDQ30
DDRB_SDQ63
DDRB_SDQ53
DDRB_SDQ40
DDRB_SDQ27
DDRB_SDQ45
DDRB_SDQ55
DDRB_SDQ56
DDRB_SDQ11
DDRA_SWE#
DDRA_SCAS#
DDRA_SRAS#
DDRA_SBS2#
DDRA_SBS1#
DDRA_SBS0#
DDRA_SMA15
DDRA_SMA12
DDRA_SMA14
DDRA_SMA13
DDRA_SMA11
DDRA_SMA10
DDRA_SMA6
DDRA_SMA1
DDRA_SMA7
DDRA_SMA2
DDRA_SMA3
DDRA_SMA8
DDRA_SMA5
DDRA_SMA4
DDRA_SMA9
DDRA_SMA0
DDRA_SDM6
DDRA_SDM3
DDRA_SDM5
DDRA_SDM4
DDRA_SDM2
DDRA_SDM1
DDRA_SDM7
DDRA_SDM0
DDRA_SDQS0
DDRA_SDQS0#
DDRA_SDQS3
DDRA_SDQS3#
DDRA_SDQS2
DDRA_SDQS2#
DDRA_SDQS1
DDRA_SDQS1#
DDRA_SDQS4
DDRA_SDQS4#
DDRA_SDQS5
DDRA_SDQS5#
DDRA_SDQS6
DDRA_SDQS6#
DDRA_SDQS7#
DDRA_SDQS7
DDRA_CLK0#
DDRA_CLK0
DDRA_SCS1#
DDRA_SCS0#
DDRA_ODT0
DDRA_ODT1
DDRA_CKE0
DDRA_CKE1
MEM_MA_EVENT#
M_ZVDDIO
MEM_MA_RST#
DDRA_CLK1#
DDRA_CLK1
DDRA_SDQ20
DDRA_SDQ22
DDRA_SDQ21
DDRA_SDQ23
DDRA_SDQ17
DDRA_SDQ16
DDRA_SDQ18
DDRB_SMA14
DDRB_SMA10
DDRB_SMA7
DDRB_SMA1
DDRB_SMA12
DDRB_SMA6
DDRB_SMA11
DDRB_SMA0
DDRB_SMA9
DDRB_SMA15
DDRB_SMA3
DDRB_SMA5
DDRB_SMA8
DDRB_SMA13
DDRB_SMA2
DDRB_SMA4
DDRB_SRAS#
DDRB_SCAS#
DDRB_SWE#
DDRB_ODT0
DDRB_ODT1
DDRB_CKE1
DDRB_CKE0
DDRB_CLK0#
DDRB_CLK0
DDRB_SCS1#
DDRB_SCS0#
DDRB_CLK1#
MEM_MB_RST#
MEM_MB_EVENT#
DDRB_CLK1
DDRB_SDQS6
DDRB_SDQS6#
DDRB_SDQS2
DDRB_SDQS2#
DDRB_SDQS5
DDRB_SDQS5#
DDRB_SDQS1
DDRB_SDQS1#
DDRB_SDQS4
DDRB_SDQS4#
DDRB_SDQS0
DDRB_SDQS0#
DDRB_SDQS7
DDRB_SDQS7#
DDRB_SDQS3
DDRB_SDQS3#
DDRB_SDM6
DDRB_SDM4
DDRB_SDM2
DDRB_SDM0
DDRB_SDM5
DDRB_SDM3
DDRB_SDM1
DDRB_SDM7
DDRB_SBS0#
DDRB_SBS1#
DDRB_SBS2#
DDRA_SDQ19
MEM_MA_EVENT#
MEM_MB_EVENT#
+MEM_VREF
DDRB_SDQ[63..0] 12
DDRA_SBS0#11
DDRA_SBS1#11
DDRA_SBS2#11
DDRA_SDQS011
DDRA_SDQS0#11
DDRA_SDQS111
DDRA_SDQS1#11
DDRA_SDQS211
DDRA_SDQS2#11
DDRA_SDQS311
DDRA_SDQS3#11
DDRA_SDQS411
DDRA_SDQS4#11
DDRA_SDQS511
DDRA_SDQS5#11
DDRA_SDQS611
DDRA_SDQS6#11
DDRA_SDQS711
DDRA_SDQS7#11
DDRA_CLK011
DDRA_CLK0#11
DDRA_CKE011
DDRA_CKE111
DDRA_ODT011
DDRA_ODT111
DDRA_SCS0#11
DDRA_SCS1#11
DDRA_SRAS#11
DDRA_SCAS#11
DDRA_SWE#11
MEM_MA_RST#11
MEM_MA_EVENT#11
DDRA_CLK111
DDRA_CLK1#11
DDRA_SMA[15..0]11
DDRA_SDM[7..0]11
DDRA_SDQ[63..0] 11
DDRB_SBS0#12
DDRB_SBS1#12
DDRB_SBS2#12
DDRB_SMA[15..0]12
DDRB_SRAS#12
DDRB_SCAS#12
DDRB_SWE#12
DDRB_CLK012
DDRB_CLK0#12
DDRB_CKE012
DDRB_CKE112
DDRB_ODT012
DDRB_ODT112
DDRB_SCS0#12
DDRB_SCS1#12
MEM_MB_RST#12
MEM_MB_EVENT#12
DDRB_CLK112
DDRB_CLK1#12
DDRB_SDQS712
DDRB_SDQS7#12
DDRB_SDQS612
DDRB_SDQS512
DDRB_SDQS412
DDRB_SDQS312
DDRB_SDQS212
DDRB_SDQS112
DDRB_SDQS012
DDRB_SDQS6#12
DDRB_SDQS5#12
DDRB_SDQS4#12
DDRB_SDQS3#12
DDRB_SDQS2#12
DDRB_SDQS1#12
DDRB_SDQS0#12
DDRB_SDM[7..0]12
+1.5V
+MEM_VREF
+1.5V
+1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
AMD FS1 DDRIII I/F
Custom
7 56Monday, November 28, 2011
2011/07/08 2015/07/08
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
AMD FS1 DDRIII I/F
Custom
7 56Monday, November 28, 2011
2011/07/08 2015/07/08
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
AMD FS1 DDRIII I/F
Custom
7 56Monday, November 28, 2011
2011/07/08 2015/07/08
Compal Electronics, Inc.
R545 1K_0402_5%R545 1K_0402_5%
1 2
C964
1000P_0402_50V7K
C964
1000P_0402_50V7K
1
2
C965
.1U_0402_16V7K
C965
.1U_0402_16V7K
1
2
R542
1K_0402_1%
R542
1K_0402_1%
1 2
R541 39.2_0402_1%R541 39.2_0402_1%
1 2
MEMORY CHANNEL B
JCPU1C
LOTES_ACA-ZIF-109-P12-A_FS1R2
CONN@
MEMORY CHANNEL B
JCPU1C
LOTES_ACA-ZIF-109-P12-A_FS1R2
CONN@
MB_ADD0
T27
MB_ADD1
P24
MB_ADD2
P25
MB_ADD3
N27
MB_ADD4
N26
MB_ADD5
M28
MB_ADD6
M27
MB_ADD7
M24
MB_ADD8
M25
MB_ADD9
L26
MB_ADD10
U26
MB_ADD11
L27
MB_ADD12
K27
MB_ADD13
W26
MB_ADD14
K25
MB_ADD15
K24
MB_BANK0
U27
MB_BANK1
T28
MB_BANK2
K28
MB_DM0
D14
MB_DM1
A18
MB_DM2
A22
MB_DM3
C25
MB_DM4
AF25
MB_DM5
AG22
MB_DM6
AH18
MB_DM7
AD14
MB_DQS_H0
C15
MB_DQS_L0
B15
MB_DQS_H1
E18
MB_DQS_L1
D18
MB_DQS_H2
E22
MB_DQS_L2
D22
MB_DQS_H3
B26
MB_DQS_L3
A26
MB_DQS_H4
AG24
MB_DQS_L4
AG25
MB_DQS_H5
AG21
MB_DQS_L5
AF21
MB_DQS_H6
AG17
MB_DQS_L6
AG18
MB_DQS_H7
AH14
MB_DQS_L7
AG14
MB_CLK_H0
R26
MB_CLK_L0
R27
MB_CLK_H1
P27
MB_CLK_L1
P28
MB_CKE0
J26
MB_CKE1
J27
MB_ODT0
W27
MB_ODT1
Y28
MB_CS_L0
V25
MB_CS_L1
Y27
MB_RAS_L
V24
MB_CAS_L
V27
MB_WE_L
V28
MB_RESET_L
J25
MB_EVENT_L
T25
MB_DATA0
A14
MB_DATA1
B14
MB_DATA2
D16
MB_DATA3
E16
MB_DATA4
B13
MB_DATA5
C13
MB_DATA6
B16
MB_DATA7
A16
MB_DATA8
C17
MB_DATA9
B18
MB_DATA10
B20
MB_DATA11
A20
MB_DATA12
E17
MB_DATA13
B17
MB_DATA14
B19
MB_DATA15
C19
MB_DATA16
C21
MB_DATA17
B22
MB_DATA18
C23
MB_DATA19
A24
MB_DATA20
D20
MB_DATA21
B21
MB_DATA22
E23
MB_DATA23
B23
MB_DATA24
E24
MB_DATA25
B25
MB_DATA26
B27
MB_DATA27
D28
MB_DATA28
B24
MB_DATA29
D24
MB_DATA30
D26
MB_DATA31
C27
MB_DATA32
AG26
MB_DATA33
AH26
MB_DATA34
AF23
MB_DATA35
AG23
MB_DATA36
AG27
MB_DATA37
AF27
MB_DATA38
AH24
MB_DATA39
AE24
MB_DATA40
AE22
MB_DATA41
AH22
MB_DATA42
AE20
MB_DATA43
AH20
MB_DATA44
AD23
MB_DATA45
AD22
MB_DATA46
AD21
MB_DATA47
AD20
MB_DATA48
AF19
MB_DATA49
AE18
MB_DATA50
AE16
MB_DATA51
AH16
MB_DATA52
AG20
MB_DATA53
AG19
MB_DATA54
AF17
MB_DATA55
AD16
MB_DATA56
AG15
MB_DATA57
AD15
MB_DATA58
AG13
MB_DATA59
AD13
MB_DATA60
AG16
MB_DATA61
AF15
MB_DATA62
AE14
MB_DATA63
AF13
R544 1K_0402_5%R544 1K_0402_5%
1 2
R543
1K_0402_1%
R543
1K_0402_1%
1 2
MEMORY CHANNEL A
JCPU1B
LOTES_ACA-ZIF-109-P12-A_FS1R2
CONN@
MEMORY CHANNEL A
JCPU1B
LOTES_ACA-ZIF-109-P12-A_FS1R2
CONN@
MA_ADD0
U20
MA_ADD1
R20
MA_ADD2
R21
MA_ADD3
P22
MA_ADD4
P21
MA_ADD5
N24
MA_ADD6
N23
MA_ADD7
N20
MA_ADD8
N21
MA_ADD9
M21
MA_ADD10
U23
MA_ADD11
M22
MA_ADD12
L24
MA_ADD13
AA25
MA_ADD14
L21
MA_ADD15
L20
MA_BANK0
U24
MA_BANK1
U21
MA_BANK2
L23
MA_DM0
E14
MA_DM1
J17
MA_DM2
E21
MA_DM3
F25
MA_DM4
AD27
MA_DM5
AC23
MA_DM6
AD19
MA_DM7
AC15
MA_DQS_H0
G14
MA_DQS_L0
H14
MA_DQS_H1
G18
MA_DQS_L1
H18
MA_DQS_H2
J21
MA_DQS_L2
H21
MA_DQS_H3
E27
MA_DQS_L3
E26
MA_DQS_H4
AE26
MA_DQS_L4
AD26
MA_DQS_H5
AB22
MA_DQS_L5
AA22
MA_DQS_H6
AB18
MA_DQS_L6
AA18
MA_DQS_H7
AA14
MA_DQS_L7
AA15
MA_CLK_H0
T21
MA_CLK_L0
T22
MA_CLK_H1
R23
MA_CLK_L1
R24
MA_CKE0
H28
MA_CKE1
H27
MA_ODT0
Y25
MA_ODT1
AA27
MA_CS_L0
V22
MA_CS_L1
AA26
MA_RAS_L
V21
MA_CAS_L
W24
MA_WE_L
W23
MA_RESET_L
H25
MA_EVENT_L
T24
M_VREF
W20
M_ZVDDIO
W21
MA_DATA0
E13
MA_DATA1
J13
MA_DATA2
H15
MA_DATA3
J15
MA_DATA4
H13
MA_DATA5
F13
MA_DATA6
F15
MA_DATA7
E15
MA_DATA8
H17
MA_DATA9
F17
MA_DATA10
E19
MA_DATA11
J19
MA_DATA12
G16
MA_DATA13
H16
MA_DATA14
H19
MA_DATA15
F19
MA_DATA16
H20
MA_DATA17
F21
MA_DATA18
J23
MA_DATA19
H23
MA_DATA20
G20
MA_DATA21
E20
MA_DATA22
G22
MA_DATA23
H22
MA_DATA24
G24
MA_DATA25
E25
MA_DATA26
G27
MA_DATA27
G26
MA_DATA28
F23
MA_DATA29
H24
MA_DATA30
E28
MA_DATA31
F27
MA_DATA32
AB28
MA_DATA33
AC27
MA_DATA34
AD25
MA_DATA35
AA24
MA_DATA36
AE28
MA_DATA37
AD28
MA_DATA38
AB26
MA_DATA39
AC25
MA_DATA40
Y23
MA_DATA41
AA23
MA_DATA42
Y21
MA_DATA43
AA20
MA_DATA44
AB24
MA_DATA45
AD24
MA_DATA46
AA21
MA_DATA47
AC21
MA_DATA48
AA19
MA_DATA49
AC19
MA_DATA50
AC17
MA_DATA51
AA17
MA_DATA52
AB20
MA_DATA53
Y19
MA_DATA54
AD18
MA_DATA55
AD17
MA_DATA56
AA16
MA_DATA57
Y15
MA_DATA58
AA13
MA_DATA59
AC13
MA_DATA60
Y17
MA_DATA61
AB16
MA_DATA62
AB14
MA_DATA63
Y13
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
100MHz
100MHz
NSS
To LVDS Translator
CRT
To LVDS
Translator
To FCH
VDDIO level
Need Level shift
THERMTRIP shutdown
temperature: 115 degree
Asserted as an input to
force processor into
HTC-active state
Indicates to the FCH that a th ermal trip
has occurred. Its assertion wi ll cause the FCH
to transition the system to S5 immediately
TEST35 change to PU for
HDMI can not output
20110126
Allow_STOP leakage issue
SVI 2.0
(0 ohm
at Power Side)
Route as differential with APU _VDD_RUN_FB_L
LVDS/eDP
To HDMI
CPU TSI interface level shift
BSH111, the Vgs is:
min = 0.4V
Max = 1.3V
HDT Debug conn
Close to Header
HDMI
For ESD request close APU side
To HDMI
Place near APU
Internal PU when no use HDT
Vg = 1.607 V
When APU High -> MOS OFF (Vgs < 0.4V )
APU Low -> MOS ON (Vgs > 1.3V)
10/27 300 ohm??
To FCH
VGA ML
Close to APU (JCPU1)
L
Del DP0_TXP1/N1
DP_AUX_ZVSS W/S=8/12 mil, <3000mil
L
SB-TSI (S5 Domain)
Del DP_ENVDD
LA-8124 no use this DP_ENBKL.
11/10 del debug connector
11/14 Change net name
11/14 Reserve
11/15 RF
APU_DISP_CLKP
APU_DISP_CLKN
APU_THERMTRIP#
APU_PROCHOT#
APU_CLKP
APU_CLKN
DP_AUX_ZVSS
DP0_TXN0
APU_SID
APU_SIC
DP1_HPD
ALERT_L
APU_PROCHOT#
APU_THERMTRIP#
TEST35
ALLOW_STOP
APU_THERMTRIP#
APU_PROCHOT#
APU_PWRGD
APU_RST#
APU_DBRDY
APU_DBREQ#
DP0_TXP0
APU_SVC
APU_SVD
APU_RST#_APUAPU_RST#
APU_PWRGD APU_PWRGD_APU
APU_TDI
APU_TDO
APU_TCK
APU_TMS
APU_TRST#
APU_VDDNB_SEN
APU_VDD_SEN
DP0_HPD
DP_ENBKL
DP_INT_PWM
APU_TEST18
APU_TEST19
APU_TEST20
APU_TEST24
FS1R2
ALLOW_STOP
DP0_AUXP
DP0_AUXN
ML_VGA_AUXP
ML_VGA_AUXN
APU_SID
APU_SIC
APU_SIC
APU_SID
ALERT_L
APU_RST#
APU_PWRGD
APU_TDI
APU_TCK
APU_TMS
APU_TRST#
APU_DBREQ#
EC_SMB_CK2
EC_SMB_DA2
APU_SVT
APU_SVT
APU_SVC
APU_SVD
APU_HDMI_CLK
APU_HDMI_DATA
DP2_HPD
DP0_AUXN
ML_VGA_AUXP
ML_VGA_AUXN
DP0_AUXP
M_TEST
TEST25_H
TEST25_L
DP1_TXN1
DP1_TXP3
DP1_TXN0
DP1_TXN3
DP1_TXP2
DP1_TXN2
DP1_TXP1
DP1_TXP0
APU_DISP_CLKP
APU_DISP_CLKN
APU_CLKP
APU_CLKN
APU_CLKP25
APU_CLKN25
APU_DISP_CLKP25
APU_DISP_CLKN25
DP0_TXN0_C21
DP0_AUXP_C 21
DP0_AUXN_C 21
APU_VDD_RUN_FB_L54
DP1_HPD 10
EC_THERM# 25,37,45,54
H_THERMTRIP# 27
MAINPWON 45,46
DP0_TXP0_C21
APU_SVC54
APU_SVD54
APU_RST#25
APU_PWRGD25,54
APU_VDDNB_SEN54
APU_VDD_SEN54
ML_VGA_AUXP_C 26
ML_VGA_AUXN_C 26
DP0_HPD 10
DP_ENBKL 10
DP_INT_PWM 10
ALLOW_STOP25
EC_SMB_DA2 14,21,37
EC_SMB_CK2 14,21,37
APU_SVT54
APU_HDMI_TXD2+23
APU_HDMI_TXD2-23
APU_HDMI_TXD1-23
APU_HDMI_TXD1+23
APU_HDMI_TXD0-23
APU_HDMI_TXD0+23
APU_HDMI_TXC-23
APU_HDMI_TXC+23
APU_HDMI_CLK 23
APU_HDMI_DATA 23
DP2_HPD 23
ML_VGA_TXP026
ML_VGA_TXN026
ML_VGA_TXP126
ML_VGA_TXN126
ML_VGA_TXP226
ML_VGA_TXN226
ML_VGA_TXP326
ML_VGA_TXN326
H_PROCHOT#45
+3VS+1.5V
+1.5V
+1.5V
+3VALW
+3VS
+1.5V
+1.5V
+1.2VS
+1.5V
+1.5V_PCIE +1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
AMD FS1 Display / MISC / HDT
Custom
8 56Monday, November 28, 2011
2011/07/08 2015/07/08
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
AMD FS1 Display / MISC / HDT
Custom
8 56Monday, November 28, 2011
2011/07/08 2015/07/08
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
AMD FS1 Display / MISC / HDT
Custom
8 56Monday, November 28, 2011
2011/07/08 2015/07/08
Compal Electronics, Inc.
R596 1K_0402_5%R596 1K_0402_5%
1 2
R582 1K_0402_5%R582 1K_0402_5%
1 2
R586
1K_0402_5%
R586
1K_0402_5%
1 2
C972 .1U_0402_16V7KC972 .1U_0402_16V7K
1 2
C968 .1U_0402_16V7KC968 .1U_0402_16V7K
1 2
R623 0_0402_5%@R623 0_0402_5%@
1 2
R611 0_0402_5%R611 0_0402_5%
1 2
E
B
C
Q11
MMBT3904_SOT23-3
E
B
C
Q11
MMBT3904_SOT23-3
2
31
R548 510_0402_1%R548 510_0402_1%
1 2
C981 .1U_0402_16V7KC981 .1U_0402_16V7K
1 2
C4703 22P_0402_50V8JC4703 22P_0402_50V8J
12
R604 1K_0402_5%R604 1K_0402_5%
12
R564 39.2_0402_1%@R564 39.2_0402_1%@
1 2
C38 33P_0402_50V8JC38 33P_0402_50V8J
R593 1K_0402_5%R593 1K_0402_5%
1 2
R556 1.8K_0402_5%R556 1.8K_0402_5%
12
R583 1K_0402_5%R583 1K_0402_5%
1 2
R594 1K_0402_5%R594 1K_0402_5%
1 2
T16T16
C969 .1U_0402_16V7KC969 .1U_0402_16V7K
1 2
R554 1.8K_0402_5%R554 1.8K_0402_5%
12
C4704 22P_0402_50V8JC4704 22P_0402_50V8J
12
R555 1.8K_0402_5%R555 1.8K_0402_5%
12
R578 300_0402_5%R578 300_0402_5%
12
R575 1K_0402_5%@R575 1K_0402_5%@
1 2
T6T6
C978 .1U_0402_16V7KC978 .1U_0402_16V7K
1 2
C976 .1U_0402_16V7KC976 .1U_0402_16V7K
1 2
R615 0_0402_5%R615 0_0402_5%
1 2
R595 1K_0402_5%R595 1K_0402_5%
1 2
C4705 22P_0402_50V8JC4705 22P_0402_50V8J
12
C979 .1U_0402_16V7KC979 .1U_0402_16V7K
1 2
R576 1K_0402_5%@R576 1K_0402_5%@
1 2
T11T11
R571 10K_0402_5%R571 10K_0402_5%
1 2
T15T15
E
B
C
Q12
MMBT3904_SOT23-3
E
B
C
Q12
MMBT3904_SOT23-3
2
3 1
C935 0.1U_0402_16V4ZC935 0.1U_0402_16V4Z
1 2
C970 .1U_0402_16V7KC970 .1U_0402_16V7K
1 2
R574 1K_0402_5%R574 1K_0402_5%
1 2
R580 300_0402_5%R580 300_0402_5%
12
R598 0_0402_5%R598 0_0402_5%
1 2
T10T10
T13T13
T8T8
R547 1.8K_0402_5%R547 1.8K_0402_5%
12
C36 22P_0402_50V8JC36 22P_0402_50V8J
12
C977 .1U_0402_16V7KC977 .1U_0402_16V7K
1 2
R584 1K_0402_5%R584 1K_0402_5%
1 2
T17T17
R591
0_0402_5%
R591
0_0402_5%
1 2
R791 1K_0402_5%R791 1K_0402_5%
1 2
R569 150_0402_1%R569 150_0402_1%
1 2
C40 33P_0402_50V8JC40 33P_0402_50V8J
R581 1K_0402_5%R581 1K_0402_5%
1 2
C971 .1U_0402_16V7KC971 .1U_0402_16V7K
1 2
R577 1K_0402_5%
@
R577 1K_0402_5%
@
12
R567 39.2_0402_1%R567 39.2_0402_1%
1 2
R579 1K_0402_5%R579 1K_0402_5%
1 2
T12T12
G
D
S
Q10
BSH111_SOT23-3
G
D
S
Q10
BSH111_SOT23-3
2
13
R535
31.6K_0402_1%
R535
31.6K_0402_1%
1 2
G
D
S
Q9
BSH111_SOT23-3
G
D
S
Q9
BSH111_SOT23-3
2
13
ANALOG/DISPLAY/MIS C
DISPLAY PORT
0
DISPLAY PORT 1DISPLAY PORT 2CLKSER.CTRLJTAGSENSE
DISPLAY PORT
MISC.
TESTRSVD
JCPU1D
LOTES_ACA-ZIF-109-P12-A_FS1R2
CONN@
ANALOG/DISPLAY/MIS C
DISPLAY PORT
0
DISPLAY PORT 1DISPLAY PORT 2CLKSER.CTRLJTAGSENSE
DISPLAY PORT
MISC.
TESTRSVD
JCPU1D
LOTES_ACA-ZIF-109-P12-A_FS1R2
CONN@
DP0_TXP0
L3
DP0_TXN0
L2
DP0_TXP1
K5
DP0_TXN1
K4
DP0_TXP2
K2
DP0_TXN2
K1
DP0_TXP3
J3
DP0_TXN3
J2
DP1_TXP0
H5
DP1_TXN0
H4
DP1_TXP1
H2
DP1_TXN1
H1
DP1_TXP2
G3
DP1_TXN2
G2
DP1_TXP3
F2
DP1_TXN3
F1
DP2_TXP0
L9
DP2_TXN0
L8
DP2_TXP1
L5
DP2_TXN1
L6
DP2_TXP2
K8
DP2_TXN2
K7
DP2_TXP3
J6
DP2_TXN3
J5
CLKIN_H
AE11
CLKIN_L
AD11
DISP_CLKIN_H
AB11
DISP_CLKIN_L
AA11
SVC
B3
SVD
A3
SVT
C3
SIC
AG12
SID
AH12
RESET_L
AF10
PWROK
AB12
DMAACTIVE_L
AC12
PROCHOT_L
AC10
THERMTRIP_L
AE12
ALERT_L
AF12
TDI
H10
TDO
J10
TCK
F10
TMS
G10
TRST_L
F9
DBRDY
G9
DBREQ_L
H9
VSS_SENSE
B4
VDDP_SENSE
C5
VDDNB_SENSE
A4
VDDIO_SENSE
A5
VDD_SENSE
C4
VDDR_SENSE
B5
DP0_AUXP
D1
DP0_AUXN
D2
DP1_AUXP
E1
DP1_AUXN
E2
DP2_AUXP
D5
DP2_AUXN
D6
DP3_AUXP
E5
DP3_AUXN
E6
DP4_AUXP
F5
DP4_AUXN
F6
DP5_AUXP
G5
DP5_AUXN
G6
DP0_HPD
D3
DP1_HPD
E3
DP2_HPD
D7
DP3_HPD
E7
DP4_HPD
F7
DP5_HPD
G7
DP_BLON
C6
DP_DIGON
B6
DP_VARY_BL
A6
DP_AUX_ZVSS
C1
TEST6
AD12
TEST28_H
L10
TEST28_L
M10
TEST30_H
P19
TEST30_L
R19
TEST32_H
T19
TEST32_L
N19
TEST4
P18
TEST5
R18
TEST9
M18
TEST10
N18
TEST14
F11
TEST15
G11
TEST16
H11
TEST17
J11
TEST18
F12
TEST19
G12
TEST20
J12
TEST24
H12
TEST35
AA12
TEST25_H
AE10
TEST25_L
AD10
TEST31
K22
RSVD1
Y10
RSVD2
AA10
RSVD3
Y12
RSVD4
K21
FS1R2
W10
R588
10K_0402_5%
R588
10K_0402_5%
12
T18T18
C974 .1U_0402_16V7KC974 .1U_0402_16V7K
1 2
R613 0_0402_5%
@
R613 0_0402_5%
@
1 2
R592 1K_0402_5%R592 1K_0402_5%
1 2
C973 .1U_0402_16V7KC973 .1U_0402_16V7K
1 2
T9T9
R587
10K_0402_5%
R587
10K_0402_5%
12
R536
30K_0402_1%
R536
30K_0402_1%
1 2
R558 300_0402_5%R558 300_0402_5%
1 2
T21T21
C980 .1U_0402_16V7KC980 .1U_0402_16V7K
1 2
T7T7
R557 510_0402_1%R557 510_0402_1%
1 2
C35 22P_0402_50V8JC35 22P_0402_50V8J
12
R92 1K_0402_5%@R92 1K_0402_5%@
1 2
C975 .1U_0402_16V7KC975 .1U_0402_16V7K
1 2
R616 0_0402_5%R616 0_0402_5%
1 2
R612 0_0402_5%@R612 0_0402_5%@
1 2
R609
10K_0402_5%
R609
10K_0402_5%
12
R559 300_0402_5%@R559 300_0402_5%@
1 2
R610
1K_0402_5%
R610
1K_0402_5%
1 2
C4702 22P_0402_50V8JC4702 22P_0402_50V8J
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Decoupling betwe en CPU and DIMMs
across VDDIO and VSS split
3.2A
VDD
+CPU_CORE
VDDA
+2.5VS
0.75A
VDDNB
+CPU_CORE_NB
VDDIO
+1.5V
Consumption
60A
VDDP / VDDR
+1.2VS
Power Name
5A / 3.5A
37A
+CPU_CORE Decoupling
330uF x 4 @ x1
22uF x 10
0.22uF x2
0.01uF x3
180pF x2 @ x1
VDDR Decoupling
Close JCPU1.AG10,AH8,AH9,AH10
10uF x3
0.22uF x2
1000pF x1
180pF x2
+CPU_CORE_NB Decoupling
330uF x2
22uF x2 @ x2
10uF x1
0.22uF x2
180pF x3
+1.5V / VDDIO Decoupling
330uF x1
22uF x4
4.7uF x4
0.22uF x6
180pF x1 @x1
+1.5VS
Group A
Group B
+CPU_CORE
+CPU_CORE_NB
+1.2VS
Power Sequence of APU
+1.5V
+2.5VS
VDDP Decoupling
Close JCPU1.AH3~7
22uF x1
10uF x3
0.22uF x2
1000pF @x1
180pF x2
VDDA Decoupling
47uF x1
0.22uF x1
3300pF x1
180pF x1
Comal
Pumori 2.0
P5WS5
330uF 220uF 47uF 22uF 10uF 4.7uF 0.22uF 0.01uF 3300pF 180pF1nF
7 / 2
Pop / @
7 / 2
1
1
1
1
0
19/11 7 4 17 3
Decoupling Caps.
1 1 / 1 14/2
19/11 7 35 17 1 1 / 1 13/3
13 3 8 19 3 1 4 16
Northbridge Powe r Pins
for Remote Decou pling
220uF x1
VDDIO: 3200mA
VDDR: 3500mA
VDDA: 750mA
VDDP: 5000mA
+CPU_CORE-->+APU_CORE
+CPU_CORE_NB-->+APU_CORE_NB
On power team page
On power team page
VDDNB_CAP
+APU_CORE
+APU_CORE_NB
+1.5V
+1.2VS
+APU_CORE
+APU_CORE_NB
+1.5V
+1.2VS
+APU_VDDA
+APU_VDDA
+1.2VS
+1.5V
+1.2VS
+1.5V
+1.2VS
+2.5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
AMD FS1R2 PWR / GND
Custom
9 56Monday, November 28, 2011
2011/07/08 2015/07/08
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
AMD FS1R2 PWR / GND
Custom
9 56Monday, November 28, 2011
2011/07/08 2015/07/08
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
AMD FS1R2 PWR / GND
Custom
9 56Monday, November 28, 2011
2011/07/08 2015/07/08
Compal Electronics, Inc.
C1012 22U_0805_6.3V6MC1012 22U_0805_6.3V6M
1
2
C18 47U_0805_4V6C18 47U_0805_4V6
1
2
C51 22U_0805_6.3V6MC51 22U_0805_6.3V6M
1
2
C6 10U_0603_6.3V6MC6 10U_0603_6.3V6M
1
2
C1027 0.22U_0402_10V4 ZC1027 0.22U_0402_10V4Z
1
2
C50 1000P_0402_50V7K
@
C50 1000P_0402_50V7K
@
1
2
C53 10U_0603_6.3V6MC53 10U_0603_6.3V6M
1
2
L1
FBMA-L11-201209-221LMA30T_0805
L1
FBMA-L11-201209-221LMA30T_0805
12
+
C1038220U_6.3V_M
+
C1038220U_6.3V_M
1
2
C7 10U_0603_6.3V6MC7 10U_0603_6.3V6M
1
2
C1041 0.22U_0402_10V4 ZC1041 0.22U_0402_10V4Z
1
2
C1044 180P _0402_50V8JC1044 180P _0402_50V8J
1
2
C1052 0.22U_04 02_10V4ZC1052 0.22U_0402_10V 4Z
1
2
GND
JCPU1F
LOTES_ACA-ZIF-109-P12-A_FS1R2
CONN@
GND
JCPU1F
LOTES_ACA-ZIF-109-P12-A_FS1R2
CONN@
VSS_1
J20
VSS_2
L4
VSS_3
R7
VSS_4
W18
VSS_5
A15
VSS_6
AB17
VSS_7
AC22
VSS_8
AE21
VSS_9
AF24
VSS_10
AH23
VSS_11
AH25
VSS_12
B7
VSS_13
C14
VSS_14
C16
VSS_15
C2
VSS_16
C20
VSS_17
C22
VSS_18
C24
VSS_19
C26
VSS_20
C28
VSS_21
D13
VSS_22
D15
VSS_23
D17
VSS_24
D19
VSS_25
D23
VSS_26
D25
VSS_27
D27
VSS_28
E4
VSS_29
E9
VSS_30
F14
VSS_31
F16
VSS_32
F18
VSS_33
F20
VSS_34
F22
VSS_35
F26
VSS_36
F28
VSS_37
G13
VSS_38
G15
VSS_39
G17
VSS_40
G19
VSS_41
G21
VSS_42
G23
VSS_43
G25
VSS_44
G4
VSS_45
J22
VSS_46
J24
VSS_47
J4
VSS_48
J7
VSS_49
K11
VSS_50
K14
VSS_51
K9
VSS_52
AC11
VSS_53
L19
VSS_54
L7
VSS_55
M11
VSS_56
AF11
VSS_57
V19
VSS_58
V9
VSS_59
W16
VSS_60
W4
VSS_61
W7
VSS_62
Y11
VSS_63
Y20
VSS_64
Y22
VSS_65
Y9
VSS_66
A17
VSS_67
A13
VSS_68
K16
VSS_69
F24
VSS_70
G8
VSS_71
H7
VSS_72
J8
VSS_73
A19
VSS_74
A21
VSS_75
A23
VSS_76
A25
VSS_77
A7
VSS_78
AA4
VSS_79
AA7
VSS_80
AB13
VSS_81
AB15
VSS_82
AB19
VSS_83
AB21
VSS_84
AB23
VSS_85
AB25
VSS_86
AB27
VSS_87
AB9
VSS_88
AC14
VSS_89
AC16
VSS_90
AC18
VSS_91
AC20
VSS_92
AC24
VSS_93
AC26
VSS_94
AC28
VSS_95
AC4
VSS_96
AC7
VSS_97
AD9
VSS_98
AE13
VSS_99
AE15
VSS_100
AE17
VSS_101
M9
VSS_102
N10
VSS_103
N4
VSS_104
N7
VSS_105
R10
VSS_106
R4
VSS_107
T11
VSS_108
T9
VSS_109
U10
VSS_110
U18
VSS_111
U4
VSS_112
U7
VSS_113
V11
VSS_114
AE19
VSS_115
AE23
VSS_116
AE25
VSS_117
AE27
VSS_118
AE4
VSS_119
AE7
VSS_120
AF14
VSS_121
AF16
VSS_122
AF18
VSS_123
AF20
VSS_124
AF22
VSS_125
AF26
VSS_126
AF28
VSS_127
AF9
VSS_128
AG4
VSS_129
AG7
VSS_130
AH13
VSS_131
AH15
VSS_132
AH17
VSS_133
AH19
VSS_134
AH21
VSS_135
P9
VSS_136
C18
VSS_137
D21
VSS_138
W14
VSS_139
P11
VSS_140
C7
VSS_141
E8
VSS_142
K18
VSS_143
W12
C1020 0.22U_0402_10V4 ZC1020 0.22U_0402_10V4Z
1
2
POWER
JCPU1E
LOTES_ACA-ZIF-109-P12-A_FS1R2
CONN@
POWER
JCPU1E
LOTES_ACA-ZIF-109-P12-A_FS1R2
CONN@
VDD_1
F8
VDD_2
H6
VDD_3
J1
VDD_4
J14
VDD_5
P6
VDD_6
P10
VDD_7
J16
VDD_8
J18
VDD_9
J9
VDD_10
K19
VDD_11
K3
VDD_12
K17
VDD_13
M3
VDD_14
K6
VDD_15
V10
VDD_16
V18
VDD_17
V3
VDD_18
F3
VDD_19
L18
VDD_20
V6
VDD_21
W1
VDD_22
T18
VDD_23
Y14
VDD_24
AA1
VDD_25
AB6
VDD_26
AC1
VDD_27
R1
VDD_28
P3
VDD_29
K10
VDD_30
H3
VDD_31
M19
VDDNB_1
C8
VDDNB_2
D10
VDDNB_3
B8
VDDNB_4
B12
VDDNB_5
C9
VDDNB_6
A9
VDDNB_7
A10
VDDNB_8
A8
VDDNB_9
A11
VDDNB_10
E10
VDDNB_11
E11
VDDNB_12
C10
VDDIO_1
H26
VDDIO_2
K20
VDDIO_3
J28
VDDIO_4
K23
VDDIO_5
K26
VDDIO_6
L22
VDDIO_7
L25
VDDIO_8
L28
VDDIO_9
M20
VDDIO_10
M23
VDDIO_11
M26
VDDIO_12
N22
VDDIO_13
N25
VDDIO_14
N28
VDDIO_15
P20
VDDIO_16
P23
VDDIO_17
P26
VDDIO_18
AA28
VDDP_1
AH6
VDDP_2
AH5
VDDP_3
AH4
VDDP_4
AH3
VDDP_5
AH7
VDDA
AB10
VDDR_1
AG10
VDDR_2
AH8
VDDR_3
AH9
VDDR_4
AH10
VDDIO_19
T23
VDDIO_20
T26
VDDIO_21
U22
VDDIO_22
U25
VDDIO_23
U28
VDDIO_24
Y26
VDDIO_25
T20
VDDIO_26
R28
VDDIO_27
R25
VDDIO_28
R22
VDDIO_29
V20
VDDIO_30
V23
VDDIO_31
V26
VDDIO_32
W22
VDDIO_33
W25
VDDIO_34
W28
VDDIO_35
Y24
VDDIO_36
G28
VDDNB_13
C11
VDDNB_14
C12
VDDNB_15
D9
VDDNB_16
D8
VDDNB_17
D12
VDDNB_18
D11
VDDNB_19
B11
VDDNB_20
A12
VDDNB_21
B10
VDDNB_22
E12
VDDNB_23
B9
VDDNB_CAP_1
K13
VDDNB_CAP_2
K12
VDD_32
R11
VDD_33
T10
VDD_34
H8
VDD_35
G1
VDD_36
U11
VDD_37
W11
VDD_38
W13
VDD_39
W15
VDD_40
W17
VDD_41
W19
VDD_42
AB3
VDD_43
AD3
VDD_44
AD6
VDD_45
AE1
VDD_46
L1
VDD_47
Y6
VDD_48
M6
VDD_49
N11
VDD_50
N1
VDD_51
T3
VDD_52
T6
VDD_53
U19
VDD_54
U1
VDD_55
Y16
VDD_56
Y18
VDD_57
Y3
VDD_58
D4
VDD_59
F4
VDD_60
AF6
VDD_61
AF3
VDD_62
L11
C16 4.7U_0603_6.3V6KC16 4.7U_0603_6.3V6K
1
2
C52 10U_0603_6.3V6MC52 10U_0603_6.3V6M
1
2
C1028 0.22U_0402_10V4 ZC1028 0.22U_0402_10V4Z
1
2
C15 4.7U_0603_6.3V6KC15 4.7U_0603_6.3V6K
1
2
+
C5 330U_D2_2V_Y
+
C5 330U_D2_2V_Y
1
2
C17 4.7U_0603_6.3V6KC17 4.7U_0603_6.3V6K
1
2
C8 10U_0603_6.3V6MC8 10U_0603_6.3V6M
1
2
C1024 180P_0402_50V 8JC1024 180P_0402_50V 8J
1
2
C1025 180P_0402_50V 8JC1025 180P_0402_50V 8J
1
2
C1043 180P_0402_50V 8JC1043 180P_0402_50V 8J
1
2
C1045 180P _0402_50V8JC1045 180P _0402_50V8J
1
2
C14 4.7U_0603_6.3V6KC14 4.7U_0603_6.3V6K
1
2
C1036 0.22U_0402_10V4 ZC1036 0.22U_0402_10V4Z
1
2
C1053 0.22U_04 02_10V4ZC1053 0.22U_0402_10V 4Z
1
2
C1013 22U_0805_6.3V6MC1013 22U_0805_6.3V6M
1
2
C1037 0.22U_0402_10V4 ZC1037 0.22U_0402_10V4Z
1
2
C54 10U_0603_6.3V6MC54 10U_0603_6.3V6M
1
2
C1029 180P_0402_50V 8JC1029 180P_0402_50V 8J
1
2
C1019 0.22U_0402_10V4 ZC1019 0.22U_0402_10V4Z
1
2
C1003 22U_0805_6.3V6MC1003 22U_0805_6.3V6M
1
2
C1034 180P_0402_50V 8JC1034 180P_0402_50V 8J
1
2
C1035 180P_0402_50V 8JC1035 180P_0402_50V 8J
1
2
C1030 180P_0402_50V 8JC1030 180P_0402_50V 8J
1
2
C1026 180P_0402_50V 8JC1026 180P_0402_50V 8J
1
2
C1022 0.22U_0402_10V4 ZC1022 0.22U_0402_10V4Z
1
2
C1021 0.22U_0402_10V4 ZC1021 0.22U_0402_10V4Z
1
2
C56 22U_0805_6.3V6MC56 22U_0805_6.3V6M
1
2
C1040 3300P_0402_50V 7-KC1040 3300P_0402_50V7-K
1
2
C1048 1000P _0402_50V7KC1048 1000P _0402_50V7K
1
2
C55 22U_0805_6.3V6MC55 22U_0805_6.3V6M
1
2
C1002 22U_0805_6.3V6MC1002 22U_0805_6.3V6M
1
2
C1018 0.22U_0402_10V4 ZC1018 0.22U_0402_10V4Z
1
2
C1023 0.22U_0402_10V4 ZC1023 0.22U_0402_10V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Translator and eDP HPD
CRT HPD
HPD
HPDHPD
HPD
Panel ENBKL
From Translator or Conn.
From FCH
eDP Panel ENVDD
Panel PWM
Del eDP panel control
Del VGA_ENBKL
Del reserved NMOS
Del reserved NMOS
Reserved R624
LA-8124 no use this DP_ENBKL.
DP_ENBKL ENBKL
FCH_CRT_HPD
DP0_HPD
LVDS_HPD
ENBKL 21,37
APU_PCIE_RST# 13,21,25,31,32
DP_ENBKL8
DP_INT_PWM8
APU_INVT_PWM 21
FCH_CRT_HPD26
DP0_HPD 8
DP1_HPD 8
LVDS_HPD21
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
AMD FS1R2 Singal Level Shifter
Custom
10 56Monday, November 28, 2011
2011/07/08 2015/07/08
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
AMD FS1R2 Singal Level Shifter
Custom
10 56Monday, November 28, 2011
2011/07/08 2015/07/08
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
AMD FS1R2 Singal Level Shifter
Custom
10 56Monday, November 28, 2011
2011/07/08 2015/07/08
R614
4.7K_0402_5%
R614
4.7K_0402_5%
12
R617
100K_0402_5%
R617
100K_0402_5%
1 2
R638
4.7K_0402_5%
R638
4.7K_0402_5%
12
R624 0_0402_5%@R624 0_0402_5%@
1 2
R619 2.2K_0402_5%R619 2.2K_0402_5%
1 2
R88 0_0402_5%R88 0_0402_5%
1 2
R620
100K_0402_5%
R620
100K_0402_5%
1 2
R635
47K_0402_5%
R635
47K_0402_5%
12
R636
4.7K_0402_5%
R636
4.7K_0402_5%
12
E
B
C
Q15
MMBT3904_SOT23-3
E
B
C
Q15
MMBT3904_SOT23-3
2
3 1
D16
RB751V-40_SOD323-2
@D16
RB751V-40_SOD323-2
@
2 1
G
D
S
Q20
2N7002K_SOT23-3
G
D
S
Q20
2N7002K_SOT23-3
2
13
R637
2.2K_0402_5%
R637
2.2K_0402_5%
1 2
R86 0_0402_5%R86 0_0402_5%
1 2
E
B
C
Q21
MMBT3904_SOT23-3
E
B
C
Q21
MMBT3904_SOT23-3
2
3 1
G
D
S
Q14
2N7002K_SOT23-3
G
D
S
Q14
2N7002K_SOT23-3
2
13
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
15mil
Place near DIMM1
+VREF_DQ 15mil
+VREF_CA 15mil
L
<Address: 00>
DIMM_A REV H:4mm
L
+VREF_DQ 15mil
L
+VREF_CA 15mil
L
11/14 Change net name
DDRA_SDQ36
DDRA_SDQ63
DDRA_SDQ26
DDRA_SDQS6
DDRA_SDQ2
DDRA_SDQ5
DDRA_SDQ22
DDRA_SDQ25
DDRA_SDQ35
DDRA_SMA12
DDRA_SDQ14
DDRA_SDQS0#
DDRA_SDQS4
DDRA_SDM6
DDRA_SDQ42
DDRA_CKE1
DDRA_SDQ27
DDRA_SMA15
DDRA_SDQ31
DDRA_CKE0
DDRA_SDQ12
DDRA_SDQ59
DDRA_SMA3
DDRA_SDQ6
DDRA_SCS1#
DDRA_SDQ39
DDRA_SBS1#
DDRA_SWE#
DDRA_SMA7
DDRA_SDQS0
DDRA_SMA0
DDRA_SDM2
DDRA_SDQS7
DDRA_SDM1
DDRA_SDQ57
DDRA_SDQ46
DDRA_SDQ0
DDRA_SDQ28
DDRA_SDM0
DDRA_SDQS5#
DDRA_SDQ51
DDRA_SDQ19
DDRA_SDM4
DDRA_SDQ4
DDRA_SDQ30
DDRA_SDQS2
DDRA_SDQ44
DDRA_SRAS#
DDRA_SDQ33
DDRA_SDQ58
DDRA_SDM5
DDRA_SDQS3
DDRA_SMA8
DDRA_SCS0#
DDRA_SDQ10
DDRA_SMA6
DDRA_SMA10
DDRA_SDQ3
MEM_MA_RST#
DDRA_SDQS7#
DDRA_SDQS6#
DDRA_SDQ1
DDRA_SDQ40
DDRA_SMA9
DDRA_SDQ16
DDRA_SDQ29
DDRA_SDQS4#
DDRA_SDQ52
DDRA_SDM3
DDRA_SDQS5
DDRA_SDQ54
DDRA_SDQ49
DDRA_SBS2#
DDRA_SDQ45
DDRA_SDQ9
DDRA_SDM7
DDRA_SMA1
DDRA_SDQ7
DDRA_SDQ13
DDRA_SDQ20
DDRA_SDQ60
DDRA_SBS0#
DDRA_SCAS# DDRA_ODT0
DDRA_SDQ37
DDRA_SMA5
DDRA_SDQS1#
DDRA_SMA14
DDRA_SDQ55
DDRA_SMA4
DDRA_SDQ21
DDRA_SDQ62
DDRA_SDQ24
DDRA_SDQ15
DDRA_SDQ56
DDRA_SDQ23
DDRA_SDQ53
DDRA_SDQ47
DDRA_ODT1
DDRA_SDQ18
DDRA_SDQ43
DDRA_SDQ34
DDRA_CLK1
DDRA_CLK1#
DDRA_SDQ48
DDRA_SDQS2#
DDRA_SDQ11
DDRA_SDQ38
DDRA_CLK0
DDRA_CLK0#
DDRA_SDQ32
DDRA_SDQS3#
DDRA_SMA13
DDRA_SMA11
DDRA_SDQ50
DDRA_SDQ8
DDRA_SDQS1
DDRA_SDQ61
DDRA_SMA2
DDRA_SDQ41
DDRA_SDQ17
DDRA_SDQ[0..63]
DDRA_SDM[0..7]
DDRA_SMA[0..15]
+VREF_DQA
+VREF_CA
MEM_MA_EVENT#
DDRA_CKE07
DDRA_SCS1#7
DDRA_SBS1# 7
DDRA_SWE#7
DDRA_SRAS# 7
DDRA_SCS0# 7
MEM_MA_RST# 7
DDRA_SBS2#7
DDRA_SBS0#7
DDRA_SCAS#7 DDRA_ODT0 7
DDRA_ODT1 7
DDRA_CLK1# 7
DDRA_CLK1 7
DDRA_CLK07
DDRA_CLK0#7
DDRA_CKE1 7
FCH_SDATA0 12,27,32,35
FCH_SCLK0 12,27,32,35
DDRA_SDQS3 7
DDRA_SDQS0 7
DDRA_SDQS3# 7
DDRA_SDQS0# 7
DDRA_SDQS5 7
DDRA_SDQS5# 7
DDRA_SDQS7 7
DDRA_SDQS7# 7
DDRA_SDQS1#7
DDRA_SDQS17
DDRA_SDQS2#7
DDRA_SDQS27
DDRA_SDQS4#7
DDRA_SDQS47
DDRA_SDQS6#7
DDRA_SDQS67
DDRA_SDQ[0..63] 7
DDRA_SDM[0..7] 7
DDRA_SMA[0..15] 7
MEM_MA_EVENT# 7
+0.75VS
+3VS
+1.5V +1.5V+VREF_DQA
+VREF_CA
+3VS
+1.5V+VREF_DQA
+1.5V+VREF_CA
+1.5V
+1.5V+0.75VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
DDRIII SO-DIMM 1
Custom
11 56Monday, November 28, 2011
2011/07/08 2015/07/08
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
DDRIII SO-DIMM 1
Custom
11 56Monday, November 28, 2011
2011/07/08 2015/07/08
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
DDRIII SO-DIMM 1
Custom
11 56Monday, November 28, 2011
2011/07/08 2015/07/08
Compal Electronics, Inc.
C1068
0.1U_0402_16V4Z
C1068
0.1U_0402_16V4Z
1
2
C1074
0.1U_0402_16V4Z
C1074
0.1U_0402_16V4Z
1
2
C1069
0.1U_0402_16V4Z
C1069
0.1U_0402_16V4Z
1
2
R640
1K_0402_1%
R640
1K_0402_1%
1 2
C1075
0.1U_0402_16V4Z
C1075
0.1U_0402_16V4Z
1
2
C1066
1000P_0402_50V7K
C1066
1000P_0402_50V7K
1
2
R641
1K_0402_1%
R641
1K_0402_1%
1 2
C1070
0.1U_0402_16V4Z
C1070
0.1U_0402_16V4Z
1
2
R643 10K_0402_5%R643 10K_0402_5%
1 2
C1106 0.1U_0402_16V4ZC1106 0.1U_0402_16V4Z
1 2
C1064
0.1U_0402_16V4Z
C1064
0.1U_0402_16V4Z
1
2
C1073
0.1U_0402_16V4Z
C1073
0.1U_0402_16V4Z
1
2
C1076
0.1U_0402_16V4Z
C1076
0.1U_0402_16V4Z
1
2
C1081
0.1U_0402_16V4Z
C1081
0.1U_0402_16V4Z
1
2
C1077
0.1U_0402_16V4Z
C1077
0.1U_0402_16V4Z
1
2
C1071
0.1U_0402_16V4Z
C1071
0.1U_0402_16V4Z
1
2
C1072
0.1U_0402_16V4Z
C1072
0.1U_0402_16V4Z
1
2
JDIMM1
LCN_DAN06-K4406-0102
JDIMM1
LCN_DAN06-K4406-0102
VREF_DQ
1
VSS1
2
VSS2
3
DQ4
4
DQ0
5
DQ5
6
DQ1
7
VSS3
8
VSS4
9
DQS#0
10
DM0
11
DQS0
12
VSS5
13
VSS6
14
DQ2
15
DQ6
16
DQ3
17
DQ7
18
VSS7
19
VSS8
20
DQ8
21
DQ12
22
DQ9
23
DQ13
24
VSS9
25
VSS10
26
DQS#1
27
DM1
28
DQS1
29
RESET#
30
VSS11
31
VSS12
32
DQ10
33
DQ14
34
DQ11
35
DQ15
36
VSS13
37
VSS14
38
DQ16
39
DQ20
40
DQ17
41
DQ21
42
VSS15
43
VSS16
44
DQS#2
45
DM2
46
DQS2
47
VSS17
48
VSS18
49
DQ22
50
DQ18
51
DQ23
52
DQ19
53
VSS19
54
VSS20
55
DQ28
56
DQ24
57
DQ29
58
DQ25
59
VSS21
60
VSS22
61
DQS#3
62
DM3
63
DQS3
64
VSS23
65
VSS24
66
DQ26
67
DQ30
68
DQ27
69
DQ31
70
VSS25
71
VSS26
72
A12/BC#
83
A11
84
A9
85
A7
86
VDD5
87
VDD6
88
A8
89
A6
90
CKE0
73
CKE1
74
VDD1
75
VDD2
76
NC1
77
A15
78
BA2
79
A14
80
VDD3
81
VDD4
82
A5
91
A4
92
VDD7
93
VDD8
94
A3
95
A2
96
A1
97
A0
98
VDD9
99
VDD10
100
CK0
101
CK1
102
CK0#
103
CK1#
104
VDD11
105
VDD12
106
A10/AP
107
BA1
108
BA0
109
RAS#
110
VDD13
111
VDD14
112
WE#
113
S0#
114
CAS#
115
ODT0
116
VDD15
117
VDD16
118
A13
119
ODT1
120
S1#
121
NC2
122
VDD17
123
VDD18
124
NCTEST
125
VREF_CA
126
VSS27
127
VSS28
128
DQ32
129
DQ36
130
DQ33
131
DQ37
132
VSS29
133
VSS30
134
DQS#4
135
DM4
136
DQS4
137
VSS31
138
VSS32
139
DQ38
140
DQ34
141
DQ39
142
DQ35
143
VSS33
144
VSS34
145
DQ44
146
DQ40
147
DQ45
148
DQ41
149
VSS35
150
VSS36
151
DQS#5
152
DM5
153
DQS5
154
VSS37
155
VSS38
156
DQ42
157
DQ46
158
DQ43
159
DQ47
160
VSS39
161
VSS40
162
DQ48
163
DQ52
164
DQ49
165
DQ53
166
VSS41
167
VSS42
168
DQS#6
169
DM6
170
DQS6
171
VSS43
172
VSS44
173
DQ54
174
DQ50
175
DQ55
176
DQ51
177
VSS45
178
VSS46
179
DQ60
180
DQ56
181
DQ61
182
DQ57
183
VSS47
184
VSS48
185
DQS#7
186
DM7
187
DQS7
188
VSS49
189
VSS50
190
DQ58
191
DQ62
192
DQ59
193
DQ63
194
VSS51
195
VSS52
196
SA0
197
EVENT#
198
VDDSPD
199
SDA
200
SA1
201
SCL
202
VTT1
203
VTT2
204
G1
205
G2
206
C1079
4.7U_0603_6.3V6K
C1079
4.7U_0603_6.3V6K
1
2
C1078
0.1U_0402_16V4Z
C1078
0.1U_0402_16V4Z
1
2
R639
1K_0402_1%
R639
1K_0402_1%
1 2
C1065
1000P_0402_50V7K
C1065
1000P_0402_50V7K
1
2
C1062
1000P_0402_50V7K
C1062
1000P_0402_50V7K
1
2
C1061
0.1U_0402_16V4Z
C1061
0.1U_0402_16V4Z
1
2
C1080
2.2U_0603_6.3V4Z
C1080
2.2U_0603_6.3V4Z
1
2
C1060
4.7U_0603_6.3V6K
@
C1060
4.7U_0603_6.3V6K
@
1
2
C1067
0.1U_0402_16V4Z
C1067
0.1U_0402_16V4Z
1
2
R642
1K_0402_1%
R642
1K_0402_1%
1 2
C1063
4.7U_0603_6.3V6K
@
C1063
4.7U_0603_6.3V6K
@
1
2
R645
10K_0402_5%
R645
10K_0402_5%
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DIMM_B REV H:8mm
<Address: 01>
15mil
Place near DIMM2
Change To D2 Typ e 20110905
+VREF_DQ 15mil
L
+VREF_CA 15mil
L
+VREF_DQ 15mil
L
+VREF_CA 15mil
L
11/14 Change net name11/14 Change net name
DDRB_SDQS6
DDRB_SDQ26
DDRB_SDQ63
DDRB_SDQ36
DDRB_SDQ35
DDRB_SDQ25
DDRB_SDQ22
DDRB_SDQ5
DDRB_SDQ2
DDRB_SDQS0#
DDRB_SDQ14
DDRB_SMA12
DDRB_CKE1
DDRB_SDQ42
DDRB_SDM6
DDRB_SDQS4
DDRB_SMA15
DDRB_SDQ27
DDRB_SDQ12
DDRB_CKE0
DDRB_SDQ31
DDRB_SMA3
DDRB_SDQ59
DDRB_SBS1#
DDRB_SDQ39
DDRB_SCS1#
DDRB_SDQ6
DDRB_SDQS0
DDRB_SMA7
DDRB_SWE#
DDRB_SMA0
DDRB_SDM2
DDRB_SDQ0
DDRB_SDQ46
DDRB_SDQ57
DDRB_SDM1
DDRB_SDQS7
DDRB_SDM0
DDRB_SDQ28
DDRB_SDM4
DDRB_SDQ19
DDRB_SDQ51
DDRB_SDQS5#
DDRB_SDQS2
DDRB_SDQ30
DDRB_SDQ4
DDRB_SDQ33
DDRB_SRAS#
DDRB_SDQ44
DDRB_SDQS3
DDRB_SDM5
DDRB_SDQ58
DDRB_SMA8
DDRB_SCS0#
DDRB_SMA10
DDRB_SMA6
DDRB_SDQ10
DDRB_SDQS6#
DDRB_SDQS7#
MEM_MB_RST#
DDRB_SDQ3
DDRB_SDQ16
DDRB_SMA9
DDRB_SDQ1
DDRB_SDQS4#
DDRB_SDQ29
DDRB_SDQ49
DDRB_SDQ54
DDRB_SDQS5
DDRB_SDM3
DDRB_SDQ9
DDRB_SDQ45
DDRB_SBS2#
DDRB_SDQ20
DDRB_SDQ13
DDRB_SDQ7
DDRB_SMA1
DDRB_SDM7
DDRB_SBS0#
DDRB_SDQ60
DDRB_SDQ37
DDRB_ODT0DDRB_SCAS#
DDRB_SDQ55
DDRB_SMA14
DDRB_SDQS1#
DDRB_SMA5
DDRB_SDQ21
DDRB_SMA4
DDRB_SDQ62
DDRB_SDQ15
DDRB_SDQ24
DDRB_SDQ47
DDRB_SDQ53
DDRB_SDQ23
DDRB_SDQ56
DDRB_SDQ43
DDRB_SDQ18
DDRB_ODT1
DDRB_CLK1#
DDRB_CLK1
DDRB_SDQ34
DDRB_SDQS2#
DDRB_SDQ48
DDRB_CLK0#
DDRB_CLK0
DDRB_SDQ11
DDRB_SDQ50
DDRB_SMA11
DDRB_SMA13
DDRB_SDQS3#
DDRB_SDQ32
DDRB_SMA2
DDRB_SDQ61
DDRB_SDQS1
DDRB_SDQ8
DDRB_SDQ17
DDRB_SDQ41
DDRB_SDQ40
DDRB_SDQ38
DDRB_SDQ52
+VREF_DQB +VREF_CB
DDRB_SDQ[0..63]
DDRB_SDM[0..7]
DDRB_SMA[0..15]
MEM_MB_EVENT#
DDRB_SCS1#7
DDRB_CKE07
DDRB_SCS0# 7
DDRB_SRAS# 7
DDRB_SWE#7
DDRB_SBS1# 7
DDRB_SCAS#7
DDRB_SBS0#7
DDRB_SBS2#7
MEM_MB_RST# 7
DDRB_CLK1 7
DDRB_CLK1# 7
DDRB_ODT1 7
DDRB_ODT0 7
DDRB_CKE1 7
DDRB_CLK0#7
DDRB_CLK07
DDRB_SDQS27
DDRB_SDQS2#7
DDRB_SDQS47
DDRB_SDQS4#7
DDRB_SDQS67
DDRB_SDQS6#7
DDRB_SDQS0# 7
DDRB_SDQS0 7
DDRB_SDQS3# 7
DDRB_SDQS3 7
DDRB_SDQS5 7
DDRB_SDQS5# 7
DDRB_SDQS7 7
DDRB_SDQS7# 7
FCH_SDATA0 11,27,32,35
FCH_SCLK0 11,27,32,35
DDRB_SDQS1#7
DDRB_SDQS17
DDRB_SDQ[0..63] 7
DDRB_SDM[0..7] 7
DDRB_SMA[0..15] 7
MEM_MB_EVENT# 7
+0.75VS
+1.5V+1.5V
+3VS
+VREF_DQB
+VREF_CB
+VREF_DQB +VREF_CB
+1.5V+1.5V
+1.5V
+0.75VS
+1.5V+1.5V
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
DDRIII SO-DIMM 2
Custom
12 56Monday, November 28, 2011
2011/07/08 2015/07/08
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
DDRIII SO-DIMM 2
Custom
12 56Monday, November 28, 2011
2011/07/08 2015/07/08
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
DDRIII SO-DIMM 2
Custom
12 56Monday, November 28, 2011
2011/07/08 2015/07/08
Compal Electronics, Inc.
C1097
0.1U_0402_16V4Z
C1097
0.1U_0402_16V4Z
1
2
R649
1K_0402_1%
R649
1K_0402_1%
1 2
C1092
0.1U_0402_16V4Z
C1092
0.1U_0402_16V4Z
1
2
C1098
0.1U_0402_16V4Z
C1098
0.1U_0402_16V4Z
1
2
R650
1K_0402_1%
R650
1K_0402_1%
1 2
C1088
1000P_0402_50V7K
C1088
1000P_0402_50V7K
1
2
C1087
1000P_0402_50V7K
C1087
1000P_0402_50V7K
1
2
+
C9
330U_D2_2V_Y
@
+
C9
330U_D2_2V_Y
@
1
2
C1086
0.1U_0402_16V4Z
C1086
0.1U_0402_16V4Z
1
2
C1093
0.1U_0402_16V4Z
C1093
0.1U_0402_16V4Z
1
2
R644
1K_0402_1%
R644
1K_0402_1%
1 2
C1089
0.1U_0402_16V4Z
C1089
0.1U_0402_16V4Z
1
2
C1083
0.1U_0402_16V4Z
C1083
0.1U_0402_16V4Z
1
2
R647
1K_0402_1%
R647
1K_0402_1%
1 2
C1096
0.1U_0402_16V4Z
C1096
0.1U_0402_16V4Z
1
2
C1099
0.1U_0402_16V4Z
C1099
0.1U_0402_16V4Z
1
2
JDIMM2
LCN_DAN06-K4406-0102
JDIMM2
LCN_DAN06-K4406-0102
VREF_DQ
1
VSS1
2
VSS2
3
DQ4
4
DQ0
5
DQ5
6
DQ1
7
VSS3
8
VSS4
9
DQS#0
10
DM0
11
DQS0
12
VSS5
13
VSS6
14
DQ2
15
DQ6
16
DQ3
17
DQ7
18
VSS7
19
VSS8
20
DQ8
21
DQ12
22
DQ9
23
DQ13
24
VSS9
25
VSS10
26
DQS#1
27
DM1
28
DQS1
29
RESET#
30
VSS11
31
VSS12
32
DQ10
33
DQ14
34
DQ11
35
DQ15
36
VSS13
37
VSS14
38
DQ16
39
DQ20
40
DQ17
41
DQ21
42
VSS15
43
VSS16
44
DQS#2
45
DM2
46
DQS2
47
VSS17
48
VSS18
49
DQ22
50
DQ18
51
DQ23
52
DQ19
53
VSS19
54
VSS20
55
DQ28
56
DQ24
57
DQ29
58
DQ25
59
VSS21
60
VSS22
61
DQS#3
62
DM3
63
DQS3
64
VSS23
65
VSS24
66
DQ26
67
DQ30
68
DQ27
69
DQ31
70
VSS25
71
VSS26
72
A12/BC#
83
A11
84
A9
85
A7
86
VDD5
87
VDD6
88
A8
89
A6
90
CKE0
73
CKE1
74
VDD1
75
VDD2
76
NC1
77
A15
78
BA2
79
A14
80
VDD3
81
VDD4
82
A5
91
A4
92
VDD7
93
VDD8
94
A3
95
A2
96
A1
97
A0
98
VDD9
99
VDD10
100
CK0
101
CK1
102
CK0#
103
CK1#
104
VDD11
105
VDD12
106
A10/AP
107
BA1
108
BA0
109
RAS#
110
VDD13
111
VDD14
112
WE#
113
S0#
114
CAS#
115
ODT0
116
VDD15
117
VDD16
118
A13
119
ODT1
120
S1#
121
NC2
122
VDD17
123
VDD18
124
NCTEST
125
VREF_CA
126
VSS27
127
VSS28
128
DQ32
129
DQ36
130
DQ33
131
DQ37
132
VSS29
133
VSS30
134
DQS#4
135
DM4
136
DQS4
137
VSS31
138
VSS32
139
DQ38
140
DQ34
141
DQ39
142
DQ35
143
VSS33
144
VSS34
145
DQ44
146
DQ40
147
DQ45
148
DQ41
149
VSS35
150
VSS36
151
DQS#5
152
DM5
153
DQS5
154
VSS37
155
VSS38
156
DQ42
157
DQ46
158
DQ43
159
DQ47
160
VSS39
161
VSS40
162
DQ48
163
DQ52
164
DQ49
165
DQ53
166
VSS41
167
VSS42
168
DQS#6
169
DM6
170
DQS6
171
VSS43
172
VSS44
173
DQ54
174
DQ50
175
DQ55
176
DQ51
177
VSS45
178
VSS46
179
DQ60
180
DQ56
181
DQ61
182
DQ57
183
VSS47
184
VSS48
185
DQS#7
186
DM7
187
DQS7
188
VSS49
189
VSS50
190
DQ58
191
DQ62
192
DQ59
193
DQ63
194
VSS51
195
VSS52
196
SA0
197
EVENT#
198
VDDSPD
199
SDA
200
SA1
201
SCL
202
VTT1
203
VTT2
204
G1
205
G2
206
C1090
0.1U_0402_16V4Z
C1090
0.1U_0402_16V4Z
1
2
R648
10K_0402_5%
R648
10K_0402_5%
12
R646 10K_0402_5%R646 10K_0402_5%
1 2
C1094
0.1U_0402_16V4Z
C1094
0.1U_0402_16V4Z
1
2
C1107 0.1U_0402_16V4ZC1107 0.1U_0402_16V4Z
1 2
C1082
4.7U_0603_6.3V6K
C1082
4.7U_0603_6.3V6K
1
2
C1095
0.1U_0402_16V4Z
C1095
0.1U_0402_16V4Z
1
2
C1101
4.7U_0603_6.3V6K
C1101
4.7U_0603_6.3V6K
1
2
C1085
4.7U_0603_6.3V6K
C1085
4.7U_0603_6.3V6K
1
2
C1100
0.1U_0402_16V4Z
C1100
0.1U_0402_16V4Z
1
2
C1084
1000P_0402_50V7K
C1084
1000P_0402_50V7K
1
2
C1091
0.1U_0402_16V4Z
C1091
0.1U_0402_16V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.0VGS-->+0.935VGS
For Chelsea non staff
For Chelsea only
LVDS Interface
75mA
125mA
route 50ohms single-ended/100o hms diff
and keep short
Debug only, for clock observat ion, if not needed, DNI
5mil 5mil
PCIE_GTX_C_FRX_P2
PCIE_GTX_C_FRX_N2
PCIE_GTX_C_FRX_P3
PCIE_GTX_C_FRX_N3
PCIE_GTX_FRX_P1
PCIE_GTX_FRX_N1
PCIE_GTX_FRX_P2
PCIE_GTX_FRX_N2
PCIE_GTX_FRX_P3
PCIE_GTX_FRX_N3
PCIE_GTX_FRX_P4
PCIE_GTX_FRX_N4
PCIE_GTX_FRX_P5
PCIE_GTX_FRX_N5
PCIE_GTX_FRX_P6
PCIE_GTX_FRX_N6
PCIE_GTX_FRX_P7
PCIE_GTX_FRX_N7
PCIE_GTX_FRX_P8
PCIE_GTX_FRX_N8
PCIE_GTX_FRX_P9
PCIE_GTX_FRX_N9
PCIE_GTX_FRX_P10
PCIE_GTX_FRX_N10
PCIE_GTX_FRX_P11
PCIE_GTX_C_FRX_P0
PCIE_GTX_C_FRX_N0
PCIE_GTX_C_FRX_P1
PCIE_GTX_C_FRX_N1
PCIE_GTX_C_FRX_P4
PCIE_GTX_C_FRX_N4
PCIE_GTX_C_FRX_P5
PCIE_GTX_C_FRX_N5
PCIE_GTX_C_FRX_P6
PCIE_GTX_C_FRX_N6
PCIE_GTX_C_FRX_P7
PCIE_GTX_C_FRX_N7
PCIE_GTX_C_FRX_P8
PCIE_GTX_C_FRX_N8
PCIE_GTX_C_FRX_P9
PCIE_GTX_C_FRX_N9
PCIE_GTX_C_FRX_P10
PCIE_GTX_C_FRX_N10
PCIE_GTX_C_FRX_P11
PCIE_GTX_C_FRX_N11
PCIE_GTX_C_FRX_P12
PCIE_GTX_C_FRX_N12
PCIE_GTX_C_FRX_P13
PCIE_GTX_C_FRX_N13
PCIE_GTX_C_FRX_P14
PCIE_GTX_C_FRX_N14
PCIE_GTX_C_FRX_P15
PCIE_GTX_FRX_N11
PCIE_GTX_FRX_P12
PCIE_GTX_C_FRX_N15
PCIE_GTX_FRX_N12
PCIE_GTX_FRX_P13
PCIE_GTX_FRX_N13
PCIE_GTX_FRX_P14
PCIE_GTX_FRX_N14
PCIE_GTX_FRX_P15
PCIE_GTX_FRX_N15
PCIE_GTX_FRX_N0
PCIE_GTX_FRX_P0
GPU_RST#
PCIE_FTX_C_GRX_P0
PCIE_FTX_C_GRX_N0
PCIE_FTX_C_GRX_P1
PCIE_FTX_C_GRX_P2
PCIE_FTX_C_GRX_P3
PCIE_FTX_C_GRX_P4
PCIE_FTX_C_GRX_P5
PCIE_FTX_C_GRX_P6
PCIE_FTX_C_GRX_P7
PCIE_FTX_C_GRX_P8
PCIE_FTX_C_GRX_P9
PCIE_FTX_C_GRX_P10
PCIE_FTX_C_GRX_P11
PCIE_FTX_C_GRX_P12
PCIE_FTX_C_GRX_P13
PCIE_FTX_C_GRX_P14
PCIE_FTX_C_GRX_P15
PCIE_FTX_C_GRX_N1
PCIE_FTX_C_GRX_N2
PCIE_FTX_C_GRX_N3
PCIE_FTX_C_GRX_N4
PCIE_FTX_C_GRX_N5
PCIE_FTX_C_GRX_N6
PCIE_FTX_C_GRX_N7
PCIE_FTX_C_GRX_N8
PCIE_FTX_C_GRX_N9
PCIE_FTX_C_GRX_N10
PCIE_FTX_C_GRX_N11
PCIE_FTX_C_GRX_N12
PCIE_FTX_C_GRX_N13
PCIE_FTX_C_GRX_N14
PCIE_FTX_C_GRX_N15
GPU_RST#
PCIE_FTX_C_GRX_P[15..0]
PCIE_FTX_C_GRX_N[15..0]
PCIE_GTX_C_FRX_P[0..15]
PCIE_GTX_C_FRX_N[0..15]
XTALOUT
XTALIN
+DPLL_PVDD
+DPLL_PVDD
+DPLL_VDDC
+DPLL_VDDC
+MPV18
+SPV18
+MPV18
+SPV18
+SPV10
+SPV10
+DPLL_PVDD
XTALOUT XTALIN
APU_PCIE_RST#10,21,25,31,32
PX_GPU_RST#25,27
CLK_PEG_VGA25
CLK_PEG_VGA#25
PCIE_FTX_C_GRX_P[15..0]6
PCIE_FTX_C_GRX_N[15..0]6
PCIE_GTX_C_FRX_N[0..15] 6
PCIE_GTX_C_FRX_P[0..15] 6
+0.935VGS
+0.935VGS
+3VGS
+1.8VGS
+0.935VGS
+1.8VGS
+1.8VGS
+0.935VGS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
Issued Date
Deciphered Date
0.1
ATI_SeymourXT_M2_PCIE/LVDS
C
13 56Monday, November 28, 2011
2011/06/30 2013/06/30
Compal Electronics, Inc.
QCL51 LA-8712P
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
Issued Date
Deciphered Date
0.1
ATI_SeymourXT_M2_PCIE/LVDS
C
13 56Monday, November 28, 2011
2011/06/30 2013/06/30
Compal Electronics, Inc.
QCL51 LA-8712P
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
Issued Date
Deciphered Date
0.1
ATI_SeymourXT_M2_PCIE/LVDS
C
13 56Monday, November 28, 2011
2011/06/30 2013/06/30
Compal Electronics, Inc.
QCL51 LA-8712P
CV22.1U_0402_16V7K PX@CV22.1U_0402_16V7K PX@
12
CV153
1U_0402_6.3V6K
PX@ CV153
1U_0402_6.3V6K
PX@
1
2
CV12.1U_0402_16V7K PX@CV12.1U_0402_16V7K PX@
12
LV10
BLM15BD121SN1D_0402
PX@LV10
BLM15BD121SN1D_0402
PX@
1 2
CV152
10U_0603_6.3V6M
PX@ CV152
10U_0603_6.3V6M
PX@
1
2
LV11
MCK1608471YZF 0603
PX@LV11
MCK1608471YZF 0603
PX@
1 2
CV3.1U_0402_16V7K PX@CV3.1U_0402_16V7K PX@
12
RV141 0_0402_5%@ RV141 0_0402_5%@
12
CV149
10U_0603_6.3V6M
PX@ CV149
10U_0603_6.3V6M
PX@
1
2
CV7.1U_0402_16V7K PX@CV7.1U_0402_16V7K PX@
12
CV18.1U_0402_16V7K PX@CV18.1U_0402_16V7K PX@
12
RV70
@
51.1_0402_1%
RV70
@
51.1_0402_1%
12
RV144
0_0402_5%
RV144
0_0402_5%
1 2
LV9
MCK1608471YZF 0603
PX@LV9
MCK1608471YZF 0603
PX@
1 2
CV2.1U_0402_16V7K PX@CV2.1U_0402_16V7K PX@
12
CV151
0.1U_0402_16V7K
PX@ CV151
0.1U_0402_16V7K
PX@
1
2
CV10.1U_0402_16V7K PX@CV10.1U_0402_16V7K PX@
12
YV2
27MHZ_16PF_X5H027000FG1H
PX@YV2
27MHZ_16PF_X5H027000FG1H
PX@
2 1
CV42
0.1U_0402_16V7K
PX@ CV42
0.1U_0402_16V7K
PX@
1
2
CV166
10U_0603_6.3V6M
PX@ CV166
10U_0603_6.3V6M
PX@
1
2
CV26.1U_0402_16V7K PX@CV26.1U_0402_16V7K PX@
12
RV148 0_0402_5%@ RV148 0_0402_5%@
12
CV50
18P_0402_50V8J
PX@CV50
18P_0402_50V8J
PX@
CV154
0.1U_0402_16V7K
PX@ CV154
0.1U_0402_16V7K
PX@
1
2
RV31.27K_0402_1% @ RV31.27K_0402_1% @
1 2
CV170
@
0.1U_0402_16V7K
CV170
@
0.1U_0402_16V7K
12
CV4.1U_0402_16V7K PX@CV4.1U_0402_16V7K PX@
12
CV29.1U_0402_16V7K PX@CV29.1U_0402_16V7K PX@
12
RV28
1M_0402_5%
PX@
RV28
1M_0402_5%
PX@
CV31.1U_0402_16V7K PX@CV31.1U_0402_16V7K PX@
12
CV28.1U_0402_16V7K PX@CV28.1U_0402_16V7K PX@
12
CV17.1U_0402_16V7K PX@CV17.1U_0402_16V7K PX@
12
PART 7 0F 9
LVDS CONTROL
LVTMDP
2160834000A10CHELSE_FCBGA962
UVG1G
PART 7 0F 9
LVDS CONTROL
LVTMDP
2160834000A10CHELSE_FCBGA962
UVG1G
AP37
TXOUT_L3N
AN36
TXOUT_L3P
AR35
TXOUT_L2N_DPE0N
AP35
TXOUT_L2P_DPE0P
AU39
TXOUT_L1N_DPE1N
AR37
TXOUT_L1P_DPE1P
AU35
TXOUT_L0N_DPE2N
AW37
TXOUT_L0P_DPE2P
AR34
TXCLK_LN_DPE3N
AP34
TXCLK_LP_DPE3P
AG36
TXOUT_U3N
AF35
TXOUT_U3P
AH37
TXOUT_U2N_DPF0N
AG38
TXOUT_U2P_DPF0P
AJ36
TXOUT_U1N_DPF1N
AH35
TXOUT_U1P_DPF1P
AK37
TXOUT_U0N_DPF2N
AJ38
TXOUT_U0P_DPF2P
AL36
TXCLK_UN_DPF3N
AK35
TXCLK_UP_DPF3P
AJ27
DIGON
AK27
VARY_BL
CV49
18P_0402_50V8J
PX@ CV49
18P_0402_50V8J
PX@
CV15.1U_0402_16V7K PX@CV15.1U_0402_16V7K PX@
12
CV6.1U_0402_16V7K PX@CV6.1U_0402_16V7K PX@
12
CV171
@
0.1U_0402_16V7K
CV171
@
0.1U_0402_16V7K
12
CV27.1U_0402_16V7K PX@CV27.1U_0402_16V7K PX@
12
RV51K_0402_5% PX@RV51K_0402_5% PX@
1 2
CV32.1U_0402_16V7K PX@CV32.1U_0402_16V7K PX@
12
CV44
1U_0402_6.3V6K
PX@ CV44
1U_0402_6.3V6K
PX@
1
2
CV13.1U_0402_16V7K PX@CV13.1U_0402_16V7K PX@
12
RV69
@
51.1_0402_1%
RV69
@
51.1_0402_1%
12
RV146
0_0402_5%
@RV146
0_0402_5%
@
12
CV1.1U_0402_16V7K PX@CV1.1U_0402_16V7K PX@
12
CV20.1U_0402_16V7K PX@CV20.1U_0402_16V7K PX@
12
CV14.1U_0402_16V7K PX@CV14.1U_0402_16V7K PX@
12
PART 1 0F 9
CALIBRATION
CLOCK
PCI EXPRESS INTERFACE
2160834000A10CHELSE_FCBGA962
UVG1A
PART 1 0F 9
CALIBRATION
CLOCK
PCI EXPRESS INTERFACE
2160834000A10CHELSE_FCBGA962
UVG1A
AA30
PERSTB
AH16
TEST_PG
AA36
PCIE_REFCLKN
AB35
PCIE_REFCLKP
E37
PCIE_RX15N
F35
PCIE_RX15P
F37
PCIE_RX14N
G38
PCIE_RX14P
G36
PCIE_RX13N
H35
PCIE_RX13P
H37
PCIE_RX12N
J38
PCIE_RX12P
J36
PCIE_RX11N
K35
PCIE_RX11P
K37
PCIE_RX10N
L38
PCIE_RX10P
L36
PCIE_RX9N
M35
PCIE_RX9P
M37
PCIE_RX8N
N38
PCIE_RX8P
N36
PCIE_RX7N
P35
PCIE_RX7P
P37
PCIE_RX6N
R38
PCIE_RX6P
R36
PCIE_RX5N
T35
PCIE_RX5P
T37
PCIE_RX4N
U38
PCIE_RX4P
U36
PCIE_RX3N
V35
PCIE_RX3P
V37
PCIE_RX2N
W38
PCIE_RX2P
W36
PCIE_RX1N
Y35
PCIE_RX1P
Y37
PCIE_RX0N
AA38
PCIE_RX0P
Y29
PCIE_CALR_RX
Y30
PCIE_CALR_TX
H32
PCIE_TX15N
H33
PCIE_TX15P
K29
PCIE_TX14N
K30
PCIE_TX14P
J32
PCIE_TX13N
J33
PCIE_TX13P
K32
PCIE_TX12N
K33
PCIE_TX12P
L29
PCIE_TX11N
L30
PCIE_TX11P
L32
PCIE_TX10N
L33
PCIE_TX10P
N29
PCIE_TX9N
N30
PCIE_TX9P
N32
PCIE_TX8N
N33
PCIE_TX8P
P29
PCIE_TX7N
P30
PCIE_TX7P
P32
PCIE_TX6N
P33
PCIE_TX6P
T29
PCIE_TX5N
T30
PCIE_TX5P
T32
PCIE_TX4N
T33
PCIE_TX4P
U29
PCIE_TX3N
U30
PCIE_TX3P
U32
PCIE_TX2N
U33
PCIE_TX2P
W32
PCIE_TX1N
W33
PCIE_TX1P
Y32
PCIE_TX0N
Y33
PCIE_TX0P
CV40
10U_0603_6.3V6M
PX@ CV40
10U_0603_6.3V6M
PX@
1
2
CV168
1U_0402_6.3V6K
PX@ CV168
1U_0402_6.3V6K
PX@
1
2
CV43
10U_0603_6.3V6M
PX@ CV43
10U_0603_6.3V6M
PX@
1
2
RV147
0_0402_5%
@RV147
0_0402_5%
@
12
CV169
0.1U_0402_16V7K
PX@ CV169
0.1U_0402_16V7K
PX@
1
2
CV24.1U_0402_16V7K PX@CV24.1U_0402_16V7K PX@
12
CV8.1U_0402_16V7K PX@CV8.1U_0402_16V7K PX@
12
CV9.1U_0402_16V7K PX@CV9.1U_0402_16V7K PX@
12
CV25.1U_0402_16V7K PX@CV25.1U_0402_16V7K PX@
12
CV23.1U_0402_16V7K PX@CV23.1U_0402_16V7K PX@
12
RV143
0_0402_5%
RV143
0_0402_5%
1 2
CV30.1U_0402_16V7K PX@CV30.1U_0402_16V7K PX@
12
CV5.1U_0402_16V7K PX@CV5.1U_0402_16V7K PX@
12
CV19.1U_0402_16V7K PX@CV19.1U_0402_16V7K PX@
12
CV16.1U_0402_16V7K PX@CV16.1U_0402_16V7K PX@
12
RV4
1K_0402_5%
PX@
RV4
1K_0402_5%
PX@
12
CV41
1U_0402_6.3V6K
PX@ CV41
1U_0402_6.3V6K
PX@
1
2
PART 9 0F 9
PLLS/XTAL
2160834000A10CHELSE_FCBGA962
UVG1I
PART 9 0F 9
PLLS/XTAL
2160834000A10CHELSE_FCBGA962
UVG1I
AF31
NC_XTAL_PVSS
AF30
NC_XTAL_PVDD
AN10
SPLL_PVSS
AN9
SPLL_VDDC
AM10
SPLL_PVDD
H8
MPLL_PVDD
H7
MPLL_PVDD
AN32
DPLL_PVSS
AN31
DPLL_VDDC
AM32
DPLL_PVDD
AL10
CLKTESTB
AK10
CLKTESTA
AW35
XO_IN2
AW34
XO_IN
AU34
XTALOUT
AV33
XTALIN
CV11.1U_0402_16V7K PX@CV11.1U_0402_16V7K PX@
12
CV45
0.1U_0402_16V7K
PX@ CV45
0.1U_0402_16V7K
PX@
1
2
RV6
100K_0402_5%
PX@
RV6
100K_0402_5%
PX@
12
RV291.69K_0402_1%
PX@
RV291.69K_0402_1%
PX@
1 2
RV1 0_0402_5%@RV1 0_0402_5%@
12
CV150
1U_0402_6.3V6K
PX@ CV150
1U_0402_6.3V6K
PX@
1
2
UV1
MC74VHC1G08DFT2G SC70 5P
PX@
UV1
MC74VHC1G08DFT2G SC70 5P
PX@
B
2
A
1
Y
4
P
5
G
3
CV21.1U_0402_16V7K PX@CV21.1U_0402_16V7K PX@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AUD[1] AUD[0]
0 0 No audio function
0 1 Audio for DisplayPort and HDMI if dongle is detected
1 0 Audio for DisplayPort only
1 1 Audio for both DisplayPort and HDMI
HSYNCAUD[1]
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE
GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET
ENABLE EXTERNAL BIOS ROM
GPIO0TX_PWRS_ENB
GPIO1TX_DEEMPH_EN PCIE T RANSMITTER DE-EMPHASIS
GPIO9 VGA ENABLEDBIF_VGA DIS
VIP_DEVICE_STRAP_ENA V2SYNC IGNORE VIP DEVICE STRAPS
GPIO_22_ROMCSB
GPIO2
STRAPS
Advertises PCIE speed when compliance test
DESCRIPTION OF DEFAULT SETT INGS <all internal PD>PIN
GPIO[13:11]ROMIDCFG(2:0)
RECOMMENDED
SETTINGS
RSVD
SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT
CONFIGURATION STRAPS
BIOS_ROM_EN
VSYNCAUD[0]
H2SYNC
GPIO8
GPIO21
GENERICC
X
X
0
0
0
0
11
X
XXX
0
0
0
H2SYNC GENERICC
AMD RESERVED CONFIGURATION STRAPS
ALLOW FOR PULLUP PADS FOR THESE STRAPS BUT DO NOT INSTALL
RESISTOR. IF THESE GPIOS ARE USED, THEY MUST KEEP "LOW" AND
NOT CONFLICT DURING RESET
RECOMMEN DED SETTINGS
0= DO N OT INSTALL RESISTOR
1 = I NSTALL 10K RESISTOR
X = DESIGN DEPENDANT
NA = NOT APPLICABLE
GPIO21 GPIO2
GPIO8
RSVD
Internal use only.This Pad has an internal PD and Must be 0V at reset.
The pad may be left unconnected.
RSVD
RSVD
RSVD
TX_PWRS_ENB GPIO0
Transmitter Power Saving Enable
0: 50% Tx output swing for mobile mode
1: full Tx output swing (Default setting for Desktop)
GPIO1TX_DEEMPH_EN
PCI Express Transmitter De-emphasis Enable
0: Tx de-emphasis diabled for mobile mode
1: Tx de-emphasis enabled (Defailt setting for desktop)
Internal VGA Thermal Sensor
0: 50% swing
1: Full swing
0: disable
1: enable
0: disable
1: enable
0: 2.5GT/s
1: 5GT/s
Use Internal Thermal Sensor
External VGA Thermal Sensor: No stuff
PCIE TRANSMITTER Power Saving Enable
GPIO13,12,11(config 2,1,0): internal PD.
a)If BIOS_ROM_EN=1,the config[2:0] defines the ROM type.
b)If BIOS_ROM_EN=0,the config[2:0] defines the primary aperture size.
Memory apertures
config[3:0]
128MB 000
256MB 001
64MB 010
R1.0
STRAPS
Update net name
RV9 SMT-->@
Base on AMD Check list
GPIO_23_CLKREQB should be reserve
VRAM ID
(1.8V@20mA TSVDD)
(1.8V@100mA VDD1DI)
(
1.8V@65mA AVDD)
For Chelsea non staff
11/15 AMD suggest
11/16 add
VGA_SMB_DA2
VGA_SMB_CK2
VGA_SMB_CK2
VGA_SMB_DA2
THERM_D-
THERM_D+
GPU_GPIO5
GPU_GPIO9
GPU_GPIO13
GPU_VID1
GPU_GPIO11
GPU_GPIO8
GPIO26_TCK
GPIO24_TRSTB
GPIO25_TDI
GPU_GPIO0
GPU_GPIO2
GPU_GPIO1
GPIO27_TMS
GPU_VID3
GPU_VID2
GPU_GPIO8
GPU_GPIO9
GPIO25_TDI
GPIO24_TRSTB
GPIO26_TCK
GPIO27_TMS
GPIO28_TDO
GENLK_CLK
GENLK_VSYNC
PEG_CLKREQ#
GPU_GPIO0
GPU_GPIO1
GPU_GPIO2
GPU_GPIO11
GPU_VID1
GPU_GPIO13
VGA_SMB_CK2
GPU_GPIO5
+VREFG_GPU+VREFG_GPU
VGA_SMB_DA2
GPIO_19_CTF
GPU_VID4
GPIO21_BBEN
VDDCI_VID
PEG_CLKREQ#
THERM_D-
THERM_D+
GPIO_28_FDO
+TSVDD
TESTEN
+VDD1DI
+AVDD
GPIO21_BBEN
GPIO22_ROMCSB
GPIO22_ROMCSB
EC_SMB_DA2 21,37,8
EC_SMB_CK2 21,37,8
VRAM_ID216
VRAM_ID116
VRAM_ID016
GPU_VID356
GPU_VID256
GPU_VID156
ACIN37,42,47
GPU_VID456
VDDCI_VID53
+3VGS
+3VGS
+3VGS
+3VGS
+3VGS
+3VGS
+3VGS
+3VGS
+1.8VGS
+1.8VGS
+3VGS
+1.8VGS
+1.8VGS
+3VGS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
Issued Date
Deciphered Date
0.1
ATI_SeymourXT_M2_Main_MSIC
C
14 56Monday, November 28, 2011
2011/06/30 2013/06/30
Compal Electronics, Inc.
QCL51 LA-8712P
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
Issued Date
Deciphered Date
0.1
ATI_SeymourXT_M2_Main_MSIC
C
14 56Monday, November 28, 2011
2011/06/30 2013/06/30
Compal Electronics, Inc.
QCL51 LA-8712P
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
Issued Date
Deciphered Date
0.1
ATI_SeymourXT_M2_Main_MSIC
C
14 56Monday, November 28, 2011
2011/06/30 2013/06/30
Compal Electronics, Inc.
QCL51 LA-8712P
RV133 2.2K_0402_5%@ RV133 2.2K_0402_5%@
12
T67T67
RV1510K_0402_5% @ RV1510K_0402_5% @
1 2
RV25 499_0402_1%
PX@
RV25 499_0402_1%
PX@
12
T52T52
RV810K_0402_5% PX@ RV810K_0402_5% PX@
1 2
RV22
100K_0402_5%
PX@RV22
100K_0402_5%
PX@
1 2
T53T53
RV27 0_0402_5%@ RV27 0_0402_5%@
1 2
CV33
0.1U_0402_16V7K
PX@ CV33
0.1U_0402_16V7K
PX@
1
2
RV24 0_0402_5%@ RV24 0_0402_5%@
1 2
RV140
0_0402_5%
@RV140
0_0402_5%
@
12
RV1810K_0402_5% @ RV1810K_0402_5% @
1 2
RV2110K_0402_5% @ RV2110K_0402_5% @
1 2
RV3110K_0402_5% @ RV3110K_0402_5% @
1 2
RV142
0_0402_5%
@RV142
0_0402_5%
@
1 2
RV131
10K_0402_5%
@ RV131
10K_0402_5%
@
12
RV1610K_0402_5% @ RV1610K_0402_5% @
1 2
T61T61
T64T64
RV1110K_0402_5% @ RV1110K_0402_5% @
1 2
T54T54
QV1A
DMN66D0LDW-7_SOT363-6
PX@QV1A
DMN66D0LDW-7_SOT363-6
PX@
61
2
RV132 10K_0402_5%@R V132 10K_0402_5%@
1 2
CV36
0.1U_0402_16V7K
PX@ CV36
0.1U_0402_16V7K
PX@
1
2
LV5
BLM15BD121SN1D_0402
PX@
LV5
BLM15BD121SN1D_0402
PX@
1 2
RV134 2.2K_0402_5%@ RV134 2.2K_0402_5%@
12
RV26 249_0402_1%
PX@
RV26 249_0402_1%
PX@
12
T62T62
UV13
ADM1032ARMZ-2REEL_MSOP8
@
UV13
ADM1032ARMZ-2REEL_MSOP8
@
VDD
1
ALERT#
6
THERM#
4
GND
5
D+
2
D-
3
SCLK
8
SDATA
7
CV34
1U_0402_6.3V6K
PX@ CV34
1U_0402_6.3V6K
PX@
1
2
CV271 0.1U_0402_16V4Z
@
CV271 0.1U_0402_16V4Z
@
12
QV1B
DMN66D0LDW-7_SOT363-6
PX@QV1B
DMN66D0LDW-7_SOT363-6
PX@
3
5
4
RV149 5.11K_0402_5%
@
RV149 5.11K_0402_5%
@
1 2
RV23
100K_0402_5%
PX@RV23
100K_0402_5%
PX@
1 2
RV710K_0402_5% @ RV710K_0402_5% @
1 2
RV1210K_0402_5% @ RV1210K_0402_5% @
1 2
RV17 10K_0402_5%@RV17 10K_0402_5%@
1 2
RV10100K_0402_5% @ RV10100K_0402_5% @
1 2
RV3210K_0402_5% @ RV3210K_0402_5% @
1 2
CV35
10U_0603_6.3V6M
PX@ CV35
10U_0603_6.3V6M
PX@
1
2
RV1310K_0402_5% PX@ RV1310K_0402_5% PX@
1 2
CV272
2200P_0402_50V7K
@
CV272
2200P_0402_50V7K
@
1 2
LV1
BLM15BD121SN1D_0402
PX@LV1
BLM15BD121SN1D_0402
PX@
1 2
RV66 1K_0402_5%PX@ RV66 1K_0402_5%PX@
1 2
CV39 0.1U_0402_16V7K
PX@
CV39 0.1U_0402_16V7K
PX@
12
T69T69
CV48
0.1U_0402_16V4Z
PX@ CV48
0.1U_0402_16V4Z
PX@
1
2
CV46
10U_0603_6.3V6M
PX@ CV46
10U_0603_6.3V6M
PX@
1
2
CV38
10U_0603_6.3V6M
PX@ CV38
10U_0603_6.3V6M
PX@
1
2
T70T70
CV47
1U_0402_6.3V6K
PX@ CV47
1U_0402_6.3V6K
PX@
1
2
RV910K_0402_5% @ RV910K_0402_5% @
1 2
T65T65
T63T63
RV30
10K_0402_5%
PX@ RV30
10K_0402_5%
PX@
1 2
LV2
BLM15BD121SN1D_0402
PX@LV2
BLM15BD121SN1D_0402
PX@
1 2
T60T60
CV37
1U_0402_6.3V6K
PX@ CV37
1U_0402_6.3V6K
PX@
1
2
RV1910K_0402_5% @ RV1910K_0402_5% @
1 2
T66T66
SMBus
PART 2 0F 9
MLPS
BACO
DEBUG
THERMAL
DDC/AUX
DAC1
GENERAL PURPOSE I/O
I2C
MUTI GFX
DPD
DPC
DPB
DPA
2160834000A10CHELSE_FCBGA962
UVG1B
SMBus
PART 2 0F 9
MLPS
BACO
DEBUG
THERMAL
DDC/AUX
DAC1
GENERAL PURPOSE I/O
I2C
MUTI GFX
DPD
DPC
DPB
DPA
2160834000A10CHELSE_FCBGA962
UVG1B
AJ33
TSVSS
AJ32
TSVDD
AL31
TS_A
AK32
GPIO_28_FDO
AG29
DMINUS
AF29
DPLUS
AM24
JTAG_TDO
AL24
JTAG_TMS
AK23
JTAG_TCK
AN23
JTAG_TDI
AM23
JTAG_TRSTB
AD28
TESTEN
AL21
PX_EN
AH13
VREFG
AK24
HPD1
AC30
CEC_1
AH24
GENERICG_HPD6
AH26
GENERICF_HPD5
AJ24
GENERICE_HPD4
AK20
GENERICD
AJ20
GENERICC
AK19
GENERICB
AJ19
GENERICA
AG33
GPIO_30
AG32
GPIO_29
AN13
CLKREQB
AK13
GPIO_22_ROMCSB
AJ14
GPIO_21
AL13
GPIO_20_PWRCNTL_1
AM17
GPIO_19_CTF
AN14
GPIO_18_HPD3
AG30
GPIO_17_THERMAL_INT
AK14
GPIO_16
AM13
GPIO_15_PWRCNTL_0
AM14
GPIO_14_HPD2
AM16
GPIO_13
AL16
GPIO_12
AK16
GPIO_11
AJ16
GPIO_10_ROMSCK
AH15
GPIO_9_ROMSI
AJ13
GPIO_8_ROMSO
AK17
GPIO_7_BLON
AJ17
GPIO_6
AH17
GPIO_5_AC_BATT
AN16
GPIO_2
AH18
GPIO_1
AH20
GPIO_0
AJ26
SDA
AK26
SCL
AH23
SMBDATA
AJ23
SMBCLK
AP12
DVPDATA_23
AU12
DVPDATA_22
AW12
DVPDATA_21
AR12
DVPDATA_20
AT11
DVPDATA_19
AV11
DVPDATA_18
AP10
DVPDATA_17
AU10
DVPDATA_16
AW10
DVPDATA_15
AR10
DVPDATA_14
AT9
DVPDATA_13
AV9
DVPDATA_12
AN7
DVPDATA_11
AV7
DVPDATA_10
AT7
DVPDATA_9
AU6
DVPDATA_8
AW6
DVPDATA_7
AR6
DVPDATA_6
AU5
DVPDATA_5
AW5
DVPDATA_4
AP6
DVPDATA_3
AW3
DVPDATA_2
AU3
DVPDATA_1
AU1
DVPDATA_0
AR1
DVPCLK
AR3
DVPCNTL_2
AW8
DVPCNTL_1
AP8
DVPCNTL_0
AU8
DVPCNTL_MVP_1
AR8
DVPCNTL_MVP_0
AK21
SWAPLOCKB
AJ21
SWAPLOCKA
AC29
GENLK_VSYNC
AD29
GENLK_CLK
AJ31
DDCVGADATA
AJ30
DDCVGACLK
AK29
DDCDATA_AUX6N
AK30
DDCCLK_AUX6P
AM21
DDCDATA_AUX5N
AN21
DDCCLK_AUX5P
AM29
DDCDATA_AUX4N
AL29
DDCCLK_AUX4P
AM30
DDCDATA_AUX3N
AL30
DDCCLK_AUX3P
AM20
AUX2N
AN20
AUX2P
AL19
DDC2DATA
AM19
DDC2CLK
AL27
AUX1N
AM27
AUX1P
AN26
DDC1DATA
AM26
DDC1CLK
AD33
PS_3
AG31
PS_2
AD31
PS_1
AM34
PS_0
AF33
NC_TSVSSQ
AG21
NC#9
AA29
NC#8
AF32
NC#7
AD32
NC#6
AC32
NC#5
AD30
NC#4
AC31
NC#3
U13
NC#2
V13
NC#1
AC34
VSS1DI
AC33
VDD1DI
AE34
AVSSQ
AD34
AVDD
AB34
RSET
AC38
VSYNC
AC36
HSYNC
AE38
AVSSN#3
AF37
B
AD35
AVSSN#2
AE36
G
AD37
AVSSN#1
AD39
R
AR22
TX5M_DPD0N
AT23
TX5P_DPD0P
AV21
TX4M_DPD1N
AU22
TX4P_DPD1P
AR20
TX3M_DPD2N
AT21
TX3P_DPD2P
AT19
TXCDM_DPD3N
AU20
TXCDP_DPD3P
AR16
TX2M_DPC0N
AT17
TX2P_DPC0P
AV15
TX1M_DPC1N
AU16
TX1P_DPC1P
AR14
TX0M_DPC2N
AT15
TX0P_DPC2P
AV13
TXCCM_DPC3N
AU14
TXCCP_DPC3P
AU32
TX5M_DPB0N
AT33
TX5P_DPB0P
AT31
TX4M_DPB1N
AR32
TX4P_DPB1P
AU30
TX3M_DPB2N
AV31
TX3P_DPB2P
AT29
TXCBM_DPB3N
AR30
TXCBP_DPB3P
AR26
TX2M_DPA0N
AT27
TX2P_DPA0P
AV25
TX1M_DPA1N
AU26
TX1P_DPA1P
AR24
TX0M_DPA2N
AT25
TX0P_DPA2P
AV23
TXCAM_DPA3N
AU24
TXCAP_DPA3P
RV14 499_0402_1%PX@RV14 499_0402_1%PX@
1 2
DV1
RB751V_SOD323
@DV1
RB751V_SOD323
@
21
RV2010K_0402_5% @ RV2010K_0402_5% @
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+3.3VS TO +3.3VGS
PXS_PWREN=FCH GPIO192=PE_GPIO1
Del +1.8VGS DC DC
A
dd +1.5VGS DC DC
PWREN
G
PU_Reset
+1.5V_PCIE TO +1.5VGS
11/10 follow Lotus
PXS_PWREN#_R
PXS_PWREN_R
PXS_PWREN#_R
PXS_PWREN_RPXS_PWREN
PXS_PWREN#_R
PXS_PWREN_R
PXS_PWREN25,27,48,52,53,56
+3VS +3VGS
+5VALW
+3VALW
+1.5VGS
+1.5V_PCIE
+VSB
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
ATI_SeymourXT_M2_BACO POWER
C
15 56Monday, November 28, 2011
2011/06/30 2013/06/30
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
ATI_SeymourXT_M2_BACO POWER
C
15 56Monday, November 28, 2011
2011/06/30 2013/06/30
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
Issued Date
Deciphered Date
QCL51 LA-8712P
0.1
ATI_SeymourXT_M2_BACO POWER
C
15 56Monday, November 28, 2011
2011/06/30 2013/06/30
Compal Electronics, Inc.
CV62
0.1U_0603_25V7K
PX@CV62
0.1U_0603_25V7K
PX@
1
2
CV56
10U_0603_6.3V6M
PX@
CV56
10U_0603_6.3V6M
PX@
1
2
UV19
AO4430L_SO8
PX@UV19
AO4430L_SO8
PX@
1
2
3
4
5
6
7
8
QV7A
DMN66D0LDW-7_SOT363-6
@
QV7A
DMN66D0LDW-7_SOT363-6
@
1
2
6
QV2B
DMN66D0LDW-7_SOT363-6
PX@
QV2B
DMN66D0LDW-7_SOT363-6
PX@
34
5
RV35
100K_0402_5%
PX@
RV35
100K_0402_5%
PX@
12
QV7B
DMN66D0LDW-7_SOT363-6
@
QV7B
DMN66D0LDW-7_SOT363-6
@
34
5
RV36
20K_0402_5%
PX@
RV36
20K_0402_5%
PX@
RV38
0_0402_5%
@RV38
0_0402_5%
@
1 2
RV40
20K_0402_5%
PX@RV40
20K_0402_5%
PX@
CV60
10U_0603_6.3V6M
PX@
CV60
10U_0603_6.3V6M
PX@
1
2
J9
2MM
@J9
2MM
@
2 1
CV61
1U_0603_10V6K
PX@CV61
1U_0603_10V6K
PX@
1
2
RV44 0_0402_5%@RV44 0_0402_5%@
1 2
G
D
S
QV8
2N7002K_SOT23-3
PX@
G
D
S
QV8
2N7002K_SOT23-3
PX@
2
13
QV2A
DMN66D0LDW-7_SOT363-6
PX@
QV2A
DMN66D0LDW-7_SOT363-6
PX@
1
2
6
CV58
0.1U_0603_25V7K
PX@
CV58
0.1U_0603_25V7K
PX@
1
2
J2
2MM
@J2
2MM
@
2 1
RV39
470_0603_5%
@RV39
470_0603_5%
@
12
RV41
200K_0402_1%
PX@
RV41
200K_0402_1%
PX@
1 2
CV57
1U_0603_10V6K
PX@
CV57
1U_0603_10V6K
PX@
1
2
CV59
10U_0603_6.3V6M
PX@
CV59
10U_0603_6.3V6M
PX@
1
2
RV145 0_0402_5%
PX@
RV145 0_0402_5%
PX@
1 2
QV16
AP2301GN-HF_SOT23-3
PX@QV16
AP2301GN-HF_SOT23-3
PX@
2
3 1
RV37
20K_0402_5%
PX@
RV37
20K_0402_5%
PX@
RV34
470_0603_5%
@RV34
470_0603_5%
@
12
RV43
0_0402_5%
@
RV43
0_0402_5%
@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
This basic topology should be used for DRAM_RST for DDR3/GDDR5.These
Capacitors and Resistor values are an example only. The Series R and
|| Cap values will depend on the DRAM load and will have to be
calculated for different Memory ,DRAM Load and board to pass Reset
Signal Spec.
Place all these components very close to GPU (Within
25mm) and keep all component close to each Other (within
5mm) except Rser2
For Chelsea
RV60,RV61,RV62,RV63 non staff
RV65,RV66 from 240ohm
change to 120ohm
0
0 0
0
0
1
1 1
1 1
128M16 (2G)
Hynix 2GB
PN:SA00003YO70
RV60
RV56
RV57
RV58
RV56
RV61
Vendor VRAM_ID0 VRAM_ID1 VRAM_ID2
RV59
RV59 RV58
RV57 RV60
H5TQ2G63DFR-11C
1 0
RV61
128M16 (2G)
Samsung 2GB
PN:SA000047Q00
K4W2G1646C-HC11
64M16 (1G)
64M16 (1G)
Samsung 1GB
PN:SA00004GS20
Hynix 1GB
PN:SA000041S20
K4W1G1646G-BC11
H5TQ1G63DFR-11C
+VDD_MEM15_REFSA
+VDD_MEM15_REFSB
+VDD_MEM15_REFDA
+VDD_MEM15_REFDB
DRAM_RST#_R
+VDD_MEM15_REFSA
+VDD_MEM15_REFDA
MDA0
MDA1
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA2
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA3
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA4
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA5
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA6
MDA60
MDA61
MDA62
MDA63
MDA7
MDA8
MDA9
A_BA0
A_BA1
A_BA2
CASA0#
CASA1#
CKEA0
CKEA1
CLKA0
CLKA0#
CLKA1
CLKA1#
CSA0#_0
CSA1#_0
DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7
MAA0
MAA1
MAA10
MAA11
MAA12
MAA13
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
ODTA0
ODTA1
QSA#0
QSA#1
QSA#2
QSA#3
QSA#4
QSA#5
QSA#6
QSA#7
QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7
RASA0#
RASA1#
WEA0#
WEA1#
VRAM_ID1
VRAM_ID0
VRAM_ID2
MDA[0..63]
MAA[12..0]
A_BA[2..0]
DRAM_RST#_R
+VDD_MEM15_REFSB
+VDD_MEM15_REFDB
MDB0
MDB1
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16
MDB17
MDB18
MDB19
MDB2
MDB20
MDB21
MDB22
MDB23
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB3
MDB30
MDB31
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB4
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB48
MDB49
MDB5
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB56
MDB57
MDB58
MDB59
MDB6
MDB60
MDB61
MDB62
MDB63
MDB7
MDB8
MDB9
MDB[0..63]
MAB[12..0]
B_BA[2..0]
B_BA0
B_BA1
B_BA2
CASB0#
CASB1#
CKEB0
CKEB1
CLKB0
CLKB0#
CLKB1
CLKB1#
CSB0#_0
CSB1#_0
DQMB#0
DQMB#1
DQMB#2
DQMB#3
DQMB#4
DQMB#5
DQMB#6
DQMB#7
MAB0
MAB1
MAB10
MAB11
MAB12
MAB13
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
ODTB0
ODTB1
QSB#0
QSB#1
QSB#2
QSB#3
QSB#4
QSB#5
QSB#6
QSB#7
QSB0
QSB1
QSB2
QSB3
QSB4
QSB5
QSB6
QSB7
RASB0#
RASB1#
WEB0#
WEB1#
DRAM_RST#19,20
QSA#[7..0] 19
QSA[7..0] 19
CLKA1 19
CLKA0 19
DQMA#[7..0] 19
RASA0# 19
CLKA1# 19
CLKA0# 19
CSA0#_0 19
WEA0# 19
CASA0# 19
CSA1#_0 19
RASA1# 19
ODTA1 19
ODTA0 19
WEA1# 19
CASA1# 19
MAA13 19
CKEA0 19
CKEA1 19
VRAM_ID0 14
VRAM_ID1 14
VRAM_ID2 14
A_BA[2..0] 19
MAA[12..0] 19
B_BA[2..0] 20
MAB[12..0] 20
QSB#[7..0] 20
QSB[7..0] 20
CLKB1 20
CLKB0 20
DQMB#[7..0] 20
RASB0# 20
CKEB0 20
CLKB1# 20
CLKB0# 20
CSB0#_0 20
WEB0# 20
CASB0# 20
CKEB1 20
CSB1#_0 20
RASB1# 20
ODTB1 20
ODTB0 20
WEB1# 20
CASB1# 20
MAB13 20
+1.5VGS +1.5VGS
+1.5VGS
+1.5VGS +1.5VGS
+1.5VGS
+1.8VGS
MDA[0..63]19 MDB[0..63]20
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
Issued Date
Deciphered Date
0.1
ATI_SeymourXT_M2_MEM IF
C
16 56Monday, November 28, 2011
2011/06/30 2013/06/30
Compal Electronics, Inc.
QCL51 LA-8712P
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
Issued Date
Deciphered Date
0.1
ATI_SeymourXT_M2_MEM IF
C
16 56Monday, November 28, 2011
2011/06/30 2013/06/30
Compal Electronics, Inc.
QCL51 LA-8712P
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
Issued Date
Deciphered Date
0.1
ATI_SeymourXT_M2_MEM IF
C
16 56Monday, November 28, 2011
2011/06/30 2013/06/30
Compal Electronics, Inc.
QCL51 LA-8712P
RV56 10K_0402_5%X76@RV56 10K_0402_5%X76@
1 2
RV78
100_0402_1%
PX@
RV78
100_0402_1%
PX@
12
RV82
100_0402_1%
PX@
RV82
100_0402_1%
PX@
12
RV68 120_0402_5%RV68 120_0402_5%
1 2
CV176
0.1U_0402_16V7K
PX@
CV176
0.1U_0402_16V7K
PX@
12
RV61 10K_0402_5%X76@RV61 10K_0402_5%X76@
1 2
RV79
100_0402_1%
PX@
RV79
100_0402_1%
PX@
12
CV175
0.1U_0402_16V7K
PX@
CV175
0.1U_0402_16V7K
PX@
12
RV71
@
4.7K_0402_5%
RV71
@
4.7K_0402_5%
12
PART 4 0F 9
GDDR5/DDR3
MEMORY INTERFACE B
2160834000A10CHELSE_FCBGA962
UVG1D
PART 4 0F 9
GDDR5/DDR3
MEMORY INTERFACE B
2160834000A10CHELSE_FCBGA962
UVG1D
AA12
MVREFSB
Y12
MVREFDB
AP5
DQB1_31
AP1
DQB1_30
AP3
DQB1_29
AN4
DQB1_28
AM1
DQB1_27
AM6
DQB1_26
AL4
DQB1_25
AK1
DQB1_24
AM7
DQB1_23
AM8
DQB1_22
AL7
DQB1_21
AK9
DQB1_20
AG7
DQB1_19
AG8
DQB1_18
AF9
DQB1_17
AF8
DQB1_16
AK3
DQB1_15
AJ4
DQB1_14
AH6
DQB1_13
AH5
DQB1_12
AG4
DQB1_11
AF6
DQB1_10
AF3
DQB1_9
AF1
DQB1_8
AD5
DQB1_7
AD3
DQB1_6
AD1
DQB1_5
AD6
DQB1_4
AB3
DQB1_3
AB1
DQB1_2
AB6
DQB1_1
AA4
DQB1_0
Y5
DQB0_31
Y3
DQB0_30
Y1
DQB0_29
Y6
DQB0_28
V3
DQB0_27
V1
DQB0_26
V6
DQB0_25
U4
DQB0_24
T1
DQB0_23
T6
DQB0_22
R4
DQB0_21
P5
DQB0_20
P6
DQB0_19
N4
DQB0_18
M5
DQB0_17
M3
DQB0_16
M1
DQB0_15
M6
DQB0_14
L4
DQB0_13
K5
DQB0_12
K6
DQB0_11
J4
DQB0_10
H6
DQB0_9
H5
DQB0_8
G4
DQB0_7
F5
DQB0_6
F3
DQB0_5
F1
DQB0_4
E1
DQB0_3
E3
DQB0_2
C3
DQB0_1
C5
DQB0_0
AH11
DRAM_RST
V12
MAB1_9/RSVD
U12
MAB0_9/MAB_15
W8
MAB1_8/MAB_14
T8
MAB0_8/MAB_13
AB11
WEB1B
N10
WEB0B
AA11
CKEB1
U10
CKEB0
AC10
CSB1B_1
AD10
CSB1B_0
L10
CSB0B_1
P10
CSB0B_0
AA10
CASB1B
W10
CASB0B
Y10
RASB1B
T10
RASB0B
AD7
CLKB1B
AD8
CLKB1
L8
CLKB0B
L9
CLKB0
W7
ADBIB1/ODTB1
T7
ADBIB0/ODTB0
AM3
DDBIB1_3/QSB_7B
AJ8
DDBIB1_2/QSB_6B
AH3
DDBIB1_1/QSB_5B
AC4
DDBIB1_0/QSB_4B
W4
DDBIB0_3/QSB_3B
P1
DDBIB0_2/QSB_2B
K1
DDBIB0_1/QSB_1B
G7
DDBIB0_0/QSB_0B
AM5
EDCB1_3/QSB_7
AJ9
EDCB1_2/QSB_6
AH1
EDCB1_1/QSB_5
AB5
EDCB1_0/QSB_4
V5
EDCB0_3/QSB_3
P3
EDCB0_2/QSB_2
K3
EDCB0_1/QSB_1
F6
EDCB0_0/QSB_0
AK5
WCKB1B_1/DQMB_7
AK6
WCKB1_1/DQMB_6
AF5
WCKB1B_0/DQMB_5
AE4
WCKB1_0/DQMB_4
T5
WCKB0B_1/DQMB_3
T3
WCKB0_1/DQMB_2
H1
WCKB0B_0/DQMB_1
H3
WCKB0_0/DQMB_0
AA9
MAB1_7/BA1
Y8
MAB1_6/BA0
AA8
MAB1_5/BA2
AA7
MAB1_4/MAB_12
AC9
MAB1_3/MAB_11
AC8
MAB1_2/MAB_10
W9
MAB1_1/MAB_9
Y9
MAB1_0/MAB_8
U8
MAB0_7/MAB_7
U9
MAB0_6/MAB_6
N9
MAB0_5/MAB_5
N8
MAB0_4/MAB_4
N7
MAB0_3/MAB_3
P9
MAB0_2/MAB_2
T9
MAB0_1/MAB_1
P8
MAB0_0/MAB_0
RV67 120_0402_5%RV67 120_0402_5%
1 2
RV65 240_0402_1%@ RV65 240_0402_1%@
1 2
RV72
40.2_0402_1%
PX@
RV72
40.2_0402_1%
PX@
12
RV59 10K_0402_5%X76@RV59 10K_0402_5%X76@
1 2
RV58 10K_0402_5%X76@RV58 10K_0402_5%X76@
1 2
RV73
40.2_0402_1%
PX@
RV73
40.2_0402_1%
PX@
12
RV80
4.99K_0402_1%
PX@
RV80
4.99K_0402_1%
PX@
1 2
CV174
120P_0402_50V9
PX@
CV174
120P_0402_50V9
PX@
12
RV75
40.2_0402_1%
PX@
RV75
40.2_0402_1%
PX@
12
CV172
0.1U_0402_16V7K
PX@
CV172
0.1U_0402_16V7K
PX@
12
RV57 10K_0402_5%X76@RV57 10K_0402_5%X76@
1 2
RV77
10_0402_5%
PX@
RV77
10_0402_5%
PX@
1 2
PART 3 0F 9
GDDR5/DDR3
MEMORY INTERFACE A
2160834000A10CHELSE_FCBGA962
UVG1C
PART 3 0F 9
GDDR5/DDR3
MEMORY INTERFACE A
2160834000A10CHELSE_FCBGA962
UVG1C
AH12
MEM_CALRP2
M27
MEM_CALRP0
M12
NC_MEM_CALRP1
AG12
NC_MEM_CALRN2
N12
NC_MEM_CALRN1
L27
NC_MEM_CALRN0
L20
MVREFSA
L18
MVREFDA
A5
DQA1_31
E6
DQA1_30
C6
DQA1_29
A6
DQA1_28
E8
DQA1_27
C8
DQA1_26
A8
DQA1_25
G9
DQA1_24
K10
DQA1_23
K9
DQA1_22
G8
DQA1_21
G10
DQA1_20
H11
DQA1_19
J13
DQA1_18
H13
DQA1_17
G13
DQA1_16
C10
DQA1_15
A10
DQA1_14
F10
DQA1_13
D11
DQA1_12
A12
DQA1_11
F12
DQA1_10
D13
DQA1_9
F14
DQA1_8
E14
DQA1_7
D15
DQA1_6
F16
DQA1_5
A16
DQA1_4
D17
DQA1_3
F18
DQA1_2
A18
DQA1_1
C18
DQA1_0
E18
DQA0_31
D19
DQA0_30
F20
DQA0_29
A20
DQA0_28
D21
DQA0_27
F22
DQA0_26
A22
DQA0_25
C22
DQA0_24
E24
DQA0_23
A24
DQA0_22
C24
DQA0_21
F24
DQA0_20
A26
DQA0_19
C26
DQA0_18
F26
DQA0_17
D27
DQA0_16
E28
DQA0_15
A28
DQA0_14
C28
DQA0_13
F28
DQA0_12
A30
DQA0_11
C30
DQA0_10
F30
DQA0_9
D31
DQA0_8
E32
DQA0_7
F32
DQA0_6
D33
DQA0_5
G32
DQA0_4
E34
DQA0_3
A35
DQA0_2
C35
DQA0_1
C37
DQA0_0
M20
MAA1_9/RSVD
M21
MAA0_9/MAA_15
J19
MAA1_8/MAA_14
H23
MAA0_8/MAA_13
L15
WEA1B
K26
WEA0B
J20
CKEA1
K21
CKEA0
K16
CSA1B_1
M13
CSA1B_0
K27
CSA0B_1
K24
CSA0B_0
K17
CASA1B
K20
CASA0B
K19
RASA1B
K23
RASA0B
H14
CLKA1B
J14
CLKA1
G27
CLKA0B
H27
CLKA0
G19
ADBIA1/ODTA1
J21
ADBIA0/ODTA0
F8
DDBIA1_3/QSA_7B
J11
DDBIA1_2/QSA_6B
C12
DDBIA1_1/QSA_5B
C16
DDBIA1_0/QSA_4B
C20
DDBIA0_3/QSA_3B
E26
DDBIA0_2/QSA_2B
E30
DDBIA0_1/QSA_1B
A34
DDBIA0_0/QSA_0B
D7
EDCA1_3/QSA_7
J10
EDCA1_2/QSA_6
E12
EDCA1_1/QSA_5
E16
EDCA1_0/QSA_4
E20
EDCA0_3/QSA_3
D25
EDCA0_2/QSA_2
D29
EDCA0_1/QSA_1
C34
EDCA0_0/QSA_0
D9
WCKA1B_1/DQMA_7
E10
WCKA1_1/DQMA_6
A14
WCKA1B_0/DQMA_5
C14
WCKA1_0/DQMA_4
E22
WCKA0B_1/DQMA_3
D23
WCKA0_1/DQMA_2
C32
WCKA0B_0/DQMA_1
A32
WCKA0_0/DQMA_0
H17
MAA1_7/MAA_BA1
J17
MAA1_6/MAA_BA0
H16
MAA1_5/MAA_BA2
J16
MAA1_4/MAA_12
G16
MAA1_3/MAA_11
L13
MAA1_2/MAA_10
H20
MAA1_1/MAA_9
H19
MAA1_0/MAA_8
G21
MAA0_7/MAA_7
H21
MAA0_6/MAA_6
J26
MAA0_5/MAA_5
H26
MAA0_4/MAA_4
J24
MAA0_3/MAA_3
H24
MAA0_2/MAA_2
J23
MAA0_1/MAA_1
G24
MAA0_0/MAA_0
RV74
40.2_0402_1%
PX@
RV74
40.2_0402_1%
PX@
12
RV63 240_0402_1%@ RV63 240_0402_1%@
1 2
RV76
51.1_0402_1%
PX@
RV76
51.1_0402_1%
PX@
1 2
RV62 240_0402_1%@ RV62 240_0402_1%@
1 2
CV173
0.1U_0402_16V7K
PX@
CV173
0.1U_0402_16V7K
PX@
12
RV81
100_0402_1%
PX@
RV81
100_0402_1%
PX@
12
RV60 10K_0402_5%X76@RV60 10K_0402_5%X76@
1 2
RV64 240_0402_1%@ RV64 240_0402_1%@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
(1.8V@504mA PCIE_VDDR)
(1.0V@1920mA PCIE_VDDC)
(GDDR3/DDR3 1.12V@4A VDDCI)
For Madison, Park, Capilano, Robson, Seymour and Whistler, VDDCI and VDDC can share one common regulator
(GDDR5 1.12V@16A VDDCI)
VDDCI and VDDC should have seperate regulators with a merge option on PCB
MPV18 CRB Design
0.1u 2 1
1u 2 1
10u 1 1
SPV18 CRB Design
0.1u 1 1
1u 1 1
10u 1 1
SPV10 CRB Design
0.1u 1 1
1u 1 1
10u 1 1
VDDR4 CRB Design
0.1u 1 1
1u 1 1
VDDR3 CRB Design
1u 3 3
10u 1 1
VDD_CT CRB Design
0.1u 1 1
1u 3 3
10u 1 1
VDDR1 CRB Design
0.1u 6 6
1u 10 5
10u 6 5
On power team page
+1.0VGS-->+0.935VGS
(1.8V@110mA VDD_CT)
VCC_GPU_SENSE & VSS_GPU_SENSE
needs to be routed as differential pair
For DDR3/GDDR5, MVDDQ = 1.5V
Must be connected to PCIE_VDDC (0.935 V) on
"Heathrow"/"Chelsea" for both BACO and non-BACO designs
Change power rail same as PCIE_VDDC
VDDCI CR B Design
1u 10 9
10u 3 2
22u 0 1
PCIE_VDDR CRB Design
0.1u 2 2
1u 1 1
10u 1 1
PCIE_VDDC CRB Design
1u 7 5 (1@)
10u 1 1
VDDC CRB Design
1u 30 25
10u 10 1
22u 0 1
For Chelsea, Delete 2*1U
11/09 On power team page
11/16 add
11/16 add
+PCIE_VDDR
+VDDR4
VCC_GPU_SENSE56
VDDCI_SEN53
VSS_GPU_SENSE56
+1.8VGS
+0.935VGS
+1.8VGS +VDDC_CT
+1.8VGS
+3VGS
+1.5VGS
+VDDCI
+VGA_CORE
+0.935VGS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
Issued Date
Deciphered Date
0.1
ATI_SeymourXT_M2_Power
C
17 56Monday, November 28, 2011
2011/06/30 2013/06/30
Compal Electronics, Inc.
QCL51 LA-8712P
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
Issued Date
Deciphered Date
0.1
ATI_SeymourXT_M2_Power
C
17 56Monday, November 28, 2011
2011/06/30 2013/06/30
Compal Electronics, Inc.
QCL51 LA-8712P
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
Issued Date
Deciphered Date
0.1
ATI_SeymourXT_M2_Power
C
17 56Monday, November 28, 2011
2011/06/30 2013/06/30
Compal Electronics, Inc.
QCL51 LA-8712P
CV148
1U_0402_6.3V6K
PX@ CV148
1U_0402_6.3V6K
PX@
1
2
LV6
MBK1608121YZF_0603
PX@ LV6
MBK1608121YZF_0603
PX@
12
CV107
1U_0402_6.3V6K
@ CV107
1U_0402_6.3V6K
@
1
2
CV85
1U_0402_6.3V6K
PX@ CV85
1U_0402_6.3V6K
PX@
1
2
CV102
0.1U_0402_16V7K
PX@ CV102
0.1U_0402_16V7K
PX@
1
2
CV105
1U_0402_6.3V6K
PX@ CV105
1U_0402_6.3V6K
PX@
1
2
CV144
0.1U_0402_16V7K
PX@ CV144
0.1U_0402_16V7K
PX@
1
2
CV89
0.1U_0402_16V7K
PX@ CV89
0.1U_0402_16V7K
PX@
1
2
CV94
10U_0603_6.3V6M
PX@ CV94
10U_0603_6.3V6M
PX@
1
2
CV147
1U_0402_6.3V6K
PX@ CV147
1U_0402_6.3V6K
PX@
1
2
+
CV87
220U_B2_2.5VM_R35
@
+
CV87
220U_B2_2.5VM_R35
@
1
2
CV88
0.1U_0402_16V7K
PX@ CV88
0.1U_0402_16V7K
PX@
1
2
CV83
10U_0603_6.3V6M
PX@ CV83
10U_0603_6.3V6M
PX@
1
2
CV90
0.1U_0402_16V7K
PX@ CV90
0.1U_0402_16V7K
PX@
1
2
CV141
1U_0402_6.3V6K
PX@ CV141
1U_0402_6.3V6K
PX@
1
2
CV155
10U_0603_6.3V6M
PX@ CV155
10U_0603_6.3V6M
PX@
1
2
CV104
1U_0402_6.3V6K
PX@ CV104
1U_0402_6.3V6K
PX@
1
2
CV106
1U_0402_6.3V6K
PX@ CV106
1U_0402_6.3V6K
PX@
1
2
CV81
0.1U_0402_16V7K
PX@ CV81
0.1U_0402_16V7K
PX@
1
2
CV101
0.1U_0402_16V7K
PX@ CV101
0.1U_0402_16V7K
PX@
1
2
LV8
BLM15BD121SN1D_0402
PX@ LV8
BLM15BD121SN1D_0402
PX@
1 2
CV143
1U_0402_6.3V6K
PX@ CV143
1U_0402_6.3V6K
PX@
1
2
CV125
1U_0402_6.3V6K
PX@ CV125
1U_0402_6.3V6K
PX@
1
2
CV123
1U_0402_6.3V6K
PX@ CV123
1U_0402_6.3V6K
PX@
1
2
CV99
0.1U_0402_16V7K
PX@ CV99
0.1U_0402_16V7K
PX@
1
2
CV142
1U_0402_6.3V6K
PX@ CV142
1U_0402_6.3V6K
PX@
1
2
CV108
10U_0603_6.3V6M
PX@ CV108
10U_0603_6.3V6M
PX@
1
2
DVP
PCIE
PART 5 0F 9
BACO
SENESE
VOLTAGE
CORE I/O
ISOLATED
TRANSLATION
LEVEL
I/O
MEM I/O
CORE
2160834000A10CHELSE_FCBGA962
UVG1E
DVP
PCIE
PART 5 0F 9
BACO
SENESE
VOLTAGE
CORE I/O
ISOLATED
TRANSLATION
LEVEL
I/O
MEM I/O
CORE
2160834000A10CHELSE_FCBGA962
UVG1E
AH29
FB_GND
AG28
FB_VDDCI
AF28
FB_VDDC
AG15
VDDR4
AG13
VDDR4
AG11
VDDR4
AF15
VDDR4
AF13
VDDR4
AF12
VDDR4
AF11
VDDR4
AD12
VDDR4
AG24
VDDR3
AG23
VDDR3
AF24
VDDR3
AF23
VDDR3
AG27
VDD_CT
AG26
VDD_CT
AF27
VDD_CT
AF26
VDD_CT
Y7
VDDR1
Y11
VDDR1
U7
VDDR1
U11
VDDR1
R11
VDDR1
P7
VDDR1
N11
VDDR1
M11
VDDR1
L7
VDDR1
L26
VDDR1
L23
VDDR1
L21
VDDR1
L16
VDDR1
L12
VDDR1
K8
VDDR1
K13
VDDR1
K11
VDDR1
J9
VDDR1
J7
VDDR1
H10
VDDR1
G29
VDDR1
G26
VDDR1
G23
VDDR1
G20
VDDR1
G17
VDDR1
G14
VDDR1
G11
VDDR1
AL9
VDDR1
AK8
VDDR1
AJ7
VDDR1
AG10
VDDR1
AF7
VDDR1
AD11
VDDR1
AC7
VDDR1
Y13
VDDCI
V15
VDDCI
T15
VDDCI
T12
VDDCI
R16
VDDCI
R13
VDDCI
R12
VDDCI
N22
VDDCI
N20
VDDCI
N17
VDDCI
N15
VDDCI
N13
VDDCI
M23
VDDCI
M18
VDDCI
M16
VDDCI
M15
VDDCI
AD16
VDDCI
AD13
VDDCI
AC15
VDDCI
AC12
VDDCI
AB13
VDDCI
AA13
VDDCI
Y28
VDDC
Y26
VDDC
Y23
VDDC
Y21
VDDC
Y18
VDDC
Y16
VDDC
V27
VDDC
V24
VDDC
V22
VDDC
V20
VDDC
V17
VDDC
U26
VDDC
U23
VDDC
U21
VDDC
U18
VDDC
U16
VDDC
T24
VDDC
T22
VDDC
T20
VDDC
T17
VDDC
R26
VDDC
R23
VDDC
R21
VDDC
R18
VDDC
N24
VDDC
M26
VDDC
AH28
VDDC
AH27
VDDC
AH22
VDDC
AG18
VDDC
AG16
VDDC
AF22
VDDC
AF20
VDDC
AF17
VDDC
AD26
VDDC
AD23
VDDC
AD21
VDDC
AD18
VDDC
AC27
VDDC
AC24
VDDC
AC22
VDDC
AC20
VDDC
AC17
VDDC
AB28
VDDC
AB26
VDDC
AB23
VDDC
AB21
VDDC
AB18
VDDC
AB16
VDDC
AA27
VDDC
AA24
VDDC
AA22
VDDC
AA20
VDDC
AA17
VDDC
AA15
VDDC
T27
BIF_VDDC
N27
BIF_VDDC
U28
PCIE_VDDC
T28
PCIE_VDDC
R28
PCIE_VDDC
N28
PCIE_VDDC
M28
PCIE_VDDC
L28
PCIE_VDDC
J30
PCIE_VDDC
J29
PCIE_VDDC
H30
PCIE_VDDC
H29
PCIE_VDDC
G31
PCIE_VDDC
G30
PCIE_VDDC
AB37
PCIE_PVDD
W29
NC_BIF_VDDC
V28
NC_BIF_VDDC
Y31
NC_PCIE_VDDR
W30
NC_PCIE_VDDR
AA34
NC_PCIE_VDDR
AA33
NC_PCIE_VDDR
AA32
NC_PCIE_VDDR
AA31
NC_PCIE_VDDR
CV95
10U_0603_6.3V6M
PX@ CV95
10U_0603_6.3V6M
PX@
1
2
CV91
1U_0402_6.3V6K
PX@ CV91
1U_0402_6.3V6K
PX@
1
2
LV7
BLM15BD121SN1D_0402
PX@ LV7
BLM15BD121SN1D_0402
PX@
1 2
CV86
1U_0402_6.3V6K
PX@ CV86
1U_0402_6.3V6K
PX@
1
2
CV92
10U_0603_6.3V6M
PX@ CV92
10U_0603_6.3V6M
PX@
1
2
CV98
0.1U_0402_16V7K
PX@ CV98
0.1U_0402_16V7K
PX@
1
2
CV140
1U_0402_6.3V6K
PX@ CV140
1U_0402_6.3V6K
PX@
1
2
CV93
10U_0603_6.3V6M
PX@ CV93
10U_0603_6.3V6M
PX@
1
2
CV124
1U_0402_6.3V6K
PX@ CV124
1U_0402_6.3V6K
PX@
1
2
CV100
0.1U_0402_16V7K
PX@ CV100
0.1U_0402_16V7K
PX@
1
2
CV97
1U_0402_6.3V6K
PX@ CV97
1U_0402_6.3V6K
PX@
1
2
CV103
1U_0402_6.3V6K
PX@ CV103
1U_0402_6.3V6K
PX@
1
2
CV139
10U_0603_6.3V6M
PX@ CV139
10U_0603_6.3V6M
PX@
1
2
CV145
10U_0603_6.3V6M
PX@ CV145
10U_0603_6.3V6M
PX@
1
2
CV122
10U_0603_6.3V6M
PX@ CV122
10U_0603_6.3V6M
PX@
1
2
CV96
1U_0402_6.3V6K
PX@ CV96
1U_0402_6.3V6K
PX@
1
2
CV84
1U_0402_6.3V6K
PX@ CV84
1U_0402_6.3V6K
PX@
1
2
CV82
10U_0603_6.3V6M
PX@ CV82
10U_0603_6.3V6M
PX@
1
2
CV126
0.1U_0402_16V7K
PX@ CV126
0.1U_0402_16V7K
PX@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
11/14 1% to 5%
11/14 1% to 5%
MECH#1
MECH#2
MECH#3
+DP_VDDC
+DP_VDDR18
+1.8VGS
+0.935VGS
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
Issued Date
Deciphered Date
0.1
ATI_SetmourXT_M2_PWR_GND
C
18 56Monday, November 28, 2011
2011/06/30 2013/06/30
Compal Electronics, Inc.
QCL51 LA-8712P
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
Issued Date
Deciphered Date
0.1
ATI_SetmourXT_M2_PWR_GND
C
18 56Monday, November 28, 2011
2011/06/30 2013/06/30
Compal Electronics, Inc.
QCL51 LA-8712P
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
Issued Date
Deciphered Date
0.1
ATI_SetmourXT_M2_PWR_GND
C
18 56Monday, November 28, 2011
2011/06/30 2013/06/30
Compal Electronics, Inc.
QCL51 LA-8712P
RV51
150_0402_1%
PX@RV51
150_0402_1%
PX@
12
RV50
150_0402_1%
PX@RV50
150_0402_1%
PX@
12
CV70
1U_0402_6.3V6K
PX@ CV70
1U_0402_6.3V6K
PX@
1
2
CV78
10U_0603_6.3V6M
PX@ CV78
10U_0603_6.3V6M
PX@
1
2
CV66
10U_0603_6.3V6M
PX@
CV66
10U_0603_6.3V6M
PX@
1
2
CV77
0.1U_0402_16V7K
PX@ CV77
0.1U_0402_16V7K
PX@
1
2
CV68
0.1U_0402_16V7K
PX@
CV68
0.1U_0402_16V7K
PX@
1
2
CV80
0.1U_0402_16V7K
PX@ CV80
0.1U_0402_16V7K
PX@
1
2
CV74
0.1U_0402_16V7K
PX@ CV74
0.1U_0402_16V7K
PX@
1
2
CV72
10U_0603_6.3V6M
PX@ CV72
10U_0603_6.3V6M
PX@
1
2
CV65
10U_0603_6.3V6M
PX@
CV65
10U_0603_6.3V6M
PX@
1
2
CV69
0.1U_0402_16V7K
PX@ CV69
0.1U_0402_16V7K
PX@
1
2
T55 PADT55 PAD
T57 PADT57 PAD
RV55
150_0402_1%
PX@RV55
150_0402_1%
PX@
12
CV71
10U_0603_6.3V6M
PX@ CV71
10U_0603_6.3V6M
PX@
1
2
CV79
1U_0402_6.3V6K
PX@ CV79
1U_0402_6.3V6K
PX@
1
2
PART 6 0F 9
GND
2160834000A10CHELSE_FCBGA962
UVG1F
PART 6 0F 9
GND
2160834000A10CHELSE_FCBGA962
UVG1F
Y27
GND
Y24
GND
Y22
GND
Y20
GND
Y17
GND
Y15
GND
W6
GND
W2
GND
V26
GND
V23
GND
V21
GND
V18
GND
V16
GND
V11
GND
U6
GND
U27
GND
U24
GND
U22
GND
U20
GND
U2
GND
U17
GND
U15
GND
T26
GND
T23
GND
T21
GND
T18
GND
T16
GND
T13
GND
T11
GND
R6
GND
R27
GND
R24
GND
R22
GND
R20
GND
R2
GND
R17
GND
R15
GND
N6
GND
N26
GND
N23
GND
N21
GND
N2
GND
N18
GND
N16
GND
M24
GND
M22
GND
M17
GND
L6
GND
L24
GND
L22
GND
L2
GND
L17
GND
L11
GND
K7
GND
K14
GND
J8
GND
J6
GND
J27
GND
J2
GND
H9
GND
G6
GND
G2
GND
F9
GND
F7
GND
F33
GND
F31
GND
F29
GND
F27
GND
F25
GND
F23
GND
F21
GND
F19
GND
F17
GND
F15
GND
Y39
PCIE_VSS
Y34
PCIE_VSS
W34
PCIE_VSS
W31
PCIE_VSS
V39
PCIE_VSS
V34
PCIE_VSS
U34
PCIE_VSS
U31
PCIE_VSS
T39
PCIE_VSS
T34
PCIE_VSS
T31
PCIE_VSS
R34
PCIE_VSS
P39
PCIE_VSS
P34
PCIE_VSS
P31
PCIE_VSS
N34
PCIE_VSS
N31
PCIE_VSS
M39
PCIE_VSS
M34
PCIE_VSS
L34
PCIE_VSS
L31
PCIE_VSS
K39
PCIE_VSS
K34
PCIE_VSS
K31
PCIE_VSS
J34
PCIE_VSS
J31
PCIE_VSS
H39
PCIE_VSS
H34
PCIE_VSS
H31
PCIE_VSS
G34
PCIE_VSS
G33
PCIE_VSS
F39
PCIE_VSS
F34
PCIE_VSS
E39
PCIE_VSS
AB39
PCIE_VSS
AW39
VSS_MECH
AW1
VSS_MECH
A39
VSS_MECH
F13
GND
F11
GND
E5
GND
E35
GND
C39
GND
C1
GND
B9
GND
B7
GND
B33
GND
B31
GND
B29
GND
B27
GND
B25
GND
B23
GND
B21
GND
B19
GND
B17
GND
B15
GND
B13
GND
B11
GND
AR5
GND
AP9
GND
AP7
GND
AP11
GND
AN8
GND
AN6
GND
AN30
GND
AN2
GND
AN11
GND
AM9
GND
AM31
GND
AM11
GND
AL8
GND
AL6
GND
AL32
GND
AL26
GND
AL23
GND
AL20
GND
AL2
GND
AL17
GND
AL14
GND
AL11
GND
AK7
GND
AK31
GND
AK11
GND
AJ6
GND
AJ28
GND
AJ2
GND
AJ11
GND
AJ10
GND
AH21
GND
AG9
GND
AG6
GND
AG22
GND
AG20
GND
AG2
GND
AG17
GND
AF21
GND
AF18
GND
AF16
GND
AF10
GND
AE6
GND
AE2
GND
AD9
GND
AD27
GND
AD24
GND
AD22
GND
AD20
GND
AD17
GND
AD15
GND
AC6
GND
AC28
GND
AC26
GND
AC23
GND
AC21
GND
AC2
GND
AC18
GND
AC16
GND
AC13
GND
AC11
GND
AB27
GND
AB24
GND
AB22
GND
AB20
GND
AB17
GND
AB15
GND
AB12
GND
AA6
GND
AA28
GND
AA26
GND
AA23
GND
AA21
GND
AA2
GND
AA18
GND
AA16
GND
A37
GND
A3
GND
CV67
1U_0402_6.3V6K
PX@
CV67
1U_0402_6.3V6K
PX@
1
2
CV63
0.1U_0402_16V7K
PX@
CV63
0.1U_0402_16V7K
PX@
1
2
CV73
1U_0402_6.3V6K
PX@ CV73
1U_0402_6.3V6K
PX@
1
2
RV48
0_0603_5%
PX@
RV48
0_0603_5%
PX@
1 2
CV76
1U_0402_6.3V6K
PX@ CV76
1U_0402_6.3V6K
PX@
1
2
T56 PADT56 PAD
CV64
1U_0402_6.3V6K
PX@
CV64
1U_0402_6.3V6K
PX@
1
2
RV47
0_0603_5%
PX@
RV47
0_0603_5%
PX@
1 2
PART 8 0F 9
CALIBRATION
DP_VDDR DP_VDDC
DP GND
2160834000A10CHELSE_FCBGA962
UVG1H
PART 8 0F 9
CALIBRATION
DP_VDDR DP_VDDC
DP GND
2160834000A10CHELSE_FCBGA962
UVG1H
AM39
DPEF_CALR
AW18
DPCD_CALR
AW28
DPAB_CALR
AL38
DP_VDDR
AM37
DP_VDDR
AG34
DP_VDDR
AF34
DP_VDDR
AJ34
DP_VDDR
AH34
DP_VDDR
AV19
DP_VDDR
AU18
DP_VDDR
AP23
DP_VDDR
AP22
DP_VDDR
AP21
DP_VDDR
AP20
DP_VDDR
AV29
DP_VDDR
AU28
DP_VDDR
AP26
DP_VDDR
AP25
DP_VDDR
AP24
DP_VDDR
AN24
DP_VDDR
AM35
DP_VSSR
AN38
DP_VSSR
AR18
DP_VSSR
AV17
DP_VSSR
AR28
DP_VSSR
AV27
DP_VSSR
AL34
DP_VSSR
AK39
DP_VSSR
AH39
DP_VSSR
AF39
DP_VSSR
AU37
DP_VSSR
AR39
DP_VSSR
AP39
DP_VSSR
AN34
DP_VSSR
AW22
DP_VSSR
AW20
DP_VSSR
AP19
DP_VSSR
AP18
DP_VSSR
AN19
DP_VSSR
AW16
DP_VSSR
AW14
DP_VSSR
AP17
DP_VSSR
AP16
DP_VSSR
AN17
DP_VSSR
AW32
DP_VSSR
AW30
DP_VSSR
AP30
DP_VSSR
AP29
DP_VSSR
AN29
DP_VSSR
AW26
DP_VSSR
AW24
DP_VSSR
AP28
DP_VSSR
AP27
DP_VSSR
AN27
DP_VSSR
AK34
DP_VDDC
AK33
DP_VDDC
AM33
DP_VDDC
AL33
DP_VDDC
AP15
DP_VDDC
AP14
DP_VDDC
AT13
DP_VDDC
AP13
DP_VDDC
AP33
DP_VDDC
AN33
DP_VDDC
AP32
DP_VDDC
AP31
DP_VDDC
CV75
10U_0603_6.3V6M
PX@ CV75
10U_0603_6.3V6M
PX@
1
2
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