ANALOG DEVICES AD5546 Service Manual

Current Output, Parallel Input, 16-/14-Bit

–

Multiplying DACs with Four-Quadrant Resistors

Data Sheet

FEATURES

16-bit resolution
14-bit resolution
2- or 4-quadrant multiplying DAC
±1 LSB DNL
±1 LSB INL
Operating supply voltage: 2.7 V to 5.5 V
Low noise: 12 nV/√Hz
Low power: I

0.5 μs settling time
Built-in R
Built-in 4-quadrant resistors allow 0 V to –10 V, 0 V to +10 V,

or ±10 V outputs
2 mA full-scale current ±20%, with V
Automotive operating temperature: –40°C to +125°C
Compact TSSOP-28 package

APPLICATIONS

Automatic test equipment
Instrumentation
Digitally controlled calibration
Digital waveform generation

Rev. D

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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

= 10 μA

DD

facilitates current-to-voltage conversion

FB

= 10 V

REF

+10V

10V

R1A

+5V

1µF

C1

0.1µF

V

DD

C2

AD5546/AD5556

16-/14-BI T

DATA

WRWRLDAC

LDAC

MSB

Figure 2. 16-/14-Bit, Four-Quadrant Multiplying DAC with a Minimum of External Components

+

OP2177

–

R

COMA

U1

RSRSMSB

U2A

C7

VREFA

R2R1

AD5546/AD5556

FUNCTIONAL BLOCK DIAGRAM

R1 R

R1 R2

WR

AD5546/

DD

AD5556

V

LDAC

DB0 TO DB15

Figure 1. AD5546/AD5556 Simplified Block Diagram

GENERAL DESCRIPTION

The AD5546/AD5556 are precision 16-/14-bit, multiplying, low
power, current output, parallel input digital-to-analog converters
(DACs). They operate from a single 2.7 V to 5.5 V supply with
±10 V multiplying references for four-quadrant outputs. Built­in four-quadrant resistors facilitate the resistance matching and
temperature tracking that minimize the number of components
needed for multiquadrant applications. The feedback resistor
(R

) simplifies the I-V conversion with an external buffer. The

FB

AD5546/AD5556 are packaged in compact TSSOP-28 packages
with operating temperatures from –40°C to +125°C.

The EVAL-AD5546SDZ is available for evaluating DAC perfor-
mance. For more information, see the UG-309 evaluation board
user guide.

R

R

OFSA

FBA

R

R

OFS

FB

I

OUT

GND

16-/14-BIT

DATA

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2004-2011 Analog Devices, Inc. All rights reserved.

+15V

C6

–

OP2177

+

–15V

V+

V–

COM

CONTROL

LOGIC

POR

MSB RS

C4

1µF

C5

0.1µF

U2B

C8

1µF

C9

0.1µF

REF R

OFS

R

OFSRFB

16/14

REGISTER

VOUT

DAC

DAC

03810-024

R

FB

I

OUT

GND

03810-001

AD5546/AD5556 Data Sheet

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1

Functional Block Diagram .............................................................. 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

Electrical Characteristics ............................................................. 3

Timing Diagram ........................................................................... 4

Absolute Maximum Ratings ............................................................ 5

ESD Caution .................................................................................. 5

Pin Configurations and Function Descriptions ........................... 6

Typical Performance Characteristics ............................................. 8

Circuit Operation ........................................................................... 10

Digital-to-Analog (DAC) Converter Section ......................... 10

Digital Section ............................................................................ 11

ESD Protection Circuits ............................................................ 11

Amplifier Selection .................................................................... 11

Reference Selection .................................................................... 11

Applications Information .............................................................. 12

Unipolar Mode ........................................................................... 12

Bipolar Mode .............................................................................. 13

AC Reference Signal Attenuator ............................................... 14

System Calibration ..................................................................... 14

Reference Selection .................................................................... 15

Amplifier Selection .................................................................... 15

Outline Dimensions ....................................................................... 17

Ordering Guide .......................................................................... 17

REVISION HISTORY

11/11—Rev. C to Rev. D

Changes to General Description Section ...................................... 1

Changes to Ordering Guide .......................................................... 18

1/11—Rev. B to Rev. C

Changes to Figure 2 .......................................................................... 1

Changes to Figure 21 ...................................................................... 13

4/10—Re

Changes to Table 1 ............................................................................ 4

Moved Timing Diagram Section and Figure 5 to

Specifications Section....................................................................... 4

Moved Table 5 Through Table 7 to Digital Section Section ....... 7

Replaced Figure 15 and Figure 16 .................................................. 9

Deleted Figure 17 and Figure 18 ..................................................... 9

Added Reference Selection Section, Amplifier Selection Section,

and Table 11 Through Table 13 .................................................... 15

9/09—Rev. 0 to Rev. A

Changes to Features Section............................................................ 1

Changes to Static Performance, Relative Accuracy,

Grade: AD5546C Parameter, Table 1 ............................................. 3

Changes to Ordering Guide .......................................................... 16

1/04—Revision 0: Initial Version

v. A to Rev. B

Rev. D | Page 2 of 20

Data Sheet AD5546/AD5556

SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

VDD = 2.7 V to 5.5 V, I

Table 1.

Parameter Symbol Conditions Min Typ Max Unit

STATIC PERFORMANCE1

Resolution N AD5546, 1 LSB = V

AD5556, 1 LSB = V

Relative Accuracy INL Grade: AD5556C ±1 LSB

Grade: AD5546B ±2 LSB

Grade: AD5546C ±1 LSB

Differential Nonlinearity DNL Monotonic ±1 LSB

Output Leakage Current I

Data = zero scale, TA = TA maximum 20 nA

Full-Scale Gain Error G

Bipolar Mode Gain Error GE Data = full scale ±1 ±4 mV

Bipolar Mode Zero-Scale

Error

Full-Scale Tempco2 TCVFS 1 ppm/°C

REFERENCE INPUT

V

Range V

REF

REF Input Resistance REF 4 5 6 kΩ

R1 and R2 Resistance R1 and R2 4 5 6 kΩ

R1-to-R2 Mismatch ∆(R1 to R2) ±0.5 ±1.5 Ω

Feedback and Offset

Resistance

Input Capacitance2 C

ANALOG OUTPUT

Output Current I

Output Capacitance2 C

LOGIC INPUT AND OUTPUT

Logic Input Low Voltage VIL VDD = 5 V 0.8 V

VDD = 3 V 0.4 V

Logic Input High Voltage VIH VDD = 5 V 2.4 V

VDD = 3 V 2.1 V

Input Leakage Current IIL 10 µA

Input Capacitance2 CIL 10 pF

INTERFACE TIMING

Data to WR Setup Time tDS VDD = 5 V 20 ns

VDD = 3 V 35 ns

Data to WR Hold Time tDH VDD = 5 V 0 ns

VDD = 3 V 0 ns

Pulse Width tWR VDD = 5 V 20 ns

WR

VDD = 3 V 35 ns

LDAC Pulse Width t

VDD = 3 V 35 ns

= virtual GND, GND = 0 V, V

OUT

V

REF

V

REF

Data = zero scale, TA = 25°C 10 nA

OUT

Data = full scale ±1 ±4 mV

FSE

G

Data = full scale ±1 ±2.5 mV

ZSE

–18 +18 V

REF

RFB, R

OFS

5 pF

REF

Data = full scale 2 mA

OUT

Code dependent 200 pF

OUT

2, 3

VDD = 5 V 20 ns

LDAC

= –10 V to 10 V, TA = full operating temperature range, unless otherwise noted.

REF

/216 = 153 µV at

REF

16 Bits

= 10 V

/214 = 610 µV at

REF

14 Bits

= 10 V

8 10 12 kΩ

Rev. D | Page 3 of 20

AD5546/AD5556 Data Sheet

Parameter Symbol Conditions Min Typ Max Unit

t

RS Pulse Width

V

RS

V

t

WR to LDAC Delay Time

V

LWD

V

SUPPLY CHARACTERISTICS

Power Supply Range V

2.7 5.5 V

DD RANGE

Positive Supply Current IDD Logic inputs = 0 V 10 μA
Power Dissipation P

Logic inputs = 0 V 0.055 mW

DISS

Power Supply Sensitivity PSS ∆VDD = ±5% 0.003 %/%

AC CHARACTERISTICS4

Output Voltage Settling

t

S

Time
Reference Multiplying BW BW V
DAC Glitch Impulse Q V
Multiplying Feedthrough

V

OUT/VREF

V

Error
Digital Feedthrough QD

Total Harmonic Distortion THD V
Output Noise Density eN f = 1 kHz, BW = 1 Hz 12 nV/rt Hz

1

All static performance tests (except I

tied to the amplifier output. The op amp +IN is grounded, and the DAC I

2

These parameters are guaranteed by design and are not subject to production testing.

3

All input control signals are specified with tR = tF = 2.5 ns (10% to 90% of 3 V) and timed from a voltage level of 1.5 V.

4

All ac characteristic tests are performed in a closed-loop system using an AD8038 I-V converter amplifier except for THD where an AD8065 was used.

5

C6 is the C6 capacitor shown in Figure 20.

) are performed in a closed-loop system, using an external precision OP97 I-V converter amplifier. The AD554x RFB terminal is

OUT

= 5 V 20 ns

DD

= 3 V 35 ns

DD

= 5 V 0 ns

DD

= 3 V 0 ns

DD

To ±0.1% of full scale, data cycles from zero

0.5 μs

scale to full scale to zero scale

= 100 mV rms, data = full scale, C6 =5.6 pF5 6.8 MHz

REF

= 0 V, midscale minus 1 to midscale −3 nV-s

REF

= 100 mV rms, f = 10 kHz 79 dB

REF

= 1, LDAC toggles at 1 MHz

WR

= 5 V p-p, data = full-scale, f = 1 kHz –103 dB

REF

is tied to the op amp –IN. Typical values represent average readings measured at 25°C.

OUT

7 nV-s

TIMING DIAGRAM

WR

DATA

LDAC

RS

t

WR

t

t

DS

DH

t

LWD

t

LDAC

Figure 3. AD5546/AD5556 Timing Diagram

t

RS

03810-005

Rev. D | Page 4 of 20

Data Sheet AD5546/AD5556

ABSOLUTE MAXIMUM RATINGS

Table 2.

Parameter Rating

VDD to GND –0.3 V, +8 V

RFB, R

, R1, R

OFS

Logic Inputs to GND –0.3 V, +8 V

V (I

) to GND –0.3 V, VDD + 0.3 V

OUT

Input Current to Any Pin Except Supplies ±50 mA

Thermal Resistance (θJA) 128°C

Maximum Junction Temperature (TJ

Operating Temperature Range –40°C to +125°C

Storage Temperature Range –65°C to +150°C

Lead Temperature:

Vapor Phase, 60 s 215°C
Infrared, 15 s 220°C

Package Power Dissipation (T

, and REF to GND –18 V, 18 V

COM

) 150°C

MAX

J MAX

– TA)/θJA

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

ESD CAUTION

Rev. D | Page 5 of 20

AD5546/AD5556 Data Sheet

03810-003

AD5546

TOP VIEW

(Not to S cale)

D7

1

V

DD

28

D6

2

D8

27

D5

3

D9

26

D4

4

D10

25

D3

5

D11

24

D2

6

D12

23

D1

7

D13

22

D0

8

D14

21

R

OFS

9

D15

20

R

FB

10

GND

19

R1

11

RS

18

R

COM

12

MSB

17

REF

13

WR

16

I

OUT

14

LDAC

15

03810-004

AD5556

TOP VIEW

(Not to S cale)

NC = NO CONNECT

D5

1

V

DD

28

D4

2

D6

27

D3

3

D7

26

D2

4

D8

25

D1

5

D9

24

D0

6

D10

23

NC

7

D11

22

NC

8

D12

21

R

OFS

9

D13

20

R

FB

10

GND

19

R1

11

RS

18

R

COM

12

MSB

17

REF

13

WR

16

I

OUT

14

LDAC

15

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

Figure 4. AD5546 Pin Configuration

Figure 5. AD5556 Pin Configuration

Table 3. AD5546 Pin Function Descriptions

Pin No. Mnemonic Description

1 to 8 D7 to D0 Digital Input Data Bits[D7: D0]. The signal level must be ≤ VDD + 0.3 V.
9 R

Bipolar Offset Resistor. Accepts up to ±18 V. In two-quadrant mode, ties to RFB. In four-quadrant mode, ties to R1

OFS

and the external reference.
10 RFB Internal Matching Feedback Resistor. Connects to the output of an external op amp for I-V conversion.
11 R1 Four-Quadrant Resistor R1. In two-quadrant mode, shorts to the REF pin. In four-quadrant mode, ties to R
12 R

Center Tap Point of Two Four-Quadrant Resistors, R1 and R2. In four-quadrant mode, ties to the inverting node of

COM

OFS

.

the reference amplifier. In two-quadrant mode, shorts to the REF pin.
13 REF DAC Reference Input in Two-Quadrant Mode and R2 Terminal in Four-Quadrant Mode. In two-quadrant mode, this

pin is the reference input with constant input resistance vs. code. In four-quadrant mode, this pin is driven by the

external reference amplifier.
14 I

DAC Current Output. Connects to the inverting node of an external op amp for I-V conversion.

OUT

15 LDAC Digital Input Load DAC Control. Signal level must be ≤ VDD + 0.3 V.
16

Write Control Digital Input in Active Low. Transfers shift-register data to the DAC register on the rising edge. The

WR

signal level must be ≤ V

+ 0.3 V.

DD

17 MSB Power-On Reset State. MSB = 0 resets at zero scale; MSB = 1 resets at midscale. The signal level must be

≤ V

+ 0.3 V.

DD

18

Reset in Active Low. Resets to zero scale if MSB = 0, and resets to midscale if MSB = 1. The signal level must be

RS

≤ V

+ 0.3 V.

DD

19 GND Analog and Digital Grounds.
20 to 21 D15 to D14 Digital Input Data Bits[D15:D14]. The signal level must be ≤ VDD + 0.3 V.
22 to 27 D13 to D8 Digital Input Data Bits[D13:D8]. The signal level must be ≤ VDD + 0.3 V.
28 VDD Positive Power Supply Input. Specified range of operation: 2.7 V to 5.5 V.

Table 4. AD5556 Pin Function Descriptions

Pin No. Mnemonic Description

1 to 6 D5 to D0

Digital Input Data Bits[D5:D0]. The signal level must be ≤ V

+0.3 V.

DD

7 to 8 NC No Connection. The user should not connect anything other than dummy pads on these terminals.
9 R

10 RFB Internal Matching Feedback Resistor. Connects to the output of an external op amp for I-V conversion.
11 R1 Four-Quadrant Resistor R1. In two-quadrant mode, shorts to the REF pin. In four-quadrant mode, ties to R
12 R

Bipolar Offset Resistor. Accepts up to ±18 V. In two-quadrant mode, ties to RFB. In four-quadrant mode, ties to R1

OFS

Center Tap Point of Two Four-Quadrant Resistors, R1 and R2. In four-quadrant mode, ties to the inverting node of

COM

and the external reference.

the reference amplifier. In two-quadrant mode, shorts to the REF pin.

Rev. D | Page 6 of 20

OFS

.