Analog Devices AD5273 e Datasheet

64-Position OTP Digital Potentiometer

FEATURES

64 positions
One-time-programmable (OTP)

Resistance setting—low cost alternative over EEMEM

Unlimited adjustments prior to OTP activation
1 kΩ, 10 kΩ, 50 kΩ, 100 kΩ end-to-end terminal resistance
Compact SOT-23-8 standard package
Ultralow power: I
Fast settling time: t

2

C®-compatible digital interface

I
Computer software

= 5 µA maximum

DD

= 5 µs typ during power-up

S

2

replaces µC in

factory programming applications
Wide temperature range: −40°C to +105°C
Low operating voltage: 2.7 V to 5.5 V
OTP validation check function

APPLICATIONS

System calibrations
Electronics level settings
Mechanical potentiometers and trimmer replacement
Automotive electronics adjustments
Transducer circuit adjustments
Programmable filters up to 6 MHz BW

GENERAL DESCRIPTION

The AD5273 is a 64-position, one-time-programmable (OTP)
digital potentiometer
achieve permanent program setting. This device performs the
same electronic adjustment function as most mechanical
trimmers and variable resistors. It allows unlimited adjustments
before permanently setting the resistance values. The AD5273 is
programmed using a 2-wire, I
During write mode, a fuse blow command is executed after the
final value is determined, thereby freezing the wiper position at
a given setting (analogous to placing epoxy on a mechanical
trimmer). When permanent setting is achieved, the value will
not change, regardless of the supply variations or environmental
stresses under normal operating conditions. To verify the success
of permanent programming, Analog Devices patterned the OTP
validation such that the fuse status can be discerned from two
validation bits in the read mode.

4

that employs fuse link technology to

1

set-and-forget

3

2

C-compatible digital control.

AD5273

FUNCTIONAL BLOCK DIAGRAM

SCL

SDA

AD0

V

GND

DD

I2C INTERFACE

AND

CONTROL LOGIC

AD5273

FUSE

LINK

Figure 1.

WIPER

REGISTER

In addition, for applications that program the AD5273 at the
factory, Analog Devices offers device programming software

running on Windows

® NT, Windows 2000, and Windows XP

operating systems. This software application effectively replaces
any external I

2

C controllers, which in turn enhances the user

system’s time-to-market.

The AD5273 is available in 1 kΩ, 10 kΩ, 50 kΩ, and 100 kΩ
resistances and in a compact SOT-23 8-lead standard package.
It operates from −40°C to +105°C.

Along with its unique OTP feature, the AD5273 lends itself
well to general digital potentiometer applications due to its
effective resolution, array resistance options, small footprint,
and low cost.

An AD5273 evaluation kit and software are available. The kit
includes the connector and cable that can be converted for
factory programming applications.

For applications that require dynamic adjustment of resistance
settings with nonvolatile EEMEM, users should refer to the
AD523x and AD525x families of nonvolatile memory digital
potentiometers.

1

OTP allows unlimited adjustments before permanent setting.

2

ADI cannot guarantee the software to be 100% compatible to all systems

due to the wide variation in computer configurations.

3

Applies to 1 kΩ parts only.

4

The terms digital potentiometer, VR, and RDAC are used interchangeably.

A

W

B

03224-001

2

Rev. E

Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone]
Fax: [phone] © 2005 Analog Devices, Inc. All rights reserved.

www.analog.com

AD5273

TABLE OF CONTENTS

Specifications..................................................................................... 3

2

I

C Controller Programming.................................................... 17

Absolute Maximum Ratings............................................................ 5

Pin Configuration and Function Descriptions............................. 6

Typical Performance Characteristics ............................................. 7

Theory of Operation ...................................................................... 12

One-Time Programming........................................................... 12

Variable Resistance and Voltage for Rheostat Mode ............. 13

Variable Resistance and Voltage for Potentiometer Mode.... 14

ESD Protection ........................................................................... 14

Terminal Voltage Operating Range.......................................... 14

Power-Up/Power-Down Sequences ......................................... 14

Power Supply Considerations ................................................... 15

Controlling the AD5273................................................................ 16

Software Programming.............................................................. 16

REVISION HISTORY

1/05—Rev. D to Rev. E

Changes to Features.......................................................................... 1

Changes to Specifications................................................................ 3

Changes to Table 3............................................................................ 6

Changes to Power Supply Consideration Section ...................... 15

Changes to Figure 35 and Figure 37............................................. 15

Changes to DAC Section ............................................................... 19

Changes to Level Shift for Different Voltages

Operation Section..................................................................... 20

Deleted the Resistance Scaling Section........................................ 20

Deleted the Resolution Enhancement Section ........................... 20

12/04—Rev. C to Rev. D

Updated Format..................................................................Universal

Changes to Specifications................................................................ 3

Changes to Theory of Operation Section.................................... 13

Changes to Power Supply Consideration Section ...................... 15

Changes to Figure 35, Figure 36, and Figure 37 ......................... 15

11/03—Rev. B to Rev. C

Changes to SDA BIT DEFINITIONS

AND DESCRIPTIONS .................................................................. 10

Changes to ONE-TIME PROGRAMMING (OTP) section..... 11

Changes to Table III .......................................................................11

Changes to POWER SUPPLY CONSIDERATIONS ................. 13

Changes to Figures 8, 9, and 10 .................................................... 13

Controlling Two Devices on One Bus..................................... 18

Applications..................................................................................... 19

DAC.............................................................................................. 19

Programmable Voltage Source with Boosted Output ........... 19

Programmable Current Source ................................................ 19

Gain Control Compensation.................................................... 19

Programmable Low-Pass Filter ................................................ 20

Level Shift for Different Voltages ............................................. 20

RDAC Circuit Simulation Model............................................. 20

Evaluation Board ............................................................................ 21

Outline Dimensions ....................................................................... 22

Ordering Guide .......................................................................... 22

10/03—Rev. A to Rev. B

Changes to FEATURES ....................................................................1

Changes to APPLICATIONS...........................................................1

Changes to SPECIFICATIONS .......................................................2

Changes to ABSOLUTE MAXIMUM RATINGS.........................4

Changes to PIN FUNCTION DESCRIPTIONS...........................5

Changes to TPCs 7, 8, 13, and 14 captions ....................................7

Deleted TPC 20; renumbered successive TPCs.............................9

Change to TPC 21 caption ...............................................................9

Change to the SDA BIT DEFINITIONS

AND DESCRIPTIONS.................................................................. 10

Replaced THEORY OF OPERATION section........................... 11

Replaced DETERMINING THE VARIABLE RESISTANCE

AND VOLTAGE section ............................................................... 11

Replaced ESD PROTECTION section ........................................ 12

Replaced TERMINAL VOLTAGE OPERATING

RANGE section .............................................................................. 12

Replaced POWER-UP SEQUENCE section............................... 12

Replaced POWER SUPPLY CONSIDERATIONS section ....... 13

Changes to APPLICATIONS section .......................................... 16

Change to Equation 9..................................................................... 17

Deleted Digital Potentiometer Family Selection Guide ............ 19

6/03—Rev. 0 to Rev. A

Change to SPECIFICATIONS.........................................................2

Change to POWER SUPPLY CONSIDERATIONS section..... 12

Updated OUTLINE DIMENSIONS ............................................ 20

Rev. E | Page 2 of 24

AD5273

SPECIFICATIONS

VDD = 2.7 V to 5.5 V, VA < VDD, VB = 0 V, −40°C < TA < +105°C, unless otherwise noted.

Table 1. Electrical Characteristics 1 kΩ, 10 kΩ, 50 kΩ, 100 kΩ Versions

Parameter Symbol Conditions Min

DC CHARACTERISTICS

RHEOSTAT MODE
Resolution N
Resistor Differential Nonlinearity

2

10 kΩ, 50 kΩ, 100 kΩ
1 kΩ

Resistor Nonlinearity2 R-INL

10 kΩ, 50 kΩ, 100 kΩ
1 kΩ

Nominal Resistance Tolerance

3

10 kΩ, 50 kΩ, 100 kΩ

Nominal Resistance, 1 kΩ R
Rheostat Mode Temperature Coefficient4 (∆RAB/RAB)/∆T Wiper = NC
Wiper Resistance R

DC CHARACTERISTICS

POTENTIOMETER DIVIDER MODE
Differential Nonlinearity

5

Integral Nonlinearity5
Voltage Divider4
Temperature Coefficient (∆VW/VW)/ ∆T Code = 0x20 10 ppm/°C
Full-Scale Error V

10 kΩ, 50 kΩ, 100 kΩ −1 0 LSB
1 kΩ −6 0 LSB

Zero-Scale Error V

10 kΩ, 50 kΩ, 100 kΩ 0 1 LSB
1 kΩ 0 5 LSB

RESISTOR TERMINALS

Voltage Range

6

Capacitance7 A, B CA, C
Capacitance7 W
Common-Mode Leakage I

DIGITAL INPUTS AND OUTPUTS

Input Logic High (SDA and SCL)

8

Input Logic Low (SDA and SCL)8
Input Logic High (ADO) V
Input Logic Low (ADO) V
Input Logic Current I
Input Capacitance7 C
Output Logic Low (SDA) V
Three-State Leakage Current I
Output Capacitance7

POWER SUPPLIES

Power Supply Range V
OTP Power Supply

8, 9

Supply Current I
OTP Supply Current
Power Dissipation

8, 10

11

Power Supply Sensitivity PSRR RAB = 1 kΩ −0.3 +0.3 %/%

PSRR RAB = 10 kΩ, 50 kΩ, 100 kΩ −0.05 +0.05 %/%

R-DNL

RWB, VA = NC −0.5 +0.05 +0.5 LSB
RWB, VA = NC −1 +0.25 +1 LSB

∆RAB/R

AB

AB

RWB, VA = NC −0.5 +0.10 +0.5 LSB
RWB, VA = NC −5 +2 +5 LSB
TA = 25°C

−30

0.8 1.2 1.6 kΩ

W

IW = VDD/R, VDD = 3 V or 5 V

DNL −0.5 +0.1 +0.5 LSB
INL −0.5 +0.5 LSB

Code = 0x3F −1 0 LSB

WFSE

Code = 0x00 −6 0 LSB

WZSE

VA,VB, V

B

C

W

CM

V

IH

V

IL

IH

IL

IL

IL

OL

OZ

C

OZ

DD

V

DD_OTP

DD

I

DD_OTP

P

DISS

W

GND V
f = 5 MHz, measured to GND, code = 0x20 25 pF
f = 1 MHz, measured to GND, code = 0x20 55 pF
VA = VB = V

W

0.7 V

1 nA

DD

−0.5 0.3 V

3.0 V
VIN = 0 V or 5 V 0 0.4 V

0.01 1 µA
3 pF

0.4 V
±1 µA
3 pF

2.7 5.5 V
TA = 25°C 5.25 5.5 V
VIH = 5 V or VIL = 0 VIL = 0 V 0.1 5 µA
TA = 25°C, V

= 5.5 V 100 mA

DD_OTP

VIH = 5 V or VIL = 0 V, VIL = 0 V, VDD = 5 V 0.2 0.03 mW

1

Typ

Max Unit

6 Bits

LSB

300

+30 %

ppm/°C

60 100 Ω

DD

V

VDD + 0.5 V

V

DD

DD

V

Rev. E | Page 3 of 24

AD5273

Parameter Symbol Conditions Min

DYNAMIC CHARACTERISTICS

7, 12, 13

Bandwidth, −3 dB BW_1 kΩ RAB = 1 kΩ, code = 0x20

Total Harmonic Distortion THD
Adjustment Settling Time t

OTP Settling Time

14

Power-Up Settling Time—After Fuses

Blown

Resistor Noise Voltage e

INTERFACE TIMING CHARACTERISTICS

(Applies to All Parts

7, 13, 15

)
SCL Clock Frequency f
t

Bus Free Time Between Stop and

BUF

BW_10 kΩ R
BW_50 kΩ R
BW_100 kΩ R

W

S1

t

S_OTP

t

S2

N_WB

SCL

t

1

= 10 kΩ, code = 0x20

AB

= 50 kΩ, code = 0x20

AB

= 100 kΩ, code = 0x20

AB

VA = 1 V rms, RAB = 1 kΩ, VB = 0 V, f = 1 kHz
VA = 5 V ± 1 LSB error band, VB = 0,

measured at V

W

VA = 5 V ± 1 LSB error band, VB = 0,
measured at V

, VDD = 5 V

W

VA = 5 V ± 1 LSB error band, VB = 0,
measured at V

, VDD = 5 V

W

RAB = 1 kΩ, f = 1 kHz, code = 0x20
R

= 20 kΩ, f = 1 kHz, code = 0x20

AB

R

= 50 kΩ, f = 1 kHz, code = 0x20

AB

R

= 100 kΩ, f = 1 kHz, code = 0x20

AB

1.3

1

Typ

6000
600
110
60

0.05
5

400

5

3
13
20

Max Unit

400 kHz

kHz
kHz
kHz
kHz
%
µs

ms

µs

nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz

µs

Start

t

Hold Time (Repeated Start) t

HD; STA

2

After this period, the first clock pulse is

0.6

µs

generated.

t

Low Period of SCL Clock t

LOW

t

High Period of SCL Clock t

HIGH

t

Setup Time for Start Condition t

SU; STA

t

Data Hold Time t

HD; DAT

t

Data Setup Time t

SU; DAT

tF Fall Time of Both SDA and SCL Signals t
tR Rise Time of Both SDA and SCL Signals t
t

Setup Time for Stop Condition t

SU; STO

3

4

5

6

7

8

9

10

1.3

0.6

0.6

0.1

0.6

50 µs

0.9 µs

0.3 µs

0.3 µs

µs

µs

µs

1

Typicals represent average readings at 25°C, VDD = 5 V, and VSS = 0 V.

2

Resistor position nonlinearity error, R-INL, is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper

positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic.

3

VAB = VDD, Wiper (VW) = no connect.

4

∆RWB/∆T = ∆RWA/∆T. Temperature coefficient is code-dependent; see the Typi . cal Performance Characteristics

5

INL and DNL are measured at VW. INL V with the RDAC configured as a potentiometer divider similar to a voltage output DAC. VW with the RDAC configured as a

potentiometer divider similar to a voltage output DAC. V

6

Resistor Terminals A, B, and W have no limitations on polarity with respect to each other.

7

Guaranteed by design; not subject to production test.

8

The minimum voltage requirement on the VIH is 0.7 V × VDD. For example, VIH min = 3.5 V when VDD = 5 V. It is typical for the SCL and SDA resistors to be pulled up to

. However, care must be taken to ensure that the minimum VIH is met when the SCL and SDA are driven directly from a low voltage logic controller without pull-up

V

DD

resistors.

9

Different from the operating power supply; the power supply for OTP is used one time only.

10

Different from the operating current; the supply current for OTP lasts approximately 400 ms for the one time it is needed.

11

P

is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.

DISS

12

Bandwidth, noise, and settling time depend on the terminal resistance value chosen. The lowest R value results in the fastest settling time and highest bandwidth.
The highest R value results in the minimum overall power consumption.

13

All dynamic characteristics use VDD = 5 V.

14

Different from the settling time after the fuses are blown. The OTP settling time occurs once only.

15

See for the location of the measured values. Figure 28

= VDD and VB = 0 V. DNL specification limits of ±1 LSB max are guaranteed monotonic operating conditions.

A

Rev. E | Page 4 of 24

AD5273

ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted.

Table 2.

Parameter Min

VDD to GND −0.3 V, +6.5 V
VA, VB, VW to GND GND, V
Maximum Current

DD

IWB, IWA Pulsed ±20 mA
IWB Continuous (RWB ≤ 1 kΩ, A Open)

1

±4 mA
IWA Continuous (RWA ≤ 1 kΩ, B Open) ±4 mA
Digital Input and Output Voltage to GND 0 V, V

DD

Operating Temperature Range −40°C to +105°C
Maximum Junction Temperature (TJ max) 150°C
Storage Temperature −65°C to +150°C
Lead Temperature (Soldering, 10 sec) 300°C
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C
Thermal Resistance θJA, SOT-23

2

230°C/W

1

Maximum terminal current is bounded by the maximum current handling

of the switches, the maximum power dissipation of the package; the maxi­mum applied voltage across any two of the A, B, and W terminals at a given
resistance.

2

Package power dissipation = (TJ max – TA)/θJA.

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.

Rev. E | Page 5 of 24

AD5273

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

W

1

AD5273

2

V

DD

GND

SCL

TOP VIEW

3

(Not to Scale)

4

Figure 2. Pin Configuration

Table 3. Pin Function Descriptions

Pin No. Mnemonic Description

1 W Wiper Terminal W. GND ≤ VW ≤ VDD.
2 VDD

Positive Power Supply. Specified for non-OTP operation from 2.7 V to 5.5 V. For OTP programming, V

must be a minimum of 5.25 V and a have 100 mA driving capability.
3 GND Common Ground.
4 SCL

5 SDA

Serial Clock Input. Requires a pull-up resistor. If it is driven directly from a logic controller without the pull-up

resistor, ensure that V

IH min is 0.7 V × VDD.

Serial Data Input/Output. Requires a pull-up resistor. If it is driven directly from a logic controller without the

pull-up resistor, ensure that V

IH min is 0.7 V × VDD.

6 AD0 I2C Device Address Bit. Allows a maximum of two AD5273s to be addressed.
7 B Resistor Terminal B. GND ≤ VB ≤ VDD.
8 A Resistor Terminal A. GND ≤ VA ≤ VDD.

A

8

B

7

AD0

6

SDA

5

03224-002

DD_OTP

Rev. E | Page 6 of 24

AD5273

TYPICAL PERFORMANCE CHARACTERISTICS

0.5

0.3

0.1

VDD = 3V

RAB = 10kΩ

= 25°C

T

A

0.10

0.06

0.02

RAB = 10kΩ

TA = –40°C

TA = +85°C

TA = +125°C

–0.1

V

= 5V

RHEOSTAT MODE INL (LSB)

–0.3

–0.5

0648

Figure 3. R

0.25

0.15

0.05

–0.05

RHEOSTAT MODE DNL (LSB)

–0.15

–0.25

064

8

DD

16 24 32 40 48 56

CODE (Decimal)

vs. Code vs. Supply Voltages

INL

RAB = 10kΩ

= 25°C

T

A

VDD = 5V

V

= 3V

DD

16 24 32 40 48 56

CODE (Decimal)

03224-003

03224-004

–0.02

–0.06

POTENTIOMETER MODE DNL (LSB)

–0.10

0.10

0.06

0.02

–0.02

–0.06

POTENTIOMETER MODE INL (LSB)

–0.10

0648

Figure 6. DNL vs. Code vs. Temperature

0648

T

= +25°C

A

16 24 32 40 48 56

CODE (Decimal)

RAB = 10kΩ

= 25°C

T

A

3V

5V

16 24 32 40 48 56

CODE (Decimal)

03224-006

03224-007

0.10

0.06

0.02

–0.02

–0.06

POTENTIOMETER MODE INL (LSB)

–0.10

Figure 4. R

0648

vs. Code vs. Supply Voltages

DNL

TA = +85°C

T

= +25°C

A

16 24 32 40 48 56

CODE (Decimal)

Figure 5. INL vs. Code vs. Temperature

RAB = 10kΩ

TA = +125°C

TA = –40°C

03224-005

Rev. E | Page 7 of 24

0.10

0.06

0.02

–0.02

–0.06

POTENTIOMETER MODE DNL (LSB)

–0.10

Figure 7. INL vs. Code vs. Supply Voltages

3V

0648

16 24 32 40 48 56

CODE (Decimal)

Figure 8. DNL vs. Code vs. Supply Voltages

5V

RAB = 10kΩ

= 25°C

T

A

03224-008

AD5273

0.025

0.020

0.015

0.010

0.005

POTENTIOMETER MODE LINEARITY (LSB)

0

0

SUPPLY VOLTAGE (V)

Figure 9. INL vs. Supply Voltage

TA = 25°C

= 10kΩ

R

AB

CODE = 0x20

61234 5

03224-009

1.0

0.9

0.8

0.7

0.6

0.5

ZSE (LSB)

0.4

0.3

0.2

0.1

0

–40 100–20

RAB = 10kΩ

VDD = 3V

VDD = 5V

020406080

TEMPERATURE (°C)

Figure 12. Zero-Scale Error

03224-012

0.4
TA = 25°C

= 10kΩ

R

AB

0.3

0.2

0.1

0

RHEOSTAT MODE LINEARITY (LSB)

–0.1

06

0
–0.1

–0.2

–0.3

–0.4

–0.5

FSE (LSB)

–0.6
–0.7

–0.8
–0.9

–1.0

–40 100–20

1234 5

SUPPLY VOLTAGE (V)

Figure 10. R

VDD = 3V

vs. Supply Voltage

INL

020406080

TEMPERATURE (°C)

CODE = 0x20

03224-010

RAB = 10kΩ

VDD = 5V

03224-011

Figure 11. Full-Scale Error

0.16
VDD = 5.5V

= 10kΩ

R

AB

0.14

0.12

0.10

0.08

SUPPLY CURRENT (µA)

0.06

0.04
–55 115–35 –15

Figure 13. Supply Current vs. Temperature

10

1

0.1

0.01

SUPPLY CURRENT (mA)

0.001

0.0001
061

Figure 14. Supply Current vs. Digital Input Voltage

5 25456585105

TEMPERATURE (°C)

TA = 25°C
R

= 10kΩ

AB

VDD = 5V

VDD = 2.7V

2345

INPUT LOGIC VOLTAGE (V)

ALL DIGITAL
PINS TIED
TOGETHER

03224-013

03224-014

Rev. E | Page 8 of 24