Xilinx Spartan-3A Starter Kit Board, Spartan-3AN Starter Kit Board User Manual

Spartan-3A/3AN Starter Kit Board User Guide

UG334 (v1.0) May 28, 2007
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Xilinx is disclosing this Document and Intellectual Property (hereinafter “the Design”) to you for use in the development of designs to operate on, or interface with Xilinx FPGAs. Except as stated herein, none of the Design may be copied, reproduced, distributed, republished, downloaded, displayed, posted, or transmitted in any form or by any means including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise, without the prior written consent of Xilinx. Any unauthorized use of the Design may violate copyright laws, trademark laws, the laws of privacy and publicity, and communications regulations and statutes.
Xilinx does not assume any liability arising out of the application or use of the Design; nor does Xilinx convey any license under its patents, copyrights, or any rights of others. You are responsible for obtaining any rights you may require for your use or implementation of the Design. Xilinx reserves the right to make changes, at any time, to the Design as deemed desirable in the sole discretion of Xilinx. Xilinx assumes no obligation to correct any errors contained herein or to advise you of any correction if such be made. Xilinx will not assume any liability for the accuracy or correctness of any engineering or technical support or assistance provided to you in connection with the Design.
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The Design is not designed or intended for use in the development of on-line control equipment in hazardous environments requiring fail­safe controls, such as in the operation of nuclear facilities, aircraft navigation or communications systems, air traffic control, life support, or weapons systems (“High-Risk Applications”). Xilinx specifically disclaims any express or implied warranties of fitness for such High-Risk Applications. You represent that use of the Design in such High-Risk Applications is fully at your risk.
© 2007 Xilinx, Inc. All rights reserved. XILINX, the Xilinx logo, and other designated brands included herein are trademarks of Xilinx, Inc. PCI Express is a registered trademark of PCI-SIG. All other trademarks are the property of their respective owners.
Revision History
The following table shows the revision history for this document.
Date Version Revision
05/28/07 1.0 Initial Xilinx release.
Spartan-3A/3AN Starter Kit Board User Guide www.xilinx.com UG334 (v1.0) May 28, 2007

Table of Contents

Preface: About This Guide
Acknowledgments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Guide Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Additional Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Chapter 1: Introduction and Overview
Getting Started. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Operating the Default Demonstration Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
VGA Display . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Rotary Knob/Push-Button Menu System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Select MultiBoot Configuration Image . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Scroll or Rotate Graphic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Scroll or Scale Graphic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Restart AutoPilot, Speaker Volume Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
LCD Screen Control Option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Power-Saving Suspend Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
RS-232 Serial Port Control Option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Key Components and Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Design Trade-Offs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Configuration Methods Galore! . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Voltages for all Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Spartan-3A/3AN Starter Kit Design Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Choose a Spartan-3 Generation Starter Kit Board for your Needs . . . . . . . . . . . . . 22
Spartan-3A/3AN FPGA Features and Embedded Processing Functions . . . . . . . . . . 22
Other Spartan-3 Generation Development Boards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Spartan-3A and Spartan-3AN FPGAs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Related Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Chapter 2: Switches, Buttons, and Rotary Knob
Slide Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Locations and Labels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
UCF Location Constraints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
SUSPEND Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Push-Button Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Locations and Labels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
PROG_B Push-Button Switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
UCF Location Constraints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Rotary Push-Button Switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Locations and Labels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Push-Button Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
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Rotary Shaft Encoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
UCF Location Constraints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Discrete LEDs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Locations and Labels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
UCF Location Constraints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Optional Discrete LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
AWAKE LED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
INIT_B LED. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
UCF Location Constraints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Chapter 3: Clock Sources
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Clock Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
50 MHz On-Board Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Auxiliary Clock Oscillator Socket . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
SMA Clock Input or Output Connector. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
UCF Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Location . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Clock Period Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Related Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
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Chapter 4: FPGA Configuration Options
Configuration Mode Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Xilinx Platform Flash Configuration PROM(s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
PROG Push-Button Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
DONE Pin LED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Programming the FPGA or Platform Flash PROM via USB . . . . . . . . . . . . . . . . . . . 41
Connecting the USB Cable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Platform Flash Programming Example in Spartan-3 Generation Configuration
User Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Chapter 5: Character LCD Screen
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Character LCD Interface Signals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Voltage Compatibility. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
UCF Location Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
LCD Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
DD RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
CG ROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
CG RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Command Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Disabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Clear Display . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Return Cursor Home . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Entry Mode Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
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Display On/Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Cursor and Display Shift . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Function Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Set CG RAM Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Set DD RAM Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Read Busy Flag and Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Write Data to CG RAM or DD RAM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Read Data from CG RAM or DD RAM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Four-Bit Data Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Transferring Eight-Bit Data over the Four-Bit Interface . . . . . . . . . . . . . . . . . . . . . . . . . 53
Initializing the Display . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Power-On Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Display Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Writing Data to the Display . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Disabling the Unused LCD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Related Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Chapter 6: VGA Display Port
Signal Timing for a 60 Hz, 640x480 VGA Display . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
VGA Signal Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
UCF Location Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Related Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Chapter 7: RS-232 Serial Ports
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
UCF Location Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Chapter 8: PS/2 Mouse/Keyboard Port
Keyboard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Mouse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Voltage Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Adding a Second PS/2 Port Using a Y-Splitter Cable . . . . . . . . . . . . . . . . . . . . . . . . . 69
UCF Location Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Related Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Chapter 9: Analog Capture Circuit
Digital Outputs from Analog Inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Programmable Pre-Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Programmable Gain. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
SPI Control Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
UCF Location Constraints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Analog-to-Digital Converter (ADC). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
SPI Control Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
UCF Location Constraints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
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Connecting Analog Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Related Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Chapter 10: Digital-to-Analog Converter (DAC)
SPI Communication. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Interface Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
SPI Communication Details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Communication Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Specifying the DAC Output Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
UCF Location Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Related Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Chapter 11: Parallel NOR Flash PROM
Flash Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Shared SPI Flash and Platform Flash Data Line . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
UCF Location Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Setting the FPGA Mode Select Pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Creating and Programming Configuration Images for Parallel Flash . . . . . . . . . 89
Related Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
R
Chapter 12: SPI Serial Flash
SPI Flash PROM Select Jumpers (J1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Shared SPI Flash and Platform Flash Data Line . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Jumper Settings to Configure FPGA from Selected SPI Flash PROM . . . . . . . . . . . . . 94
UCF Location Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Creating and Programming Configuration Images for SPI Serial Flash . . . . . . . 95
SPI Flash PROM Programming Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Direct Programming Method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Using Embedded USB JTAG Programmer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Using a Separate JTAG Parallel Programming Cable (Optional) . . . . . . . . . . . . . . . . . . 97
Direct SPI Flash Programming Using iMPACT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Indirect Programming Method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Jumper Settings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Indirect SPI Flash Programming Using iMPACT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
Related Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
Chapter 13: DDR2 SDRAM
DDR2 SDRAM Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
UCF Location Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
Reserve FPGA V
Special Layout Recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
REF
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Related Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
Chapter 14: 10/100 Ethernet Physical Layer Interface
Ethernet PHY Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
MicroBlaze Ethernet IP Cores . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
UCF Location Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
Related Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
Chapter 15: Expansion Connectors
Hirose 100-Pin FX2 Edge Connector (J17) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
Expansion Connector Compatibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
Voltage Supplies to the Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
Connector Pinout and FPGA Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
FX2-Connector Compatible Boards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
Mating Receptacle Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
UCF Location Constraints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
Differential I/O Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
Using Differential Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
Using Differential Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
Differential Trace Layout Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
34-Conductor Cable Assemblies (2x17) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
UCF Location Constraints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
Six-Pin Accessory Headers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
J18 Header . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
J19 Header . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
J20 Header . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
Digilent Peripheral Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
UCF Location Constraints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
Connectorless Debugging Port Landing Pads (J34) . . . . . . . . . . . . . . . . . . . . . . . . . . 133
Chapter 16: Miniature Stereo Audio Jack
Supported Audio Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
FPGA Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
UCF Location Constraints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
Related Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
Chapter 17: Voltage Supplies
Measuring Power Across Voltage Supply Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . 139
I2C Voltage Adjustment Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
Possible Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
Restoring Default Voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
UCF Location Constraints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
Related Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
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About This Guide

This user guide provides basic information on the Spartan™-3A/3AN Starter Kit board capabilities, functions, and design. It includes general information on how to use the various peripheral functions included on the board. For detailed reference designs, including VHDL or Verilog source code, please visit the following web link.
Spartan-3A/3AN Starter Kit Board Web Page
http://www.xilinx.com/s3
There are multiple versions of the Spartan-3A/3AN Starter Kit. This document describes the three kits that include the “Revision D” Spartan-3A/3AN Starter Kit Board, which is an updated version of the “Revision C” Spartan-3A Starter Kit Board. The following table describes the different kits.
Preface
astarter and http://www.xilinx.com/s3anstarter
Feature
Part
Number
Device XC3S700AN XC3S700A
Board
Revision
DDR2
Memory
User
Guide
Web Pa g e www.xilinx.com/s3anstarter www.xilinx.com/s3addr2 www.xilinx.com/s3astarter
Spartan-3AN
Starter Kit
HW-SPAR3AN-SK-UNI-G
Supported with 133 MHz crystal oscillator in auxiliary socket
Almost all functionality is identical between the Revision C and Revision D boards, although the silkscreen changes make the two boards look different. The pictures used in this document are from the Revision D board. If you are using the original Revision C version of the board, refer to highlights where to find the board revision code on a Revision C board.
Spartan-3A DDR2 SDRAM Interface Development Kit
HW-SPAR3ADDR2-DK-
UNI-G
Revision D Revision C
UG334 (this document) UG330
UG330 for pictures and documentation. The following figure
Spartan-3A Starter
Kit, Revision D
HW-SPAR3A-SK-UNI-G
Spartan-3A Starter Kit,
Revision C
Requires board
modification for
improved performance
Spartan-3A/3AN Starter Kit Board User Guide www.xilinx.com 9
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Preface: About This Guide

Acknowledgments

Xilinx wishes to thank the following companies for their support of the Spartan-3A/3AN Starter Kit board:
STMicroelectronics for the 32 Mbit parallel NOR Flash and 16 Mbit SPI serial Flash memories
Atmel for the 16 Mbit SPI serial DataFlash memory
Linear Technology for the SPI-compatible A/D and D/A converters and the
programmable pre-amplifier
SMSC for the 10/100 Ethernet PHY
National Semiconductor for the four-rail voltage regulators that power the FPGA and
and all peripheral components
Xilinx, Inc. Configuration Solutions Division for the XCF04S Platform Flash PROM and support for the embedded USB programmer
R
Board Revision Code
REV C
UG334_01_052707

Guide Contents

This manual contains the following chapters:
Chapter 1, “Introduction and Overview,” provides an overview of the key features of
Chapter 2, “Switches, Buttons, and Rotary Knob,” defines the switches, buttons, and
Chapter 3, “Clock Sources,” describes the various clock sources available on the
Chapter 4, “FPGA Configuration Options,” describes the configuration options for
Chapter 5, “Character LCD Screen,” describes the functionality of the character LCD
Chapter 6, “VGA Display Port,” describes the functionality of the VGA port.
Chapter 7, “RS-232 Serial Ports,” describes the functionality of the RS-232 serial ports.
Chapter 8, “PS/2 Mouse/Keyboard Port,” describes the functionality of the PS/2
Chapter 10, “Digital-to-Analog Converter (DAC),” describes the functionality of the
the Spartan-3A/3AN Starter Kit board.
knobs present on the Spartan-3A/3AN Starter Kit board.
Spartan-3A/3AN Starter Kit board.
the FPGA on the Spartan-3A/3AN Starter Kit board.
screen.
mouse and keyboard port.
D/A converter.
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Chapter 9, “Analog Capture Circuit,” describes the functionality of the A/D converter
with a programmable gain pre-amplifier.
Chapter 11, “Parallel NOR Flash PROM,” describes the functionality of the
STMicroelectronics parallel NOR PROM.
Chapter 12, “SPI Serial Flash,” describes the functionality of the SPI Serial Flash
memory interface.
Chapter 13, “DDR2 SDRAM,” describes the functionality of the DDR2 SDRAM memory interface.
Chapter 14, “10/100 Ethernet Physical Layer Interface,” describes the functionality of
the 10/100Base-T Ethernet physical layer interface.
Chapter 15, “Expansion Connectors,” describes the various connectors available on
the Spartan-3A/3AN Starter Kit board.
Chapter 16, “Miniature Stereo Audio Jack,” describes the audio interface.
Chapter 17, “Voltage Supplies,” describes the board’s power distribution system.

Additional Resources

To find additional documentation, see the Xilinx website at:
Additional Resources
http://www.xilinx.com/literature
.
To search the Answer Database of silicon, software, and IP questions and answers, or to create a technical support WebCase, see the Xilinx website at:
h
ttp://www.xilinx.com/support.
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Introduction and Overview

Thank you for purchasing the Xilinx Spartan™-3A/3AN Starter Kit. The board is invaluable to develop a Spartan-3A or Spartan-3AN FPGA application.

Getting Started

The Spartan-3A/3AN Starter Kit board is ready for use, right out of the box. The design stored in external Flash exercises the various I/O devices, such as the VGA display and serial ports. In addition it demonstrates new FPGA features, such as selectable MultiBoot and the power-saving Suspend mode.
To start using the board, follow the simple steps outlined in Figure 1-1.
Chapter 1
CHECK JUMPER SETTINGS!
1
Connect AC wall adapter.
5
Turn on power switch.
6
Optional: Connect VGA display.
2
3
RS-232
PS/2
10
9
Optional: Connect headphones
or amplified speakers
4
Set SUSPEND switch
to RUN position.
8
See messages and
7
instructions on LCD character display.
Figure 1-1: Powering Up the Starter Kit Board
1. Double-check the position of the board jumpers, as shown in Figure 1-2, page 14. These settings are required for the demonstration design to configure correctly.
2. Optionally connect a VGA display device. The display device can be a CRT, a flat­panel, or even a projector.
3. Optionally connect headphones or amplified speakers to the audio jack.
4. Set the SUSPEND switch to the “RUN” position.
5. Connect the included AC adapter to wall power and also to the board. The AC adapter also includes attachments to support worldwide locals.
Control operation using rotary / push-button switch.
UG334_c1_01_052407
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Chapter 1: Introduction and Overview
6. Turn on the power switch.
7. The character LCD and VGA display, if connected, display various informational messages and instructions. If an audio device is connected, the board offers words of welcome in a variety of languages.
8. Use the rotary/push-button switch to control various board functions.
9. Optionally connect a PS/2-style keyboard to support one of the included demonstrating designs.
10. Optionally connect a PC directly to the board using a standard 9-pin serial cable.
Power Supply Jumpers
(all jumpers installed)
Platform Flash Jumper
(jumper removed)
DONE
CE PROM
GND
J46
R
SPI Flash Select Jumpers
(both jumpers installed, vertically)
J1
J4 2
J13
J12
J10 J9
J4 1
J40
J11
M0 M1
M2
J26
FPGA Mode Select Jumpers
(bottom two jumpers installed)
(SPI Mode)
UG334_c1_02_052707
Figure 1-2: Default Jumper Settings for Starter Kit Board
For more information on the demonstration design, visit the Design Examples web page:
Spartan-3A/3AN Starter Kit Demo Design Overview
www.xilinx.com/products/boards/s3astarter/reference_designs.htm#demo
Restoring the “Out of the Box” Flash Programming
www.xilinx.com/products/boards/s3astarter/reference_designs.htm#out
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Operating the Default Demonstration Design

Operating the Default Demonstration Design
The demonstration design programmed onto the Spartan-3A/3AN Starter Kit board provides various output information, depending on what I/O or display devices are connected. The VGA and audio ports provide the richest experience.

VGA Display

If a VGA display is connected to the board, then the Starter Kit board displays graphics similar to that shown in Figure 1-3.
Until one of the four push buttons around the rotary knob (Figure 2-5, page 27) is pressed, the display automatically rotates a graphic image and zooms in and out around the image. This is called “AutoPilot” mode. A brief text overview describing the board appears along the left edge. Blue text at the bottom of the screen presents the menu system.
Rotating and Zooming GraphicsText Description
Rotary/Push-Button Menu System
UG330_c1_03_032207
Figure 1-3: Rotating/Zooming Graphics, Menu System Displayed on VGA Screen

Rotary Knob/Push-Button Menu System

The Spartan-3A/3AN Starter Kit board demonstration design uses the rotary knob and surrounding push-button switches, shown in Figure 2-5, page 27, to implement a menu system. The menu display appears in blue text at the bottom of the VGA output. The menu functions are highlighted in Tab le 1 -1 and Figure 1-4.
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Chapter 1: Introduction and Overview
Table 1-1: Function of Each Menu Control
Press Knob Rotate Knob Press Push Button
R
Move to next menu selection,
next mode.
Start Demonstration Design
Select MultiBoot
Buttons: Load Configuration 1. Knob Spin: Select Configuration. Knob Push: More Options ...
Scroll/Rotate Graphic
Buttons: Scroll Image. Knob Spin: Rotate Image. Knob Push: More Options ...
Scroll/Scale Graphic
Press Knob
Buttons: Scroll Image. Knob Spin: Scale Image. Knob Push: More Options ...
Depends on current mode, as
shown in Figure 1-4.
Power-up board Press PROG_B button
Press Knob
Press Knob
Depends on current mode, as
shown in Figure 1-4.
Select FPGA
MultiBoot
MultiBoot
MultiBoot
Configuration
MultiBoot
Config. 1 Config. 2 Config. 3
Config. 4
Rotate
Scale
AutoPilot/Volume
Buttons: Restart AutoPilot. Knob Spin: Adjust Volume. Knob Push: More Options ...
Figure 1-4: Rotary Knob/Push-Button Menu System

Select MultiBoot Configuration Image

Spartan-3A/3AN FPGAs support a selectable MultiBoot configuration interface. If the FPGA configures in one of its Master configuration modes, then the FPGA always loads the configuration image stored at address 0 in Flash at power-up, or whenever the PROG_B button is pressed.
Spin the rotary knob to select a new FPGA configuration ima ge. The blue text at the bottom of the display updates with each click of the rotary knob. For example, the application displays “Buttons: Load Configuration x” where ‘x’ corresponds to the bitstream image listed in Ta bl e 1- 2. Ta bl e 1 -2 describes the bitstreams preloaded on the board.
After selecting the desired image, press one of the four push-button switches that surround the rotary knob. This action causes the FPGA to load the selected image from external Flash memory.
To change to the “Scroll or Rotate Graphic” mode, press the rotary knob.
Press Knob
AutoPilot
AutoPilot
AutoPilot
Volume
AutoPilot
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Operating the Default Demonstration Design
Table 1-2: FPGA Configuration Bitstreams Preprogrammed on the Starter Kit Board
FPGA
Configuration
Bitstream FPGA Application/Reference Design Example
0
(default)
1
2
3
4
Spartan-3AN
FPGA
Starter Kit board demonstration design. Loaded at power-up.
www.xilinx.com/products/boards/s3astarter/reference_designs.htm#demo
Device DNA Reader: Reads the FPGA’s unique Device ID value and displays it on the character LCD screen.
www.xilinx.com/products/boards/s3astarter/reference_designs.htm#dna_reader
Fractal Generator: Computes fractal images in real time and displays on the VGA port. A user­contributed design by Matthias Alles. Rotate knob to zoom fractal image; press surrounding push buttons to scroll the image.
www-user.rhrk.uni-kl.de/~alles/fpga/files.htm
ASCII Terminal: Implements a text terminal using an attached VGA display and PS/2 keyboard and will communicate with HyperTerminal on a PC via an RS-232 serial connection.
Source included in www.xilinx.com/products/boards/s3astarter/reference_designs.htm#out
STMicro M29DW323DT Parallel Flash Programmer: Communicates to a PC using HyperTerminal via an RS-232 serial connection. Programs, erases, and reads the STMicro M29DW323DT parallel Flash PROM on the Starter Kit board.
www.xilinx.com/products/boards/s3astarter/reference_designs.htm#parallel_flash_programmer
Internal Flash Paint Application: Use a mouse to create drawings and read or write them to In-System Flash. Loaded from internal SPI Flash in Spartan-3AN Starter Kit Board. Requires setting Mode pins as described in Tabl e 4 -1 , p ag e 3 9 for Internal Master SPI mode. For Spartan-3AN Starter Kit Board only.
www.xilinx.com/products/boards/s3astarter/reference_designs.htm#paint
.
.

Scroll or Rotate Graphic

In this mode, rotate the knob to rotate the graphic image clockwise or counterclockwise.
Use the four push-button switches to scroll the graphic image up, down, left, or right.
Press the rotary knob to change to the “Scroll or Scale Graphic” mode.

Scroll or Scale Graphic

In this mode, rotate the knob to scale the size of the graphic image, zooming in and out.
Use the four push-button switches to scroll the resulting graphic image up, down, left, or right.
Press the rotary knob to change to the “Restart AutoPilot, Speaker Volume Control” mode.

Restart AutoPilot, Speaker Volume Control

In this mode, rotate the knob to control the speaker output volume.
Press any of the four push-button switches to restart the AutoPilot function.
Press the rotary knob to change to the “Select MultiBoot Configuration Image” mode.
Spartan-3A/3AN Starter Kit Board User Guide www.xilinx.com 17
UG334 (v1.0) May 28, 2007
Chapter 1: Introduction and Overview

LCD Screen Control Option

While the demonstration design operates best with an attached VGA display, the on-board LCD screen tracks similar functionality, as shown in Figure 1-5. If no VGA display is attached, then the “Scroll or Rotate Graphic”, “Scroll or Scale Graphic”, and “Restart
AutoPilot, Speaker Volume Control” modes offer little to no functionality, the exception
being the volume control assuming that a speaker is attached to the audio jack.
Select MultiBoot
Start Demonstration Design
Power-up board Press PROG_B button
Welcome to XLNX S3A Starter Kit
Wait 1 second
Btns: Load Cfg 1 Spin: Select Cfg
MultiBoot
MultiBoot
MultiBoot
Select FPGA
Configuration
MultiBoot
Config. 1 Config. 2 Config. 3
Config. 4
R
Scroll/Rotate Graphic
Press Knob 3x For Boot Menu
Scroll/Scale Graphic
Press Knob
Press Knob 2x For Boot Menu
AutoPilot/Volume
Press Knob 1x For Boot Menu
Figure 1-5: LCD Screen Output using Menu System

Power-Saving Suspend Mode

Press Knob
Press Knob
Press Knob
AutoPilot
AutoPilot
AutoPilot
Rotate
Scale
Volume
AutoPilot
UG334_c1_05_052707
All of the preloaded FPGA configuration bitstreams have the power-saving Suspend mode enabled. Suspend mode reduces FPGA power consumption while preserving the present state of the FPGA application and the FPGA’s configuration data. Set the SUSPEND switch to RUN or SUSPEND as described in “SUSPEND Switch,” page 26.
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Key Components and Features

Using one or two external multimeters, measure the corresponding difference in current consumption, as described in “Measuring Power Across Voltage Supply Jumpers,” page
139.
Caution!
Flash PROM using configuration bitstream #4, as described in Ta b le 1 -2 .
Do not set the SUSPEND switch to “SUSPEND” while programming the parallel NOR

RS-232 Serial Port Control Option

Optionally, control the demonstration design using a serial port connection to a PC or workstation. On a PC, use the HyperTerminal program to communicate to the FPGA application, as shown in Figure 1-6. Using a standard, straight-through 9-pin serial cable, connect the PC’s 9-pin RS-232 port to the board’s DCE connector (see Figure 7-1, page 63).
Figure 1-6: Use HyperTerminal and a Standard Serial Cable to Connect to Board
When the demonstration design begins operating, it transmits a message using the serial port.
Press a number key on the PC to load the associated MultiBoot bitstream listed in Tab le 1 -2.
Key Components and Features
The key features of the Spartan-3A Starter Kit board or the Spartan-3AN Starter Kit board are:
Spartan-3A Starter Kit Board: Xilinx 700K-gate XC3S700A Spartan-3A FPGA Pb-free 484-ball BGA package (FGG484)
Spartan-3AN Starter Kit Board: Xilinx 700K-gate XC3S700AN Spartan-3AN
nonvolatile FPGA in the Pb-free 484-ball BGA package (FGG484)
Internal 8 Mbit In-System Flash memory
Store FPGA configuration bitstream or nonvolatile data
4 Mbit Xilinx Platform Flash configuration PROM
64 MByte (512 Mbit) of DDR2 SDRAM, 32Mx16 data interface
4 MByte (32 Mbit) of parallel NOR Flash
UG334_c1_06_052707
in the
Spartan-3A/3AN Starter Kit Board User Guide www.xilinx.com 19
UG334 (v1.0) May 28, 2007
Chapter 1: Introduction and Overview
FPGA configuration storage
MicroBlaze™ code storage/shadowing
x8 or x16 data interface after configuration
Two 16 Mbit SPI serial Flash
STMicroelectronics and Atmel DataFlash serial architectures
FPGA configuration storage
- Supports single configuration bitstream or multiple MultiBoot configuration bitstreams
Nonvolatile data storage
MicroBlaze code shadowing
Two-line, 16-character LCD screen
PS/2 port
Supports PS/2-compatible mouse or keyboard
Supports both mouse and keyboard using a Y-splitter cable (not included)
VGA display port, 12-bit color
10/100 Ethernet PHY (requires Ethernet MAC in FPGA)
Two nine-pin RS-232 ports (DTE- and DCE-style)
On-board USB-based programming solution
FPGA download/debug
SPI serial Flash in-system direct programming
50 MHz clock oscillator
8-pin DIP socket for second oscillator
SMA connector for clock inputs or outputs
100-pin Hirose FX2 expansion connector with up to 43 FPGA user I/Os
Compatible with Digilent FX2 add-on cards
High-speed differential I/O connectors
Receiver: Six data channels or five data channels plus clock
Transmitter: Six data channels or five data channels plus clock
Supports multiple differential I/O standards, including LVDS, RSDS, mini-LVDS
Also supports up to 24 single-ended I/O
Uses widely available 34-conductor cables
Two six-pin expansion connectors for Digilent Peripheral Modules
Four-output, SPI-based Digital-to-Analog Converter (DAC)
Two-input, SPI-based Analog-to-Digital Converter (ADC) with programmable-gain
pre-amplifier
Stereo audio jack using digital I/O pins
ChipScope
Rotary-encoder with push-button shaft
Eight discrete LEDs
Four slide switches
Four push-button switches
R
™ SoftTouch debugging port
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Design Trade-Offs

A few system-level design trade-offs were required in order to provide the Spartan­3A/3AN Starter Kit board with the most functionality.

Configuration Methods Galore!

A typical FPGA application uses a single, nonvolatile memory to store configuration images. A typical Spartan-3AN nonvolatile FPGA application would not require any external memory. To demonstrate new Spartan-3A and Spartan-3AN FPGA capabilities, the starter kit board has four different configuration memory sources that all must function well together. The extra configuration functions make the starter kit board more complex than typical FPGA applications.
The starter kit board also includes an on-board USB-based JTAG programming interface. The on-chip circuitry simplifies the device programming experience. In typical applications, the JTAG programming hardware resides off-board or in a separate programming module, such as the Xilinx Platform USB cable.

Voltages for all Applications

Design Trade-Offs
The Spartan-3A/3AN FPGA typically operates with two supply rails, 1.2V and 3.3V. The Spartan-3A/3AN Starter Kit board showcases a quadruple-output regulator developed by National Semiconductor specifically to power Spartan-3 Generation FPGAs. This regulator is sufficient for most standalone FPGA applications.

Spartan-3A/3AN Starter Kit Design Examples

Visit the Spartan-3A/3AN Starter Kit Design Examples web page to download and use the latest applications that specifically target the starter kit board:
Spartan-3A/3AN Starter Kit Design Examples Web Page
www.xilinx.com/products/boards/s3astarter/reference_designs.htm
The list of designs is ever growing and the applications are often updated to the latest software releases. The following list provides a sample of design examples:
Spartan-3A/3AN Starter Kit Demo Design Overview
www.xilinx.com/products/boards/s3astarter/reference_designs.htm#demo
This describes the out-of-the box demo design shipped with the board. Includes how to set up and operate the demonstration, evaluate MultiBoot and Suspend, and provides demo technical details.
Restoring the “Out of the Box” Flash Programming
www.xilinx.com/products/boards/s3astarter/reference_designs.htm#out
Provides a short overview of what the starter kit board does “out of the box” and includes instructions on how to restore the board to the original “out of the box” state. The ZIP file includes the “golden” MCS files that are pre-programmed into Flash memory before the board is shipped. The PDF file contains instructions for restoring the board to its original settings using these MCS files in case any of the configuration memories were overwritten during normal use.
Spartan-3A/3AN Starter Kit Board User Guide www.xilinx.com 21
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Chapter 1: Introduction and Overview
Spartan-3A/3AN Starter Kit Board Verification Design
www.xilinx.com/products/boards/s3astarter/reference_designs.htm#test
This example includes the board test specification and the board test design. This design was used during initial board verification and some functions are used during production test. It is provided to test out a board if something is not working as expected. The design files may also be of general interest. The ZIP file has the design source, a script to run them, and the resulting compiled files.
Programmer for the STMicroelectronics M29DW323DT Parallel NOR Flash
www.xilinx.com/products/boards/s3astarter/reference_designs.htm#parallel_flash _programmer
This design transforms the Spartan-3A or Spartan-3AN FPGA into a programmer for the 32Mbit STMicroelectronics M29DW323DT parallel NOR Flash memory. This memory optionally holds configuration images for the FPGA and provides general non-volatile storage for other applications implemented within the FPGA. Using a simple terminal program, this application provides the following capabilities:
Erase the memory in part or in full
Read the memory to verify contents
Download complete configuration images using standard MCS files
Manually program individual bytes
Display the device identifier and 64-bit unique device numbers
Spartan-3A/3AN “Device DNA” Reader
www.xilinx.com/products/boards/s3astarter/reference_designs.htm#dna_reader
This design uses a PicoBlaze™ processor to read the unique “Device DNA” identifier embedded in each Spartan-3A/3AN FPGA and then display it on the LCD screen.
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Choose a Spartan-3 Generation Starter Kit Board for your Needs

The Spartan-3A and Spartan-3AN Starter Kit boards are best for prototyping Spartan-3A/3AN FPGA applications. Depending on specific requirements, however, Xilinx and third-party companies offer development boards that better suit other needs.

Spartan-3A/3AN FPGA Features and Embedded Processing Functions

The Spartan-3A/3AN Starter Kit board highlights the unique features of the Spartan-3A and Spartan-3AN FPGA families and provides a convenient development board for embedded processing applications. The board highlights these features:
Spartan-3AN specific features
Nonvolatile configuration from internal SPI Flash
Spartan-3A/3AN specific features
Parallel NOR Flash configuration
SPI serial Flash configuration using either the STMicroelectronics or Atmel
DataFlash architectures
MultiBoot FPGA configuration from both Parallel NOR and SPI serial Flash
PROMs
Embedded development
MicroBlaze 32-bit embedded RISC processor
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PicoBlaze eight-bit embedded controller

Spartan-3A and Spartan-3AN FPGAs

Power management using the Suspend mode feature
DDR2 SDRAM memory interfaces

Other Spartan-3 Generation Development Boards

The Spartan-3A/3AN Starter Kit board demonstrates the full capabilities of the Spartan-3A and Spartan-3AN FPGA families and the Xilinx ISE™ development software.
For a development board specific to the Spartan-3E FPGA family, consider the Spartan-3E Starter Kit board. There are multiple ordering codes, depending on the included power supply.
Spartan-3E Starter Kit Board (H
W-SPAR3E-SK_xx)
www.xilinx.com/s3estarter
For MicroBlaze development, consider the XC3S1600E Embedded Development board.
XC3S1600E Embedded Development Board (DO-SP3E1600E-DK-UNI-G)
www.xilinx.com/sp3e1600e
For PCI Express® applications, consider the Spartan-3 PCI Express Starter Kit.
Spartan-3 PCI Express Starter Kit (HW-S3PCIE-DK)
www.xilinx.com/s3pcie
For simple Spartan-3 FPGA applications, consider the fairly basic Spartan-3 Starter Kit board.
Spartan-3 Starter Kit (
HW-SPAR3-SK-UNI-G)
www.xilinx.com/s3starter
Also consider the capable boards offered by Xilinx partners:
Spartan-3 and Spartan-3E Board Interactive Search
www.xilinx.com/products/devboards/index.htm
Spartan-3A and Spartan-3AN FPGAs
The Spartan-3AN FPGA platform offers nonvolatile pin-compatible versions of the Spartan-3A FPGA platform. The Spartan-3AN FPGAs support the same external programming sources as Spartan-3A FPGAs, but add an additional internal SPI Flash programming mode. The internal SPI Flash can also be used for user data. The Spartan-3A/3AN Starter Kit Board supports both external and Spartan-3AN internal configuration options.
Spartan-3AN FPGAs require V to be either 2.5V or 3.3V. The Spartan-3A/3AN Starter Kit Board uses a default V
to be 3.3V while Spartan-3A FPGAs allow V
CCAUX
CCAUX
CCAUX
of
3.3V.
Spartan-3A and Spartan-3AN FPGAs have different documentation and availability. Verify the latest version of the appropriate documentation on xilinx.com.
Spartan-3A/3AN Starter Kit Board User Guide www.xilinx.com 23
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Chapter 1: Introduction and Overview
Spartan-3A FPGAs
Web pa ge
www.xilinx.com/spartan3a
Data sheet
www.xilinx.com/bvdocs/publications/ds529.pdf
Errata
www.xilinx.com/xlnx/xweb/xil_publications_display.jsp?category=-1212251
Additional documentation
www.xilinx.com/xlnx/xweb/xil_publications_display.jsp?category=-1212246
Spartan-3AN FPGAs
Web pa ge
www.xilinx.com/spartan3an
Data sheet
www.xilinx.com/bvdocs/publications/ds557.pdf
Errata
www.xilinx.com/xlnx/xweb/xil_publications_display.jsp?category=-1212871
Additional documentation
www.xilinx.com/xlnx/xweb/xil_publications_display.jsp?category=-1212828
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Related Resources

Refer to the following links for additional information:
Spartan-3A/3AN Starter Kit
www.xilinx.com/s3astarte
Spartan-3A/3AN Rev D Starter Kit user guide
Spartan-3A Rev C Starter Kit user guide
Example User Constraints File (UCF)
Board schematics (annotated)
Bill of materials (BOM) list
Link to design examples
Xilinx MicroBlaze Soft Processor
www.xilinx.com/microblaze
Xilinx PicoBlaze Soft Processor
www.xilinx.com/picoblaze
Xilinx Embedded Development Kit
w
ww.xilinx.com/ise/embedded_design_prod/platform_studio.htm
Xilinx Software Tutorials
ww.xilinx.com/support/techsup/tutorials/
w
Xilinx Technical Support
www.xilinx.com/support
r and www.xilinx.com/s3anstarter
www.xilinx.com/bvdocs/userguides/ug33
4.pdf
www.xilinx.com/bvdocs/userguides/ug330.pdf
www.xilinx.com/products/boards/s3astarter/files/s3astarter.ucf
www.xilinx.com/products/boards/s3astarter/s3astarter_schematic.pdf
www.xilinx.com/products/boards/s3astarter/s3astarter_bom.xls
www.xilinx.com/products/boards/s3astarter/reference_designs.ht
m
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Chapter 2

Switches, Buttons, and Rotary Knob

Slide Switches

Locations and Labels

The Spartan-3A/3AN Starter Kit board has four slide switches, as shown in Figure 2-1. The slide switches are located in the lower right corner of the board and are labeled SW3 through SW0. Switch SW3 is the left-most switch, and SW0 is the right-most switch.
SW3
(T9)

Operation

When in the UP or ON position, a switch connects the FPGA pin to 3.3V, a logic High. When DOWN or in the OFF position, the switch connects the FPGA pin to ground, a logic Low. The switches typically exhibit about 2 ms of mechanical bounce. There is no active debouncing circuitry, although such circuitry could easily be added to the FPGA design programmed on the board.

UCF Location Constraints

Figure 2-2 provides the UCF constraints for the four slide switches, including the I/O pin
assignment and the I/O standard used. The PULLUP resistor is not required, but it defines the input value when the switch is in the middle of a transition.
SW2
(U8)
Figure 2-1: Four Slide Switches
SW1
(U10)
SW0
(V8)
HIGH, ‘1’
LOW, ‘0’
UG330_c2_01_021507
Spartan-3A/3AN Starter Kit Board User Guide www.xilinx.com 25
UG334 (v1.0) May 28, 2007
Chapter 2: Switches, Buttons, and Rotary Knob
NET "SW<0>" LOC = "V8" | IOSTANDARD = LVTTL | PULLUP ; NET "SW<1>" LOC = "U10"| IOSTANDARD = LVTTL | PULLUP ; NET "SW<2>" LOC = "U8" | IOSTANDARD = LVTTL | PULLUP ; NET "SW<3>" LOC = "T9" | IOSTANDARD = LVTTL |
Figure 2-2: UCF Constraints for Slide Switches

SUSPEND Switch

The SUSPEND slide switch, shown in Figure 2-3, connects directly to the FPGA’s SUSPEND input pin. If Suspend mode is enabled in the FPGA application, then the FPGA enters Suspend mode whenever the switch is set to “SUSPEND.” If the switch is then changed back to “RUN,” then the FPGA resumes operation from the state before it entered Suspend mode. Likewise, if Suspend mode is enabled, then the AWAKE pin is reserved to indicate when the FPGA is in Suspend mode. See “AWAKE LED,” page 32.
R
PULLUP ;
RUN
SUSPEND
UG334_c2_03_052407
Figure 2-3: Suspend Switch
To enable Suspend mode, add the configuration string shown in Figure 2-4 to the user constraints file (UCF). If Suspend mode is not enabled in the application, then the SUSPEND switch has no affect on the design and the AWAKE pin is available as a general­purpose I/O.
CONFIG ENABLE_SUSPEND = “FILTERED” ;
Figure 2-4: UCF Constraints to Enable Suspend Mode
For more information on Suspend mode, see the following application note:
XAPP480: Using Suspend Mode in Spartan-3 Generation FPGAs
www.xilinx.com/bvdocs/
appnotes/xapp480.pdf
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Push-Button Switches

Locations and Labels

The Spartan-3A/3AN Starter Kit board has four momentary-contact push-button switches, shown in Figure 2-5. The push buttons are located in the lower right corner of the board and are labeled BTN_NORTH, BTN_EAST, BTN_SOUTH, and BTN_WEST. The FPGA pins that connect to the push buttons appear in parentheses in Figure 2-5, and the associated UCF is listed in Figure 2-7.
BTN_NORTH
(T14)
Rotary Push Button Switch
ROT_A: (T13)
ROT_B: (R14)
ROT_CENTER: (R13)
Push-Button Switches
Requires an internal pull-up Requires an internal pull-up Requires an internal pull-down

Operation

BTN_WEST
(U15)
BTN_SOUTH
(T15)
BTN_EAST
(T16)
UG334_c2_05_052407
Notes:
1. All BTN_* push-button inputs require an internal pull-down resistor.
Figure 2-5: Four Push-Button Switches Surround the Rotary Push-Button Switch
Pressing a push button connects the associated FPGA pin to 3.3V, as shown in Figure 2-6. Use an internal pull-down resistor within the FPGA pin to generate a logic Low when the button is not pressed. Figure 2-7 shows how to specify a pull-down resistor within the UCF. There is no active debouncing circuitry on the push button.
3.3V
Push Button
FPGA I/O Pin
BTN_* Signal
UG230_c2_03_021206
Figure 2-6: Push-Button Switches Require an Internal Pull-Down Resistor in the
FPGA Input Pin
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Chapter 2: Switches, Buttons, and Rotary Knob

PROG_B Push-Button Switch

The PROG_B push-button switch, shown in Figure 2-14, page 31, is part of the FPGA’s configuration circuitry. See “PROG Push-Button Switch,” page 40.

UCF Location Constraints

Figure 2-7 provides the UCF constraints for the four push-button switches, including the
I/O pin assignment and the I/O standard used, and defines a pull-down resistor on each input.
NET "BTN_EAST" LOC = "T16" | IOSTANDARD = LVTTL | PULLDOWN ; NET "BTN_NORTH" LOC = "T14" | IOSTANDARD = LVTTL | PULLDOWN ; NET "BTN_SOUTH" LOC = "T15" | IOSTANDARD = LVTTL | PULLDOWN ; NET "BTN_WEST" LOC = "U15" | IOSTANDARD = LVTTL | PULLDOWN ;
Figure 2-7: UCF Constraints for Push-Button Switches

Rotary Push-Button Switch

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Locations and Labels

The rotary push-button switch is located in the center of the four individual push-button switches, as shown in Figure 2-5, page 27. The switch produces three outputs. The two shaft encoder outputs are ROT_A and ROT_B. The center push-button switch is ROT_CENTER.

Operation

The rotary push-button switch integrates two different functions. The switch shaft rotates and outputs values whenever the shaft turns. The shaft can also be pressed, acting as a push-button switch.
Push-Button Switch
Pressing the knob on the rotary/push-button switch connects the associated FPGA pin to
3.3V, as shown in Figure 2-8. Use an internal pull-down resistor within the FPGA pin to generate a logic Low. Figure 2-11 shows how to specify a pull-down resistor within the UCF. There is no active debouncing circuitry on the push button.
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Rotary / Push Button
Rotary Push-Button Switch
3.3V
FPGA I/O Pin
ROT_CENTER Signal
UG230_c2_05_021206
Figure 2-8: Push-Button Switches Require an Internal Pull-up Resistor in the FPGA
Input Pin
Rotary Shaft Encoder
In principal, the rotary shaft encoder behaves much like a cam connected to the central shaft. Rotating the shaft then operates two push-button switches, as shown in Figure 2-9. Depending on which way the shaft is rotated, one of the switches opens before the other. Likewise, as the rotation continues, one switch closes before the other. However, when the shaft is stationary, also called the detent position, both switches are closed.
A pull-up resistor in each input pin generates a ‘1’ for an open switch. See the UCF file for details on specifying the pull-up resistor.
A=‘0’
FPGA
Vcco
Vcco
Rotary Shaft
Encoder
B=‘1’
GND
UG230_c2_06_030606
Figure 2-9: Basic Example of Rotary Shaft Encoder Circuitry
Closing a switch connects it to ground, generating a logic Low. When the switch is open, a pull-up resistor within the FPGA pin pulls the signal to a logic High. The UCF constraints in Figure 2-11 describe how to define the pull-up resistor.
The FPGA circuitry to decode the ‘A’ and ‘B’ inputs is simple but must consider the mechanical switching noise on the inputs, also called chatter. As shown in Figure 2-10, the chatter can falsely indicate extra rotation events or even indicate rotations in the opposite direction!
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Chapter 2: Switches, Buttons, and Rotary Knob
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Rotating RIGHT
A
B

UCF Location Constraints

Rising edge on ‘A’ when ‘B’ is Low indicates RIGHT (clockwise) rotation
Detent
Detent
Switch closing chatter on ‘B’ injects false “clicks” to the LEFT (’B’ rising edge when ‘A’ is Low)
Switch opening chatter on ‘A’ injects false “clicks” to the RIGHT
UG230_c2_07_030606
Figure 2-10: Outputs from Rotary Shaft Encoder Might Include Mechanical Chatter
Figure 2-11 provides the UCF constraints for the rotary encoder/push-button switch,
including the I/O pin assignment and the I/O standard used, and defines a pull-up or pull-down resistor for each FPGA input.
NET "ROT_A" LOC = "T13" | IOSTANDARD = LVTTL | PULLUP ; NET "ROT_B" LOC = "R14" | IOSTANDARD = LVTTL | PULLUP ; NET "ROT_CENTER" LOC = "R13" | IOSTANDARD = LVTTL | PULLDOWN ;
Figure 2-11: UCF Constraints for Rotary Push-Button Switch

Discrete LEDs

Locations and Labels

The Spartan-3A/3AN Starter Kit board has eight individual surface-mount LEDs located immediately above the slide switches as shown in Figure 2-12. The LEDs are labeled LED7 through LED0. LED7 is the left-most LED, LED0 the right-most LED.
LED6: (Y22)
LED7: (W21)
LED5: (V20)
LED4: (V19)
LED3: (U19)
LED2: (U20)
LED1: (T19)
LED0: (R20)
UG334_c2_12_052407
Figure 2-12: Eight Discrete LEDs
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