Texas Instruments TI SITARA ARM User Manual
TI
Sitara™ARM
Microprocessors
Microprocessors
Yair Hougui
Application Engineer
1
TI Embedded Processors Portfolio
TI Embedded Processors
32-bit ARM
16-bit ultra-
High-
ARM
Low-power
TI Embedded Processors
Digital Signal Processors (DSPs)Microcontrollers (MCUs)
ARM®-Based Processors
32-bit
Cortex
™-M3
MCUs
low power
MCUs
performance
DSPs
Cortex
-
A8
MPUs
DSPs
Stellaris
®
®
C5000
™
MSP430
™
Sitara
™
ARM® Cortex™-A8
C6000
™
DaVinci
™
real-time
MCUs
C2000
™
Delfino
™
ARM
Cortex™
-
M3
& ARM9
OMAP
™
Up to
100 MHz
Flash
64 KB to 256 KB
300MHz to
>1GHz
Cache,
RAM, ROM
Up to
25 MHz
Flash
1 KB to 256 KB
Up to 300 MHz
+Accelerator
Up to 320KB RAM
Up to 128KB ROM
300MHz to >1GHz
+Accelerator
Cache
RAM, ROM
Piccolo
™
40MHz to
300 MHz
Flash, RAM
16 KB to 512 KB
USB, ENET MAC+PHY
CAN, ADC, PWM, SPI
Connectivity, Security,
Motion Control, HMI,
Industrial Automation
RAM, ROM
USB, CAN,
PCIe, EMAC
Industrial computing,
POS & portable
data terminals
1 KB to 256 KB
Analog I/O, ADC
LCD, USB, RF
Measurement,
Sensing, General
Purpose
Up to 128KB ROM
USB, ADC
McBSP, SPI, I2C
Port. Telecom, audio,
medical monitor
& diag, industrial
RAM, ROM
USB, ENET,
PCIe, SATA, SPI
Test & Meas., Video,
audio, security,
imaging, infrastructure
PWM, ADC,
CAN, SPI, I2C
Motor Control,
Digital Power,
Lighting, Ren. Energy
$1.00 to $8.00
$5.00 to $20.00
$0.49 to $9.00
$3.00 to $10.00
$5.00 to $200.00
$1.50 to $20.00
2
MPUs – Microprocessors
Software & Dev. Tools
What is Sitara™?
• High-level operating system
• 300MHz – 1GHz+ in future devices
Ideal for applications requiring
• New platform of high-performance
ARM microprocessors:
What’s new
•
Advanced graphical user interfaces
• Flexible connectivity and multiple
interface options
• High system integration
–
ARM9 to ARM
®
Cortex
™
-
A8 MPU’s
• First new devices:
– AM35xx & AM17xx/AM18xx
•
Coming soon:
•
And…
• Scalability
• System cost constraints
• Application software portability
•
Coming soon:
– , AM3703/AM3715
• Software compatible roadmap
Sitara ARM MPUs – a good fit for industrial, instrumentation, POS
Industrial
automation
Point
Medical
instrumentation
HVAC and
building
of service
Test &
Single
3
building
controls
measurement
board
computing
Sitara
™
ARM
®
microprocessors
In Development
ARM Cortex-A8ARM9
Available Now
ARM Cortex-A8
AM37xx (2Q10)
“AM38x Next” (2011)
“AM33x Next” (2011)
AM1705
AM1707
AM1806
OMAP3503
OMAP3515
AM3505
AM1808
AM3517
Higher Performance Cortex-
A8 with enhanced integration
• Up to 2000 DMIPS
Low power ARM9 with
Integrated peripherals
• Power efficient (down to 7mW
Advanced ARM Cortex-A8
with system integration
• Up to 1440 DMIPS
•
Power efficient (down to 10mW
standby, 1W active)
• Enhanced graphics/UI
• Enhanced integrated
peripherals, 1Gb Ethernet,
standby, 182mW active)
• Cost efficient
• Flexible industrial I/O PRU (CAN,
UART)
• Integrated peripherals, 10/100
•
Integrated interfaces to display,
USB, 10/100 Ethernet, SD card,
Wi-Fi®, CAN, and many others
• Integrated graphics for rich user
interface functions
4
PCIe
Ethernet, USB, SATA, and many
more
Develop product designs with TI’s
expanding Sitara
™
MPU portfolio
expanding Sitara
MPU portfolio
Cortex™-A8
ARM926
AM37x
Sampling
AM35x
• High performance general purpose
AM18x
AM17x
Performance
• Power and cost-efficient
• Flexible industrial I/O
• Up to 450 MHz (495 DMIPS)
processor
• Advanced graphics/UI
• Roadmap to > 1 GHz (>2000 DMIPS)
•
Starting @ $5 (1ku)
Linux and Windows®Embedded CE kernel & drivers
Example code & demos
5
Sampling
Now
CORTEX-A8
PRODUCT DETAILS
6
AM3517/05 Core and Accelerators
AM3517/05
processors
Cores
Multi window overlay system and
resizing for hardware accelerated
user interfaces
ARM
®
Cortex™-
A8
3D
Graphics
Accelerator
(3517)
Display Subsystem
10 bit DAC
10 bit DAC
LCD
Controller
Video
Enc
Video
Cores
600 MHz Cortex A-8 with NEON™
coprocessor
PowerVR SGX 3D graphics
Accelerator – up to 10M
L3/L4 Interconnect
16-bit Video
Input
Processing
Front End
polygons
/ second
Up to 1000 Dhrystone MIPS:
• OS’s like Linux or WinCE
• Excellent web experience
I2C x3
USB HS Host x2
Timers
GP x12
WDT x1
HDQ /
1-wire
USB OTG
w/PHY
EMAC
CAN
Memory
ARM:
MMC/SD/
SDIO x3
DDR2
GPMC
McBSP x5
UARTx3
+1 w/IrDA
McSPI x4
16 kBI-Cache; 16
kBD-
Cache;
256kB L2 Cache
On chip: 64kB SRAM; 128kB
ROM
DDR2 interface
• Up to 10M polygons per second
• Hardware based on screen display
GPMC: NAND/NOR I/F
•
Easily create robust GUI’s
7
AM3517/05 Peripherals
AM3517/05
processors
Peripherals
CAN – High end controller area
network Controller (HECC)
USB 2.0 OTG w/PHY
ARM
®
Cortex™-
A8
3D
Graphics
Accelerator
(3517)
Display Subsystem
10 bit DAC
10 bit DAC
LCD
Controller
Video
Enc
Video
RMII EMAC controller 10/100
USB HS host x2
MMC/SD card interface x3
LCD controller and TV out
L3/L4 Interconnect
(3517)
16-bit Video
Input
Video
Processing
Front End
Display subsystem with PIP,
color space conversion, rotation,
resizing
1.8V or 3.3V IO
I2C x3
USB HS Host x2
Timers
GP x12
WDT x1
HDQ /
1-wire
USB OTG
w/PHY
EMAC
CAN
Power
Total Power: 0.5W – 1.5W
Standby Power: 12mW
MMC/SD/
SDIO x3
DDR2
GPMC
McBSP x5
UARTx3
+1 w/IrDA
McSPI x4
Package
ZCN – 17x17 mm, 0.65 mm pitch
Utilizes Via Channel™ Array
Technology with 0.8mm pitch
plus design rules.
ZER – 23x23 mm, 1.0mm pitch.
8
AM3505/17 Platforms
Applications
Software
Compatibility
3D
Graphics
Compatibility
Shared
Peripheral
Set
AM3517
AM
™
ARM
Cortex-A8
600 MHz
Graphics
Open GL ES 2.0
Peripherals
AM
™
ARM
AM3505
Cortex
-
A8
600 MHz
Peripherals
9
Pin-for-pin compatible
Availability subject to applicable lead times
CORTEX A-8 : Highlights
• First ARMv7 instruction-set architecture
• Superscalar architecture delivers high performance
–
Advanced dynamic Branch prediction
• 256 KB unified L2 cache
–
Dedicated, low
-
latency, high
-
BW interface to L1 cache
–
Dedicated, low
-
latency, high
-
BW interface to L1 cache
• Enhanced VFPv3
– Doubles number of double-precision registers
–
Adds new instructions to convert between fixed and floating point
• Efficient Run Time Compilation Target
–
Jazelle
-
RCT: Target for Java. Memory footprint reduced up to 3x
–
Jazelle
-
RCT: Target for Java. Memory footprint reduced up to 3x
• Trust Zone
– Normal & Secure worlds have different memory views
10
AM35x Memory Controller
• Two dedicated memory
controllers/one
internal
memory
– SDRAM controller (EMIF4)
–
General purpose
memory
controller (GPMC)
– Internal memory (SRAM)
• On Chip Memory [SRAM-64 Kb]
•
Operates
at full L3
interconnect
(64bit@Core Clock /2)
11
GPMC Controller
AM35x
Supported PsRAM, OneNAND,
• 16-bit external memory
controller
NOR/NAND Flash,
ASYNC Logic
1GB (128MB per CS-
•
GPMC can communicate with
many external devices:
– External asynchronous/synchronous 8-
Supported Size
(bits)
mux
mode)
16 KB (2 KB per CS
non-mux
mode)
bit wide memory/device
– External asynchronous/synchronous
16-bit wide memory/device
Max Clock
Speed
100 MHz
Chip Selects 8
–
External 16
-
bit non
-
multiplexed device
with limited address range (2 Kbytes)
– External 16-bit address/data-
Max Address
Space
2 KB non mux mode
128 MB mux mode
multiplexed NOR flash device
– External 8-bit/16-bit NAND flash
device
–
External 16
-
bit pseudo SRAM
12
Data Width
16 b
–
External 16
-
bit pseudo SRAM
(pSRAM) device
DDR Controller
AM3517/05
SDRAM
mDDR/DDR2
• Supports mDDR / DDR2
•
DDR
controller has three
Supported
Measured
Throughput
810MB/sec
•
DDR
controller has three
functional blocks:
– Virtual Rotated Frame Buffer
(VRFB), supporting rotations of
Supported
Size (bits)
16M, 32M (2
Banks)
64M, 128M, 256M,
0
, 90
, 180
,270
– SDRAM memory-access
scheduler (SMS)
64M, 128M, 256M,
512M,1G,
2G (4 Banks)
Max Clock
166MHz
•
Optimizes latency and
bandwidth usage among
requestors
Speed
Chip Selects
2
Data Width
16/32b
–
SDRAM Controller
• Physical interface to DDR2 or
mDDR
13
Data Width
•
Two chip selects
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