Texas Instruments DS90Ux929-Q1EVM User Manual

DS90Ux929-Q1EVM User's Guide
User's Guide
Literature Number: SNLU172
January 2015
Contents
1 DS90Ux929EVM User's Guide................................................................................................ 5
1.1 General Description ......................................................................................................... 5
1.2 Features....................................................................................................................... 5
1.3 System Requirements....................................................................................................... 6
1.4 Contents of the Demo Evaluation Kit ..................................................................................... 6
1.5 Applications Diagram........................................................................................................ 6
1.6 Typical Configuration........................................................................................................ 7
1.8 Default Jumper Settings .................................................................................................... 8
1.9 Default Switch Settings ..................................................................................................... 9
1.10 Demo Board Connections................................................................................................. 10
1.11 ALP Software Setup ....................................................................................................... 13
1.11.1 System Requirements ........................................................................................... 13
1.11.2 Download Contents .............................................................................................. 13
1.11.3 Installation of the ALP Software................................................................................ 13
1.11.4 Installation of the Device Profiles .............................................................................. 13
1.11.5 Startup - Software Description.................................................................................. 13
1.11.6 Information Tab................................................................................................... 15
1.11.7 HDMI Tab ......................................................................................................... 16
1.11.8 Pattern Generator Tab........................................................................................... 16
1.11.9 Registers Tab..................................................................................................... 17
1.11.10 Registers Tab - Address 0x00 selected ..................................................................... 18
1.11.11 Registers Tab - Address 0x00 expanded.................................................................... 18
1.11.12 Scripting Tab .................................................................................................... 20
1.12 Troubleshooting ALP Software ........................................................................................... 21
1.12.1 ALP Loads the Incorrect Profile ................................................................................ 21
1.12.2 ALP does not detect the EVM .................................................................................. 23
1.13 Typical Connection and Test Equipment................................................................................ 25
1.14 Equipment References .................................................................................................... 26
1.15 Cable References .......................................................................................................... 26
2 Bill of Materials .................................................................................................................. 27
A EVM PCB Schematics ......................................................................................................... 34
B Board Layout ..................................................................................................................... 43
Revision History.......................................................................................................................... 48
2
Contents SNLU172–January 2015
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1-1. Applications Diagram........................................................................................................ 6
1-2. Typical Configuration........................................................................................................ 7
1-3. Interfacing to the EVM ...................................................................................................... 8
1-4. Launching ALP ............................................................................................................. 14
1-5. Initial ALP Screen .......................................................................................................... 14
1-6. Follow-up Screen........................................................................................................... 15
1-7. ALP Information Tab....................................................................................................... 15
1-8. ALP HDMI Tab.............................................................................................................. 16
1-9. ALP Pattern Generator Tab............................................................................................... 17
1-10. ALP Registers Tab ......................................................................................................... 17
1-11. ALP Device ID Selected................................................................................................... 18
1-12. ALP Device ID Expanded................................................................................................. 19
1-13. ALP Scripting Tab.......................................................................................................... 20
1-14. USB2ANY Setup ........................................................................................................... 21
1-15. Remove Incorrect Profile .................................................................................................. 21
1-16. Add Correct Profile......................................................................................................... 22
1-17. Finish Setup................................................................................................................. 22
1-18. ALP No Devices Error ..................................................................................................... 23
1-19. Windows 7, ALP USB Driver ............................................................................................. 23
1-20. ALP in Demo Mode ........................................................................................................ 24
1-21. ALP Preferences Menu.................................................................................................... 24
1-22. Typical Test Setup for Video Application................................................................................ 25
1-23. Typical Test Setup for Evaluation........................................................................................ 25
List of Figures
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List of Tables
1-1. Default Board Jumper Settings ............................................................................................ 8
1-2. Default Board Switch Settings ............................................................................................. 9
1-3. Power Supply ............................................................................................................... 10
1-4. FPD-Link III Output Signals P1........................................................................................... 10
1-5. Alternative FPD-Link III Output Signals ................................................................................. 10
1-6. HDMI Input Signals ........................................................................................................ 10
1-7. USB2ANY Connector...................................................................................................... 10
1-8. I2C/CCI Interface Header J20............................................................................................ 10
1-9. GPIO/Audio Interface ...................................................................................................... 11
1-10. MODE_SEL[1:0] Settings ................................................................................................. 11
1-11. Configuration Select (MODE_SEL0) - SW-DIP8 - S2 ................................................................. 11
1-12. Configuration Select (MODE_SEL1) - SW-DIP8 - S6 ................................................................. 12
1-13. IDx SW-DIP8 - S3 ......................................................................................................... 12
4
List of Tables SNLU172–January 2015
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1.1 General Description

The DS90Ux929-Q1EVM (Evaluation Module) converts HDMI to FPD-Link III. This kit will demonstrate the functionality and operation of the DS90Ux929-Q1. The DS90Ux929-Q1 is an HDMI to FPD-Link III Serializer which, in conjunction with the DS90Ux926Q-Q1 / DS90Ux928Q-Q1 Deserializers, takes the data from HDMI serial stream and translates it into single-lane FPD-Link III interface. The DS90Ux929-Q1 supports video resolutions up to WXGA and 720p60 with 24-bit color depth.
The DS90Ux929-Q1 supports video and audio data transmission and full duplex control, including I2C communication, over the same differential link.
The demo board is not intended for EMI testing. The demo board was designed for easy accessibility to device pins with tap points for monitoring or applying signals, additional pads for termination, and multiple connector options.

1.2 Features

Supports TMDS Clock up to 96Mhz for WXGA (1920x1200) and 720p60 resolutions with 24-bit Color Depth
FPD-Link III Outputs
HDMI (High-Definition Multimedia) v1.4b Inputs
Up to 15 meters over Single-Ended Coaxial or Differential Shielded Twisted-Pair (STP) cable
Compatible with DS90Ux940-Q1 and DS90Ux948Q-Q1 FPD-Link III Deserializers
@Speed BIST
Supports Multiple I2S channels
Single +12V power supply for EVM
1.8V LVCMOS I/O interface
1.8V or 3.3V compatible I2C interface
Automotive grade product: AEC-Q100 Grade 2 qualified
Chapter 1
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DS90Ux929EVM User's Guide

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5
RGB Display
720p
24-bit color depth
TMDS Interface
Mobile Device
/Graphics
Processor
FPD-Link III
1 Pair / AC Coupled
DS90Ux929-Q1
Serializer
DS90Ux926Q-Q1
Deserializer
PASS
V
DDIO
OSS_SEL
I2C_SCL
I2C_SDA
OEN
LOCK
IDx
DAP DAP
SCL
SDA
IDx
R[7:0]
HS VS
PCLK
DE
G[7:0] B[7:0]
RIN+
RIN-
DOUT+
DOUT-
1.8 V or 3.3 V1.8 V
1.1 V
3.3 V
V
DDIO
I2S AUDIO (STEREO)
3
/
MODE_SEL
MCLK
PDB
INTB_IN
IN_D0+ IN_D1+
IN_CLK+
IN_D2+
HDMI
4
/
GPIO
HPD
DDC
CEC
HDCP ± High-Bandwidth Digital Content Protection TMDS ± Transition-Minimized Differential Signaling HDMI ± High Definition Multimedia Interface
System Requirements

1.3 System Requirements

In order to demonstrate, the following is required:
1. FPD-Link III compatible DS90Ux926Q-Q1 and DS90Ux928Q-Q1 Deserializers
2. HDMI source
3. Optional I2C controller
4. Power supply for 12V @ 1A (required)

1.4 Contents of the Demo Evaluation Kit

1. One EVM board with the DS90Ux929-Q1

1.5 Applications Diagram

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Figure 1-1. Applications Diagram
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DS90Ux929
FPD-Link III
Deserializer
Video
Processor
Video Processor Board
Cluster, Head Unit
FPD-LINK III
Display
(Video Data + Ctrl + PCLK)
(I2C)
(I2C)
(OpenLDI)
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1.6 Typical Configuration

Typical Configuration
Figure 1-2. Typical Configuration
Figure 1-1 and Figure 1-2 illustrate the use of the chipset in a display application.
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Quick Start Guide

1.7 Quick Start Guide

1. Configure switches S2, S3, and S6 to set device’s operating modes
S2: MODE_SEL0 = 1 (default factory setting)
S3: IDx = 0x18 (default factory setting)
S6: MODE_SEL1 = 1 (default factory setting)
2. Connect P1 (DOUT+/-) to compatible Deserializer e.g. DS90Ux926Q-Q1 and DS90Ux928Q-Q1 using STP cable (default)
3. Connect J36 to 12V (a) Optional power options available (see Table 1-3)
4. Plug in HDMI source
5. Connect J29 with miniUSB (5-pin) to USB A (4-pin) cable to PC USB port
For details of pin-names and pin-functions, please refer to the DS90Ux929-Q1 datasheet.
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Figure 1-3. Interfacing to the EVM

1.8 Default Jumper Settings

Ensure that the board has the default board jumper settings:
Table 1-1. Default Board Jumper Settings
Jumper Jumper Settings
J3 Connect 2 and 3 J14 Connect 2 and 3 J17 Connect 1 and 2 J18 Connect 2 and 3 J22 Connect 1 and 2 J33 Connect 1 and 2 J37 Connect 2 and 3 J40 Connect 2 and 3
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Table 1-1. Default Board Jumper Settings (continued)
Jumper Jumper Settings
J41 Connect 2 and 3

1.9 Default Switch Settings

Ensure that the board has the default board switch settings:
Switch Switch Settings
S1 1 to 3 ON
S2 1 ON, 2 to 8 OFF
S3 1 ON, 2 to 8 OFF
S5 All OFF
S6 1 ON, 2 to 8 OFF
Default Switch Settings
Table 1-2. Default Board Switch Settings
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Demo Board Connections

1.10 Demo Board Connections

Designator Signal Description
J36 +12V
J35.1 (Optional) +1.1V
J39.1 (Optional) +1.8V
J42.1 (Optional) +3.3V
J33.2 (Optional) +5V
Designator Signal
P1.1 DOUT0­P1.3 DOUT0+
Table 1-5. Alternative FPD-Link III Output Signals
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Table 1-3. Power Supply
12V ±5% Main Power Single +12V power connector that supplies power to the entire board.
1.1V ±5% Alternative to Main Power. If used, remove R195.
1.8V ±5% Alternative to Main Power. If used, remove R204.
3.3V ±5% Alternative to Main Power. If used, remove R207.
5V ±5% Alternative to Main Power.
Table 1-4. FPD-Link III Output Signals P1
Designator Signal
J11 DOUT0-
J9 DOUT0+
Table 1-6. HDMI Input Signals
Designator Signal Description
J10.12 IN_CLK­J10.10 IN_CLK+
J10.9 IN_D0­J10.7 IN_D0+
J10.6 IN_D1­J10.4 IN_D1+
J10.3 IN_D2­J10.1 IN_D2+
HDMI TMDS clock input
HDMI TMDS data0 input
HDMI TMDS data1 input
HDMI TMDS data2 input
Table 1-7. USB2ANY Connector
Designator Description
J29 mini USB 5 pin
Table 1-8. I2C/CCI Interface Header J20
Designator Signal
J20.1 VDDI2C J20.2 SCL J20.3 SDA J20.4 GND
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Configuration of the device may be done via the MODE_SEL[1:0]. These modes are latched into register location during power-up:
Table 1-9. GPIO/Audio Interface
Designator Signal Description
J21.18 SDIN/GPIO0 Aux I2S Data Input / Remote or Local I/O J21.20 SWC/GPIO1 Aux I2S Word Clock Output / Remote or Local I/O
J21.2 I2S_DC/GPIO2 I2S Data Input / Remote or Local I/O J21.4 I2S_DD/GPIO3 I2S Data Input / Remote or Local I/O J21.6 VDDIO GPIO Voltage Level 1.8V
J21.8 I2S Data Input / Local only I/O
J21.10 I2S Data Input / Local only I/O
J21.12 I2S Word Clock Input / Local only I/O
J21.14 I2S Clock Input / Local only I/O J21.24 MCLK I2S System Clock Output
I2S_DB/GPIO5_RE
G
I2S_DA/GPIO6_RE
G
I2S_WC/GPIO7_RE
G
I2S_CLK/GPIO8_RE
G
Table 1-10. MODE_SEL[1:0] Settings
Demo Board Connections
Mode Setting Function
EDID_SEL: Display ID Select
AUTO-SS: Auto Sleep-State
AUX_I2S: AUX Audio
Channel
EXT_CTL: External Controller
Override
COAX: Cable Type
REM_EDID_LOAD: Remote
EDID Load
0 overridden from register. Remote EDID address may be overridden from
1 Use external local EDID. 0 Disable. 1 Enable. 0 HDMI audio. 1 HDMI + AUX audio channel. 0 Internal HDCP/HDMI control. 1 External HDCP/HDMI control from I2C interface pins. 0 Enable FPD-Link III for twisted pair cabling. 1 Enable FPD-Link III for coaxial cabling. 0 Use internal SRAM EDID. 1 If available, remote EDID is copied into internal SRAM EDID.
Table 1-11. Configuration Select (MODE_SEL0) - SW-DIP8 - S2
MODE # EDID_SEL AUTO_SS AUX_I2S
1 0 0 0 2 0 0 1 3 0 1 0 4 0 1 1 5 1 0 0 6 1 0 1 7 1 1 0 8 1 1 1
(1)
Only set one high.
Look for remote EDID, if none found, use internal SRAM EDID. Can be default 0xA0.
(1)
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Demo Board Connections
MODE # EXT_CTL COAX REM_EDID_LOAD
1 0 0 0 2 0 0 1 3 0 1 0 4 0 1 1 5 1 0 0 6 1 0 1 7 1 1 0 8 1 1 1
(1)
Only set one high.
The strapped values can be viewed and/or modified in the following locations:
EDID_SEL : Latched into BRIDGE_CTL[0], EDID_DISABLE (0x4F[0]).
AUTO_SS : Latched into Reset[7], Soft_Sleep (0x01[7]).
AUX_I2S : Latched into BRIDGE_CFG[1], AUDIO_MODE (0x54[1]).
EXT_CTL: Latched into BRIDGE_CFG[7], EXT_CTL (0x54[7]).
COAX : Latched into FPD3_CTL1[7], FPD3_COAX_MODE (0x5B[7]).
REM_EDID_LOAD : Latched into BRIDGE_CFG[5], DIS_REM_EDID (0x54[5]).
Table 1-12. Configuration Select (MODE_SEL1) - SW-DIP8 - S6
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(1)
S1.1 (Default) 0x0C 0x18
(1)
Only set one high.
Table 1-13. IDx SW-DIP8 - S3
Designator 7-Bit Address 8-Bit Address
S1.2 0x0E 0x1C S1.3 0x10 0x20 S1.4 0x12 0x24 S1.5 0x14 0x28 S1.6 0x16 0x2C S1.7 0x18 0x30 S1.8 0x1A 0x34
(1)
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1 3 42
A
1 2 3 4
MINI
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1.11 ALP Software Setup

1.11.1 System Requirements

Operating System: Windows 7 64-bit USB: USB2ANY USB2ANY Firmware Version: 2.5.2.0

1.11.2 Download Contents

TI Analog LaunchPAD can be downloaded from: http://www.ti.com/tool/alp. Download and extract the “snlc048.zip” file to a temporary location that can be deleted later.
Make sure J29 on the DS90Ux929-Q1EVM is connected to a PC USB port with USB cable and power is applied to the DS90Ux929-Q1EVM.
The following installation instructions are for the Windows 7 64-bit Operating System.

1.11.3 Installation of the ALP Software

Execute the ALP Setup Wizard program called “ALPF_setup_v_x_x_x.exe” that was extracted to a temporary location on the local drive of your PC.
There are 7 steps to the installation once the setup wizard is started:
1. Select the "Next" button.
2. Select “I accept the agreement” and then select the “Next” button.
3. Select the location to install the ALP software and then select the “Next” button.
4. Select the location for the start menu shortcut and then select the “Next” button.
5. There will then be a screen that allows the creation of a desktop icon. After selecting the desired choices select the “Next” button.
6. Select the “Install” button, and the software will then be installed to the selected location.
7. Uncheck “Launch Analog LaunchPAD” and select the “Finish” button. The ALP software will start if “Launch Analog LaunchPAD” is checked, but it will not be useful until the USB driver is installed and board is attached.
Connect J29 USB jack of the DS90Ux929-Q1EVM board to a PC/laptop USB port using a Type A
ALP Software Setup
to mini-B USB cable. Power the DS90Ux929-Q1EVM board with a 12 VDC
power supply. The “Found New Hardware Wizard” will open on the PC/laptop.

1.11.4 Installation of the Device Profiles

There are 2 steps to add the DS90Ux929 profile:
1. Contact TI for the DS90Ux929 profile
2. Extract the “DS90Ux929.zip” to ALP’s profile folder. The profile folder can be found at: C:\Program Files (x64)\Texas Instruments\Analog LaunchPAD vx.x.x\Profiles\

1.11.5 Startup - Software Description

Make sure all the software has been installed and the hardware is powered on and connected to the PC. Execute “Analog LaunchPAD” shortcut from the start menu. The default start menu location is under All Programs > Texas Instruments > Analog LaunchPAD vx.x.x > Analog LaunchPAD to start MainGUI.exe.
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ALP Software Setup
The application should come up in the state shown in the figure below. If it does not, see Section 1.12, “Troubleshooting ALP Software”.
Under the Devices tab click on “DS90Ux929” to select the device and open up the device profile and its associated tabs.
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Figure 1-4. Launching ALP
14
Figure 1-5. Initial ALP Screen
After selecting the DS90Ux929, the following screen should appear.
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ALP Software Setup

1.11.6 Information Tab

The Information tab is shown below. Please note the device revision could be different.
Figure 1-6. Follow-up Screen
Figure 1-7. ALP Information Tab
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ALP Software Setup

1.11.7 HDMI Tab

The HDMI tab is shown below.
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1.11.8 Pattern Generator Tab

The SER Pattern Generator tab is shown below.
Figure 1-8. ALP HDMI Tab
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ALP Software Setup

1.11.9 Registers Tab

The Registers tab is shown below.
Figure 1-9. ALP Pattern Generator Tab
Figure 1-10. ALP Registers Tab
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ALP Software Setup

1.11.10 Registers Tab - Address 0x00 selected

Address 0x00 selected as shown below. Note that the “Value:” box, , will now show the hex value of that register.
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Figure 1-11. ALP Device ID Selected

1.11.11 Registers Tab - Address 0x00 expanded

By double clicking on the Address bar
or a single click on . Address 0x00 expanded reveals contents by bits. Any register address displayed can be expanded.
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ALP Software Setup
Figure 1-12. ALP Device ID Expanded
Any RW Type register, , can be written into by writing the hex value into the “Value:” box, or putting the pointer into the individual register bit(s) box by a left mouse click to put a check mark (indicating a “1”) or unchecking to remove the check mark (indicating a “0”). Click the “Apply” button to write to the register, and “refresh” to see the new value of the selected (highlighted) register.
The box toggles on every mouse click.
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ALP Software Setup

1.11.12 Scripting Tab

The Scripting tab is shown below.
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Figure 1-13. ALP Scripting Tab
The script window provides a full Python scripting environment which can be for running scripts and interacting with the device in an interactive or automated fashion.
WARNING
Directly interacting with devices either through register modifications or calling device support library functions can effect the performance and/or functionality of the user interface and may even crash the ALP Framework application.
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1.12 Troubleshooting ALP Software

1.12.1 ALP Loads the Incorrect Profile

If ALP opens with the incorrect profile loaded the correct profile can be loaded from the USB2ANY/Aardvark Setup found under the tools menu.
Troubleshooting ALP Software
Figure 1-14. USB2ANY Setup
Highlight the incorrect profile in the Defined ALP Devices list and press the remove button.
Figure 1-15. Remove Incorrect Profile
Find the correct profile under the Select a Daughter Board list, highlight the profile and press Add.
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Troubleshooting ALP Software
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Figure 1-16. Add Correct Profile
Select Ok and the correct profile should now be loaded.
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Figure 1-17. Finish Setup
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1.12.2 ALP does not detect the EVM

If the following window opens after starting the ALP software, double check the hardware setup.
Figure 1-18. ALP No Devices Error
It may also be that the USB driver is not installed. Check the device manager. There should be a “HID­compliant device” under the “Human Interface Devices” as shown below.
Troubleshooting ALP Software
Figure 1-19. Windows 7, ALP USB Driver
The software should start with only “DS90Ux929” in the “Devices” pull down menu. If there are more devices then the software is most likely in demo mode. When the ALP is operating in demo mode there is a “(Demo Mode)” indication in the lower left of the application status bar as shown below.
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Troubleshooting ALP Software
Disable the demo mode by selecting the “Preferences” pull down menu and un-checking “Enable Demo Mode”.
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Figure 1-20. ALP in Demo Mode
Figure 1-21. ALP Preferences Menu
After demo mode is disabled, the ALP software will poll the ALP hardware. The ALP software will update and have only “DS90Ux929” under the “Devices” pull down menu.
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DIGITAL VIDEO GENERATOR
DIGITAL VIDEO GENERATOR
Digital Video Source
OpenLDI LVDS
Contents of Demo Kit
Logic Analyzer / Oscilloscope
DS90Ux929
EVM Board
Deserializer
Board
FPD-Link III
HDMI/DP++
Display
HDMI/DP++
Generator
OpenLDI
LVDS
DS90Ux929
EVM Board
Deserializer
Board
FPD-Link III
Contents of Demo Kit
Graphics Controller /
Video Processor Board
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1.13 Typical Connection and Test Equipment

The following is a list of typical test equipment that may be used to generate signals for the Serializer inputs:
1. Digital Video Source – for generation of specific display timing such as Digital Video Processor or Graphics Controller (GPU) with HDMI output.
2. Any other signal generator / video source - This video generator may be used for video signal sources for DVI or DP++
3. Any other signal / video generator that provides the correct input levels as specified in the datasheet.
The picture below shows a typical test set up using a Graphics Controller and display.
Typical Connection and Test Equipment
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Figure 1-22. Typical Test Setup for Video Application
The picture below shows a typical test set up using a video generator and logic analyzer.
Figure 1-23. Typical Test Setup for Evaluation
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Equipment References

1.14 Equipment References

NOTE: Please note that the following references are supplied only as a courtesy to our valued
customers. It is not intended to be an endorsement of any particular equipment or supplier.
Digital Video Pattern Generator:
Astrodesign www.astro-americas.com
Logic Analyzer:
keysight Technologies www.keysight.com
Corelis CAS-1000-I2C/E I2C Bus Analyzer and Exerciser Products:
www.corelis.com/products/I2C-Analyzer.htm
Aardvark I2C/SPI Host Adapter Part Number: TP240141
www.totalphase.com/products/aardvark_i2cspi

1.15 Cable References

For optimal performance, we recommend Shielded Twisted Pair (STP) 100ohm differential impedance and 24 AWG (or larger diameter) cable for high-speed data applications.
Leoni Dacar 538 series cable:
www.leoni-automotive-cables.com
www.ti.com
Rosenberger HSD connector:
www.rosenberger.de/en/Products/35_Automotive_HSD.php
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Chapter 2
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Bill of Materials

Designator Description Part Number Manufacturer Quantity
PCB1 Printed Circuit SV600978 Any 1
Board
C1, C9, C128 CAP, CERM, 0.01 06031C103JAT2A AVX 0603 3
µF, 100 V, +/- 5%, X7R, 0603
C2, C5, C6, C10, CAP, CERM, 10 µF, GRM21BR71A106K MuRata 0805 13 C11, C13, C83, 10 V, +/- 10%, X7R, E51L C93, C106, C116, 0805 C123, C133, C137
C3, C7, C12, C14, CAP, CERM, 0.1 GRM155R71C104K MuRata 0402 30 C81, C82, C84, µF, 16 V, +/- 10%, A88D C85, C89, C94, X7R, 0402 C95, C96, C97, C98, C104, C105, C107, C108, C110, C111, C113, C117, C121, C122, C126, C129, C131, C132, C135, C136
C4, C8 CAP, TA, 1 µF, 16 293D105X9016A2T Vishay-Sprague 3216-18 2
V, +/- 10%, 9.3 E3 ohm, SMD
C15, C25, C32, CAP, CERM, 4.7 GRM21BR71C475K MuRata 0805 10 C39, C50, C56, µF, 16 V, +/- 10%, A73L C120, C127, C130, X7R, 0805 C134
C16, C18, C19, CAP, CERM, 0.01 06031C103KAT2A AVX 0603 15 C26, C27, C44, µF, 100 V, +/- 10%, C45, C46, C49, X7R, 0603 C53, C59, C60, C61, C62, C65
C20, C29, C34, CAP, CERM, 0.1 06033C104KAT2A AVX 0603 6 C35, C47, C63 µF, 25 V, +/- 10%,
X7R, 0603
C21, C28, C33, CAP, CERM, 1 µF, C0603C105K4PAC Kemet 0603 6 C38, C42, C64 16 V, +/- 10%, X5R, TU
0603
C24, C30, C40, C57 CAP, CERM, 10 µF, C0805C106K8PAC Kemet 0805 4
10 V, +/- 10%, X5R, TU 0805
C73, C74, C76, C78 CAP, CERM, 0.1 C1005X7R1H104K TDK 0402 4
µF, 50 V, +/- 10%, C0G/NP0, 0402
C77 CAP, CERM, 0.012 GRM155R71C123K MuRata 0402 1
µF, 16 V, +/- 10%, A01D X7R, 0402
C87, C88, C90, CAP, CERM, 4.7 GRM1555C1E4R7C MuRata 0402 5 C91, C92 pF, 25 V, +/- 5%, A01D
C0G/NP0, 0402
Package Reference
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Copyright © 2015, Texas Instruments Incorporated
27
Cable References
Designator Description Part Number Manufacturer Quantity
C99, C103 CAP, CERM, 220 06035A221FAT2A AVX 0603 2
C100, C101 CAP, CERM, 30 pF, GRM1885C2A300J MuRata 0603 2
C102 CAP, CERM, 2200 C0603X222K5RAC Kemet 0603 1
C109 CAP, CERM, 0.47 GRM188R71C474K MuRata 0603 1
C112 CAP, CERM, 10 pF, GRM1555C1H100J MuRata 0402 1
C114 CAP, TA, 100 µF, T495D107M016ATE Kemet 7343-31 1
C115 CAP, CERM, 47 µF, GRM32ER61C476 MuRata 1210 1
C118 CAP, CERM, 3300 GRM155R71H332K MuRata 0402 1
C119 CAP, CERM, 1 µF, C1608X7R1C105K TDK 0603 1
C124 CAP, TA, 22 µF, 25 293D226X0025D2T Vishay-Sprague 7343-31 1
C125 CAP, TA, 2.2 µF, 25 293D225X9025A2T Vishay-Sprague 3216-18 1
D1, D2, D4 LED, Green, SMD LTST-C190GKT Lite-On 1.6x0.8x0.8mm 3 D3 LED, Orange, SMD LTST-C190KFKT Lite-On 1.6x0.8x0.8mm 1 D8 Diode, Schottky, 40 1N5819HW-7-F Diodes Inc. SOD-123 1
F1 Fuse, SC Protector, 429007 Littlefuse 1206 1
FID1, FID2, FID3 Fiducial mark. N/A N/A Fiducial 3
H1, H2, H5, H6 Standoff, Hex, 0.5"L 1902C Keystone Standoff 4
J1 Audio Jack, 3.5mm, SJ-3523-SMT CUI Inc. Audio Jack SMD 1
J2, J4, J5, J6, J7, Header, 100mil, 5-146261-1 TE Connectivity Header, 2x1, 100mil 21 J8, J15, J16, J17, 2x1, Gold, TH J19, J22, J26, J27, J30, J32, J34, J35, J39, J42, J43, J44
J3, J14, J18, J33, Header, 100mil, TSW-103-07-G-S Samtec 3x1 Header 7 J37, J40, J41 3x1, Gold, TH
J9, J11 Connector, End 142-0701-851 Emerson Network SMA End Launch 2
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(continued)
Package Reference
pF, 50 V, +/- 1%, C0G/NP0, 0603
100 V, +/- 5%, A01D C0G/NP0, 0603
pF, 50 V, +/- 10%, TU X7R, 0603
µF, 16 V, +/- 10%, A88D X7R, 0603
50 V, +/- 5%, A01D C0G/NP0, 0402
16 V, +/- 20%, 0.1 100 ohm, SMD
16 V, +/- 20%, X5R, ME15L 1210
pF, 50 V, +/- 10%, A01D X7R, 0402
16 V, +/- 10%, X7R, 0603
V, +/- 20%, 0.7 E3 ohm, SMD
V, +/- 10%, 6.3 E3 ohm, SMD
V, 1 A, SOD-123
12A
There is nothing to buy or mount.
#4-40 Nylon
Stereo, R/A, SMT
launch SMA, 50 Power ohm, SMT
28
Bill of Materials SNLU172–January 2015
Copyright © 2015, Texas Instruments Incorporated
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Cable References
(continued)
Designator Description Part Number Manufacturer Quantity
J10 Connector, HDMI, 1747981-1 TE Connectivity 15.0x6.08x11.55mm 1
19-Pos Recept, SMT
J20, J24 Header (friction 0022112042 Molex Header 4x1 keyed 2
lock), 100mil, 4x1, Gold, TH
J21 Header, 100mil, TSW-116-07-G-D Samtec 16x2 Header 1
16x2, Gold, TH
J23 Header, 100mil, TSW-108-07-G-D Samtec 8x2 Header 1
8x2, Gold, TH
J25 Header, 100mil, TSW-104-07-G-S Samtec 4x1 Header 1
4x1, Gold, TH
J28 Header (shrouded), SBH11-PBPC-D07- Sullins Connector 7x2 Shrouded 1
100 mil, 7x2, Gold, ST-BK Solutions Header TH
J29 Connector, 1734035-2 TE Connectivity USB Mini Type B 1
Receptacle, Mini­USB Type B, R/A, Top Mount SMT
J31 Header, 100mil, PEC07DAAN Sullins Connector Header, 7x2, 1
7x2, Tin, TH Solutions 100mil, Tin
J36 Connector, DC Jack PJ-102A CUI Inc. POWER JACK, 1
2.1X5.5 mm, TH 14.4x11x9mm
J38 Header, 100mil, TSW-104-07-G-D Samtec 4x2 Header 1
4x2, Gold, TH
L1, L2, L12, L13 1.5A Ferrite Bead, BLM18SG331TN1D MuRata 0603 4
330 ohm @ 100MHz, SMD
L3, L5 Ferrite Bead, 1000 BLM21AG102SN1D Murata 0805 2
ohm @ 100 MHz,
0.5 A, 0805
L4, L6, L8 Ferrite Bead, 120 BLM18SG121TN1D MuRata 0603 3
ohm @ 100 MHz, 3 A, 0603
L7 Ferrite Bead, 1000 BLM21AG102SN1D Murata 0805 1
ohm @ 100 MHz,
0.3 A, 0805
L10, L11 Coupled inductor, DLW21SN261XQ2L MuRata Inductor, 2
0.22 A, 0.59 ohm, 1.2x1.2x2.0 mm SMD
L14 Inductor, Shielded 7440650047 Wurth Elektronik WE-TPC-XLH2 1
Drum Core, Ferrite, eiSos
4.7uH, 4.2A, 0.02 ohm, SMD
P1 Right Angle Plug for D4S20G-400A5-Z Rosenberger HSD connector, 1
PCB, TH Waterblue
Q1, Q2, Q3, Q4 MOSFET, N-CH, 50 BSS138 Fairchild SOT-23 4
V, 0.22 A, SOT-23 Semiconductor
R1, R2 RES, 100, 1%, CRCW0402100RFK Vishay-Dale 0402 2
0.063 W, 0402 ED
Package Reference
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Copyright © 2015, Texas Instruments Incorporated
29
Cable References
Designator Description Part Number Manufacturer Quantity
R3, R7, R9, R10, RES, 0, 5%, 0.063 ERJ-2GE0R00X Panasonic 0402 77 R11, R12, R13, W, 0402 R14, R15, R16, R21, R22, R23, R25, R26, R28, R30, R31, R32, R33, R34, R35, R36, R37, R38, R39, R40, R41, R42, R43, R106, R107, R108, R110, R113, R115, R117, R119, R120, R121, R125, R126, R127, R128, R129, R132, R133, R134, R135, R136, R137, R138, R139, R141, R142, R145, R146, R147, R148, R149, R150, R151, R152, R153, R154, R155, R156, R157, R158, R159, R160, R161, R162, R163, R198, R203, R206
R4, R5, R6, R8, RES, 10.0 k, 1%, CRCW040210K0FK Vishay-Dale 0402 18 R103, R116, R122, 0.063 W, 0402 ED R164, R165, R166, R167, R168, R169, R170, R171, R181, R184, R194
R17 RES, 49.9, 1%, CRCW040249R9FK Vishay-Dale 0402 1
R19 RES, 4.70 k, 1%, ERJ-2RKF4701X Panasonic 0402 1
R27, R123, R124 RES, 4.7 k, 5%, CRCW04024K70JN Vishay-Dale 0402 3
R49, R58, R85 RES, 118 k, 1%, CRCW0402118KFK Vishay-Dale 0402 3
R50, R59, R86 RES, 107 k, 1%, CRCW0402107KFK Vishay-Dale 0402 3
R51, R60, R87 RES, 113 k, 1%, CRCW0402113KFK Vishay-Dale 0402 3
R52, R61, R88 RES, 82.5 k, 1%, CRCW040282K5FK Vishay-Dale 0402 3
R53, R62, R89 RES, 68.1 k, 1%, CRCW040268K1FK Vishay-Dale 0402 3
R54, R63, R90 RES, 56.2 k, 1%, CRCW040256K2FK Vishay-Dale 0402 3
R55, R64, R91 RES, 13.3 k, 1%, CRCW040213K3FK Vishay-Dale 0402 3
R66, R75, R93 RES, 40.2 k, 1%, CRCW040240K2FK Vishay-Dale 0402 3
R67, R76, R94 RES, 30.9 k, 1%, CRCW040230K9FK Vishay-Dale 0402 3
R68, R77, R95 RES, 51.1 k, 1%, CRCW040251K1FK Vishay-Dale 0402 3
R69, R78, R96 RES, 88.7 k, 1%, CRCW040288K7FK Vishay-Dale 0402 3
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(continued)
Package Reference
0.063 W, 0402 ED
0.1 W, 0402
0.063 W, 0402 ED
0.063 W, 0402 ED
0.063 W, 0402 ED
0.063 W, 0402 ED
0.063 W, 0402 ED
0.063 W, 0402 ED
0.063 W, 0402 ED
0.063 W, 0402 ED
0.063 W, 0402 ED
0.063 W, 0402 ED
0.063 W, 0402 ED
0.063 W, 0402 ED
30
Bill of Materials SNLU172–January 2015
Copyright © 2015, Texas Instruments Incorporated
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Cable References
(continued)
Designator Description Part Number Manufacturer Quantity
R70, R79, R97 RES, 102 k, 1%, CRCW0402102KFK Vishay-Dale 0402 3
0.063 W, 0402 ED
R71, R80, R98 RES, 137 k, 1%, CRCW0402137KFK Vishay-Dale 0402 3
0.063 W, 0402 ED
R72, R81, R99 RES, 210 k, 1%, CRCW0402210KFK Vishay-Dale 0402 3
0.063 W, 0402 ED
R102 RES, 1.00 k, 1%, ERJ-2RKF1001X Panasonic 0402 1
0.1 W, 0402
R111 RES, 1.0 k, 5%, CRCW04021K00JN Vishay-Dale 0402 1
0.063 W, 0402 ED
R130, R131 RES, 47 k, 5%, CRCW040247K0JN Vishay-Dale 0402 2
0.063 W, 0402 ED
R140 RES, 27 k, 5%, CRCW040227K0JN Vishay-Dale 0402 1
0.063 W, 0402 ED
R172 RES, 330, 5%, CRCW0402330RJN Vishay-Dale 0402 1
0.063 W, 0402 ED
R173, R174, R175 RES, 470, 5%, CRCW0402470RJN Vishay-Dale 0402 3
0.063 W, 0402 ED
R176, R177 RES, 33, 5%, 0.063 CRCW040233R0JN Vishay-Dale 0402 2
W, 0402 ED
R178, R185, R186 RES, 1.5 k, 5%, CRCW04021K50JN Vishay-Dale 0402 3
0.063 W, 0402 ED
R179, R182 RES, 33 k, 5%, CRCW040233K0JN Vishay-Dale 0402 2
0.063 W, 0402 ED
R180 RES, 1.2 M, 5%, CRCW06031M20JN Vishay-Dale 0603 1
0.1 W, 0603 EA
R183 RES, 200, 5%, CRCW0402200RJN Vishay-Dale 0402 1
0.063 W, 0402 ED
R187 RES, 124 k, 1%, CRCW0402124KFK Vishay-Dale 0402 1
0.063 W, 0402 ED
R188 RES, 22.1 k, 1%, CRCW040222K1FK Vishay-Dale 0402 1
0.063 W, 0402 ED
R189, R195, R204, RES, 0, 5%, 0.1 W, CRCW06030000Z0 Vishay-Dale 0603 4 R207 0603 EA
R193, R196, R200, RES, 100 k, 5%, CRCW0402100KJN Vishay-Dale 0402 4 R205 0.063 W, 0402 ED
R197 RES, 1.87 k, 1%, CRCW04021K87FK Vishay-Dale 0402 1
0.063 W, 0402 ED
R199 RES, 4.99 k, 1%, CRCW04024K99FK Vishay-Dale 0402 1
0.063 W, 0402 ED
R201 RES, 23.2 k, 1%, CRCW040223K2FK Vishay-Dale 0402 1
0.063 W, 0402 ED
R202 RES, 12.1 k, 1%, CRCW040212K1FK Vishay-Dale 0402 1
0.063 W, 0402 ED
R208 RES, 3.24 k, 1%, CRCW04023K24FK Vishay-Dale 0402 1
0.063 W, 0402 ED
S1 Switch, Slide, SPST 219-3LPST CTS 3 poles SPST 1
3 poles, SMT Electrocomponents Switch
S2, S3, S6 Switch, Slide, SPST 219-8MST CTS Switch, 8Pos, 3
8 poles, SMT Electrocomponents 21.8x3.8x6.7 mm
S4, S7, S9 SWITCH TACTILE EVQ-PAD04M Panasonic 6x4.3x6mm 3
SPST-NO 0.02A 15V, TH
Package Reference
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31
Cable References
Designator Description Part Number Manufacturer Quantity
S5 DIP Switch, 4 A6S-4104-H Omron Electronic SMT DIP switch 1
SH-J3, SH-J14, SH- Shunt, 2mm, Gold 2SN-BK-G Samtec 2mm Shunt, Closed 9 J17, SH-J18, SH- plated, Black Top J22, SH-J33, SH­J37, SH-J40, SH­J41
U1 SINGLE-ENDED, PCM1808PWR Texas Instruments PW0014A 1
U2 720p HDMI to FPD- DS90Ux929TRGCR Texas Instruments RGC0064K 1
U3 Socket, DIP-8, 110-13-308-41- Mill-Max DIP-8, Body 1
U4 Socket, 20pin DIP STD STD DIP20 1 U5 ESD-Protection TPD4E004DRYRG4 Texas Instruments DRY0006A 1
U6 Mixed Signal MSP430F5529IPN Texas Instruments PN0080A 1
U7 TCA9406 Dual TCA9406DCUR Texas Instruments DCU0008A 1
U8 IC, 6-BIT TXB0106PWR TI TSSOP 1
U9 IC, 4.5V-18V Input, TPS54225PWP TI PWP20 1
U10 IC, 1.5A LDO TPS74701DRC TI SON-10 1
U11 IC, Dual 1-A Low- TPS767D3xxPWP TI PWP28 1
Y1 Oscillator, ECS-8FA3-xxx-TR ECS 0.551 x 0.386 inch 1 Y3 Crystal, 24.000MHz, ECS-240-20-5PX- ECS Inc. Crystal, 1
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(continued)
Package Reference
position slide Components actuator, SPST, SMD
ANALOG-INPUT 24-BIT, 96-kHz STEREO A/D CONVERTER, PW0014A
Link III Bridge Q1 Serializer, RGC0064K
Sleeve Pin, 2.54 001000 10.16x10.16mm, mm Pitch Pitch 2.54mm
Array for High­Speed Data Interfaces, 4 Channels, -40 to +85 degC, 6-pin SON (DRY), Green (RoHS & no Sb/Br)
MicroController, PN0080A
Bidirectional 1-MHz I2C-BUS and SMBus Voltage Level-Translator,
1.65 to 3.6 V, -40 to 85 degC, 8-pin US8 (DCU), Green (RoHS & no Sb/Br)
BIDIRECTIONAL VOLTAGE-LEVEL TRANSLATOR
2-A Sync. Step­Down SWIFT Converter
Regulator with Soft­Start
Dropout Regulator
20pF, SMD TR 11.4x4.3x3.8mm
32
Bill of Materials SNLU172–January 2015
Copyright © 2015, Texas Instruments Incorporated
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www.ti.com
Cable References
(continued)
Designator Description Part Number Manufacturer Quantity
C17, C41, C43, C58 CAP, CERM, 0.047 GRM188R71C473K MuRata 0603 0
µF, 16 V, +/- 10%, A01D X7R, 0603
C22, C23, C31, CAP, CERM, 4.7 GRM21BR71C475K MuRata 0805 0 C37, C48, C51, µF, 16 V, +/- 10%, A73L C52, C55 X7R, 0805
C36, C54 CAP, CERM, 0.47 GRM188R71C474K MuRata 0603 0
µF, 16 V, +/- 10%, A88D X7R, 0603
C75, C79 CAP, CERM, 12 pF, GRM1555C1E120J MuRata 0402 0
25 V, +/- 5%, A01D C0G/NP0, 0402
C80 CAP, CERM, 0.012 GRM155R71C123K MuRata 0402 0
µF, 16 V, +/- 10%, A01D X7R, 0402
C86 CAP, CERM, 0.1 GRM155R71C104K MuRata 0402 0
µF, 16 V, +/- 10%, A88D X7R, 0402
J12, J13 Connector, End 142-0701-851 Emerson Network SMA End Launch 0
launch SMA, 50 Power ohm, SMT
R18, R20, R44, RES, 0, 5%, 0.063 ERJ-2GE0R00X Panasonic 0402 0 R45, R46, R47, W, 0402 R48, R56, R57, R65, R73, R74, R82, R83, R84, R92, R100, R101, R143, R144, R209, R210, R211, R212
R24, R29, R104, RES, 10.0 k, 1%, CRCW040210K0FK Vishay-Dale 0402 0 R105 0.063 W, 0402 ED
R109, R112, R114, RES, 49.9, 1%, CRCW040249R9FK Vishay-Dale 0402 0 R118 0.063 W, 0402 ED
S8 Switch, Slide, SPST 219-8MST CTS Switch, 8Pos, 0
8 poles, SMT Electrocomponents 21.8x3.8x6.7 mm
Y2 Crystal, SMT Quart ATSxxxSM CTS 0.484 x 0.190 inch 0
Crystal
H3, H4, H7, H8 Machine Screw, NY PMS 440 0025 B&F Fastener Screw 4
Round, #4-40 x 1/4, PH Supply Nylon, Philips panhead
Package Reference
SNLU172–January 2015 Bill of Materials
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Copyright © 2015, Texas Instruments Incorporated
33
www.ti.com
34
Bill of Materials SNLU172–January 2015
Submit Documentation Feedback
Copyright © 2015, Texas Instruments Incorporated
Appendix A
SNLU172–January 2015
EVM PCB Schematics
SNLU172–January 2015 EVM PCB Schematics
Submit Documentation Feedback
Copyright © 2015, Texas Instruments Incorporated
35
1
1
2
2
3
3
4
4
5
5
6
6
D D
C C
B B
A A
1 1
11/4/2014
SV600978A_MSP430F5529.SchDoc
Sheet Title:
Size:
Mod. Date:
File:
Sheet: of
B
http://www.ti.com
Contact: http://www.ti.com/support
DS90UB949-Q1EVMProject Title:
Designed for: Public Release
Assembly Variant: 004
© Texas Instruments 2014
Drawn By: Engineer: Tran Dam
Texas Instruments and/or its licensors do not warrant the accuracy or completeness of this specification or any information contained therein. Texas Instruments and/or its licensors do not warrant that this design will meet the specifications, will be suitable for your application or fit for any particular purpose, or will operate in an implementation. Texas Instruments and/or its
licensors do not warrant that the design is production worthy. You should completely validate and test your design implementation to confirm the system functionality for your application.
Not in version controlSVN Rev:
SV600978Number: Rev: A
24MHz
1 2
Y3 ECS-240-20-5PX-TR
GPIO11/VEREF+
GPIO10/VEREF-
GND
GND
DP
PUR
DM
VUSB
V18
GPIO1/I2C(SCL)
GPIO0/I2C(SDA)
GPIO7/PWM0
GPIO3/PWM2
SDABRD
SCLBRD
AIN_B_0
AIN_B_1
GPIO9/ADC2
GPIO8/ADC3
30pF
C100
30pF
C101
2200pF
C102
GND
33k
R182
GND
GND
GND
GND
GND
BSL
DM
DP
PUR
V18
33
R177
33
R176
GND
1.2M
R180
GND
33k
R179
GND
220pF
C103
GND
1.5k
R185
1.5k
R186
0.47µF
C109
0.1µF
C108
0.1µF
C104
0.1µF
C105
Green
12
D4
200
R183
GND
1 2
J30
5-146261-1
VDD33
330 ohm
L13
VDD33_UC
VDD33_UC
VDD33_UC
VDD33_UC
0.1µF
C107
10µF
C106
SDA_B
1
GND
2
VCCA
3
SDA_A
4
SCL_A
5
OE
6
VCCB
7
SCL_B
8
U7
TCA9406DCUR
GND
10.0k
R184
0.1µF
C110
0.1µF
C111
VDD33_UC
VDD_I2C
A1
1
VCCA
2
A2
3
A3
4
A4
5
A5
6
A6
7
OE8GND
9
B6
10
B5
11
B4
12
B3
13
B2
14
VCCB
15
B1
16
U8
TXB0106PWR
GND
GPIO5/SPI(SOMI)/UART(RXD)
GPIO4/SPI(SIMO)/UART(TXD)
GPIO2/SPI(SCLK)
GPIO6/PWM1/SPI(CS)
INTB_CTRL
PDB_CTRL
GND
0.1µF
C96
0.1µF
C97
VDD33_UC
10.0k
R181
SOMI
SIMO
SCLK
CS
0.1µF
C98
INTB
INTB
INTB
220pF
C99
GND
VUSB
41 32
S9
EVQ-PAD04M
1
2
J43
5-146261-1
1 2
J44
5-146261-1
PDB
VDDIO
CS
SCLK
SIMO
SOMI
1 2
F1
429007
VBUS
VBUS
PDB
2 3 4
1
5
J29
1734035-2
1.5k
R178
1
2 3
Q4
1 2
3 4
5 6
7 8
9 10
11 12
13 14
J31
IO11IO22GND
3
IO34IO4
5
VCC
6
U5
P6.4/CB4/A4
1
P6.5/CB5/A5
2
P6.6/CB6/A6
3
P6.7/CB7/A7
4
P7.0/CB8/A12
5
P7.1/CB9/A13
6
P7.2/CB10/A14
7
P7.3/CB11/A15
8
P5.0/A8/VREF+/VEREF+
9
P5.1/A9/VREF-/VEREF-
10
AVCC1
11
P5.4/XIN
12
P5.5/XOUT
13
AVSS1
14
P8.0
15
P8.1
16
P8.2
17
DVCC1
18
DVSS1
19
VCORE
20
P1.0/TA0CLK/ACLK21P1.1/TA0.022P1.2/TA0.123P1.3/TA0.224P1.4/TA0.325P1.5/TA0.426P1.6/TA1CLK/CBOUT27P1.7/TA1.028P2.0/TA1.129P2.1/TA1.230P2.2/TA2CLK/SMCLK31P2.3/TA2.032P2.4/TA2.133P2.5/TA2.234P2.6/RTCCLK/DMAE035P2.7/UCB0STE/UCA0CLK36P3.0/UCB0SIMO/UCB0SDA37P3.1/UCB0SOMI/UCB0SCL38P3.2/UCB0CLK/UCA0STE39P3.3/UCA0TXD/UCA0SIMO
40
P3.4/UCA0RXD/UCA0SOMI
41
P3.5/TB0.5
42
P3.6/TB0.6
43
P3.7/TB0OUTH/SVMOUT
44
P4.0/PM_UCB1STE/PM_UCA1CLK
45
P4.1/PM_UCB1SIMO/PM_UCB1SDA
46
P4.2/PM_UCB1SOMI/PM_UCB1SCL
47
P4.3/PM_UCB1CLK/PM_UCA1STE
48
DVSS2
49
DVCC2
50
P4.4/PM_UCA1TXD/PM_UCA1SIMO
51
P4.5/PM_UCA1RXD/PM_UCA1SOMI
52
P4.6/PM_NONE
53
P4.7/PM_NONE
54
P5.6/TB0.0
55
P5.7/TB0.1
56
P7.4/TB0.2
57
P7.5/TB0.3
58
P7.6/TB0.4
59
P7.7/TB0CLK/MCLK
60
VSSU
61
PU.0/DP
62
PUR
63
PU.1/DM
64
VBUS65VUSB
66
V18
67
AVSS2
68
P5.2/XT2IN
69
P5.3/XT2OUT
70
TEST/SBWTCK
71
PJ.0/TDO
72
PJ.1/TDI/TCLK
73
PJ.2/TMS
74
PJ.3/TCK
75
RST/NMI/SBWTDIO
76
P6.0/CB0/A077P6.1/CB1/A178P6.2/CB2/A279P6.3/CB3/A3
80
U6
MSP430F5529IPN
Appendix A
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36
EVM PCB Schematics SNLU172–January 2015
Copyright © 2015, Texas Instruments Incorporated
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1
2
2
3
3
4
4
5
5
6
6
D D
C C
B B
A A
3 10
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SV600978A_EXT_UC.SchDoc
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DS90UB949-Q1EVMProject Title:
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© Texas Instruments 2014
Drawn By: Engineer:
Tran Dam
Texas Instruments and/or its licensors do not warrant the accuracy or compl eteness of this specification or any informa tion contained therein. Texas Instrument s and/or its licensors do not warrant that this design will meet the specificatio n s, will be suitable for your application or fit for an y particular purpose, or will operate in an implementation. Texas Instruments and/or its
licensors do not warrant that the design is production worthy. You should com pletely validate and test your design imp lementation to confirm the system function ality for your application.
Not in version controlSVN Rev:
SV600978Number: Rev: A
VDD1V8
0.1µF
C94
GND
1
2
3
4
5
6
7
8
9
10 11
12
13
14
15
16
17
18
19
20
U4
SOCKET_20P_DIP
GND
SDA
SCL
0
R155
0
R157
INTB
0
R153 0
R151 0
R149 0
R147
0
R161
0
R163
0
R162
0
R158 0
R156 0
R154 0
R152 0
R150 0
R148 0
R146
SW1
SW2
SW3
SW0 SW4
SW5
SW6
SW7
D_GPIO0/MOSI
D_GPIO1/MISO
D_GPIO2/SPLK
D_GPIO3/SS
TEST
RST
0
R159
0
R160
0
R145
10.0k
R171
10.0k
R170
10.0k
R169
10.0k
R168
10.0k
R167
10.0k
R166
10.0k
R165
10.0k
R164
SW0 SW1 SW2 SW3 SW4 SW5 SW6 SW7
12 34 56 78 910 1112 1314
J28
SBH11-PBPC-D07-ST-BK
GND
RST
10µF
C93
TEST
330
R172
GND
1 2
J27
5-146261-1
330 ohm
L12
VDD_UC
VDD_UC
VDD_UC
0.1µF
C95
1 2 3 4 5 6
13
14
15
16
7
12
89
10
11
DNP
S8
219-8MST
DNP
GND
41 32
S7
EVQ-PAD04M
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Appendix A
SNLU172–January 2015 EVM PCB Schematics
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37
1
1
2
2
3
3
4
4
5
5
6
6
D D
C C
B B
A A
6 10
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SV600978A_CONFIG.SchDoc
Sheet Title:
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Mod. Date:
File:
Sheet: of
B
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DS90UB949-Q1EVMProject Title:
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© Texas Instruments 2014
Drawn By: Engineer:
Tran Dam
Texas Instruments and/or its licensors do not warrant the accuracy or compl eteness of this specification or any informa tion contained therein. Texas Instrument s and/or its licensors do not warrant that this design will meet the specificatio n s, will be suitable for your application or fit for an y particular purpose, or will operate in an implementation. Texas Instruments and/or its
licensors do not warrant that the design is production worthy. You should com pletely validate and test your design imp lementation to confirm the system function ality for your application.
Not in version controlSVN Rev:
SV600978Number: Rev: A
MODE_SEL0
MODE_SEL1
IDx
VDD1V8
0
R48
DNP
GNDGND
VDD1V8
0
R84
DNP
GNDGND
VDD1V8
GNDGND
1234567
8
1234567
8
0x18
0x1C
0x20
0x24
0x28
0x2C
0x30
0x34
0x0C
0x0E
0x10
0x12
0x14
0x16
0x18
0x20
7'b
8'b
I2C Address Select (IDx)Mode Select 0 (MODE_SEL0)
Mode Select 1 (MODE_SEL1)
63
1 8
2 7
54
S5 A6S-4104-H
GND
10.0k
R102
10.0k
R104
DNP
DNP
10.0k
R105
DNP
VDDIO
PDB INTB
Mode Switches
0.1µF
C84
0.1µF
C81
GND
GND
0.1µF
C82
GND
GND
0
R92
DNP
0
R101
DNP
0
R100
DNP
0
R56
DNP
0
R74
DNP
0
R73
DNP
0
R57
DNP
0
R65
DNP
0
R83
DNP
0
R82
DNP
SCLK
0
R107
10µF
C83
GND
0
R106
10.0k
R103
PDB
INTB
SCLK
RES
12345
6
131415
16712
8 9
10
11
S6 219-8MST
12345
6
131415
16712
8 9
10
11
S2 219-8MST
12345
6
131415
16712
8 9
10
11
S3 219-8MST
41 32
S4
EVQ-PAD04M
1 2
J5
5-146261-1
1 2
J6
5-146261-1
1 2
J7
5-146261-1
1 2
J8
5-146261-1
118k
R49
1
118k
R85
118k
R58
1
30.9k
R67
30.9k
R76
30.9k
R94
107k
R50
107k
R86
107k
R59
51.1k
R68
51.1k
R77
51.1k
R95
113k
R51
113k
R60
113k
R87
88.7k
R69
88.7k
R96
88.7k
R78
82.5k
R52
82.5k
R61
82.5k
R88
102k
R70
102k
R79
102k
R97
68.1k
R62
68.1k
R53
68.1k
R89
137k
R71
137k
R80
137k
R98
56.2k
R54
56.2k
R63
56.2k
R90
210k
R72
210k
R81
210k
R99
40.2k
R66
40.2k
R75
40.2k
R93
13.3k
R55
13.3k
R64
13.3k
R91
Assembly Note
ZZ13
For S2 activate switch between pins 1 an d 16
Assembly Note
ZZ14
For S6 activate switch between pins 1 an d 16
Assembly Note
ZZ15
For S3 activate switch between pins 1 an d 16
Appendix A
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38
EVM PCB Schematics SNLU172–January 2015
Copyright © 2015, Texas Instruments Incorporated
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1
2
2
3
3
4
4
5
5
6
6
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A A
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© Texas Instruments 2014
Drawn By: Engineer:
Tran Dam
Texas Instruments and/or its licensors do not warrant the accuracy or compl eteness of this specification or any informa tion contained therein. Texas Instrument s and/or its licensors do not warrant that this design will meet the specificatio n s, will be suitable for your application or fit for an y particular purpose, or will operate in an implementation. Texas Instruments and/or its
licensors do not warrant that the design is production worthy. You should com pletely validate and test your design imp lementation to confirm the system function ality for your application.
Not in version controlSVN Rev:
SV600978Number: Rev: A
1
234
5
J11 142-0701-851
1
234
5
J12 142-0701-851
1
234
5
J13 142-0701-851
GND GND
GNDGND
DOUT0_P
DOUT0_N
DOUT1_P
DOUT1_N
49.9
R118
DNP
49.9
R114
DNP
49.9
R112
DNP
49.9
R109
DNP
GND
GND
IN_CLK_P
IN_D0_N
IN_D0_P IN_D1_N
IN_D1_P IN_D2_N
IN_D2_P
IN_CLK_N
CEC
DDC_SCL
DDC_SDA
RX_5V
HPD
GND GND
VDD_DDC
0.1µF
C85
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16
J23
TSW-108-07-G-D
0
R132
0
R135
0
R137
0
R138
0
R139
0
R141
0
R143
DNP
0
R144
DNP
PDB
D_GPIO0/MOSI D_GPIO1/MISO D_GPIO2/SPLK
D_GPIO3/SS
INTB SDA SCLGPIO1/I2C(SCL)
GPIO0/I2C(SDA)
GPIO2/SPI(SCLK)
GPIO6/PWM1/SPI(CS)
GPIO4/SPI(SIMO)/UART(TXD)
GPIO5/SPI(SOMI)/UART(RXD)
PDB_CTRL INTB_CTRL
0
R113
0
R115
0
R117
0
R119
0
R120
0
R121
0
R125
0
R128
4
1 2 3
J20
0022112042
4
1 2 3
J24
0022112042
1 2
J26
5-146261-1
GND
GND
GND
4.7pF
C88
4.7pF
C87
4.7pF
C90
4.7pF
C91
4.7pF
C92
0
R142
0
R134
0
R136
0
R126
0
R127
CEC
DDC_SCL DDC_SDA
SDA
SCL
1 2
J17
5-146261-1
1 2
J22
5-146261-1
VDD_I2C
VDD_DDC
0.1µF
C86
DNP
0.1µF
C89
GND
GND
RES0_0
RES0_1
GND
GND
GND
I2S_CLK/GPIO8_REG
I2S_WC/GPIO7_REG
I2S_DA/GPIO6_REG
I2S_DB/GPIO5_REG
I2S_DC/GPIO2 I2S_DD/GPIO3 VDDIO
SDIN/GPIO0 SWC/GPIO1 SCLK MCLK
0
R133
D_GPIO0/MOSI D_GPIO1/MISO D_GPIO2/SPLK D_GPIO3/SS
1 2
J15
5-146261-1
INTB
GND
0
R129
0
R108
0
R110
TP3
1 2
J19
5-146261-1
RX_5V
GND
1 2
J16
5-146261-1
HPD
GND
4
1 2 3
J25
TSW-104-07-G-S
DAOUT
BCK
LRCK
SCKIN
4.7k
R124
4.7k
R123
47k
R130
47k
R131
27k
R140
VDD33
10.0k
R116
10.0k
R122
1 2 3
J14
TSW-103-07-G-S
1 2 3
J18
TSW-103-07-G-S
VDDIO
VDDIO
1.0k
R111
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 17 19 21 23 25 27 29 31
16 18 20 22 24 26 28 30 32
J21
TSW-116-07-G-D
IN_CLK_N
IN_CLK_P IN_D0_N
IN_D0_P IN_D1_N
IN_D1_P IN_D2_N
IN_D2_P
DOUT1_N
DOUT1_P
DOUT0_N
DOUT0_P
J10_12_N
J10_12_P
J10_9_N
J10_9_P
J10_6_N
J10_6_P
J10_3_N
J10_3_P
1
2 3
4
L10
DLW21SN261XQ2L
1
2 3
4
L11
DLW21SN261XQ2L
1
2
23
2120
22
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
J10 1747981-1
1
234
5
J9 142-0701-851
GND
SMAD0_N SMAD0_P
SMAD1_N SMAD1_P
SMAD0_N
SMAD0_P
SMAD1_N
SMAD1_P
0
R209
DNP
0
R210
DNP
0
R211
DNP
0
R212
DNP
SH-J14
SH-J17
SH-J18
SH-J22
2
1
4
3
PAIR A1
PAIR A2
EMITTER
P1 D4S20G-400A5-Z
1
2
3
4 5
6
7
8
U3
Assembly Note
ZZ5
Jumper SH-J14 connects Pin 2 and 3 for Header J14
Assembly Note
ZZ6
Jumper SH-J17 connects Pin 1 and 2 for Header J17
Assembly Note
ZZ7
Jumper SH-J18 connects Pin 2 and 3 for Header J18
Assembly Note
ZZ8
Jumper SH-J22 connects Pin 1 and 2 for Header J22
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Appendix A
SNLU172–January 2015 EVM PCB Schematics
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1
1
2
2
3
3
4
4
5
5
6
6
D D
C C
B B
A A
8 10
11/4/2014
SV600978A_LED.SchDoc
Sheet Title:
Size:
Mod. Date:
File:
Sheet: of
B
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DS90UB949-Q1EVMProject Title:
Designed for:Pub lic Release
Assembly Variant: 004
© Texas Instruments 2014
Drawn By: Engineer:
Tran Dam
Texas Instruments and/or its licensors do not warrant the accuracy or compl eteness of this specification or any informa tion contained therein. Texas Instrument s and/or its licensors do not warrant that this design will meet the specificatio n s, will be suitable for your application or fit for an y particular purpose, or will operate in an implementation. Texas Instruments and/or its
licensors do not warrant that the design is production worthy. You should com pletely validate and test your design imp lementation to confirm the system function ality for your application.
Not in version controlSVN Rev:
SV600978Number: Rev: A
GND
Green
12
D2
GND
INTB
RX_5V
HPD
Green
12
D1
GND
VDD5V
470
R173
470
R174
470
R175
H4
NY PMS 440 0025 PH
H7
NY PMS 440 0025 PH
H8
NY PMS 440 0025 PH
H2
1902C
H5
1902C
H6
1902C
FID2
FID1
FID3
SV600978 A
PCB Number:
PCB Rev:
Label Assembly Note
ZZ1
This Assembly Note is for PCB labels only
Assembly Note
ZZ2
These assemblies are ESD sensitive, ESD pre cautions shall be observed
Assembly Note
ZZ3
These assemblies must be clean an d free from flux and all contaminants. U se of no clean flux is not acceptable.
Assembly Note
ZZ4
These assmblies must comply with workma nship standards IPC-A-610 Class 2, unl ess otherwise specified.
Board Silkscreen Label: "Not for EMI Testing"
LOGO
PCB
Texas Instruments
Orange
12
D3
H1
1902C
H3
NY PMS 440 0025 PH
LOGO
PCB
Pb-Free Symbol
LOGO
PCB
FCC disclaimer
1
2 3
Q1
1
2 3
Q2
1
2 3
Q3
Appendix A
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EVM PCB Schematics SNLU172–January 2015
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2
2
3
3
4
4
5
5
6
6
D D
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A A
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Sheet: of
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DS90UB949-Q1EVMProject Title:
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© Texas Instruments 2014
Drawn By: Engineer:
Tran Dam
Texas Instruments and/or its licensors do not warrant the accuracy or compl eteness of this specification or any informa tion contained therein. Texas Instrument s and/or its licensors do not warrant that this design will meet the specificatio n s, will be suitable for your application or fit for an y particular purpose, or will operate in an implementation. Texas Instruments and/or its
licensors do not warrant that the design is production worthy. You should com pletely validate and test your design imp lementation to confirm the system function ality for your application.
Not in version controlSVN Rev:
SV600978Number: Rev: A
3
1
2
J1
SJ-3523-SMT
10µF
C11
10µF
C6
0.1µF
C7
0.1µF
C12
GND
GND
10µF
C2
0.1µF
C3
VDD33
10µF
C10
10µF
C5
330 ohm
L1
330 ohm
L2
VDD5V
GND
0.01µF
C9
100
R2
100
R1
GND
GND
1 6
S1A
219-3LPST
2 5
S1B
219-3LPST
3 4
S1C 219-3LPST
GND
10.0kR510.0k
R6
10.0k
R4
VDD33
FMT
MD1
MD0
FMT MD1 MD0
0
R7
0
R9
0
R3
0.1µF
C14
GND
123
J3
TSW-103-07-G-S
0
R10
DAOUT
BCK
LRCK
SCKIN
10.0k
R8
10µF
C13
TRI-ST
1
GND
2
OUT
3
VDD
4
Y1
ECS-8FA3-xxx-TR
GND
1
0.01µF
C1
1µF
C4
1µF
C8
1
2
J2
5-146261-1
SH-J3
VREF
1
AGND
2
VCC
3
VDD
4
DGND
5
SCKI
6
LRCK7BCK
8
DOUT
9
MD0
10
MD1
11
FMT
12
VINL
13
VINR
14
U1
PCM1808PWR
Assembly Note
ZZ16
Jumper SH-J3 connects Pin 2 and 3 for Header J3
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Appendix A
SNLU172–January 2015 EVM PCB Schematics
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1
2
2
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3
4
4
5
5
6
6
D D
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A A
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SV600978A_Power.SchDoc
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DS90UB949-Q1EVMProject Title:
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Assembly Variant: 004
© Texas Instruments 2014
Drawn By: Engineer:
Tran Dam
Texas Instruments and/or its licensors do not warrant the accuracy or compl eteness of this specification or any informa tion contained therein. Texas Instrument s and/or its licensors do not warrant that this design will meet the specificatio n s, will be suitable for your application or fit for an y particular purpose, or will operate in an implementation. Texas Instruments and/or its
licensors do not warrant that the design is production worthy. You should com pletely validate and test your design imp lementation to confirm the system function ality for your application.
Not in version controlSVN Rev:
SV600978Number: Rev: A
1
3 2
J36
PJ-102A
GND
0.1µF
C126
GND
1 2 3 4 5 6 7 8
J38
GND
GND
VDD33
VDD_EXT
GND
0.1µF
C121
GND
4.7µF
C120
0.1µF
C122
GND
4.7µF
C127
0.01µF
C128
TP10
100k
R196
0
R198
0.1µF
C129
4.99k
R199
1.87k
R197
VDD11VDD5V
U11
TPS767D3XXPWP
GND
GND
GND
100k
R200
100k
R205
TP12
TP15
TESTPOINT
TP16
TP13
0
R203
0
R206
12.1k
R202
GND
23.2k
R201
0.1µF
C131
4.7µF
C130
0.1µF
C135
4.7µF
C134
10µF
C123
10µF
C133
0.1µF
C132
GND
10µF
C137
0.1µF
C136
GND
VDD5V
VDD33
VDD1V8
100k
R193
GND
3300pF
C118
1µF
C119
10.0k
R194
4.7µH
L14
7440650047
10pF
C112
10µF
C116
0.1µF
C117
GND
VDD5V
GND
TP14
TP17
TP7
TP5
VDD_EXT
TP9
1 2
J34
5-146261-1
GND
1 2 3
J37
TSW-103-07-G-S
VDD_I2C
1 2 3
J41
TSW-103-07-G-S
VDD_DDC RX_5V
1 2 3
J40
TSW-103-07-G-S
VTERMc
VDD33
VDD33
VDD1V8
VDD1V8
VDD33
1
2
3
J33
TSW-103-07-G-S
1 2
J35
5-146261-1
0
R195
0
R204
0
R207
1 2
J42
5-146261-1
1 2
J39
5-146261-1
1 2
J32
5-146261-1
0
R189
0.1µF
C113
124k
R187
22.1k
R188
GND
3.24k
R208
100µF
C114
1
47µF
C115
22µF
C124
2.2µF
C125
D8
1N5819HW-7-F
VBUS
SH-J33
SH-J37
SH-J40
SH-J41
VOUT
1
VFB
2
VREG5
3
SS
4
GND
5
PG
6
EN
7
PGND1
8
PGND2
9
SW1
10
SW2
11
VBST
12
VIN
13
VCC
14
PWPD
15
U9
TPS54225PWP
IN
1
IN
2
PG
3
BIAS
4
EN5GND
6
SS
7
FB
8
OUT
9
OUT
10
PWPD
11
U10
TPS74701DRC
Assembly Note
ZZ9
Jumper SH-J33 connects Pin 1 and 2 for Header J33
Assembly Note
ZZ10
Jumper SH-J37 connects Pin 2 and 3 for Header J37
Assembly Note
ZZ11
Jumper SH-J40 connects Pin 2 and 3 for Header J40
Assembly Note
ZZ12
Jumper SH-J41 connects Pin 2 and 3 for Header J41
Appendix A
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EVM PCB Schematics SNLU172–January 2015
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Board Layers
Appendix B
SNLU172–January 2015
Board Layout
SNLU172–January 2015 Board Layout
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43
Appendix B
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Board Layout SNLU172–January 2015
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Appendix B
SNLU172–January 2015 Board Layout
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45
Appendix B
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46
Board Layout SNLU172–January 2015
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Appendix B
SNLU172–January 2015 Board Layout
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47

Revision History

Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
DATE REVISION NOTES
January 2015 * Initial release
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Revision History SNLU172–January 2015
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STANDARD TERMS AND CONDITIONS FOR EVALUATION MODULES
1. Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, or documentation (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms and conditions set forth herein. Acceptance of the EVM is expressly subject to the following terms and conditions.
1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions set forth herein but rather shall be subject to the applicable terms and conditions that accompany such Software
1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned, or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production system.
2 Limited Warranty and Related Remedies/Disclaimers:
2.1 These terms and conditions do not apply to Software. The warranty, if any, for Software is covered in the applicable Software License Agreement.
2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM to User. Notwithstanding the foregoing, TI shall not be liable for any defects that are caused by neglect, misuse or mistreatment by an entity other than TI, including improper installation or testing, or for any EVMs that have been altered or modified in any way by an entity other than TI. Moreover, TI shall not be liable for any defects that result from User's design, specifications or instructions for such EVMs. Testing and other quality control techniques are used to the extent TI deems necessary or as mandated by government requirements. TI does not test all parameters of each EVM.
2.3 If any EVM fails to conform to the warranty set forth above, TI's sole liability shall be at its option to repair or replace such EVM, or credit User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the warranty period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to repair or replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall be warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day warranty period.
3 Regulatory Notices:
3.1 United States
3.1.1 Notice applicable to EVMs not FCC-Approved:
This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit to determine whether to incorporate such items in a finished product and software developers to write software applications for use with the end product. This kit is not a finished product and when assembled may not be resold or otherwise marketed unless all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product not cause harmful interference to licensed radio stations and that this product accept harmful interference. Unless the assembled kit is designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must operate under the authority of an FCC license holder or must secure an experimental authorization under part 5 of this chapter.
3.1.2 For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:
CAUTION
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment.
FCC Interference Statement for Class A EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the instruction manual, may cause harmful interference to radio communications. Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense.
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FCC Interference Statement for Class B EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures:
Reorient or relocate the receiving antenna.
Increase the separation between the equipment and receiver.
Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
Consult the dealer or an experienced radio/TV technician for help.
3.2 Canada
3.2.1 For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210
Concerning EVMs Including Radio Transmitters:
This device complies with Industry Canada license-exempt RSS standard(s). Operation is subject to the following two conditions: (1) this device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired operation of the device.
Concernant les EVMs avec appareils radio:
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concerning EVMs Including Detachable Antennas:
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser) gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated. Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited for use with this device.
Concernant les EVMs avec antennes détachables
Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de l'émetteur
3.3 Japan
3.3.1 Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に
輸入される評価用キット、ボードについては、次のところをご覧ください。
http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page
3.3.2 Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan are NOT certified by TI as conforming to Technical Regulations of Radio Law of Japan.
If User uses EVMs in Japan, User is required by Radio Law of Japan to follow the instructions below with respect to EVMs:
1. Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for Enforcement of Radio Law of Japan,
2. Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to EVMs, or
3. Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan.
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【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 本開発キットは技術基準適合証明を受けておりません。 本製品のご使用に際しては、電波法遵守のため、以下のいずれかの措置を取っていただく必要がありますのでご注意ください。
1. 電波法施行規則第6条第1項第1号に基づく平成18328日総務省告示第173号で定められた電波暗室等の試験設備でご使用 いただく。
2. 実験局の免許を取得後ご使用いただく。
3. 技術基準適合証明を取得後ご使用いただく。
なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。
上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・インスツルメンツ株式会社 東京都新宿区西新宿6丁目24番1号 西新宿三井ビル
3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧くださ
い。http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
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4 EVM Use Restrictions and Warnings:
4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.
4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information related to, for example, temperatures and voltages.
4.3 Safety-Related Warnings and Restrictions:
4.3.1 User shall operate the EVM within TI’s recommended specifications and environmental considerations stated in the user guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or property damage. If there are questions concerning performance ratings and specifications, User should contact a TI field representative prior to connecting interface electronics including input power and intended loads. Any loads applied outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative. During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit components may have elevated case temperatures. These components include but are not limited to linear regulators, switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the information in the associated documentation. When working with the EVM, please be aware that the EVM may become very warm.
4.3.2 EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the dangers and application risks associated with handling electrical mechanical components, systems, and subsystems. User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees, affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or designees.
5. Accuracy of Information: To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as accurate, complete, reliable, current, or error-free.
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6. Disclaimers:
6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY WRITTEN DESIGN MATERIALS PROVIDED WITH THE EVM (AND THE DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL FAULTS." TI DISCLAIMS ALL OTHER WARRANTIES, EXPRESS OR IMPLIED, REGARDING SUCH ITEMS, INCLUDING BUT NOT LIMITED TO ANY IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY THIRD PARTY PATENTS, COPYRIGHTS, TRADE SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS.
6.2 EXCEPT FOR THE LIMITED RIGHT TO USE THE EVM SET FORTH HEREIN, NOTHING IN THESE TERMS AND CONDITIONS SHALL BE CONSTRUED AS GRANTING OR CONFERRING ANY RIGHTS BY LICENSE, PATENT, OR ANY OTHER INDUSTRIAL OR INTELLECTUAL PROPERTY RIGHT OF TI, ITS SUPPLIERS/LICENSORS OR ANY OTHER THIRD PARTY, TO USE THE EVM IN ANY FINISHED END-USER OR READY-TO-USE FINAL PRODUCT, OR FOR ANY INVENTION, DISCOVERY OR IMPROVEMENT MADE, CONCEIVED OR ACQUIRED PRIOR TO OR AFTER DELIVERY OF THE EVM.
7. USER'S INDEMNITY OBLIGATIONS AND REPRESENTATIONS. USER WILL DEFEND, INDEMNIFY AND HOLD TI, ITS LICENSORS AND THEIR REPRESENTATIVES HARMLESS FROM AND AGAINST ANY AND ALL CLAIMS, DAMAGES, LOSSES, EXPENSES, COSTS AND LIABILITIES (COLLECTIVELY, "CLAIMS") ARISING OUT OF OR IN CONNECTION WITH ANY HANDLING OR USE OF THE EVM THAT IS NOT IN ACCORDANCE WITH THESE TERMS AND CONDITIONS. THIS OBLIGATION SHALL APPLY WHETHER CLAIMS ARISE UNDER STATUTE, REGULATION, OR THE LAW OF TORT, CONTRACT OR ANY OTHER LEGAL THEORY, AND EVEN IF THE EVM FAILS TO PERFORM AS DESCRIBED OR EXPECTED.
8. Limitations on Damages and Liability:
8.1 General Limitations. IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL, OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF THESE TERMS ANDCONDITIONS OR THE USE OF THE EVMS PROVIDED HEREUNDER, REGARDLESS OF WHETHER TI HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED TO, COST OF REMOVAL OR REINSTALLATION, ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, RETESTING, OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OF GOODWILL, LOSS OF PROFITS, LOSS OF SAVINGS, LOSS OF USE, LOSS OF DATA, OR BUSINESS INTERRUPTION. NO CLAIM, SUIT OR ACTION SHALL BE BROUGHT AGAINST TI MORE THAN ONE YEAR AFTER THE RELATED CAUSE OF ACTION HAS OCCURRED.
8.2 Specific Limitations. IN NO EVENT SHALL TI'S AGGREGATE LIABILITY FROM ANY WARRANTY OR OTHER OBLIGATION ARISING OUT OF OR IN CONNECTION WITH THESE TERMS AND CONDITIONS, OR ANY USE OF ANY TI EVM PROVIDED HEREUNDER, EXCEED THE TOTAL AMOUNT PAID TO TI FOR THE PARTICULAR UNITS SOLD UNDER THESE TERMS AND CONDITIONS WITH RESPECT TO WHICH LOSSES OR DAMAGES ARE CLAIMED. THE EXISTENCE OF MORE THAN ONE CLAIM AGAINST THE PARTICULAR UNITS SOLD TO USER UNDER THESE TERMS AND CONDITIONS SHALL NOT ENLARGE OR EXTEND THIS LIMIT.
9. Return Policy. Except as otherwise provided, TI does not offer any refunds, returns, or exchanges. Furthermore, no return of EVM(s) will be accepted if the package has been opened and no return of the EVM(s) will be accepted if they are damaged or otherwise not in a resalable condition. If User feels it has been incorrectly charged for the EVM(s) it ordered or that delivery violates the applicable order, User should contact TI. All refunds will be made in full within thirty (30) working days from the return of the components(s), excluding any postage or packaging costs.
10. Governing Law: These terms and conditions shall be governed by and interpreted in accordance with the laws of the State of Texas, without reference to conflict-of-laws principles. User agrees that non-exclusive jurisdiction for any dispute arising out of or relating to these terms and conditions lies within courts located in the State of Texas and consents to venue in Dallas County, Texas. Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief in any United States or foreign court.
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