Texas Instruments DS125BR800EVM User Manual

DS125BR800EVM User’s Guide
User's Guide
Literature Number: SNLU122
November 2012
User's Guide
SNLU122–November 2012
DS125BR800EVM Evaluation Kit
Topic ........................................................................................................................... Page
1 Features ............................................................................................................. 3
2 4-Level IO Control ............................................................................................... 5
3 Switch Connection Overview ................................................................................ 6
4 Quick Start Guide ................................................................................................ 7
5 SMBus Slave Mode of the EQ, VOD, and De-Emphasis level: .................................. 10
6 Bill of Materials for DS125BR800EVM: ................................................................. 11
7 Schematic for DS125BR800EVM: ......................................................................... 12
8 EVM Layout ...................................................................................................... 13
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DS125BR800EVM Evaluation Kit SNLU122–November 2012
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1 Features
8 Channel Repeater up to 12.5 Gbps
Low 65 mW/channel power consumption, with option to power down unused channels
Transparent management of link training protocol for PCIe, SAS, and 10G-KR
Receive Equalization up to 30 dB at 12.5 Gbps
Settable transmit de-emphasis driver to -12 dB
Transmit output voltage control: 700 – 1300 mV
Programmable via pin selection, EEPROM, or SMBus interface
Single supply operation: VIN = 3.3V±10% or VDD = 2.5V ±5%
-40°C to +85°C Operation
5 kV HBM ESD rating
High speed signal flow–thru pin-out package: 54-pin QFN (10 mm x 5.5 mm, 0.5 mm pitch)
Applications
FR-4 Backplane Traces and High Speed Cable
Ordering Information
EVM ID DEVICE ID DEVICE PACKAGE
DS125BR800EVM DS125BR800SQE/NOPB QFN-54
Features
SNLU122–November 2012 DS125BR800EVM Evaluation Kit
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Figure 1. DS125BREVK REV. 1
DS125BR401/DS125BR800 Top Assembly
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Features
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Figure 2. DS125BREVK REV. 1
DS125BR401/DS125BR800 Bottom Assembly
4
DS125BR800EVM Evaluation Kit SNLU122–November 2012
Copyright © 2012, Texas Instruments Incorporated
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2 4-Level IO Control
Many of the control pins on the DS125BR800 have more than two valid levels. Table 1 below shows how to access each of these levels with the switch banks on the back side of the EVM.
4-Level Input Settings Setting for 3 pin switches (3-2-1)
0 - Tie 1kΩ to GND ON - OFF - OFF
R - Tie 20kΩ to GND OFF - ON - OFF
F - FLOAT (open) OFF - OFF - OFF 1 - Tie 1kΩ to VIH OFF - OFF - ON
The following switches are used to set the input condition for the 4-level inputs:
SW1, SW2, SW3, SW5, SW6, SW8, SW9 There are 3 switches connected to an input signal pin. Each switch when set to the ON position sets the
pin to one of the 4-level setting. The 6 pin switches are assigned similar to the 3 pin switches. The only difference is 2 signal pins are connected and thus 6-5-4 is for the one signal pin and 3-2-1 is for another signal pin.
NOTE: Only 1 switch at the ON position is allowed. Activating more than one switch concurrently
results in an indeterminate voltage level.
4-Level IO Control
Table 1. Switches to set the 4-Level input control pins
SNLU122–November 2012 DS125BR800EVM Evaluation Kit
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5
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