TEXAS INSTRUMENTS DRV8824 Technical data

DRV8824
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SLVSA06B –OCTOBER 2009–REVISED APRIL 2010
STEPPER MOTOR CONTROLLER IC
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1

FEATURES

2
PWM Microstepping Motor Driver – Built-In Microstepping Indexer – Five-Bit Winding Current Control Allows Up
to 32 Current Levels
– Low MOSFET On-Resistance
1.6-A Maximum Drive Current at 24 V, 25°C
Built-In 3.3-V Reference Output
8-V to 45-V Operating Supply Voltage Range
Thermally Enhanced Surface Mount Package

DESCRIPTION

The DRV8824 provides an integrated motor driver solution for printers, scanners, and other automated equipment applications. The device has two H-bridge drivers and a microstepping indexer, and is intended to drive a bipolar stepper motor. The output driver block for each consists of N-channel power MOSFET’s configured as full H-bridges to drive the motor windings. The DRV8824 is capable of driving up to 1.6-A of output current (with proper heatsinking, at 24 V and 25°C).
A simple step/direction interface allows easy interfacing to controller circuits. Pins allow configuration of the motor in full-step up to 1/32-step modes. Decay mode is programmable.
Internal shutdown functions are provided for overcurrent protection, short circuit protection, undervoltage lockout and overtemperature.
The DRV8824 is available in a 28-pin HTSSOP package with PowerPAD™ (Eco-friendly: RoHS & no Sb/Br).

APPLICATIONS

Money Handling Machines
Video Security Cameras
Printers
Scanners
Office Automation Machines
Gaming Machines
Factory Automation
Robotics
ORDERING INFORMATION
T
A
–40°C to 85°C PowerPAD™ (HTSSOP) - PWP Reel of 2000 DRV8824PWPR 8824
(1) For the most current packaging and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testingof all parameters.
PACKAGE
(2)
(1)
ORDERABLE PART TOP-SIDE
NUMBER MARKING
Copyright © 2009–2010, Texas Instruments Incorporated
Charge
Pump
Thermal
Shut down
AOUT1
AOUT2
BOUT1
BOUT2
GNDGND
0.1uF
0.01uF
VM
Step
Motor
VMA
VMB
CP1
CP2
VCP
ISENA
ISENB
STEP
DIR
MODE1
MODE2
AVREF
HS Gate
Drive
VM
VM
Internal
Reference &
Regs
Int. VCC
Motor
Driver B
nFAULT
Indexer /
Control
Logic
nRESET
Motor
Driver A
nENBL
nSLEEP
VM
V3P3OUT
3.3V
LS Gate
Drive
+
+
-
-
3.3V
BVREF
MODE0
nHOME
VM
DECAY
DRV8824
SLVSA06B –OCTOBER 2009–REVISED APRIL 2010

DEVICE INFORMATION

Functional Block Diagram
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DRV8824
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SLVSA06B –OCTOBER 2009–REVISED APRIL 2010
Table 1. TERMINAL FUNCTIONS
NAME PIN I/O
POWER AND GROUND
GND 14, 28 - Device ground VMA 4 - Bridge A power supply VMB 11 - Bridge B power supply
V3P3OUT 15 O 3.3-V regulator output CP1 1 IO Charge pump flying capacitor
CP2 2 IO Charge pump flying capacitor VCP 3 IO High-side gate drive voltage
CONTROL
nENBL 21 I Enable input
nSLEEP 17 I Sleep mode input
STEP 22 I Step input DIR 20 I Direction input Level sets the direction of stepping
MODE0 24 I Microstep mode 0 MODE1 25 I Microstep mode 1 MODE2 26 I Microstep mode 2
DECAY 19 I Decay mode
nRESET 16 I Reset input AVREF 12 I Bridge A current set reference input Reference voltage for winding current set.
BVREF 13 I Bridge B current set reference input
NC 23 No connect Leave this pin unconnected.
STATUS
nHOME 27 OD Home position Logic low when at home state of step table nFAULT 18 OD Fault
OUTPUT
ISENA 6 IO Bridge A ground / Isense Connect to current sense resistor for bridge A. ISENB 9 IO Bridge B ground / Isense Connect to current sense resistor for bridge B. AOUT1 5 O Bridge A output 1 AOUT2 7 O Bridge A output 2 BOUT1 10 O Bridge B output 1 BOUT2 8 O Bridge B output 2
(1) Directions: I = input, O = output, OZ = tri-state output, OD = open-drain output, IO = input/output
(1)
DESCRIPTION
Connect to motor supply (8 - 45 V). Both pins must be connected to same supply.
Bypass to GND with a 0.47-mF 6.3-V ceramic capacitor. Can be used to supply VREF.
Connect a 0.01-mF 50-V capacitor between CP1 and CP2.
Connect a 0.1-mF 16-V ceramic capacitor to VM.
Logic high to disable device outputs and indexer operation, logic low to enable
Logic high to enable device, logic low to enter low-power sleep mode
Rising edge causes the indexer to move one step
MODE0 - MODE2 set the step mode - full, 1/2, 1/4, 1/8/ 1/16, or 1/32 step
Low = slow decay, open = mixed decay, high = fast decay
Active-low reset input initializes the indexer logic and disables the H-bridge outputs
Normally AVREF and BVREF are connected to the same voltage. Can be connected to V3P3OUT. A 0.01-µF bypass capacitor to GND is recommended.
Logic low when in fault condition (overtemp, overcurrent)
Connect to bipolar stepper motor winding A. Positive current is AOUT1 AOUT2
Connect to bipolar stepper motor winding B. Positive current is BOUT1 BOUT2
EXTERNAL COMPONENTS
OR CONNECTIONS
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DRV8824
SLVSA06B –OCTOBER 2009–REVISED APRIL 2010
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ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range (unless otherwise noted)
VMx Power supply voltage range –0.3 to 47 V
Digital pin voltage range –0.5 to 7 V
VREF Input voltage –0.3 to 4 V
ISENSEx pin voltage –0.3 to 0.8 V Peak motor drive output current, t < 1 mS Internally limited A Continuous motor drive output current
ESD rating V
Continuous total power dissipation See Dissipation Ratings table
T
J
T
A
T
stg
Operating virtual junction temperature range –40 to 150 °C Operating ambient temperature range –40 to 85 °C Storage temperature range –60 to 150 °C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability. (2) All voltage values are with respect to network ground terminal. (3) Power dissipation and thermal limits must be observed.
(3)
HBD (human body model) 2000 CDM (charged device model) 500
(1) (2)
VALUE UNIT
1.6 A

DISSIPATION RATINGS (PRELIMINARY)

BOARD PACKAGE R
(1)
Low-K
(2)
Low-K High-K High-K
(3) (4)
PWP
qJA
67.5°C/W 14.8 mW/°C 1.85 W 1.18 W 0.96 W
39.5°C/W 25.3 mW/°C 3.16 W 2.02 W 1.64 W
33.5°C/W 29.8 mW/°C 3.73 W 2.38 W 1.94 W 28°C/W 35.7 mW/°C 4.46 W 2.85 W 2.32 W
(1) The JEDEC Low-K board used to derive this data was a 76-mm x 114-mm, 2-layer, 1.6-mm thick PCB with no backside copper. (2) The JEDEC Low-K board used to derive this data was a 76-mm x 114-mm, 2-layer, 1.6-mm thick PCB with 25-cm22-oz copper on back
side.
(3) The JEDEC High-K board used to derive this data was a 76-mm x 114-mm, 4-layer, 1.6-mm thick PCB with no backside copper and
solid 1-oz internal ground plane.
(4) The JEDEC High-K board used to derive this data was a 76-mm x 114-mm, 4-layer, 1.6-mm thick PCB with 25-cm21-oz copper on back
side and solid 1-oz internal ground plane.
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DERATING FACTOR
ABOVE TA= 25°C
Product Folder Link(s): DRV8824
TA< 25°C TA= 70°C TA= 85°C
DRV8824
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RECOMMENDED OPERATING CONDITIONS

over operating free-air temperature range (unless otherwise noted)
V V I
V3P3
M REF
Motor power supply voltage range VREF input voltage
(2)
V3P3OUT load current 1 mA
(1) All VMpins must be connected to the same supply voltage. (2) Operational at VREF between 0 V and 1 V, but accuracy is degraded.
(1)

ELECTRICAL CHARACTERISTICS

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POWER SUPPLIES
I
VM
I
VMQ
V
UVLO
V3P3OUT REGULATOR
V
3P3
LOGIC-LEVEL INPUTS
V
IL
V
IH
V
HYS
I
IL
I
IH
nHOME, nFAULT OUTPUTS (OPEN-DRAIN OUTPUTS)
V
OL
I
OH
DECAY INPUT
V
IL
V
IH
I
IN
H-BRIDGE FETS
R
DS(ON)
R
DS(ON)
I
OFF
MOTOR DRIVER
f
PWM
t
BLANK
t
R
t
F
t
DEAD
PROTECTION CIRCUITS
I
OCP
t
TSD
VM operating supply current VM= 24 V, f
< 50 kHz 5 8 mA
PWM
VM sleep mode supply current VM= 24 V 10 20 mA VM undervoltage lockout voltage VMrising 7.8 8.2 V
V3P3OUT voltage IOUT = 0 to 1 mA 3.2 3.3 3.4 V
Input low voltage 0.6 0.7 V Input high voltage 2 5.25 V Input hysteresis 0.45 V Input low current VIN = 0 –20 20 mA Input high current VIN = 3.3 V 100 mA
Output low voltage IO= 5 mA 0.5 V Output high leakage current VO= 3.3 V 1 mA
Input low threshold voltage For slow decay mode 0.8 V Input high threshold voltage For fast decay mode 2 V Input current ±40 µA
HS FET on resistance
LS FET on resistance
VM= 24 V, IO= 1 A, TJ= 25°C 0.63 VM= 24 V, IO= 1 A, TJ= 85°C 0.76 0.90 VM= 24 V, IO= 1 A, TJ= 25°C 0.65 VM= 24 V, IO= 1 A, TJ= 85°C 0.78 0.90
Off-state leakage current –20 20 mA
Internal PWM frequency 37 50 63 kHz Current sense blanking time 3.75 ms Rise time VM= 24 V 100 360 ns Fall time VM= 24 V 80 250 ns Dead time 400 ns
Overcurrent protection trip level 1.8 5 A Thermal shutdown temperature Die temperature 150 160 180 °C
SLVSA06B –OCTOBER 2009–REVISED APRIL 2010
MIN NOM MAX UNIT
8.2 45 V 1 3.5 V
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DRV8824
SLVSA06B –OCTOBER 2009–REVISED APRIL 2010
ELECTRICAL CHARACTERISTICS (continued)
over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
CURRENT CONTROL
I
REF
V
TRIP
ΔI
TRIP
A
ISENSE
xVREF input current xVREF = 3.3 V –3 3 mA xISENSE trip voltage xVREF = 3.3 V, 100% current setting 635 660 685 mV
xVREF = 3.3 V , 5% current setting –25 25 xVREF = 3.3 V , 10% - 34% current
Current trip accuracy (relative to programmed value)
setting xVREF = 3.3 V, 38% - 67% current
setting xVREF = 3.3 V, 71% - 100% current
setting
Current sense amplifier gain Reference only 5 V/V

TIMING REQUIREMENTS

1 f 2 t 3 t 4 t 5 t 6 t 7 t
STEP WH(STEP) WL(STEP) SU(STEP) H(STEP) ENBL WAKE
Step frequency 250 kHz Pulse duration, STEP high 1.9 ms Pulse duration, STEP low 1.9 ms Setup time, command to STEP rising 200 ns Hold time, command to STEP rising 200 ns Enable time, nENBL active to STEP 200 ns Wakeup time, nSLEEP inactive to STEP 1 mS
–15 15
–10 10
–5 5
MIN MAX UNIT
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%
Figure 1. Timing Diagram
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DRV8824
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SLVSA06B –OCTOBER 2009–REVISED APRIL 2010

FUNCTIONAL DESCRIPTION

PWM Motor Drivers

The DRV8824 contains two H-bridge motor drivers with current-control PWM circuitry. A block diagram of the motor control circuitry is shown in Figure 2.
Figure 2. Motor Control Circuitry
Note that there are multiple VM motor power supply pins. All VM pins must be connected together to the motor supply voltage.
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