®
RT8813A
Multi-Phase PWM Controller with PWM-VID Reference
General Description
The RT8813A is a 3/2/1 phase synchronous Buck PWM
controller which is optimized for high performance graphic
microprocessor and computer applications. The IC
integrates a Constant-On-Time (COT) PWM controller, two
MOSFET drivers with internal bootstrap diodes, as well
as channel current balance and protection functions
including Over Voltage Protection (OVP), Under Voltage
Protection (UVP), current limit, and thermal shutdown into
the WQFN-24L 4x4 package.
The RT8813A adopts R
Current limit is accomplished through continuous inductor-
current-sense, while R
accurate channel current balance. Using the method of
current sampling utilizes the best advantages of each
technique.
The RT8813A features external reference input and PWM-
VID dynamic output voltage control, in which the feedback
voltage is regulated and tracks external input reference
voltage. Other features include adjustable switching
frequency, dynamic phase number control, internal/external
soft-start, power good indicator, and enable functions.
current sensing technique.
DS(ON)
current sensing is used for
DS(ON)
Features
Multi-Phase PWM Controller
Two Embedded MOSFET Drivers and Embedded
Switching Boot Diode
External Reference Input Control
PWM-VID Dynamic Voltage Control
Dynamic Phase Number Control
Lossless R
Internal Fixed and External Adjustable Soft-Start
Adjustable Current Limit Threshold
Adjustable Switching Frequency
UVP/OVP Protection
Shoot Through Protection and Short Pulse Free
Technology
Support an Ultra-Low Output Voltage as Standby
Voltage
Thermal Alert Indicator in 2/1 Active Phase
Application
Thermal Shutdown
Power Good Indicator
RoHS Compliant and Halogen Free
Current Sensing for Current Balance
DS(ON)
Simplified Application Circuit
VCC/ISEN1
BOOT1
RT8813A
UGATE1
PHASE1
LGATE1
TALERT/ISEN2
BOOT2
UGATE2
PHASE2
LGATE2
RGND
VSNS
PWM3
GND
V
IN
R
SEN1
V
IN
R
SEN2
Driver
PWM PHASE
GND
VCC
V
GND_SNS
V
OUT_SNS
V
V
OUT
PVCC
R
SET3
PVCC
TON
PGOOD
PSI
VID
EN
SS
TSEN/ISEN3
V
PVCC
R
TON
V
IN
PGOOD
PSI
VID
Chip Enable
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1
RT8813A
Applications
CPU/GPU Core Power Supply
Notebook PC Memory Power Supply
Chipset/RAM Power Supply
Generic DC/DC Power Regulator
Ordering Information
RT8813A
Package Type
QW : WQFN-24L 4x4 (W-Type)
(Exposed Pad-Option 1)
Lead Plating System
G : Green (Halogen Free and Pb Free)
Note :
Richtek products are :
RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
Suitable for use in SnPb or Pb-free soldering processes.
Function Pin Description
Marking Information
0P= : Product Code
0P=YM
YMDNN : Date Code
DNN
Pin Configurations
(TOP VIEW)
PVCC
LGATE1
PWM3
LGATE2
21 20 19 24 22 23
GND
25
TON
VREF
VSNS
RGND
WQFN-24L 4x4
BOOT1
UGATE1
EN
PSI
VID
REFADJ
PHASE1
1
2
3
4
5
6
78910 12 11
REFIN
PHASE2
18
BOOT2
17
UGATE2
16
PGOOD
15
VCC/ISEN1
14
TALERT/ISEN2
13
TSNS/ISEN3
SS
Pin No. Pin Name Pin Function
1 BOOT1 Bootstrap Suppl y for PWM 1. This pin powers the high side MOSFE T driver.
2 UGATE1
High Side Gate Driver of PWM 1. This pin prov ides the gate drive for the converter's
high side MOSFET. Connect this pin to the Gate of high s ide MOSFET.
3 EN Enable Contro l I nput. Active hig h input.
Power Saving Interface. When the voltage is pulled below 0.8V, the device will operate
4 PSI
into 1 phase DEM. When the voltage is bet ween 1.2V to 1.8V, the dev ice will operate
into 1 phase f orce CCM. W hen t he voltage is between 2.4V to 5 .5V, the device will
operate into active phase force CCM (only for 2 or 3 phase).
5 VID
Programming Output Voltage Contr ol Input. Ref er to PWM-VID Dynamic Voltage
Control .
6 REFADJ Refere nce Ad justment Output. Refer t o PWM-VID Dynamic Voltage Contro l.
7 REF IN External Reference Input.
8 VREF
9 TON
Refere nce Voltage Output. This is a high precision voltage refere nce (2V ) from VREF
pin to RGND pi n.
On-Time/ Switching Freq uency Adjustment Input. Connect a 100pF capacito r between
C
and gr ound is optional for noise imm unity enhancem ent.
TON
10 RGND Negative Remote Sense Input. Connect this pin to the ground of output lo ad.
11 V SNS Positive Remote Sense Input. Connect t his pin to the positive terminal of output load.
12 SS
Soft-Start Time Sett in g. Connect an ext erna l capacitor to adjust soft -start time.
When the ex ternal capacitor is remove d, t he i nt ernal soft-start function will be chose.
TSNS Temperatu re Sensing Inp ut f or 2/1 Phase Operati on.
13
ISEN3 Phase 3 Current Sense Inp ut f or 3 Phase Operation.
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Pin No. Pin Name Pin Function
RT8813A
14
15
16 PGOOD Power Good Indicator Output. Active high open drain output.
17 UGATE2
18 BOOT2 Bootstrap Supply for of PWM 2. This pin powers the high side MOSFET driver.
19 PHASE2
20 LG ATE2
21 PVCC
22 PW M 3
23 LG ATE1
24 PHASE1
25 (Exposed Pad) GND
TALERT
ISEN2 Phase 2 Current Sense Input for 3 Phase Operation.
VCC Supply Voltage Input for 2/1 Phase Operation. (Connect to PVCC)
ISEN1 Phase 1 Current Sense Input for 3 Phase Operation. (Connect to PHASE1)
Thermal Alert. Active low open drain output for 2/1 Phase Operation.
High Side Gate Driver of PWM 2. This pin provides the gate drive for the
converter's high side MOSFET. Connect this pin to the Gate of high side
MOS FET.
Switch Node for PWM2. This pin is return node of the high side driver of PWM
2. Connect this pin to the Source of high side MOSFET together with the Drain
of low side MOSFET and the inductor.
Low Side Gate Driver of PWM 2. This pin provides the gate drive for the
converter's low side MOSFET. Connect this pin to the Gate of low side
MOS FET.
Supply Voltage Input. Connect this pin to a 5V bias supply. Place a high quality
bypass capacitor from this pin to GND.
Third Phase PWM Control Signal Output to Driver for 3 Phase Operation. In 2/1
Phase Operation, this pin is high impedance.
Low Side Gate Driver of PWM 1. This pin provides the gate drive for the
converter's low side MOSFET. Connect this pin to the Gate of low side
MOS FET.
Switch Node for PWM1. This pin is return node of the high side driver of PWM
1. Connect this pin to the Source of high side MOSFET together with the Drain
of low side MOSFET and the inductor.
Ground. The Exposed pad should be soldered to a large PCB and connected to
GND for maximum thermal dissipation.
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3
RT8813A
Function Block Diagram
VREF
VID
REFADJ
PSI
REFIN
OV Threshold
Select
UV
40% REFIN
Mode Select
Reference
Output Gen.
+
+
-
Power On Reset
& Central Logic
Control & Protection Logic
Boot-Phase
Detection 1
PVCC
PGOOD
SS
VSNS
RGND
EN
TON
VCC/
ISEN1
TALERT/
ISEN2
TSNS/
ISEN3
Soft-Start
& Slew Rate
Control
Enable
Logic
To Power On Reset
VIN
Detection
Phase
Select
+
1V
-
Internal
OTP
To Central Logic
PWM
CMP
+
-
To Driver Logic
To Power On Reset
To Protection Logic
ZCD PHASE1
TON
Gen 1
TON
Gen 2
TON
Gen 3
To Driver Logic
&
Current
Balance
Current
Limit
Boot-Phase
Detection 2
PWM1
Driver
Logic
PWM2
S/H
S/H
S/H
GM
GM
GM
+
+
+
V
B
V
B
ISEN3
V
B
BOOT1
UGATE1
PHASE1
LGATE1
BOOT2
UGATE2
PHASE2
LGATE2
PWM3
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Operation
RT8813A
The RT8813A is a 3/2/1 phase synchronous Buck PWM
controller with integrated drivers which are optimized for
high performance graphic microprocessor and computer
applications. The IC integrates a COT (Constant-On-Time)
PWM controller with two MOSFET drivers, as well as
output current monitoring and protection functions.
Referring to the function block diagram of TON Genx, the
synchronous UGATE driver is turned on at the beginning
of each cycle. After the internal one-shot timer expires,
the UGATE driver will be turned off. The pulse width of
this one-shot is determined by the converter's input voltage
and the output voltage to keep the frequency fairly constant
over the input voltage range and output voltage. Another
one-shot sets a minimum off-time.
The RT8813A also features a PWM-VID dynamic voltage
control circuit driven by the pulse width modulation
method. This circuit reduces the device pin count and
enables a wide dynamic voltage range.
Soft-Start (SS)
For internal soft-start function, an internal current source
charges an internal capacitor to build the soft-start ramp
voltage. The output voltage will track the internal ramp
voltage during soft-start interval. For external soft-start
function, an additional capacitor connected from SS to
the GND will be charged by a current source and
determines the soft-start time.
Current Limit
The current limit circuit employs a unique “valley” current
sensing algorithm. If the magnitude of the current sense
signal at PHASE is above the current limit threshold, the
PWM is not allowed to initiate a new cycle. Thus, the
current to the load exceeds the average output inductor
current, the output voltage falls and eventually crosses
the under voltage protection threshold, inducing IC
shutdown.
Over Voltage Protection (OVP) & Under Voltage
Protection (UVP)
The output voltage is continuously monitored for over
voltage and under voltage protection. When the output
voltage exceeds its set voltage threshold (If V
OV = 2V, or V
> 1.33V, OV = 1.5 x V
REFIN
REFIN
REFIN
≤ 1.33V,
), UGATE
goes low and LGATE is forced high; when it is less than
40% of its set voltage, under voltage protection is triggered
and then both UGATE and LGATE gate drivers are forced
low. The controller is latched until PVCC is re-supplied
and exceeds the POR rising threshold voltage or EN is
reset.
PGOOD
The power good output is an open drain architecture.
When the soft-start is finished, the PGOOD open drain
output will be high impedance.
Current Balance
The RT8813A implements internal current balance
mechanism in the current loop. The RT8813A senses per
phase current and compares it with the average current. If
the sensed current of any particular phase is higher than
average current, the on-time of this phase will be adjusted
to be shorter.
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5
RT8813A
Absolute Maximum Ratings (Note 1)
TON to GND ------------------------------------------------------------------------------------------------------------------ − 0.3V to 30V
RGND to GND --------------------------------------------------------------------------------------------------------------- − 0.7V to 0.7V
BOOTx to PHASEx -------------------------------------------------------------------------------------------------------- − 0.3V to 6V
PHASEx to GND
DC------------------------------------------------------------------------------------------------------------------------------ − 0.3V to 30V
<20ns ------------------------------------------------------------------------------------------------------------------------- − 8V to 36V
UGATEx to PHASEx
DC------------------------------------------------------------------------------------------------------------------------------ − 0.3V to 6V
<20ns ------------------------------------------------------------------------------------------------------------------------- − 5V to 7.5V
LGATEx to GND
DC------------------------------------------------------------------------------------------------------------------------------ − 0.3V to 6V
<20ns ------------------------------------------------------------------------------------------------------------------------- − 2.5V to 7.5V
Other Pins-------------------------------------------------------------------------------------------------------------------- − 0.3V to 6V
Power Dissipation, P
WQFN-24L 4x4 ------------------------------------------------------------------------------------------------------------- 3.57W
Package Thermal Resistance (Note 2)
WQFN-24L 4x4, θ JA-------------------------------------------------------------------------------------------------------- 28° C/W
WQFN-24L 4x4, θ JC------------------------------------------------------------------------------------------------------- 7° C/W
Lead Temperature (Soldering, 10 sec.) -------------------------------------------------------------------------------- 260°C
Junction Temperature ------------------------------------------------------------------------------------------------------ 150°C
Storage Temperature Range --------------------------------------------------------------------------------------------- − 65° C to 150°C
ESD Susceptibility (Note 3)
HBM (Human Body Model)----------------------------------------------------------------------------------------------- 2kV
@ T
D
= 25°C
A
Recommended Operating Conditions (Note 4)
Input Voltage, V
Supply Voltage, V
Junction Temperature Range --------------------------------------------------------------------------------------------- − 40° C to 125°C
Ambient Temperature Range --------------------------------------------------------------------------------------------- − 40° C to 85°C
----------------------------------------------------------------------------------------------------------- 7V to 26V
IN
---------------------------------------------------------------------------------------------------- 4.5V to 5.5V
PVCC
Electrical Characteristics
(T
= 25° C unless otherwise specified)
A
Parameter Symbol Test Conditions Min Typ Max Unit
PWM Controller
PVCC Supply Voltage V
PVCC Supply Current I
PVCC Shutdown Current I
PVCC POR Threshold 3.8 4.1 4.4 V
POR Hysteresis -- 0.3 -- V
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4.5 -- 5.5 V
PVCC
SUPPLY
SHDN
EN = 3.3V, Not Switching -- 1.5 2 mA
EN = 0V -- -- 10 A
DS8813A-05 December 2013 www.richtek.com
Parameter Symbol Test Conditions Min Typ Max Unit
Switching Frequ ency fSW R
Minimum On-Time t
Minimum Off-Time t
ON(MIN)
OFF(MI N)
-- 70 -- ns
= 500k (Note 5) 270 300 330 k Hz
TON
-- 300 -- ns
EN Threshold
RT8813A
EN Input Voltage
Logic-High V
Logic-Low V
1.6 -- -- V
ENH
-- -- 0.8 V
ENL
Mode Decision
PSI High Threshold V
PSI In termediate Thr eshold V
PSI Low Threshold V
Logic-High V
VID Input Voltage
Logic-Low V
Enables Two Phases with FCCM 2.4 -- -- V
PSIH
Enables One Phases with FCCM 1.2 -- 1.8 V
PSIM
Enables One Phases with DEM -- -- 0.8 V
PSIL
2 -- -- V
VIDH
-- -- 1 V
VIDL
Protection Function
Zero Current Crossing
Threshold
Current Limit Setting Current I
Current Limit Setting Current
Temperature Coef ficient
8 -- 8 mV
9 10 11 A
OCSET
I
OCSET_TC
-- 6300 -- ppm/C
Current Limit Threshold R
Absolute Over Voltage
Prote ction Threshold
Relative Over Voltage
Prote ction Threshold
V
OVP, Absolute
V
OVP, Relative VRE FIN
V
= 10k -- 60 -- mV
OCSET
1.33V 1.9 2 2.1 V
RE FIN
> 1.33V 145 150 155 %
OV Fault Delay FB forced above OV th resh old -- 5 -- s
Relative Under Voltage
Prote ction Threshold
V
UVP 35 40 45 %
UVP
UV Fault Delay FB forced above UV threshol d -- 3 -- s
Thermal Shutdown Th reshold TSD -- 150 -- C
Minim um TM Threshold V
PGOOD Blanking Time
(Interna l)
(No Shutting Do wn) 0.98 1 1.02 V
TSEN
From EN = high to PGOOD = high
with VSNS withi n regulation poin t
-- 2.5 -- ms
From first UGATE to VSNS
VSNS Soft-Start (Internal)
regulation point, V
RE FIN
= 1V and
-- 0.7 -- ms
VSNS initial = 0 V
Soft-Start Current Source ISS -- 5 -- A
Er ror Amp l if ier
VSNS Error Comparator
Threshold (Valley)
V
= 1V 17.5 12.5 7.5 mV
RE FIN
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7
RT8813A
Parameter Symbol Test Conditions Min Typ Max Unit
Refer ence
Reference Voltage V
Driver On-Resi s tance
VREF
Sourcing Current = 1mA, VID no
Switching
1.98 2 2.02 V
UGATE Driver Source R
UGATE Driver Sink R
LGATE Driver Source R
LGATE Driver Sink R
UGATEsr
UGATEsk
LGATEsr
LGATEsk
BOOT x PHASEx Forced to 5V -- 2 4
BOOT x PHASEx Forced to 5V -- 1 2
LGATEx, High State -- 1.5 3
LGATEx, Low State -- 0.7 1.5
From LGATE Falling to UGATE Rising -- 30 --
Dead-Time
ns
From UGATE Falling to LGATE Rising -- 20 --
Internal Boost Charging
Switch On-Resistance
Note 1. Stresses beyond those listed “ Absolute Maximum Ratings ” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θ
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. Not production tested. Test condition is V
is measured at T
JA
measured at the exposed pad of the package.
R
PVCC to BOOTx, I
BOOT
= 25° C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θ JC is
A
= 8V, V
IN
OUT
= 1V, I
= 10mA -- 40 80
BOOT
= 20A using application circuit.
OUT
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Typical Application Circuit
R
500k
REF1
20k
BOOT
2k
TON
Optional
PGOOD
Enable
R
RGND
PHASE1
PHASE2
PHASE3
1
PSI
VID
RGND
RGND
REF2
0.1µF
C
REFADJ
2.7nF
RGND
2.2µF
C
100k
R
REFADJ
20k
10k
10k
10k
TON
C
REFIN
V
STANDBY
V
PVCC
2.2
V
IN
1µF
R
R
R
STANDBY
5.1k 18k NC
0
NC
RGND
21
PVCC
9
TON
16
PGOOD
4
PSI
5
VID
3
EN
8
VREF
6
REFADJ
7
REFIN
15
VCC/ISEN1
14
TALERT/ISEN2
13
TSEN/ISEN3
BOOT1
RT8813A
UGATE1
PHASE1
LGATE1
BOOT2
UGATE2
PHASE2
LGATE2
GND
25 (Exposed pad)
SS
RGND
VSNS
PWM3
0.1µF
1
0
2
24
23
R
OCSET
10k
12
C
47pF
0.1µF
8
1
0
17
19
2
0
10
11
0
22
V
PVCC
Driver Enable
RT8813A
V
IN
0
330µF
2V x 4
0
470µF/50V x 2
22µF x 15
10 10
V
GND_SNS
V
OUT_SNS
V
IN
0.36µH/1.05m
NC
NC
V
OUT
V
OUT
10µF x 6
0.36µH/1.05m
NC
NC
SS
V
0
IN
0.36µH/1.05m
NC
NC
0.1µF
2.2
BOOT UGATE
RT9610
PWM
PHASE
VCC
EN
LGATE
GND
V
STANDBY
Figure 1. 3 Active Phase Configuration
V
IN
V
IN
0.36µH/1.05m
10µF x 4
0.36µH/1.05m
NC
NC
NC
NC
470µF/50V x 2
330µF
2V x 4
10 10
22µF x 15
V
GND_SNS
V
OUT_SNS
V
OUT
SS
PSI
VID
1
2
24
23
12
1
17
19
2
10
11
4
5
22
8
0
0.1µF
0.1µF
0
0
R
10k
0
OCSET
C
SS
47pF
0
PSI
VID
R
TON
500k
1
V
PVCC
2.2
V
IN
1µF
Optional
PGOOD
Enable
0.1µF
RGND
C
REFADJ
2.7nF
RGND
R
REF2
18k NC
RGND
PVCC
5V
R
OTSET
R
0
NC
STANDBY
5.1k
R
REF1
R
BOOT
RGND
20k
2k
RGND
V
10k
2.2µF
C
100k
R
REFADJ
20k
100k
TON
C
R
10k
REFIN
NTC
21
PVCC
9
TON
16
PGOOD
3
EN
8
VREF
6
REFADJ
7
REFIN
15
VCC/ISEN1
14
TALERT/ISEN2
13
TSEN/ISEN3 VREF
BOOT1
RT8813A
UGATE1
PHASE1
LGATE1
BOOT2
UGATE2
PHASE2
LGATE2
RGND
VSNS
PWM3
GND
25 (Exposed pad)
Figure 2. 2 Active Phase Configuration
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RT8813A
2.2
V
IN
R
STANDBY
5.1k 18k NC
V
STANDBY
0
NC
RGND
V
R
R
PVCC
1µF
REF1
20k
BOOT
R
TON
500k
2k
RGND
1
Optional
Enable
RGND
RGND
R
REF2
V
PVCC
5V
C
R
OTSET
0.1µF
R
REFADJ
2.7nF
RGND
100k
10k
2.2µF
C
TON
100k
REFADJ
20k
C
REFIN
R
10k
21
PVCC
9
TON
16
PGOOD PGOOD
3
EN
8
VREF
6
REFADJ
7
REFIN
15
VCC/ISEN1
14
TALERT/ISEN2
13
TSEN/ISEN3 VREF
NTC
BOOT1
RT8813A
UGATE1
PHASE1
LGATE1
RGND
BOOT2
UGATE2
PHASE2
LGATE2
GND
25 (Exposed pad)
SS
VSNS
PSI
VID
PWM3
1
2
24
23
12
10
11
1
17
19
2
4
5
22
8
0
0.1µF
0
0
R
10k
C
SS
47pF
PSI
VID
OCSET
Floating
V
IN
10µF x 4 470µF/50V x 2
0.36µH/1.05m
NC
330µF
2V x 4
NC
10 10
22µF x 15
V
GND_SNS
V
OUT_SNS
V
OUT
Figure 3. 1 Active Phase Configuration
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Typical Operating Characteristics
RT8813A
(ns)
ON
T
Efficiency (%)
Efficiency vs. Load Current
100%
100
90%
90
80%
80
70%
70
60%
60
50%
50
40%
40
30%
30
20%
20
10%
10
0
0%
0 5 10 15 20 25 30 35 40 45 50 55 60
V
VIN = 19V, V
= 0.9V, 2 Phase Operation
OUT
Load Current (A)
TON vs. Temperature
185.0
182.5
180.0
177.5
175.0
172.5
PVCC
= 5V,
Efficiency vs. Load Current
100%
100
90%
90
80%
80
70%
70
60%
60
50%
50
40%
40
Efficiency (%)
30
30%
20%
20
10
10%
0
0%
0.01 0.1 1 10
= 0.9V, 1 Phase with DEM Operation
V
OUT
Load Current (A)
V
vs. Temperature
2.04
2.03
2.02
2.01
(V)
2.00
REF
V
1.99
REF
VIN = 19V, V
PVCC
= 5V,
170.0
167.5
165.0
VIN = 19V, V
-50 -25 0 25 50 75 100 125
= 5V, No Load
PVCC
Temperature (°C)
Inductor Current vs. Output Current
35
30
25
20
15
10
Inductor Current (A)
5
0
0 1 02 03 04 05 06 0
Phase 1
Phase 2
VIN = 19V, V
Output Current (A)
PVCC
= 5V
1.98
1.97
1.96
EN
(5V/Div)
V
OUT
(1V/Div)
UGATE1
(50V/Div)
UGATE2
(50V/Div)
VIN = 19V, V
-50 -25 0 25 50 75 100 125
= 5V, No Load
PVCC
Temperature (°C)
Power On from EN
VIN = 19V, V
Time (1ms/Div)
PVCC
= 5V, I
OUT
= 50A
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11
RT8813A
EN
(5V/Div)
V
OUT
(1V/Div)
UGATE1
(50V/Div)
UGATE2
(50V/Div)
PVCC
(5V/Div)
Power Off from EN
VIN = 19V, V
Time (1ms/Div)
PVCC
= 5V, I
Power Off from VCC
OUT
= 50A
PVCC
(5V/Div)
V
OUT
(1V/Div)
UGATE1
(50V/Div)
UGATE2
(50V/Div)
DVID
(2V/Div)
Power On from VCC
VIN = 19V, V
Time (1ms/Div)
PVCC
= 5V, I
OUT
Dynamic Output Voltage Control
VIN = 19V, V
PVCC
= 5V
= 50A
V
OUT
(1V/Div)
UGATE1
(50V/Div)
UGATE2
(50V/Div)
DVID
(2V/Div)
V
OUT
(1V/Div)
UGATE1
(50V/Div)
UGATE2
(50V/Div)
VIN = 19V, V
PVCC
= 5V, I
OUT
= 50A
Time (1ms/Div)
Dynamic Output Voltage Control
I
OUT
VIN = 19V, V
= 50A, V
= 1.2V to 0.6V
REFIN
PVCC
= 5V
V
OUT
(1V/Div)
UGATE1
(50V/Div)
UGATE2
(50V/Div)
V
OUT
(100mV/Div)
I
OUT
(50A/Div)
UGATE2
(50V/Div)
UGATE1
(50V/Div)
I
= 50A, V
OUT
= 0.6V to 1.2V
REFIN
Time (50μs/Div)
Load Transient Response
VIN = 19V, V
PVCC
= 5V
Time (50μs/Div)
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Time (20μs/Div)
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12
RT8813A
V
OUT
(100mV/Div)
I
OUT
(50A/Div)
UGATE2
(50V/Div)
UGATE1
(50V/Div)
V
VSNS
(1V/Div)
UGATE1
(20V/Div)
Load Transient Response
VIN = 19V, V
Time (20μs/Div)
PVCC
UVP
= 5V
V
VSNS
(1V/Div)
UGATE1
(20V/Div)
LGATE1
(5V/Div)
I
L1
(20A/Div)
I
L2
(20A/Div)
UGATE1
(50V/Div)
OVP
VIN = 19V, V
Time (100μs/Div)
PVCC
OCP
= 5V, No Load
LGATE1
(5V/Div)
VIN = 19V, V
PVCC
Time (20μs/Div)
= 5V, I
OUT
= 40A
LGATE1
(10V/Div)
VIN = 19V, V
Time (20μs/Div)
PVCC
= 5V
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13
RT8813A
Application Information
The RT8813A is a multi-phase synchronous Buck PWM
controller with integrated drivers which is optimized for
high-performance graphic microprocessor and computer
applications. A COT (Constant-On-Time) PWM controller
and two MOSFET drivers with internal bootstrap diodes
are integrated so that the external circuit can be easily
designed and the number of component is reduced.
The topology solves the poor load transient response timing
problems of fixed-frequency mode PWM and avoids the
problems caused by widely varying switching frequencies
in conventional constant on-time and constant off-time
PWM schemes.
The IC supports dynamic mode transition function with
various operating states, which include multi-phase with
CCM operation and single phase with diode emulation
mode. These different operating states make the system
efficiency as high as possible.
The RT8813A provides a PWM-VID dynamic control
operation in which the feedback voltage is regulated and
tracks external input reference voltage. It also features
complete fault protection functions including over voltage,
under voltage and current limit.
Remote Sense
The RT8813A uses the remote sense path (VSNS and
RGND) to overcome voltage drops in the power lines by
sensing the voltage directly at the end of GPU. Normally,
to protect remote sense path disconnecting, there are
two resistors (R
) connecting between local sense path
Local
and remote sense path. That is, in application with remote
sense, the R
no need of remote sense, the R
is recommended to be 10Ω to 100Ω . If
Local
is recommended to
Local
be 0Ω.
V
BOOT
UGATE
PHASE
LGATE
RGND
VSNS
IN
Local Sense Path
V
OUT
R
+ R
Local
Remote Sense Path
Local
-
GPU
GPU
+
-
Figure 4. Output Voltage Sensing
PWM Operation
The RT8813A integrates a Constant-On-Time (COT) PWM
controller, and the controller provides the PWM signal
which relies on the output ripple voltage comparing with
internal reference voltage as shown in Figure 5. Referring
to the function block diagram of TON Genx, the
synchronous UGATE driver is turned on at the beginning
of each cycle. After the internal one-shot timer expires,
the UGATE driver will be turned off. The pulse width of
this one-shot is determined by the converter's input
voltage and the output voltage to keep the frequency fairly
constant over the input voltage and output voltage range.
Another one-shot sets a minimum off-time.
V
OUT
V
PEAK
V
OUT
V
VALLEY
V
REF
0
t
ON
t
Figure 5. Constant On-Time PWM Control
On-Time Control
The on-time one-shot comparator has two inputs. One
input monitors the output voltage, while the other input
samples the input voltage and converts it to a current.
This input voltage proportional current is used to charge
an internal on-time capacitor. The on-time is the time
required for the voltage on this capacitor to charge from
zero volts to V
, thereby making the on-time of the high
OUT
side switch directly proportional to output voltage and
inversely proportional to input voltage. The implementation
results in a nearly constant switching frequency without
the need for a clock generator.
2 V 3.2p
T = R
ON TON
OUT
V0 . 5
IN
And then the switching frequency FS is :
F= V V T
SO U T I NO N
R
TON
value of R
/
is a resistor connected from the VIN to TON pin. The
can be selected according to Figure 6.
TON
The recommend operation frequency range is 150kHz to
600kHz.
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RT8813A
800
700
600
500
400
Frequency (kHz) 1
300
200
150 250 350 450 550 650 750
R
(k )
Ω
TON
Figure 6. Frequency vs. R
TON
Active Phase Circuit setting : Before POR
The RT8813A can operate in 3/2/1 phase. When PVCC is
higher than POR threshold and EN is higher than logic-
high level, the RT8813A will detect the VCC/ISEN1 pin to
determine how many phases should be active. For three
phases operation, the VCC/ISEN1 pin is connected to
PHASE1, the TALERT/ISEN2 pin is connected to
PHASE2, the TSNS/ISEN3 pin is connected to PHASE3,
and external MOSEFT driver's PWM pin is connected to
PWM3. For two phases operation, the VCC/ISEN1 pin is
connected to PVCC, the TALERT/ISEN2 pin is connected
to TALERT signal, the TSNS/ISEN3 pin is connected to
TSNS signal, and the PWM3 pin is connected to GND.
For one phase operation, the VCC/ISEN1 pin is connected
to PVCC, TALERT/ISEN2 pin is connected to TALERT
signal, the TSNS/ISEN3 pin is connected to TSNS signal,
the PWM3 pin is connected to GND, and UGATE2,
BOOT2, PHASE2, and LGATE 2 pins are floating. The
voltage setting at PSI pin can't higher than 1.8V.
1.2V to 1.8V, the controller will switch operation into 1
phase with force CCM. If PSI voltage is pulled between
2.4V to 5.5V, the controller will switch operation into active
phase (only for 2 or 3 phase). The operation mode is
summarized in Table 1. Moreover, the PSI pin is valid after
POR of VR.
Table 1
Operation Phase Number PSI Voltage Setting
1 phase with DEM 0V to 0.8V
1 phase with CCM 1.2V to 1.8V
Active phase with CCM 2.4V to 5.5V
Diode-Emulation Mode
In diode-emulation mode, the RT8813A automatically
reduces switching frequency at light-load conditions to
maintain high efficiency. As the output current decreases
from heavy-load condition, the inductor current is also
reduced, and eventually comes to the point that its valley
touches zero current, which is the boundary between
continuous conduction and discontinuous conduction
modes. By emulating the behavior of diodes, the low side
MOSFET allows only partial of negative current when the
inductor freewheeling current reaches negative value. As
the load current is further decreased, it takes a longer
time to discharge the output capacitor to the level that
requires the next “ON” cycle. In reverse, when the output
current increases from light load to heavy load, the
switching frequency increases to the preset value as the
inductor current reaches the continuous conduction
condition. The transition load point to the light load
operation is shown in Figure 7 and can be calculated as
follows :
(V V )
It
LOAD(SKIP) ON
where tON is on-time.
IN OUT
2L
Mode Selection
The RT8813A can operate in 3 phases or 2 phases with
I
L
Slope = (V
IN
- V
OUT
) / L
I
PEAK
force CCM, 1 phase with force CCM, and 1 phase with
DEM according to PSI voltage setting. If PSI voltage is
pulled below 0.8V, the controller will operate into 1 phase
I
LOAD
= I
PEAK/2
with DEM. In DEM operation, the RT8813A automatically
reduces the operation frequency at light load conditions
for saving power loss. If PSI voltage is pulled between
0
t
ON
t
Figure 7. Boundary condition of CCM/DEM
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15
RT8813A
The switching waveforms may be noisy and asynchronous
in light loading diode-emulation operation condition, but
this is a normal operating condition that results in high
light-load efficiency. Trade-off in DEM noise vs. light-load
efficiency is made by varying the inductor value. Generally,
low inductor values produce a broad high efficiency range
vs. load curve, while higher values result in higher full-
load efficiency (assuming that the coil resistance remains
fixed) and less output voltage ripple. The disadvantages
for using higher inductor values include larger physical
size and degraded load-transient response (especially at
low input voltage levels).
Forced-CCM Mode
The low noise, forced-CCM mode disables the zero-
crossing comparator, which controls the low side switch
on-time. This causes the low side gate drive waveform to
be the complement of the high side gate drive waveform.
This in turn causes the inductor current to reverse at light
loads as the PWM loop to maintain a duty ratio V
OUT/VIN
The benefit of forced-CCM mode is to keep the switching
frequency fairly constant.
Soft-Start
The RT8813A provides both internal soft-start function and
external soft-start function. The soft-start function is used
to prevent large inrush current and output voltage overshoot
while the converter is being powered-up. The soft-start
function automatically begins once the chip is enabled.
There is a delay time around 1.1ms from EN goes high to
V
begins to ramp-up.
OUT
If the external capacitor between the SS pin and ground is
removed, the internal soft-start function will be chosen.
An internal current source charges the internal soft-start
capacitor so that the internal soft-start voltage ramps up
linearly. The output voltage will track the internal soft-start
voltage during the soft-start interval. After the internal soft-
start voltage exceeds the REFIN voltage, the output voltage
no longer tracks the internal soft-start voltage but follows
the REFIN voltage. Therefore, the duty cycle of the UGATE
signal as well as the input current at power up are limited.
The soft-start process is finished until both the single
.
internal SSOK and external SSOK go high and protection
is not triggered. Figure 8 shows the internal soft-start
sequence.
Enable and Disable
The EN pin is a high impedance input that allows power
sequencing between the controller bias voltage and another
voltage rail. The RT8813A remains in shutdown if the EN
pin is lower than 800mV. When the EN voltage rises above
the 1.6V high level threshold, the RT8813A will begin a
new initialization and soft-start cycle.
Power On Reset (POR), UVLO
Power On Reset (POR) occurs when V
rises above
PVCC
to approximately 4.1V (typical), the RT8813A will reset
the fault latch circuit and prepare for PWM operation. When
the V
is lower than 3.8V (typical), the Under Voltage
PVCC
Lockout (UVLO) circuitry inhibits switching by keeping
UGATE and LGATE low.
EN
PVCC
V
OUT
Internal SS
External SS
Internal SSOK
External SSOK
LGATE
UGATE
PGOOD
4V
2V
Current Limit
Programming
Soft-Start
Normal
Discharged
Figure 8. Internal Soft-Start Sequence
Soft
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RT8813A
The RT8813A also provides an external soft-start function,
and the external soft-start sequence is shown in Figure
9. The external capacitor connected from SS pin to GND
is charged by a 5μ A current source to build a soft-start
voltage ramp. If the external soft-start function is chosen,
the external soft-start time should be set longer than
internal soft-start time to avoid output voltage tracking the
internal soft-start ramp. The recommended external soft-
start slew rate is from 0.1V/ms to 0.4V/ms.
EN
PVCC
V
OUT
Internal SS
External SS
Internal SSOK
External SSOK
LGATE
UGATE
PGOOD
Current Limit
Programming
4V
Soft-Start
2V
Normal
Soft
Discharged
Figure 9. External Soft-Start Sequence
Power Good Output (PGOOD)
The PGOOD pin is an open drain output, and it requires a
pull-up resistor. During soft-start, the PGOOD is held low
and is allowed to be pulled high after V
achieved over
OUT
UVP threshold and under OVP threshold. In additional, if
any protection is triggered during operation, the PGOOD
will be pulled low immediately.
PWM VID and Dynamic Output Voltage Control
The RT8813A features a PWM VID input for dynamic output
voltage control as shown in Figure 11, which reduces the
number of device pin and enables a wide dynamic voltage
range. The output voltage is determined by the applied
voltage on the REFIN pin. The PWM duty cycle determines
the variable output voltage at REFIN.
VID
VREF
REFADJ
Buffer
RGND
REFIN
REFIN
R
STANDBY
Standby
Mode Control
Q1
RGND
R
R
RGND
R
BOOT
REF2
PWM IN
REF1
RGND
RGND
R
REFADJ
C
REFADJ
C
Figure 11. PWM VID Analog Circuit Diagram
VCC
I
SS
SS
SS
C
SS
V
OUT
Figure 10. External Soft-Start Time Setting
The soft-start time can be calculated as :
(C V )
t =
SS
Where ISS = 5μ A (typ.), V
SS REFIN
I
SS
is the voltage of REFIN
REFIN
V
REFIN
t
SS
With the external circuit and VID control signal, the
controller provides three operation modes shown as Figure
12.
VREF
REFIN
PWM VID
STANDBY
CONTROL
BOOT
MODE
NORMAL
MODE
BOOT
MODE
STANDBY
MODE
Figure 12. PWM VID Time Diagram
pin, and CSS is the external capacitor placed from SS to
GND.
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RT8813A
Boot Mode
VID is not driven, and the buffer output is tri-state. At this
time, turn off the switch Q1 and connect a resistor divider
as shown in Figure 11 that can set the REFIN voltage to
be V
V = V
BOOT VREF
Where V
Choose R
and R
RR
REF1 BOOT
RR
REF1 BOOT
RR
BOOT REF1
as the following equation :
BOOT
RRR
REF1 REF2 BOOT
= 2V (typ.)
VREF
to be approximately 10kΩ , and the R
REF2
can be calculated by the following equations :
BOOT
RVV
RVV
REF2 VREF BOOT
RVV
REF2 VREF BOOT
REF2 VREF BOOT
V
BOOT
V
BOOT
R
REF2
REF1
V
BOOT
Normal Mode
If the VID pin is driven by a PWM signal and switch Q1 is
disabled as shown in Figure 11, the V
from V
min
to V
PWM duty cycle and V
percent PWM duty cycle. The V
by the following equations :
V = V
min VREF
V = V
R R // (R R )
REF1 REFADJ BOOT REF2
max VREF
By choosing R
calculated by the following equation :
R
REFADJ
The relationship between VID duty and V
Standby Mode
An external control can provide a very low voltage to meet
V
operating in standby mode. If the VID pin is floating
OUT
and switch Q1 is enabled as shown in Figure 11, the REFIN
pin can be set for standby voltage according to the
calculation below :
V = V
STANDBY VREF
R/ / R
By choosing R
R R (R // R )
REF1 BOOT REF2 STANDBY
, R
REF1
REF2 STANDBY
REF2
, and R
BOOT
, the R
STANDBY
can
be calculated by the following equation :
R
STANDBY
RVV RRR
REF2 REF STANDBY REF1 REF2 BOOT
R
REF1
RRR V
REF2 REF1 BOOT STANDBY
Figure 13, and V
below :
V = V N V
OUT min STEP
where V
V =
where N
STEP
STEP
(V V )
is the number of total available voltage steps
max
and N is the number of step at a specific V
voltage VID period (T
unit pulse width (Tu) and the available step number (N
The recommended Tu is 27ns.
V
REFIN
N = 1
V
min
0
can be adjusted
REFIN
, where V
max
RR
REF2 BOOT
R // (R R )
REFADJ BOOT REF2
(R // R ) R R
REF1 REFADJ BOOT REF2
, R
REF1
RV
REF1 min
VV
max min
can be set according to the calculation
OUT
is the voltage at zero percent
min
is the voltage at one hundred
max
and V
R
min
REF2
max
R
REF2
REF2
, and R
BOOT
, the R
REFIN
REFADJ
can be set
can be
is shown in
is the resolution of each voltage step 1.
max min
N
max
. The dynamic
OUT
N = 2
= Tu x N
vid
0.5
) is determined by the
max
N = N
max
V
max
VID Duty
1
max
).
N = 1
VID Input
T
u
N = 2
VID Input
T
= N
max
x T
u
vid
Figure 13. PWM VID Analog Output
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RT8813A
VID Slew Rate Control
In RT8813A, the V
slew rate is proportional to PWM
REFIN
VID duty, the rising time and falling time is the same
because the voltage of REFIN pin traveling is the same. In
normal mode, the V
by C
When choose C
SR =
R = (R // R ) // (R +R )
SR REF1 REFADJ BOOT REF2
When choose C
SR =
R = R // R R // R
SR REF1 REFADJ BOOT REF2
or C
REFADJ
(V V ) 80%
REFIN_Final REFIN_initial
REFIN
REFADJ
2.2R C
REFIN
(V V ) 80%
REFIN_Final REFIN_initial
2.2R C
The recommend SR is estimated by C
slew rate SR can be estimated
REFIN
as the following equation :
:
SR REFADJ
:
SR REFIN
.
REFADJ
Current limit
The RT8813A provides cycle-by-cycle current limit control
by detecting the PHASE voltage drop across the low side
MOSFET when it is turned on. The current limit circuit
employs a unique “valley” current sensing algorithm as
shown in Figure 14. If the magnitude of the current sense
signal at PHASE is above the current limit threshold, the
PWM is not allowed to initiate a new cycle.
I
L
I
L,PEAK
I
LOAD
I
L,VALLEY
0
t
Figure 14. “Valley” Current Limit
In order to provide both good accuracy and a cost effective
solution, the RT8813A supports temperature compensated
MOSFET R
DS(ON)
sensing.
In an over current condition, the current to the load exceeds
the average output inductor current. Thus, the output
voltage falls and eventually crosses the under voltage
protection threshold, inducing IC shutdown.
Current Limit Setting
Current limit threshold can be set by a resistor (R
OCSET
between LGATE1 and GND. Once PVCC exceeds the
POR threshold and chip is enabled, an internal current
source I
R
OCSET
V
OCSET
flows through R
OCSET
. The voltage across
OCSET
is stored as the current limit protection threshold
. The threshold range of V
is 50mV to 400mV.
OCSET
After that, the current source is switched off.
R
R =
where I
(valley inductor current) and I
can be determined using the following equation :
OCSET
OCSET
IR 4 0 m V
VALLEY LGDS(ON)
represents the desired inductor limit current
VALLEY
I
OCSET
is current limit setting
OCSET
current which has a temperature coefficient to compensate
the temperature dependency of the R
If R
is not present, there is no current path for I
OCSET
DS(ON)
.
OCSET
to build the current limit threshold. In this situation, the
current limit threshold is internally preset to 400mV
(typical).
Negative Current Limit
The RT8813A supports cycle-by-cycle negative current
limiting. The absolute value of negative current limiting
threshold is the same with the positive current limit
threshold. If negative inductor current is rising to trigger
negative current limit, the low side MOSFET will be turned
off and the current will flow to input side through the body
diode of the high side MOSFET. At this time, output voltage
tends to rise because this protection limits current to
discharge the output capacitor. In order to prevent shutdown
because of over voltage protection, the low side MOSFET
is turned on again 400ns after it is turned off. If the device
hits the negative over current threshold again before output
voltage is discharged to the target level, the low side
MOSFET is turned off and process repeats. It ensures
maximum allowable discharge capability when output
voltage continues to rise. On the other hand, if the output
is discharged to the target level before negative current
threshold is reached, the low side MOSFET is turned off,
the high side MOSFET is then turned on, and the device
keeps normal operation.
)
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RT8813A
Current Balance
The RT8813A implements current balance mechanism in
the current loop. The RT8813A senses per phase current
signal and compares it with the average current. If the
sensed current of any particular phase is higher than the
average current, the on-time of this phase will be
decreased.
The current balance accuracy is major related with on-
resistance of low side MOSFET (R
practical application, using lower R
LG,DS(ON)
LG,DS(ON)
). That is, in
will reduce
the current balance accuracy.
Output Over Voltage Protection (OVP)
The output voltage can be continuously monitored for over
voltage protection. If REFIN voltage is lower than 1.33V,
the over voltage threshold follows to absolute over voltage
2V. If REFIN voltage is higher than 1.33V, the over voltage
threshold follows relative over voltage 1.5 x V
REFIN
. When
OVP is triggered, UGATE goes low and LGATE is forced
high. The RT8813A is latched once OVP is triggered and
can only be released by PVCC or EN power on reset. A
5μ s delay is used in OVP detection circuit to prevent false
trigger.
Output Under Voltage Protection (UVP)
The output voltage can be continuously monitored for under
voltage protection. When the output voltage is less than
40% of its set voltage, under voltage protection is triggered
and then all UGATEx and LGATEx gate drivers are forced
low. There is a 3μs delay built in the UVP circuit to prevent
false transitions. During soft-start, the UVP blanking time
is equal to PGOOD blanking time.
Thermal Monitoring and Temperature Reporting
The RT8813A provides thermal monitoring function in 2/1
phase operation via sensing the TSNS pin voltage, and
which can indicate ambient temperature through the voltage
divider R
of V
TSNS
temperature rises, V
OTSET
and R
shown in Figure 15. The voltage
NTC
is typically set to be higher than 1V. When ambient
will fall and the TALERT signal
TSNS
will be pulled to low level if TSNS voltage drops below 1V.
V
TSNS
V
X
R
OTSET
TSNS
R
NTC
Internal OTP
1V
+
CMP
-
V
H
TALERT
Figure 15. External OTP Setting
R
where R
can be determined using the following equation :
OTSET
R = R V 1
OTSET NTC,T C X
NTC,T°C
is the thermistor's resistance at OTP trigger
temperature.
The standard formula for the resistance of the NTC
thermistor as a function of temperature is given by :
11
β
R = Re
where R
NTC,T C 25 C
is the thermistor's nominal resistance at room
25°C
T 273 298
temperature 25°C, β (beta) is the thermistor's material
constant in Kelvins, and T is the thermistor's actual
temperature in Celsius.
MOSFET Gate Driver
The RT8813A integrates high current gate drivers for the
MOSFETs to obtain high efficiency power conversion in
synchronous Buck topology. A dead-time is used to prevent
the crossover conduction for high side and low side
MOSFETs. Because both the two gate signals are off
during the dead-time, the inductor current freewheels
through the body diode of the low side MOSFET. The
freewheeling current and the forward voltage of the body
diode contribute power losses to the converter. The
RT8813A employs adaptive dead-time control scheme to
ensure safe operation without sacrificing efficiency.
Furthermore, elaborate logic circuit is implemented to
prevent cross conduction. For high output current
applications, two power MOSFETs are usually paralleled
to reduce R
. The gate driver needs to provide more
DS(ON)
current to switch on/off these paralleled MOSFETs. Gate
driver with lower source/sink current capability results in
longer rising/falling time in gate signals and higher
switching loss. The RT8813A embeds high current gate
drivers to obtain high efficiency power conversion.
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RT8813A
Inductor Selection
Inductor plays an importance role in step-down converters
because the energy from the input power rail is stored in
it and then released to the load. From the viewpoint of
efficiency, the DC Resistance (DCR) of inductor should
be as small as possible to minimize the copper loss. In
additional, the inductor occupies most of the board space
so the size of it is important. Low profile inductors can
save board space especially when the height is limited.
However, low DCR and low profile inductors are usually
not cost effective.
Additionally, higher inductance results in lower ripple
current, which means the lower power loss. However, the
inductor current rising time increases with inductance value.
This means the transient response will be slower. Therefore,
the inductor design is a trade-off between performance,
size and cost.
In general, inductance is designed to let the ripple current
ranges between 20% to 40% of full load current. The
inductance can be calculated using the following equation :
VV V
L =
min
IN OUT OUT
Fk I V
SW OUT_rated IN
where k is the ratio between inductor ripple current and
rated output current.
Input Capacitor Selection
Voltage rating and current rating are the key parameters
in selecting input capacitor. Generally, input capacitor has
a voltage rating 1.5 times greater than the maximum input
voltage is a conservatively safe design.
The input capacitor is used to supply the input RMS
current, which can be approximately calculated using the
following equation :
I = I 1
RMS OUT
VV
OUT OUT
VV
IN IN
Output Capacitor Selection
The output filter capacitor must have ESR low enough to
meet output ripple and load transient requirement, yet have
high enough ESR to satisfy stability requirements. Also,
the capacitance must be high enough to absorb the inductor
energy going from a full load to no load condition without
tripping the OVP circuit. Organic semiconductor
capacitor(s) or special polymer capacitor(s) are
recommended.
MOSFET Selection
The majority of power loss in the step-down power
conversion is due to the loss in the power MOSFETs. For
low voltage high current applications, the duty cycle of
the high side MOSFET is small. Therefore, the switching
loss of the high side MOSFET is of concern. Power
MOSFETs with lower total gate charge are preferred in
such kind of application.
However, the small duty cycle means the low side MOSFET
is on for most of the switching cycle. Therefore, the
conduction loss tends to dominate the total power loss of
the converter. To improve the overall efficiency, the
MOSFETs with low R
are preferred in the circuit
DS(ON)
design. In some cases, more than one MOSFET are
connected in parallel to further decrease the on-state
resistance. However, this depends on the low side
MOSFET driver capability and the budget.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
The next step is to select proper capacitor for RMS current
rating. Use more than one capacitor with low Equivalent
Series Resistance (ESR) in parallel to form a capacitor
bank is a good design. Besides, placing ceramic capacitor
P
where T
D(MAX)
= (T
J(MAX)
− TA) / θ
J(MAX)
JA
is the maximum junction temperature, TA is
the ambient temperature, and θ
thermal resistance.
is the junction to ambient
JA
close to the drain of the high side MOSFET is helpful in
reducing the input voltage ripple at heavy load.
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21
RT8813A
For recommended operating condition specifications, the
maximum junction temperature is 125° C. The junction to
ambient thermal resistance, θ JA, is layout dependent. For
WQFN-24L 4x4 package, the thermal resistance, θ JA, is
28° C/W on a standard JEDEC 51-7 four-layer thermal test
board. The maximum power dissipation at TA = 25° C can
be calculated by the following formula :
P
= (125°C − 25° C) / (28° C/W) = 3.57W for
D(MAX)
WQFN-24L 4x4 package
The maximum power dissipation depends on the operating
ambient temperature for fixed T
and thermal
J(MAX)
resistance, θ JA. The derating curve in Figure 16 allows
the designer to see the effect of rising ambient temperature
on the maximum power dissipation.
4.0
3.5
3.0
2.5
2.0
1.5
Four-Layer PCB
Layout Considerations
Layout is very important in high frequency switching
converter design. If designed improperly, the PCB could
radiate excessive noise and contribute to the converter
instability. Following layout guidelines must be considered
before starting a layout for RT8813A.
Place the RC filter as close as possible to the PVCC
pin.
Keep current limit setting network as close as possible
to the IC. Routing of the network should avoid coupling
to high voltage switching node.
Connections from the drivers to the respective gate of
the high side or the low side MOSFET should be as
short as possible to reduce stray inductance.
All sensitive analog traces and components such as
VSNS, RGND, EN, PSI, VID, PGOOD, VREF, TON
VREFADJ, VREFIN and TSNS should be placed away
from high voltage switching nodes such as PHASE,
LGATE, UGATE, or BOOT nodes to avoid coupling. Use
internal layer(s) as ground plane(s) and shield the
feedback trace from power traces and components.
1.0
0.5
Maximum Power Dissipation (W) 1
0.0
0 25 50 75 100 125
Ambient Temperature (°C)
Figure 16. Derating Curve of Maximum Power
Dissipation
Power sections should connect directly to ground
plane(s) using multiple vias as required for current
handling (including the chip power ground connections).
Power components should be placed to minimize loops
and reduce losses.
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DS8813A-05 December 2013 www.richtek.com
Outline Dimension
RT8813A
D
E
A
A3
A1
D2
SEE DETAIL A
L
1
E2
1
2
b e
DETAIL A
Pin #1 ID and Tie Bar Mark Options
Note : The configuration of the Pin #1 identifier is optional,
1
2
but must be located within the zone indicated.
Dimensions In Millimeters Dimensions In Inches
Symbol
Min Max Min Max
A 0.700 0.800 0.028 0.031
A1 0.000 0.050 0.000 0.002
A3 0.175 0.250 0.007 0.010
b 0.180 0.300 0.007 0.012
D 3.950 4.050 0.156 0.159
Option 1 2.400 2.500 0.094 0.098
D2
Option 2 2.650 2.750 0.104 0.108
E 3.950 4.050 0.156 0.159
Option 1 2.400 2.500 0.094 0.098
E2
Option 2 2.650 2.750 0.104 0.108
e 0.500 0.020
L 0.350 0.450 0.014 0.018
Richtek Technology Corporation
14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
W-Type 24L QFN 4x4 Package
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
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