Richtek RT8465ZS Schematic [ru]

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RT8465

Constant Voltage High Power Factor PWM Controller for MR16 Application

General Description

The RT8465 is a constant output voltage, active high power

factor, PWM Boost driver controller. It can be used as the

first Boost stage followed by a constant current Buck

converter with input from AC/electronic transformer in

MR16/AR111 application. To achieve high power factor,

the AC input voltage from AC/electronic transformer is

sensed via the SIN pin. An internal power factor correction

circuit follows the sensed sine waveform and modulates

the external MOSFET duty cycle-by-cycle to achieve

constant output voltage.

The output voltage is adjustable via an output resistive

divider. By operating at 220kHz, the filter component size

can be small to fit in tight MR16 space. To drive industrial

grade MOSFET switches, the RT8465 gate driver can

deliver up to 0.8A output current with 9V gate output voltage.

Features

z Wide Input Voltage Range : 8V to 32V

z High Power Factor Correction with Simple System

Circuits

z Adjustable Consta nt Output Voltage

z Built-in High Power Factor Correction Circuit

z T ypical 250

z Low Quiescent Current : 0.1

z SOP-8 Package

z RoHS Compliant and Halogen Free

μμ

μA Start-Up Supply Current

μμ

Applications

z MR16, AR111 Lamps

z PFC Controller

Boost Driver

μμ

μA

μμ

Simplified Application Circuit

AC IN

+ ~

VCC

SIN

VCOMP

RT8465

GNDSENSE

GATE

FBICOMP

DS8465-01 March 2013 www.richtek.com

RT8465

Ordering Information

Pin Configurations

RT8465

Package Type S : SOP-8

Lead Plating System Z : ECO (Ecological Element with Halogen Free and Pb free)

Note :

Richtek products are :

` RoHS compliant and compatible with the current require-

ments of IPC/JEDEC J-STD-020.

` Suitable for use in SnPb or Pb-free soldering processes.

Marking Information

RT8465 ZSYMDNN

Functional Pin Description

Pin No. Pin Name Pin Function

1 GND Ground.

2 GATE Gate Driver for External MOSFET Switc h.

3 VCC Power Supply. For good bypass, place a ceramic capacitor near the VCC pin.

Inductor Current Sense Input. The inductor current is sensed by a resistor between

4 SENSE

5 FB

6 ICOMP

7 SIN

GND and SENSE pins. The sense pin signal is used as the saw tooth signal to the PWM comparator. The comparator output will modulate the GATE turn-on duty to achieve the output voltage regulation.

Output Voltage Sense Input. The Output voltage is sensed through an external resistive divider. The sensed voltage (which is tied to amplifier negative input) is compared to an internal reference threshold at 1.2V (which is tied to amplifier positive input).

Output of the Multiplier. To achieve high power factor, the voltage loop amplifier output signal is modulated with the sensed input voltage through the SIN pin by an internal multiplier. A compensation network between ICOMP and GND is needed.

Input Power Voltage Sensing for PFC Function. An external resistor for input voltage sensing is connected to the power input.

(TOP VIEW)

GND

GATE

VCC

SENSE

SOP-8

RT8465ZS : Product Number

YMDNN : Date Code

VCOMP

SIN

ICOMP

8 VCOMP

Output of the Internal Voltage Loop GM Amplifier. A compensation network between VCOMP and GND is needed.

DS8465-01 March 2013www.richtek.com

Function Block Diagram

RT8465

VCC

35V

GND

ICOMP

VCOMP

1.2V

10V/8V

OVP

Operation

The RT8465 is a floating-GND Boost PWM current mode

controller with an integrated low side floating gate driver.

The start up voltage of RT8465 is around 10V. Once VCC

is above 10V, the RT8465 will maintain operation until

VCC drops below 8V.

The RT8465's main control loop consists of a 220kHz

fixed frequency oscillator, an internal 1.2V feedback (FB)

voltage sense threshold, and the PFC control circuit with

a PWM comparator. In normal operation, the GATE turns

high when the gate driver is set by the oscillator (OSC).

When the feedback (FB) voltage is below the reference

Chip

Enable

OSC

PWM

Control

Circuit

PFC

Control

Circuit

S Q

200k

GATE

SENSE

SIN

1.2V threshold, the VCOMP pin voltage will go high. The

ICOMP signal is the result of VCOMP signal multiplied

with SIN signal. Higher ICOMP voltage means longer GATE

turn-on period. The GATE does not always turn off in each

cycle. The GATE will be turned on again by OSC for the

next switching cycle.

The RT8465 provides several protections, including input

voltage Under Voltage Lockout (UVLO), Over Current

Protection (OCP) and VCC Over Voltage Protection (OVP).

Additionally, to ensure the system reliability, the RT8465

is built with internal thermal protection function.

DS8465-01 March 2013 www.richtek.com

RT8465

Absolute Maximum Ratings (Note 1)

z VCC, SIN to GND ---------------------------------------------------------------------------------------------------------- −0.3V to 40V

z GATE to GND (Note 6) ------------------------------------------------------------------------------------------------- −0.3V to 16V

z VCOMP, ICMOP to GND ------------------------------------------------------------------------------------------------ −0.3V to 4V

z FB to GND ------------------------------------------------------------------------------------------------------------------ −0.3V to 2V

z SENSE to GND ------------------------------------------------------------------------------------------------------------ −1V to 0.3V

z Power Dissipation, P

SOP-8 ------------------------------------------------------------------------------------------------------------------------ 0.53W

z Package Thermal Resistance (Note 2)

SOP-8, θJA------------------------------------------------------------------------------------------------------------------ 188°C/W

z Junction Temperature ----------------------------------------------------------------------------------------------------- 150°C

z Lead Temperature (Soldering, 10 sec.)------------------------------------------------------------------------------- 260°C

z Storage Temperature Range -------------------------------------------------------------------------------------------- −65°C to 150°C

z ESD Susceptibility (Note 3)

HBM (Human Body Model)---------------------------------------------------------------------------------------------- 2kV

MM (Machine Model) ----------------------------------------------------------------------------------------------------- 200V

@ T

= 25°C

Recommended Operating Conditions

z Supply Input Voltage, VCC ---------------------------------------------------------------------------------------------- 8V to 32V

z Junction Temperature Range -------------------------------------------------------------------------------------------- −40°C to 125°C

z Ambient Temperature Range -------------------------------------------------------------------------------------------- −40°C to 85°C

(Note 4)

Electrical Characteristics

(VCC = 24VDC, C

Input Start-Up Voltage VST -- 10 11 V

Under Voltage Lockout Threshold V

Under Voltage Lockout Threshold Hysteresis

Input Supply Current ICC After Start-Up, VCC = 24V -- 2 5 mA

Input Quiescent Current IQC Before Start-Up, VCC = 7V -- 0.1 -- μA

Oscillator

Switching Frequency fSW V

Maximum Duty in Transient Operation

Maximum Duty in Steady State Oper ation

LOAD

= 1nF, R

= 2.2Ω in series, TA = 25°C, unless otherwise specified)

LOAD

Parameter Symbol Test Conditions Min Typ Max Unit

7 8 -- V

UVLO

ΔV

-- 2 -- V

UVLO

= 14V 190 220 250 kHz

SIN

MAX(TR)

MAX

VC = 3V -- -- 100 %

-- 97 -- %

Blanking Time t

200 -- -- ns

BLANK

Minimum Turn-Off Time (Note 5) -- 650 -- ns

Current Sense Amplifier

Current Sense Voltage V

Sense Input Current I

SENSE

= 1V, SIN = 15V -- −100 -- mV

COMP

Sense = 100mV (Note 5) -- 10 -- μA

DS8465-01 March 2013www.richtek.com

Parameter Symbol Test Conditions Min Typ Max Unit

Gate Driver Output

RT8465

GATE Pin Maximum Voltage V

High V

GATE Voltage

Low V

No Load at GATE Pin -- 9.5 16 V

GATE

= −20mA -- 9.1 --

GATE

GATE_H

GATE_L

= −100μA -- 9.4 --

GATE

= 20mA -- 0.75 --

GATE

= 100μA -- 0.5 --

GATE

GATE Drive Rise and Fall Time 1nF Load at GATE -- 70 100 ns

GATE Drive Source and Sink Peak Current

1nF Load at GATE (Note 4) -- 0.5 0.8 A

Multiplier

= 14V 50 60 70

SIN Pin Input Current

ICOMP Threshold for PWM Switch Off

VC Output Current I

ICOMP

VCOMP

-- 1.2 -- V

0.5V ≤ VC ≤ 2.4V (Note 5) -- 16 -- μA

SIN

= 28V 80 100 120

SIN

μA

Feedback Voltage VFB 1.1 1.2 1.3 V

Feedback Input Current IFB V

= 1.2V (Note 5) -- 1 -- μA

OVP and Soft-Start

Over Voltage Protection V

VCC Pin 32 35 38 V

OVP

Thermal Protection

Thermal Shutdown Temperature

-- 150 -- °C

SIN Pin Input Resistance -- 200 -- kΩ

Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are

stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in

the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may

affect device reliability.

Note 2. θ Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. Guaranteed by design; not subject to production test. Note 6. The GATE voltage is internally clamped and varies with operating conditions.

is measured at T

= 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7.

DS8465-01 March 2013 www.richtek.com

RT8465

Typical Application Circuit

Electronic

transformer

12V AC input

+ ~

CC converters : RT8450/RT8471/RT8463

CC drivers : RT8482/RT8458D

VCC

SIN

VCOMP

RT8465

GNDSENSE

GATE

FBICOMP

Load : Const Current

/Const Voltage

GND

DS8465-01 March 2013www.richtek.com

)

Typical Operating Characteristics

)

RT8465

VCC Supply Current vs. Input Voltage

2.0

1.9

1.8

1.7

1.6

Supply Current (mA

1.5

1.4 8 1318232833

Input Voltage (V)

VCC_OVP vs. Temperature

(V)

OVP

VCC Supply Current vs . Te m pe rature

2.5

2.0

1.5

1.0

Supply Current (mA

0.5

0.0

-50 -25 0 25 50 75 100 125

Temperature (°C)

UVLO vs. Temperature

UVLO-H

UVLO (V)

= 24V

-50-25 0 25 50 75100125

Temperature (°C)

FB Voltage vs. Temperature

1.3

1.2

FB Voltage (V)

1.2

1.1

-50-25 0 25 50 75100125

Temperature (°C)

= 24V

-50-25 0 25 50 75100125

UVLO-L

Temperature (°C)

GATE Voltage High vs. Temperature

GATE Voltage (V)

-50 -25 0 25 50 75 100 125

= −100μA

GATE

= −20mA

GATE

Temperature (°C)

= 24V

DS8465-01 March 2013 www.richtek.com

RT8465

)

GATE Voltage Low vs. Temperature

1.0

0.8

0.6

0.4

GATE Voltage (V)

0.2

0.0

-50 -25 0 25 50 75 100 125

GATE

= 100μA

= 20mA

Temperature (°C)

Minimum On-Time vs. Temperature

350

330

310

290

270

Minimum On-Time (ns

250

-50-25 0 25 50 75100125

Temperature (°C)

= 24V

Threshold (mV)

SENSE

Switching Frequency v s . Input Voltage

230

= 2V

220

210

200

190

Switching Frequency (kHz) 1

180

81318232833

SIN Voltage vs. V

700

600

500

400

300

200

100

0 5 10 15 20 25 30

COMP

SIN

= 14V

SIN

Input Voltage (V)

SENSE

= 2.5V

= 2.2V

= 1.9V

= 1.6V

= 1.3V

= 1V

= 0.7V

SIN Voltage (V)

Threshold

= 24V

SIN Input Current vs . Input Voltage

SIN Current (μA)

8 1318232833

= 14V

SIN

= 2V

SIN

Input Voltage (V)

0.10

0.05

0.00

-0.05

Threshold (V)

-0.10

SENSE

-0.15

-0.20

-50-25 0 25 50 75100125

Threshold vs. Temperature

SENSE

= 5V

SIN

= 20V

SIN

Temperature (°C)

= 10V

SIN

= 24V, V

COMP

= 3V

DS8465-01 March 2013www.richtek.com

Application Information

)

RT8465

The RT8465 provides active power factor correction for

power systems with fewer external components.

The RT8465 can operate in both Continuous Conduction

Mode (CCM) and Discontinuous Conduction Mode (DCM)

by fixed frequency PWM control. The fixed switching

frequency is internally set at 220kHz.

The IC operates with a dual control topology; the inner

current loop and the outer voltage loop. The inner current

loop of the IC controls the sinusoidal profile for the average

input current. It uses the dependency of the PWM duty

cycle on the line input voltage to determine the

corresponding input current. This means the average input

current follows the input voltage as long as the device

operates in CCM. Under light load condition, depending

on the choke inductance, the system may enter DCM. In

DCM, the average current waveform will be distorted but

the resultant harmonics are still low enough to meet the

standard of IEC61000-3-2.

The RT8465 employs average current control to achieve a

better input current waveform.

where V

is the reference for the current sense, k is

ICOMP

the multiplier gain, VCOMP is the error amplifier output

voltage and V

is the sinusoidal reference voltage on pin

SIN

Sinusoidal Reference

+ ~

SENSE

ICOMP

SIN

SENSE

220kHz

Modulator

Multiplier

GATE

R Q

PWM

VCOMP

OUT

Voltage

Error Amplifier

IN, AVG

OUT

REF

In Figure 1, the inductor current is sensed and filtered by

a current error amplifier of which output drives a PWM

modulator. In this way, the inner current loop tends to

minimize the error between the average input current I

and its reference. The converter works in CCM, so the

same considerations done with regard to the peak current

control can be applied.

Multiplier

The multiplier has two inputs. The SIN pin is the divided

sinusoidal voltage which makes the current sense

comparator threshold voltage vary from zero to peak value.

The other input is the output of error amplifier at VCOMP

pin. In this way, the input average current wave will be

sinusoidal as well as reflects the load status. In order to

achieve high power factor and good THD achieved, the

multiplier transfer character is designed to be linear over

a wide dynamic range, namely, 1V to 20V for SIN and

0.8V to 1.2V for FB. The relationship between the

multiplier output and inputs is described as the below

equation :

V = kV 0.7V

ICOMP COMP SIN

×−×

(

Figure 1. Functional Block with PFC CCM Control

Pulse Width Modulator

The IC employs an average current control scheme in CCM

to achieve the power factor correction. If the voltage loop

is working and output voltage is kept constant, the duty

cycle, D

D =

OFF

From the above equation, D

, for a CCM PFC system is given as

OFF

OUT

is proportional to VIN. The

OFF

objective of the current loop is to regulate the average

inductor current such that it is proportional to the duty

cycle, D

, and the input voltage, VIN. Figure 2 shows

OFF

the waveform for the control scheme.

DS8465-01 March 2013 www.richtek.com

RT8465

Ramp Profile

GATE

Drive

IN, AVG

Figure 2. Average Current Controls in CCM

The PWM is performed by the intersection of a ramp signal

with the current error amplifier output. The PWM cycle

starts with the GATE turn on for a minimum duration about

300ns typical. In case of the inductor current reaches the

peak current limitation, the GATE will be turned off

immediately when V

SENSE

is triggered.

Error Amplifier

The outer voltage loop of the cascaded control scheme

regulates the PFC output bus voltage V

. The internal

OUT

reference on the non-inverting input of the error amplifier

is 1.2V. The error amplifier's inverting feedback FB is

connected to an external resistor divider which senses

the output voltage.

Current Sense/Current Sense Comparator

The PFC switch's turn-on current is sensed through an

external resistor in series with the switch. When the

sensed voltage exceeds the threshold voltage (the

multiplier output), the current sense comparator will

become low and the external MOSFET will be turned off.

This ensures a cycle-by-cycle current mode control

operation. The maximum current sense reference is 1.8V.

The max value usually occurs in start-up process or

abnormal conditions such as short load.

Under Voltage Lockout (UVLO)

The RT8465 internal UVLO block monitors the VCC power

supply with 2V hysteresis. The hysteresis behavior

guarantees a one-short startup resistor and hold-up

capacitor. The IC will then be consuming typically 150μA

when start-up and the power dissipation on resistor would

be less than 0.1W. After start-up, the operating current is

typically 1.5mA to get a better efficiency.

Over Voltage Protection (OVP)

Whenever V

exceeds the rated value by 5%, the over

OUT

voltage protection is activated. This is implemented by

sensing the voltage at FB pin with respect to a reference

voltage of 1.2V. This results in a lower input power to

reduce the output voltage V

OUT

The output of the error amplifier is one of the two inputs of

the multiplier. A compensation loop is connected outside

10V

between the error amplifier output at the VCOMP pin, and

ground of the GND pin. Normally, the compensation loop

bandwidth is very low to realize high power factor for PFC

converter. The compensation is also responsible for the

soft start function which controls an increasing AC input

IC's

State

OFF

Start UpNormal

Operation

Open Loop/

Standby

Normal

Operation

current during start-up.

Figure 4. State of Power VCC Operation

⎛⎞ ⎜⎟

R2 + R3

⎝⎠

VCOMP

OUT

1.2V

Figure 3. Voltage Loop Amplifier

DS8465-01 March 2013www.richtek.com

OFF

RT8465

Thermal Considerations

For continuous operation, do not exceed absolute

maximum junction temperature. The maximum power

dissipation depends on the thermal resistance of the IC

package, PCB layout, rate of surrounding airflow, and

difference between junction and ambient temperature. The

maximum power dissipation can be calculated by the

following formula :

where T

the ambient temperature, and θ

D(MAX)

= (T

J(MAX)

− TA) / θ

J(MAX)

is the maximum junction temperature, TA is

is the junction to ambient

thermal resistance.

For recommended operating condition specifications, the

maximum junction temperature is 125°C The junction to

ambient thermal resistance, θJA, is layout dependent. For

SOP-8 package, the thermal resistance, θJA, is 188°C/W

on a standard JEDEC 51-7 four-layer thermal test board.

The maximum power dissipation at TA = 25°C can be

calculated by the following formula :

0.6

Four-Layer PCB

0.5

0.4

0.3

0.2

0.1

Maximum Power Dissipation (W) 1

0.0 0 25 50 75 100 125

Ambient Temperature (°C)

Figure 5. Derating Curve of Maximum Power Dissipation

= (125°C − 25°C) / (188°C/W) = 0.53W for

D(MAX)

SOP-8 package

The maximum power dissipation depends on the operating

ambient temperature for fixed T

and thermal

J(MAX)

resistance, θJA. The derating curve in Figure 5 allows the

designer to see the effect of rising ambient temperature

on the maximum power dissipation.

PGND

SIN

PGND

GATE

GND

GATE

VCC

SENSE

OUT

GND

OUT

VCOMP

SIN

ICOMP

Figure 6. PCB Layout Guide

DS8465-01 March 2013 www.richtek.com

RT8465

Outline Dimension

Dimensions In Millimeters Dimensio ns In Inches

Symbol

Min Max Min Max

A 4.801 5.004 0.189 0.197

B 3.810 3.988 0.150 0.157

C 1.346 1.753 0.053 0.069

D 0.330 0.508 0.013 0.020

F 1.194 1.346 0.047 0.053

H 0.170 0.254 0.007 0.010

I 0.050 0.254 0.002 0.010

J 5.791 6.200 0.228 0.244

M 0.400 1.270 0.016 0.050

Richtek Technology Corporation

5F, No. 20, Taiyuen Street, Chupei City

Hsinchu, Taiwan, R.O.C.

Tel: (8863)5526789

8-Lead SOP Plastic Package

Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should

obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot

assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be

accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third

parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.

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Richtek RT8465ZS Schematic [ru]

Specifications and Main Features

Frequently Asked Questions

User Manual