NEC Electronics Inc UPA572T Datasheet
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DATA SHEET
MOS FIELD EFFECT TRANSISTOR
μPA572T
N-CHANNEL MOS FET (5-PIN 2 CIRCUITS)
FOR SWITCHING
The μPA572T is a super-mini-mold device provided with two MOS FET circuits. It achieves high-density mounting and saves mounting costs.
FEATURES
•Two source common MOS FET circuits in package the same size as SC-70
•Directly driven by 3 V power supply
•Automatic mounting supported
PACKAGE |
DIMENSIONS |
(in millimeters) |
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0.2 –0+0.1 |
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0.15 |
–0.05+0.1 |
±0.12.1 |
±0.11.25 |
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0 to 0.1 |
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0.65 |
0.65 |
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0.7 |
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0.9 |
±0.1 |
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1.3 |
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2.0 ±0.2 |
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EQUIVALENT CIRCUIT
5 |
4 |
1 |
2 |
3 |
PIN CONNECTION
1.Gate 1 (G1)
2.Source (common)
3.Gate 2 (G2)
4.Drain 2 (D2)
5.Drain 1 (D1) Marking: DB
ABSOLUTE MAXIMUM RATINGS (TA = 25 ˚C)
PARAMETER |
SYMBOL |
TEST CONDITIONS |
RATINGS |
UNIT |
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Drain to Source Voltage |
VDSS |
VGS = 0 |
30 |
V |
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Gate to Source Voltage |
VGSS |
VDS = 0 |
±7 |
V |
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Drain Current (DC) |
ID(DC) |
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±100 |
mA |
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Drain Current (pulse) |
ID(pulse) |
PW ≤ 10 ms, Duty Cycle ≤ 50 % |
±200 |
mA |
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Total Power Dissipation |
PT |
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200 (Total) |
mW |
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Channel Temperature |
Tch |
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150 |
˚C |
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Operating Temperature |
Topt |
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–55 to +80 |
˚C |
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Storage Temperature |
Tstg |
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–55 to +150 |
˚C |
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Document No. G11244EJ1V0DS00 (1st edition) |
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Date Published June 1996 P |
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Printed in Japan |
© |
1996 |
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μPA572T |
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ELECTRICAL CHARACTERISTICS (TA = 25 ˚C) |
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PARAMETER |
SYMBOL |
TEST CONDITIONS |
MIN. |
TYP. |
MAX. |
UNIT |
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Drain Cut-off Current |
IDSS |
VDS = 30 V, VGS = 0 |
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1.0 |
μA |
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Gate Leakage Current |
IGSS |
VGS = ±5 V, VDS = 0 |
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±3.0 |
μA |
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Gate Cut-off Voltage |
VGS(off) |
VDS = 3 V, ID = 10 μA |
0.8 |
1.0 |
1.5 |
V |
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Forward Transfer Admittance |
|yfs| |
VDS = 3 V, ID = 10 mA |
20 |
50 |
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mS |
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Drain to Source On-State Resistance |
RDS(on)1 |
VGS = 2.5 V, ID = 1 mA |
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7 |
13 |
Ω |
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Drain to Source On-State Resistance |
RDS(on)2 |
VGS = 4.0 V, ID = 10 mA |
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5 |
8 |
Ω |
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Input Capacitance |
Ciss |
VDS = 5.0 V, VGS = 0, f = 1 MHz |
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16 |
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pF |
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Output Capacitance |
Coss |
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14 |
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pF |
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Reverse Transfer Capacitance |
Crss |
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2 |
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pF |
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Turn-On Delay Time |
td(on) |
VDD = 5 V, ID = 10 mA, VGS(on) = 5 V, |
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15 |
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ns |
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RG = 10 Ω, RL = 500 Ω |
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Rise Time |
tr |
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20 |
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ns |
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Turn-Off Delay Time |
td(off) |
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100 |
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ns |
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Fall Time |
tf |
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100 |
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ns |
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SWITCHING TIME MEASUREMENT CIRCUIT AND CONDITIONS (RESISTANCE LOADED)
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VGS |
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90 % |
RL |
Gate |
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VGS(on) |
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DUT |
voltage |
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10 % |
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0 |
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waveform |
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VDD |
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RG |
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ID |
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90 % |
90 % |
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PG. |
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ID |
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Drain |
0 |
10 % |
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10 % |
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current |
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waveform |
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VGS |
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td(on) |
tr td(off) |
tr |
0 |
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τ |
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ton |
toff |
τ = 1 μs |
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Duty Cycle ≤ 1 % |
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2