Fairchild Semiconductor CD4021BCN, CD4021BCMX, CD4021BCM Datasheet
October 1987
Revised January 1999
CD4021BC 8-Stage Static Shift Register
© 1999 Fairchild Semiconductor Corporation DS005954.prf www.fairchildsemi.com
CD4021BC
8-Stage Static Shift Register
General Description
The CD4021BC is an 8-stage parallel input/serial output
shift register. A parallel/serial cont rol input enabl es individual JAM inputs to each of 8 stages. Q outputs are available
from the sixth, seventh, and eighth stages. All outputs have
equal source and sink current capabilities and conform to
standard “B” series output drive.
When the parallel/serial control input is in the logical “0”
state, data is serially shifted into the register synchronously
with the positive transition of the clock. When the parallel/
serial control is in the logical “1” state, data is jammed into
each stage of the register asynchronously with the clock.
All inputs are protected against static discharge with diodes
to V
DD
and VSS.
Features
■ Wide supply voltage range: 3.0V to 15V
■ High noise immunity: 0.45 V
DD
(typ.)
■ Low power TTL compatibility:
Fan out of 2 driving 74L or 1 driving 74LS
■ 5V–10V–15V parametric ratings
■ Symmetrical output characteristics
■ Maximum input leakage 1 µA at 15V over full tempera-
ture range
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Pin Assignments for DIP and SO IC
Top View
Truth Table
X = Don't care case
Note 1: Level change
Note 2: No change
Order Number Order Code Package Description
CD4021BCM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
CD4021BCN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
CL
(Note 1)
Serial
Input
Parallel/
Serial
Control
PI 1 PI n
Q1
(Internal)
Q
n
(Note 2)
XX1000 0
XX1010 1
XX1101 0
XX1111 1
00XX0Q
n−1
10XX1Q
n−1
X0XXQ1Q
n
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CD4021BC
Logic Diagram
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CD4021BC
Absolute Maximum Ratings(Note 3)
(Note 4)
Recommended Operating
Conditions
(Note 4)
Note 3: “Absolute Maximum Rat ings” are tho se values beyond which the
safety of the device cannot be guaranteed. Ex c ept for “Operating Temperature Range” they are not mea nt to imply that the devices sh ould be operated at these limits. The table of “Electrical Characteristics” provides
conditions for actual device o peration.
Note 4: V
SS
= 0V unless otherw is e s pecified.
DC Electrical Characteristics (Note 4)
Note 5: IOH and IOL are tested one output at a ti m e.
Supply Voltage (VDD) −0.5V to +18V
Input Voltage (V
IN
) −0.5V to VDD +0.5V
Storage Temperature Range (T
S
) −65°C to +150°C
Power Dissipation (P
D
)
Dual-In-Line 700 mW
Small Outline 500 mW
Lead Temperature (T
L
)
(Soldering, 10 seconds ) 260°C
Supply Voltage (V
DD
) 3V to 15V
Input Voltage (V
IN
) 0 to V
DD
Operating Temperature Range (TA)
CD4021BCN −40°C to +85°C
Symbol Parameter Conditions
−40°C +25°C +85°C
Units
Min Max Min Typ Max Min Max
I
DD
Quiescent Device VDD = 5V, VIN = VDD or V
SS
20 0.1 20 150 µA
Current VDD = 10V, VIN = VDD or V
SS
40 0.2 40 300 µA
VDD = 15V, VIN = VDD or V
SS
80 0.3 80 600 µA
V
OL
LOW Level VDD = 5V 0.05 0 0.05 0.05 V
Output Voltage VDD = 10V |IO| < 1 µA 0.05 0 0.05 0.05 V
VDD = 15V 0.05 0 0.05 0.05 V
V
OH
HIGH Level VDD = 5V 4.95 4.95 5 4.95 V
Output Voltage VDD = 10V |IO|< 1 µA 9.95 9.95 10 9.95 V
VDD = 15V 14.95 14.95 15 14.95 V
V
IL
LOW Level VDD = 5V, VO = 0.5V or 4.5V 1.5 2 1.5 1.5 V
Input Voltage VDD = 10V, VO = 1.0V or 9.0V 3.0 4 3.0 3.0 V
VDD = 15V, VO = 1.5V or 13.5V 4.0 6 4.0 4.0 V
V
IH
HIGH Level VDD = 5V, VO = 0.5V or 4.5V 3.5 3.5 3 3.5 V
Input Voltage VDD = 10V, VO = 1.0V or 9.0V 7.0 7.0 6 7.0 V
VDD = 15V, VO = 1.5V or 13.5V 11.0 11.0 9 11.0 V
I
OL
LOW Level Output VDD = 5V, VO = 0.4V 0.52 0.44 0.88 0.36 mA
Current (Note 5) VDD = 10V, VO = 0.5V 1.3 1.1 2.2 0.90 mA
VDD = 15V, VO = 1.5V 3.6 3.0 8 2.4 mA
I
OH
HIGH Level Output VDD = 5V, VO = 4.6V −0.52 −0.44 −0.88 −0.36 mA
Current (Note 5) VDD = 10V, VO = 9.5V −1.3 −1.1 −2.2 −0.90 mA
VDD = 15V, VO = 13.5V −3.6 −3.0 −8 −2.4 mA
I
IN
Input Current VDD = 15V, VIN = 0V −0.3 −10−5−0.3 −1.0 µA
VDD = 15V, VIN = 15V 0.3 10−50.3 1.0 µA
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