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SIZE
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SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
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REV.
APPLE COMPUTER INC.
SCALE
NONE
(P 83) <RADAR 3890225> OPTICAL DRIVE CONNECTOR CHANGED TO 516S0235
MOVED GPU ZENER DIODES TO VREG PAGE SINCE THEY SHOULD BE PLACED NEAR THE VREGS
<RADAR 3849798> REDUCED CAPACITANCE OF C1100 & C1102
CONNECTED GPU POWER AND POWER FILTERS
(P 76) FIXED PCI_CBE_L<1> CONNECTION
MORE PHYSICAL & SPACING UPDATES
CHECKIN 02003
(P 76) ADDED STANDOFFS FOR Q85 CARD
(PP 16,17) NEW FAN CIRCUIT CAPS (C1603, C1653, C1703)
(P 59) LED 3 NOW DRIVEN FROM FPD_PWR_ON
(P 49) CONNECTED AGPTEST RESISTOR TO VDDP
11/22/04
(P 12) VESTA_ENET_LOWPWR UPDATE
(P 50) <RADAR 3877855> TP_VDD SET TO 1.80V
(P 50) <RADAR 3865344> VDDC_CT SET TO 1.50V
(P 91) <RADAR 3849858> USB CAP COST REDUCTION
(P 56) ADDED PADS FOR STRAPPING RESISTORS TO GPU_GPIO<14>
(PP 10, 22, 34, 50) USED COMPARATOR FOR LOW VOLTAGE RAIL LEDS
REPLACED EMC FERRITES WITH 0 OHM RESISTORS FOR GRAPHICS AND FANS
CONNECTED FRAME BUFFER
11/20/04
(P 62) <RADAR 3849855> SHASTA HT_PLL FILTER COST REDUCTION
(P 25) <RADAR 3849835> NEW SHASTA XTAL
(PP 56, 58) CONNECTED PWM FROM RV351LEP & PUT IN PROTO WORKAROUND
(P 36) CONNECTED NEW CPU DIODE REFERENCE
(P 77) USB2 IDESEL - NOW FROM USB2 SIDE
(P 56) ADDED BOMOPTIONS FOR MEMORY STRAPS
(P 91) CHANGED USB2 CHIP GROUNDING
(P 8) ALIASED VESTA JTAG TO TEST POINT NETS
REMOVED NV18/34 GPU
11/18/04
REMOVED BCM5231 ETHERNET PHY
10/21/04
(P 7) ADDED PLATED HOLE ZH710 FOR TMDS GROUNDING
REMOVED P50 AIRPORT AND Q23 BLUETOOTH CONNECTORS, HOLES, & STANDOFFS
11/16/04
REMOVED EXTERNAL S/PDIF TRANSMITTER
ADDED Q85 AIRPORT & BLUETOOTH CONNECTOR
(PP 16,17) REPLACED FAN CONTROL WITH NEW CIRCUIT
ADDED TEST POINTS TO GRAPHICS FOR EXOR TESTING
CHECKIN 01005
<RADAR 3849743> ADDED RESISTORS TO STUFF AROUND USB FILTERS
CHECKIN 01001
CONNECTED GPU GPIOS
ADDED 8MX32 GRAPHICS MEMORY
FRAME BUFFER SWAPS FOR CLEANER ROUTING
(P 5) NEW BOOTROM P/N
(P 76) FINISHED CONNECTING Q85 CONNECTOR
ADDED POWER SEQUENCING FOR GRAPHICS REGULATORS
ADDED REGULATOR FOR GPU TPVDD
(P 90) CHANGED R9090 TO 665 OHM
11/15/04
CHECKIN 01003
<RADAR 3848850> 2.5V VREG COST REDUCTION
<RADAR 3865344> SET GPU VDDC_CT VREG TO 1.55V
<RADAR 3848850> REGULATOR COST REDUCTIONS
<RADAR 3849772> REMOVED OUTPUT CAP ON 1.2V_ALL VREG
<RADAR 3849854> GPU CORE VREG COST REDUCTION
<RADAR 3849820> SHASTA FILTER COST REDUCTION
WHITE LED - CHANGED INDUCTORS TO 0 OHM RESISTORS
ADDED GPU STRAPS
CHECKIN 00009
ADDED GIGABIT ETHERNET CONNECTOR
MASTER PAGE SYNC:
<RADAR 3616348, 3621390> CHANGED FL5900-2 TO 220 OHM
<RADAR 3849806> CHEAPER SMU CRYSTAL
<RADAR 3849622> STUFFED AROUND TMDS FILTERS
11/01/04
CHECKIN 00008
REMOVED 1.6GHZ PROCESSORS
CHANGED VOLTAGE SETTING OF 2.5V VREG TO 2.588V FROM 2.62V
11/06/04
ADDED SPACING & PHYSICAL CONSTRAINTS TO FRAME BUFFER
U2850 - REMOVED MAXIM AS AN ALTERNATE
11/04/04
CHECKIN 00003
REMOVED AGP VREG (VR5001)
CHECKIN 00005
GPU CORE POWER UPDATES
CHECKIN 00004
REMOVED GPU VTT VREG
ADDED RV351LE GPU
ADDED 2.5V VREG FOR A2VDD
REVISION HISTORY
ADDED 2.5V LDO FOR VESTA
10/26/04
10/22/04
ADDED VESTA
10/28/04
CHECKIN 00007
11/03/04
DESCRIPTION
REMOVED VESTA CORE REGULATOR
<RADAR 3848831> MOVED SMU RESET BUTTON TO DEVELOPMENT BOM
CHANGED FETS IN GPU CORE FOR COST REDUCTION
REMOVED VESTA ROM
AUDIO 3052A CODEC
ADDED 1.55V VREG FOR GPU VDDC_CT
TIED PPVCORE_NB DIRECTLY TO PP1V5_PWRON (REMOVED R707)
CONNECTED GPU TEMP SENSOR
ADDED AMBIENT LIGHT SENSOR CONNECTOR
ADDED 1.8V GPU VREG
AUDIO COST REDUCTIONS <RADAR 3849747 & 3849751>
ADDED MORE GPU CONSTRAINTS
<RADAR 3849656> STUFFED AROUND RGB FILTERS
<RADAR 3848887> 5V & 3.3V PWRON FET COST REDUCTIONS
<RADAR 3848859> 1.2V, 1.5V RUN FET COST REDUCTIONS
<RADAR 3848846> 2.5V RUN FET COST REDUCTION
CHECKIN 00010
ADDED DEVELOPMENT LEDS TO REGULATORS
11/09/04
<RADAR 3849857> CHEAPER USB2 CRYSTAL
CHANGED SOURCE OF Q1003 TO PP1V2_ALL
RGB TERMINATION NOW CONNECTED TO DIGITAL GROUND
<RADAR 3849767> 2.5V VREG COST REDUCTIONS
11/10/04
UPDATED POWER BLOCK DIAGRAM
CHECKIN 01002
MOVED VTT VREG TO 2.5V PWRON TO REDUCE CURRENT THROUGH Q903
1.2V VREG COST REDUCTIONS - Q1002 TO NTD60N02R; C1002/3 TO 10UF CERM
REMOVED ON BOARD POWER SUPPLY TEMP SENSOR
REMOVED CPU VREG 4TH PHASE
11/07/04
CHANGED FW LATE VG CIRCUITRY TO MATCH Q78 & Q86
CHECKIN 00006
REMOVED MICRODASH CONNECTOR
REMOVED FW PORT POWER CIRCUITRY
REMOVED FW802A FW PHY
ADDED FW LATE VG PROTECTION
ADDED 1.2V REGULATOR FOR VESTA CORE
DATE
10/20/04
CHECKIN 00002
CHECKIN 01004
CHECKIN 01006
(P 58) REPLACED THERMAL SENSOR WITH LM63
(P 22) CHANGED Q2250 TO 376S0143
(P 59) TIED UNUSED BUFFER ENABLE PINS HIGH
(P 46) SLEEP SIGNAL TURNS OFF VTT VREG
(P 12) VESTA_ENET_LOWPWR UPDATE
(P 9) ADDED EXTRA 10UF INPUT CAP
ADDED VESTA ETHERNET LOWPWR CIRCUIT
REMOVED EXTERNAL TMDS TRANSMITTER
(P 7) TIED BOTH EI RAILS TO 1.5V
(P 18) <RADAR 3878118> MOVED SMU I2C E BUS
(P 90) FIXED FW PORT NAMING
CHECKIN 01007 / BOM RELEASE REV 02
(P 9) <RADAR 3848846> ADDED PAD FOR 1NF CAP TO GATE OF Q903
ADDED PHYSICAL CONSTRAINTS
AUDIO STUFFING CHANGES
CHECKIN 02001
CONNECTED GPU TMDS AND VGA
ADDED VOLTAGE, LINE WIDTH, AND NECK WIDTH PROPERTIES FOR GRAPHICS (IN MM)
REPURPOSED 1.2V REGULATOR FOR VESTA AND SHASTA
<RADAR 3849762> MOVED SMU DOWNLOAD CONNECTOR TO DEVELOPMENT BOM
CLONED DESIGN FROM GILA (Q45 A/B) REV G
CHECKIN 02002
ADDED DEVELOPMENT LEDS FOR VESTA ENET
(P 3) CONNECTED SHASTA CORE POWER FOR POWER SEQUENCING
(P 58) ADDED CONSTRAINT SETS
(P 59) STUFFED AROUND Q5900 PANEL PWR SEQUENCING
12/02/04
(P 76) TABLED IN NEW STANDOFFS FOR Q85 CARD
CHECKIN 02004
(P 76) NOW HAVE CORRECT SYMBOL FOR STANDOFFS
11/23/04
(P 76) J7650 - NEW TO ALLOW 5MM CONNECTED HEIGHT
CHECKIN 03002
(P 83) REMOVED SECOND SATA CONNECTOR
(P 90) FIXED ALIAS PROBLEM WITH FW_TPB2_PD
<RADAR 3849718, 3849767, 3849854> MADE ON & VISHAY FETS TRUE ALTERNATES
(P 56) ADDED OPTION OF USING PWM FROM SHASTA
(P 16) C1653 - REPLACED WITH LOWER HEIGHT CAP
(P5) ADDED U3L W/ NEW LAMINATE AS ALTERNATE
PROTO RELEASE (REV 3)
(P 90) FIXED FW_CPS SHORT
(P 35) REMOVED DS3500 & DS3501
CONVERTED DISCRETES TO LEAD FREE
CHANGED U7700 BACK TO LEADED PART
(P 5) REMOVED ORIGINAL U3LITE (NEW LAMINATE ONLY FOR C/D)
(P 49) CHANGED GPU TO RV351LEP (338S0231)
12/07/04
CHECKIN 03001
<RADAR 3848846> UPDATE OF 2.5V RUN FET COST REDUCTION
FRAME BUFFER PIN SWAPS
11/08/04
BOM RELEASE REV 01
BOM RELEASE REV 04
051-6772
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