Apple iMAC G5 A1058 SEEDY MLB 051-6772 Rev04 Schematic

Page 1
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
78
6
5
4
3
ECN
ZONE
REV
DESCRIPTION OF CHANGE
SEEDY
04
ENGINEERING RELEASED
354713
12
CK APPD
DATE
12/07/04
ENG APPD
?
DATE
12/07/04
D
10 11 12
C
B
A
13* 14 16 17 18 21 22 23 24 25* 26 27 28 29 30 31 32 33 34 35 36 37 38 40 44 45 46 48 49 50
PDF
1 2 3 4 5 5 6 7 8 9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42
CIRCUIT
1
TABLE OF CONTENTS
2
SYSTEM BLOCK DIAGRAM POWER BLOCK DIAGRAM
3 4
REVISION HISTORY TABLE ITEMS
6
FUNC TEST
7
POWER CONNECTOR / POWER ALIAS SIGNAL ALIAS
8
2.5V VREG
9
1.2V VREG
3.3V/5V PWRON SWITCHING VESTA POWER SMU CPU LOGIC ANALYZER CONNECTOR FAN 0, 1 AND SYSTEM TEMP SENSOR FAN 2 AND HARD DRIVE TEMP SENSOR I2C CONNECTIONS INDICATOR LED / AMBIENT LIGHT SENSOR
1.5V VREG / U3LITE CORE SHASTA CORE U3LITE MISC SHASTA SERIAL PULSAR POWER PULSAR CLOCKS U3LITE APPLE PI NEO APPLE PI CPU STRAPS NEO POWER & BYPASS CPU BYPASS CPU VREG CPU VREG CPU VREG OUTPUT CAPS CPU DIODE CONDITIONER U3LITE MEMORY SERIES TERMINATION DIMMS PARALLEL TERMINATION PARALLEL TERMINATION VTT VREG U3LITE AGP GPU AGP GRAPHICS VREGS
BLOCK
TOP
PROCESSOR
MEMORY
GRAPHICS
* PAGES WHERE MASTER PAGE IS IN A DIFFERENT SCHEMATIC
8
67
5
CSACSA
51 52 53 54 55 56 58 59 60 62* 64 73 74* 75* 76 77* 80* 83 84* 86* 87 88* 89* 90 91* 92 94 95* 96*
98* 100* 101* 102*
4
PDF
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75
CIRCUIT
GPU CORE POWER GPU FRAME BUFFER FRAME BUFFER TERMINATION GRAPHICS DDR SDRAM A GRAPHICS DDR SDRAM B GPU STRAPS GPU DVI & DACS EXT VGA & TMDS U3LITE HYPERTRANSPORT SHASTA HYPERTRANSPORT HYPERTRANSPORT LA CONNECTORS PCI SERIES TERMINATION SHASTA PCI BOOT ROM AIRPORT EXTREME & BLUETOOTH USB2 PCI SHASTA DISK DISK CONNECTORS SHASTA ETHERNET VESTA ETHERNET PHY ETHERNET CONNECTOR SHASTA FIREWIRE VESTA FIREWIRE PHY FIREWIRE CONNECTORS USB HOST INTERFACE USB DEVICE INTERFACE MODEM CONNECTOR PCM3052A AUDIO CODEC LINE IN AMP LINE OUT AMP SPEAKER AMP AUDIO CONNECTORS AUDIO POWER SUPPLIES
DIMENSIONS ARE IN MILLIMETERS
XX
X.XX
ANGLES
DO NOT SCALE DRAWING
THIRD ANGLE PROJECTION
DRAFTER
ENG APPD
QA APPD
RELEASE
3
METRIC
MATERIAL/FINISH
NOTED AS
APPLICABLE
DESIGN CK
MFG APPD
DESIGNER
NONE
SIZE
2
Apple Computer Inc.
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SCH,MLB,SEEDY
DRAWING NUMBER
D
051-6772
BLOCK
GRAPHICS
HT
PCI
DISK
ETHERNET
FIREWIRE
USB
MODEM
AUDIO
SHT
1
REV.
1
04
OF
D
C
B
A
102
Page 2
FREQUENCIES LISTED ARE MAXIMUM DATA TRANSFER RATES SUPPORTED BY U3LITE
D
U5400, U5401
FRAME
BUFFER A
PAGE 54
U2600
PULSAR
POWER
C
PAGE 26
B
CLOCKS
PAGE 27
HARD DRIVE
FOR DEVELOPMENT ONLY
OPTICAL
78
64-BIT FRAME BUFFER
2.6V/400MHZ
JXXXX
SATA
CONNECTOR
PAGE 83
J8302
SATA DEV
CONNECTOR
PAGE 83
J8301
UATA
CONNECTOR
PAGE 83
J5900, J5901 J5902, J5903
17",20" INVERTER
TMDS
EXT VGA
PAGE 59
U4900
GPU
RV351LE
PAGE 49
U5500, U5501
FRAME
BUFFER B
PAGE 55
SATA/150
1.2V/1.5GHZ
SATA/150
1.2V/1.5GHZ
UATA/133
3.3V/133MHZ
64-BIT FRAME BUFFER
2.6V/400MHZ
6
32-BIT 8X AGP
0.8V/533MHZ
4X = 1.5V I/O = 1.5V
U2900
CPU
NEO 10S
PAGE 29
APPLE PI
PAGE 28
U3
AGP
U3LITE
PAGE
48
MISC
PAGE 24
HYPERTRANSPORT
I2C
PAGE 18
HYPERTRANSPORT
SATA
U2300
SATA2SATA1
UATA
PAGE 80PAGE 80
CORE
PAGE 23
FIREWIREETHERNET
PAGE 84
8-bit TX & 8-bit RX
GMII (3.3V/125MHz)
PAGE 88
32-BIT APPLE PI ELASTIC INTERFACE
1.2V/900MHZ
CORE
PAGE 22
PAGE 60
J6400 J6401 J6402
HT DEBUG
PAGE 64
PAGE 62
SHASTA
NCs
PAGE 91
I2S0 I2S2
1394 OHCI (3.3V/98MHz)
8-bit TX/RX
5
64/128-BIT MAIN MEMORY
2.6V/400MHZ
PAGE 37
MAIN MEMORY
8-BIT HYPERTRANSPORT
1.2V/800MHZ
CONTROL = 2.5V
I2S
PAGE 25
I2S1
PAGE 74
PCI
PAGE 25
GPIO/PCI64
SCCBSCCA
4
J4000 J4001
SERIES
TERM
PAGE 38
U7500
BOOTROM
PAGE 75 PAGE 77
32-bit PCI (5V-3.3V/33MHz)
DIMMS
PAGE 40
J7600
AIRPORT EXTREME
CONNECTOR
PAGE 76
J9401
CTL-LESS / SOFT MODEM CONNECTOR
PAGE 94
PAGES 44&45
U7700
USB 2.0
uPD720101
PARALLEL
TERM
321
USB
PAGE 91
PCI
3
U1300
SMU
PAGE 13
U1301
RTC
PAGE 13
12
D
J9210/J9220/J9230
USB
CONNECTORS
PAGE 92
J9240
54
BLUETOOTH CONNECTOR
PAGE 92
C
B
U9500
AUDIO CODEC
U8600
VESTA
GIG ETHERNET
PAGE 86 PAGE 89
A
4 Diff pairs
J8700
ETHERNET CONNECTOR
PAGE 87
8
67
FIREWIRE A
0
1
2 Diff pairs
J9000, J9001
FIREWIRE A CONNECTORS
PAGE 90
5
PCM3052A
LINE IN
AMP
PAGE 97
J9800
LINE IN
CONNECTOR
PAGE 98
PAGE 95
J9802
MIC
CONNECTOR
PAGE 98
S/PDIF
LINE OUT
AMP
PAGE 97
SPEAKER
AMP
PAGE 97
4
OPTICAL OUT J9803
COMBO OUT CONNECTOR
PAGE 98
LINE OUT
J9801
SPEAKER
CONNECTOR
PAGE 98
SYSTEM BLOCK DIAGRAM
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
051-6772
APPLE COMPUTER INC.
3
2
D
NONE
SHT
2
1
REV.
OF
102
A
04
Page 3
ALIAS
IN
IN IN
IN
LM339A
V+
GND
IN
LM339A
V+
GND
IN
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
20" PANEL POWER
POWER BLOCK DIAGRAM
AUDIO CODEC
PCI BUS
PP5V_ALL
HDD & OPTICAL
PP5V_RUN
PP12V_RUN
20" LCD INVERTER
PP24V_RUN
20" LCD INVERTER
FW CONN
PAGE 7
J700
5V
PAGE 10
SMU
SYS_POWERUP_L
(PWR_GOOD_PP2V5)
(TURN_ON_VTT)
FET SWITCH
(PWR_GOOD_SB_CORE)
SYS_POWERUP_L
POWER SEQUENCE PIN
PP3V3_RUN
POWER CONNECTOR
GPUL
SC1211*4
SC2643VX*1
SWITCHER
PAGE 33
0.8~1.2V
CPU CORE
HP/LINEOUT AMP
LINEAR
LINEAR
PP4V5_RUN_AUDIO
PP5V_RUN_AUDIO
AUDIO CODEC
5V
PAGE 99
4.5V
PAGE 99
LINEAR
PULSAR CORE
PP1V5_PWRON
1.5V
PAGE 50
SHASTA HT
USB CONN
FET SWITCH
PP5V_PWRON
PAGE 11
5V
DDR DIMM
IRU3037CS
SWITCHER
2.59V
RAM VTT
PP2V5_PWRON
PAGE 9
IRU3037CS
U3LITE CORE
LINEAR
AGP BUS
PAGE 50
POWER SW
PP1V5_RUN
1.3V
PP1V25_RAM_VTT
PAGE 46
CPU AVDD
LINEAR
PP2V5_RUN_CPU_AVDD
U3LITE CORE
SWITCHER
PAGE 31
2.8V
1.53V
PAGE 22
RAM TERM
PP2V5_RUN FET SWITCH
GRAPHIC FB
PAGE 9
SMU
FW PHY
LINEAR
PP3V3_PWRON
PAGE 11
3.3V
PAGE 11
PP3V3_ALL
3.3V
IRU3037ACS
PAGE 50
LINEAR
PP1V8_GPU
GPU
ENET PHY USB2 HOST MODEM & BT
RV351
IRU3037ACS
GPU CORE
PAGE 50
1.20V
VESTA CORE
PP1V2_ALL
SWITCHER
FET SWITCH
PAGE 50
PP2V5_GPU_A2VDD
1.2V
PAGE 10
SWITCHER
PAGE 50
PP1V5_VDDC_CT
LINEAR
PAGE 50
LINEAR
PP1V8_TPVDD
GPU GPU
GPU
PP1V2_PWRON
LINEAR
HT BUS
PP1V2_RUN
PAGE 10
FET SWITCH
SHASTA CORE PWRON_SD PWRON_DISK_SB
402
CERM
16V
20%
0.01UF
2
1
C340
10 10
PP2V5_PWRON
402
5%
150K
2
1
R342
100K
5% 1/16W MF-LF 402
2
1
R343
5% 1/16W MF-LF
10K
402
2
1
R341
5% 1/16W MF-LF
10K
402
2
1
R331
PP5V_ALL
PP3V3_ALL
SOI
3
14
9
8
12
U1100
PP3V3_ALL
46
SOI
3
1
7
6
12
U1100
402
5%
100K
21
R330
20% 16V CERM 402
0.01UF
2
1
C330
23
7 6
402
5%
100K
21
R340
3
102
04
051-6772
=PPVCORE_PWRON_SB
TURN_ON_PP1V2_PWRON_L
PWR_GOOD_PP2V5
TP_SMU_PWRSEQ_P1_0
MAKE_BASE=TRUE
TURN_ON_VTT
CPU_AVDD_EN
=PP5V_RUN_CPU
=PULSAR_POWER_DOWN
PULSAR_POWER_DOWN MAKE_BASE=TRUE
SMU_PWRSEQ_P1_4
SMU_PWRSEQ_P1_0
PWR_GOOD_SB_CORE
SMU_PWRSEQ_P1_2
SMU_PWRSEQ_P9_6
SMU_PWRSEQ_P9_5
SMU_PWRSEQ_P1_1
COMPARE_SB_CORE
RAIL_CTL_NEG
PS_2V_REF
COMPARE_PP2V5
31
8 7
31
6
27
13
13
13
13
13
13
11
Preliminary
Page 4
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
(P 83) <RADAR 3890225> OPTICAL DRIVE CONNECTOR CHANGED TO 516S0235
MOVED GPU ZENER DIODES TO VREG PAGE SINCE THEY SHOULD BE PLACED NEAR THE VREGS
<RADAR 3849798> REDUCED CAPACITANCE OF C1100 & C1102
CONNECTED GPU POWER AND POWER FILTERS
(P 76) FIXED PCI_CBE_L<1> CONNECTION MORE PHYSICAL & SPACING UPDATES
CHECKIN 02003
(P 76) ADDED STANDOFFS FOR Q85 CARD (PP 16,17) NEW FAN CIRCUIT CAPS (C1603, C1653, C1703)
(P 59) LED 3 NOW DRIVEN FROM FPD_PWR_ON
(P 49) CONNECTED AGPTEST RESISTOR TO VDDP
11/22/04
(P 12) VESTA_ENET_LOWPWR UPDATE
(P 50) <RADAR 3877855> TP_VDD SET TO 1.80V
(P 50) <RADAR 3865344> VDDC_CT SET TO 1.50V
(P 91) <RADAR 3849858> USB CAP COST REDUCTION
(P 56) ADDED PADS FOR STRAPPING RESISTORS TO GPU_GPIO<14>
(PP 10, 22, 34, 50) USED COMPARATOR FOR LOW VOLTAGE RAIL LEDS
REPLACED EMC FERRITES WITH 0 OHM RESISTORS FOR GRAPHICS AND FANS
CONNECTED FRAME BUFFER
11/20/04
(P 62) <RADAR 3849855> SHASTA HT_PLL FILTER COST REDUCTION
(P 25) <RADAR 3849835> NEW SHASTA XTAL
(PP 56, 58) CONNECTED PWM FROM RV351LEP & PUT IN PROTO WORKAROUND
(P 36) CONNECTED NEW CPU DIODE REFERENCE (P 77) USB2 IDESEL - NOW FROM USB2 SIDE (P 56) ADDED BOMOPTIONS FOR MEMORY STRAPS
(P 91) CHANGED USB2 CHIP GROUNDING (P 8) ALIASED VESTA JTAG TO TEST POINT NETS
REMOVED NV18/34 GPU
11/18/04
REMOVED BCM5231 ETHERNET PHY
10/21/04
(P 7) ADDED PLATED HOLE ZH710 FOR TMDS GROUNDING
REMOVED P50 AIRPORT AND Q23 BLUETOOTH CONNECTORS, HOLES, & STANDOFFS
11/16/04
REMOVED EXTERNAL S/PDIF TRANSMITTER
ADDED Q85 AIRPORT & BLUETOOTH CONNECTOR
(PP 16,17) REPLACED FAN CONTROL WITH NEW CIRCUIT
ADDED TEST POINTS TO GRAPHICS FOR EXOR TESTING
CHECKIN 01005
<RADAR 3849743> ADDED RESISTORS TO STUFF AROUND USB FILTERS CHECKIN 01001
CONNECTED GPU GPIOS
ADDED 8MX32 GRAPHICS MEMORY
FRAME BUFFER SWAPS FOR CLEANER ROUTING
(P 5) NEW BOOTROM P/N
(P 76) FINISHED CONNECTING Q85 CONNECTOR
ADDED POWER SEQUENCING FOR GRAPHICS REGULATORS
ADDED REGULATOR FOR GPU TPVDD
(P 90) CHANGED R9090 TO 665 OHM
11/15/04
CHECKIN 01003 <RADAR 3848850> 2.5V VREG COST REDUCTION
<RADAR 3865344> SET GPU VDDC_CT VREG TO 1.55V
<RADAR 3848850> REGULATOR COST REDUCTIONS
<RADAR 3849772> REMOVED OUTPUT CAP ON 1.2V_ALL VREG
<RADAR 3849854> GPU CORE VREG COST REDUCTION
<RADAR 3849820> SHASTA FILTER COST REDUCTION
WHITE LED - CHANGED INDUCTORS TO 0 OHM RESISTORS
ADDED GPU STRAPS
CHECKIN 00009
ADDED GIGABIT ETHERNET CONNECTOR
MASTER PAGE SYNC:
<RADAR 3616348, 3621390> CHANGED FL5900-2 TO 220 OHM
<RADAR 3849806> CHEAPER SMU CRYSTAL
<RADAR 3849622> STUFFED AROUND TMDS FILTERS
11/01/04
CHECKIN 00008
REMOVED 1.6GHZ PROCESSORS CHANGED VOLTAGE SETTING OF 2.5V VREG TO 2.588V FROM 2.62V
11/06/04
ADDED SPACING & PHYSICAL CONSTRAINTS TO FRAME BUFFER
U2850 - REMOVED MAXIM AS AN ALTERNATE
11/04/04
CHECKIN 00003
REMOVED AGP VREG (VR5001)
CHECKIN 00005
GPU CORE POWER UPDATES
CHECKIN 00004
REMOVED GPU VTT VREG
ADDED RV351LE GPU
ADDED 2.5V VREG FOR A2VDD
REVISION HISTORY
ADDED 2.5V LDO FOR VESTA
10/26/04
10/22/04
ADDED VESTA
10/28/04
CHECKIN 00007
11/03/04
DESCRIPTION
REMOVED VESTA CORE REGULATOR
<RADAR 3848831> MOVED SMU RESET BUTTON TO DEVELOPMENT BOM
CHANGED FETS IN GPU CORE FOR COST REDUCTION
REMOVED VESTA ROM
AUDIO 3052A CODEC
ADDED 1.55V VREG FOR GPU VDDC_CT
TIED PPVCORE_NB DIRECTLY TO PP1V5_PWRON (REMOVED R707)
CONNECTED GPU TEMP SENSOR
ADDED AMBIENT LIGHT SENSOR CONNECTOR
ADDED 1.8V GPU VREG
AUDIO COST REDUCTIONS <RADAR 3849747 & 3849751>
ADDED MORE GPU CONSTRAINTS
<RADAR 3849656> STUFFED AROUND RGB FILTERS
<RADAR 3848887> 5V & 3.3V PWRON FET COST REDUCTIONS
<RADAR 3848859> 1.2V, 1.5V RUN FET COST REDUCTIONS
<RADAR 3848846> 2.5V RUN FET COST REDUCTION
CHECKIN 00010
ADDED DEVELOPMENT LEDS TO REGULATORS
11/09/04
<RADAR 3849857> CHEAPER USB2 CRYSTAL
CHANGED SOURCE OF Q1003 TO PP1V2_ALL RGB TERMINATION NOW CONNECTED TO DIGITAL GROUND
<RADAR 3849767> 2.5V VREG COST REDUCTIONS
11/10/04
UPDATED POWER BLOCK DIAGRAM
CHECKIN 01002
MOVED VTT VREG TO 2.5V PWRON TO REDUCE CURRENT THROUGH Q903
1.2V VREG COST REDUCTIONS - Q1002 TO NTD60N02R; C1002/3 TO 10UF CERM
REMOVED ON BOARD POWER SUPPLY TEMP SENSOR
REMOVED CPU VREG 4TH PHASE
11/07/04
CHANGED FW LATE VG CIRCUITRY TO MATCH Q78 & Q86
CHECKIN 00006
REMOVED MICRODASH CONNECTOR
REMOVED FW PORT POWER CIRCUITRY
REMOVED FW802A FW PHY
ADDED FW LATE VG PROTECTION
ADDED 1.2V REGULATOR FOR VESTA CORE
DATE
10/20/04
CHECKIN 00002
CHECKIN 01004
CHECKIN 01006
(P 58) REPLACED THERMAL SENSOR WITH LM63
(P 22) CHANGED Q2250 TO 376S0143
(P 59) TIED UNUSED BUFFER ENABLE PINS HIGH
(P 46) SLEEP SIGNAL TURNS OFF VTT VREG
(P 12) VESTA_ENET_LOWPWR UPDATE
(P 9) ADDED EXTRA 10UF INPUT CAP
ADDED VESTA ETHERNET LOWPWR CIRCUIT
REMOVED EXTERNAL TMDS TRANSMITTER
(P 7) TIED BOTH EI RAILS TO 1.5V
(P 18) <RADAR 3878118> MOVED SMU I2C E BUS
(P 90) FIXED FW PORT NAMING
CHECKIN 01007 / BOM RELEASE REV 02
(P 9) <RADAR 3848846> ADDED PAD FOR 1NF CAP TO GATE OF Q903
ADDED PHYSICAL CONSTRAINTS AUDIO STUFFING CHANGES CHECKIN 02001
CONNECTED GPU TMDS AND VGA
ADDED VOLTAGE, LINE WIDTH, AND NECK WIDTH PROPERTIES FOR GRAPHICS (IN MM)
REPURPOSED 1.2V REGULATOR FOR VESTA AND SHASTA
<RADAR 3849762> MOVED SMU DOWNLOAD CONNECTOR TO DEVELOPMENT BOM
CLONED DESIGN FROM GILA (Q45 A/B) REV G
CHECKIN 02002
ADDED DEVELOPMENT LEDS FOR VESTA ENET
(P 3) CONNECTED SHASTA CORE POWER FOR POWER SEQUENCING
(P 58) ADDED CONSTRAINT SETS (P 59) STUFFED AROUND Q5900 PANEL PWR SEQUENCING
12/02/04
(P 76) TABLED IN NEW STANDOFFS FOR Q85 CARD
CHECKIN 02004
(P 76) NOW HAVE CORRECT SYMBOL FOR STANDOFFS
11/23/04
(P 76) J7650 - NEW TO ALLOW 5MM CONNECTED HEIGHT
CHECKIN 03002
(P 83) REMOVED SECOND SATA CONNECTOR
(P 90) FIXED ALIAS PROBLEM WITH FW_TPB2_PD
<RADAR 3849718, 3849767, 3849854> MADE ON & VISHAY FETS TRUE ALTERNATES
(P 56) ADDED OPTION OF USING PWM FROM SHASTA
(P 16) C1653 - REPLACED WITH LOWER HEIGHT CAP
(P5) ADDED U3L W/ NEW LAMINATE AS ALTERNATE
PROTO RELEASE (REV 3)
(P 90) FIXED FW_CPS SHORT (P 35) REMOVED DS3500 & DS3501
CONVERTED DISCRETES TO LEAD FREE
CHANGED U7700 BACK TO LEADED PART (P 5) REMOVED ORIGINAL U3LITE (NEW LAMINATE ONLY FOR C/D) (P 49) CHANGED GPU TO RV351LEP (338S0231)
12/07/04
CHECKIN 03001
<RADAR 3848846> UPDATE OF 2.5V RUN FET COST REDUCTION
FRAME BUFFER PIN SWAPS
11/08/04
BOM RELEASE REV 01
BOM RELEASE REV 04
051-6772
04
4
102
Preliminary
Page 5
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_HEAD
TABLE_11_HEAD
REFERENCE DESIGNATOR(S)
BOM OPTION
QTY
DESCRIPTION
VALUE VOLT. WATT.
TOL.PART #
PACKAGE
DEVICE
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_11_HEAD
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
TABLE_5_ITEM
TABLE_ALT_ITEM
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_HEAD
TABLE_ALT_ITEM
TABLE_ALT_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_HEAD
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
TABLE_5_ITEM
TABLE_ALT_ITEM
ALTERNATES
MISC PARTS
PROCESSORS
VOLTAGE
QUALIFIED
ASICS
TABLE ITEMS
1.20V
1.25VWAVE3
WAVE5
1.25VWAVE5
WAVE3
IC,ASIC,SHASTA,V1.1,PBGA
1
343S0283
051-6772
04
5
102
IC,GPUL,DD3,1.8G,BRA
337S2969337S2970
CPU_DD30_1_8GHZ
337S2981
IC,GPUL,DD3,1.8G,BPL
337S2969
CPU_DD30_1_8GHZ
337S2982
IC,GPUL,DD3,1.8G,BRL
337S2969
CPU_DD30_1_8GHZ
42W
337S2969
CPU_DD30_1_8GHZ
1 ?
PROCESSOR
1.8GHZ
IC,GPUL,10S,DD3,1.8G,85C,BPA
CBGA-576-1MM
IC,ASIC,VESTA,V1.3
343S0324
1
U7500
1
341T1667
IC,FLASH,1MX8,3.3V,90NS
MLB1
1
PCB,FAB,MLB
820-1747
1
LBL1
BARCODE LABEL, MLB, Q45
825-6447
343S0321
U3L,NEW LAM,200MM
U3343S0320
1
U3343S0320
IC,U3LITE,NEW LAM,300MM,PBGA
1
SCH1
PCB,SCHEM,MLB
051-6772
PURCH ASSY, SMU BIG
U1300
341T1395
1
HEAT SINK ASSEMBLY 17 IN
603-6015
1
17_INCH_LCD
CRITICAL
MECH17
HEAT SINK ASSEMBLY 20 IN
603-6016
1
CRITICAL
20_INCH_LCD
MECH20
378S0114
KINGBRIGHT LED
LED700,LED702,LED5900
378S0119
Q3310,Q3320,Q3410
MOSFET,N-CH,VISHAY
376S0130376S0204
Q3311,Q3321,Q3411
376S0146376S0207
MOSFET,N-CH,VISHAY
1
062-2082 VPP1
SPEC,VENDOR PACKAGING PROCEDURE
Preliminary
Page 6
IN
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IN IN IN IN
IN IN
IN
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IN IN
IN
IN IN IN IN IN IN IN
IN
IN
IN
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
2 TEST POINTS
2 TEST POINTS
2 TEST POINTS
2 TEST POINTS
FUNC TEST
2 TEST POINTS
2 TEST POINTS
2 TEST POINTS
10 TEST POINTS
5 TEST POINTS
5 TEST POINTS
12 TEST POINTS
5 TEST POINTS
5 TEST POINTS
5 TEST POINTS
5 TEST POINTS
2 TEST POINTS
GENZ SHOULD USE J1400 FOR THE FOLLOWING NETS:
2 TEST POINTS
I307
I337 I338
I344 I345 I346 I347 I348
I349
I350
I354 I355 I356 I357 I358
I359
I360
I361
I362 I363
I364 I365
I371
I372 I373
I374 I375 I376 I377 I378
I379
I380
I381
I382 I383
I384 I385 I386
I387
I388
I389
I390
I391
I392
I393
I394
I395
I396
I397
I398
I399
I400
I401
I402
I403
I404 I405 I406
I407
I408
I428
I429
I430
I431
I432
I433
I434
I435
I436
I437
I438
I439
I440 I441 I442
I443
I444
PP5V_ALL
PP12V_RUN
PP5V_RUN
PP3V3_PWRON
PP5V_PWRON
PP2V5_RUN
PP1V5_RUN
PP1V2_PWRON
PP3V3_RUN
11
7
18 11 10
7
50 34 22 18 11 10
7
83
7
7
83
18 11
58 27 18 11
13
8 7
31
8 7 3
7
33 34 35
22
34 33
33
33
8 7
13
7
7
7
13
8
46 22 11 10
8 9
33 13 11 10
7
13
8
22
9
59 58
59 58
59 58
83 80
83 80
83 80
83 80
83
83 80
83 80
83 80
6
83 80
6
83 80
83
83
83
83
33
8
36
36
36
36 33
36
36 33
59
59
59
59
59
59
59 58
59
59
59
59
59
59
77 76 75 74 73
77 76 74 73
8
76 74
76 74
76 25
77 76 74 73
74 56
8
77 76 74 73
77 76 74 73
77 76 74 73
77 76 74 73
77 76 74 73
76 75 74
76
76 75 74
76 75 74
76
76 75
76
76
92
92
92
92
92
92
92
92
92
94 25
94 25
94 25
94 25
94 25
94 25
94 25
92 91
92 91
25
25
59
59
59
59
59
59
59
59
59
59
59
59
59
7
101
25
75
PP24V_RUN
36 31
I781
I782
I784 I785
I786
I787
I788
I789
I790
I791
I792
I793 I794
I795 I796
I797
I798 I799
I800
I801 I802
I803
I804 I805
I806 I807
I808
I809 I810
101
90
101
101
18 17
18 17
25 18
25 18
36 33 31
36 33 31
83
051-6772
102
6
04
PP5V_ALL
FUNC_TEST=YES
PP12V_RUN
FUNC_TEST=YES
PP5V_RUN
FUNC_TEST=YES
GND
FUNC_TEST=YES
PP3V3_PWRON
FUNC_TEST=YES
PP5V_PWRON
FUNC_TEST=YES
PP2V5_RUN
FUNC_TEST=YES FUNC_TEST=YES
PP1V5_RUN
PP1V2_PWRON
FUNC_TEST=YES
FUNC_TEST=YES
PP3V3_RUN PP24V_RUN
FUNC_TEST=YES
UATA_CS1_L
FUNC_TEST=YES
UATA_STOPUATA_STOP
FUNC_TEST=YES
FUNC_TEST=TRUE
UATA_DASP_L TDIODE_NEG
FUNC_TEST=YES
FUNC_TEST=TRUE
UATA_DD<15..0>
FUNC_TEST=YES
ROM_WP_L
AUDIO_LO_DET_L
FUNC_TEST=YES
SMU_RESET_L
FUNC_TEST=YES
UATA_CS0_L
FUNC_TEST=YES
FUNC_TEST=TRUE
UATA_DA<2..0>
UATA_CSEL_PD
FUNC_TEST=YES
UATA_IOCS16_PU
FUNC_TEST=YES
UATA_DMARQ_R
FUNC_TEST=YES
UATA_RESET_L
FUNC_TEST=YES
ANALOG_RED
FUNC_TEST=YES
U2200_FEEDBACK
FUNC_TEST=YES
U900_FEEDBACK
FUNC_TEST=YES
SYS_POWERFAIL_L
FUNC_TEST=YES
POWER_BUTTON_L
FUNC_TEST=YES
PCI_CLK33M_AIRPORT
FUNC_TEST=YES
FUNC_TEST=TRUE
PCI_CBE_L<3..0>
PCI_SLOTA_REQ_L
FUNC_TEST=YES
FUNC_TEST=TRUE
I2C_SB_SDA
FUNC_TEST=TRUE
KPGND2
FUNC_TEST=TRUE
KPVDD2
FUNC_TEST=TRUE
TMDS_DCC_DAT
FUNC_TEST=TRUE
TMDS_DCC_CLK
FUNC_TEST=TRUE
I2C_SB_SCL
AUD_MIC_IN_N_CONN
FUNC_TEST=TRUE
AUD_MIC_IN_P_CONN
FUNC_TEST=TRUE
FW_VP
FUNC_TEST=TRUE
GND_AUDIO_MIC_CONN
FUNC_TEST=TRUE
I2C_HD_TEMP_SCL
FUNC_TEST=TRUE
I2C_HD_TEMP_SDA
FUNC_TEST=TRUE
FUNC_TEST=TRUE
PCI_AD<31..0>
FUNC_TEST=YES
PP5V_USB2_PORT1_F
PCI_PAR
FUNC_TEST=YES
USB_BT_P
FUNC_TEST=YES
USB2_PORT1_P_F
FUNC_TEST=YES
USB2_PORT3_P_F
FUNC_TEST=YES
USB2_PORT2_N_F
FUNC_TEST=YES
USB2_PORT2_P_F
FUNC_TEST=YES
USB2_PORT3_N_F
FUNC_TEST=YES
I2S1_RESET_L
FUNC_TEST=YES
I2S1_MCLK
FUNC_TEST=YES
I2S1_BITCLK
FUNC_TEST=YES
TP_NB_PM_SLEEP0
NO_TEST=YES
PCI_RESET_L
FUNC_TEST=YES
ROM_ONBOARD_CS_L
FUNC_TEST=YES
PCI_SLOTA_GNT_L
FUNC_TEST=YES
PCI_SLOTA_INT_L
FUNC_TEST=YES
PCI_IRDY_L
FUNC_TEST=YES
PCI_STOP_L
FUNC_TEST=YES
PCI_DEVSEL_L
FUNC_TEST=YES
FUNC_TEST=YES
PP5V_USB2_PORT3_F
ANALOG_BLU
FUNC_TEST=YES
NO_TEST=YES
PLS_CLK_66M_1_R
NO_TEST=YES
PLS_CLK_66M_0_R
EI_CPU1_SYNC
NO_TEST=YES
TP_PROC_TRIGGER_OUT
NO_TEST=YES
SYNCENABLE
NO_TEST=YES
RI_L
NO_TEST=YES
MCP_L
NO_TEST=YES
I2C_SMU_A_SDA_OUT_L
NO_TEST=YES
I2C_SMU_A_SCL_OUT_L
NO_TEST=YES
EI_SE
NO_TEST=YES
EI_QREQ_L
NO_TEST=YES
EI_QACK_L
NO_TEST=YES
EI_CPU1_CLK_P
NO_TEST=YES
EI_CPU1_CLK_N
NO_TEST=YES
CPU1_HTBEN
NO_TEST=YES
CPU_INT_L
NO_TEST=YES
CPU_HRESET_L
NO_TEST=YES
CHKSTOP_L
NO_TEST=YES
NO_TEST=TRUE
EI_NB_TO_CPU_SR_N<0..1>
NO_TEST=TRUE
EI_NB_TO_CPU_SR_P<0..1>
NO_TEST=YES
EI_NB_TO_CPU_CLK_P
EI_NB_TO_CPU_AD<0..43>
NO_TEST=TRUE
EI_NB_TO_CPU_CLK_N
NO_TEST=YES
EI_CPU_TO_NB_SR_P<0..1>
NO_TEST=TRUE
NO_TEST=TRUE
EI_CPU_TO_NB_SR_N<0..1>
EI_CPU_TO_NB_CLK_P
NO_TEST=YES
EI_CPU_TO_NB_CLK_N
NO_TEST=YES
NO_TEST=TRUE
EI_CPU_TO_NB_AD<0..43>
TP_J4000_SJRESET_L
NO_TEST=YES
TP_J4001_SJRESET_L
NO_TEST=YES
U2100_UNUSED
NO_TEST=YES
TP_RAM_MUXEN4
NO_TEST=YES
TP_RAM_CKE_R<3>
NO_TEST=YES
SMU_MANUAL_RESET_L
FUNC_TEST=YES
FUNC_TEST=YES
=PPVCORE_PWRON_SB =PP3V3_ALL_SMU
FUNC_TEST=TRUE
FUNC_TEST=YES
SYS_POWER_BUTTON_L
FUNC_TEST=YES
=PP5V_DISK
FUNC_TEST=YES
=PP12V_DISK
I2S1_DEV_TO_SB_DTI
FUNC_TEST=YES
I2S1_SB_TO_DEV_DTO
FUNC_TEST=YES
I2S1_SYNC
FUNC_TEST=YES
TP_RAM_CKE_R<2>
NO_TEST=YES
TP_RAM_CKE_R<6>
NO_TEST=YES
TP_RAM_CKE_R<7>
NO_TEST=YES
TP_RAM_CS_L_R<2>
NO_TEST=YES
TP_RAM_CS_L_R<3>
NO_TEST=YES
TP_RAM_CS_L_R<10>
NO_TEST=YES
TP_RAM_CS_L_R<11>
NO_TEST=YES
TP_AFN
NO_TEST=YES
TP_AGP_MB_AGP8X_DET_L
NO_TEST=YES
TP_ATTENTION
NO_TEST=YES
TP_DUMMY_A
NO_TEST=YES
TP_DUMMY_B
NO_TEST=YES
TP_FBBCS1_L
NO_TEST=YES
TP_NEC_AMC
NO_TEST=YES
TP_NEC_NANDTEST
NO_TEST=YES
TP_NEC_NTEST1
NO_TEST=YES
TP_NEC_SMC
NO_TEST=YES
TP_NEC_SMI_L
NO_TEST=YES
TP_NEC_SRCLK
NO_TEST=YES
TP_NEC_SRDATA
NO_TEST=YES
TP_NEC_SRMOD
NO_TEST=YES
TP_NEC_TEB
NO_TEST=YES
TP_NEC_TEST
NO_TEST=YES
TP_PLS_CLK_66M_0
NO_TEST=YES
TP_PLS_CLK_66M_1
NO_TEST=YES
TP_PLS_REF_CML
NO_TEST=YES
TP_PLS_TEST1
NO_TEST=YES
TP_PLS_TEST2
NO_TEST=YES
TP_PLS_TEST3
NO_TEST=YES
TP_PSRO1
NO_TEST=YES
TP_PSRO2
NO_TEST=YES
TP_PSYNCOUT
NO_TEST=YES
TP_RAM_MUXEN0
NO_TEST=YES
TP_SATA_CLK25M
NO_TEST=YES
TP_SB_FSTEST
NO_TEST=YES
TP_SB_NC_P7
NO_TEST=YES
TP_SB_NC_P8
NO_TEST=YES
TP_SB_NC_R3
NO_TEST=YES
TP_SB_NC_R4
NO_TEST=YES
TP_SB_NC_R5
NO_TEST=YES
TP_SB_NC_R6
NO_TEST=YES
TP_SB_NC_R7
NO_TEST=YES
TP_SB_NC_R8
NO_TEST=YES
TP_SB_NC_T1
NO_TEST=YES
TP_SB_NC_T2
NO_TEST=YES
TP_SB_NC_T3
NO_TEST=YES
TP_SB_NC_T4
NO_TEST=YES
TP_SB_NC_T5
NO_TEST=YES
TP_SB_NC_T6
NO_TEST=YES
TP_SB_NC_T7
NO_TEST=YES
TP_SB_NC_T8
NO_TEST=YES
TP_SB_NC_U1
NO_TEST=YES
TP_SB_NC_U2
NO_TEST=YES
TP_SB_NC_U3
NO_TEST=YES
TP_SB_NC_U4
NO_TEST=YES
TP_SB_NC_U5
NO_TEST=YES
TP_SB_NC_U6
NO_TEST=YES
TP_SB_NC_V1
NO_TEST=YES
TP_SB_NC_V2
NO_TEST=YES
TP_SB_NC_V3
NO_TEST=YES
TP_SB_NC_V4
NO_TEST=YES
TP_SB_NC_W1
NO_TEST=YES
TP_SB_NC_W3
NO_TEST=YES
TP_SB_NC_Y1
NO_TEST=YES
TP_SB_NC_Y3
NO_TEST=YES
TP_SB_PLLTEST
NO_TEST=YES
TP_USB2_PWREN<0>
NO_TEST=YES
TP_USB2_PWREN<1>
NO_TEST=YES
TP_USB2_PWREN<2>
NO_TEST=YES
TP_USB2_PWREN<3>
NO_TEST=YES
TP_USB2_PWREN<4>
NO_TEST=YES
TP_VREF_CG
NO_TEST=YES
UATA_DMACK_L
FUNC_TEST=YES
FUNC_TEST=YES
USB2_P<3>
FUNC_TEST=YES
USB2_N<3>
USB2_PORT1_N_F
FUNC_TEST=YES
ANALOG_GRN
FUNC_TEST=YES
CORE_ISNS_M
FUNC_TEST=YES
CORE_ISNS_P
FUNC_TEST=YES
FILT_ANALOG_BLU
FUNC_TEST=YES
FILT_ANALOG_GRN
FUNC_TEST=YES
FILT_ANALOG_RED
FUNC_TEST=YES
GND_17_INV
FUNC_TEST=YES
GND_20_INV
FUNC_TEST=YES
GND_CHASSIS_TMDS
FUNC_TEST=YES
INV_17_CUR_HI_F
FUNC_TEST=YES
INV_17_LCD_PWM_F
FUNC_TEST=YES
INV_20_CUR_HI_F
FUNC_TEST=YES
INV_20_LCD_PWM_
FUNC_TEST=YES
MODEM_RING2SYS_L
FUNC_TEST=YES
MON_DETECT
FUNC_TEST=YES
PCI_SLOTA_IDSEL
FUNC_TEST=YES
PP12V_INV
FUNC_TEST=YES
PP24V_INV
FUNC_TEST=YES
PP3V3_DDC
FUNC_TEST=YES
FUNC_TEST=YES
PP5V_USB2_PORT2_F
PPVCC_TMDS
FUNC_TEST=YES
ROM_CS_L
FUNC_TEST=YES
ROM_OE_L
FUNC_TEST=YES
TCKP
FUNC_TEST=YES
TD0M
FUNC_TEST=YES
TD0P
FUNC_TEST=YES
TD1M
FUNC_TEST=YES
TD1P
FUNC_TEST=YES
TD2M
FUNC_TEST=YES
TD2P
FUNC_TEST=YES
TDIODE_NEG_FMAX
FUNC_TEST=YES
TDIODE_POS_FMAX
FUNC_TEST=YES
FUNC_TEST=YES
I2C_TMDS_SDA
UATA_DSTROBE_R
FUNC_TEST=YES
UATA_INTRQ_R
FUNC_TEST=YES
UDASH_RESET_L
FUNC_TEST=YES
FUNC_TEST=YES
VCORE_SENSE_GND
FUNC_TEST=TRUE
CPU_VID_R<5..0>
AIRPORT_CLKRUN_L_PD
FUNC_TEST=YES
UDASH_SDOWN
FUNC_TEST=YES
TCKM
FUNC_TEST=YES
FUNC_TEST=YES
I2C_TMDS_SCL
PP5V_AGP_RL
FUNC_TEST=YES
KPVDD2_FMAX
FUNC_TEST=YES
KPGND2_FMAX
FUNC_TEST=YES
UATA_HSTROBE
FUNC_TEST=YES
FUNC_TEST=YES
SYS_SLEEP
VCORE_SENSE_VOUT
FUNC_TEST=YES
USB_BT_N
FUNC_TEST=YES
ROM_WE_L
FUNC_TEST=YES
FUNC_TEST=YES
SYS_POWERUP_L
RESET_BUTTON_L
FUNC_TEST=YES
PCI_TRDY_L
FUNC_TEST=YES
PCI_FRAME_L
FUNC_TEST=YES
=PP5V_RUN_CPU
FUNC_TEST=YES
PPVCORE_NB
FUNC_TEST=YES
PPVCORE_CPU
FUNC_TEST=YES
PP12V_CPU
FUNC_TEST=YES
30
30
30
30
30
18
18
29
29
29
29
30
29
29
29
29
29
29
29
29
29
29
29
27
29
29
29
29
14
14
28
28
28
27
27
25
29
14
28
28
28
28
28
28
28
28
28
28
24
27
27
14
14
14
14
14
13
13
14
14
14
14
14
14
14
14
8
14
14
14
14
14
14
14
14
14
14
40
40
21
8
8
8
8
8
8
8
8
8
29
48
29
24
24
52
77
77
77
77
77
77
77
77
77
77
27
27
27
27
27
27
29
29
29
8
27
25
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
25
92
92
92
92
92
48
Preliminary
Page 7
ALIAS
ALIAS
ALIAS
ALIAS
125
ALIAS
ALIAS
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
CHASSIS GND
ALL RAILS
ALWAYS ON WHEN UNIT HAS AC POWER (TRICKLE)
SDF700 IS USED FOR CPU HEATSINK MOUNTING
POWER CONN / ALIAS
SILKSCREEN:2
RUN RAILS
SMU RESET
SILKSCREEN:POWER
SILKSCREEN:1
PIN 13,19,11,22 ARE DIFFERENCE FROM ATX .
RESET
ALWAYS ON (TRICKLE)
ONLY ON IN RUN
RTC BATTERY
SILKSCREEN:RUN
805-5664
516S0248 FOXCONN
P/N 518-0159
POWER
GND RAILS
ON IN RUN AND SLEEP
PWRON RAILS
PP5V_RUN
PP3V3_PWRON
PP1V5_PWRON
PP2V5_PWRON
PP1V2_PWRON
PP24V_RUN
PP5V_ALL
PP5V_ALL
PP3V3_RUN
PP2V5_RUN
PP5V_PWRON
PP1V5_RUN
PP5V_RUN
PP3V3_RUN
PP5V_RUN
PP12V_RUN
SM
21
XW700
SM
21
XW701
315R138
1
ZH700
SM
21
XW702
SM
21
XW703
402
CERM
10V
20%
0.1UF
2
1
C704
20% 10V
402
CERM
0.1UF
2
1
C705
PP12V_RUN
SPST
SM
43
21
SW702
5%
1K
402
MF-LF
1/16W
21
R713
SPST
DEVELOPMENT
SM
43
21
SW701
5%
402
1K
1/16W MF-LF
DEVELOPMENT
21
R712
DEVELOPMENT
SPST
SM
43
21
SW700
315R138
1
ZH701
7R4.15
1
ZH702
6.00MM-PTH
1
ZH703
402
5%
1K
21
R702
SHLD-IO-CONN
Q45-TH1
4
32
1
SH700
SOD-123
B0530WXF
2 1
DS700
PP1V2_RUN
74LCX125
CRITICAL
3
14
17
2
U700
402
CERM
10V
20%
0.1UF
2
1
C700
SYS_PWR_BTN_FILT
FERR-EMI-100-OHM
SM
21
L700
SM
FERR-EMI-100-OHM
21
L701
DEVELOPMENT
GREEN
2.0X1.25A 2
1
LED701
2.0X1.25A
GREEN
2
1
LED702
PP3V3_PWRON
5%
MF-LF
330
603
1/10W
21
R700
GREEN
2.0X1.25A 2
1
LED700
F-RT-TH
HM96110-P2
CRITICAL
9
8
7
6
5
4
3
22
21
20
2
19
18
17
16
15
14
13
12
11
10
1
J700
SM
21
XW704
SM
21
XW705
SM
21
XW706
SM
21
XW707
HSK-NUT-6.5MM
TH
NOSTUFF
1
SDF700
PP12V_RUN
PP24V_RUN
CRITICAL
ST-SM3
PWR-BUTT
2
1
54
3
SW703
PP3V3_RUN
805
1/8W
5%
0
NOSTUFF
21
R720
315R138
1
ZH710
MF-LF
5%
1/10W
330
603
21
R710
10V CERM
20%
0.1UF
402
2
1
C703
1/10W
5%
MF-LF
DEVELOPMENT
330
603
21
R701
PP5V_ALL
CRITICAL
TH
BB10209-A5
1 2
J702
051-6772
102
7
04
VOLTAGE=3.3V
_PP5V_PWRON_USB
_PP3V3_PWRON_BT =PP3V3_PWRON_CPU
=PP5V_PATA
=PP3V3_PWRON_VESTA
SYS_POWERUP_L_BUF
=PP3V3_PWRON_EI
=PPPCI64_PWRON_SB
POWER_BUTTON_L
SMU_MANUAL_RESET_L
=PP1V5_PWRON_NB_AVDD
=PPVCORE_NB
=PPVCORE_PWRON_PULSAR
=PP1V2_ENETFW
PP1V2_VESTA
MIN_LINE_WIDTH=25MIL
MAKE_BASE=TRUE
PP1V2_ALL VOLTAGE=1.2V MIN_NECK_WIDTH=15MIL
PP5V_AUDIO
ITS_RUNNING
=PP5V_AGP
=PP5V_RUN_CPU
=PP3V3_AGP
=PP3V3_RUN_CPU
GND_SYS_PWR_BTN_FILT
RESET_BUTTON_L
SYS_POWER_BUTTON_L
ITS_PLUGGED_IN
POWER_GOOD
=PP1V2_PWRON_SB
=PP3V3_ALL_RTC
MAKE_BASE=TRUE
PP3V3_ALL_RTC
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
VOLTAGE=3.3V
=PP1V2_PWRON_HT =PP1V2_PWRON_DISK_SB
=PP3V3_SB_PCI
=PP2V5_PWRON_HT
=PP2V5_PWRON_RAM =PP2V5_HT
SYS_POWERUP_L
PP3V3_ALL_BATT
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
VOLTAGE=3.3V
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
VOLTAGE=3.3V
PP3V3_ALL_BATT_SAFETY
PP3V3_ALL
GND_AUDIO_SPKRAMP
ITS_ALIVE
=PP24V_GRAPHICS
PP12V_AUDIO_CODEC
PP12V_AUDIO_SPKRAMP
=PP12V_AGP =PP12V_RUN_CPU =PP12V_DISK
PP3V3_AUDIO
=PP3V3_PATA
=PP3V3_DISK
PP2V5_GPU
=PP2V5_RUN_CPU =PP2V5_RUN_RAM
=PPVCORE_PULSAR
=PPVCORE_CPU
MAKE_BASE=TRUE
PPVCORE_CPU
=PP3V3_PWRON_SB
=PPPCI32_PWRON_SB
GND_AUDIO
SYS_POWER_BUTTON_L
SYS_RESET_BUTTON_L
=PP5V_DISK
VOLTAGE=0
MIN_NECK_WIDTH=10MIL MIN_LINE_WIDTH=25MIL
GND_CHASSIS_17_INCH_INVERTER
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL VOLTAGE=0
GND_CHASSIS_20_INCH_INVERTER
=PP3V3_PWRON_USB
_PP3V3_PWRON_MODEM
=PP5V_PWRON_CPU =PP5V_PWRON_RAM
GND_CHASSIS_LED
GND_CHASSIS_RJ45
VOLTAGE=0
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=15MIL
=PP5V_ALL_CPU
MAKE_BASE=TRUE VOLTAGE=3.3V MIN_LINE_WIDTH=25MIL
PP3V3_ALL
MIN_NECK_WIDTH=10MIL
=PP3V3_ENETFW
=PP3V3_FW
=PP3V3_ENET
PP3V3_VESTA
=PP3V3_ALL_CPU
=PP3V3_ALL_SMU
=PPVCORE_PWRON_SB
GND_CHASSIS_AUDIO_EXTERNAL MIN_NECK_WIDTH=15MIL
MIN_LINE_WIDTH=25MIL
MAKE_BASE=TRUE VOLTAGE=0
GND_CHASSIS_USB
GND_CHASSIS_VGA
GND_CHASSIS_FIREWIRE
MIN_NECK_WIDTH=15MIL VOLTAGE=0
MIN_LINE_WIDTH=25MIL
GND_CHASSIS_TMDS
MAKE_BASE=TRUE
GND_CHASSIS_AUDIO_INTERNAL
=PP2V5_PWRON_SB
=PP2V5_ENET
PPVCORE_GPU
=PP1V2_PULSAR
=PP1V2_HT
=PP1V5_AGP
=PP1V2_EI_CPU =PP1V2_EI_NB
=PP3V3_PCI
MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
MAKE_BASE=TRUE
=PPVIO_PCI_USB2
MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
VOLTAGE=5V
MAKE_BASE=TRUE
PP5V_ALL
MIN_LINE_WIDTH=12MIL MAKE_BASE=TRUE
MIN_NECK_WIDTH=8MIL
PP3V3_RUN
MAKE_BASE=TRUE
VOLTAGE=24V
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
VOLTAGE=12V MIN_LINE_WIDTH=25MIL MAKE_BASE=TRUE
MIN_NECK_WIDTH=10MIL
VOLTAGE=1.2V MAKE_BASE=TRUE MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.25MM
MAKE_BASE=TRUE
VOLTAGE=1.5V MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
MIN_NECK_WIDTH=10MIL MAKE_BASE=TRUE
MIN_LINE_WIDTH=25MIL
VOLTAGE=5V
VOLTAGE=2.5V
MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
MAKE_BASE=TRUE
MIN_NECK_WIDTH=10MIL VOLTAGE=1.2V
MAKE_BASE=TRUE MIN_LINE_WIDTH=25MIL
MAKE_BASE=TRUE
MIN_NECK_WIDTH=10MIL
VOLTAGE=2.5V MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL MIN_LINE_WIDTH=25MIL
MAKE_BASE=TRUE VOLTAGE=1.5V
VOLTAGE=3.3V MIN_NECK_WIDTH=10MIL
MAKE_BASE=TRUE
MIN_LINE_WIDTH=25MIL
VOLTAGE=5V
PP5V_RUN
MIN_NECK_WIDTH=10MIL
VOLTAGE=0V
MIN_LINE_WIDTH=25MIL
50 59
35
34 58
33
31
77
22
60
31
56
46
13
102
55
36
35
88
30
76
18
18
48
8
50
13
40
11
59
101
54
32
34
74
13
59 13
23
74
51
50
29
28
75
11
11
8
37
89
59
6
49
7
37
64
10
11
102
59
83
100
52
45
31
33
25
7
83
11
90
87
8
6
102
59
25
50
60
49
18
18
74
11
10
10
92
76
36
83
12
28
23
6
6
28
22
26
86
12 10
101
50
3
48
33
6
6
8
25
13
62
80
74
62
26
60
6
7
100
59
102
100
50
33
6
95
83
83
50
31
44
26
29
6
23
23
102
6
13
6
59
59
91
94
36
46
21
87
36
7
89
89
86
12
36
6
3
101
92
59
90
6
101
23
87
22
26
24
48
14
14
25
77
6
6
6
Preliminary
Page 8
ALIAS ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
125
125
125
ALIAS
G
D
S
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
MC33465N_30ATR
RESETDELAY
VCC
GND
VOLTAGE DETECTOR
ALIAS ALIAS ALIAS ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
VESTA JTAG
PULL DOWN
SHASTA JTAG
THESE PINS HAVE INTERNAL PULLUPS
CONNECTION
SIGNAL FROM POWER SUPPLY
(SMU_BOOT_EPM)
CONNECTOR
SIGNAL ALIAS
518S0104
PLL LOCK LED
SMU ANALOG VREF
CHKSTOP LED
DIAG LED
2.2V FOR CPU VRM10.
CPU VID<0:5>
NOTE:PULL UP CPU_VID<5>TO
VID CONTROLLED BY SMU
SMU
PCI CLOCKS
DIFFERENTIAL_PAIR
NET_SPACING_TYPE
ELECTRICAL_CONSTRAINT_SET
PULSAR ERROR_L LEDBACKUP SMU RESET CIRCUIT
DOWNLOAD
518-0158
J802 & R826 CAN MOVE TO DEVELOPMENT BOM POST RAMP
POWER_GOOD IS A 5V DRIVEN
2K PULLUP INSIDE P/S
POWER_FAIL_L
SDF700 IS ALSO USED FOR HEATSINK MOUNTING
CPU HEATSINK SMT NUTS
1/16W
10K
MF-LF 402
5%
2
1
R825
DEVELOPMENT
402
5%
100
2 1
R826
5%
0
402
21
R802
10K
402
MF-LF
5% 1/16W
2
1
R803
NOSTUFF
10K
5% 1/16W MF-LF 402
2
1
R807
5%
402
1/16W
10K
MF-LF
2
1
R806
402
0
5%
NOSTUFF
21
R828
74LCX125
6
14
47
5
U700
74LCX125
8
14
10
7
9
U700
74LCX125
11
14
13
7
12
U700
402
5%
4.7K
2
1
R870
PP2V5_PWRON
402
5%
10K
2
1
R814
10K
5% MF-LF
402
2
1
R816
5% 1/16W MF-LF
10K
402
2
1
R817
402
10K
5%
2
1
R808
10K
402
5% 1/16W MF-LF
2
1
R809
NOSTUFF
5% 1/16W MF-LF
1K
402
2
1
R827
NOSTUFF
1K
5% MF-LF
402
2
1
R829
NOSTUFF
1K
5% MF-LF
402
2
1
R830
NOSTUFF
1K
5% 1/16W MF-LF 402
2
1
R831
PP3V3_RUN
5%
10K
402
2
1
R804
5%
20K
402
2
1
R811
TH
HSK-NUT-6.5MM
NOSTUFF
1
SDF800
NOSTUFF
TH
HSK-NUT-6.5MM
1
SDF801
NOSTUFF
TH
HSK-NUT-6.5MM
1
SDF803
NOSTUFF
TH
HSK-NUT-6.5MM
1
SDF802
SM
RED
DEVELOPMENT
2
1
D810
6P15R5P4
OMIT
1
ZH804
402
0.01UF
20% 16V CERM
2
1
C880
402
0.01UF
20% 16V CERM
2
1
C881
402
0.01UF
20% CERM
16V
2
1
C882
402
0.01UF
20% 16V CERM
2
1
C883
CERM
16V
20%
0.01UF
402
2
1
C884
402
5%
180
DEVELOPMENT
2
1
R833
RED
SM
DEVELOPMENT
2
1
LED801
2N7002
SOT23-LF
DEVELOPMENT
Q800_D
2
1
3
Q800
180
5%
DEVELOPMENT
2
1
R834
2N3904LF
DEVELOPMENT
Q801_B
2
3
1
Q801
SM
DEVELOPMENT
2N3906
2
3
1
Q802
402
DEVELOPMENT
5%
180
2
1
R835
180
402
DEVELOPMENT
5%
21
R836
GREEN
2.0X1.25A
DEVELOPMENT
2
1
LED802
180
5% 1/16W
DEVELOPMENT
2
1
R837
402
1K
5%
DEVELOPMENT
2
1
R838
2N3904LF
DEVELOPMENT
2
3
1
Q803
180
402
5%
DEVELOPMENT
21
R839
1K
NOSTUFF
5% 1/16W MF-LF 402
2
1
R832
I246
I247
RED
SM
2
1
LED850
2N3904LF
2
3
1
Q850
1K
402
5%
21
R851
PP5V_ALL
402
5%
180
2
1
R850
402
430
5% MF-LF
2
1
R813
5%
4.7K
2
1
R860
402
5% MF-LF
1K
NOSTUFF
1/16W
2
1
R890
402
6.3V
10%
1uF
CERM
NOSTUFF
2
1
C891
NOSTUFF
SM
2
1
3
5
U890
CERM
16V
10%
402
NOSTUFF
0.01UF
2
1
C890
0
5% 1/16W MF-LF
402
21
R810
0.1uF
10V
20%
CERM
402
NOSTUFF
2
1
C800
DEVELOPMENT
M-ST-TH
HC17051
9
87
65
43
2
10
1
J802
1/16W
10K
MF-LF 402
5%
2
1
R840
0
1/16W
402
MF-LF
5%
NOSTUFF
2
1
R805
PP3V3_ALL
F-ST-SM
DEVELOPMENT
U.FL-R_SMT
1
2
3
J800
PP3V3_ALL
1/16W
10K
MF-LF 402
5%
NOSTUFF
2
1
R812
NOSTUFF
SSOT-23
2.5V
3
12
VR801
1%
402
200
NOSTUFF
2
1
R818
805
CERM
10V
20%
2.2UF
NOSTUFF
2
1
C801
603
0.47UF
20% 10V CERM
NOSTUFF
2
1
C802
NOSTUFF
F-ST-SM
BM12B-SRSS-TB
9876543
2
121110
11314
J803
402
0
5%
21
R819
5%
0
402
21
R820
402
5%
0
21
R821
0
5% 1/16W MF-LF
402
21
R822
402
5%
0
21
R823
402
5% MF-LF
0
21
R824
402
5%
DEVELOPMENT
4.7K
2
1
R801
5% 1/16W
402
330
DEVELOPMENT
2
1
R800
PP3V3_RUN
04
8
102
051-6772
RAM_CS_L_R<3>
PPVREF_SMU MAKE_BASE=TRUE
SMU_BOOT_SCLK
SMU_BOOT_CNVSS
SMU_BOOT_TXD
CPU_VID_R<4>
CPU_VID_R<3>
CPU_VID_R<2>
SMU_BOOT_CE
SMU_MANUAL_RESET_L
J802_6
J802_2
SMU_BOOT_RXD
NB_SUSPEND_ACK_L
ALS1_OUT
SMU_MANUAL_RESET_L
=PP3V3_ALL_SMU
=PCI_ROM_RESET_L =PCI_USB2_RESET_L
CPU_VID_R<0>
10 MIL SPACING
SMU_RESET
SYS_WARM_RESET_L
SMU_RESET
SYS_COLD_RESET_L
10 MIL SPACING
CPU_VID_R<5>
FAN_PWM8
RAM_CKE_R<6>
TP_ALS1_OUT
MAKE_BASE=TRUE
TP_ALS0_OUT
MAKE_BASE=TRUE
PCI_RESET_L
MAKE_BASE=TRUE
SYS_SLOT_PWR
RAM_CKE_R<3>
NB_THMO
NB_THMI
MAKE_BASE=TRUE
TP_NB_THMI
MAKE_BASE=TRUE
TP_RAM_CKE_R<3>
MAKE_BASE=TRUE
TP_RAM_MUXEN4
RAM_MUXEN0
PCI_CLK_P4
RAM_CKE_R<7>
GPU_RESET_L
SMU_WARM_RESET_L
MAKE_BASE=TRUE
PCI_AIRPORT_RESET_L
MAKE_BASE=TRUE
PCI_CLK33M_AIRPORT
MAKE_BASE=TRUE
TP_RAM_CS_L_R<11>
RAM_CS_L_R<11>
MAKE_BASE=TRUE
TP_RAM_CS_L_R<10>
RAM_CS_L_R<10>
MAKE_BASE=TRUE
TP_RAM_CS_L_R<3>
MAKE_BASE=TRUE
TP_RAM_CS_L_R<2>
RAM_CS_L_R<2>
TP_RAM_MUXEN0
MAKE_BASE=TRUE
RAM_MUXEN4
TP_RAM_CKE_R<7>
MAKE_BASE=TRUE
MAKE_BASE=TRUE
TP_RAM_CKE_R<6>
TP_RAM_CKE_R<2>
MAKE_BASE=TRUE
RAM_CKE_R<2>
MAKE_BASE=TRUE
TP_THMO
NB_WARM_RESET_L
MAKE_BASE=TRUE
TP_FAN_PWM8
TP_SYS_DRIVE_BAY_INT_L
MAKE_BASE=TRUE
SYS_DRIVE_BAY_INT_L
TP_SYS_DOOR_AJAR_L
MAKE_BASE=TRUE
SYS_DOOR_AJAR_L
MAKE_BASE=TRUE
TP_SYS_SLOT_PWR
MAKE_BASE=TRUE
TP_SMU_PWRSEQ_P1_3
SMU_PWRSEQ_P1_3
TP_SMU_ONEWIRE
MAKE_BASE=TRUE
SMU_ONEWIRE
MAKE_BASE=TRUE
TP_ALS_GAIN_BOOST
ALS_GAIN_BOOST
ALS0_OUT
MAKE_BASE=TRUE
TP_PCI_CLK_P4
MAKE_BASE=TRUE
PCI_CLK33M_SB_EXT
PCI_CLK_P1
MAKE_BASE=TRUE
TP_PCI_CLK_GP1
PCI_CLK_GP1
_PCI_CLK33M_AIRPORT
PCI_CLK_P3
=PCI_CLK33M_USB2
PCI_CLK_GP0
MAKE_BASE=TRUE
PCI_CLK33M_USB2
CPU_VID<4>
CPU_VID<2>
CPU_VID<0>
CPU_VID<5>
CPU_VID<3>
CPU_VID<1>
MAKE_BASE=TRUE
DIAG_LED
DIAG_LED_R
CPU_VID_R<1>
LED850P2
LED850P1
=PP5V_RUN_CPU
NB_SUSPENDACK_L
SYS_SLEEP
SMU_WARM_RESET_L SYS_WARM_RESET_L
=PPVREF_SMU
PP3V3_ALL_SMU_AVCC
Q802_E
HS_SDF803
HS_SDF800 HS_SDF801 HS_SDF802
GND_SMU_AVSS
Q803_B
Q803_C
LED802_1
Q800_G
LED801_1
NB_PMR_OBSV
GND_SMU_AVSS_DAGND
PPVREF_SMU_ADC_REF
SMU_SLEEP
SMU_BOOT_BUSY
Q802_B
PLLLOCK
HS_SDF804
=PP5V_RUN_CPU
POWER_GOOD
SYS_POWERFAIL_L
CHKSTOP_L
MAKE_BASE=TRUE
TP_JTAG_SB_TCK
MAKE_BASE=TRUE
TP_JTAG_SB_TMS
MAKE_BASE=TRUE
TP_JTAG_SB_TDO
MAKE_BASE=TRUE
TP_JTAG_SB_TDI
JTAG_SB_TCK
JTAG_SB_TMS
JTAG_SB_TDO
JTAG_SB_TDI
JTAG_SB_TRST_L
TP_JTAG_VESTA_TDI
MAKE_BASE=TRUE
TP_JTAG_VESTA_TMS
MAKE_BASE=TRUE
TP_JTAG_VESTA_TCK
MAKE_BASE=TRUE
=JTAG_VESTA_TDI
TP_JTAG_VESTA_TDO
MAKE_BASE=TRUE
SMU_RESET_L
=JTAG_VESTA_TMS
=JTAG_VESTA_TDO
=JTAG_VESTA_TCK
ERROR_LED
CLOCK_ERROR_L
=JTAG_VESTA_TRST_L
MAKE_BASE=TRUE
JTAG_VESTA_TRST_L
46
31
22
31
77
8
11
77
8
8
8
13
74
74
7
10
74
36
7
29
33
33
33
7
7
7
33
25
24
33
56
13
74
33
6
9
13 25
33
6
13
14
13
37
13
13 13
6
6
6
13
6
13
24
13
6
6
75
77
6
8
13
6
13
37
6
13
37
24
24
6
6
37
27 37
49
8
76
6
6
37
6
37
6
6
37
6
37
6
6
6
37
24
13
13
13
13
13
13
27 27
27
76
27
77
27
13
13
13
13
13
13
13
6
3
13
6
8 8
13
13
13
24
36
36
13
13
29
3
7
6
6
25
25
25
25
25
12
6
12
12
12
27
12
Preliminary
Page 9
FB
LD
HD
GND
COMP
SS
VCC
VC
G
D
S
G
D
S
G
D
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
2.5V VREG
U900_FEEDBACK
2.5V VOLTAGE REGULATOR
IRU3037CS VREF=1.25VDC VOUT=VREF*(R903+R905)/R905=2.588VDC
SET OUTPUT=2.588V FOR FRAMEBUFFER.
NOTE:
PEAK CURRENT OF TOTAL RAILS
9.24A WITHOUT DIMM TERMINATION
12.68A WITH DIMM TERMINATION
HIGH TO ENABLE
805
1/8W
5%
0
21
R902
1% MF-LF
402
10K
2
1
R905
5%
NOSTUFF
1/4W
1.1K
2
1
R904
20%
6.3V ELEC TH-KZJ
1800UF
2
1
C908
CERM
10UF
6.3V
20%
1206
2
1
C901
TH-KZJ
20% ELEC
6.3V
1800UF
2
1
C909
PP5V_PWRON
805
CERM
1UF
20% 25V
2
1
C904
PP5V_PWRON
SOD-123
MBR0520LXXG
2 1
D900
SOD-123
MBR0520LXXG
2 1
D901
MBR0520LXXG
SOD-123
2
1
D902
603
CERM
10V
20%
1UF
2
1
C917
603
5%
2200PF
50V CERM
2
1
C905
805
CERM
25V
20%
1UF
2
1
C916
PP2V5_PWRON
PP2V5_RUN
220PF
25V
5% CERM
402
2
1
C906
1.6UH
CRITICAL
TH
21
L901
IRU3037CS
SOI
2 6
8
3
5
4
1
7
U900
10.7K
1%
402
2
1
R903
603
CERM
0.47UF
20%
10V
2
1
C915
27.4K
1%
402
2
1
R901
56PF
50V CERM 402
5%
2
1
C913
3300PF
603
10% CERM
50V
NOSTUFF
2
1
C907
603
3900PF
5% CERM
50V
2
1
C914
4.7
805
1/8W MF-LF
5%
2
1
R900
402
240
DEVELOPMENT
5%
2
1
R950
GREEN
DEVELOPMENT
2.0X1.25A
2
1
LED900
SO-8
IRF7413
321
4
8765
Q903
PP12V_RUN
2N7002
SOT23-LF
2
1
3
Q940
5% 1/16W
470K
2
1
R940
NOSTUFF
1UF
20% CERM
25V 1206
2
1
C912
NTD60N02R
CASE369
3
1
4
Q901
NTD60N02R
CASE369
3
1
4
Q902
20%
6.3V ELEC TH-KZJ
1800UF
2
1
C902
1800UF
TH-KZJ
ELEC
6.3V
20%
2
1
C903
1800UF
TH-KZJ
ELEC
6.3V
20%
2
1
C910
1206
20%
6.3V
10UF
CERM
2
1
C911
0.001UF
20% 50V CERM 402
NOSTUFF
2
1
C940
051-6772
04
9
102
Q903_GATE
U900_VC
U900_VC_R
U900_FEEDBACK
Q901_GATE
U900_GATE_L
Q902_DRAIN
MIN_NECK_WIDTH=10MIL MIN_LINE_WIDTH=25MIL
SYS_SLEEP
U900_SS
LED_PP2V5_RUN
R901_P2
U900_VC_D
R904_P2
U900_COMP
U900_GATE_H
MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
VOLTAGE=2.5V
46 22 11 10
8 6 6
Preliminary
Page 10
FB
LD
HD
GND
COMP
SS
VCC
VC
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
LM339A
V+
GND
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
PLACE LED1000 NEAR VREG
PP1V2_ALL VOLTAGE REGULATOR
PP1V2_RUN FET SWITCH
PEAK CURRENT ??A
RDSON=?? OHM @ VGS=?? V
PEAK CURRENT ??A
RDSON=0.06 OHM @ VGS=2.5 V
PP1V2_PWRON FET SWITCH
U1000_FEEDBACK
SET OUTPUT=1.2V IRU3037ACS VREF=0.8VDC
<-- NEED TO VERIFY
NOTE:
~3A
VOUT=VREF*(R1003+R1005)/R1005=1.206VDC PEAK CURRENT OF TOTAL RAILS
1.2V VREG
1.6UH
TH
21
L1001
50V 603
CERM
3300PF
10%
NOSTUFF
2
1
C1007
1% MF-LF
402
10K
2
1
R1005
1206
NOSTUFF
1.1K
1/4W
5%
2
1
R1004
1UF
20% CERM
25V 1206
NOSTUFF
2
1
C1012
MBR0520LXXG
SOD-123
2
1
D1002
PP5V_ALL
CERM
10V 603
20%
1UF
2
1
C1017
0.022UF
603
CERM
NOSTUFF
10% 50V
2
1
C1005
SOD-123
MBR0520LXXG
2 1
D1000
SOD-123
MBR0520LXXG
2 1
D1001
0
5%
1/8W
805
21
R1000
805
CERM
20%
1UF
25V
2
1
C1000
25V
5% CERM
402
220PF
2
1
C1006
20% 25V
805
CERM
1UF
2
1
C1004
IRU3037ACS
SOI
2 6
8
3
5
4
1
7
U1000
TH-KZJ
1800UF
6.3V ELEC
20%
2
1
C1009
5.11K
402
1% 1/16W
2
1
R1003
PP1V2_RUN
2N7002DW
SOT-363
4
5
3
Q1004
SOT-363
2N7002DW
1
2
6
Q1004
PP5V_ALL
402
100K
5%
2 1
R1008
PP5V_ALL
SI3446DV
TSOP
4
3 6
521
Q1006
PP1V2_PWRON
2N7002
SOT23-LF
2
1
3
Q1005
5%
402
100K
2 1
R1009
PP5V_ALL
5% CERM
603
50V
3900PF
2
1
C1014
5%
603
50V CERM
68PF
2
1
C1013
0.1UF
20% CERM
16V 603
2
1
C1015
27.4K
1%
402
2
1
R1001
5%
0
402
21
R1012
0
5%
MF
NOSTUFF
21
R1013
PP3V3_ALL
402
5%
100K
2
1
R1014
1/8W
5%
4.7
805
2
1
R1002
NTD60N02R
CASE369
3
1
4
Q1001
CASE369
NTD60N02R
3
1
4
Q1002
1206
6.3V
20%
10UF
CERM
2
1
C1002
1206
6.3V
20%
10UF
CERM
2
1
C1003
SI3446DV
TSOP
4
3 6
5
2
1
Q1003
CERM
6.3V
20%
1206
10UF
2
1
C1001
DEVELOPMENT
SOI
3
2
5
4
12
U1001
5% 1/16W MF-LF
DEVELOPMENT
330
402
2
1
R1050
GREEN
2.0X1.25A
DEVELOPMENT
2
1
LED1000
402
100K
5% 1/16W MF-LF
DEVELOPMENT
2
1
R1051
DEVELOPMENT
402
47K
5% 1/16W MF-LF
2
1
R1052
5%
0
402
DEVELOPMENT
21
R1053
CERM
10V
20%
0.1UF
402
DEVELOPMENT
2
1
C1050
051-6772
04
10
102
U1000_GATE_H
PP1V2_ALL VOLTAGE=1.2V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=15MIL
Q1002_DRAIN
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
U1000_VC_R
U1000_FEEDBACK
PP1V2_ALL
U1000_COMP
TURN_ON_PP1V2_PWRON_L
U1000_VC_D
R1004_P2
Q1001_GATE
U1000_VC
U1000_SS
R1001_P2
Q1006_G
SYS_POWERUP_L
PP1V2_ALL
SYS_SLEEP
Q1005_G
Q1003_G
U1000_GATE_L
PP1V2_RUN_FOR_LED
1V1_REF
PP3V3_RUN
PP5V_RUN
LED_PP1V2_RUN_N
LED_PP1V2_RUN_P
PP3V3_RUN
50
50
34
34
46
22
22
33
22
18
18
13
11
11
18
11
11
9
50
10
11
10
10
10
7
10
8
34
7
7
7
7
7
3
6
7
6
22
6
6
6
Preliminary
Page 11
D
G
S
LM339A
V+
GND
LM339A
V+
GND
TAB
VOUTVPWR
VCTRL
VOUT
ADJ
SENSE
D
G
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
FET ON IN RUN
5V & 3.3V VREGS
FET ON IN RUN
PP5V_PWRON
Vpwr >= Vout+0.35V
Vctrl >= Vout+1.25V
R2
R1
Iadj=50uA typ
3.30V - 3.45V
Vref=1.250V typ
Vout=Vref(1+R2/R1)+Iadj(R2)
PROCESS SWING
SHUTDOWN -> FLOAT
SLEEP -> FLOAT
RUN -> LOW
FET ON IN SLEEP
FET ON IN SLEEP
SHUTDOWN -> FLOAT
SLEEP -> LOW
RUN -> FLOAT
20% 10V ELEC
100UF
SM
2
1
C1100
SI4467DY
SM-1
CRITICAL
3 2 1
4
8 7 6 5
Q1100
402
5%
100K
21
R1100
SOI
CRITICAL
3
13
11
10
12
U1100
SOI
3
2
5
4
12
U1100
603
1%
47.0K
2
1
R1102
CS5253
SM
CRITICAL
5
6
3
4
1
2
VR1100
100K
5%
402
21
R1103
100K
5%
402
21
R1104
603
1%
124
2
1
R1105
603
1%
210
2
1
R1106
603
CERM
16V
N20P80%
0.1UF
2
1
C1101
SM-1
SI4467DY
3 2 1
4
8 7 6 5
Q1102
20% ELEC
10V
47UF
SM
2
1
C1102
1%
1K
402
2
1
R1107
402
1K
1% 1/16W MF-LF
2
1
R1101
SI3443DV
TSOP
CRITICAL
4
3 6
5
2
1
Q1103
CRITICAL
TSOP
SI3443DV
4
3 6
5
2
1
Q1101
051-6772
04
11
102
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
VOLTAGE=5V
PP5V_PWRON
RAIL_SLEEP_FET MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=10MIL
PP5V_ALL
PP3V3_PWRON
VOLTAGE=3.3V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
PP3V3_ALL
VOLTAGE=3.3V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
PP5V_ALL
RAIL_RUN_FET MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=10MIL
SYS_SLEEP
SYS_POWERUP_L
PP5V_RUN
MIN_NECK_WIDTH=10MIL
3_3V_ALL_ADJ MIN_LINE_WIDTH=20MIL
PP3V3_RUN
PP3V3_ALL
RAIL_CTL_POS
RAIL_CTL_NEG
50
46
34
22
33
22
58
10
13
18
18
11
27
59
11
9
10
10
10
59
18
7
18
11
7
8
7
7
7
11
6
6
6
7
6
6
6
6
6
7
3
Preliminary
Page 12
G
D
S
VESTA MISC
1 OF 3
PVDDDVDD
AVDDL
AVDD
GND
AGND
OVDD
REGSUP1 REGSEN1 REGCTL1
REGSUP2 REGSEN2 REGCTL2
2.5V_EN
NC
DNC
DNC
DNC
NC
TDO TCK TMS TRST*
TDI
RESET*
GND
VOUT
VIN
NOISE
CONT
ALIAS
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
Ethernet LowPwr
ETHERNET PORTION IN LOW POWER MODE WHEN NOT IN RUN MODE.
Vout = 2.5V @ 150 mA
2.5V LDO
Page Notes
Power aliases required by this page:
NC
BOM options provided by this page:
Controls operating mode of Vesta 1.2V
regulator will be in continuous mode.
N9/N10
Signal aliases required by this page:
- VESTA1V2_BURST / VESTA1V2_PULSE
regulator. If both options are off the
NC
N5/N6
Schmitt trigger
L6/M6
(NONE)
L9/M9
Vesta Core / Misc
Reset RC values per
To keep Vesta from being held
Broadcom recommendation
in reset when system is off
R1252 to enable wirespeed feature
NOTE: Reset GPIO is active HIGH
20% 10V CERM 402
0.1uF
2
1
C1210
0.1uF
402
CERM
10V
20%
2
1
C1211
402
CERM
10V
20%
0.1uF
2
1
C1212
20% 10V CERM 402
0.1uF
2
1
C1213
0.1uF
CERM 402
10V
20%
2
1
C1203
0.1uF
402
CERM
10V
20%
2
1
C1202
0.1uF
402
CERM
20% 10V
2
1
C1201
20% 10V CERM 402
0.1uF
2
1
C1200
20% 10V
CERM
402
0.1uF
2
1
C1222
10V
20%
CERM
402
0.1uF
2
1
C1225
20% 10V
CERM
402
0.1uF
2
1
C1221
0.1uF
20% 10V
CERM
402
2
1
C1224
0.1uF
402
CERM
10V
20%
2
1
C1231
20% 10V
CERM
402
0.1uF
2
1
C1230
20% 10V
CERM
402
0.1uF
2
1
C1220
0.1uF
20% 10V
CERM
402
2
1
C1223
0.1uF
402
CERM
10V
20%
2
1
C1243
20% 10V
CERM
402
0.1uF
2
1
C1242
10V
0.1uF
402
CERM
20%
2
1
C1241
0.1uF
402
CERM
10V
20%
2
1
C1240
603
20%
1uF
10V CERM
2
1
C1250
SOT23-LF
2N7002
2
1
3
Q1250
OMIT
BCM5462
FBGA-200
D8
E8
E10
D7
E7
H4
E2
E1
F2
F1
G4
G5
N4
A15
K1
F15
A7
A1
M13
C3
K2
J2
F14
C14
B7B2A2
J1
C15
B15
B1
E9
C9
B9
N10
N9N6N5M9M6L9L6
R12
R3
P11
P10
P5
P4
N8N7M8
M7L8L7
J12
J11
P9P8P7
P6
H12
H11
M3
U8600
402
5%
82K
2
1
R1251
10% X5R
10UF
6.3V 805
2
1
C1208
FERR-EMI-600-OHM
SM
21
L1200
16V
CERM
402
0.01uF
20%
2
1
C1281
402
6.3V
10%
1uF
CERM
2
1
C1280
6.3V X5R 805
10UF
10%
2
1
C1282
MM1572FN
SOT-25A
CRITICAL
5
1
4
2
3
U1280
402
4.7K
5% 1/16W MF-LF
2
1
R1252
100K
5%
2
1
R1262
5% MF-LF
2.0K
402
2
1
R1260
402
6.3V
10%
1uF
CERM
2
1
C1260
2N3904LF
2
3
1
Q1260
5%
1K
402
2
1
R1261
CERM
10V
20%
0.1UF
402
NOSTUFF
2
1
C1261
10212
04
051-6772
=JTAG_VESTA_TRST_L
PP3V3_VESTA
TP_VESTA_DNC_B9
ENETFW_RESET
VESTA_RESET_L
PP3V3_VESTA
PP3V3_VESTA
PP2V5_VESTA
TP_VESTA_REGSEN2
TP_VESTA_REGSUP2
TP_VESTA_REGSEN1
TP_VESTA_REGSUP1
TP_VESTA_REGCTL1
TP_VESTA_2_5V_EN
TP_VESTA_DNC_E9
PP1V2_VESTA_AVDDL
MIN_LINE_WIDTH=0.5 mm
VOLTAGE=1.2V MIN_NECK_WIDTH=0.25 mm
=JTAG_VESTA_TMS
=JTAG_VESTA_TCK
=JTAG_VESTA_TDO
TP_VESTA_REGCTL2
=JTAG_VESTA_TDI
PP1V2_VESTA
TP_VESTA_DNC_C9
MAKE_BASE=TRUE
VOLTAGE=2.5V
PP2V5_VESTA
MIN_NECK_WIDTH=0.25 mm
MIN_LINE_WIDTH=0.5 mm
PP3V3_VESTA
=PP2V5_ENETFW
MIN_LINE_WIDTH=0.2 mm MIN_NECK_WIDTH=0.2 mm
VESTA2V5_NOISE
PP3V3_VESTA
=PP3V3_PWRON_VESTA
VESTA_ENET_LOWPWR
VESTA_ENET_HIGHPWR
12
12
12
12 89
12
8
7
25
7
7
12
8
8
8
8
7
12
7
86
7
7
86
Preliminary
Page 13
P9[7]
P9[6]
P9[5]
P8[7]
P8[6]
P8[5]
P3[7]
P3[6]
P3[5]
P3[4]
P2[6] P2[7]
P2[4] P2[5]
P1[4]
P1[3]
P1[2]
P1[1]
P1[0]
P0[4]
P0[0]
P0[2] P0[3]
P0[1]
P0[7]
P0[6]
P0[5]
P3[3]
P3[2]
P3[1]
P3[0]
P2[3]
P2[2]
P2[1]
P2[0]
P1[5] P1[6] P1[7]
PCNVSS RESET* XOUT
VREF
XIN
P7[7]
P7[6]
P7[5]
P7[4]
P7[3]
P7[2]
P7[1]
P7[0]
P6[7]
P6[6]
P6[5]
P6[4]
P6[3]
P6[2]
P6[1]
P6[0]
P10[0] P10[1]
P9[3]
P9[2]
P9[1]
P9[0]
P8[4]
P8[3]
P8[2]
P8[1]
P8[0]
P10[6] P10[7]
P10[2] P10[3] P10[4] P10[5]
VCC
AVSS
VSS
AVCC
SQW/ OUT
VBAT
SDA SCL
X1 X2
GND
VCC
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
MASTER: SEEDY
System Management Unit
3.6
2.7
100K/10uF RC filter at SMU pins.
SMU_VREF should be same signal or
circuit, but be aware that this will
7.6
1.5
1.6
1.7
0.6
0.5
Port
0.4
Portable
Alternate Functions
2.6
Port
2.5
Consumer
Port
6.1
6.2
6.0
7.2
7.4
Tower & Server
Y
Y
IOC2 IOC3
SS
Y
Y
Y
Y
Y
Y
Y
Y
IOC5
INT3*
AN22
YYY
YYY
Y
Y
Y
Y
YYY
YYY
Y
Y
N
N
N
(see aliases below)
SS
Y
Y
Y
Y
Y
SYYS
Y Y
Y
Y
Y Y
Y
Y
S
YYYS S
AN26
Y
Y
Y Y Y
Y
YY
Y
Y
Y
Y
Y
S
INT0*
S
Y
Y
Y Y
Y YYYY
Y
S
Y
Y
Y Y
YYNNSS
Y Y
Y
Y
Y
Y
Y
Y Y
Y
Y
Y
YYYY
Y
Y
Y Y
Y
Y
Entry Desktop
Entry Desktop
Desktop
S
Y
Y
Y
Y
Y
Y
Y
Y
S
Y
Y
Y Y
Y Y
Y Y
Y
Y Y
Y
Y
Y N Y
Y
Y Y
Y
Y
Y Y Y Y
Y
Y Y Y
Portable
Y
Y
Y
Y Y
Y
Y
Y
Y
Y
S
Y
Y
Y
S
Y
Y
Y
S
Y
Y
Y
Y
Y
S
Y
S
Y
Y S
Y
Y
Y
Y
Y
S
Y
Y
Y
Y
Y
Y
S
Y
Y Y
Y
Y Y
Y
Y
N
Y
Y
S
S
Y
Y Y
S S Y
Y
N
S S
N
N
N
Consumer
N
N
N
Server
S
Y Y Y Y
Y Y Y
Y
S
Y
Y
Y
Y
S
Y
Y
Y
Y
Y
Y
Y YYY
Y
Y Y
Y
Y
Y
Y
Y Y Y
Y
S
NSS
Y
Y
Y
Y
Y
Y
Y
Y YSY
Y
Y Y Y
Y
Y Y
S
N Y
Y
Y YYYY
S S
SS
S S
Consumer
Y S S
Y
S
Y Y
Y Y Y
N N
Y Y
Y
Y
Y
Y
Y
Y
Y
Y
S
Y
Y
N
N
Y
Y
Y
Y Y
Y
Portable
DesktopYServer
SMU Pull-ups / pull-down
NET_SPACING_TYPE
System Management Unit
DIFFERENTIAL_PAIR
TA1out
S
S
NOTE: Some primary and alternate functions
AC adapter ID.
affect other analog inputs such as
those capacitors are provided on
Caps should connect to GND_SMU_AVSS.
(CPU_SENSE_I/CPU_SENSE_V) requires
TA3out
TA4in
IOC6
Power aliases required by this page:
review the latest SMU specification to ensure missing pull-ups are
TB2in
this page.
SCL
Y
IOC4
Y Y
KI2*
KI0*
AN3
AN2
AN1
Sout3
Y Y
Y Y
Y Y
Y
Y
SCLmm
AN25
INT1*
NMI*
TB1in
AN24
TA1in
TA4out
SDA
AN05
AN07
RXD1
CLK0 RXD0
RTS1*
CLK1
TXD1
RTS0*/
reuire pull-ups that are not. provided on this page. Please.
NC
Real Time Clock
NOTE: CPU current/voltage monitoring
BOM options provided by this page:
ELECTRICAL_CONSTRAINT_SET
- _PP3V3_ALL_SMU
- _PP3V3_ALL_RTC
- _PP3V3_PWRON_SMU
(NONE)
(NONE)
reference used by monitoring
provided on another page.
Sin3
TB0in
(BUSY)
AN0
TA3in
AN21
AN23
AN27
Y
CE*
INT2*
AN04
TA2in
IOC7
CTS0*
AN06
AN20
Y
INT4* INT5*
SDAmm
Y Y S S
Keep crystal subcircuit close to SMU.
S
KI3*
TXD0
AN01
AN03
AN02
AN00
TA2out
CLK3
N = Alternate function
Y = Primary function
S = Spare
Page Notes
- _PPVREF_SMU (SMU AVCC or 2.5V reference) Signal aliases required by this page:
signal (GND_SMU_AVSS). None of
a 100pF capacitor to the SMU AVSS
NOTE: All analog inputs to SMU should have
NOTE: Pinout matches SMU pinout v1.51.
KI1*
Y
CRITICAL
10.000M
11.4X4.7X4.2-SM
21
Y1300
OMIT
M30280F8
QFP-80
10 12
11
77
13
9
79
80
1
2
3
4
5
7
8
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
40
41
42
43
32
33
34
35
36
37
38
39
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
68
69
70
71
72
73
74
76
59
60
61
62
63
64
65
66
67
6
75
78
U1300
DS1338U-33
MSOP
2
1
8
3
7
5
6
4
U1301
PP3V3_PWRON
PP3V3_RUN
PP2V5_PWRON
0
NO_SMU_I2C_D
402
5%
21
R1399
MMBD914XXG
3
1
D1310
402
6.3V
10% CERM
1uF
2
1
C1325
402
5%
10K
2
1
R1325
5% 1/16W MF-LF 402
150K
2
1
R1322
CERM
6.3V 402
0.22uF
20%
2
1
C1310
50V
5%
402
CERM
18pF
2
1
C1304
50V
5%
CERM
18pF
402
2
1
C1305
0
5%
402
2
1
R1317
NO STUFF
402
5%
10M
21
R1316
10K
5% MF-LF
2
1
R1327
402
5%
2.0K
21
R1312
5% 1/16W MF-LF
402
2.0K
NO STUFF
21
R1311
402
5%
100K
21
R1313
100K
5% 1/16W MF-LF
402
21
R1310
402
5%
10K
21
R1302
10K
402
5%
21
R1300
5% 1/16W MF-LF
10K
402
12
R1304
402
0.1uF
CERM
20% 10V
2
1
C1309
402
CERM
0.1uF
20% 10V
2
1
C1308
CERM
0.1uF
20% 10V
402
2
1
C1302
402
CERM
0.1uF
20% 10V
2
1
C1301
805
CERM
20%
10uF
6.3V 2
1
C1300
6.3V
10%
1uF
CERM 402
2
1
C1303
4.7
5% 1/16W MF-LF
402
21
R1315
SM
21
XW1300
CRITICAL
SM-1
32.768K
4
1
Y1301
402
5%
10K
21
R1303
04
13 102
051-6772
SYS_SLOT_PWR
TP_SMU_SPARE_P10_0
SYS_RESET_BUTTON_L
SB_SUSPENDACK_L
NB_SUSPENDACK_L
SMU_WARM_RESET_L
SMU_PWRSEQ_P9_6
SB_STOPXTALS_L
I2C_SMU_CPU_SDA_OUT_L
FAN_PWM8
I2C_SMU_B_SCL
SMU_PWRSEQ_P9_5
SYS_COLD_RESET_L
SYS_POWER_BUTTON_L
SMU_SUSPENDREQ_L
SB_TO_SMU_INT_L
CLOCK_RESET_L
SMU_SLEEP
SYS_SLEWING_L
I2C_SMU_CPU_SCL_OUT_L
CPU_HRESET
FAN_RPM1
SYS_LED
FAN_RPM2
SYS_PME_L SMU_QREQ
I2C_SMU_CPU_SCL_IN
FAN_RPM0
I2C_SMU_B_SDA
SMU_BOOT_TXD
SMU_BOOT_RXD
MAKE_BASE=TRUE
SYS_POWERUP_L
CPU_VID<5>
RTC_CLK32K_X2
RTC_CLK32K_X1
=PP3V3_ALL_RTC =PP3V3_ALL_SMU
GND_SMU_AVSS
MIN_NECK_WIDTH=10 mil
MIN_LINE_WIDTH=15 mil
VOLTAGE=0V
PP3V3_ALL_SMU_AVCC
MIN_NECK_WIDTH=10 mil
MIN_LINE_WIDTH=15 mil
VOLTAGE=3.3V
=PP3V3_ALL_SMU
GND_SMU_AVSS
SYS_POWER_BUTTON_L
SMU_RESET_L
=PP3V3_ALL_SMU
SMU_BOOT_CNVSS
SYS_POWERFAIL_L
FAN_TACH1
15 MIL SPACING
SMU_CLK10M_XOUT
RTC_CLK32K_X1
RTC_CLK32K_XTAL
15 MIL SPACING
I2C_RTC_SCL
I2C_RTC_SDA
15 MIL SPACING
RTC_CLK32K_X2
SMU_CLK10M_XIN
SMU_CLK10M_XTAL
15 MIL SPACING
I2C_SMU_A_SCL_OUT_L
I2C_SMU_A_SCL_IN
I2C_SMU_D_SCL
SMU_PWRSEQ_P1_2
FAN_RPM4
CPU_BYPASS
SMU_PWRSEQ_P1_1
SMU_PWRSEQ_P1_0
SYS_DRIVE_BAY_INT_L
CPU_SENSE_V
CPU_SENSE_I
I2C_SMU_D_SDA
FAN_RPM5 SMU_ONEWIRE
SMU_PWRSEQ_P1_4
SMU_PWRSEQ_P1_3
I2C_SMU_E_SDA I2C_SMU_E_SCL FAN_TACH0
SYS_DOOR_AJAR_L
FAN_TACH2 FAN_TACH3
FAN_TACH5
SMU_TO_SB_INT_L
CPU_TEMP
SMU_CLK10M_XOUT_R
15 MIL SPACING
FAN_RPM3
FAN_TACH4
I2C_SMU_A_SDA_OUT_L
I2C_SMU_A_SDA_IN
FAN_TACH6
CPU_VID<0>
FAN_TACH8
CPU_VID<2>
FAN_TACH7
CPU_VID<1>
FAN_PWM7
I2C_SMU_CPU_SCL_IN
FAN_PWM6
I2C_SMU_CPU_SDA_IN
SYS_LED_RED
FAN_TACH3
SYS_LED_GREEN
FAN_TACH4
ALS0_OUTFAN_RPM3 ALS1_OUTFAN_RPM4 ALS_GAIN_BOOST
FAN_RPM5
SMU_ACIN
SYS_POWERFAIL_L
SMU_BATT_DET_L
SYS_DRIVE_BAY_INT_L
SYS_LID_OPEN
SYS_DOOR_AJAR_L
SYS_KBDLED
FAN_PWM8
FAN_TACH5
SYS_LED_BLUE DIAG_LED
SMU_CHARGE_BATT
SYS_PME_L
SYS_SLEWING_L
SMU_SUSPENDREQ_L
SYS_COLD_RESET_L
SMU_SLEEP
SYS_POWERUP_L
SYS_RESET_BUTTON_L
=PP3V3_ALL_SMU
CPU_VID<4>
CPU_VID<3>
CPU_VID<2>
CPU_VID<1>
SMU_BOOT_CE
SMU_BOOT_SCLK
SMU_BOOT_BUSY
CPU_VID<0>
I2C_SMU_CPU_SDA_IN
SMU_CLK10M_XOUT
SMU_CLK10M_XIN
SMU_CLK10M_XOUT_R
=PPVREF_SMU
SYS_OVERTEMP_L
SMU_CHARGE_BATT
33
33
13
13
28
33
11
13
36
13
36
13
33
28
11
13
24
13
25
27
77
10
8
33
8
33
13
8
13
18
18
13
77
27
25
24
10
8
27
13
13
13
7
24
13
25
25
18
7
7
13
7
13
7
8
7
8
14
13
13
14
13
13
13
18
18
8
13
13
13
25
25
24
13
13
7
13
7
13
13
13
18
25
8
7
25
8
8
3
25
18
8
18
3
8
6
13
25
27
8
13
18
30
16
21
17
13
28
13
16
18
8
8
6
8
13
13
7
6
8
8 6
8
6
6
6
8
6
16
13
13
18
18
13
13
6
18
18
3
13
30
3
3
8
33
33
18
13
8
3
8
18
18
16
8
17
13
13
25
36
13
13
13
6
18
8
8
8
13
13
21 13
21 13
8
13
8
13
8
13
6
8
8
8
13 21
8
13
13
13
13
8
8
6
7
6
8
8
8
8
8
8
8
8
13
13
13
13
8
16
13
Preliminary
Page 14
A30B30
A29B29
A28B28
A27B27
A26B26
B25
B24
B23
B22
B21
A25
A24
A23
A22
A21
C30D30
C29D29
C28D28
C27D27
C26D26
C25D25
D22 D23 D24
D21
C24
C23
C22
C21
E30F30
E29F29
E28F28
E27F27
E26F26
E25F25
F24
F23
F22
F21
E24
E23
E22
E21
G30H30
G29H29
G28H28
G27H27
G26H26
H25 G25
G22 G23 G24
H21 H22 H23 H24
G21
H20
H19
H18
H17
H16
H15
H14
H13
H12
H11
H10
H9
H8
H7
H6
H5
H4
H3
H2
H1
G20
G19
G18
G17
G16
G15
G14
G13
G12
G11
G10
G9
G8
G7
G6
G5
G4
G3
G2
G1
F20
F19
F18
F17
F16
F15
F14
F13
F12
F11
F10
F9
F8
F7
F6
F5
F4
F3
F2
F1
E10
E20
E19
E18
E17
E16
E15
E14
E13
E12
E11
E9
E8
E7
E6
E5
E4
E3
E2
E1
D20
D19
D18
D17
D16
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
C20
C19
C18
C17
C16
C15
C14
C13
C12
C11
C10
C9
C8
C7
C6
C5
C4
C3
C2
C1 B1 A1
A2 A3 A4 A5 A6 A7 A8
A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20
B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
NC
NC
CPU LOGIC ANALYZER
NC
402
5%
0
DEVELOPMENT
21
R1400
402
5%
0
DEVELOPMENT
21
R1401
5% 402
0
DEVELOPMENT
21
R1402
0
4025%
DEVELOPMENT
21
R1403
NOSTUFF
YFS-30-03-H-08-SB
F-ST-BGA
H9
H8
H7
H6
H5
H4
H30
H3
H29
H28
H27
H26
H25
H24
H23
H22
H21
H20
H2
H19
H18
H17
H16
H15
H14
H13
H12
H11
H10
H1
G9
G8
G7
G6
G5
G4
G30
G3
G29
G28
G27
G26
G25
G24
G23
G22
G21
G20
G2
G19
G18
G17
G16
G15
G14
G13
G12
G11
G10
G1
F9
F8
F7
F6
F5
F4
F30
F3
F29
F28
F27
F26
F25
F24
F23
F22
F21
F20
F2
F19
F18
F17
F16
F15
F14
F13
F12
F11
F10
F1
E9
E8
E7
E6
E5
E4
E30
E3
E29
E28
E27
E26
E25
E24
E23
E22
E21
E20
E2
E19
E18
E17
E16
E15
E14
E13
E12
E11
E10
E1
D9
D8
D7
D6
D5
D4
D30
D3
D29
D28
D27
D26
D25
D24
D23
D22
D21
D20
D2
D19
D18
D17
D16
D15
D14
D13
D12
D11
D10
D1
C9
C8
C7
C6
C5
C4
C30
C3
C29
C28
C27
C26
C25
C24
C23
C22
C21
C20
C2
C19
C18
C17
C16
C15
C14
C13
C12
C11
C10
C1
B9
B8
B7
B6
B5
B4
B30
B3
B29
B28
B27
B26
B25
B24
B23
B22
B21
B20
B2
B19
B18
B17
B16
B15
B14
B13
B12
B11
B10
B1
A9
A8
A7
A6
A5
A4
A30
A3
A29
A28
A27
A26
A25
A24
A23
A22
A21
A20
A2
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A1
J1400
102
14
04
051-6772
EI_CPU_TO_NB_SR_N<1>
EI_CPU1_CLK_P_R
EI_CPU1_CLK_N
EI_NB_TO_CPU_AD<16>
EI_NB_TO_CPU_AD<3>
EI_NB_TO_CPU_AD<4>
EI_CPU_TO_NB_AD<29>
EI_CPU_TO_NB_AD<41>
EI_CPU_TO_NB_AD<32>
EI_CPU_TO_NB_AD<33>
EI_CPU_TO_NB_AD<34>
EI_CPU_TO_NB_AD<30>
EI_CPU_TO_NB_AD<37>
EI_CPU_TO_NB_AD<31>
EI_CPU_TO_NB_AD<22>
EI_CPU_TO_NB_AD<10>
EI_CPU_TO_NB_AD<9>
EI_CPU_TO_NB_AD<1>
EI_CPU_TO_NB_AD<2>
EI_CPU_TO_NB_AD<0>
CPU1_HTBEN
CPU_HRESET_L
EI_CPU_TO_NB_AD<6> EI_CPU_TO_NB_AD<21> EI_CPU_TO_NB_AD<20> EI_CPU_TO_NB_AD<25> EI_CPU_TO_NB_AD<26> EI_CPU_TO_NB_SR_P<0> EI_CPU_TO_NB_SR_N<0> EI_CPU_TO_NB_AD<27>
EI_CPU_TO_NB_AD<39>
EI_CPU_TO_NB_AD<19>
CPU_INT_L
EI_CPU_TO_NB_AD<15>
=PP1V2_EI_CPU
EI_CPU_TO_NB_AD<8> EI_CPU_TO_NB_AD<13>
EI_CPU_TO_NB_AD<12> EI_CPU_TO_NB_AD<5> EI_CPU_TO_NB_AD<36> EI_CPU_TO_NB_AD<35> EI_CPU_TO_NB_AD<18> EI_CPU_TO_NB_AD<43> EI_CPU_TO_NB_AD<42> EI_CPU_TO_NB_AD<38> EI_CPU_TO_NB_AD<40> EI_NB_TO_CPU_AD<9> EI_NB_TO_CPU_AD<11> EI_NB_TO_CPU_AD<0>
EI_CPU1_CLK_N
EI_NB_TO_CPU_AD<5>
EI_CPU1_CLK_P
EI_CPU_TO_NB_AD<3> EI_CPU_TO_NB_AD<4>
EI_CPU_TO_NB_AD<7> EI_CPU_TO_NB_AD<11> EI_CPU_TO_NB_CLK_N EI_CPU_TO_NB_CLK_P
EI_CPU_TO_NB_SR_P<1>
EI_CPU_TO_NB_AD<17> EI_CPU_TO_NB_AD<14> EI_CPU_TO_NB_AD<24> EI_CPU_TO_NB_AD<28> EI_NB_TO_CPU_AD<14> EI_NB_TO_CPU_AD<12> EI_NB_TO_CPU_AD<18> EI_NB_TO_CPU_AD<19>
EI_CPU1_SYNC CHKSTOP_L
EI_NB_TO_CPU_AD<13> EI_NB_TO_CPU_AD<15> EI_NB_TO_CPU_AD<17> EI_NB_TO_CPU_AD<21>
EI_NB_TO_CPU_AD<27> EI_NB_TO_CPU_AD<26> EI_NB_TO_CPU_AD<30> EI_NB_TO_CPU_AD<42> EI_NB_TO_CPU_AD<41>
EI_NB_TO_CPU_AD<25>
EI_NB_TO_CPU_AD<20>
EI_NB_TO_CPU_AD<28>
EI_NB_TO_CPU_AD<29>
EI_NB_TO_CPU_AD<40> EI_NB_TO_CPU_AD<10> EI_NB_TO_CPU_AD<39> EI_NB_TO_CPU_AD<36>
EI_NB_TO_CPU_SR_N<0>
RI_L
EI_NB_TO_CPU_SR_P<0>
EI_QREQ_L
I2C_SMU_A_SCL_OUT_L
EI_NB_TO_CPU_AD<1>
EI_NB_TO_CPU_AD<22> EI_NB_TO_CPU_AD<33> EI_NB_TO_CPU_AD<43> EI_NB_TO_CPU_AD<2> EI_NB_TO_CPU_AD<38>
EI_NB_TO_CPU_AD<37>
SYNCENABLE
EI_NB_TO_CPU_SR_N<1>
TP_PROC_TRIGGER_OUT
EI_NB_TO_CPU_SR_P<1>
EI_NB_TO_CPU_AD<8> EI_NB_TO_CPU_AD<24> EI_NB_TO_CPU_AD<7> EI_NB_TO_CPU_AD<6>
EI_SE
EI_QACK_L
EI_NB_TO_CPU_AD<35>
=PP1V2_EI_NB
EI_NB_TO_CPU_AD<34>
EI_NB_TO_CPU_AD<32> EI_NB_TO_CPU_AD<23> EI_NB_TO_CPU_CLK_N EI_NB_TO_CPU_CLK_P MCP_L I2C_SMU_A_SDA_OUT_L
=PP1V2_EI_NB
EI_CPU_TO_NB_AD<23>
EI_CPU_TO_NB_AD<16>
EI_NB_TO_CPU_AD<31>
EI_CPU1_CLK_P
EI_CPU1_CLK_N_R
EI_CPU1_SYNC
EI_CPU1_SYNC_R
CPU1_HTBEN
CPU1_HTBEN_R
35 31
30
30
30
30
28
28
29
27
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
30
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
27
29
27
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
27
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
30
29
29 18
29
29
29
29
29
29
29 30
29
29
29
29
29
29 29
29
29
18
29
29
29
29
29
18
18
29
29
29
27
27
28
14
28
28
28 28
28
28
28
28
28
28
28
28
28
28
28
28
28
14
29
28
28
28
28
28
28
28
28
28
28
25
28
18
28
28
28
28
28
28
28
28
28
28
28
28
28
28
14
28
14
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
14
8
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28 28
29 28
28 13
28
28
28
28
28
28
28 29
28 29
28
28
28
28
28 28
28
28
14
28
28
28
28
28
29
13
14
28
28
28
14
14
14
6
27
6
6
6
6 6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
7
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6 6
6 6
6 6
6
6
6
6
6
6
6 6
6 6
6
6
6
6
6 6
6
6
7
6
6
6
6
6
6
6
7
6
6
6
6
27
6
27
6
27
Preliminary
Page 15
SDA SCL
GND
OS
VS+
A2
A1
A0
G
D
S
G
D
S
G
D
S
G
D
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
17" SYSTEM FAN 603-5518
I2C ADDR:90(1001000)
OPTICAL TEMP SENSOR
MOTOR CONTROL TACH
12V DC
20" SYSTEM FAN 603-5521
GND
GND
17" CPU FAN 603-5519 20" HD FAN 603-5487
TACH
MOTOR CONTROL
FAN 0
FAN 1
FAN 0, 1 & SYSTEM TEMP
PP3V3_RUN
HF28040-B
M-ST-TH
CRITICAL
4
3
2
1
J1600
10K
1%
402
2
1
R1610
1/16W MF-LF
402
5%
0
21
R1609
10-89-7062
M-ST-TH
CRITICAL
6 5
4
1
J1601
PP3V3_RUN
10K
1% 1/16W MF-LF 402
2
1
R1659
0
1/16W MF-LF
402
5%
21
R1650
NOSTUFF
SOP
LM75
CRITICAL
8
1
2
3
4
5
6
7
U1602
PP3V3_PWRON
NOSTUFF
402
5%
0
21
R1621
402
CERM
16V
20%
0.01UF
2
1
C1660
5%
0
603
21
R1660
603
0
5% 1/10W MF-LF
21
R1661
603
0
5% 1/10W MF-LF
21
R1662
5%
0
603
21
R1663
5%
0
603
21
R1664
CERM
25V
20%
0.1UF
603
NOSTUFF
2
1
C1602
MMBD914XXG
NOSTUFF
31
D1601
1.5K
5% 1/4W MF-LF 1206
2
1
R1605
NTHS5443T1
1206A-03
5
4
87632
1
Q1603
805
5%
1.5K
1/8W
2
1
R1607
MMBD914XXG
3
1
D1602
805
1/8W
5%
0
21
R1608
805
X7R
0.47UF
16V
10%
2
1
C1604
1/8W
5%
1.8K
805
21
R1606
MMBZ5231B
31
DZ1601
PP12V_RUN
1/8W
0
805
5%
NOSTUFF
21
R1604
SOT23-LF
2N7002
2
1
3
Q1602
0.1UF
20% 25V CERM 603
NOSTUFF
2
1
C1601
0
5%
1/8W
805
21
R1603
805
1.0K
5% 1/8W MF-LF
2
1
R1602
2N7002
SOT23-LF
2
1
3
Q1601
805
1/8W
5%
0
21
R1601
1206A-03
NTHS5443T1
5
4
87632
1
Q1653
NOSTUFF
603
0.1UF
20% 25V CERM
2
1
C1652
1/8W
1.5K
5%
805
2
1
R1657
0
5%
1/8W
805
21
R1658
NOSTUFF
MMBD914XXG
31
D1651
16V
0.47UF
X7R 805
10%
2
1
C1654
805
5%
1/8W
1.8K
21
R1656
MMBD914XXG
3
1
D1652
1206
1/4W
5%
1.5K
2
1
R1655
MMBZ5231B
31
DZ1651
NOSTUFF
5%
805
0
1/8W
21
R1654
2N7002
SOT23-LF
2
1
3
Q1652
PP12V_RUN
805
1/8W
5%
0
21
R1653
1/8W
5%
1.0K
805
2
1
R1652
SOT23-LF
2N7002
2
1
3
Q1651
NOSTUFF
603
CERM
25V
20%
0.1UF
2
1
C1651
0
5%
1/8W
805
21
R1651
ELEC
16V
20%
120UF
6.3X11-TH
2
1
C1603
20% 16V ELEC
100UF
6.3X5.8
2
1
C1653
16
102
051-6772 04
F0_GATESLOWDN
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
FAN_0_PWR
PP12V_RUN_FAN_1_LCL VOLTAGE=12V MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.25MM
FAN_0_TACH
FAN_TACH1
FAN_RPM1
FAN_1_CNTL
FAN_1_DRV
F1_DRV
F1_RCFEEDBK
FAN_1_PWR_FILT
MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.25MM
PP12V_RUN_FAN_1_LC VOLTAGE=12V MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.25MM
FAN_1_TACH
F1_T2DRAIN
F1_VOLTAGE8R5 F1_GATESLOWDN
FAN_1_TACH_FILT
FAN_1_GND_FILT VOLTAGE=0V MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.25MM
F0_RCFEEDBK
F0_VOLTAGE8R5
F0_T2DRAIN
F0_DRV
FAN_0_DRV
FAN_0_CNTL
FAN_RPM0
FAN_TACH0
SYS_OVERTEMP_LTEMP_SENSOR_OS
I2C_OPTICAL_SCL
I2C_OPTICAL_SDA
FAN_1_PWR
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
27 25
13
13
13
13
13
18
18
Preliminary
Page 16
G
D
S
G
D
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
FAN 2 & HD TEMP
FAN 2
518S0193
I2C ADDR:92(1001001)
GND
+12V DC
20" CPU FAN 603-5459
17" HD FAN 603-5520
REMOTE HARD DRIVE TEMP SENSOR
MOTOR CONTROL
TACH
CRITICAL
M-ST-TH
10-89-7062
6 5
4
1
J1700
PP3V3_RUN
402
1%
10K
2
1
R1709
0
5%
402
MF-LF
1/16W
21
R1700
PP3V3_PWRON
CRITICAL
53261-0498
M-RT-SM
4
3
2
1
6
5
J1701
NTHS5443T1
1206A-03
5
4
87632
1
Q1703
MMBD914XXG
3
1
D1702
CERM
20%
0.1UF
603
NOSTUFF
25V
2
1
C1702
805
1.5K
1/8W
5%
2
1
R1707
805
1/8W
5%
0
21
R1708
805
X7R
0.47UF
16V
10%
2
1
C1704
MMBD914XXG
NOSTUFF
31
D1701
1/8W
5%
1.8K
805
21
R1706
1.5K
5% 1/4W MF-LF 1206
2
1
R1705
MMBZ5231B
31
DZ1701
1/8W
0
805
5%
NOSTUFF
21
R1704
SOT23-LF
2N7002
2
1
3
Q1702
20% 25V CERM 603
NOSTUFF
0.1UF
2
1
C1701
0
5%
1/8W
805
21
R1703
PP12V_RUN
805
1.0K
5% 1/8W MF-LF
2
1
R1702
805
1/8W
5%
0
21
R1701
2N7002
SOT23-LF
2
1
3
Q1701
6.3X11-TH
120UF
20% 16V ELEC
2
1
C1703
102
17
04
051-6772
FAN_2_PWR
MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.25MM
F2_GATESLOWDN
FAN_TACH2
FAN_RPM2
FAN_2_CNTL
FAN_2_DRV
F2_DRV
F2_T2DRAIN
F2_VOLTAGE8R5
F2_RCFEEDBK
I2C_HD_TEMP_SCL
I2C_HD_TEMP_SDA
FAN_2_TACH
18
18
13
13
6
6
Preliminary
Page 17
ALIAS
ALIAS
LM339A
V+
GND
LM339A
V+
GND
G
D
S
G
D
S
G
D
S
G
D
S
ALIAS ALIAS
ALIAS ALIAS
ALIAS ALIAS
LM339A
V+
GND
ALIAS ALIAS
ALIAS
ALIAS
ALIAS ALIAS
LM339A
V+
GND
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
PINS 2, 3
PINS 2, 3
I2C ADDR:94??
PINS 7, 8
U5890
GPU TEMP SENSOR
I2C ADDR:92
PINS C1, B1
I2C ADDR:90
PINS 1, 2
OPTICAL TEMP SENSOR
AMBIENT LIGHT SENSOR
J2100
U1602
PINS 26, 27
PULSAR
I2C B BUS
SMU
MASTER U1300
U2600
PINS A20, B20
PINS 18, 19
AUDIO
U9500 / AU300
PINS AA20, Y21
I2C CONNECTIONS
MASTER U1300
U1300
PINS 14,25,23,68
SMU
I2C A BUS
U3
MASTER
OF EACH DIMM
DIMMS
J4000 = A0 J4001 = A2
PINS 91, 92
U3LITE
I2C C BUS
PINS 5, 6
RTC
U1301
MASTER U1300
I2C D & E BUS
U3
PINS C20, B21
U3LITE ’B’
MASTER U1300
PINS 50, 51
U3
U3LITE
CPU JTAG
I2C_CPU_A_SCL
U2900
CPU
MASTER
SMU
USE 576 OHM FOR R1811 IF 5V RAIL IS USED FOR REFERENCE
I2C SB BUS
PINS Y9, AB7
SHASTA
U2300
MASTER
PINS 36-39
PINS C21, E21
PINS 34, 35
U1702
HD TEMP SENSOR
J2100 CAN BE USED AS A SECOND TEMP SENSOR
I2C ADDR:98
SMU OLD ’E’ SMU NEW ’E’
2.0K
5% 1/16W MF-LF
402
2
1
R1812
2.0K
5% 1/16W MF-LF 402
2
1
R1813
PP2V5_PWRON
PP3V3_RUN
1K
5% 1/16W MF-LF 402
2
1
R1814
1K
5%
402
2
1
R1815
5%
2.0K
402
2
1
R1800
402
5%
200
2
1
R1808
402
200
5% 1/16W
2
1
R1810
SOI
3
13
11
10
12
U1800
SOI
3
2
5
4
12
U1800
5% 1/16W
2.0K
2
1
R1801
5%
402
2.0K
2
1
R1818
5%
2.0K
402
2
1
R1819
5%
0
5
6
7
8
4
3
2
1
RP1800
0
5%
NOSTUFF
5
6
7
8
4
3
2
1
RP1801
20% 10V
CERM
402
0.1UF
2
1
C1800
NOSTUFF
402
5%
0
2
1
R1820
NOSTUFF
0
5% 1/16W MF-LF 402
2
1
R1821
0
5% 1/16W MF-LF
402
NOSTUFF
2
1
R1822
NOSTUFF
402
5%
0
2
1
R1823
NOSTUFF
0
5% 1/16W MF-LF
402
2 1
R1824
NOSTUFF
402
5%
0
2 1
R1825
0
5% 1/16W MF-LF
402
2 1
R1826
5% MF-LF
0
402
2 1
R1827
SOT-363
2N7002DW
1
2
6
Q1800
SOT-363
2N7002DW
4
5
3
Q1800
5%
4.7K
402
2
1
R1828
0.1UF
402
CERM
10V
20%
2
1
C1802
5%
402
4.7K
2
1
R1811
402
2.0K
5%
NOSTUFF
2
1
R1830
2.0K
5%
402
NOSTUFF
2
1
R1831
603
0
21
R1832
0
603
NOSTUFF
21
R1833
SOT-363
2N7002DW
4
5
3
Q1801
402
200
5%
2
1
R1817
402
200
5%
2
1
R1816
SOT-363
2N7002DW
1
2
6
Q1801
SOI
3
1
7
6
12
U1800
2.0K
5% 1/16W MF-LF 402
2
1
R1802
402
5%
2.0K
2
1
R1803
NOSTUFF
4.7K
5%
402
2
1
R1809
402
5%
2.0K
2
1
R1804
2.0K
5% 1/16W MF-LF
402
2
1
R1805
PP3V3_PWRON
PP2V5_PWRON
SOI
3
14
9
8
12
U1800
PP3V3_ALL
1/16W MF-LF 402
5%
2.0K
2
1
R1806
1/16W MF-LF
402
5%
2.0K
2
1
R1807
0.1UF
10V 402
CERM
20%
2
1
C1801
04
18
102
051-6772
I2C_RTC_SDA
I2C
MAKE_BASE=TRUE
NET_SPACING_TYPE=I2C
I2C_SMU_B_SDA
NET_SPACING_TYPE=I2C
SMU_CPU_JTAG_OR_I2C
I2C_SMU_E_SDA
I2C
I2C_SMU_E_SCL
I2C
I2C_CPU_A_SDA_TO_SMU
I2C_CPU_A_SDA
NET_SPACING_TYPE=I2C
I2C_SMU_CPU_SCL_OUT_L MAKE_BASE=TRUE
I2C
I2C_SMU_CPU_SDA_IN MAKE_BASE=TRUE
I2C
I2C_SMU_CPU_SDA_OUT_L
I2C
MAKE_BASE=TRUE
MAKE_BASE=TRUE
I2C_SMU_CPU_SCL_IN
I2C
I2C_SMU_A_SCL_OUT_L MAKE_BASE=TRUE
NET_SPACING_TYPE=I2C
NET_SPACING_TYPE=I2C
I2C_CPU_A_SCL
I2C_NB_B_SDA
I2C
I2C_0V6_REF
NET_SPACING_TYPE=I2C
MAKE_BASE=TRUE
I2C_SMU_A_SDA_IN
PP3V3_PWRON
=PP1V2_EI_CPU
JTAG_CPU_TCK
JTAG_CPU_TMS
JTAG_CPU_TDI
JTAG_CPU_TDO
I2C_SMU_A_SDA_OUT_L MAKE_BASE=TRUE
NET_SPACING_TYPE=I2C
I2C_SMU_D_SCL
I2C
I2C_RTC_SCL
I2C
I2C_NB_B_SCL
I2C
I2C_SMU_D_SDA
I2C
I2C_DIMM_SDA I2C_DIMM_SCL
NET_SPACING_TYPE=I2C
MAKE_BASE=TRUE
I2C_NB_C_SCL
MAKE_BASE=TRUE
I2C_NB_C_SDA
NET_SPACING_TYPE=I2C
MIN_NECK_WIDTH=8MIL
MIN_LINE_WIDTH=12MIL
PP5V_U1800
PP3V3_RUN
PP5V_RUN
PP5V_PWRON
MAKE_BASE=TRUE
I2C_SMU_A_SCL_IN
NET_SPACING_TYPE=I2C
PP3V3_PWRON
I2C_CPU_A_SDA_TO_CPU
NET_SPACING_TYPE=I2C
I2C_CPU_SCL_LS
=PP1V2_EI_NB
NET_SPACING_TYPE=I2C
I2C_SB_SCL
MAKE_BASE=TRUE
MAKE_BASE=TRUE
NET_SPACING_TYPE=I2C
I2C_SB_SDA
I2C_AUDIO_SDA I2C_AUDIO_SCL
I2C_NB_A_SCL
I2C_NB_A_SDA
I2C_CLOCK_SDA
I2C_OPTICAL_SDA
I2C_CLOCK_SCL
I2C_OPTICAL_SCL
I2C_ALS_SDA I2C_ALS_SCL
I2C_HD_TEMP_SCL
I2C_HD_TEMP_SDA
MAKE_BASE=TRUE
NET_SPACING_TYPE=I2C
I2C_SMU_B_SCL
I2C_GPU_DIODE_SDA I2C_GPU_DIODE_SCL
50
35
34
58
31
22 58
27
30
11
11
27
14
18
29
14
10
10
18
28
13
11
14
30
30
30
30
13
7
7
11
11
14
25
25
17
17
13
13
13
13
29
13
13
13
13
6
29
24
13
6
7
29
29
29
29
6
13
13 24
13
40
40
24
24
6
6
6
13
6
7
6
6
95
95
24
24
27
16
27
16
21
21
6
6
13
58
58
Preliminary
Page 18
GRN
BLUE
AMB
+
-
+
-
+
-
+
-
D
S
G
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
TABLE_5_ITEM
TABLE_5_ITEM
INDICATOR LED
TOTAL CURRENT EXCLUDING LEDS CURRENT < 170 MICRO AMPS
PLACE THESE PARTS CLOSE TO SMU IC
CHANGE R2100 VALUE
PLACE THESE PARTS CLOSE TO SMU IC
PWM INPUT FROM SMU
5MV INPUT OFFSET
PWM INPUT FROM SMU
PWM INPUT FROM SMU
100% DUTY CYCLE OF 3V-PP PWM = 0.5V
TO SET LED CURRENT
PLACE THESE PARTS CLOSE TO SMU IC
PWM INPUT FROM SMU
(AND NO STUFF R2132, R2119 & Q2100)
(STUFF WHEN SYS_LED_L = ACTIVE HIGH)
PLACE THESE PARTS CLOSE TO SMU IC
MAX LED CURRENT = 0.5 / R
<-- 17 INCH
<-- 17 INCH
<-- 17 INCH
20 INCH -->
518S0193
AMBIENT LIGHT SENSOR
J2100 CAN BE USED AS A SECOND TEMP SENSOR
PP5V_PWRON
PP5V_PWRON
PLCC
RGB_LED
LATBG66B
AMB-GRN-BLUE
4
3
1
5
2
6
LED2100
LP324
RGB_LED
4
8
9
10
11
U2100
PP5V_PWRON
RGB_LED
1%
402
953K
2
1
R2109
PP5V_PWRON
2N3904LF
RGB_LED
2
3
1
Q2102
25.5
1% MF-LF
402
RGB_LED
2
1
R2100
LP324
RGB_LED
4
14
13
12
11
U2100
1%
1K
402
RGB_LED
2 1
R2112
402
953K
1%
RGB_LED
2
1
R2104
200K
RGB_LED
1%
402
2
1
R2105
20%
0.47UF
603
RGB_LED
CERM
10V
2
1
C2106
RGB_LED
402
0
5%
2 1
R2101
RGB_LED
1%
953K
402
2
1
R2102
PP5V_PWRON
2N3904LF
RGB_LED
2
3
1
Q2108
1%
25.5
RGB_LED
2
1
R2113
RGB_LED
LP324
4
7
6
5
11
U2100
1%
RGB_LED
1K
402
2 1
R2114
RGB_LED
953K
402
1%
2
1
R2110
200K
402
1%
RGB_LED
2
1
R2111
0.47UF
20% 10V
603
RGB_LED
CERM
2
1
C2112
RGB_LED
0
5%
402
2 1
R2115
RGB_LED
402
953K
1%
2
1
R2118
PP5V_PWRON
RGB_LED
2N3904LF
2
3
1
Q2114
1%
25.5
402
RGB_LED
2
1
R2126
LP324
RGB_LED
4
1
2
3
11
U2100
1%
1K
402
RGB_LED
2 1
R2127
953K
1%
402
RGB_LED
2
1
R2116
200K
1%
402
RGB_LED
2
1
R2117
CERM
10V
20%
0.47UF
603
RGB_LED
2
1
C2118
5%
0
RGB_LED
402
2 1
R2130
RGB_LED
0.022UF
402
CERM
16V
20%
2 1
C2101
16V
CERM
402
RGB_LED
20%
0.022UF
21
C2102
20%
0.022UF
402
CERM
16V
RGB_LED
2 1
C2104
0.1UF
20%
RGB_LED
10V
CERM
402
2
1
C2103
5%
402
1K
NOSTUFF
2 1
R2132
PP3V3_PWRON
NOSTUFF
SOT-23
FDV302P
2
1
3
Q2100
400-OHM-EMI
RGB_LED
SM-1
2
1
L2100
RGB_LED
400-OHM-EMI
SM-1
2
1
L2101
400-OHM-EMI
SM-1
RGB_LED
2
1
L2102
220PF
402
CERM
RGB_LED
25V
5%
21
C2105
220PF
RGB_LED
402
5% 25V CERM
2
1
C2107
400-OHM-EMI
SM-1
RGB_LED
21
L2104
220PF
RGB_LED
5%
25V 402
CERM
2 1
C2108
220PF
CERM
402
25V
5%
RGB_LED
2 1
C2109
25V
220PF
5%
CERM
402
WHITE_LED
2 1
C2110
402
WHITE_LED
CERM
5% 25V
220PF
2
1
C2111
WHITE_LED
0
5%
402
2 1
R2107
1%
402
NOSTUFF
953K
2 1
R2119
WHITE_LED
FDV301N
SM
2
1
3
Q2101
SM6
WHITE
2
1
LED2101
PP3V3_PWRON
CRITICAL
53261-0498
M-RT-SM
4
3
2
1
6
5
J2100
PP3V3_PWRON
WHITE_LED
603
0
5% 1/10W MF-LF
21
R2120
603
0
5% 1/10W MF-LF
WHITE_LED
2
1
R2121
1% MF-LF
402
56.2
17_INCH_LCD
2
1
R2103
5%
402
1K
WHITE_LED
2 1
R2106
402
5%
4.7K
WHITE_LED
2
1
R2129
10221
051-6772 04
114S3921
20_INCH_LCD
1
RES, 39.2 OHM, 1%, 402
RES, 18.2 OHM, 1%, 402
114S1821
3
R2100,R2113,R2126
NOSTUFF
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
SYS_DRV_A
MIN_NECK_WIDTH=10MIL
SYS_DRV_K
MIN_LINE_WIDTH=25MIL
SYS_LED_DRV_K MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
SYS_LED_H
I2C_ALS_SCL
I2C_ALS_SDA
U2100_UNUSED
MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
G_DRV_K
G_BASE_DRV
MIN_NECK_WIDTH=10MIL
R_DRV_K MIN_LINE_WIDTH=25MIL
B_DRV_K MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
SYS_LED
SYS_GATE
B_BASE_DRV
R_PWM_DC
MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
SYS_LED_DRV_C
G_PWM_DC
G_IN_OFFSET
SYS_LED_IN
GND_CHASSIS_LED
MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
RGB_LED_A
GND_CHASSIS_LED
B_IN_OFFSET
G_PWM_IN_H
MAKE_BASE=TRUE
SYS_LED_BLUE
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
B_DRV
MIN_LINE_WIDTH=25MIL
B_DRV_FB MIN_NECK_WIDTH=10MIL
R_DRV MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
R_DRV_FB
R_BASE_DRV
MAKE_BASE=TRUE
SYS_LED_RED
R_PWM_IN_H
MAKE_BASE=TRUE
SYS_LED_GREEN
R_IN_OFFSET
B_PWM_DC
B_PWM_IN_H
GND_CHASSIS_LED
MIN_LINE_WIDTH=25MIL
G_DRV
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
G_DRV_FB MIN_NECK_WIDTH=10MIL
21
21
21
18
18
6
13
7
7
13
13
13
7
Preliminary
Page 19
G
D
S
GND
GND
VDD
(SYM 6 OF 7)
G
D
S
FB
LD
HD
GND
COMP
SS
VCC
VC
G
D
S
LM339A
V+
GND
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
PLACE LED2200 NEAR VREG
1.5V RUN FET
RDSON=0.012 OHM @ VGS=3.5 V
U2200_FEEDBACK
NOTE:
VOUT=VREF*(R2203+R2205)/R2205=1.53VDC
IRU3037CS VREF=1.25VDC
SET OUTPUT=1.5VDC FOR U3LITE CORE
7.73A OF PEAK CURRENT DRAW ON PCORE_NB
U3LITE CORE POWER
IS D2250 NEEDED?
CHECK FETS
10UF
1206
CERM
6.3V
20%
2
1
C2201
1800UF
20%
6.3V ELEC TH-KZJ
2
1
C2209
6.3V ELEC
1800UF
20%
TH-KZJ
2
1
C2208
603
0.5%
10K
2
1
R2205
NOSTUFF
603
20% CERM
10V
1UF
2
1
C2207
NOSTUFF
20%
1UF
1206
CERM
25V
2
1
C2212
PP5V_PWRON
NTD60N02R
CASE369
Q2201
0.022UF
NOSTUFF
603
10%
50V CERM
2
1
C2205
805
0
5%
1/8W
21
R2202
CERM
25V
20%
1UF
805
2
1
C2204
220PF
5% 25V CERM 402
2
1
C2206
PP5V_PWRON
0.1UF
CERM
16V
20%
603
2
1
C2214
20%
805
CERM
25V
1UF
2
1
C2216
25V CERM 805
1UF
20%
2
1
C2217
SOD-123
MBR0520LXXG
2 1
D2200
MBR0520LXXG
SOD-123
2 1
D2201
MBR0520LXXG
SOD-123
2
1
D2202
OMIT
U3LITE
V1.0-300MM
PBGA
R14
T16
T11
U18
U13
U10
V15
K15
V12
K12
L17
L14
M16
M11
N18
N13
P15
P12
R17
W17
W14
AC13
B22
B16
B13
B4
AC7
D25
D19
D10
D7
D2
F22
F16
F13
G27
G23
AE25
G4
H19
H10
J14
J9
K25
K21
K16
K11
K6
AE19
K2
L18
L13
L10
M20
M15
M12
N27
N23
N17
AE10
N14
N9
N8
N4
P19
P16
P11
R18
R13
R10
AE4
T27
T23
T20
T15
T12
T6
T2
U17
U14
U9
AG22
V19
V16
V11
W25
W21
W18
W13
W8
W4
Y20
AG16
Y15
Y12
AA19
AA10
AB27
AB23
AB6
AB2
AC22
AC16
AG13
AG7
U3
CASE369
NTD60N02R
3
1
4
Q2202
TH
1.6UH
21
L2201
NOSTUFF
402
1% 1/16W MF-LF
1.1K
2
1
R2204
SOI
IRU3037CS
2 6
8
3
5
4
1
7
U2200
603
0.5% 1/16W
2.21K
2
1
R2203
1%
27.4K
402
2
1
R2201
3900PF
5% 50V CERM 603
2
1
C2215
CERM
50V
5%
68PF
603
2
1
C2213
PP5V_PWRON
805
1/8W
5%
4.7
2
1
R2200
PP1V5_RUN
NOSTUFF
SMB
10BQ040PBF
21
D2250
NOSTUFF
20%
CERM
0.1UF
10V 402
21
C2250
2N7002
SOT23-LF
2
1
3
Q2251
PP5V_PWRON
100K
402
5%
2 1
R2250
6.3V ELEC
1800UF
20%
TH-KZJ
2
1
C2202
TH-KZJ
20%
1800UF
ELEC
6.3V
2
1
C2203
1206
20% CERM
6.3V
10UF
2
1
C2210
IRF7413
SO-8
321
4
8765
Q2250
5% 1/16W MF-LF
DEVELOPMENT
330
402
2
1
R2260
GREEN
DEVELOPMENT
2.0X1.25A
2
1
LED2200
SOI
DEVELOPMENT
3
1
7
6
12
U1001
DEVELOPMENT
402
0
5% 1/16W MF-LF
21
R2261
402
0.1UF
20% 10V CERM
2
1
C2222
0.1UF
CERM
10V
20%
402
2
1
C2223
402
10V
0.1UF
20% CERM
2
1
C2225
CERM
10V
20%
0.1UF
402
2
1
C2228
402
0.1UF
20% 10V CERM
2
1
C2227
0.1UF
CERM
10V
20%
402
2
1
C2230
0.1UF
CERM 402
20% 10V
2
1
C2229
10V CERM
20%
0.1UF
402
2
1
C2232
20%
402
0.1UF
10V CERM
2
1
C2231
CERM
10V
20%
0.1UF
402
2
1
C2234
402
0.1UF
20% 10V CERM
2
1
C2233
CERM
10V
20%
0.1UF
402
2
1
C2236
402
0.1UF
20% 10V CERM
2
1
C2235
402
CERM
10V
20%
0.1UF
2
1
C2238
0.1UF
402
20% 10V CERM
2
1
C2237
CERM
10V
20%
0.1UF
402
2
1
C2240
CERM 402
0.1UF
20% 10V
2
1
C2239
CERM
10V
20%
0.1UF
402
2
1
C2242
402
0.1UF
20% 10V CERM
2
1
C2243
402
CERM
10V
20%
0.1UF
2
1
C2244
CERM
10V
20%
0.1UF
402
2
1
C2245
CERM
10V
20%
0.1UF
402
2
1
C2246
CERM
10V
20%
0.1UF
402
2
1
C2247
102
22
04
051-6772
Q2201_GATE
U2200_GATE_L
VOLTAGE=1.5V MIN_LINE_WIDTH=25MIL
PPVCORE_NB
MIN_NECK_WIDTH=10MIL MAKE_BASE=TRUE
=PPVCORE_NB
=PPVCORE_NB
U2200_GATE_H
U2200_VC_D
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
Q2202_DRAIN
U2200_VC_R
R2204_P2
U2200_VC
R2201_P2
PPVCORE_GPU
SYS_SLEEP
U2200_SS
U2200_FEEDBACK
U2200_COMP
=PPVCORE_NB
Q5006G
PP3V3_RUN
LED_PP1V5_RUN_P
1V1_REF
PP1V5_RUN_FOR_LED
LED_PP1V5_RUN_N
50
46
34
11
18
10
11
51
9
10
50
22
50
8
22
7
34
6
7
7
6
6
7
6
10
Preliminary
Page 20
VIO1
POWER
VDDO33
VDDO25
VIO2
VDDP_KL
VDDC
GND
GND
GND
(1 OF 8)
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
Master: Link
other Shasta supplies.
- _PP2V5_PWRON_SB
- _PPPCI32_PWRON_SB (to 5V or 3.3V)
- _PPPCI64_PWRON_SB (to 5V or 3.3V)
- _PP3V3_PWRON_SB
different drive timing
PCI, otherwise 3.3V.
Connect _PPPCI32_PWRON_SB to
spec for 5V vs. 3.3V operation.
appropriate PCI bus voltage and
Signal aliases required by this page: (NONE)
(NONE)
BOM options provided by this page:
Power Sequencing:
- _PPVCORE_PWRON_SB (1.2V) NOTE: PCI pads use the VIO supply to meet
characteristics required by the PCI
_PPPCI64_PWRON_SB to same if 64-bit
Must power Shasta VCore rail before any
Page Notes
Power aliases required by this page:
Shasta Core Power
Shasta max (est 06/30/03) current:
VDDPs - 2.5V - 100 mA ( 250 mW) I/O 2.5 - 2.5V - 20 mA ( 60 mW)
Total: 3015 mW
I/O 3.3 - 3.3V - 220 mA ( 770 mW)
ANALOG12 - 1.2V - 600 mA ( 760 mW)
DIGITAL - 1.2V - 950 mA (1175 mW)
For PCI_AD<31..0>
For PCI_AD<63..32>
20% 10V CERM 402
0.1uF
2
1
C2304
10V CERM 402
0.1uF
20%
2
1
C2305
0.1uF
402
CERM
10V
20%
2
1
C2306
20% 10V CERM 402
0.1uF
2
1
C2307
0.1uF
402
20% CERM
10V
2
1
C2308
20% 10V
402
CERM
0.1uF
2
1
C2309
0.1uF
402
CERM
10V
20%
2
1
C2302
0.1uF
402
CERM
10V
20%
2
1
C2301
20% 10V CERM 402
0.1uF
2
1
C2300
0.1uF
402
CERM
10V
20%
2
1
C2314
0.1uF
402
CERM
10V
20%
2
1
C2313
402
20% 10V CERM
0.1uF
2
1
C2312
20% 10V CERM 402
0.1uF
2
1
C2311
402
CERM
20% 10V
0.1uF
2
1
C2310
20% 10V CERM 402
0.1uF
2
1
C2334
0.1uF
402
CERM
10V
20%
2
1
C2333
0.1uF
402
CERM
10V
20%
2
1
C2339
20% 10V CERM 402
0.1uF
2
1
C2338
20% 10V CERM 402
0.1uF
2
1
C2332
0.1uF
402
CERM
10V
20%
2
1
C2331
0.1uF
402
CERM
10V
20%
2
1
C2337
20% 10V CERM 402
0.1uF
2
1
C2336
20% 10V CERM 402
0.1uF
2
1
C2330
0.1uF
402
CERM
10V
20%
2
1
C2335
0.1uF
402
CERM
10V
20%
2
1
C2324
0.1uF
402
CERM
10V
20%
2
1
C2323
20% 10V CERM 402
0.1uF
2
1
C2329
20% 10V CERM 402
0.1uF
2
1
C2328
20% 10V CERM 402
0.1uF
2
1
C2322
CERM
20% 10V
402
0.1uF
2
1
C2321
0.1uF
402
CERM
10V
20%
2
1
C2327
0.1uF
402
CERM
10V
20%
2
1
C2326
0.1uF
402
CERM
10V
20%
2
1
C2320
20% 10V CERM 402
0.1uF
2
1
C2325
20% 10V CERM
0.1uF
402
2
1
C2351
0.1uF
402
10V
20% CERM
2
1
C2350
0.1uF
402
20% 10V CERM
2
1
C2357
20% 10V CERM 402
0.1uF
2
1
C2356
0.1uF
402
CERM
10V
20%
2
1
C2355
CERM 402
0.1uF
10V
20%
2
1
C2362
20% CERM
402
0.1uF
10V
2
1
C2361
0.1uF
10V 402
CERM
20%
2
1
C2360
0.1uF
402
CERM
10V
20%
2
1
C2365
OMIT
BGA
V1.0
SHASTA
Y19
W22
L21
K21
H17
H18
V8
D1
B5
B2
B1
AB6
AB2
AB10
AA3
W4
V7
U9
U12
R2
M1
L7
H1
F8
F4
AA2
AA1
G15
D19
P15
N8
M15
L8
L15
K8
J15
J12
T15
T10
R9
R12
R10
H8
H15
D2
C19
AB22
AB1
W5 W19 U22 U13 U10 T12 R19 P9 P4
AA6
P14 P13 P12 P10 N9 N22 N13 N12 N11 N10
AA10
M2
M14
M13
M12
M11
M10
L9
L16
L14
L13A5L12
L11
L10
K9
K7
K13
K12
K11
K10
J22
A22
J16
J14
J13
J11
J10
H9
H2
F7
F3
E22
A2
A1
U2300
20% 10V CERM 402
0.1uF
2
1
C2303
23 102
051-6772
04
=PP2V5_PWRON_SB
=PPPCI64_PWRON_SB
=PPPCI32_PWRON_SB
=PP3V3_PWRON_SB
=PP2V5_PWRON_SB
=PPVCORE_PWRON_SB
88
88
74
74
25
74
25
7
23
25
23
6
7
7
7
7
7
3
Preliminary
Page 21
G
D
S
G
D
S
G
D
S
G
D
S
SYS_ISCL0 SYS_ISCA0
SYS_ISCA1
SYS_ISCL1
API_ISCA
API0_ISCL
THMO
DUMMY_A DUMMY_B
PMR_OBSV
IRQ0
THMI
(SYM 7 OF 7)
HRESET*
PURESET* SUSPENDACK* SUSPENDREQ*
CE1_B_TDO
CE1_A_TDI
CE1_LT_TCK
VSP_CLKN
VSP_CLKP
CE1_DI1_TMS CE1_DI2_TRST CE1_RI
CEO_TEST
PM_SLEEP0
CE0_RE
CE0_MC
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
LAST MODIFIED: JUNE 10, 04
MASTER: GILA
JTAG_NB_TRST_L
U3LITE MISC
HIGH FOR NORMAL OPERATION
JTAG_NB_TDO JTAG_NB_TMS
JTAG_NB_TDI
JTAG_NB_TCK
U3LITE REQUIRES ALL JTAG SIGNALS
PP3V3_PWRON
PP3V3_PWRON PP2V5_PWRON
PP2V5_PWRON
PP2V5_PWRON
MF-LF
1/16W
5%
4.7K
402
2
1
R2435
20% 10V
402
0.1UF
CERM
2
1
C2400
402
330
MF-LF
1/16W
5%
2
1
R2419
SOT-363
2N7002DW
4
5
3
Q2404
402
330
1/16W
5% MF-LF
2
1
R2420
100
1% MF-LF
402
2
1
R2400
SOT-363
2N7002DW
1
2
6
Q2404
NOSTUFF
2N7002DW
SOT-363
4
5
3
Q2412
NOSTUFF
MF-LF
10K
402
5% 1/16W
2
1
R2438
NOSTUFF
SOT-363
2N7002DW
1
2
6
Q2412
100
1% MF-LF
402
2
1
R2403
5%
10K
402
2
1
R2424
10K
5% 1/16W MF-LF 402
2
1
R2426
5%
10K
402
2
1
R2429
402
10K
5% 1/16W MF-LF
2
1
R2431
5%
10K
402
2
1
R2433
5%
10K
402
2
1
R2436
402
5% 1/16W MF-LF
10K
2
1
R2442
402
10K
5% 1/16W MF-LF
2
1
R2443
5%
10K
402
2
1
R2444
NOSTUFF
5% 1/16W MF-LF 402
4.7K
2
1
R2405
402
5%
0
21
R2406
NOSTUFF
402
5%
0
21
R2408
PBGA
OMIT
U3LITE
V1.0-300MM
P4 R4
J18
J17
C21
C20
E21
B21
D21
D20
E20
D15
Y9
E9
A21
AB28
AC28
AH3
AC2
R25
F20
M26
AA25
V25
AD3
AD5
B20
A20
U3
1%
121
402
2
1
R2402
402
121
1% 1/16W MF-LF
2
1
R2401
603
25V
5% CERM
NOSTUFF
1000PF
2
1
C2401
04
24
102
051-6772
=PP1V2_HT
PMU_SUSPEND_REQ
NB_VSP_CLK_VREF VOLTAGE=0.6V
MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
VSP_NB_CLK_P
NB_COLD_RESET_L
NB_PU_RESET
SYS_COLD_RESET_L
TP_NB_PM_SLEEP0
NB_MC_PD NB_RE_PD
NB_TEST_PD
NB_RI_PU
NB_SUSPEND_REQ_L
NB_SUSPEND_ACK_L
NB_COLD_RESET_L
NB_WARM_RESET_L
TP_DUMMY_B
TP_DUMMY_A
NB_INT_L
NB_PMR_OBSV
NB_THMI NB_THMO
I2C_NB_A_SCL I2C_NB_A_SDA
I2C_NB_C_SCL I2C_NB_C_SDA
I2C_NB_B_SDA
I2C_NB_B_SCL
NB_SUSPEND_REQ_L
SMU_SUSPENDREQ_L
VSP_NB_CLK_N
JTAG_NB_TCK JTAG_NB_TDI
JTAG_NB_TRST_L
JTAG_NB_TDO JTAG_NB_TMS
28
60
13
25
7
27
24
8
6
24
8
24
8
6
6
25
8
8
8
18
18
18
18
18
18
24
13
27
Preliminary
Page 22
GND
PLL_49
GND
XTAL_18 PLL_45
GND
VIO PME
PLL_49
VDD
PLL_45
VDD
XGI
XTALS
TEST
PWR_MGT
PCI
GPIO
I2C
I2S2 I2S1 I2S0
(2 OF 8)
PCI1C_BE_4_L PCI1C_BE_5_L PCI1C_BE_6_L PCI1C_BE_7_L
PCI1PAR64_H
XGI_DTI_H
XGI_DTO1_H
XGI_CLK_H
XGI_DTO0_H
PCI1ACK64_L
PCI1REQ64_L
PCI1AD_60_H
PCI1AD_63_H
PCI1AD_62_H
PCI1AD_61_H
PCI1AD_50_H
PCI1AD_52_H PCI1AD_53_H
PCI1AD_51_H
PCI1AD_59_H
PCI1AD_58_H
PCI1AD_57_H
PCI1AD_56_H
PCI1AD_55_H
PCI1AD_54_H
PCI1AD_40_H PCI1AD_41_H PCI1AD_42_H PCI1AD_43_H PCI1AD_44_H
PCI1AD_49_H
PCI1AD_48_H
PCI1AD_47_H
PCI1AD_46_H
PCI1AD_45_H
PCI1AD_39_H
PCI1REQ_5_L
PCI1AD_32_H
PCI1AD_34_H
PCI1AD_38_H
PCI1AD_37_H
PCI1AD_36_H
PCI1AD_33_H
PCI1AD_35_H
PCI1GNT_5_L
PCI1GNT_4_L
PCI1REQ_4_L
PCI1GNT_3_L
PCI1REQ_3_L
XTAL_18XTAL
VDD VDD
FSTEST
XTAL_18_I XTAL_18_O
XTALI XTALO
PLLTEST
TEST_MODE_H
TDI
TCK TMS
TDO
INTRWD_H
I2CDATA_H
I2CCLK_H
PCI_SEL32BIT_H
GPIO_H_3
GPIO_H_2
GPIO_H_1
I2S2SYNC_H
I2S2BITCLK_H
I2S2MCLK_H
I2S2DTO_H
I2S2DTI_H
GPIO_H_0
I2S1DTO_H I2S1MCLK_H I2S1BITCLK_H I2S1SYNC_H
I2S1DTI_H
I2S0BITCLK_H I2S0SYNC_H
I2S0DTI_H I2S0DTO_H I2S0MCLK_H
RESET_L STOPXTALS_L SUSPENDREQ_L SUSPENDACK_L PCI1PME_L
TRST_L
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
MASTER: SEEDY
Shasta Serial / Misc
the audio circuit to provide the
(I2S2_DEV_TO_SB_DTI)
(I2S1_RESET_L)
DO NOT swap between RPAKs
42
I2S2: S/P-DIF
(I2S1_DEV_TO_SB_DTI)
REDUNDANT - NEED TO ADDRESS THIS
I2S0: Audio DAC
I2S1: Soft Modem
DIFFERENTIAL_PAIR
NET_SPACING_TYPE
ELECTRICAL_CONSTRAINT_SET
GPIO
NC
BOM options provided by this page:
Power aliases required by this page:
26
(I2S0_DEV_TO_SB_DTI)
10
7
11
8
17
13 14 15 16
9
12
22 23
27
19
18
20
24 25
(SCCA)(SCCB)
31
33
30
28
34
36 37 38
43
41
44 45
47
46
39 40
53 54
50
51 52
49
48
(I2S2_RESET_L)
29
- _PP3V3_PCI
- _PP2V5_PWRON_SB
(NONE)
NOTE: XGC required for Shasta GPIOs
6
"Slot E" - AD21
21
32
35
Signal aliases required by this page:
- _PP1V2_PWRON_SB
- _PP3V3_PWRON_SB
AUDIO GPIO - see note on right
- PCI_64BIT
- MPIC_NB/MPIC_SB
To SouthBridge ->
From SouthBridge <-
-> From NorthBridge
<- To CPU
necessary pull-ups & pull-downs.
AUDIO GPIOS
NOTE: It is the responsibility of
Re-pin within each RPAK as necessary
REDUNDANT - NEED TO ADDRESS THIS
Selects whether NorthBridge or
Configures Shasta for 64-bit PCI
Page Notes
NorthBridge / SouthBridge MPIC Routing
interrupt controller.
SouthBridge MPIC will be used for
"Slot F" - AD22
PCI 32-bit select
0 = 64-bit PCI & XGC
1 = 32-bit PCI & GPIOs
NOSTUFF
10uF
20%
6.3V 1206
CERM
2
1
C2500
402
CERM
1uF
10%
6.3V
2
1
C2501
402
10%
CERM
1uF
6.3V
2
1
C2511
NOSTUFF
20%
6.3V CERM 1206
10uF
2
1
C2510
NOSTUFF
20%
6.3V CERM 1206
10uF
2
1
C2520
402
CERM
6.3V
10%
1uF
2
1
C2521
NOSTUFF
10uF
CERM 1206
20%
6.3V
2
1
C2530
CERM
402
10%
1uF
6.3V
2
1
C2531
402
5%
10K
2
1
R2500
402
PCI_64BIT
5%
1K
2
1
R2501
1% 1/16W MF-LF 402
200
2
1
R2590
50V
5%
22pF
402
CERM
2
1
C2591
402
CERM
50V
5%
22pF
2
1
C2590
5%
402
4.7K
2
1
R2580
V1.0
BGA
SHASTA
OMIT
Y13
V13
W13
AB12
W14
V15
U15
T9
U7
W2
Y4
W17
W12
Y11
A3
W11
AA11
AB11
U11 V11
W10
E9
Y12
AA12
AA13AB13
U14
W6
U16
AB21
U17
K17
W18
E18
Y20
AA20
AA19
K20
K22
H22
J20
H21
G22
F22
J19
H20
G21
F21
J17
H19
K18
D22
G20
D21
C22
G19
F20
C21
E20
D20
F19
E19
G18
G17
C20
B21
A21
F16
G16
F17
F18
A20
D18
L17
V12
W9
Y7
Y8
AA5
AB4
AA7
V9
AB5
V10
AA8
Y6
U8
Y5
W7
AA4
AB7
Y9
W8
AB3
Y2
V5
V14
U2300
0.1uF
402
CERM
10V
20%
2
1
C2540
10K
5%
63
RP2551
5%
10K
81
RP2550
5%
10K
54
RP2550
10K
5%
72
RP2550
10K
5%
81
RP2551
5%
10K
72
RP2551
10K
5%
54
RP2551
10K
5%
81
RP2552
5%
10K
63
RP2550
5% 1/16W SM-LF
10K
72
RP2552
5%
10K
54
RP2552
5%
10K
63
RP2552
5% 1/16W
10K
72
RP2553
10K
5%
54
RP2553
5% 1/16W SM-LF
10K
81
RP2553
5%
10K
63
RP2553
10K
5%
402
21
R2550
10K
5%
402
21
R2551
402
5%
10K
21
R2552
5% 1/16W MF-LF
10K
402
21
R2553
5% 1/16W MF-LF
10K
402
21
R2556
5% 1/16W MF-LF
10K
402
21
R2557
10K
5%
402
21
R2558
10K
5%
402
21
R2559
402
5%
10K
21
R2564
10K
402
5%
21
R2563
402
5%
1K
21
R2560
5%
402
10K
21
R2561
10K
402
5%
21
R2566
5% 1/16W MF-LF
402
10K
21
R2565
5% 1/16W MF-LF
402
10K
21
R2567
5%
402
10K
21
R2568
NO STUFF
402
5%
1K
21
R2562
10K
5%
NO STUFF
402
21
R2555
1K
5%
402
21
R2554
PP3V3_RUN
402
5%
10K
2
1
R2576
2N3904LF
MPIC_SB
2
3
1
Q2576
5% 1/16W MF-LF
402
10K
MPIC_SB
21
R2575
MPIC_NB
5% 1/16W MF-LF
402
0
2
1
R2579
5% 1/16W MF-LF
MPIC_SB
47
402
21
R2578
5%
33
7
8
6
5
2
1
3
4
RP2510
33 5%
8
7
6
5
1
2
3
4
RP2530
5%
33
6
5
8
7
3
4
1
2
RP2520
3.3
805
1/8W
5%
21
R2505
5%
1/8W
805
3.3
21
R2510
3.3
805
1/8W
5%
21
R2520
1/8W
5%
805
3.3
21
R2530
5%
0
402
21
R2511
18.432M
11.4X4.7X4.2-SM
21
Y2590
25 102
04
051-6772
SB_CLK18M_XTALO
SB_CLK18M_XTALI
I2S0_MCLK I2S0_BITCLK
SB_GPIO46
SB_GPIO49
SB_GPIO51
MIN_NECK_WIDTH=15 mil
MIN_LINE_WIDTH=20 mil
VOLTAGE=1.2V
PP1V2_PWRON_SB_PLL45VDD
MIN_NECK_WIDTH=15 mil
MIN_LINE_WIDTH=20 mil
VOLTAGE=1.2V
PP1V2_PWRON_SB_PLL49VDD
I2S2_BIDIR
I2S2_SYNC
SB_CLK18M_XTALI
SB_CLK18M_XTAL 15 MIL SPACING
15 MIL SPACING
SB_CLK18M_XTALO SB_CLK18M_XTALO_R
15 MIL SPACING
=PP3V3_PWRON_SB
=PP3V3_PWRON_SB
I2S1_RESET_L
MODEM_RING2SYS_L
CPU_SRESET_L
SYS_SLEWING_L
I2S0_TO_DEV
I2S0_MCLK
AUDIO
I2S0_BITCLK_R
I2S0_MCLK_R
PCI_SLOTE_REQ_L PCI_SLOTE_GNT_L
SB_GPIO12
SB_TO_SMU_INT_L
SB_SATABR_RESET_L
SB_GPIO25
SB_GPIO24
SB_GPIO23
PCI_SLOTF_INT_L
PCI_SLOTE_INT_L
PCI_SLOTD_INT_L
PCI_SLOTC_INT_L
PCI_SLOTB_INT_L
PCI_SLOTA_INT_L
AGP_INT_L
UDASH_RESET_L
UDASH_SDOWN
PCI_SLOTF_GNT_L
CPU_SRESET_L
PCI_SLOTF_REQ_L
SYS_OVERTEMP_L
I2S0_RESET_L
ENET_ENERGYDET
SB_GPIO46
SB_GPIO45
SB_GPIO30
ENETFW_RESET
FW_LOWPWR
AUDIO_GPIO_11
AUDIO_EXT_MCLK_SEL
AUDIO_HP_MUTE_L
AUDIO_HP_DET_L
AUDIO_LI_OPTICAL_PLUG_L
AUDIO_LI_DET_L
AUDIO_LO_DET_L AUDIO_LO_OPTICAL_PLUG_L
AUDIO_GPIO_12
AUDIO_SPKR_MUTE_L
AUDIO_LO_MUTE_L
AUDIO_SPKR_DET_L
SMU_TO_SB_INT_L
NB_TO_SB_INT
SB_GPIO52
SB_GPIO51
SB_GPIO49 SB_GPIO50
SYS_SLEWING_L
SB_GPIO47
I2S1_MCLK
I2S1_TO_DEV
10 MIL SPACING
I2S0_DEV_TO_SB_DTI
I2S0_TO_SB
SB_INT_L
NB_INT_L_R
CPU_INT_L
NB_INT_L
NB_TO_SB_INT
=PP1V2_PWRON_SB
=PP2V5_PWRON_SB
MIN_NECK_WIDTH=15 mil
VOLTAGE=2.5V
PP2V5_PWRON_SB_XTALVDD
MIN_LINE_WIDTH=20 mil
MIN_NECK_WIDTH=15 mil
MIN_LINE_WIDTH=20 mil
VOLTAGE=2.5V
PP2V5_PWRON_SB_XTAL18VDD
I2S2_MCLK_R
I2S2_DEV_TO_SB_DTI
15 MIL SPACING
SB_CLK25M_ATA
SB_CLK25M_ATA
I2S2_BITCLK
SB_CLK18M_XTALO_R
SYS_WARM_RESET_L
JTAG_SB_TDO
PCI_SLOTG_INT_L
PCI_SLOTD_INT_L
PCI_SLOTE_INT_L
PCI_SLOTA_INT_L
PCI_SLOTF_GNT_L
PCI_SLOTE_GNT_L
PCI_SLOTF_REQ_L
PCI_SLOTE_REQ_L
=PP3V3_PCI
=PP3V3_PWRON_SB
SB_CLK25M_ATA
TP_SB_PLLTEST
JTAG_SB_TDI
JTAG_SB_TCK
TP_SB_WATCHDOG
I2C_SB_SDA
MODEM_RING2SYS_L
SB_INT_L
SB_STOPXTALS_L SMU_SUSPENDREQ_L SB_SUSPENDACK_L
I2C_SB_SCL
SYS_PME_L
I2S2_MCLK
I2S2_TO_DEV
10 MIL SPACING
I2S0_SB_TO_DEV_DTO
I2S0_TO_DEV
I2S2_BITCLK
I2S2_BIDIR
I2S0_BIDIR
I2S0_SYNC
I2S2_TO_SB
I2S2_DEV_TO_SB_DTI
I2S1_SYNC
I2S1_BIDIR
I2S1_TO_SB
I2S1_DEV_TO_SB_DTI
I2S2_SB_TO_DEV_DTO
I2S2_TO_DEV
I2S0_SB_TO_DEV_DTO_R
I2S0_SYNC_R
I2S1_SB_TO_DEV_DTO_R I2S1_MCLK_R I2S1_BITCLK_R I2S1_SYNC_R
I2S2_SB_TO_DEV_DTO_R
I2S2_BITCLK_R I2S2_SYNC_R
I2S2_SB_TO_DEV_DTO
I2S1_SB_TO_DEV_DTO
I2S1_SYNC
I2S0_SB_TO_DEV_DTO
I2S0_DEV_TO_SB_DTI
I2S2_RESET_L
=PP3V3_PWRON_SB
SB_TEST_MODE_PD
I2S1_TO_DEV
I2S1_SB_TO_DEV_DTO
I2S0_BIDIR
I2S0_BITCLK
SYS_OVERTEMP_L
SB_TO_SMU_INT_L
UDASH_RESET_L
SB_SATABR_RESET_L
FW_LOWPWR
ENETFW_RESET
ENET_ENERGYDET
PCI_SLOTB_INT_L
PCI_SLOTF_INT_L
PCI_SLOTC_INT_L
SB_GPIO12
SB_GPIO24
SB_GPIO30
SB_GPIO23
SB_GPIO25
SB_GPIO45
SB_GPIO47
SMU_TO_SB_INT_L
SB_GPIO50
SB_GPIO52
JTAG_SB_TMS
I2S1_BITCLK
I2S1_BIDIR
JTAG_SB_TRST_L
SB_PCI_SEL32BIT
TP_SB_FSTEST
I2S2_SYNC
I2S0_SYNC
I2S1_DEV_TO_SB_DTI
I2S2_MCLK
I2S1_RESET_L
I2S1_MCLK I2S1_BITCLK
PCI_SLOTG_INT_L
77
74
74
33
27
33
30
88
76
74
74
27
25
25
94
94
30
27
76
30
25
27
94
29
74
77
76
75
25
94
28
94
94
94
94
25
94
25
94
94
94
94
94
102
102
102
23
23
25
25
29
25
102
25
25
25
56
29
16
86
25
89
101
25
25
25
95
14
23
102
27
102
74
77
25
56
74
23
27
18
25
24
18
77
102
95
102
95
102
25
25
102
102
25
25
95
95
23
25
102
16
25
25
89
25
86
25
25
102
95
25
102
25
25
25
77
25
25
25
25
25
25
25
25
25
25
25
7
7
6
6
25
13
25
25
25
25
13
25
25
25
25
25
25
25
25
25
6
49
6
6
25
25
25
13
95
25
25
25
25
12
25
102
102
102
102
102
101
6
101
101
100
98
102
13
25
25
25
25
25
13
25
6
25
25
6
24
25
7
7
25
25
25
25
8
8
25
25
25
6
25
25
25
25
7
7
25
6
8
8
6
6
25
13
13
13
6
13
25
25
25
25
25
6
6
25
25
6
6
25
25
102
7
6
25
13
13
6
25
25
12
25
25
25
25
25
25
25
25
25
25
25
13
25
25
8
6
8
6
25
25
6
25
6
6
6
25
Preliminary
Page 23
SYM 2 OF 2
VDD33
VDD25 VDD25
VDD_PLL3
VDD_PLL2
VDD_PLL1
C4_VDD
C3_VDD
C2_VDD
VDD_PLL4
VDD_I2C VDD_NBSYNC VDD_PCLK
VDD33_BC VDD33_BC1
VDD_HCLK0
VDD_HSYNC
VDD_HCLK2
VDD_HCLK0
VDD_HCLK1 VDD_HCLK2
VDD_HSYNC
VDD15_HSYNC VDD15_PCLK
VDD_XTAL
VDD_VCLK
VSS_XTAL
VSS_VCLK
VSS_HSYNC
VSS_HCLK2
VSS_HCLK0 VSS_HCLK1 VSS_HCLK2
VSS_HSYNC
VSS_HCLK0
VSS33_BC1
VSS33_BC
VSS33
VSS_PCLK
VSS_NBSYNC
VSS25
VSS25
VSS_I2C
VSS_CML
VSS_PLL4
VSS_PLL3
VSS_PLL2
C2_VSS C3_VSS C4_VSS
VSS_PLL1
C1_VSSC1_VDD
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
PLACE NEAR PIN D10 D12
A8, C5, B4, K10, H12 J11, M11, A1
PINS G12, M12, H3, K1, L5, M9, A11, A9
CAN BE TURNED OFF IN SLEEP
PLACE NEAR PIN D2 D1
PLACE NEAR PIN M3 M2
PLACE NEAR PIN L8 K8
402 CAPS NOT NEEDED
IF 603 CAN BE PLACED CLOSE TO PULSAR
MASTER: GILA
LAST MODIFIED: APR 09, 04
PULSAR POWER
402
5% 1/16W MF-LF
4.7
21
R2601
PP3V3_RUN
PP3V3_PWRON
0.1UF
402
10V
20% CERM
2
1
C2601
MF-LF
1/16W
5%
4.7
402
21
R2603
MF-LF
1/16W
5%
4.7
402
21
R2605
CERM
20% 10V
402
0.1UF
2
1
C2605
180-OHM-1.5A
0603
21
L2601
20%
0.1UF
10V 402
CERM
2
1
C2609
0.1UF
CERM
20% 10V
402
2
1
C2611
180-OHM-1.5A
0603
21
L2603
402
10V
20% CERM
0.1UF
2
1
C2613
180-OHM-1.5A
0603
21
L2605
402
10V
20% CERM
0.1UF
2
1
C2615
180-OHM-1.5A
0603
21
L2607
0.1UF
10V
20% CERM
402
2
1
C2617
402
10V
20% CERM
0.1UF
2
1
C2619
CERM
20% 10V
402
0.1UF
2
1
C2622
402
4.7
5% 1/16W MF-LF
21
R2607
0603
180-OHM-1.5A
21
L2609
402
0.1UF
CERM
20% 10V
2
1
C2620
0.1UF
402
10V
20% CERM
2
1
C2627
CERM
20% 10V
402
0.1UF
2
1
C2628
0.1UF
402
10V
20% CERM
2
1
C2629
0.1UF
402
10V
20% CERM
2
1
C2630
0.1UF
402
10V
20% CERM
2
1
C2651
CERM
20% 10V
402
0.1UF
2
1
C2623
CERM
20% 10V
402
0.1UF
2
1
C2624
CERM
20% 10V
402
0.1UF
2
1
C2625
CERM
20% 10V
402
0.1UF
2
1
C2626
CERM
20% 10V
402
0.1UF
2
1
C2631
CERM
20% 10V
402
0.1UF
2
1
C2632
CERM
20% 10V
402
0.1UF
2
1
C2633
CERM
20% 10V
402
0.1UF
2
1
C2634
CERM
20% 10V
402
0.1UF
2
1
C2635
CERM
20% 10V
402
0.1UF
2
1
C2636
CERM
20% 10V
402
0.1UF
2
1
C2637
CERM
20% 10V
402
0.1UF
2
1
C2638
CERM
0.1UF
20%
402
10V
2
1
C2665
0.1UF
402
10V
20% CERM
2
1
C2667
0.1UF
402
10V
20% CERM
2
1
C2671
CERM
20% 10V
0.1UF
402
2
1
C2640
10V
20%
0.1UF
CERM 402
2
1
C2639
MF-LF
1/16W
5%
4.7
402
21
R2609
2.2UF
6.3V CERM1
20%
603
2
1
C2645
6.3V
2.2UF
20%
603
2
1
C2669
2.2UF
6.3V CERM1
20%
603
2
1
C2603
6.3V
2.2UF
20%
603
2
1
C2607
2.2UF
6.3V CERM1
20%
603
2
1
C2621
FSBGA
OMIT
PULSAR
C12
A3
M2
K8
D1
D12
L12
F11
C2
K12
H10
A7
A4
B7
B11
C10
A6
M5
L7
E2
H2
L2
A12
A1
M3
L8
D2
D10
M12
G12
B2
H12
K10
B4
C5
A8
A9
A11
M9
L5
E1
K1
H3
M11
J11
C9B9
E10E12
M4L3
G1F1
U2600
PP3V3_PWRON
PP3V3_PWRON
PP3V3_PWRON
PP3V3_RUN
359S0076
1
PULSAR, PBGA
051-6772
04
26
102
MIN_LINE_WIDTH=25MIL
VOLTAGE=1.5V
PP1V5_PSL_PLL3
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
VOLTAGE=1.5V
PP1V5_PSL_PLL4
MIN_NECK_WIDTH=10MIL
=PP1V2_PULSAR
=PPVCORE_PULSAR
=PPVCORE_PULSAR
=PPVCORE_PWRON_PULSAR
=PPVCORE_PWRON_PULSAR
=PP1V2_PULSAR
=PPVCORE_PULSAR
MIN_LINE_WIDTH=25MIL
VOLTAGE=1.5V
PP1V5_PSL_PLL2
MIN_NECK_WIDTH=10MIL
=PP1V2_PULSAR
=PP2V5_PWRON_RAM
=PP2V5_PWRON_RAM
MIN_LINE_WIDTH=25MIL
VOLTAGE=1.5V
PP1V5_PSL_PLL1
MIN_NECK_WIDTH=10MIL
VOLTAGE=3.3V MIN_LINE_WIDTH=25MIL
PP3V3_PSL_XTAL
MIN_NECK_WIDTH=10MIL
=PPVCORE_PWRON_PULSAR
46
46
40
40
37
37
26
26
26
26
26
26
26
26
26
26
26
7
7
7
7
7
7
7
7
7
7
7
Preliminary
Page 24
REFCLK_1
SYM 1 OF 2
SCLK
SDATA
RESET*
XIN
XOUT
REF25
REF15
TEST3
TEST2
TEST1
ADDRSEL
REF33
REF_CML
PRES_CML
FORCESPO*
PD
VCLKN VCLKP
HCLKN_0 HCLKN_1 HCLKN_2
GPCLK33_1
GPCLK33_0
HCLKP_0
HCLKP_2
HCLKP_1
PCLK33_1
PCLK33_0
PCLK25_1
PCLK25_0
GPCLK25_0 GPCLK25_1
PCLK33_2 PCLK33_3 PCLK33_4
HTBEN_0 HTBEN_1
NBSYNC
HSYNC_0 HSYNC_1
REFCLK_0
ERROR*
SLEWING*
PCLK12 PCLK15
SCAN_MODE
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
LAST MODIFIED: NOV 22, 04
ALL SPACING GROUPS SHOULD HAVE 15 MIL SPACING TO SIGNALS NOT IN THEIR GROUP
EI_NB_SYNC IS PART OF EI_CPU_SYNC TOPOLOGY
DIFFERENTIAL SIGNALS SHOULD HAVE 5 MIL SPACING TO EACH OTHER
ELECTRICAL_CONSTRAINT_SET
33MHZ
0=IIC ADDR D2/D3
33MHZ
3.3V
2.5V
2.5V
2.5V
3.3V
3.3V
25MHZ
25MHZ
2.5V
2.5V
2.5V
3.3V
3.3V
NET_SPACING_TYPE
66MHZ
SPACING TYPE
NET
66MHZ 66MHZ
1.5V
1.2V
1.2V
1.2V
3.3V
66MHZ 66MHZ
66MHZ 33MHZ 66MHZ
66MHZ
1=IIC ADDR D4/D5
33MHZ
33MHZ
DIFFERENTIAL_PAIRNET_PHYSICAL_TYPE
1.2V
PULSAR CLOCKS
MASTER: SEEDY
0
5%
21
R2701
I100 I101
I102
I103
0
5%
402
21
R2704
249
402
1%
21
R2706
FSBGA
OMIT
PULSAR
B12
C11
B3
A2
D11
E11
K3
K9
B1
C1
M1
D3
H1
G2
A5
M6
J2
G11
B6
C3
M10
L9
M7
L6
K5
L1
K2
L10
L11
F12
J12
K11
H11
J10
B5
B8
A10
C4
C8
B10
K4
L4
J1
J3
F2
M8
E3
U2600
U.FL-R_SMT
NOSTUFF
F-ST-SM
1
2
3
J2700
CRITICAL
8X4.5MM-SM
25.0000M
21
Y2701
402
1K
5% 1/16W MF-LF
2
1
R2722
402
NOSTUFF
0
5% 1/16W MF-LF
21
R2748
I116 I117
I118
I119
I120
20
4025%
21
R2703
402
0
5%
21
R2705
0
4025%
21
R2707
20
4025%
21
R2709
40205%
21
R2711
5% 402
021R2715
0
4025%
21
R2717
40205%
21
R2719
5%0402
21
R2720
1K
402 5%
NOSTUFF
21
R2724
4025%
1K
NOSTUFF
21
R2738
402 1%
1K
21
R2740
1%
806
402
21
R2742
681
402
1%
21
R2744
402
1K
1%
21
R2746
5%47402
21
R2750
1/16W
0
MF-LF
402
NO STUFF
5%
21
R2752
402
5%
0
1/16W MF-LF
21
R2754
402
0
5% 1/16W MF-LF
21
R2756
402
NO STUFF
330K
5% 1/16W MF-LF
21
R2758
5%0402
21
R2761
1/16W
NOSTUFF
402
5% MF-LF
24
2
1
R2762
NOSTUFF
MF-LF 402
1/16W
24
5%
2
1
R2764
5% 50V CERM
33PF
402
2
1
C2705
CERM
50V
5%
33PF
402
2
1
C2707
0
4025%
21
R2768
20
5% 402
21
R2770
0
4025%
21
R2772
10% 402
CERM
50V
0.001UF
21
C2708
0.001UF
50V
CERM
40210%
21
C2710
0.001UF
50V
CERM
40210%
21
C2713
10% 402
CERM
50V
0.001UF
21
C2715
0.001UF
50V
CERM
40210%
21
C2700
0.001UF
50V
CERM
10% 402
21
C2702
NOSTUFF
4025%
0
21
R2775
NOSTUFF
40205%
21
R2776
402
0
5%
21
R2702
5%0402
21
R2779
NOSTUFF
402225%
21
R2700
I86 I87
I90
I91
I94 I95
I96
I97 I98
I99
051-6772
04
27
102
PULSAR_POWER_DOWN_R
AGP_CLK66M_NB_R
CLOCKS
=PULSAR_POWER_DOWN
CLOCKS
EI_CPU1_CLKEI_CPU1_CLK
EI_CPU1_CLK_N
CLOCKS
PLS_EXTCLK
SYS_OVERTEMP_L
PLS_X_OUT
CLOCKS
EI_NB_CLK_N_C
PLS_CLK_66M_0_R
CLOCKS
VSP_NB_CLK_P_C
CLOCKS
PCI_CLK_P4
HT_CLK66M_SB_R
CLOCKS
CLOCKS
EI_NB_CLK_P_C
RAM_CLK66M_NB_R
CLOCKS
CLOCKS
PCI_CLK_P4_R
CPU_HTBEN_R
CLOCKS
EI_CPU_SYNC_R
CLOCKS
CLOCKS
EI_NB_CLK
CLOCKS
EI_NB_CLK
EI_NB_CLK_P
CLOCKS
AGP_NB_CLK
AGP_CLK66M_NB
CLOCKS
CLOCKS
VSP_NB_CLK_N_C
PCI_CLK_GP0
VSP_NB_CLK_P
PP3V3_PWRON
CLOCK_RESET_L
PLS_INTERM
AGP_CLK66M_NB
TP_PLS_TEST3
TP_PLS_TEST2
TP_PLS_TEST1
TP_PLS_REF_CML
CLOCK_ERROR_L
SATA_CLK25M_R
CLOCKS
SLEWING_L_R
CLOCKS
PLS_SCAN_MODE
PLS_REF15 PLS_REF25 PLS_REF33
PLS_PRES_CML
SYS_SLEWING_L
I2C_CLOCK_SCL
PLS_X_ADDRSEL
I2C_CLOCK_SDA
PLS_RESET_L
EI_NB_SYNC
PCI_CLK_GP1
VSP_NB_CLK_N
CLOCKS
CPU1_HTBEN_R
HT_CLK66M_NB
EI_CPU1_SYNC_R
CLOCKS
PCI_CLK_GP1_R
CLOCKS
EI_CPU1_CLK_N_R
CLOCKS
EI_CPU1_CLK_P_R
CLOCKS
PCI_CLK_GP0_R
CLOCKS
CPU_HTBEN
PCI_CLK66M_SB_INT
HT_CLK66M_NB_R
CLOCKS
RAM_CLK66M_NB
TP_SATA_CLK25M
CLOCKS
VSP_NB_CLK VSP_NB_CLK
VSP_NB_CLK_N
CLOCKS
CLOCKS
PCI_CLK66M_SB_INT
CLOCKS
CLOCKS_PCI
CLOCKS
CLOCKS_PCI
CLOCKS
PCI_CLK33M_SB_EXT
EI_NB_CLK_P
PLS_CLK_66M_1_R
CLOCKS
TP_PLS_CLK_66M_1
PCI_CLK_P1
PCI_CLK_P3
EI_NB_CLK_N
TP_PLS_CLK_66M_0
AGP_CLK66M_GPU
CLOCKS
HT_CLK66M_NB
HT_NB_CLK
CLOCKS
CLOCKS
HT_CLK66M_SB
HT_SB_CLK
CLOCKS
PLS_X_IN
PLS_FORCE_P0_L_R
PLS_X_IN_B
PLS_X_OUT_B
PCI_CLK_P1_R
CLOCKS CLOCKS
AGP_CLK66M_GPU_R
HT_CLK66M_SB
CLOCKS
SB_CLK25M_ATA_R
CLOCKS
PCI_CLK_P3_R
CLOCKS
PCI_CLK66M_SB_INT_R
SB_CLK25M_ATA
EI_NB_SYNC_R
CLOCKS
CLOCKS
EI_CPU_CLK_P_C
CLOCKS
EI_CPU_CLK_N_C
EI_CPU_SYNC
EI_CPU_CLK_P EI_CPU_CLK_N
CLOCKS
EI_CPU1_SYNC
EI_CPU1_SYNC
CLOCKS
CLOCKS CLOCKS
EI_NB_SYNC
CLOCKS CLOCKS
EI_SYNC
EI_CPU_SYNC
CLOCKS
EI_NB_CLK
CLOCKS
EI_NB_CLK
EI_NB_CLK_N
CLOCKS
EI_CPU1_CLKEI_CPU1_CLK
EI_CPU1_CLK_P
CLOCKS
CLOCKS
EI_CPU_CLK EI_CPU_CLK
CLOCKS
EI_CPU_CLK_N
CLOCKS
EI_CPU_CLK EI_CPU_CLK
CLOCKS
EI_CPU_CLK_P
CLOCKS
AGP_GPU_CLK
AGP_CLK66M_GPU
CLOCKS
CLOCKS
VSP_NB_CLK_P
CLOCKS
VSP_NB_CLKVSP_NB_CLK
PLS_XTAL
CLOCKS
PLS_EXTCLK
CLOCKS
CLOCKSCLOCKS
CPU_HTBEN
58
25
18
33
30
30
14
16
28
48
27
11
48
25
28
27
60
29
74
27
74
74
28
28
49
60
62
62
29
29
29
14
28
29
28
14
29
29
49
27
29
3
6
27
13
6
8
27
27
8
24
6
13
27
6
6
6
6
8
13
18
18
27
8
24
14
27
14
14
14
27
27
37
6
24
27
8
27
6
6
8
8
27
6
27
27
27
27
25
27
27
27
6
27
27
27
6
27
27
27
24
27
27
Preliminary
Page 25
API_APCLKP API_APCLKN
API0_SRIP1
API0_SRIN0
API0_SROP1
API0_SRON0
API0_BCLKIN
API0_BCLKIP
INTERFACE
APPLE PI
API_APCLK_AVSS
(SYM 1 OF 7)
API0_ADO35 API0_ADO36 API0_ADO37 API0_ADO38 API0_ADO39 API0_ADO40 API0_ADO41
API0_ADO43
API0_ADO42
API0_SROP0
API0_SRON1
API_QREQ0
API_CSTP
API0_ADO34
API0_ADO0 API0_ADO1 API0_ADO2 API0_ADO3 API0_ADO4 API0_ADO5
API0_ADO8
API0_ADO7
API0_ADO6
API0_ADO10
API0_ADO9
API0_ADO12
API0_ADO11
API0_ADO13
API0_BCLKON
API0_BCLKOP
API0_ADO14 API0_ADO15
API0_ADO18
API0_ADO17
API0_ADO16
API0_ADO19 API0_ADO20 API0_ADO21 API0_ADO22 API0_ADO23 API0_ADO24 API0_ADO25 API0_ADO26
API0_ADO28
API0_ADO27
API0_ADO29 API0_ADO30 API0_ADO31
API0_ADO33
API0_ADO32
VDD_API
APCLK_AVDD
API
API0_ADI3
API0_ADI2
API0_ADI1
API0_ADI0
API0_ADI5
API0_ADI4
API0_ADI13
API0_ADI12
API0_ADI11
API0_ADI10
API0_ADI9
API0_ADI8
API0_ADI7
API0_ADI6
API0_ADI15
API0_ADI14
API0_ADI17 API0_ADI18 API0_ADI19 API0_ADI20 API0_ADI21 API0_ADI22 API0_ADI23
API0_ADI16
API0_ADI24
API0_ADI33
API0_ADI32
API0_ADI31
API0_ADI25 API0_ADI26
API0_ADI30
API0_ADI29
API0_ADI28
API0_ADI27
API0_ADI34
API0_SE
API0_APSYNC
API0_ADI42 API0_ADI43
API0_ADI37 API0_ADI38 API0_ADI39 API0_ADI40 API0_ADI41
API0_SRIP0
API0_SRIN1
API_QACK0
API0_ADI36
API0_ADI35
VCC
GND
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_HEAD
TABLE_ALT_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
MASTER: SEEDY
LAST MODIFIED: NOV 4, 04
PLACE QREQ CIRCUITS BETWEEN CPU AND U3LITE
POST-RAMP QUAL
U3LITE APPLE PI
TI
QREQ_L HACK
EI_NB_CLK_N
EI_NB_CLK_P
NEAR U3LITE
PLACE R2805 AND R2806
QREQ TO SMU
DIFFERENTIAL_PAIR
NET_SPACING_TYPE
NET_PHYSICAL_TYPE
ELECTRICAL_CONSTRAINT_SET
HOLE-VIA-20R10
OMIT
1
ZT2800
HOLE-VIA-20R10
OMIT
1
ZT2801
HOLE-VIA-20R10
OMIT
1
ZT2802
HOLE-VIA-20R10
OMIT
1
ZT2803
HOLE-VIA-20R10
OMIT
1
ZT2804
402
0.1UF
20% 10V CERM
2
1
C2813
HOLE-VIA-20R10
OMIT
1
ZT2805
HOLE-VIA-20R10
OMIT
1
ZT2806
HOLE-VIA-20R10
OMIT
1
ZT2807
HOLE-VIA-20R10
OMIT
1
ZT2808
OMIT
HOLE-VIA-20R10
1
ZT2809
CERM
10V
20%
0.1UF
402
2
1
C2812
HOLE-VIA-20R10
OMIT
1
ZT2810
HOLE-VIA-20R10
OMIT
1
ZT2811
HOLE-VIA-20R10
OMIT
1
ZT2812
HOLE-VIA-20R10
OMIT
1
ZT2813
HOLE-VIA-20R10
OMIT
1
ZT2814
402
0.1UF
20% 10V CERM
2
1
C2811
HOLE-VIA-20R10
OMIT
1
ZT2815
HOLE-VIA-20R10
OMIT
1
ZT2816
HOLE-VIA-20R10
OMIT
1
ZT2817
HOLE-VIA-20R10
OMIT
1
ZT2818
HOLE-VIA-20R10
OMIT
1
ZT2819
CERM
10V
20%
0.1UF
402
2
1
C2810
HOLE-VIA-20R10
OMIT
1
ZT2820
HOLE-VIA-20R10
OMIT
1
ZT2821
HOLE-VIA-20R10
OMIT
1
ZT2822
HOLE-VIA-20R10
OMIT
1
ZT2823
HOLE-VIA-20R10
OMIT
1
ZT2824
402
0.1UF
20% 10V CERM
2
1
C2809
HOLE-VIA-20R10
OMIT
1
ZT2825
HOLE-VIA-20R10
OMIT
1
ZT2826
HOLE-VIA-20R10
OMIT
1
ZT2827
HOLE-VIA-20R10
OMIT
1
ZT2828
OMIT
HOLE-VIA-20R10
1
ZT2829
CERM
10V
20%
0.1UF
402
2
1
C2808
HOLE-VIA-20R10
OMIT
1
ZT2830
HOLE-VIA-20R10
OMIT
1
ZT2831
HOLE-VIA-20R10
OMIT
1
ZT2832
HOLE-VIA-20R10
OMIT
1
ZT2833
HOLE-VIA-20R10
OMIT
1
ZT2834
402
0.1UF
20% 10V CERM
2
1
C2807
HOLE-VIA-20R10
OMIT
1
ZT2835
HOLE-VIA-20R10
OMIT
1
ZT2836
HOLE-VIA-20R10
OMIT
1
ZT2837
HOLE-VIA-20R10
OMIT
1
ZT2838
HOLE-VIA-20R10
OMIT
1
ZT2839
CERM
10V
20%
0.1UF
402
2
1
C2806
HOLE-VIA-20R10
OMIT
1
ZT2840
HOLE-VIA-20R10
OMIT
1
ZT2841
HOLE-VIA-20R10
OMIT
1
ZT2842
HOLE-VIA-20R10
OMIT
1
ZT2843
HOLE-VIA-20R10
OMIT
1
ZT2844
402
0.1UF
20% 10V CERM
2
1
C2805
HOLE-VIA-20R10
OMIT
1
ZT2845
0
402
21
R2805
NOSTUFF
402
0
21
R2806
CERM
10V
20%
0.1UF
402
2
1
C2804
U3LITE
PBGA
OMIT
V1.0-300MM
D13
D4
F10
F7G2H16
H13
J13
B19
B10
B7
D16
K8
K4
E14D14
F14
G20
F21
D18 C18
B5
A3
B6
A4
E17
D17
B18
A19
H17
D6 E6
F15 E15
E8
H2
G1
H4
J4
F2
B8
A7
B3
A2
E1
C8
A6
C1
B1
D1
B2
C6
C5
C3
C2
K1
A5
D8
E4
D5
E5
F6
J8
F3
J7
H6
J1
F5
E2
F4
E3
J6
J5
J3
H3
H5
F1
H1
J2
C9
D9
G14
H14
H12
C17
B17
A18
A17
G12
E18
F18
H18
G18
G17
F17
G15
H15
C15
B15
H11
A15
A16
C14
B14
A14
A13
E12
D12
C12
B12
G11
A12
A11
B11
C11
B9
A8
A9
A10
E11
D11
F12
F11
U3
NOSTUFF
121
1%
402
2
1
R2803
1%
121
NOSTUFF
402
2
1
R2804
402
0.001UF
50V CERM
NOSTUFF
10%
2
1
C2821
402
20% 10V CERM
0.1UF
2
1
C2803
I212 I213
I214
I215
I216
I217
I218
I219
CERM
10V
20%
0.1UF
402
2
1
C2802
I220
I221
I222
I223 I224
I225
NOSTUFF
10K
5% 1/16W MF-LF 402
2
1
R2898
NOSTUFF
2N3904LF
2
3
1
Q2899
NOSTUFF
180
5% 1/16W MF-LF
402
21
R2899
402
0.1UF
20% 10V CERM
2
1
C2801
402
0.1UF
20% 10V
CERM
2
1
C2850
5%
0
NOSTUFF
402
21
R2850
402
10K
5%
2
1
R2851
CRITICAL
SOT23-5
74LVC1G66DBVG4
2
1
5
3
4
U2850
10V
20%
402
CERM
0.1UF
2
1
C2800
CERM
10V
20%
0.1UF
402
2
1
C2814
402
0.1UF
20% 10V CERM
2
1
C2815
402
0.1UF
20% 10V CERM
2
1
C2816
402
0.1UF
20% 10V CERM
2
1
C2817
100
1% 1/16W MF-LF 402
NOSTUFF
2
1
R2801
NOSTUFF
0.1UF
20% CERM
10V 402
2
1
C2820
NOSTUFF
100
1% 1/16W MF-LF 402
2
1
R2802
0.1UF
20% CERM
402
10V
2
1
C2819
CERM
6.3V
10%
1UF
402
2
1
C2818
2.2
5%
603
21
R2800
OMIT
HOLE-VIA-20R10
1
ZT2846
OMIT
HOLE-VIA-20R10
1
ZT2847
OMIT
HOLE-VIA-20R10
1
ZT2848
OMIT
HOLE-VIA-20R10
1
ZT2849
OMIT
HOLE-VIA-20R10
1
ZT2850
OMIT
HOLE-VIA-20R10
1
ZT2851
OMIT
HOLE-VIA-20R10
1
ZT2852
OMIT
HOLE-VIA-20R10
1
ZT2853
OMIT
HOLE-VIA-20R10
1
ZT2854
HOLE-VIA-20R10
OMIT
1
ZT2855
HOLE-VIA-20R10
OMIT
1
ZT2856
HOLE-VIA-20R10
OMIT
1
ZT2857
HOLE-VIA-20R10
OMIT
1
ZT2858
HOLE-VIA-20R10
OMIT
1
ZT2859
HOLE-VIA-20R10
OMIT
1
ZT2860
HOLE-VIA-20R10
OMIT
1
ZT2861
HOLE-VIA-20R10
OMIT
1
ZT2862
HOLE-VIA-20R10
OMIT
1
ZT2863
HOLE-VIA-20R10
OMIT
1
ZT2864
HOLE-VIA-20R10
OMIT
1
ZT2865
OMIT
HOLE-VIA-20R10
1
ZT2866
HOLE-VIA-20R10
OMIT
1
ZT2867
HOLE-VIA-20R10
OMIT
1
ZT2868
HOLE-VIA-20R10
OMIT
1
ZT2869
353S0867353S0920
CRITICAL
PERICOM ANALOG SWITCH
102
28
04
051-6772
EI_NB_TO_CPU_CLKEI_NB_TO_CPU_CLK EI_NB_TO_CPU_CLK
EI_NB_TO_CPU_CLK_P
EI_CLK
EI_NB_TO_CPU_CLK
EI_NB_TO_CPU_CLK_N
EI_NB_TO_CPU_CLKEI_NB_TO_CPU_CLK
EI_CLK
EI_CPU_TO_NB_CLK_N
EI_CPU_TO_NB_CLKEI_CPU_TO_NB_CLKEI_CPU_TO_NB_CLK
EI_CLK
EI_CPU_TO_NB_CLK_P
EI_CPU_TO_NB_CLKEI_CPU_TO_NB_CLKEI_CPU_TO_NB_CLK
EI_CLK
EI_NB_TO_CPU_SR_N<1>
EI_NB_TO_CPU_SR1EI_NB_TO_CPU_CLKEI_NB_TO_CPU_CAD
EI_CAD
EI_NB_TO_CPU_SR_P<1>
EI_NB_TO_CPU_SR1EI_NB_TO_CPU_CLKEI_NB_TO_CPU_CAD
EI_CAD
EI_NB_TO_CPU_CLK
EI_NB_TO_CPU_SR_N<0>
EI_NB_TO_CPU_SR0EI_NB_TO_CPU_CAD
EI_CAD
EI_NB_TO_CPU_SR_P<0>
EI_NB_TO_CPU_SR0EI_NB_TO_CPU_CLKEI_NB_TO_CPU_CAD
EI_CAD
EI_CPU_TO_NB_SR_N<1>
EI_CPU_TO_NB_SR1EI_CPU_TO_NB_CLKEI_CPU_TO_NB_CAD
EI_CAD
EI_CPU_TO_NB_SR_P<1>
EI_CPU_TO_NB_SR1EI_CPU_TO_NB_CLKEI_CPU_TO_NB_CAD
EI_CAD
EI_CPU_TO_NB_SR_N<0>
EI_CPU_TO_NB_SR0EI_CPU_TO_NB_CLKEI_CPU_TO_NB_CAD
EI_CAD
EI_CPU_TO_NB_SR_P<0>
EI_CPU_TO_NB_SR0EI_CPU_TO_NB_CLKEI_CPU_TO_NB_CAD
EI_CAD
EI_NB_TO_CPU_CAD
EI_NB_TO_CPU_AD<0..43>
EI_NB_TO_CPU_AD
EI_CAD
EI_CPU_TO_NB_AD<0..43>
EI_CPU_TO_NB_AD
EI_CPU_TO_NB_CAD
EI_CAD
=PP1V2_EI_NB
EI_QACK_L
EI_NB_TO_CPU_AD<36>
EI_NB_TO_CPU_AD<6>
EI_NB_TO_CPU_AD<24>
EI_NB_TO_CPU_AD<5>
EI_CPU_TO_NB_AD<36>
EI_NB_QREQ_L_R
EI_CPU_TO_NB_AD<7>
EI_CPU_TO_NB_AD<25>
EI_SE
EI_NB_TO_CPU_AD<3>
EI_NB_TO_CPU_AD<7>
EI_CPU_TO_NB_SR_N<0>
EI_SYNC_FROM_NB
EI_NB_SYNC
EI_NB_TO_CPU_SR_P<1>
EI_NB_TO_CPU_SR_N<0>
EI_CPU_TO_NB_SR_P<1>
EI_NB_TO_CPU_CLK_N
CPU_CHKSTOP_L
EI_CPU_TO_NB_SR_N<1>
EI_CPU_TO_NB_SR_P<0>
EI_CPU_TO_NB_AD<41>
EI_CPU_TO_NB_AD<43>
EI_CPU_TO_NB_AD<42>
EI_CPU_TO_NB_AD<40>
EI_CPU_TO_NB_AD<39>
EI_CPU_TO_NB_AD<38>
EI_CPU_TO_NB_AD<37>
EI_CPU_TO_NB_AD<35>
EI_CPU_TO_NB_AD<34>
EI_CPU_TO_NB_AD<33>
EI_CPU_TO_NB_AD<32>
EI_CPU_TO_NB_AD<29> EI_CPU_TO_NB_AD<30> EI_CPU_TO_NB_AD<31>
EI_CPU_TO_NB_AD<28>
EI_CPU_TO_NB_AD<27>
EI_CPU_TO_NB_AD<26>
EI_CPU_TO_NB_AD<23>
EI_CPU_TO_NB_AD<22>
EI_CPU_TO_NB_AD<19>
EI_CPU_TO_NB_AD<21>
EI_CPU_TO_NB_AD<20>
EI_CPU_TO_NB_AD<18>
EI_CPU_TO_NB_AD<17>
EI_CPU_TO_NB_AD<16>
EI_CPU_TO_NB_AD<15>
EI_CPU_TO_NB_AD<14>
EI_CPU_TO_NB_AD<12>
EI_CPU_TO_NB_AD<11>
EI_CPU_TO_NB_AD<13>
EI_CPU_TO_NB_AD<9> EI_CPU_TO_NB_AD<10>
EI_CPU_TO_NB_AD<8>
EI_CPU_TO_NB_AD<6>
EI_CPU_TO_NB_AD<4> EI_CPU_TO_NB_AD<5>
EI_CPU_TO_NB_AD<1> EI_CPU_TO_NB_AD<2>
EI_CPU_TO_NB_AD<0>
EI_CPU_TO_NB_CLK_N
EI_CPU_TO_NB_CLK_P
EI_NB_TO_CPU_SR_N<1>
EI_NB_TO_CPU_AD<43>
EI_NB_TO_CPU_AD<42>
EI_NB_TO_CPU_AD<41>
EI_NB_TO_CPU_AD<40>
EI_NB_TO_CPU_AD<39>
EI_NB_TO_CPU_AD<37> EI_NB_TO_CPU_AD<38>
EI_NB_TO_CPU_AD<34> EI_NB_TO_CPU_AD<35>
EI_NB_TO_CPU_AD<31>
EI_NB_TO_CPU_AD<33>
EI_NB_TO_CPU_AD<32>
EI_NB_TO_CPU_AD<30>
EI_NB_TO_CPU_AD<29>
EI_NB_TO_CPU_AD<26> EI_NB_TO_CPU_AD<27> EI_NB_TO_CPU_AD<28>
EI_NB_TO_CPU_AD<25>
EI_NB_TO_CPU_AD<23>
EI_NB_TO_CPU_AD<21> EI_NB_TO_CPU_AD<22>
EI_NB_TO_CPU_AD<19> EI_NB_TO_CPU_AD<20>
EI_NB_TO_CPU_AD<18>
EI_NB_TO_CPU_AD<16> EI_NB_TO_CPU_AD<17>
EI_NB_TO_CPU_AD<13>
EI_NB_TO_CPU_AD<15>
EI_NB_TO_CPU_AD<14>
EI_NB_TO_CPU_AD<12>
EI_NB_TO_CPU_AD<11>
EI_NB_TO_CPU_AD<10>
EI_NB_TO_CPU_AD<9>
EI_NB_TO_CPU_AD<8>
EI_NB_TO_CPU_AD<4>
EI_NB_TO_CPU_AD<1> EI_NB_TO_CPU_AD<2>
EI_NB_TO_CPU_AD<0>
PP1V5_PWRON_EI_NB_AVDD
VOLTAGE=1.5V
MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
=PP1V2_EI_NB
MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
VOLTAGE=0.6V
EI_APCLK_VREF
EI_NB_CLK_P EI_NB_CLK_N
=PP1V2_EI_NB
=PP1V5_PWRON_NB_AVDD
EI_NB_TO_CPU_SR_P<0>
=PP3V3_PWRON_EI
SMU_QREQ
NB_APSYNC
=PP3V3_PWRON_EI
SMU_SUSPENDREQ_L
EI_NB_QREQ_L
EI_QREQ_L
EI_CPU_TO_NB_AD<24>
EI_NB_TO_CPU_CLK_P
EI_CPU_TO_NB_AD<3>
29
29
29
29
29
29
29
29
29
29
29
29
29
29
28
29
29
29
29
29
29
29
30
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
28
28
60
29
30
29
29
29
28
28
28
28
28
28
28
28
28
28
28
28
28
28
18
29
28
28
28
28
28
28
28
29
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
18
18
48
28
25
29
28
28
28
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
37
14
28
28
24
14
14
14
14
6
6
6
6
6
6
6
6
6
6
6
6
6
6
7
6
6
6
6
6
6
6
6
6
6
6
6
29
27
6
6
6
6
29
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
7
27
27
7
7
6
7
13
7
13
6
6
6
6
Preliminary
Page 26
(1 OF 3)
PLLTESTOUT
PLLRANGE1
SPARE
PLLTEST
PLLRANGE0
JTAGMODE
GPUL_DBG
EI_DISABLE
ATTENTION
TMS
TRST*
TCK
TDO
TDI
PLLMULT
BYPASS* PLLLOCK
BUSCFG0 BUSCFG1 BUSCFG2
EI_SRO1*
EI_SRO0*
CKTERMDIS
APSYNCIN
IIC_SDA
IIC_SCL
I2CGO
INT*
EI_SRO1
EI_SRO0
QREQ*
EI_ADO33 EI_ADO34
EI_ADO39 EI_ADO40 EI_ADO41 EI_ADO42
EI_ADO35 EI_ADO36 EI_ADO37 EI_ADO38
EI_ADO43
EI_ADO32
EI_ADO26 EI_ADO27
EI_ADO31
EI_ADO30
EI_ADO29
EI_ADO28
EI_ADO25
SYSCLK
EI_ADO24
EI_ADO22 EI_ADO23
EI_ADO21
EI_ADO20
EI_ADO19
EI_ADO18
EI_ADO16 EI_ADO17
EI_ADO15
EI_ADO14
EI_ADO13
EI_ADO12
EI_ADO10 EI_ADO11
EI_ADO9
EI_ADO8
EI_ADO7
EI_ADO4
EI_ADO6
EI_ADO5
EI_CLKO*
EI_ADO3
EI_ADO2
EI_ADO1
EI_ADO0
EI_CLKO
PSRO1 PSRO2
RI* SYNCENABLE*
RAMSTOPENABLE
PULSESEL2
PULSESEL1
PULSESEL0
MCP*
DI2*
AFN
BIMODE*
LSSDSTOPENABLE
LSSDSTOPC2STARENABLE
LSSDSTOPC2ENABLE
LSSDSCANENABLE
LSSDMODE
C2UNDGLOBAL
C1UNDGLOBAL
AVPRESET*
PROCID1 PROCID2
TRIGGER_IN TRIGGER_OUT
PROCID0
TBEN
QACK*
SRESET*
HRESET*
THERM_INT*
APSYNCOUT
EI_SRI0
EI_SRI1
CHKSTOP*
EI_SRI1*
EI_SRI0*
EI_ADI43
EI_ADI33
EI_ADI36 EI_ADI37
EI_ADI34
EI_ADI40 EI_ADI41
EI_ADI39
EI_ADI35
EI_ADI38
EI_ADI42
EI_ADI32
EI_ADI27
EI_ADI26
EI_ADI25
EI_ADI30 EI_ADI31
EI_ADI29
EI_ADI28
EI_ADI24
EI_ADI23
EI_ADI22
EI_ADI13 EI_ADI14 EI_ADI15
EI_ADI17
EI_ADI16
EI_ADI19 EI_ADI20
EI_ADI18
EI_ADI21
EI_ADI12
EI_ADI5 EI_ADI6 EI_ADI7
EI_ADI9
EI_ADI4
EI_ADI8
EI_ADI10 EI_ADI11
EI_ADI3
EI_ADI2
EI_ADI0
EI_CLKI
EI_ADI1
EI_CLKI*
SYSCLK*
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
MASTER: GILA
PLACE NEAR PROCESSOR.
MATCH TO SYSCLK
NEO APPLE PI
PLACE BY PROCESSOR PIN.
PROCESSOR LOGIC I/O
MORE PROCESSOR DECOUPLING
ON PAGES 31 & 32
PROCESSOR IIC ADDRESS:
PLACE AT PROCESSOR PINS.
LAST MODIFIED: APR 09, 04
1UF
10%
6.3V CERM 402
2
1
C2900
402
CERM
6.3V
10%
1UF
2
1
C2902
402
CERM
6.3V
10%
1UF
2
1
C2903
402
CERM
6.3V
10%
1UF
2
1
C2904
402
CERM
6.3V
10%
1UF
2
1
C2905
6.3V 402
CERM
10%
1UF
2
1
C2906
402
CERM
6.3V
10%
1UF
2
1
C2907
10% CERM
402
6.3V
1UF
2
1
C2908
CERM
6.3V
10%
1UF
402
2
1
C2909
402
6.3V
10%
1UF
CERM
2
1
C2910
402
CERM
6.3V
10%
1UF
2
1
C2911
402
1%
100
NOSTUFF
2
1
R2909
20%
0.22UF
NOSTUFF
X5R
6.3V 402
2
1
C2901
402
100
1% 1/16W MF-LF
NOSTUFF
2
1
R2907
402
MF-LF
0
1/16W
5%
21
R2910
NEO-10S-REV2
CRITICAL
OMIT
CBGA
1.8GHZ-76C
W20
N19
N21
AD22
V22
AD13
AB21
AD21
AD17
T22
R22
AB24
AB4
AA13
AA5
AB6
AB12
V21
AC10
AB11
AC9
V5
V23
M18
M19
L19
T19
W22
AA9
AB7
AA8
T20
AD18
AD11
AD7
AD8
U19
AB5
W4
AB19
Y21
AA20
N22
V20
AA22
F1
G1
L2
L3
L22
L21
K24
L24
P20
E3
D3
D24
E24
G4
H1
H3
K2
K4
A6
A8
C10
A10
M3
C9
A9
A4
C6
C8
A7
C7
C4
B4
B6
L1
A12
C12
D8
D2
A2
A5
D6
B2
C5
C1
K3
C11
B10
A11
E12
D11
B8
G3
E2
F4
F2
H2
N3
G20
J24
H23
K22
A13
A19
C16
A17
A15
C13
A18
A20
A23
A21
C18
C19
A22
D20
B21
D18
J22
C17
C14
B19
B17
F21
B24
B23
E21
E20
C22
H22
A16
D15
C15
A14
B15
G19
G24
D22
G21
F23
J21
H21
U24
AA14
R20
AC15
AC16
V24
AB16
AC19
AA19
AC24
W23
AD12
AD14 AA10
AA12
U2900
NOSTUFF
46.4
1%
402
21
R2901
46.4
NOSTUFF
402
1%
21
R2903
NOSTUFF
49.9
1%
402
21
R2905
5%
0
1/16W
402
MF-LF
21
R2902
NOSTUFF
1/16W
5%
402
MF-LF
0
21
R2904
402
1K
MF-LF
5%
2
1
R2906
402
1/16W
5%
1K
MF-LF
2
1
R2908
402
MF-LF
0
NOSTUFF
1/16W
5%
21
R2911
402
CERM
1UF
10%
6.3V
2
1
C2912
1UF
10%
6.3V CERM 402
2
1
C2913
1UF
10%
6.3V CERM 402
2
1
C2914
1UF
10%
6.3V CERM 402
2
1
C2915
1UF
10%
6.3V CERM 402
2
1
C2916
1UF
10%
6.3V CERM 402
2
1
C2917
1UF
10%
6.3V CERM 402
2
1
C2918
1UF
10%
6.3V CERM 402
2
1
C2919
1UF
10%
6.3V CERM 402
2
1
C2920
1UF
10%
6.3V CERM 402
2
1
C2921
1UF
10%
6.3V CERM 402
2
1
C2922
1UF
10%
6.3V CERM 402
2
1
C2923
1UF
10%
6.3V CERM 402
2
1
C2924
1UF
10%
6.3V CERM 402
2
1
C2925
1UF
10%
6.3V CERM 402
2
1
C2926
1UF
10%
6.3V CERM 402
2
1
C2927
1UF
10%
6.3V CERM 402
2
1
C2928
1UF
10%
6.3V CERM 402
2
1
C2929
1UF
10%
6.3V CERM 402
2
1
C2930
1UF
10%
6.3V CERM 402
2
1
C2931
1UF
10%
6.3V CERM 402
2
1
C2932
1UF
10%
6.3V CERM 402
2
1
C2933
1UF
10%
6.3V CERM 402
2
1
C2934
1UF
10%
6.3V CERM 402
2
1
C2935
1UF
10%
6.3V CERM 402
2
1
C2936
1UF
10%
6.3V CERM 402
2
1
C2937
1UF
10%
6.3V CERM 402
2
1
C2938
1UF
10%
6.3V CERM 402
2
1
C2939
1UF
10%
6.3V CERM 402
2
1
C2940
1UF
10%
6.3V CERM 402
2
1
C2941
1UF
10%
6.3V CERM 402
2
1
C2942
1UF
10%
6.3V CERM 402
2
1
C2943
1UF
10%
6.3V CERM 402
2
1
C2944
1UF
10%
6.3V CERM 402
2
1
C2945
1UF
10%
6.3V CERM 402
2
1
C2946
1UF
10%
6.3V CERM 402
2
1
C2947
1UF
10%
6.3V CERM 402
2
1
C2948
1UF
10%
6.3V CERM 402
2
1
C2949
10%
1UF
6.3V CERM 402
2
1
C2950
1UF
10%
6.3V CERM 402
2
1
C2951
CERM
6.3V
10%
1UF
402
2
1
C2952
1UF
10%
6.3V CERM 402
2
1
C2953
1UF
10%
6.3V CERM 402
2
1
C2954
1UF
10%
6.3V CERM 402
2
1
C2955
1UF
10%
6.3V CERM 402
2
1
C2956
1UF
10%
6.3V CERM 402
2
1
C2957
1UF
6.3V 402
CERM
10%
2
1
C2958
402
1UF
10%
6.3V CERM
2
1
C2959
CERM
1UF
10%
6.3V 402
2
1
C2960
04
051-6772
29
102
VOLTAGE=0.6V
SYSCLK_TERM
MCP_L
CHKSTOP_L
CPU_CHKSTOP_L
=PP1V2_EI_CPU
CPU_HTBEN
=PP1V2_EI_CPU
EI_SYNC_FROM_NB
EI_CPU_SYNC
CPU_SPARE
PLLRANGE0 PLLRANGE1 PLLTEST PLLTESTOUT
JTAG_CPU_TRST_L
PLLMULT
PLLLOCK
CPU_BYPASS_L
JTAG_CPU_TDI JTAG_CPU_TMS
JTAG_CPU_TDO
JTAG_CPU_TCK
GPUL_DBG
JTAGMODE_SPARE2
TP_ATTENTION
BUSCFG2
BUSCFG0 BUSCFG1
EI_DISABLE
I2CGO CKTERMDIS_L
I2C_CPU_A_SDA
I2C_CPU_A_SCL
CPU_APSYNC
EI_QREQ_L CPU_INT_L
EI_CPU_TO_NB_SR_N<1>
EI_CPU_TO_NB_SR_P<1>
EI_CPU_TO_NB_SR_N<0>
EI_CPU_TO_NB_SR_P<0>
EI_CPU_TO_NB_AD<41>
EI_CPU_TO_NB_AD<40>
EI_CPU_TO_NB_AD<43>
EI_CPU_TO_NB_AD<42>
EI_CPU_TO_NB_AD<39>
EI_CPU_TO_NB_AD<34> EI_CPU_TO_NB_AD<35>
EI_CPU_TO_NB_AD<38>
EI_CPU_TO_NB_AD<37>
EI_CPU_TO_NB_AD<36>
EI_CPU_TO_NB_AD<30> EI_CPU_TO_NB_AD<32>
EI_CPU_TO_NB_AD<33>
EI_CPU_TO_NB_AD<31>
EI_CPU_TO_NB_AD<29>
EI_CPU_TO_NB_AD<25> EI_CPU_TO_NB_AD<27>
EI_CPU_TO_NB_AD<28>
EI_CPU_TO_NB_AD<26>
EI_CPU_CLK_P
EI_CPU_TO_NB_AD<24>
EI_CPU_TO_NB_AD<21> EI_CPU_TO_NB_AD<23>
EI_CPU_TO_NB_AD<22>
EI_CPU_TO_NB_AD<20>
EI_CPU_TO_NB_AD<19>
EI_CPU_TO_NB_AD<14>
EI_CPU_TO_NB_AD<18>
EI_CPU_TO_NB_AD<17>
EI_CPU_TO_NB_AD<16>
EI_CPU_TO_NB_AD<15>
EI_CPU_TO_NB_AD<10> EI_CPU_TO_NB_AD<11> EI_CPU_TO_NB_AD<12> EI_CPU_TO_NB_AD<13>
EI_CPU_TO_NB_AD<9>
EI_CPU_TO_NB_AD<8>
EI_CPU_TO_NB_AD<5> EI_CPU_TO_NB_AD<7>
EI_CPU_TO_NB_AD<4> EI_CPU_TO_NB_AD<6>
EI_CPU_TO_NB_AD<3>
EI_CPU_TO_NB_AD<1>
EI_CPU_TO_NB_CLK_N
EI_CPU_TO_NB_CLK_P
RI_L
RAMSTOPENABLE SYNCENABLE
PULSESEL2
PULSESEL0
TP_PSRO2
TP_PSRO1
PULSESEL1
LSSDSTOPC2STARENABLE
LSSDSTOPC2ENABLE
MCP_L
LSSDSTOPENABLE
LSSDSCANENABLE
C1UNDGLOBAL DI2_L
C2UNDGLOBAL
LSSDMODE
BIMODE_L
AVPRESET_L
TP_AFN
TP_PROC_TRIGGER_OUT
EI_SE
PROCID1
PROCID0 PROCID2
CPU_SRESET_L PROC_THERM_INT_L
TP_PSYNCOUT
CPU_HTBEN
CHKSTOP_L
EI_QACK_L
EI_NB_TO_CPU_SR_P<0> EI_NB_TO_CPU_SR_P<1>
EI_NB_TO_CPU_AD<43>
EI_NB_TO_CPU_AD<42>
EI_NB_TO_CPU_AD<41>
EI_NB_TO_CPU_AD<40>
EI_NB_TO_CPU_AD<39>
EI_NB_TO_CPU_AD<34> EI_NB_TO_CPU_AD<35> EI_NB_TO_CPU_AD<36> EI_NB_TO_CPU_AD<37> EI_NB_TO_CPU_AD<38>
EI_NB_TO_CPU_AD<32> EI_NB_TO_CPU_AD<33>
EI_NB_TO_CPU_AD<31>
EI_NB_TO_CPU_AD<30>
EI_NB_TO_CPU_AD<29>
EI_NB_TO_CPU_AD<24> EI_NB_TO_CPU_AD<25> EI_NB_TO_CPU_AD<26>
EI_NB_TO_CPU_AD<28>
EI_NB_TO_CPU_AD<27>
EI_NB_TO_CPU_AD<22> EI_NB_TO_CPU_AD<23>
EI_NB_TO_CPU_AD<21>
EI_NB_TO_CPU_AD<20>
EI_NB_TO_CPU_AD<19>
EI_NB_TO_CPU_AD<14> EI_NB_TO_CPU_AD<16>
EI_NB_TO_CPU_AD<17> EI_NB_TO_CPU_AD<18>
EI_NB_TO_CPU_AD<13>
EI_NB_TO_CPU_AD<12>
EI_NB_TO_CPU_AD<11>
EI_NB_TO_CPU_AD<10>
EI_NB_TO_CPU_AD<9>
EI_NB_TO_CPU_AD<8>
EI_NB_TO_CPU_AD<4> EI_NB_TO_CPU_AD<5> EI_NB_TO_CPU_AD<6> EI_NB_TO_CPU_AD<7>
EI_NB_TO_CPU_AD<1> EI_NB_TO_CPU_AD<2>
EI_NB_TO_CPU_AD<0>
EI_NB_TO_CPU_CLK_N
EI_NB_TO_CPU_CLK_P
EI_CPU_CLK_N
CPU_HRESET_L
EI_NB_TO_CPU_AD<3>
EI_CPU_TO_NB_AD<2>
EI_CPU_TO_NB_AD<0>
EI_NB_TO_CPU_AD<15>
EI_NB_TO_CPU_SR_N<0> EI_NB_TO_CPU_SR_N<1>
=PPVCORE_CPU
35
35
31
31
30
30
29
29
29
30
30
30
29
36
29
14
18
30
18
28
25
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27
6
6
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6
6
6
6
7
Preliminary
Page 27
G
D
S
G
D
S
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
TABLE_5_ITEM
TABLE_5_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
<= 1.6 GHZ *
>= 1.8 GHZ *
SELECT ELASTIC MODE OR BYPASS.
LAST MODIFIED: APR 27, 04
CPU STRAPS
SYSTEM CONFIGURATION
SYSCLK * 8
SYSCLK * 12
PROC / 3
PROC / 8
PROC / 16
SELECT PROCESSOR CLOCK MULTIPLIER. PROCESSOR CLOCK(MHZ)= SYSTCLOCK * PLLMULT.
AVPRESET ON
* STUFF THESE ON Q45.
*
BYPASS MODE
PROC / 4
PROC / 6
PROC / 12
PROC / 2
RESERVED
AVPRESET OFF
SELECT EI BUS DIVIDER. BUS DATA RATE(BPS)= (PROCESSOR CLOCK) / BUSCFG.
*
*
SELECT PLL FREQUENCY RANGE.
MASTER: GILA
5%
0
402
21
R3001
402
5%
1K
21
R3003
1K
5%
402
21
R3005
1K
5% 1/16W MF-LF
402
21
R3007
1K
5% 1/16W MF-LF
402
2 1
R3009
402
5%
1K
21
R3002
402
5%
1K
21
R3004
1K
5% 1/16W MF-LF
402
21
R3006
1K
5% 1/16W MF-LF 402
OMIT
2
1
R3008
1K
5% 1/16W MF-LF 402
OMIT
2
1
R3024
1K
5% 1/16W MF-LF 402
OMIT
2
1
R3026
1K
5% 1/16W MF-LF 402
OMIT
2
1
R3028
402
1K
5% 1/16W MF-LF
OMIT
2
1
R3030
402
MF-LF
1/16W
5%
1K
OMIT
2
1
R3032
1K
5% 1/16W MF-LF
OMIT
402
2
1
R3034
402
MF-LF
1/16W
5%
1K
OMIT
2
1
R3012
402
MF-LF
1/16W
5%
1K
OMIT
2
1
R3018
1K
5% 1/16W MF-LF 402
OMIT
2
1
R3016
1/16W 402
MF-LF
5%
1K
OMIT
2
1
R3014
402
MF-LF
1/16W
5%
1K
OMIT
2
1
R3010
1K
5% 1/16W MF-LF 402
OMIT
2
1
R3020
MF-LF
1/16W
5%
1K
402
OMIT
2
1
R3022
5%
1K
402
21
R3040
NOSTUFF
402
1K
5%
21
R3042
MF-LF
1/16W
5%
1K
402
OMIT
2
1
R3036
1K
5% 1/16W MF-LF 402
OMIT
2
1
R3038
402
5%
10K
2
1
R3068
2N7002DW
SOT-363
1
2
6
Q3000
1K
5%
2
1
R3083
SOT-363
2N7002DW
4
5
3
Q3000
5%
1K
402
2
1
R3059
5%
1K
402
NOSTUFF
2
1
R3057
402
5%
1K
21
R3031
1K
5% 1/16W MF-LF
402
21
R3033
1K
5% 1/16W MF-LF
402
21
R3035
1K
5% 1/16W MF-LF
402
21
R3037
402
5%
0
21
R3039
1K
5% 1/16W MF-LF
402
21
R3041
402
5%
1K
21
R3043
1K
5% 1/16W MF-LF
402
21
R3045
402
5%
1K
21
R3047
1K
5% MF-LF
402
21
R3049
1K
5%
402
21
R3051
10K
5% 1/16W MF-LF
402
21
R3053
5% 1/16W MF-LF
402
1K
21
R3055
5%
1K
402
21
R3061
NOSTUFF
5%
1K
402
21
R3063
1K
5% 1/16W MF-LF
402
21
R3065
402
5%
1K
NOSTUFF
21
R3067
402
5%
1K
21
R3069
402
1K
5%
NOSTUFF
21
R3071
5%
1K
402
21
R3073
NOSTUFF
5%
1K
402
21
R3075
402
NOSTUFF
5%
1K
21
R3077
NOSTUFF
402
5%
1K
21
R3079
5% 1/16W MF-LF
402
1K
21
R3081
5%
1K
402
21
R3085
5%
1K
402
21
R3087
1K
5% 1/16W MF-LF
402
21
R3089
402
1K
5% 1/16W MF-LF
21
R3091
5%
1K
402
21
R3093
5% 1/16W MF-LF
402
10K
21
R3095
10K
5%
402
21
R3097
10K
5% 1/16W MF-LF
402
21
R3099
NOSTUFF
402
5%
0
21
R3000
NOSTUFF
114S1103
RES,1K OHM,1/16W,5%,0402
1
NOSTUFF
3
R3008,R3026,R3028
RES,1K OHM,1/16W,5%,0402
114S1103
NOSTUFF
3
114S1103
R3008,R3010,R3028
RES,1K OHM,1/16W,5%,0402
NOSTUFF
1
RES,1K OHM,1/16W,5%,0402
114S1103
EI_2TO1
114S1103
1
RES,1K OHM,1/16W,5%,0402
EI_3TO1
114S1103
1
RES,1K OHM,1/16W,5%,0402
NOSTUFF
114S1103
RES,1K OHM,1/16W,5%,0402
3
R3024,R3010,R3012
NOSTUFF
114S1103
RES,1K OHM,1/16W,5%,0402
3
R3024,R3010,R3028
1
RES,1K OHM,1/16W,5%,0402
114S1103
NOSTUFF
RES,1K OHM,1/16W,5%,0402
3
114S1103
R3008,R3010,R3012
NOSTUFF
RES,1K OHM,1/16W,5%,0402
R3014,R3016
2
114S1103
RES,1K OHM,1/16W,5%,0402
R3014,R3032
2
114S1103
CPU_PLL_MEDIUM
2
114S1103
R3030,R3032
RES,1K OHM,1/16W,5%,0402
CPU_PLL_LOW
RES,1K OHM,1/16W,5%,0402
114S1103
1
EI_3TO1
RES,1K OHM,1/16W,5%,0402
3
114S1103
R3024,R3026,R3012
NOSTUFF
114S1103
3
RES,1K OHM,1/16W,5%,0402
R3008,R3026,R3012
RES,1K OHM,1/16W,5%,0402
R3030,R3016
2
114S1103
CPU_PLL_HIGH
30
102
051-6772
04
EI_2TO1
114S1103
RES,1K OHM,1/16W,5%,0402
3
R3024,R3026,R3028
=PP1V2_EI_CPU
=PP1V2_EI_CPU
=PP1V2_EI_CPU
BUSCFG0
AVPRESET_L
LSSDSTOPENABLE
PLLRANGE0 PLLRANGE1 PLLMULT EI_DISABLE
BUSCFG1
CPU_SPARE
LSSDSTOPC2STARENABLE
EI_QREQ_L
LSSDMODE
JTAG_CPU_TCK
JTAG_CPU_TDI
JTAG_CPU_TMS
PULSESEL1
PULSESEL0
JTAGMODE_SPARE2
LSSDSCANENABLE
LSSDSTOPC2ENABLE
SYNCENABLE
RAMSTOPENABLE
PULSESEL2
PROCID0
PROCID1
PROCID2
BUSCFG2
PLLTESTOUT
JTAG_SEL
C1UNDGLOBAL
C2UNDGLOBAL
PLLTEST
CKTERMDIS_L
GPUL_DBG
JTAG_CPU_TRST_L
JTAG_CPU_TDO
BIMODE_L
RI_L
CPU_INT_L
PROC_THERM_INT_L
CPU_SRESET_L
I2CGO
CPU_HTBEN
=PP1V2_EI_CPU
=PP1V2_EI_CPU
=PP1V2_EI_CPU
CPU_HRESET_L
CPU_HRESET
CPU_BYPASS
CPU_BYPASS_L
35
35
35
35
35
35
31
31
31
31
31
31
30
30
30
30
30
30
29
29
29
29
29
29
29
29
29
18
18
18
28
29
28
29
25
18
18
18
29
14
14
14
14
29
29
29
14
14
29
14
14
29
29
14
14
14
14
7
7
7
29
29
29
29
29
29
29
29
29
29
6
29
18
18
18
29
29
29
29
29
6
29
29
29
29
29
29
29
6
29
29
29
29
29
29
18
29
29
6
6
29
25
29
27
7
7
7
6
13
13
29
Preliminary
Page 28
KPVDD2
(2 OF 3)
KPVDD1
AVDD
GND
X105
VCORE
X105
KPGND2KPGND1AGND
GND
X99
VCORE
X100
(3 OF 3)
GND
VOUT
VIN
NOISE
CONT
TABLE_5_ITEM
TABLE_5_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
TABLE_5_ITEM
PLACE ALL THESE PARTS VERY CLOSE TO U2900
MASTER: GILA
0805
CPU POWER AND BYPASS
LAST MODIFIED: JULY 9, 04
2.2
603
5%
21
R3101
X5R 402
20%
6.3V
0.22UF
2
1
C3100
X5R
6.3V 402
0.22UF
20%
NOSTUFF
2
1
C3101
NOSTUFF
0
402
5%
21
R3103
402
5%
0
NOSTUFF
21
R3105
10UF
805
CERM
6.3V
20%
2
1
C3102
SM
60-OHM-EMI
21
L3101
0
402
5%
21
R3127
402
5%
0
21
R3129
402
0
5%
21
R3131
CERM
6.3V 402
1UF
10%
2
1
C3103
1UF
402
10%
6.3V CERM
2
1
C3104
1UF
10%
6.3V CERM 402
2
1
C3105
1UF
10%
6.3V CERM 402
2
1
C3106
1UF
10%
6.3V CERM 402
2
1
C3107
1UF
402
10%
6.3V CERM
2
1
C3108
6.3V
1UF
10% CERM
402
2
1
C3109
1UF
10%
6.3V CERM 402
2
1
C3110
1UF
10%
6.3V CERM 402
2
1
C3111
10%
1UF
6.3V CERM 402
2
1
C3112
1UF
10%
6.3V CERM 402
2
1
C3113
10UF
CERM
6.3V
20%
805
2
1
C3114
CERM 805
20%
6.3V
10UF
2
1
C3115
10UF
805
20%
6.3V CERM
2
1
C3116
10UF
20%
6.3V CERM 805
2
1
C3117
1UF
10%
6.3V CERM 402
2
1
C3118
1UF
10%
6.3V CERM 402
2
1
C3119
1UF
10%
6.3V CERM 402
2
1
C3120
402
1UF
10%
6.3V CERM
2
1
C3121
1UF
10%
6.3V CERM 402
2
1
C3122
1UF
10%
6.3V CERM 402
2
1
C3123
CERM
1UF
10%
6.3V 402
2
1
C3124
1UF
10%
6.3V CERM 402
2
1
C3125
1UF
10%
6.3V CERM 402
2
1
C3126
1UF
10%
6.3V CERM 402
2
1
C3127
402
CERM
1UF
10%
6.3V
2
1
C3128
1UF
10%
6.3V CERM 402
2
1
C3129
1UF
10%
6.3V CERM 402
2
1
C3130
6.3V
1UF
10% CERM
402
2
1
C3131
1UF
10%
6.3V CERM 402
2
1
C3132
6.3V
1UF
10% CERM
402
2
1
C3133
1UF
10%
6.3V CERM 402
2
1
C3134
CERM
1UF
10%
6.3V 402
2
1
C3135
402
10%
1UF
6.3V CERM
2
1
C3136
1UF
10%
6.3V CERM 402
2
1
C3137
1UF
10%
6.3V CERM 402
2
1
C3138
402
CERM
1UF
10%
6.3V
2
1
C3139
10%
1UF
6.3V CERM 402
2
1
C3140
1UF
10%
6.3V CERM 402
2
1
C3141
6.3V CERM
1UF
10%
402
2
1
C3142
6.3V
1UF
10% CERM
402
2
1
C3143
6.3V
10% CERM
402
1UF
2
1
C3144
1UF
10%
6.3V CERM 402
2
1
C3145
402
CERM
1UF
10%
6.3V
2
1
C3146
CERM 402
1UF
10%
6.3V
2
1
C3147
NOSTUFF
2.2
5%
603
21
R3132
10UF
805
CERM
6.3V
20%
2
1
C3150
CPU_AVDD_2V6&CPU_AVDD_2V7&CPU_AVDD_2V8
1UF
10V CERM 603
20%
2
1
C3149
CPU_AVDD_2V6&CPU_AVDD_2V7&CPU_AVDD_2V8
402
0.01UF
20%
CERM
16V
2
1
C3148
6.3V 402
CERM
10%
1UF
2
1
C3199
OMIT
SM
2
1
XW3100
OMIT
CRITICAL
NEO-10S-REV2
1.8GHZ-76C
CBGA
N18
N16
N14
N12
N10
M9
M7
M5
M23
M21
C2
M17
M15
M13
M11
M1
L8
L6
L4
L20
L18
B7
L16
L14
L12
L10
K9
K7
K5
K23
K21
K19
B3
K17
K15
K13
K11
J8
J6
J4
J20
J2
J18
B20
J16
J14
J12
J10
J1
H9
H7
H5
H24
H19
B16
H17
H15
H13
H11
G8
G6
G22
G18
G16
G14
B13
G12
G10
F9
F7
F5
F3
F19
F17
F15
F13
B11
F11
E8
E6
E4
E22
E18
E16
E14
E10
E1
A24
D9
D7
D5
D23
D21
D19
D17
D13
C24
N8
N6
N4
N24
N20
N2
C20
A1
R2
Y1
T2
AA1
N5
N23
N17
N15
N13
N11
N1
M8
M6
M4
C21
M24
M22
M20
M2
M16
M14
M12
M10
L9
L7
B9
L5
L23
L17
L15
L13
L11
K8
K6
K20
K18
B5
K16
K14
K12
K10
K1
J9
J7
J5
J3
J23
B22
J19
J17
J15
J13
J11
H8
H6
H4
H20
H18
B18
H16
H14
H12
H10
G9
G7
G5
G23
G2
G17
B14
G15
G13
G11
F8
F6
F24
F22
F20
F18
F16
B12
F14
F12
F10
E9
E7
E5
E23
E19
E17
E15
B1
E13
E11
D4
D16
D14
D12
D10
D1
C3
P16
P14
P12
P10
N9
N7
C23
A3
P24
R24
U2900
CRITICAL
OMIT
CBGA
NEO-10S-REV2
1.8GHZ-76C
AD9
AD5
AD3
AD23
AD19
AD15
AD1
AC8
AC6
AC4
AC22
AC20
AC2
AC18
AC14
AC12
AB9
AB3
AB23
AB17
AB15
AB13
AB1
AA6
AA4
AA24
AA2
AA18
AA16
Y9
Y7
Y5
Y3
Y23
Y22
Y19
Y17
Y15
Y13
Y11
W8
W6
W24
W2
W18
W16
W14
W12
W10
V9
V7
V3
V19
V17
V15
V13
V11
V1
U8
U6
U4
U22
U20
U2
U18
U16
U14
U12
U10
T9
T7
T5
T3
T23
T21
T17
T15
T13
T11
T1
R8
R6
R4
R18
R16
R14
R12
R10
P9
P7
P5
P3
P23
P21
P19
P17
P15
P13
P11
P1
AD6
AD4
AD24
AD20
AD2
AD16
AD10
AC7
AC5
AC3
AC23
AC21
AC17
AC13
AC11
AC1
AB8
AB22
AB20
AB2
AB18
AB14
AB10
AA7
AA3
AA23
AA21
AA17
AA15
AA11
Y8
Y6
Y4
Y24
Y20
Y2
Y18
Y16
Y14
Y12
Y10
W9
W7
W5
W3
W21
W19
W17
W15
W13
W11
W1
V8
V6
V4
V2
V18
V16
V14
V12
V10
U9
U7
U5
U3
U23
U21
U17
U15
U13
U11
U1
T8
T6
T4
T24
T18
T16
T14
T12
T10
R9
R7
R5
R3
R23
R21
R19
R17
R15
R13
R11
R1
P8
P6
P4
P22
P2
P18
U2900
OMIT
SOT-25A
MM1572JN
51
4
2
3
VR3100
353S0886
CPU_AVDD_2V7
VREG MM1572 2.7V
VR3100
1
CRITICAL
VREG MM1572 2.8V
VR3100
1
353S0807
CPU_AVDD_2V8
CRITICAL
31
102
04
051-6772
VREG MM1572 2.6V
353S0806
1
VR3100
CPU_AVDD_2V6
CRITICAL
=PP1V2_EI_CPU
CPU_AVDD_NOISE
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
PP2V5_RUN_CPU_AVDD
VOLTAGE=2.5V
CPU_AVDD_EN
=PP5V_RUN_CPU
=PPVCORE_CPU
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
VOLTAGE=2.5V
PP2V5_RUN_CPU_AVDD_R_L
=PP2V5_RUN_CPU
VOLTAGE=1.2V MIN_NECK_WIDTH=8MIL
MIN_LINE_WIDTH=10MIL
=PPVCORE_CPU
GND_Z_SENSE
GND_Z_OUT
GND_CPU_AVDD
TDIODE_NEG
MIN_LINE_WIDTH=10MIL MIN_NECK_WIDTH=8MIL
NET_SPACING_TYPE=PROC_DIFF
DIFFERENTIAL_PAIR=P_TDD
MIN_NECK_WIDTH=8MIL
KPGND2
NET_SPACING_TYPE=PROC_DIFF
MIN_LINE_WIDTH=10MIL
DIFFERENTIAL_PAIR=P_KP2
GND_SPARE_GND
TDIODE_POS
MIN_NECK_WIDTH=8MIL
MIN_LINE_WIDTH=10MIL
DIFFERENTIAL_PAIR=P_TDD
NET_SPACING_TYPE=PROC_DIFF
KPVDD2
MIN_NECK_WIDTH=8MIL
NET_SPACING_TYPE=PROC_DIFF
MIN_LINE_WIDTH=10MIL
DIFFERENTIAL_PAIR=P_KP2
GND_SPARE_GND
GND_Z_SENSE
GND_Z_OUT
VOLTAGE=2.5V
MIN_LINE_WIDTH=25MIL
PP2V5_RUN_CPU_AVDD_R
MIN_NECK_WIDTH=10MIL
35 30
36
36
29
8
32
32
18
7
31
31
36
36
14
6
29
29
36
33
33
7
3
3
7
7
7
31
31
6
6
31
36
6
31
31
31
35
Preliminary
Page 29
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
PROC DECOUPLING
MASTER: GILA
LAST MODIFIED: APR 09, 04
6.3V 402
CERM
10%
1UF
2
1
C3200
6.3V 402
CERM
10%
1UF
2
1
C3201
6.3V 402
CERM
10%
1UF
2
1
C3202
6.3V CERM
10%
1UF
402
2
1
C3203
6.3V 402
CERM
10%
1UF
2
1
C3204
6.3V 402
CERM
10%
1UF
2
1
C3205
6.3V 402
CERM
10%
1UF
2
1
C3206
6.3V 402
CERM
10%
1UF
2
1
C3207
6.3V 402
CERM
10%
1UF
2
1
C3208
6.3V 402
CERM
10%
1UF
2
1
C3209
6.3V 402
CERM
10%
1UF
2
1
C3210
6.3V 402
CERM
10%
1UF
2
1
C3211
6.3V 402
CERM
10%
1UF
2
1
C3212
6.3V CERM
10%
1UF
402
2
1
C3213
6.3V CERM
10%
1UF
402
2
1
C3214
6.3V 402
CERM
10%
1UF
2
1
C3215
6.3V 402
CERM
10%
1UF
2
1
C3216
6.3V 402
CERM
10%
1UF
2
1
C3217
6.3V 402
CERM
10%
1UF
2
1
C3218
6.3V 402
CERM
10%
1UF
2
1
C3219
6.3V 402
CERM
10%
1UF
2
1
C3220
6.3V 402
CERM
10%
1UF
2
1
C3221
6.3V 402
CERM
10%
1UF
2
1
C3222
6.3V 402
CERM
10%
1UF
2
1
C3223
6.3V 402
CERM
10%
1UF
2
1
C3224
6.3V 402
CERM
10%
1UF
2
1
C3225
6.3V 402
CERM
10%
1UF
2
1
C3226
6.3V 402
CERM
10%
1UF
2
1
C3227
6.3V 402
CERM
10%
1UF
2
1
C3228
6.3V 402
CERM
10%
1UF
2
1
C3229
6.3V 402
CERM
10%
1UF
2
1
C3230
6.3V 402
CERM
10%
1UF
2
1
C3231
6.3V 402
CERM
10%
1UF
2
1
C3232
6.3V 402
CERM
10%
1UF
2
1
C3233
6.3V 402
CERM
10%
1UF
2
1
C3234
6.3V 402
CERM
10%
1UF
2
1
C3235
6.3V 402
CERM
10%
1UF
2
1
C3236
6.3V 402
CERM
10%
1UF
2
1
C3237
6.3V 402
CERM
10%
1UF
2
1
C3238
6.3V 402
CERM
10%
1UF
2
1
C3239
6.3V 402
CERM
10%
1UF
2
1
C3240
6.3V 402
CERM
10%
1UF
2
1
C3241
6.3V 402
CERM
10%
1UF
2
1
C3242
6.3V 402
CERM
10%
1UF
2
1
C3243
6.3V 402
CERM
10%
1UF
2
1
C3244
6.3V 402
CERM
10%
1UF
2
1
C3245
6.3V 402
CERM
10%
1UF
2
1
C3246
6.3V 402
CERM
10%
1UF
2
1
C3247
6.3V 402
CERM
10%
1UF
2
1
C3248
6.3V 402
CERM
10%
1UF
2
1
C3249
6.3V 402
CERM
10%
1UF
2
1
C3250
6.3V 402
CERM
10%
1UF
2
1
C3251
6.3V 402
CERM
10%
1UF
2
1
C3252
6.3V 402
CERM
10%
1UF
2
1
C3253
6.3V 402
CERM
10%
1UF
2
1
C3254
6.3V 402
CERM
10%
1UF
2
1
C3255
6.3V 402
CERM
10%
1UF
2
1
C3256
6.3V 402
CERM
10%
1UF
2
1
C3257
6.3V 402
CERM
10%
1UF
2
1
C3258
6.3V 402
CERM
10%
1UF
2
1
C3259
6.3V 402
CERM
10%
1UF
2
1
C3260
6.3V 402
CERM
10%
1UF
2
1
C3261
6.3V 402
CERM
10%
1UF
2
1
C3262
6.3V 402
CERM
10%
1UF
2
1
C3263
6.3V 402
CERM
10%
1UF
2
1
C3264
6.3V 402
CERM
10%
1UF
2
1
C3265
6.3V 402
CERM
10%
1UF
2
1
C3266
6.3V 402
CERM
10%
1UF
2
1
C3267
6.3V 402
CERM
10%
1UF
2
1
C3268
6.3V 402
CERM
10%
1UF
2
1
C3269
6.3V 402
CERM
10%
1UF
2
1
C3270
6.3V 402
CERM
10%
1UF
2
1
C3271
6.3V 402
CERM
10%
1UF
2
1
C3272
6.3V 402
CERM
10%
1UF
2
1
C3273
6.3V 402
CERM
10%
1UF
2
1
C3274
6.3V 402
CERM
10%
1UF
2
1
C3275
6.3V 402
CERM
10%
1UF
2
1
C3276
6.3V 402
CERM
10%
1UF
2
1
C3277
6.3V 402
CERM
10%
1UF
2
1
C3278
6.3V 402
CERM
10%
1UF
2
1
C3279
6.3V 402
CERM
10%
1UF
2
1
C3280
6.3V 402
CERM
10%
1UF
2
1
C3281
6.3V 402
CERM
10%
1UF
2
1
C3282
6.3V 402
CERM
10%
1UF
2
1
C3283
6.3V 402
CERM
10%
1UF
2
1
C3284
6.3V CERM
10%
1UF
402
2
1
C3285
6.3V CERM
10%
1UF
402
2
1
C3286
6.3V CERM
10%
1UF
402
2
1
C3287
6.3V CERM
10%
1UF
402
2
1
C3288
6.3V 402
CERM
10%
1UF
2
1
C3289
6.3V CERM
10%
1UF
402
2
1
C3290
6.3V CERM
10%
1UF
402
2
1
C3291
6.3V CERM
10%
1UF
402
2
1
C3292
6.3V 402
CERM
10%
1UF
2
1
C3293
6.3V 402
CERM
10%
1UF
2
1
C3294
6.3V 402
CERM
10%
1UF
2
1
C3295
6.3V 402
CERM
10%
1UF
2
1
C3296
6.3V 402
CERM
10%
1UF
2
1
C3297
6.3V 402
CERM
10%
1UF
2
1
C3298
6.3V 402
CERM
10%
1UF
2
1
C3299
04
32
102
051-6772
=PPVCORE_CPU
36 31 29
7
Preliminary
Page 30
AGND
VCC
BGOUT
PGOOD
ERROUT
DACSTEP
GSENSE
FB
OUT4
OUT1
OUT3
OUT2
VID5
VID2 VID3 VID4
VID1
VID0
OUTSEN
OSCREF
OS2 OS3
OS1
OS4
TG
VREG
VIN
CO
BST
DRN
BG
VPN
THMPAD
TG
VREG
VIN
CO
BST
DRN
BG
VPN
THMPAD
G
D
S
GND
OUT
VIN+ VIN-
V+
G
D
S
D
G
S
G
D
S
D
G
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
0 TO 2.5V
0 TO 2.5V
ADC IS 10BIT 0 TO 1023
.00675 A/COUNT
CURRENT SENSE
PLACE NEXT TO SMU
KEEP SHORTS NEXT TO U3301
FOR REMOTE SENSE
DIFFERENTIAL PAIR
FAR SIDE
CPU SENSE SIDE
NEAR SIDE
UNDER PROCESSOR
PLACE REGULATOR SENSE POINTS AT DESIGNATED LOCATIONS.
PLACE R3344 AND C3331 BY SMU
CONNECT BETWEEN THE INDUCTOR & BULK CAPS.
CPU VREG
PLACE R3325 CLOSE TO INDUCTOR OUTPUT LEAD.
COUNTSCALE
VOLTAGE SENSE
COUNTSCALE
2.73224 A/V
6 V/V
.01464 V/COUNT
ADC IS 10BIT 0 TO 1023
TSSOP
SC2643VX
15
10
11
12
13
14
9
16
23
22
21
20
19
17
24
1
2
3
6
7
5
8
4
18
U3300
10%
402
CERM
50V
0.0022UF
NOSTUFF
2
1
C3315
5%
1.5K
402
21
R3300
10%
1UF
6.3V CERM 402
2
1
C3301
10% CERM
402
330PF
50V
2
1
C3302
0
5% 1/16W MF-LF
NOSTUFF
402
2
1
R3302
NOSTUFF
2.7M
5%
603
21
R3303
SOIC
SC1211
7
5
6
2
9
1
4
3
8
U3320
ELEC
16V
1000UF
20%
TH-KZJ
2
1
C3321
TH1
0.6UH-24A
21
L3320
402
1
5%
21
R3320
402
CERM
50V
10%
0.0022UF
NOSTUFF
2
1
C3325
402
5%
0
21
R3330
OMIT
SM
21
XW3300
1UF
16V CERM
20%
1206
2
1
C3313
1UF
20% 16V CERM 1206
2
1
C3329
16V
CERM
1UF
20%
1206
21
C3310
CERM
16V
20%
1UF
1206
2
1
C3323
20% 16V
CERM
1UF
1206
21
C3320
5% 1/10W
2.2
603
21
R3307
10UF
10% 16V CERM 1210
2
1
C3322
16V
10%
1210
10UF
CRITICAL
CERM
2
1
C3312
1800UF
6.3V
20% ELEC
TH-KZJ
2
1
C3317
1800UF
TH-KZJ
CRITICAL
20%
6.3V ELEC
2
1
C3318
ELEC TH-KZJ
20%
1800UF
6.3V
2
1
C3328
5%
NOSTUFF
402
330
2
1
R3324
NOSTUFF
402
5%
1K
21
R3325
10% 25V
0.0082UF
X7R 402
2
1
C3304
10% 25V
0.0082UF
X7R 402
2
1
C3305
10% 25V
0.0082UF
X7R 402
2
1
C3306
402
1%
20.5K
2
1
R3313
402
1% MF-LF
20.5K
2
1
R3316
SOIC
SC1211
7
5
6
2
9
1
4
3
8
U3310
402
1%
20.5K
2
1
R3317
1%
402
301
21
R3326
0.068UF
402
CERM
10V
10%
21
C3308
BAS16
3
1
D3310
BAS16
3
1
D3320
1% 1/16W MF-LF
332K
402
2
1
R3328
0.1UF
402
CERM
10V
20%
2
1
C3300
402
25V
0.0047UF
10% CERM
2
1
C3326
805
1
1/8W
5%
2
1
R3321
1/8W
1
805
5%
2
1
R3311
CERM
10% 25V
402
0.0047UF
2
1
C3316
5% 1/16W
402
30K
2
1
R3301
402
4.99K
1% 1/16W MF-LF
21
R3305
261
1%
402
21
R3304
0
5% 1/16W MF-LF
402
21
R3335
0
5%
402
21
R3336
CRITICAL
TH-VERT
1UH-20A-4.5MOHM
21
L3300
402
5%
0
NOSTUFF
21
R3337
0
5%
402
NOSTUFF
21
R3338
5%
0
NOSTUFF
402
21
R3339
0
402
NOSTUFF
5%
21
R3340
0
5% 1/16W MF-LF
402
NOSTUFF
21
R3341
0
5% 1/16W MF-LF
402
NOSTUFF
21
R3342
CERM
16V 1206
20%
1UF
2
1
C3330
CERM
50V
0.001UF
20%
402
2
1
C3314
402
5%
100
2
1
R3312
50V 402
CERM
20%
0.001UF
2
1
C3324
402
100
5% 1/16W MF-LF
2
1
R3322
SOT23-LF
2N7002
2
1
3
Q3312
INA138
SOT23-5
43
5 1
2
U3301
2512
1%
0.025
1W MF
21
R3343
805
10UF
6.3V
20% CERM
2
1
C3331
1%
73.2K
402
2
1
R3345
NOSTUFF
BAS16
3
1
D3300
402
100K
5% MF-LF
21
R3344
NOSTUFF
1% 1/16W MF-LF 402
20.5K
2
1
R3318
NOSTUFF
1%
20.5K
402
2
1
R3315
20.5K
1% MF-LF
402
NOSTUFF
2
1
R3314
402
MF-LF
10K
1/16W
5%
2
1
R3350
5% 1/16W MF-LF 402
10K
2
1
R3351
OMIT
SM
21
XW3301
OMIT
SM
21
XW3303
OMIT
SM
21
XW3304
402
5%
100K
NOSTUFF
21
R3308
CERM
20%
6.3V
10UF
805
2
1
C3303
5%
2.2
603
21
R3306
6.3V
20%
1800UF
TH-KZJ
ELEC
2
1
C3332
TH-KZJ
6.3V
20% ELEC
1800UF
2
1
C3333
OMIT
SM
21
XW3302
0
402
5% 1/16W MF-LF
2
1
R3390
402
0
5% 1/16W MF-LF
2
1
R3391
402
10K
1%
2
1
R3360
402
2.0K
1% 1/16W MF-LF
2
1
R3361
CRITICAL
CASE369
NTD60N02R
3
1
4
Q3310
CRITICAL
CASE369
NTD70N03R
3
1
4
Q3311
NTD60N02R
CASE369
CRITICAL
3
1
4
Q3320
CRITICAL
CASE369
NTD70N03R
3
1
4
Q3321
CRITICAL
TH1
0.6UH-24A
21
L3310
CRITICAL
16V ELEC
20%
1000UF
TH-KZJ
2
1
C3311
402X7R
16V
0.015UF
NOSTUFF
10%
21
C3309
1%
1.5K
402
21
R3327
10
5% MF-LF
2
1
R3329
1206
16V
20%
1UF
CERM
2
1
C3319
5%
402
1
21
R3310
051-6772
102
33
04
PN2
MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
U3320_BG
U3320_TG
PP12V_CPU
U3310_VREG
VPN1
U3310_BG
MIN_LINE_WIDTH=25MIL
PN1
MIN_NECK_WIDTH=10MIL
U3310_TG
PP12V_CPU
PPVCORE_CPU
U3310_DRN
PPVCORE_CPU
U3320_DRN
VCORE_SENSE_VOUT
R3325_2
CPU_SENSE_I
SC2643_ERROUT
CPU_VID_R<1> CPU_VID_R<2>
SC2643_AGND
PP12V_CPU
VOLTAGE=12V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
VCORE_SENSE_GND
NET_SPACING_TYPE=PROC_DIFF
MIN_LINE_WIDTH=10MIL
MIN_NECK_WIDTH=8MIL
DIFFERENTIAL_PAIR=P_SENSE_CORE
VCORE_SENSE_GND
NET_SPACING_TYPE=PROC_DIFF
MIN_NECK_WIDTH=8MIL
DIFFERENTIAL_PAIR=P_SENSE_CORE
VCORE_SENSE_VOUT
MIN_LINE_WIDTH=10MIL
VRM_EN
PP12V_CPU
SC2643_OSCREF
SC2643_OS3
CPU_VID_R<0>
CPU_VID_R<3>
U3300_BGOUT
SC2643_DACSTEP
SC2643_OUTSEN_R
U3310_BST
U3320_BST
CORE_ISNS_M
C3326_1
OUT2
AUX2
PN2
VPN2
C3316_1
AUX1
PN1
CORE_ISNS_P
INA138_OUT
SC2643_AGND
AUX3AUX2AUX1
SYS_POWERUP_L
SC2643_VCC
C3302_1
SC2643_VCC
KPVDD2
KPGND2
CPU_SENSE_I_R
GND_SMU_AVSS
OUT1
SYS_SLEWING_L
PP12V_CPU
PPVCORE_CPU
MIN_LINE_WIDTH=10MIL
MIN_NECK_WIDTH=8MIL
PPVCORE_CPU
CPU_VID_R<4> CPU_VID_R<5>
=PP12V_RUN_CPU
=PP12V_RUN_CPU
=PP3V3_RUN_CPU
PPVCORE_CPU
GND_SMU_AVSS
PP12V_CPU
PP12V_CPU_R
SC2643_PGOOD
SC2643_AGND
U3320_BST_R
SC2643_OUTSEN
SC2643_AGND
U3320_VREG
OUT1 OUT2 OUT3
SC2643_OS2
SC2643_AGND
U3310_BST_R
CPU_SENSE_V
SC2643_OS1
SC2643_OS4
SC2643_OS_HUB
OUT4
SC2643_VCC
35
35
13
35
35
35
34
34
11
36
34
34
34
36
34
34
33
33
34
34
10
36
36
33
27
34
33
33
33
33
34
33
33
7
7
33
8
8
33
33
33
33
33
8
8
36
36
7
31
31
13
25
33
7
7
8
8
33
33
7
13
33
33
6
33
6
6
6
6
13
6
6
33
6
6
6
6
6
6
6
6
33
33
33
33
33
6
33
34 33 33
6
33
33
6
6
8
33
13
6
6
6
6
6
7
7
7
6
8
6
33
33
33
33
34
33
13
33
Preliminary
Page 31
TG
VREG
VIN
CO
BST
DRN
BG
VPN
THMPAD
LM339A
V+
GND
G
D
S
D
G
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
CPU VREG
PLACE LED3400 NEAR VREG
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3400
1206
10UF
20%
6.3V CERM
2
1
C3401
EXTRA_C
1206
10UF
20%
6.3V CERM
2
1
C3402
EXTRA_C
1206
10UF
20%
6.3V CERM
2
1
C3403
1206
10UF
20%
6.3V CERM
2
1
C3404
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3405
CERM
6.3V
20%
10UF
1206
2
1
C3406
EXTRA_C
1206
10UF
20%
6.3V CERM
2
1
C3407
1206
10UF
20%
6.3V CERM
2
1
C3408
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3409
CERM
6.3V
20%
10UF
1206
2
1
C3419
1206
10UF
20%
6.3V CERM
2
1
C3429
CERM
6.3V
20%
10UF
1206
2
1
C3430
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3431
1206
10UF
20%
6.3V CERM
2
1
C3432
1206
10UF
20%
6.3V CERM
EXTRA_C
2
1
C3433
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3434
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3435
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3436
EXTRA_C
1206
10UF
20%
6.3V CERM
2
1
C3437
1206
10UF
20%
6.3V CERM
2
1
C3438
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3439
CERM
6.3V
20%
10UF
1206
2
1
C3440
EXTRA_C
1206
10UF
20%
6.3V CERM
2
1
C3441
EXTRA_C
1206
10UF
20%
6.3V CERM
2
1
C3442
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3443
EXTRA_C
CERM
6.3V
20%
1206
10UF
2
1
C3444
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3445
CERM
6.3V
20%
10UF
1206
2
1
C3446
1206
10UF
20%
6.3V CERM
2
1
C3447
EXTRA_C
1206
10UF
20%
6.3V CERM
2
1
C3448
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3449
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3450
EXTRA_C
1206
10UF
20%
6.3V CERM
2
1
C3451
EXTRA_C
1206
10UF
20%
6.3V CERM
2
1
C3452
CERM
6.3V
20%
10UF
1206
2
1
C3453
CERM
6.3V
20%
10UF
1206
2
1
C3454
EXTRA_C
1206
10UF
20%
6.3V CERM
2
1
C3455
1206
10UF
20%
6.3V CERM
EXTRA_C
2
1
C3456
EXTRA_C
1206
10UF
20%
6.3V CERM
2
1
C3457
1206
10UF
20%
6.3V CERM
2
1
C3458
TH-KZJ
20%
ELEC
16V
1000UF
2
1
C3412
TH-KZJ
20% 16V
1000UF
ELEC
2
1
C3411
TH1
0.6UH-24A
21
L3410
402
1
5%
21
R3410
SC1211
SOIC
7
5
6
2
9
1
4
3
8
U3410
CERM
50V
10%
0.0022UF
NOSTUFF
402
2
1
C3415
16V
20%
1UF
1206
CERM
2
1
C3413
1UF
CERM 1206
16V
20%
21
C3410
10% 16V CERM 1210
10UF
2
1
C3468
1800UF
ELEC TH-KZJ
6.3V
20%
2
1
C3417
TH-KZJ
1800UF
20% ELEC
6.3V
2
1
C3418
BAS16
3
1
D3410
5%
1
805
1/8W
2
1
R3411
402
25V CERM
0.0047UF
10%
2
1
C3416
1206
1UF
20% CERM
16V
2
1
C3470
50V CERM 402
20%
0.001UF
2
1
C3414
5%
100
402
2
1
R3412
10K
5% 1/16W MF-LF 402
2
1
R3450
5%
2.2
603
21
R3423
TH-KZJ
20% ELEC
6.3V
1800UF
2
1
C3472
1800UF
6.3V ELEC
20%
TH-KZJ
2
1
C3473
TH-KZJ
16V ELEC
20%
1000UF
2
1
C3422
TH-KZJ
20% ELEC
6.3V
1800UF
2
1
C3475
TH-KZJ
20% ELEC
6.3V
1800UF
2
1
C3474
TH-KZJ
1800UF
20%
6.3V ELEC
2
1
C3427
5% 1/16W MF-LF
DEVELOPMENT
330
402
2
1
R3490
GREEN
2.0X1.25A
DEVELOPMENT
2
1
LED3400
DEVELOPMENT
SOI
3
14
9
8
12
U1001
DEVELOPMENT
402
0
5% 1/16W MF-LF
21
R3491
NTD60N02R
CASE369
CRITICAL
3
1
4
Q3410
CRITICAL
CASE369
NTD70N03R
3
1
4
Q3411
EXTRA_C
1206
10UF
20%
6.3V CERM
2
1
C3459
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3460
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3461
EXTRA_C
1206
10UF
20%
6.3V CERM
2
1
C3462
CERM
6.3V
20%
10UF
1206
2
1
C3463
CERM
6.3V
20%
10UF
1206
2
1
C3464
1206
10UF
20%
6.3V CERM
2
1
C3465
EXTRA_C
1206
10UF
20%
6.3V CERM
2
1
C3466
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3467
04
34
102
051-6772
PN3
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
U3410_TG
PP12V_CPU
U3410_BG
VPN3
U3410_VREG
U3410_DRN
PPVCORE_CPU
CPU_CORE_FOR_LED
1V1_REF
LED_CPU_CORE_N
LED_CPU_CORE_P
PP3V3_RUN
PP12V_CPU
U3410_BST
U3410_BST_R
PN3
AUX3
C3416_1
OUT3
PPVCORE_CPU
50 22
35
18
35
34
11
34
34
33
50
10
34
33
33
7
22
7
33
7
34
6
6
10
6
6
34
33
33
6
Preliminary
Page 32
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
CPU VREG OUTPUT CAPS
EXTRA_C
CRITICAL
10UF
6.3V CERM
20%
1206
2
1
C3500
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3501
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3502
SMB
10BQ040PBF
21
DS3502
EXTRA_C
1206
10UF
20%
6.3V CERM
2
1
C3503
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3504
EXTRA_C
1206
20%
6.3V CERM
10UF
2
1
C3505
EXTRA_C
CERM
6.3V
20%
1206
10UF
2
1
C3506
EXTRA_C
1206
10UF
20%
6.3V CERM
2
1
C3507
EXTRA_C
1206
10UF
20%
6.3V CERM
2
1
C3508
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3509
1206
20%
6.3V CERM
10UF
2
1
C3510
CERM
20%
10UF
1206
6.3V
2
1
C3511
EXTRA_C
1206
10UF
20%
6.3V CERM
2
1
C3512
1206
10UF
20%
6.3V CERM
EXTRA_C
2
1
C3513
CERM
6.3V 1206
20%
10UF
2
1
C3514
EXTRA_C
10UF
6.3V CERM 1206
20%
2
1
C3515
EXTRA_C
10UF
20%
6.3V 1206
CERM
2
1
C3516
20%
10UF
6.3V 1206
CERM
2
1
C3517
20%
6.3V CERM 1206
10UF
2
1
C3518
EXTRA_C
10UF
20%
1206
CERM
6.3V
2
1
C3519
EXTRA_C
20%
10UF
6.3V CERM 1206
2
1
C3520
10UF
20%
6.3V CERM 1206
2
1
C3521
EXTRA_C
10UF
20%
6.3V CERM 1206
2
1
C3522
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3523
EXTRA_C
10UF
20%
6.3V 1206
CERM
2
1
C3524
EXTRA_C
CERM
6.3V
10UF
1206
20%
2
1
C3525
10UF
20% CERM
6.3V 1206
2
1
C3526
10UF
20%
1206
6.3V CERM
EXTRA_C
2
1
C3527
EXTRA_C
20%
10UF
1206
CERM
6.3V
2
1
C3528
10UF
20% CERM
1206
6.3V
EXTRA_C
2
1
C3529
EXTRA_C
10UF
20%
1206
6.3V CERM
2
1
C3530
20%
10UF
CERM
6.3V 1206
2
1
C3531
10UF
20% CERM
6.3V 1206
EXTRA_C
2
1
C3532
10UF
20% CERM
6.3V 1206
EXTRA_C
2
1
C3533
EXTRA_C
1206
10UF
20%
6.3V CERM
2
1
C3534
10UF
20%
1206
6.3V CERM
EXTRA_C
2
1
C3535
EXTRA_C
CERM
6.3V
10UF
1206
20%
2
1
C3536
EXTRA_C
10UF
20%
1206
6.3V CERM
2
1
C3537
10UF
20% CERM
6.3V 1206
EXTRA_C
2
1
C3538
10UF
20%
1206
6.3V CERM
2
1
C3539
10UF
20% CERM
6.3V 1206
2
1
C3540
10UF
20%
1206
6.3V CERM
2
1
C3541
10UF
20% CERM
6.3V 1206
EXTRA_C
2
1
C3542
EXTRA_C
20%
1206
6.3V CERM
10UF
2
1
C3543
10UF
20% CERM
6.3V 1206
2
1
C3544
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3545
10UF
20%
6.3V CERM 1206
2
1
C3546
EXTRA_C
10UF
20%
1206
6.3V CERM
2
1
C3547
EXTRA_C
10UF
20% CERM
6.3V 1206
2
1
C3548
EXTRA_C
10UF
20%
1206
6.3V CERM
2
1
C3549
EXTRA_C
10UF
20% CERM
6.3V 1206
2
1
C3550
10UF
20%
1206
6.3V CERM
2
1
C3551
EXTRA_C
10UF
20%
1206
6.3V CERM
2
1
C3552
10UF
20% CERM
6.3V 1206
2
1
C3553
EXTRA_C
10UF
20%
1206
6.3V CERM
2
1
C3554
EXTRA_C
10UF
20% CERM
6.3V 1206
2
1
C3555
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3556
10UF
20%
1206
6.3V CERM
2
1
C3557
CERM
6.3V
20%
10UF
1206
2
1
C3558
1206
10UF
20%
6.3V CERM
2
1
C3559
CERM
6.3V
20%
10UF
1206
2
1
C3560
1206
10UF
20%
6.3V CERM
2
1
C3561
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3562
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3563
1206
10UF
20%
6.3V CERM
2
1
C3564
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3565
EXTRA_C
1206
10UF
20%
6.3V CERM
2
1
C3566
1206
10UF
20%
6.3V CERM
2
1
C3567
CERM
20%
10UF
1206
6.3V
2
1
C3568
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3569
EXTRA_C
1206
10UF
20%
6.3V CERM
2
1
C3570
CERM
6.3V
20%
10UF
1206
2
1
C3571
EXTRA_C
1206
CERM
10UF
20%
6.3V
2
1
C3572
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3573
EXTRA_C
CERM
6.3V
20%
1206
10UF
2
1
C3574
EXTRA_C
1206
10UF
20% CERM
6.3V
2
1
C3575
CERM
6.3V
20%
10UF
1206
2
1
C3576
EXTRA_C
1206
10UF
20%
6.3V CERM
2
1
C3577
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3578
CERM
20%
10UF
1206
6.3V
2
1
C3579
CERM
6.3V
20%
10UF
1206
2
1
C3580
EXTRA_C
1206
10UF
20%
6.3V CERM
2
1
C3581
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3582
EXTRA_C
1206
10UF
20%
6.3V CERM
2
1
C3583
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3584
CERM
6.3V
20%
1206
10UF
2
1
C3585
1206
20%
6.3V CERM
10UF
2
1
C3586
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3587
1206
10UF
20%
6.3V CERM
2
1
C3588
1206
10UF
20%
6.3V CERM
2
1
C3589
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3590
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3591
1206
10UF
20%
6.3V CERM
2
1
C3592
CERM
20%
1206
6.3V
10UF
2
1
C3593
1206
10UF
20%
6.3V CERM
2
1
C3594
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3595
CERM
6.3V
10UF
1206
20%
2
1
C3596
1206
10UF
20%
6.3V CERM
2
1
C3597
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3598
EXTRA_C
1206
10UF
20%
6.3V CERM
2
1
C3599
04
35
102
051-6772
PPVCORE_CPU
PP2V5_RUN_CPU_AVDD_R
PPVCORE_CPU
35
35
34
34
33
33 7 7
6
31
6
Preliminary
Page 33
ADJ
NC1 NC2 NC3
NC5
NC4
VREF
GND
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
CPU DIODE CONDITIONER
POWER MONITOR
NC
NEEDED FOR FMAX
NEED TO CONNECT TO P65 OF 80PIN SMU OR PIN 49 OF 64PIN SMU
BUFFER
XW3600, R3602, AND DS3602 MUST BE PLACED CLOSE TO SMU
100UA CURRENT SOURCE
PLACE AT BOARD EDGE
AND MIN_NECK_WIDTH=8MIL
THESE SIGNALS HAVE A MIN_LINE_WIDTH=10MIL
TO U2900
PLACE CLOSE
2.2UF
CERM 805
20% 10V
2
1
C3600
2.2UF
20% 10V CERM 805
2
1
C3601
603
1% MF-LF
200
2
1
R3601
NOSTUFF
SSOT-23
2.5V
3
12
D3600
603
0.47UF
20% 10V CERM
2
1
C3602
LMV2011
SOT23-5
2
5
1
4
3
U3601
SM
OMIT
21
XW3601
5%
2
603
21
R3602
2.2UF
805
20% CERM
10V
2
1
C3603
2.2UF
10V CERM
20%
805
2
1
C3604
2.2UF
805
20% CERM
10V
2
1
C3605
10.0K
603
0.1%
8MIL
21
R3603
20.0K
603
0.1%
21
R3604
10.0K
603
0.1%
8MIL
21
R3605
10.0K
603
0.1%
21
R3606
603
0.1%
20.0K
21
R3607
1%
603
12.7K
2
1
R3608
SOT23-5
LMV2011
2
5
1
4
3
U3602
SOT23-5
LMV2011
2
5
1
4
3
U3603
603
10.0K
0.1%
21
R3609
10.0K
603
0.1%
21
R3610
0.1%
100K
603
21
R3611
0.1%
40.2K
603
21
R3612
TD4
0.1%
40.2K
603
21
R3613
0.1%
100K
603
21
R3614
10%
402
50V CERM
0.0022UF
2
1
C3606
0
5% MF-LF
2
1
R3615
NOSTUFF
1% MF-LF
402
1K
2
1
R3616
6.3V
10UF
805
20%
CERM
21
C3607
20%
CERM
805
10UF
6.3V
21
C3608
0.0022UF
402
10% 50V CERM
2
1
C3610
0
1/8W
5%
805
NOSTUFF
2
1
R3619
NOSTUFF
5%
402
51
21
R3620
NOSTUFF
402
51
5%
21
R3621
NOSTUFF
F-ST-SM
BM12B-SRSS-TB
9
8
7
6
5
4
3
2
12
11
10
1
13
14
J3600
402
5%
100K
21
R3628
805
10UF
20%
6.3V CERM
2
1
C3613
SM
OMIT
21
XW3611
OMIT
SM
21
XW3612
SM
OMIT
21
XW3613
OMIT
SM
21
XW3614
0
5%
402
21
R3690
NOSTUFF
5%
0
402
21
R3691
NOSTUFF
B0530WXF
SOD-123
21
DS3602
SOD-123
NOSTUFF
B0530WXF
2
1
DS3650
603
0
5% MF-LF
2
1
R3650
SO-8
NCV1009D
6
8
7
3
2
1
4
5
U3650
04
051-6772
36
102
DIFFERENTIAL_PAIR=CORE_ISNS MIN_NECK_WIDTH=8MIL
MIN_LINE_WIDTH=10MIL
CORE_ISNS_M
NET_SPACING_TYPE=PROC_DIFF
NET_SPACING_TYPE=PROC_DIFF
MIN_NECK_WIDTH=8MIL
MIN_LINE_WIDTH=10MIL
DIFFERENTIAL_PAIR=CORE_ISNS
CORE_ISNS_P
NET_SPACING_TYPE=PROC_DIFF
DIFFERENTIAL_PAIR=KP2_FMAX MIN_NECK_WIDTH=8MIL
MIN_LINE_WIDTH=10MIL
KPGND2_FMAX
NET_SPACING_TYPE=PROC_DIFF
MIN_LINE_WIDTH=10MIL MIN_NECK_WIDTH=8MIL
DIFFERENTIAL_PAIR=KP2_FMAX
KPVDD2_FMAX
NET_SPACING_TYPE=PROC_DIFF
MIN_NECK_WIDTH=8MIL
MIN_LINE_WIDTH=10MIL
DIFFERENTIAL_PAIR=TDIODE
TDIODE_NEG_FMAX
NET_SPACING_TYPE=PROC_DIFF
TDIODE_POS_FMAX DIFFERENTIAL_PAIR=TDIODE
MIN_NECK_WIDTH=8MIL
MIN_LINE_WIDTH=10MIL
TDIODE_POS
CPU_TEMP
DAGND
TDIODE_NEG
TDIODE_POS
KPGND2
KPVDD2
ADC_REF
=PPVCORE_CPU
TDIODE_NEG
DAGND
FMAXT_P DIFFERENTIAL_PAIR=P_FMAXT
NET_SPACING_TYPE=PROC_DIFF
ADC_REF
DAGND
ADC_REF
DAGND
DAGND
DAVDD
DAVDD
DAVDD
NET_SPACING_TYPE=PROC_DIFF
DIFFERENTIAL_PAIR=P_FMAXT
FMAXT_M
TD_BUFFERED
MIN_LINE_WIDTH=10MIL
MIN_NECK_WIDTH=8MIL
MIN_LINE_WIDTH=10MIL
CPU_TEMP
MIN_NECK_WIDTH=8MIL
GND_SMU_AVSS
DAGND
TD_CURRENT
TD1
TD2
8MIL
8MIL
TD3
DAGND
=PP5V_ALL_CPU
DAVDD
MIN_LINE_WIDTH=15MIL
MIN_NECK_WIDTH=10MIL
=PP5V_PWRON_CPU
DAGND
MIN_LINE_WIDTH=15MIL
MIN_NECK_WIDTH=10MIL
CPU_TEMP_R
PPVREF_SMU_ADC_REF
GND_SMU_AVSS_DAGND
=PP3V3_PWRON_CPU
=PP3V3_ALL_CPU
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
PP3V3_CPU_DIODE
ADC_REF
MIN_LINE_WIDTH=10MIL
MIN_NECK_WIDTH=8MIL
DAGND
32
36
33
33
31
36
33
33
33
36
36
31
36
31
31
29
31
36
13
6
6
6
6
6
6
31
13
36
6
31
6
6
36
7
6
36
36
36
36
36
36
36
36
36
13
8
36
36
7
36
7
36
8
8
7 7
36
36
Preliminary
Page 34
INTERFACE
DATA
MEMORY
DDR_DQ5
DDR_DQ0 DDR_DQ1 DDR_DQ2 DDR_DQ3 DDR_DQ4
DDR_DQ6 DDR_DQ7 DDR_DQ8 DDR_DQ9 DDR_DQ10 DDR_DQ11 DDR_DQ12 DDR_DQ13 DDR_DQ14 DDR_DQ15 DDR_DQ16
DDR_DQ26
DDR_DQ25
DDR_DQ24
DDR_DQ23
DDR_DQ22
DDR_DQ21
DDR_DQ20
DDR_DQ19
DDR_DQ18
DDR_DQ17
DDR_DQ36
DDR_DQ35
DDR_DQ34
DDR_DQ33
DDR_DQ32
DDR_DQ31
DDR_DQ30
DDR_DQ29
DDR_DQ28
DDR_DQ27
DDR_DQ46
DDR_DQ45
DDR_DQ44
DDR_DQ43
DDR_DQ42
DDR_DQ41
DDR_DQ40
DDR_DQ39
DDR_DQ38
DDR_DQ37
DDR_DQ47 DDR_DQ48 DDR_DQ49 DDR_DQ50 DDR_DQ51 DDR_DQ52 DDR_DQ53 DDR_DQ54 DDR_DQ55 DDR_DQ56 DDR_DQ57 DDR_DQ58 DDR_DQ59 DDR_DQ60 DDR_DQ61 DDR_DQ62 DDR_DQ63
VDD_DDR
(SYM 2 OF 7)
DDR_DQ64 DDR_DQ65
DDR_DQ69
DDR_DQ68
DDR_DQ67
DDR_DQ66
DDR_DQ70
DDR_DQ74
DDR_DQ73
DDR_DQ72
DDR_DQ71
DDR_DQ75
DDR_DQ79
DDR_DQ78
DDR_DQ77
DDR_DQ76
DDR_DQ80 DDR_DQ81 DDR_DQ82 DDR_DQ83
DDR_DQ85
DDR_DQ84
DDR_DQ90
DDR_DQ89
DDR_DQ88
DDR_DQ87
DDR_DQ86
DDR_DQ95
DDR_DQ94
DDR_DQ93
DDR_DQ92
DDR_DQ91
DDR_DQ99
DDR_DQ98
DDR_DQ97
DDR_DQ96
DDR_DQ100
DDR_DQ104 DDR_DQ105 DDR_DQ106 DDR_DQ107 DDR_DQ108 DDR_DQ109 DDR_DQ110
DDR_DQ103
DDR_DQ102
DDR_DQ101
DDR_DQ111 DDR_DQ112 DDR_DQ113 DDR_DQ114 DDR_DQ115 DDR_DQ116 DDR_DQ117 DDR_DQ118 DDR_DQ119 DDR_DQ120 DDR_DQ121
DDR_DQ127
DDR_DQ126
DDR_DQ125
DDR_DQ124
DDR_DQ123
DDR_DQ122
DDR_VREF7
DDR_VREF6
DDR_VREF5
DDR_VREF4
DDR_VREF3
INTERFACE
CONTROL
MEMORY
DDR
CLK_AVDD
VDD_DDR
(SYM 3 OF 7)
DDR_CK_D
DDR_CK_CN
DDR_CK_C
DDR_CK_BN
DDR_CK_B
DDR_CK_AN
DDR_CK_A
DDR_CK_DN
DDR_CK_EN
DDR_CK_FN
DDR_CK_F
DDR_CK_E
DDR_CLKP
DDR_CKE7
DDR_CKE6
DDR_CKE5
DDR_CKE4
DDR_CKE3
DDR_CKE1 DDR_CKE2
DDR_CKE0
DDR_VREF1
DDR_RAS
DDR_CAS
DDR_WE
DDR_BA1
DDR_BA0
DDR_MUXEN0
DDR_MAD5
DDR_MAD4
DDR_MAD3
DDR_MAD2
DDR_MAD1
DDR_MAD0
DDR_MUXEN4
DDR_MAD9
DDR_MAD8
DDR_MAD6 DDR_MAD7
DDR_MAD13
DDR_MAD12
DDR_MAD11
DDR_MAD10
DDR_CS1
DDR_CS0
DDR_CS2
DDR_CS8
DDR_CS3
DDR_CS11
DDR_CS10
DDR_CS9
DDR_DQSP1
DDR_DQSP0
DDR_DQSP2 DDR_DQSP3
DDR_DQSP8
DDR_DQSP7
DDR_DQSP6
DDR_DQSP9 DDR_DQSP10 DDR_DQSP11 DDR_DQSP12
DDR_DQSP4
DDR_DQSP5
DDR_DQSP13
DDR_DQSP15
DDR_DQSP14
DDR_CLK_AVSS
DDR_VREF2
DDR_VREF0
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
U3TWINS DO NOT HAVE MASKS
MASTER: GILA
U3LITE MEMORY
LAST MODIFIED: APR 12, 04
CERM
10V
20%
0.1UF
402
2
1
C3713
402
0.1UF
20% 10V CERM
2
1
C3712
CERM
10V
20%
0.1UF
402
2
1
C3711
402
0.1UF
20% 10V CERM
2
1
C3710
CERM
10V
20%
0.1UF
402
2
1
C3709
402
0.1UF
20% 10V CERM
2
1
C3708
CERM
10V
20%
0.1UF
402
2
1
C3707
402
0.1UF
20% 10V CERM
2
1
C3706
CERM
10V
20%
0.1UF
402
2
1
C3705
402
0.1UF
20% 10V CERM
2
1
C3704
CERM
10V
20%
0.1UF
402
2
1
C3703
402
0.1UF
20% 10V CERM
2
1
C3702
CERM
10V
20%
0.1UF
402
2
1
C3701
0.1UF
CERM 402
20% 10V
2
1
C3700
402
0.1UF
20% 10V CERM
2
1
C3714
402
0.1UF
20% 10V CERM
2
1
C3729
CERM
10V
20%
0.1UF
402
2
1
C3728
402
0.1UF
20% 10V CERM
2
1
C3727
CERM
10V
20%
0.1UF
402
2
1
C3726
402
0.1UF
20% 10V CERM
2
1
C3725
CERM
10V
20%
0.1UF
402
2
1
C3724
CERM
10V
20%
0.1UF
402
2
1
C3722
402
0.1UF
20% 10V CERM
2
1
C3721
CERM
10V
20%
0.1UF
402
2
1
C3720
402
0.1UF
20% 10V CERM
2
1
C3719
CERM
10V
20%
0.1UF
402
2
1
C3718
402
0.1UF
20% 10V CERM
2
1
C3717
CERM
10V
20%
0.1UF
402
2
1
C3716
0.1UF
CERM 402
20% 10V
2
1
C3715
CERM
10V
20%
0.1UF
402
2
1
C3731
402
0.1UF
20% 10V CERM
2
1
C3732
402
0.1UF
20% 10V CERM
2
1
C3733
402
0.1UF
20% 10V CERM
2
1
C3734
402
0.1UF
20% 10V CERM
2
1
C3735
402
0.1UF
20% 10V CERM
2
1
C3730
402
0.1UF
20% 10V CERM
2
1
C3736
402
0.1UF
20% 10V CERM
2
1
C3737
CERM
10V
20%
0.1UF
402
2
1
C3738
CERM
10V
20%
0.1UF
402
2
1
C3739
CERM
10V
20%
0.1UF
402
2
1
C3740
CERM
10V
20%
0.1UF
402
2
1
C3742
CERM
10V
20%
0.1UF
402
2
1
C3743
2.2
603
5%
21
R3702
402
CERM
10V
20%
0.1UF
2
1
C3744
1K
1%
402
2
1
R3700
402
1UF
10%
6.3V CERM
2
1
C3745
0.1UF
CERM
10V
20%
402
2
1
C3746
CERM
10V
20%
0.1UF
402
2
1
C3747
CERM
10V
20%
0.1UF
402
2
1
C3748
402
1K
1% 1/16W MF-LF
2
1
R3701
U3LITE
V1.0-300MM
OMIT
PBGA
AA16
AA13
AB25
AC19
AE27
AE22
AE16
AE13
V20
W27
W23
Y19
Y16
AG25
AG19
P27
R28
R26
R27
U26
T28
V28
U27
W28
V24
AH25
V27
V26
Y24
Y28
Y25
Y26
AA28
AA24
AA26
AA27
AH26
AD27
AC27
AC25
AC26
AF27
AD26
AE28
AF28
AG28
AD25
AD21
AD24
AF26
AG26
AE24
AF24
AG27
H22
G21
H21
J21
AD23
H23
E23
J22
F24
A26
B28
A28
A27
A24
A23
AC21
B23
B24
C23
C24
A25
A22
C27
C26
D24
D23
AB20
J23
L23
L22
M24
P22
P21
M23
M25
P23
P24
AG21
R24
P26
U23
R21
R22
P25
U22
V22
V23
U24
AH21
AA22
Y22
AA23
U25
AH28
AF23
AG24
E24
E25
C28
D28
E26
F26
E27
E28
AH27
H26
F27
H24
H25
G28
J26
J24
J25
L24
J27
AH23
H28
H27
K28
L27
L26
L25
P28
L28
N28
M28
AH24
AH22
AF20
U3
PBGA
U3LITE
V1.0-300MM
OMIT
B25
D27
D22
F19
G25
K27
K23
K19
M19
N25
N21
P20
T25
T21
T19
AC23
J20
V21
M21
AA21
H20
L21
U21
Y21
AE21
AH18
AH16
AF15
AG15
AC12
AD12
AE12
AF12
AH15
AH14
AG17
AH17
AG14
AF14
AH13
AG12
AD28
AE23
F23
B27
B26
M22
R23
Y23
F25
F28
J28
M27
U28
Y27
AG23
AC24
AD18
AC18
AH20
AG20
AH19
AG18
AE18
AF18
AA20
AB21
AC20
AB15
AA15
AC15
AD15
AD14
AC14
AE14
AE15
AA14
AB14
AB12
AA12
AA18
AB18
AA17
AB17
AF17
AE17
AD17
AC17
AD20
AE20
AF21
U3
051-6772
102
37
04
RAM_CLK_F_N_R
RAM_DQS_R<12>
RAM_A_R<6>
RAM_CLK66M_NB
RAM_CLK_A_P_R
RAM_A_R<5>
RAM_DQ_R<78>
RAM_CKE_R<2>
=PP1V5_PWRON_NB_AVDD
RAM_CLK_B_P_R RAM_CLK_B_N_R
RAM_CLK_A_N_R
RAM_CLK_C_P_R
RAM_CLK_D_P_R
RAM_CLK_C_N_R
RAM_CLK_D_N_R
RAM_CKE_R<3>
RAM_CKE_R<6>
RAM_CKE_R<4>
RAM_CKE_R<0>
RAM_CLK_E_P_R
RAM_CLK_F_P_R
RAM_CKE_R<1>
RAM_CKE_R<5>
RAM_CS_L_R<10> RAM_CS_L_R<11>
RAM_CS_L_R<2> RAM_CS_L_R<3>
RAM_MUXEN0 RAM_MUXEN4
RAM_BA_R<1>
RAM_CKE_R<7>
RAM_DQ_R<66>
RAM_DQ_R<1>
RAM_DQ_R<63>
RAM_DQ_R<62>
RAM_DQ_R<61>
RAM_DQ_R<58>
RAM_DQ_R<60>
RAM_DQ_R<57>
RAM_DQ_R<53> RAM_DQ_R<54> RAM_DQ_R<55> RAM_DQ_R<56>
RAM_DQ_R<52>
RAM_DQ_R<50>
RAM_DQ_R<49>
RAM_DQ_R<48>
RAM_DQ_R<47>
RAM_DQ_R<51>
RAM_DQ_R<42> RAM_DQ_R<43> RAM_DQ_R<44> RAM_DQ_R<45> RAM_DQ_R<46>
RAM_DQ_R<40>
RAM_DQ_R<39>
RAM_DQ_R<38>
RAM_DQ_R<37>
RAM_DQ_R<41>
RAM_DQ_R<35>
RAM_DQ_R<34>
RAM_DQ_R<33>
RAM_DQ_R<32>
RAM_DQ_R<36>
RAM_DQ_R<30>
RAM_DQ_R<29>
RAM_DQ_R<28>
RAM_DQ_R<27>
RAM_DQ_R<31>
RAM_DQ_R<25>
RAM_DQ_R<24>
RAM_DQ_R<23>
RAM_DQ_R<22>
RAM_DQ_R<26>
RAM_DQ_R<18>
RAM_DQ_R<17>
RAM_DQ_R<19> RAM_DQ_R<20> RAM_DQ_R<21>
RAM_DQ_R<16>
RAM_DQ_R<14>
RAM_DQ_R<13>
RAM_DQ_R<12>
RAM_DQ_R<15>
RAM_DQ_R<11>
RAM_DQ_R<9>
RAM_DQ_R<8>
RAM_DQ_R<7>
RAM_DQ_R<6>
RAM_DQ_R<10>
RAM_DQ_R<4>
RAM_DQ_R<2> RAM_DQ_R<3>
RAM_DQ_R<5>
RAM_DQ_R<0>
RAM_DQ_R<59>
RAM_DQ_R<67>
RAM_DQ_R<65>
RAM_DQ_R<68> RAM_DQ_R<69>
RAM_DQ_R<72>
RAM_DQ_R<70>
RAM_DQ_R<73> RAM_DQ_R<74>
RAM_DQ_R<77>
RAM_DQ_R<76>
RAM_DQ_R<79>
RAM_DQ_R<82>
RAM_DQ_R<80> RAM_DQ_R<81>
RAM_DQ_R<83> RAM_DQ_R<84> RAM_DQ_R<85>
RAM_DQ_R<87>
RAM_DQ_R<86>
RAM_DQ_R<88>
RAM_DQ_R<90>
RAM_DQ_R<89>
RAM_DQ_R<92>
RAM_DQ_R<91>
RAM_DQ_R<93>
RAM_DQ_R<95>
RAM_DQ_R<94>
RAM_DQ_R<97>
RAM_DQ_R<96>
RAM_DQ_R<100>
RAM_DQ_R<98> RAM_DQ_R<99>
RAM_DQ_R<102>
RAM_DQ_R<101>
RAM_DQ_R<103>
RAM_DQ_R<105>
RAM_DQ_R<104>
RAM_DQ_R<106> RAM_DQ_R<107> RAM_DQ_R<108> RAM_DQ_R<109> RAM_DQ_R<110>
RAM_DQ_R<112> RAM_DQ_R<113>
RAM_DQ_R<111>
RAM_DQ_R<115>
RAM_DQ_R<114>
RAM_DQ_R<116>
RAM_DQ_R<118>
RAM_DQ_R<117>
RAM_DQ_R<120>
RAM_DQ_R<119>
RAM_DQ_R<122> RAM_DQ_R<123>
RAM_DQ_R<121>
RAM_DQ_R<125>
RAM_DQ_R<124>
RAM_DQ_R<126> RAM_DQ_R<127>
RAM_RAS_L_R
RAM_CAS_L_R
RAM_WE_L_R
RAM_BA_R<0>
RAM_A_R<0> RAM_A_R<1> RAM_A_R<2>
RAM_A_R<4>
RAM_A_R<3>
RAM_A_R<7> RAM_A_R<8> RAM_A_R<9> RAM_A_R<10> RAM_A_R<11> RAM_A_R<12> RAM_A_R<13>
RAM_CS_L_R<0> RAM_CS_L_R<1>
RAM_CS_L_R<8> RAM_CS_L_R<9>
RAM_DQS_R<0> RAM_DQS_R<1> RAM_DQS_R<2> RAM_DQS_R<3> RAM_DQS_R<4> RAM_DQS_R<5> RAM_DQS_R<6> RAM_DQS_R<7> RAM_DQS_R<8>
RAM_DQS_R<10>
RAM_DQS_R<9>
RAM_DQS_R<11>
RAM_DQS_R<13> RAM_DQS_R<14> RAM_DQS_R<15>
RAM_DQ_R<75>
RAM_DQ_R<71>
RAM_DQ_R<64>
VOLTAGE=1.5V
PP1V5_PWRON_RAM_NB_AVDD
MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
RAM_CLK_E_N_R
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
PP1V25_PWRON_RAM_VREF_NB
VOLTAGE=1.25V
=PP2V5_PWRON_RAM
=PP2V5_PWRON_RAM
=PP2V5_PWRON_RAM
=PP2V5_PWRON_RAM
46
46
46
46
60
40
40
40
40
48
37
37
37
37
28
26
26
26
26
38
38
38
27
38
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8
7
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38
8
8
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8
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8
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7
7
7
7
Preliminary
Page 35
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
SERIES TERM
ELECTRICAL_CONSTRAINT_SET
NET_PHYSICAL_TYPE
NET_SPACING_TYPE
DIFFERENTIAL_PAIR
RAM_CLK LINE-LINE SPACING SET TO 15MIL TOTAL LENGTH TOLERENCE = 20PS = 2.82MM
RAM_CAD SPACING IS 10MIL
THE FOLLOWING ARE 0402 5% RESISTORS
THE FOLLOWING IS A SWAPPABLE GROUP
THE FOLLOWING IS A SWAPPABLE GROUP
RAM_CLK PRIMARY SPACING SET BASED ON DIFF IMPEDANCE
ALL R PACKS ARE 1/16W 5%
22
72
RP3818
22
81
RP3818
22
63
RP3826
22
54
RP3807
22
63
RP3807
22
81
RP3826
22
81
RP3807
22
81
RP3811
22
72
RP3811
22
54
RP3811
22
72
RP3814
22
81
RP3814
22
63
RP3817
22
54
RP3814
22
63
RP3814
22
63
RP3811
22
72
RP3830
22
54
RP3830
22
63
RP3830
22
81
RP3830
22
72
RP3812
22
54
RP3812
22
63
RP3812
22
54
RP3817
22
81
RP3813
22
81
RP3812
22
54
RP3831
22
72
RP3831
22
72
RP3813
22
81
RP3831
22
63
RP3831
22
63
RP3813
22
54
RP3813
15
63
RP3832
22
72
RP3802
15
54
RP3832
15
72
RP3832
15
63
RP3833
15
54
RP3800
15
72
RP3833
15
81
RP3833
15
81
RP3834
15
72
RP3834
15
63
RP3800
15
72
RP3800
22
81
RP3817
15
81
RP3832
15
54
RP3833
15
81
RP3800
15
81
RP3804
15
54
RP3804
15
63
RP3804
15
63
RP3834
15
72
RP3804
15
54
RP3834
22
81
RP3802
22
63
RP3802
15
63
RP3841
15
81
RP3841
15
54
RP3841
15
72
RP3841
15
81
RP3842
22
72
RP3806
15
72
RP3842
15
54
RP3842
15
63
RP3842
22
81
RP3821
15
21
R3800
15
21
R3801
22
54
RP3821
15
21
R3802
15
21
R3803
15
21
R3804
15
21
R3805
15
21
R3806
15
21
R3807
15
21
R3808
15
21
R3809
15
21
R3810
15
21
R3811
22
72
RP3805
22
72
RP3821
15
21
R3812
15
21
R3813
15
21
R3814
15
21
R3815
I206
I207
I208 I209
22
81
RP3806
I210 I211
I212
I213 I214
I215
I216 I217
I218
I219
22
63
RP3806
I220
I221 I222
I223
I224 I225
I226
I227 I228
I229
22
63
RP3821
I230
I232 I234
I235
I236
I237
I238
22
54
RP3806
I241
I242
I243
I244
I245
I246
I248
22
63
RP3819
I251
I252
I253 I254
I255
I256 I257
I258 I259
22
81
RP3819
I260
I261 I262
I263
I264 I265
I266
I267
I268
I269
22
54
RP3803
I270
I271
I272
I273
I274
I275
I276
I277
I278
I279
22
54
RP3819
I280
15
21
R3816
15
21
R3817
15
21
R3818
15
21
R3819
15
21
R3820
15
21
R3821
15
21
R3822
15
21
R3823
15
21
R3824
22
72
RP3803
15
21
R3825
15
21
R3826
15
21
R3827
I293
I294
I295
I296 I297
I298
I299
22
54
RP3818
22
63
RP3803
I300
I301
I302
I303
I304
I305
22
72
RP3819
22
81
RP3803
22
54
RP3820
22
63
RP3820
22
72
RP3820
22
81
RP3820
22
72
RP3825
22
63
RP3825
22
81
RP3825
22
81
RP3805
22
54
RP3825
22
81
RP3809
22
63
RP3809
22
72
RP3809
22
72
RP3829
22
54
RP3829
22
63
RP3829
22
54
RP3809
22
81
RP3829
22
54
RP3828
22
63
RP3818
22
72
RP3815
22
81
RP3815
22
81
RP3828
22
63
RP3815
22
63
RP3828
22
72
RP3828
22
54
RP3815
22
63
RP3827
22
72
RP3827
22
54
RP3827
22
54
RP3805
22
72
RP3810
22
81
RP3827
22
54
RP3810
22
81
RP3810
22
63
RP3810
22
54
RP3836
22
72
RP3836
22
81
RP3836
22
63
RP3836
22
72
RP3816
22
54
RP3802
22
81
RP3816
22
63
RP3816
22
54
RP3835
22
54
RP3816
22
63
RP3801
22
81
RP3801
22
54
RP3801
22
72
RP3801
22
72
RP3835
22
63
RP3835
22
72
RP3817
22
81
RP3835
22
81
RP3822
22
72
RP3822
22
54
RP3822
22
63
RP3823
22
63
RP3822
22
54
RP3823
22
81
RP3823
22
72
RP3823
22
81
RP3808
22
63
RP3805
22
72
RP3824
22
63
RP3808
22
54
RP3808
22
81
RP3824
22
72
RP3808
22
63
RP3824
22
54
RP3824
22
72
RP3826
22
54
RP3826
22
72
RP3807
04
38
102
051-6772
RAM_CKECS1
RAM_CS_L<9>
RAM_CADRAM_CAD
RAM_CAD
RAM_DQ<127..0>
RAM_CAD
RAM_CAD
RAM_DQS<0>
RAM_DQS0
RAM_CAD
RAM_CAD
RAM_DQ<7..0>
RAM_DQS0
RAM_CAD
RAM_CAD
RAM_DQS_R<15..0>
RAM_CAD
RAM_CLK
RAM_CLK1
RAM_CLK_F
RAM_CLK
RAM_CLK_F_N
RAM_CLK
RAM_CLK1
RAM_CLK_F_P
RAM_CLK
RAM_CLK_F
RAM_CLK
RAM_CLK1
RAM_CLK_D_P
RAM_CLK
RAM_CLK_D
RAM_CLK
RAM_CLK_B
RAM_CLK_B_P
RAM_CLK
RAM_CLK0
RAM_CKECS1
RAM_CS_L<8>
RAM_CADRAM_CAD
RAM_CLK
RAM_CLK_D_R
RAM_CLK_D_N_R
RAM_CLK
RAM_CLK
RAM_CLK0
RAM_CLK_C_P
RAM_CLK
RAM_CLK_C
RAM_CKE_R<5..4>
RAM_CADRAM_CAD
RAM_CLK
RAM_CLK1
RAM_CLK_E_N
RAM_CLK_E
RAM_CLK
RAM_CLK
RAM_CLK1
RAM_CLK_D
RAM_CLK_D_N
RAM_CLK
RAM_CLK
RAM_CLK_D_R
RAM_CLK_D_P_R
RAM_CLK
RAM_CLK
RAM_CLK_E_R
RAM_CLK_E_P_R
RAM_CLK
RAM_CLK
RAM_CLK_E_R
RAM_CLK_E_N_R
RAM_CLK
RAM_CLK
RAM_CLK_B_N
RAM_CLK
RAM_CLK_B
RAM_CLK0
RAM_CKE_R<1..0>
RAM_CADRAM_CAD
RAM_CKECS0
RAM_CKE<1>
RAM_CADRAM_CAD
RAM_CKECS1
RAM_CKE<4>
RAM_CADRAM_CAD
RAM_CKECS1
RAM_CKE<5>
RAM_CADRAM_CAD
RAM_CS_L_R<9..8>
RAM_CADRAM_CAD
RAM_CS_L<1>
RAM_CAD
RAM_CKECS0
RAM_CAD
RAM_CLK
RAM_CLK_A_R
RAM_CLK
RAM_CLK_A_P_R
RAM_CLK
RAM_CLK_A_R
RAM_CLK_A_N_R
RAM_CLK
RAM_CLK
RAM_CLK_B_R
RAM_CLK_B_P_R
RAM_CLK
RAM_CLK
RAM_CLK_B_R
RAM_CLK_B_N_R
RAM_CLK
RAM_CLK
RAM_CLK_C_R
RAM_CLK
RAM_CLK_C_P_R
RAM_CLK
RAM_CLK_C_R
RAM_CLK_C_N_R
RAM_CLK
RAM_DQ_R<42>
RAM_DQ<40>
RAM_DQ<68> RAM_DQ<65>
RAM_DQ<75>
RAM_DQ<66>
RAM_DQ<70>
RAM_DQ<69>
RAM_DQ<71> RAM_DQ<64> RAM_DQ<67>
RAM_DQ<74> RAM_DQ<73> RAM_DQ<72>
RAM_DQ<79>
RAM_DQ<78>
RAM_DQ<77> RAM_DQ<76> RAM_DQ<87>
RAM_DQ<81>
RAM_DQ<86>
RAM_DQ<80> RAM_DQ<84> RAM_DQ<85> RAM_DQ<83>
RAM_DQ<89>
RAM_DQ<82> RAM_DQ<91> RAM_DQ<93>
RAM_DQ<88>
RAM_DQ<90>
RAM_DQ<94>
RAM_DQ<92> RAM_DQ<95>
RAM_DQ<103>
RAM_DQ<96>
RAM_DQ<98>
RAM_DQ<97> RAM_DQ<100> RAM_DQ<99> RAM_DQ<102> RAM_DQ<101> RAM_DQ<111> RAM_DQ<106> RAM_DQ<105>
RAM_DQ<118>
RAM_DQ<115>
RAM_DQ<107>
RAM_DQ<108>
RAM_DQ<110> RAM_DQ<104> RAM_DQ<109> RAM_DQ<119> RAM_DQ<112> RAM_DQ<117>
RAM_DQ<116>
RAM_DQ<113>
RAM_DQ<114> RAM_DQ<121> RAM_DQ<124> RAM_DQ<120> RAM_DQ<123> RAM_DQ<125> RAM_DQ<122> RAM_DQ<126> RAM_DQ<127>
RAM_DQ_R<106>
RAM_DQ_R<111>
RAM_DQ_R<68>
RAM_DQ_R<70>
RAM_DQ_R<69>
RAM_DQ_R<71> RAM_DQ_R<64> RAM_DQ_R<67>
RAM_DQ_R<74>
RAM_DQ_R<75>
RAM_DQ_R<73> RAM_DQ_R<72>
RAM_DQ_R<79>
RAM_DQ_R<78>
RAM_DQ_R<77> RAM_DQ_R<76> RAM_DQ_R<87>
RAM_DQ_R<81>
RAM_DQ_R<86>
RAM_DQ_R<80> RAM_DQ_R<84> RAM_DQ_R<85> RAM_DQ_R<83>
RAM_DQ_R<93>
RAM_DQ_R<88>
RAM_DQ_R<90>
RAM_DQ_R<94>
RAM_DQ_R<103>
RAM_DQ_R<96>
RAM_DQ_R<98>
RAM_DQ_R<97>
RAM_DQ_R<99> RAM_DQ_R<102>
RAM_DQ_R<108>
RAM_DQ_R<105>
RAM_DQ_R<110> RAM_DQ_R<104> RAM_DQ_R<109> RAM_DQ_R<119> RAM_DQ_R<112> RAM_DQ_R<117> RAM_DQ_R<118>
RAM_DQ_R<116>
RAM_DQ_R<115>
RAM_DQ_R<113>
RAM_DQ_R<114> RAM_DQ_R<121> RAM_DQ_R<124> RAM_DQ_R<120>
RAM_DQ_R<125> RAM_DQ_R<122> RAM_DQ_R<126>
RAM_DQ_R<65>
RAM_DQ_R<66>
RAM_DQ_R<95>
RAM_DQ_R<123>
RAM_DQ_R<127>
RAM_DQ_R<82> RAM_DQ_R<91>
RAM_DQ_R<89> RAM_DQ_R<92>
RAM_DQ_R<100>
RAM_DQ_R<101>
RAM_DQ_R<107>
RAM_DQ<2>
RAM_DQ<7>
RAM_DQ<9> RAM_DQ<10>
RAM_DQ<14> RAM_DQ<12>
RAM_DQ<22>
RAM_DQ<6>
RAM_DQ<8> RAM_DQ<17>
RAM_DQ<19> RAM_DQ<18> RAM_DQ<20> RAM_DQ<16>
RAM_DQ<1>
RAM_DQ<11>
RAM_DQ<13> RAM_DQ<15>
RAM_DQ<21>
RAM_DQ<3>
RAM_DQ<0>
RAM_DQ<4>
RAM_DQ<5>
RAM_DQ_R<7> RAM_DQ_R<2>
RAM_DQ_R<22>
RAM_DQ_R<18>
RAM_DQ_R<8>
RAM_DQ_R<15>
RAM_DQ_R<17>
RAM_DQ_R<20> RAM_DQ_R<16> RAM_DQ_R<21>
RAM_DQ_R<19>
RAM_DQ_R<0>
RAM_DQ_R<12> RAM_DQ_R<13>
RAM_DQ_R<3>
RAM_DQ_R<4>
RAM_DQ_R<9>
RAM_DQ_R<1>
RAM_DQ_R<6> RAM_DQ_R<5>
RAM_DQ_R<10> RAM_DQ_R<11> RAM_DQ_R<14>
RAM_DQ<27> RAM_DQ<28>
RAM_DQ<38>
RAM_DQ<35>
RAM_DQ<23> RAM_DQ<30>
RAM_DQ<24>
RAM_DQ<26>
RAM_DQ<31>
RAM_DQ<32>
RAM_DQ<39>
RAM_DQ<37>
RAM_DQ<34> RAM_DQ<36>
RAM_DQ<33>
RAM_DQ<46>
RAM_DQ<47>
RAM_DQ<43>
RAM_DQ<25>
RAM_DQ<29>
RAM_DQ<60>
RAM_DQ<61> RAM_DQ<57>
RAM_DQ<41> RAM_DQ<45>
RAM_DQ<51> RAM_DQ<50>
RAM_DQ<44>
RAM_DQ<42>
RAM_DQ<48>
RAM_DQ<53> RAM_DQ<54>
RAM_DQ<52>
RAM_DQ<49>
RAM_DQ<56>
RAM_DQ<55>
RAM_DQ<63> RAM_DQ<59>
RAM_DQ<58> RAM_DQ<62>
RAM_DQ_R<24>
RAM_DQ_R<23> RAM_DQ_R<30> RAM_DQ_R<26>
RAM_DQ_R<27> RAM_DQ_R<28> RAM_DQ_R<31>
RAM_DQ_R<25>
RAM_DQ_R<29>
RAM_DQ_R<38>
RAM_DQ_R<32> RAM_DQ_R<35>
RAM_DQ_R<39>
RAM_DQ_R<37>
RAM_DQ_R<34> RAM_DQ_R<36>
RAM_DQ_R<33>
RAM_DQ_R<46>
RAM_DQ_R<47>
RAM_DQ_R<43>
RAM_DQ_R<51>
RAM_DQ_R<53>
RAM_DQ_R<60> RAM_DQ_R<58>
RAM_DQ_R<61>
RAM_DQ_R<48>
RAM_DQ_R<49>
RAM_DQ_R<57>
RAM_DQ_R<41> RAM_DQ_R<45>
RAM_DQ_R<40>
RAM_DQ_R<50>
RAM_DQ_R<44>
RAM_DQ_R<54>
RAM_DQ_R<52>
RAM_DQ_R<56>
RAM_DQ_R<55>
RAM_DQ_R<63> RAM_DQ_R<59>
RAM_DQ_R<62>
RAM_CLK_F_N_R
RAM_CLK_E_N_R RAM_CLK_F_P_R
RAM_A<4> RAM_A<6>
RAM_A<12> RAM_A<2>
RAM_A_R<2>
RAM_A_R<12>
RAM_A_R<7>
RAM_A_R<9> RAM_A_R<8>
RAM_A<8>
RAM_A_R<4>
RAM_A_R<10>
RAM_A<1> RAM_A<10>
RAM_BA_R<0>
RAM_BA_R<1> RAM_RAS_L_R
RAM_A_R<5>
RAM_A_R<0>
RAM_CS_L_R<0>
RAM_CS_L_R<1>
RAM_CS_L_R<8>
RAM_A_R<1>
RAM_WE_L_R
RAM_A_R<6>
RAM_CKE_R<1>
RAM_CS_L_R<9>
RAM_CS_L<1>
RAM_CLK_C_N_R
RAM_CAD
RAM_DQ<23..16>
RAM_DQS2
RAM_CAD
RAM_CAD
RAM_DQS2
RAM_DQS<2>
RAM_CAD
RAM_RAS_L RAM_A<9>
RAM_BA<1>
RAM_BA<0>
RAM_CAS_L
RAM_CAS_L_R
RAM_A<3>
RAM_A_R<3>
RAM_A<13>
RAM_A_R<13>
RAM_A<5>
RAM_A<0>
RAM_A<7>
RAM_WE_L
RAM_A<11>
RAM_A_R<11>
RAM_CS_L<0>
RAM_CS_L<9>
RAM_CS_L<8>
RAM_CKE<0>
RAM_CKE_R<0>
RAM_CKE<5>
RAM_CKE_R<5>
RAM_CKE<1>
RAM_CKE<4>
RAM_CKE_R<4>
RAM_CS_L<0>
RAM_CAD
RAM_CKECS0
RAM_CAD
RAM_CS_L_R<1..0>
RAM_CADRAM_CAD
RAM_CKECS0
RAM_CKE<0>
RAM_CADRAM_CAD
RAM_CLK
RAM_CLK1
RAM_CLK_E
RAM_CLK_E_P
RAM_CLK
RAM_CLK
RAM_CLK0
RAM_CLK_C
RAM_CLK_C_N
RAM_CLK
RAM_CLK
RAM_CLK0
RAM_CLK_A_N
RAM_CLK_A
RAM_CLK
RAM_CLK RAM_CLK
RAM_CLK0
RAM_CLK_A_P
RAM_CLK_A
RAM_CLK
RAM_CLK_F_R
RAM_CLK
RAM_CLK_F_N_R
RAM_CLK
RAM_CLK_F_R
RAM_CLK_F_P_R
RAM_CLK
RAM_CAD
RAM_DQ_R<127..0>
RAM_CAD
RAM_CAD
RAM_DQS3
RAM_DQS<3>
RAM_CAD
RAM_CAD
RAM_DQ<39..32>
RAM_DQS4
RAM_CAD
RAM_CAD
RAM_DQS8
RAM_DQS<8>
RAM_CAD
RAM_CAD
RAM_DQ<79..72>
RAM_DQS9
RAM_CAD
RAM_CAD
RAM_DQ<87..80>
RAM_DQS10
RAM_CAD
RAM_CAD
RAM_DQ<15..8>
RAM_DQS1
RAM_CAD
RAM_CAD
RAM_DQ<71..64>
RAM_DQS8
RAM_CAD
RAM_CAD
RAM_DQS7
RAM_DQS<7>
RAM_CAD
RAM_CAD
RAM_DQ<55..48>
RAM_DQS6
RAM_CAD
RAM_CAD
RAM_DQS1
RAM_DQS<1>
RAM_CAD
RAM_CAD
RAM_DQ<31..24>
RAM_DQS3
RAM_CAD
RAM_CAD
RAM_DQ<103..96>
RAM_DQS12
RAM_CAD
RAM_CAD
RAM_CAS_L_R
RAM_CAD
RAM_CAD
RAM_WE_L
RAM_A_CTL
RAM_CAD
RAM_CAD
RAM_DQS4
RAM_DQS<4>
RAM_CAD
RAM_DQS<0>
RAM_DQS_R<0>
RAM_DQS<1>
RAM_DQS_R<1>
RAM_DQS<2>
RAM_DQS_R<2>
RAM_DQS<3>
RAM_DQS_R<3>
RAM_DQS<5>
RAM_DQS_R<5>
RAM_DQS<4>
RAM_DQS_R<4>
RAM_DQS<6>
RAM_DQS_R<6>
RAM_DQS<8>
RAM_DQS_R<8>
RAM_DQS<7>
RAM_DQS_R<7>
RAM_DQS<10>
RAM_DQS_R<10>
RAM_DQS<9>
RAM_DQS_R<9>
RAM_DQS<11>
RAM_DQS_R<11>
RAM_DQS<12>
RAM_DQS_R<12>
RAM_DQS<13>
RAM_DQS_R<13>
RAM_DQS<14>
RAM_DQS_R<14>
RAM_DQS<15>
RAM_DQS_R<15>
RAM_CLK_B_P_R RAM_CLK_B_N_R RAM_CLK_C_P_R
RAM_CLK_D_P_R RAM_CLK_D_N_R RAM_CLK_E_P_R
RAM_CLK_A_P_R RAM_CLK_A_N_R
RAM_CLK_A_P RAM_CLK_A_N RAM_CLK_B_P RAM_CLK_B_N RAM_CLK_C_P RAM_CLK_C_N RAM_CLK_D_P RAM_CLK_D_N RAM_CLK_E_P RAM_CLK_E_N RAM_CLK_F_P RAM_CLK_F_N
RAM_CAD
RAM_DQS5
RAM_DQS<5>
RAM_CAD
RAM_CAD
RAM_DQ<47..40>
RAM_DQS5
RAM_CAD
RAM_CAD
RAM_DQS6
RAM_DQS<6>
RAM_CAD
RAM_CAD
RAM_DQ<63..56>
RAM_DQS7
RAM_CAD
RAM_CAD
RAM_DQS<9>
RAM_DQS9
RAM_CAD
RAM_CAD
RAM_DQS<10>
RAM_DQS10
RAM_CAD
RAM_CAD
RAM_DQS<11>
RAM_DQS11
RAM_CAD
RAM_CAD
RAM_DQ<95..88>
RAM_DQS11
RAM_CAD
RAM_CAD
RAM_DQS<12>
RAM_DQS12
RAM_CAD
RAM_CAD
RAM_DQS<13>
RAM_DQS13
RAM_CAD
RAM_CAD
RAM_DQ<111..104>
RAM_DQS13
RAM_CAD
RAM_CAD
RAM_DQS<14>
RAM_DQS14
RAM_CAD
RAM_CAD
RAM_DQ<119..112>
RAM_DQS14
RAM_CAD
RAM_CAD
RAM_DQ<127..120>
RAM_DQS15
RAM_CAD
RAM_CAD
RAM_DQS<15>
RAM_DQS15
RAM_CAD
RAM_CAD
RAM_A_R<13..0>
RAM_CAD
RAM_CAD
RAM_BA_R<1..0>
RAM_CAD
RAM_CAD
RAM_RAS_L_R
RAM_CAD
RAM_CAD
RAM_WE_L_R
RAM_CAD
RAM_CAD
RAM_RAS_L
RAM_A_CTL
RAM_CAD
RAM_CAD
RAM_BA<1..0>
RAM_A_CTL
RAM_CAD
RAM_CAD
RAM_A<13..0>
RAM_A_CTL
RAM_CAD
RAM_CAD
RAM_CAS_L
RAM_A_CTL
RAM_CAD
45
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Preliminary
Page 36
VREF
TOP SIDEBOT SIDE
DQ4 DQ5
VSS
VDDQ
DM0/DQS9
DQ7 VSS
DQ6
NC NC
VSS DQ1
DQ0
DQS0
NC
NC
DQ3
DQ2 VDD
DM1/DQS10
DQ12
VDDQ
A13
DQ13
VDDQ
CKE1
DQ14 DQ15
VDD
VDDQ
VSS
DQS1
DQ9
DQ8
DQ11
DQ10
CK1*
CK1
VSS
A12 VSS
DQ20
BA2
DQ21
DM2/DQS11
DQ22
VDD
A11
A8
VDDQ
CKE0
DQS2
DQ17
DQ16
VDDQ
A7
A9 DQ18
VSS
A6
DQ28
DQ23
VSS
DQ29 VDDQ
DM3/DQS12
A3
DQ30
VSS
VSS
A5
DQ25
DQ24
DQ19
DQS3
DQ27
A4
DQ26
VDD
A2 DQ31
NC
VDDQ
NC
CK0
CKO*
NC
VSS
A10
NC
NC
NC
A1
VSS
VDD
VSS
NC
A0
NC
NC VDDQ
VSS
NC
DQ36 DQ37
VDD
DM4/DQS13
VSS
DQ39
DQ38
DQ33
DQ32
BA1
VDDQ
DQS4
DQ35
DQ34
BA0
VSS
DQ40 DQ44
DQ45 VDDQ
RAS*
S0* S1*
DM5/DQS14
VSS DQ46 DQ47
DQ41
VDDQ
CAS*
WE*
VSS
VDD
DQ43
DQ42
DQS5
NC,S2* NC,S3*
DQ52 DQ53
VDDQ
VDD
NC,FETEN
DQ55
DQ54
DM6/DQS15
VDDQ
NC
DQ49
DQ48
CK2
CK2*
VSS
VSS
DQ50
DQS6
VDDQ
DQ51
VSS
DQ60 DQ61
DQ62
DM7/DQS16
SA0
SA1
VDDQ
DQ63
SA2
VDD
DQ56
DQS7
VDDID
DQ57
SDA
DQ59
DQ58
VSS WP
SCL
VVDDSPD
VREF
TOP SIDEBOT SIDE
DQ4 DQ5
VSS
VDDQ
DM0/DQS9
DQ7 VSS
DQ6
NC NC
VSS DQ1
DQ0
DQS0
NC
NC
DQ3
DQ2 VDD
DM1/DQS10
DQ12
VDDQ
A13
DQ13
VDDQ
CKE1
DQ14 DQ15
VDD
VDDQ
VSS
DQS1
DQ9
DQ8
DQ11
DQ10
CK1*
CK1
VSS
A12 VSS
DQ20
BA2
DQ21
DM2/DQS11
DQ22
VDD
A11
A8
VDDQ
CKE0
DQS2
DQ17
DQ16
VDDQ
A7
A9 DQ18
VSS
A6
DQ28
DQ23
VSS
DQ29 VDDQ
DM3/DQS12
A3
DQ30
VSS
VSS
A5
DQ25
DQ24
DQ19
DQS3
DQ27
A4
DQ26
VDD
A2 DQ31
NC
VDDQ
NC
CK0
CKO*
NC
VSS
A10
NC
NC
NC
A1
VSS
VDD
VSS
NC
A0
NC
NC VDDQ
VSS
NC
DQ36 DQ37
VDD
DM4/DQS13
VSS
DQ39
DQ38
DQ33
DQ32
BA1
VDDQ
DQS4
DQ35
DQ34
BA0
VSS
DQ40 DQ44
DQ45 VDDQ
RAS*
S0* S1*
DM5/DQS14
VSS DQ46 DQ47
DQ41
VDDQ
CAS*
WE*
VSS
VDD
DQ43
DQ42
DQS5
NC,S2* NC,S3*
DQ52 DQ53
VDDQ
VDD
NC,FETEN
DQ55
DQ54
DM6/DQS15
VDDQ
NC
DQ49
DQ48
CK2
CK2*
VSS
VSS
DQ50
DQS6
VDDQ
DQ51
VSS
DQ60 DQ61
DQ62
DM7/DQS16
SA0
SA1
VDDQ
DQ63
SA2
VDD
DQ56
DQS7
VDDID
DQ57
SDA
DQ59
DQ58
VSS WP
SCL
VVDDSPD
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
TABLE_5_ITEM
TABLE_5_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
516-0086
NC
GND: VDD & VDDQ ARE DIFFERENT
PIN 82: NC: VDD & VDDQ ARE THE SAME
NC
NC
DIMMS
NC NC
NC
NC NC
NC
NC
NC
SA1
NC NC
NC
NC
NC
NC
NC
NC
NC NC
NC
SA0 SA1 SA2
V’S ADJACENT TO G’S FORBIDDEN
R’S ADJACENT TO V’S OR G’S
NC
NC
NC
NC
V V R R V
NC
NC
NC
NC
NC
NC
NC
NC
NC
SA2
NC
NC
NC
ADDR=0(A0/A1)
ADDR=1(A2/A3)
FETEN
NC
FETEN
NC
0.1UF
402
CERM
10V
20%
2
1
C4001
402
CERM
10V
20%
0.1UF
2
1
C4004
0.1UF
20% 10V CERM 402
2
1
C4005
402
CERM
10V
20%
0.1UF
2
1
C4009
0.1UF
20% 10V CERM 402
2
1
C4010
402
CERM
10V
20%
0.1UF
2
1
C4011
402
CERM
10V
20%
0.1UF
2
1
C4012
0.1UF
402
CERM
10V
20%
2
1
C4013
0.1UF
402
10V
20% CERM
2
1
C4014
0.1UF
20% 10V
402
CERM
2
1
C4015
0.1UF
20%
402
CERM
10V
2
1
C4016
0.1UF
20% 10V CERM 402
2
1
C4017
402
CERM
10V
20%
0.1UF
2
1
C4018
402
CERM
10V
20%
0.1UF
2
1
C4019
402
CERM
10V
20%
0.1UF
2
1
C4021
10K
402
MF-LF
1/16W
5%
21
R4006
402
CERM
10V
20%
0.1UF
2
1
C4023
0.1UF
402
CERM
10V
20%
2
1
C4024
402
CERM
10V
20%
0.1UF
2
1
C4025
0.1UF
402
20% 10V CERM
2
1
C4026
CERM
0.1UF
402
20% 10V
2
1
C4029
402
CERM
10V
20%
0.1UF
2
1
C4030
0.1UF
402
CERM
10V
20%
2
1
C4032
402
CERM
10V
20%
0.1UF
2
1
C4033
150
1% 1/16W MF-LF 402
2
1
R4008
402
1%
150
2
1
R4010
1UF
10%
6.3V CERM 603
2
1
C4035
402
CERM
10V
20%
0.1UF
2
1
C4037
0.1UF
402
20% 10V CERM
2
1
C4038
CERM
10V
20%
0.1UF
402
2
1
C4039
0.1UF
402
CERM
10V
20%
2
1
C4040
20%
0.1UF
402
10V CERM
2
1
C4041
0.1UF
402
CERM
10V
20%
2
1
C4042
402
CERM
10V
20%
0.1UF
2
1
C4043
0.1UF
402
CERM
10V
20%
2
1
C4044
402
CERM
10V
20%
0.1UF
2
1
C4045
0.1UF
402
CERM
10V
20%
2
1
C4046
0.1UF
20% 10V CERM 402
2
1
C4047
402
CERM
10V
20%
0.1UF
2
1
C4048
402
CERM
10V
20%
0.1UF
2
1
C4049
402
CERM
10V
20%
0.1UF
2
1
C4050
5% 1/16W MF-LF
402
10K
21
R4014
402
20% 10V CERM
0.1UF
2
1
C4031
402
CERM
10V
20%
0.1UF
2
1
C4028
402
CERM
10V
20%
0.1UF
2
1
C4022
20% 10V CERM 402
0.1UF
2
1
C4000
20% 10V CERM 402
0.1UF
2
1
C4020
402
CERM
10V
20%
0.1UF
2
1
C4027
402
CERM
10V
20%
0.1UF
2
1
C4051
402
CERM
10V
20%
0.1UF
2
1
C4052
402
CERM
10V
20%
0.1UF
2
1
C4002
402
CERM
10V
20%
0.1UF
2
1
C4003
CERM 1206
6.3V
10UF
20%
2
1
C4036
20%
10UF
6.3V 1206
CERM
2
1
C4008
20%
10UF
6.3V 1206
CERM
2
1
C4006
CERM 1206
6.3V
10UF
20%
2
1
C4007
DDR-DIMM-STD
F-28DEG-TH
OMIT
90
63
184
66
58
50
42
34
26
18
176
160
152
11
145
139
132
124
116
100
93
89
81
74
3
1
112
104
96
77
62
54
30
22
180
172
164
156
143
136
128
15
82
148
120
108
85
70
46
38
168
7
91 92
183
182
181
158
157
154
101
71
51
49
47
45
44
10
173
167
163
144
142
140
135
134
102
9
86
78
67
56
36
25
14
5
13
12
99
179
178
175
174
98
88
87
84
83
171
170
166
165
80
79
95
73
72
162
161
155
153
69
68
64
61
94
151
150
147
146
60
57
55
53
133
131
8
127
126
40
39
35
33
123
121
117
114
6
31
28
24
23
110
109
106
105
20
19
4
2
177
169
159
149
129
119
107
97
111
21
75 76
17
16
138
137
65
113
52
59
27
122
29
125
32
37
130
41
103
115
118
141
43
48
J4000
OMIT
F-28DEG-TH
DDR-DIMM-STD
90
63
184
66
58
50
42
34
26
18
176
160
152
11
145
139
132
124
116
100
93
89
81
74
3
1
112
104
96
77
62
54
30
22
180
172
164
156
143
136
128
15
82
148
120
108
85
70
46
38
168
7
91 92
183
182
181
158
157
154
101
71
51
49
47
45
44
10
173
167
163
144
142
140
135
134
102
9
86
78
67
56
36
25
14
5
13
12
99
179
178
175
174
98
88
87
84
83
171
170
166
165
80
79
95
73
72
162
161
155
153
69
68
64
61
94
151
150
147
146
60
57
55
53
133
131
8
127
126
40
39
35
33
123
121
117
114
6
31
28
24
23
110
109
106
105
20
19
4
2
177
169
159
149
129
119
107
97
111
21
75 76
17
16
138
137
65
113
52
59
27
122
29
125
32
37
130
41
103
115
118
141
43
48
J4001
516-0086
CRITICAL
17_INCH_LCDJ4000,J4001
CONN,DDR DIMM 30 DEG
2
516-0087
CRITICAL
20_INCH_LCD
CONN,DDR DIMM REVERSE 30 DEG
2
J4000,J4001
04
40
102
051-6772
RAM_A<13>
RAM_A<13>
RAM_CKE<1>
=PP2V5_PWRON_RAM
RAM_DQ<1>
PP1V25_RAM_VREF_DIMM MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
=PP2V5_PWRON_RAM
=PP2V5_PWRON_RAM =PP2V5_PWRON_RAM
PP1V25_RAM_VREF_DIMM
RAM_DQ<11> RAM_DQ<13>
RAM_DQ<8> RAM_DQ<12>
RAM_DQ<7>
RAM_DQ<3>
RAM_DQ<4>
RAM_DQ<17> RAM_A<12>
RAM_DQ<22> RAM_A<11>
RAM_A<8>
RAM_DQ<21>
RAM_A<6>
RAM_DQ<20>
RAM_DQ<25>
RAM_DQ<26>
RAM_A<3> RAM_DQ<24>
RAM_DQ<14>
RAM_DQ<10> RAM_DQS<1> RAM_DQ<9>
TP_J4000_SJRESET_L
RAM_DQ<15>
RAM_DQ<2> RAM_DQ<0> RAM_DQS<0>
RAM_CLK_A_N
RAM_CLK_A_P
RAM_DQ<5>
RAM_DQ<6>
RAM_CKE<0>
RAM_DQ<19> RAM_DQ<18> RAM_DQS<2>
RAM_DQ<23>
RAM_A<9>
RAM_A<7>
RAM_A<5>
RAM_DQ<16>
RAM_DQ<27>
RAM_DQ<29>
RAM_A<4>
RAM_DQS<3>
RAM_DQ<28>
RAM_DQ<31>
RAM_DQ<30>
RAM_CLK_C_P RAM_CLK_C_N
RAM_A<10>
RAM_DQ<35> RAM_DQ<33>
RAM_DQ<36> RAM_DQ<39>
RAM_DQ<60> RAM_RAS_L RAM_DQ<63>
RAM_CS_L<0> RAM_CS_L<1>
RAM_DQ<58>
RAM_DQ<62>
RAM_DQ<40> RAM_DQ<42>
RAM_DQ<46> RAM_DQ<45>
RAM_A<2>
RAM_A<1>
RAM_A<0>
RAM_DQ<34>
RAM_BA<1>
RAM_DQ<37>
RAM_DQ<38>
RAM_DQS<4>
RAM_DQ<32>
RAM_BA<0>
RAM_DQ<61>
RAM_WE_L
RAM_CAS_L
RAM_DQ<57>
RAM_DQ<59>
RAM_DQS<7>
RAM_DQ<56>
RAM_DQ<41>
RAM_DQ<43>
RAM_CLK_B_P
RAM_CLK_B_N
RAM_DQS<5>
RAM_DQ<44>
RAM_DQ<47>
RAM_DQ<48>
RAM_DQ<49>
RAM_DQ<54> RAM_DQ<55>
SD_A_SA0
RAM_DQ<50>
=PP2V5_PWRON_RAM
RAM_DQ<51>
RAM_DQS<6>
RAM_DQ<52>
RAM_DQ<53>
I2C_DIMM_SDA I2C_DIMM_SCL
PP1V25_RAM_VREF_DIMM
RAM_DQ<74> RAM_DQ<72>
RAM_DQ<76> RAM_DQ<78>
RAM_DQ<64>
RAM_DQ<65>
RAM_DQ<69>
RAM_CKE<5>
RAM_DQ<68>
RAM_DQ<81> RAM_A<12>
RAM_DQ<86> RAM_A<11>
RAM_A<8>
RAM_DQ<85>
RAM_A<6>
RAM_DQ<84>
RAM_DQ<93>
RAM_DQ<91>
RAM_A<3> RAM_DQ<92>
RAM_DQ<75>
RAM_DQ<79> RAM_DQS<9> RAM_DQ<73>
TP_J4001_SJRESET_L
RAM_DQ<77>
RAM_DQ<66> RAM_DQ<67> RAM_DQS<8>
RAM_CLK_F_N
RAM_CLK_F_P
RAM_DQ<70>
RAM_DQ<71>
RAM_CKE<4>
RAM_DQ<83> RAM_DQ<80> RAM_DQS<10>
RAM_DQ<82>
RAM_A<9>
RAM_A<7>
RAM_A<5>
RAM_DQ<87>
RAM_DQ<90>
RAM_DQ<89>
RAM_A<4>
RAM_DQS<11>
RAM_DQ<94>
RAM_DQ<88>
RAM_DQ<95>
RAM_CLK_D_P RAM_CLK_D_N
RAM_A<10>
RAM_DQ<96> RAM_DQ<97>
RAM_DQ<99> RAM_DQ<100>
RAM_DQ<104> RAM_RAS_L RAM_DQ<105>
RAM_CS_L<8> RAM_CS_L<9>
RAM_DQ<109>
RAM_DQ<108>
RAM_DQ<112> RAM_DQ<117>
RAM_DQ<119> RAM_DQ<116>
RAM_A<2>
RAM_A<1>
RAM_A<0>
RAM_DQ<98>
RAM_BA<1>
RAM_DQ<103>
RAM_DQ<101>
RAM_DQS<12>
RAM_DQ<102>
RAM_BA<0>
RAM_DQ<106>
RAM_WE_L
RAM_CAS_L
RAM_DQ<111>
RAM_DQ<107>
RAM_DQS<13>
RAM_DQ<110>
RAM_DQ<113>
RAM_DQ<114>
RAM_CLK_E_P
RAM_CLK_E_N
RAM_DQS<14>
RAM_DQ<118>
RAM_DQ<115>
RAM_DQ<121>
RAM_DQ<120>
RAM_DQ<122> RAM_DQ<123>
SD_B_SA2
=PP2V5_PWRON_RAM
RAM_DQ<124>
=PP2V5_PWRON_RAM
RAM_DQ<125>
RAM_DQS<15>
RAM_DQ<126>
RAM_DQ<127>
I2C_DIMM_SDA I2C_DIMM_SCL
46 46
46 46
46
46 46
40 40
40 40
40
40 40
44
44
37 37
37 37
44
44
44
44
44
44
44
44
44
45
45
44
44
44
45
45
45
45
37
44
44
44
44
44
44
44
44
44
45
45
44
44
44
45
45
45
45
37 37
40
40
44
26
44
26
26 26
44
44
44
44
44
44
44
44
40
44
40
40
44
40
44
44
44
40
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
40
40
40
44
44
44
40
44
44
44
44
40
44
44
44
44
44
40
44
44
44
44
44
44
44
44
44
40
40
40
44
40
44
44
44
44
40
44
40
40
44
44
44
44
44
44
44
44
44
44
44
44
44
44
26
44
44
44
44
40
40
45
45
45
45
45
45
45
45
45
45
40
45
40
40
45
40
45
45
45
40
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
40
40
40
45
45
45
40
45
45
45
45
40
45
45
45
45
45
40
45
45
45
45
45
45
45
45
45
40
40
40
45
40
45
45
45
45
40
45
40
40
45
45
45
45
45
45
45
45
45
45
45
45
45
26
45
26
45
45
45
45
40
40
38
38
38
7
38
40
7
7 7
40
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
6
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
7
38
38
38
38
18
18
40
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
6
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
7
38
7
38
38
38
38
18
18
Preliminary
Page 37
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
PARALLEL TERM
RAM_VTT
82
5%
6
3
RP4417
82
RAM_VTT
5%
7
2
RP4428
82
RAM_VTT
5%
8
1
RP4428
82
RAM_VTT
5%
5
4
RP4413
82
RAM_VTT
5%
6
3
RP4413
82
RAM_VTT
5%
7
2
RP4413
82
RAM_VTT
5%
8
1
RP4413
82
RAM_VTT
5%
5
4
RP4412
82
RAM_VTT
5%
6
3
RP4404
82
RAM_VTT
5% 1/16W
7
2
RP4404
82
RAM_VTT
5%
8
1
RP4404
RAM_VTT
82
5%
6
3
RP4408
RAM_VTT
82
5% 1/16W
7
2
RP4408
RAM_VTT
82
5%
8
1
RP4408
82
RAM_VTT
5%
6
3
RP4412
82
RAM_VTT
5%
5
4
RP4421
82
RAM_VTT
5%
7
2
RP4412
82
RAM_VTT
5%
8
1
RP4412
82
RAM_VTT
5% 1/16W
6
3
RP4421
82
RAM_VTT
5%
7
2
RP4421
82
RAM_VTT
5%
8
1
RP4421
82
RAM_VTT
5%
5
4
RP4420
82
RAM_VTT
5% 1/16W
6
3
RP4420
RAM_VTT
82
5% 1/16W
5
4
RP4417
RAM_VTT
402
CERM
10V
20%
0.1UF
2
1
C4400
402
10V
20% CERM
RAM_VTT
0.1UF
2
1
C4401
RAM_VTT
402
CERM
10V
20%
0.1UF
2
1
C4402
402
CERM
10V
20%
RAM_VTT
0.1UF
2
1
C4403
RAM_VTT
402
CERM
10V
20%
0.1UF
2
1
C4404
402
RAM_VTT
CERM
10V
20%
0.1UF
2
1
C4405
402
CERM
RAM_VTT
10V
20%
0.1UF
2
1
C4406
RAM_VTT
402
CERM
10V
20%
0.1UF
2
1
C4407
402
RAM_VTT
CERM
10V
20%
0.1UF
2
1
C4408
402
CERM
10V
20%
0.1UF
2
1
C4409
402
0.1UF
20% 10V CERM
2
1
C4411
402
RAM_VTT
120
5%
2
1
R4400
402
RAM_VTT
120
5% 1/16W
2
1
R4401
402
RAM_VTT
120
5%
2
1
R4402
RAM_VTT
402
120
5% 1/16W
2
1
R4403
RAM_VTT
120
5%
2
1
R4404
RAM_VTT
402
120
5% 1/16W
2
1
R4405
RAM_VTT
120
5%
2
1
R4406
5% SM-LF
RAM_VTT
82
5
4
RP4425
402
RAM_VTT
120
5% 1/16W
2
1
R4407
RAM_VTT
402
CERM
10V
20%
0.1UF
2
1
C4412
402
10V
20% CERM
RAM_VTT
0.1UF
2
1
C4413
RAM_VTT
20% 10V CERM 402
0.1UF
2
1
C4416
402
CERM
10V
20%
RAM_VTT
0.1UF
2
1
C4417
402
RAM_VTT
CERM
10V
20%
0.1UF
2
1
C4414
CERM
10V
20%
402
0.1UF
RAM_VTT
2
1
C4415
402
RAM_VTT
CERM
10V
20%
0.1UF
2
1
C4419
RAM_VTT
402
CERM
10V
0.1UF
20%
2
1
C4418
RAM_VTT
82
5% 1/16W SM-LF
6
3
RP4425
0.1UF
20% 10V CERM 402
2
1
C4421
0.1UF
20% 10V
402
RAM_VTT
CERM
2
1
C4420
RAM_VTT
82
5% 1/16W
7
2
RP4425
150 5%
SM-LF
8
1
RP4438
SM-LF
1/16W
5%
150
7
2
RP4438
150
5%
8
1
RP4439
SM-LF
1/16W
5%
150
6
3
RP4438
SM-LF
1/16W
5%
150
5
4
RP4438
150
5%
7
2
RP4439
150
5%
6
3
RP4439
5% SM-LF
150
5
4
RP4439
SM-LF
1/16W
5%
150
7
2
RP4437
150
5% 1/16W
5
4
RP4436
5%
150
6
3
RP4436
150
5% 1/16W SM-LF
7
2
RP4436
150
5%
8
1
RP4436
1/16W SM-LF
5%
150
5
4
RP4437
SM-LF
150
5% 1/16W
6
3
RP4437
SM-LF
150 5% 1/16W
8
1
RP4437
1/16W
5%
150
SM-LF
7
2
RP4442
402
CERM
10V
20%
0.1UF
2
1
C4422
0.1UF
20% 10V CERM 402
2
1
C4410
5%
SM-LF
1/16W
150
5
4
RP4441
1/16W SM-LF
150
5%
6
3
RP4441
RAM_VTT
82
5% 1/16W
7
2
RP4417
RAM_VTT
82
5% 1/16W SM-LF
8
1
RP4425
SM-LF
150
5% 1/16W
5
4
RP4442
SM-LF
150
1/16W
5%
6
3
RP4442
1/16W SM-LF
5%
150
7
2
RP4441
5% 1/16W
150
SM-LF
8
1
RP4441
150
SM-LF
5%
8
1
RP4442
RAM_VTT
82
5% SM-LF
5
4
RP4424
5%
150
MF-LF
1/16W
402
2
1
R4416
5%
150
MF-LF
1/16W
402
2
1
R4417
RAM_VTT
82
5% 1/16W SM-LF
6
3
RP4424
402
1/16W MF-LF
150
5%
2
1
R4421
402
1/16W MF-LF
150
5%
2
1
R4420
402
5% 1/16W MF-LF
120
2
1
R4408
402
150
5%
MF-LF
1/16W
2
1
R4411
1/16W MF-LF
5%
150
402
2
1
R4415
5% MF-LF
1/16W
4.7K
402
2
1
R4412
1/16W MF-LF
5%
150
402
2
1
R4410
402
MF-LF
1/16W
5%
120
2
1
R4409
402
4.7K
1/16W MF-LF
5%
2
1
R4413
402
150
5% MF-LF
1/16W
2
1
R4414
5% SM-LF
82
RAM_VTT
5
4
RP4429
82
RAM_VTT
5%
6
3
RP4429
82
RAM_VTT
5%
7
2
RP4429
82
RAM_VTT
5%
8
1
RP4429
82
RAM_VTT
5%
5
4
RP4428
82
RAM_VTT
5%
6
3
RP4428
RAM_VTT
82
5% 1/16W
7
2
RP4416
RAM_VTT
82
5%
8
1
RP4416
RAM_VTT
82
5% SM-LF
5
4
RP4401
RAM_VTT
82
5% 1/16W SM-LF
6
3
RP4401
RAM_VTT
82
5% SM-LF
7
2
RP4401
RAM_VTT
82
5% 1/16W SM-LF
8
1
RP4401
RAM_VTT
82
5% SM-LF
5
4
RP4400
RAM_VTT
82
5% 1/16W SM-LF
6
3
RP4400
RAM_VTT
82
5%
8
1
RP4417
RAM_VTT
82
5% 1/16W SM-LF
7
2
RP4400
RAM_VTT
82
5%
8
1
RP4400
82
RAM_VTT
5%
7
2
RP4420
82
RAM_VTT
5% 1/16W
8
1
RP4420
RAM_VTT
82
5% 1/16W
5
4
RP4416
RAM_VTT
82
5% SM-LF
7
2
RP4424
RAM_VTT
82
5% 1/16W SM-LF
8
1
RP4424
82
RAM_VTT
5% 1/16W
5
4
RP4405
82
RAM_VTT
5%
6
3
RP4405
82
RAM_VTT
5% 1/16W
7
2
RP4405
82
RAM_VTT
5% 1/16W
8
1
RP4405
82
RAM_VTT
5% 1/16W
5
4
RP4404
RAM_VTT
82
5%
6
3
RP4416
RAM_VTT
82
5% 1/16W
5
4
RP4409
RAM_VTT
82
5%
6
3
RP4409
RAM_VTT
82
5% 1/16W
7
2
RP4409
RAM_VTT
82
5%
8
1
RP4409
RAM_VTT
82
5% 1/16W
5
4
RP4408
051-6772
44
04
102
RAM_DQ<47> RAM_DQ<46>
=PP2V5_RUN_RAM
RAM_DQ<45>
RAM_DQ<40>RAM_DQ<11>
RAM_DQ<12>
RAM_DQ<59>
RAM_DQ<61>
RAM_DQ<28>
RAM_DQ<30>
RAM_DQ<10>
RAM_DQ<24>
RAM_DQ<25>
RAM_DQ<14>
RAM_DQ<9>
RAM_DQ<58> RAM_DQ<62> RAM_DQ<56>
RAM_DQS<0> RAM_DQS<1>
RAM_DQ<29>
RAM_DQ<31>
RAM_DQ<15>
RAM_DQ<8>
PP1V25_RAM_VTT
PP1V25_RAM_VTT
RAM_DQ<44>
RAM_DQ<42>
RAM_DQS<4>
RAM_DQS<3>
RAM_DQS<2>
RAM_DQ<43>
RAM_DQ<27>
RAM_DQ<26>
RAM_DQS<6>
RAM_DQ<60>
RAM_DQ<63>
RAM_DQ<57>
PP1V25_RAM_VTT
RAM_A<13>
RAM_A<12>
RAM_A<11>
RAM_A<9>
RAM_A<8>
RP4441_NC
RAM_A<6>
RAM_A<0>
RAM_A<4>
RAM_A<3>
RAM_A<1>
PP1V25_RAM_VTT
RAM_DQS<5>
RAM_A<2>
RAM_CS_L<1>
RAM_CKE<0>
=PP2V5_RUN_RAM
PP1V25_RAM_VTT
RAM_CKE<1> RAM_CS_L<0>
RAM_DQ<41>
RAM_A<7>
RAM_A<5>
=PP2V5_RUN_RAM
PP1V25_RAM_VTT
RAM_DQS<7>
RAM_DQ<13>
PP1V25_RAM_VTT
RAM_DQ<7> RAM_DQ<0> RAM_DQ<3>
RAM_DQ<4>
RAM_DQ<2> RAM_DQ<5>
RAM_DQ<1> RAM_DQ<6>
RAM_DQ<33>
PP1V25_RAM_VTT
RAM_DQ<37> RAM_DQ<35>
RAM_DQ<39>
RAM_DQ<34> RAM_DQ<32>
RAM_DQ<36> RAM_DQ<38>
RAM_DQ<18>
RAM_DQ<22>
RAM_DQ<19>
PP1V25_RAM_VTT
RAM_DQ<23>
RAM_DQ<17> RAM_DQ<20> RAM_DQ<16> RAM_DQ<21>
RAM_DQ<51>
PP1V25_RAM_VTT
RAM_DQ<54>
RAM_DQ<48> RAM_DQ<50> RAM_DQ<49> RAM_DQ<52> RAM_DQ<55> RAM_DQ<53>
45
46
46 46
46
45
46
45
46
46 46
46 46
40
40
44
40
40 40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
45
45
40
40
40
40
40
40
40
40
40
40
40
40
45
40
40
40
40
40
40
40
40
40
40
45
40
40
40
40
44
45
40
40
40
40
40
44
45
40
40
45
40
40
40
40
40
40
40
40
40
45
40
40
40
40
40
40
40
40
40
40
45
40
40
40
40
40
40
45
40
40
40
40
40
40
40
38
38
7
38
38 38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
44
44
38
38
38
38
38
38
38
38
38
38
38
38
44
38
38
38
38
38
38
38
38
38
38
44
38
38
38
38
7
44
38
38
38
38
38
7
44
38
38
44
38
38
38
38
38
38
38
38
38
44
38
38
38
38
38
38
38
38
38
38
44
38
38
38
38
38
38
44
38
38
38
38
38
38
38
Preliminary
Page 38
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
PARALLEL TERM
RAM_VTT
82
5% SM-LF
5
4
RP4517
82
RAM_VTT
5%
6
3
RP4528
82
RAM_VTT
5%
7
2
RP4528
82
RAM_VTT
5%
8
1
RP4528
82
RAM_VTT
5%
5
4
RP4513
82
RAM_VTT
5% 1/16W
6
3
RP4513
82
RAM_VTT
5%
7
2
RP4513
82
RAM_VTT
5% 1/16W
8
1
RP4513
82
RAM_VTT
5%
5
4
RP4512
82
RAM_VTT
5% 1/16W
5
4
RP4521
82
RAM_VTT
5% 1/16W SM-LF
6
3
RP4504
82
RAM_VTT
5% SM-LF
7
2
RP4504
82
RAM_VTT
5% 1/16W SM-LF
8
1
RP4504
82
RAM_VTT
5% 1/16W SM-LF
6
3
RP4521
82
RAM_VTT
5% 1/16W SM-LF
6
3
RP4508
82
RAM_VTT
5% SM-LF
7
2
RP4508
82
5% 1/16W SM-LF
8
1
RP4508
82
RAM_VTT
5% 1/16W
6
3
RP4512
82
RAM_VTT
5%
7
2
RP4512
82
RAM_VTT
5% 1/16W
7
2
RP4521
82
RAM_VTT
5% 1/16W
8
1
RP4512
82
RAM_VTT
5%
8
1
RP4521
82
RAM_VTT
5% 1/16W
5
4
RP4520
RAM_VTT
402
10V
20% CERM
0.1UF
2
1
C4500
20% 10V
402
RAM_VTT
0.1UF
CERM
2
1
C4501
402
10V
20% CERM
0.1UF
RAM_VTT
2
1
C4502
CERM 402
20% 10V
0.1UF
RAM_VTT
2
1
C4503
RAM_VTT
0.1UF
20% 10V CERM 402
2
1
C4504
402
CERM
RAM_VTT
10V
20%
0.1UF
2
1
C4505
402
CERM
RAM_VTT
10V
20%
0.1UF
2
1
C4506
0.1UF
20% 10V CERM 402
RAM_VTT
2
1
C4507
402
CERM
RAM_VTT
10V
20%
0.1UF
2
1
C4508
RAM_VTT
82
5% 1/16W SM-LF
6
3
RP4517
RAM_VTT
402
120
5% 1/16W MF-LF
2
1
R4500
RAM_VTT
402
120
5% MF-LF
2
1
R4501
RAM_VTT
402
120
5% 1/16W MF-LF
2
1
R4502
RAM_VTT
402
120
5% MF-LF
2
1
R4503
RAM_VTT
402
120
5% 1/16W MF-LF
2
1
R4504
RAM_VTT
402
120
5% MF-LF
2
1
R4505
RAM_VTT
402
120
5% 1/16W MF-LF
2
1
R4506
RAM_VTT
5%
402
120
2
1
R4507
RAM_VTT
CERM
0.1UF
402
10V
20%
2
1
C4510
82
RAM_VTT
5% 1/16W
5
4
RP4525
20% 10V
402
CERM
0.1UF
RAM_VTT
2
1
C4511
402
CERM
RAM_VTT
10V
20%
0.1UF
2
1
C4514
402
CERM
RAM_VTT
10V
20%
0.1UF
2
1
C4515
402
CERM
RAM_VTT
10V
20%
0.1UF
2
1
C4512
402
RAM_VTT
CERM
10V
20%
0.1UF
2
1
C4513
RAM_VTT
CERM
10V
20%
0.1UF
402
2
1
C4516
402
RAM_VTT
CERM
10V
20%
0.1UF
2
1
C4517
402
CERM
RAM_VTT
10V
20%
0.1UF
2
1
C4518
82
RAM_VTT
5%
6
3
RP4525
82
RAM_VTT
5% 1/16W
7
2
RP4525
402
CERM
10V
20%
0.1UF
2
1
C4519
402
CERM
10V
20%
0.1UF
2
1
C4509
150
5% 1/16W
7
2
RP4530
150
5%
8
1
RP4530
5%
150
6
3
RP4530
150
5% 1/16W
7
2
RP4531
5% 1/16W
150
5
4
RP4530
150
5%
8
1
RP4531
5% 1/16W
150
5
4
RP4531
5% 1/16W
150
8
1
RP4532
150
5%
5
4
RP4532
5% 1/16W
150
8
1
RP4533
5%
150
6
3
RP4531
5%
150
7
2
RP4532
150
5% 1/16W
6
3
RP4532
5%
150
7
2
RP4533
82
RAM_VTT
5%
8
1
RP4525
150
5% 1/16W SM-LF
6
3
RP4533
150
5%
5
4
RP4533
402
5% 1/16W MF-LF
RAM_VTT
120
2
1
R4508
RAM_VTT
5%
402
120
2
1
R4509
5%
4.7K
402
2
1
R4510
402
4.7K
5% 1/16W MF-LF
2
1
R4511
82
RAM_VTT
5% 1/16W
5
4
RP4524
RAM_VTT
82
5% SM-LF
7
2
RP4517
82
RAM_VTT
5%
5
4
RP4529
82
RAM_VTT
5%
6
3
RP4529
82
RAM_VTT
5%
7
2
RP4529
82
RAM_VTT
5%
8
1
RP4529
82
RAM_VTT
5%
5
4
RP4528
RAM_VTT
82
5%
6
3
RP4516
RAM_VTT
82
5% SM-LF
7
2
RP4516
RAM_VTT
82
5%
8
1
RP4516
RAM_VTT
82
5% 1/16W
5
4
RP4501
RAM_VTT
82
5%
6
3
RP4501
RAM_VTT
82
5% 1/16W
7
2
RP4501
RAM_VTT
82
5%
8
1
RP4501
RAM_VTT
82
5% 1/16W
5
4
RP4500
RAM_VTT
82
5%
6
3
RP4500
RAM_VTT
82
5% 1/16W
7
2
RP4500
RAM_VTT
82
5% 1/16W
8
1
RP4500
82
RAM_VTT
5%
6
3
RP4520
82
RAM_VTT
5% 1/16W
7
2
RP4520
82
RAM_VTT
5%
8
1
RP4520
82
RAM_VTT
5%
6
3
RP4524
82
RAM_VTT
5% 1/16W
7
2
RP4524
RAM_VTT
82
5% 1/16W SM-LF
8
1
RP4517
82
RAM_VTT
5%
8
1
RP4524
82
RAM_VTT
5% SM-LF
5
4
RP4505
82
RAM_VTT
5% 1/16W SM-LF
6
3
RP4505
82
RAM_VTT
5% SM-LF
7
2
RP4505
82
RAM_VTT
5% 1/16W SM-LF
8
1
RP4505
82
RAM_VTT
5% SM-LF
5
4
RP4504
82
RAM_VTT
5% SM-LF
5
4
RP4509
RAM_VTT
82
5% SM-LF
5
4
RP4516
82
RAM_VTT
5% 1/16W SM-LF
6
3
RP4509
82
RAM_VTT
5% SM-LF
7
2
RP4509
82
RAM_VTT
5% 1/16W SM-LF
8
1
RP4509
82
RAM_VTT
5% SM-LF
5
4
RP4508
051-6772
04
45
102
RAM_CKE<5>
RAM_CKE<4>
RAM_DQS<14> RAM_DQS<15>
RAM_DQS<13>
RAM_DQS<11> RAM_DQS<12>
PP1V25_RAM_VTT
PP1V25_RAM_VTT
RAM_DQS<8> RAM_DQS<9> RAM_DQS<10>
RAM_DQ<92>
RAM_DQ<94>
RAM_DQ<95>
RAM_DQ<90>
RAM_DQ<91>
RAM_DQ<89>
RAM_DQ<88> RAM_DQ<93>
RAM_DQ<123>
RAM_DQ<122>
RAM_DQ<127>
RAM_DQ<125>
RAM_DQ<126>
RAM_DQ<124> RAM_DQ<121> RAM_DQ<120>
RAM_BA<0> RAM_CAS_L RAM_WE_L RAM_CS_L<9> RAM_CS_L<8>
RAM_A<10>
RAM_BA<1>
RAM_RAS_L
=PP2V5_RUN_RAM
PP1V25_RAM_VTT
PP1V25_RAM_VTT
RAM_DQ<87>
RAM_DQ<84>
RAM_DQ<85>
RAM_DQ<72> RAM_DQ<74>
RAM_DQ<79>
PP1V25_RAM_VTT
RAM_DQ<81>
RAM_DQ<82> RAM_DQ<86>
RAM_DQ<83>
RAM_DQ<80>
RAM_DQ<75> RAM_DQ<77> RAM_DQ<78>
RAM_DQ<73>
RAM_DQ<76>
PP1V25_RAM_VTT
PP1V25_RAM_VTT
RAM_DQ<67>
RAM_DQ<64>
RAM_DQ<65> RAM_DQ<66> RAM_DQ<70>
RAM_DQ<69>
RAM_DQ<68>
RAM_DQ<71>
PP1V25_RAM_VTT
RAM_DQ<115> RAM_DQ<119>
RAM_DQ<117> RAM_DQ<112> RAM_DQ<113> RAM_DQ<114> RAM_DQ<118>
RAM_DQ<105>
RAM_DQ<111>
RAM_DQ<106> RAM_DQ<104> RAM_DQ<109>
RAM_DQ<116>
PP1V25_RAM_VTT
RAM_DQ<108> RAM_DQ<110> RAM_DQ<107>
PP1V25_RAM_VTT
RAM_DQ<97>
RAM_DQ<96>
RAM_DQ<103>
RAM_DQ<98> RAM_DQ<102>
RAM_DQ<101>
RAM_DQ<99>
RAM_DQ<100>
46
46
46
46
46
46
46
46
46
46
40
40
40
40
40
40
40
45
45
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
44
45
45
40
40
40
40
40
40
45
40
40
40
40
40
40
40
40
40
40
45
45
40
40
40
40
40
40
40
40
45
40
40
40
40
40
40
40
40
40
40
40
40
40
45
40
40
40
45
40
40
40
40
40
40
40
40
38
38
38
38
38
38
38
44
44
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
7
44
44
38
38
38
38
38
38
44
38
38
38
38
38
38
38
38
38
38
44
44
38
38
38
38
38
38
38
38
44
38
38
38
38
38
38
38
38
38
38
38
38
38
44
38
38
38
44
38
38
38
38
38
38
38
38
Preliminary
Page 39
VSS VSS
SHTDWN
VTT
REFOUT
VDD
G
D
S
DGS
D
G
S
DRVL
DRVH
VCC
GND
FB
REF
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
NOTE: U4700 PIN 4 IS LOW ACTIVE.
353S0880
SEMTECH
353S0603
MEM TERM VREGS
PLACE 10UF CAPS NEAR DIMMS
ONLY STUFF ONE VTT VREG
PHILIPS
NOSTUFF
5% 1/16W MF-LF 402
10K
2
1
R4603
NOSTUFF
0.1UF
603
16V
10%
X7R
2
1
C4601
NE57811
SPAK-5
RAM_VTT
1
6
3
2
4
5
U4600
603
10%
X7R
16V
0.1UF
RAM_VTT
2
1
C4606
SOT23-LF
2N7002
2
1
3
Q4600
7343
220UF
20% 2V TANT
2
1
C4609
NOSTUFF
402
0
5% 1/16W MF-LF
21
R4610
1206
6.3V
20%
10UF
CERM
2
1
C4600
1206
6.3V
20%
10UF
CERM
2
1
C4602
VTT_ALT
CASE369
NTD70N03R
3
1
4
Q4651
CERM
10UF
20%
6.3V
1206
2
1
C4608
CASE369
VTT_ALT
NTD70N03R
3
1
4
Q4652
5%
402
1K
VTT_ALT
21
R4674
VTT_ALT
402 MF-LF 1/16W
5%
1K
21
R4673
10% 25V CERM 402
VTT_ALT
0.0047UF
2
1
C4653
0.0047UF
10% 25V
402
VTT_ALT
CERM
2
1
C4652
SC1116ISKTRT
VTT_ALT
SOT23-6L
1
3
2
5 4
6
U4650
.5% 603
1K
FF
VTT_ALT
21
R4671
FF
.5% 603
1K
VTT_ALT
21
R4672
6.3V
20% CERM
1206
22uF
VTT_ALT
2
1
C4655
VTT_ALT
0.1UF
20% 10V CERM 402
2
1
C4650
402
10V
0.1UF
20%
CERM
VTT_ALT
2
1
C4651
6.3V CERM
10UF
RAM_VTT
805
20%
2
1
C4610
102
46
04
051-6772
=PP5V_PWRON_RAM
=PP2V5_PWRON_RAM
=PP2V5_PWRON_RAM
U4650_3
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
U4650_6
R4673_1
U4700_REFOUT
SYS_SLEEP
TURN_ON_VTT
VR4700_SHTDWN
MIN_NECK_WIDTH=10MIL MIN_LINE_WIDTH=25MIL
U4650_4
VOLTAGE=1.25V
PP1V25_RAM_VTT
MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
R4674_1
22
46
46
11
40
40
10
37
37
9
26
26
8
45
7
7
7
6
3
44
Preliminary
Page 40
G
D
S
AGP
REFCLK_AVDD
VDD_AGP
AGP_CBE2
AGP_AD_STBS0
AGP_AD_STBF0
AGP_DBI_LO
AGP_CBE1
AGP_CBE0
AGP_SB_STBS
AGP_SB_STBF
AGP_AD_STBS1
AGP_AD_STBF1
AGP_DBI_HI
AGP_CBE3
AGP_STOP
AGP_REQ
AGP_DEVSEL
AGP_FRAME
AGP_GNT
AGP_IRDY
AGP_TRDY
AGP_PAR
AGP_ST0 AGP_ST1 AGP_ST2
AGP_RBF AGP_WBF
AGP_GC_AGP8X_DET
AGP_TYPEDET
AGP_AD0 AGP_AD1 AGP_AD2 AGP_AD3 AGP_AD4 AGP_AD5 AGP_AD6 AGP_AD7
AGP_AD9
AGP_AD8
AGP_AD15
AGP_AD16
AGP_AD12
AGP_AD11
AGP_AD10
AGP_AD13 AGP_AD14
AGP_AD21
AGP_AD20
AGP_AD19
AGP_AD18
AGP_AD17
AGP_AD26
AGP_AD25
AGP_AD24
AGP_AD23
AGP_AD22
AGP_AD27
AGP_SBA2 AGP_SBA3
AGP_AD31
AGP_AD30
AGP_AD29
AGP_AD28
AGP_SBA1
AGP_SBA0
AGP_SBA4
AGP_STP_AGP*
AGP_BUSY*
AGP_REFCLK
AGP_SBA5 AGP_SBA6 AGP_SBA7
AGP_VREFCG
AGP_PVTREF2
AGP_PVTREF1
AGP_VREFGC
AGP_MB_AGP8X_DET
AGP_REFCLK_AVSS
(SYM 4 OF 7)
AGP
INTERFACE
G
D
S
G
D
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
DIFFERENTIAL_PAIR
NET_SPACING_TYPE
NET_PHYSICAL_TYPE
U3LITE AGP
DBI_HI IS NOT A STROBE BUT SHARES THE SAME TOPOLOGY AS A STROBE
PVTREF RESISTOR
DBIHI AND DBILO GROUPS WITH STROBE1 FOR CONSTRAINTS
LEVEL SHIFTER FOR U3LITE
AGP BUSY AND STOP ARE NOT USED IN ALL DESIGNS
LAST MODIFIED: NOV 18, 04
MASTER: SEEDY
ELECTRICAL_CONSTRAINT_SET
CERM
10V
20%
0.1UF
402
2
1
C4808
402
5%
10K
AGP_BUSYSTOP
2
1
R4811
10K
5% MF-LF
2
1
R4812
5%
10K
AGP_BUSYSTOP
2
1
R4808
10K
5% 1/16W
2
1
R4810
2N3904LF
AGP_BUSYSTOP
2
3
1
Q4802
2N7002
SOT23-LF
AGP_BUSYSTOP
2
1
3
Q4803
10K
5% 1/16W
402
2
1
R4809
402
0.1UF
20% 10V CERM
2
1
C4807
5%
402
1K
AGP_BUSYSTOP
21
R4813
402
5%
10K
2
1
R4807
CERM
10V
20%
0.1UF
402
2
1
C4806
402
0.1UF
20% 10V CERM
2
1
C4805
CERM
10V
20%
0.1UF
402
2
1
C4804
402
0.1UF
20% 10V CERM
2
1
C4803
CERM
10V
20%
0.1UF
402
2
1
C4802
402
0.1UF
20% 10V CERM
2
1
C4801
10V
20%
402
CERM
0.1UF
2
1
C4800
603
5%
2.2
1/10W MF-LF
21
R4800
402
6.3V
10%
1UF
CERM
2
1
C4811
402
10V
0.1UF
CERM
20%
2
1
C4816
1/16W MF-LF
182
1%
402
21
R4801
10V 402
0.1UF
20% CERM
2
1
C4812
CERM
20%
0.1UF
402
10V
2
1
C4813
CERM
20%
0.1UF
402
10V
2
1
C4814
CERM
20%
0.1UF
402
10V
2
1
C4815
0.01UF
402
20% 16V CERM
2
1
C4817
I46 I48
I49 I50 I51 I52 I53 I54
I55 I56
I57 I58
I59
V1.0-300MM
PBGA
U3LITE
OMIT
W10
W6
W2
Y11
AB4
AC10
AE7
AE2V9AG10
AG4
AD6
AA9
AC5
AC9
AH5
AD4
AH4
AB1
AC1
AC4
AE1
AD1
AF1
AG1
AF2
AD2
AG3
AH1
AF3
AG2
AB9
AE5
AE6
AH2
AC6
AF5
AG5
AH7
AA8
AG6 AC3
AB8
AH6 AF6
AA6
AA4
AA5
Y8
AF8
AG8
AC8
AA2
AD8
AA3
AE8
AH9
AH8
AF11
AE11
AD11
AC11
AA7
W1
AH12
V7
V8
V3
V4
V6
V5
Y7
Y1
Y2
AA1
AG11
Y5
Y6
Y3
Y4
AD9
AE9
AF9
AG9
AH11
AH10
AA11
AB11
U3
CERM
20%
0.1UF
402
10V
2
1
C4810
SOT-363
2N7002DW
AGP_BUSYSTOP
4
5
3
Q4801
SOT-363
2N7002DW
AGP_BUSYSTOP
1
2
6
Q4801
04
48
102
051-6772
AGP_CBE<1..0>
AGP_DATAAGP_AD_0 AGP_DATA
AGP_SB_STBF
AGP_SB_STBS
AGP_SB_STBAGP_STROBEAGP_STROBE
AGP_CBE<3..2>
AGP_DATAAGP_AD_1 AGP_DATA
AGP_AD_STB0
AGP_AD_STBS<0>
AGP_STROBE
AGP_AD_STB_0
AGP_STROBE
AGP_AD_1 AGP_DATA
AGP_DBI_LO
AGP_DATA
AGP_SBA
AGP_DATA
AGP_SBA_L<7..0>
AGP_DATA
AGP_AD<0>
AGP_AD_0
AGP_AD<15..0>
AGP_DATAAGP_DATA
STOP_AGP_L_R
NB_STOP_AGP_L
STOP_AGP_L_F
STOP_AGP_L
AGP_BUSY_L
AGP_BUSY_L_F
=PP3V3_AGP
NB_AGP_BUSY_L
=PP1V5_AGP
AGP_AD<4>
AGP_FRAME
AGP_TYPEDET_L NB_AGP_GCDET_L
AGP_GNT
AGP_STOP
AGP_ST<0> AGP_ST<1>
AGP_AD<26>
AGP_AD<22>
AGP_AD<20>
AGP_AD<15>
AGP_AD<14>
AGP_AD<12>
AGP_AD<10>
AGP_AD<9>
AGP_AD<8>
AGP_AD<6>
AGP_AD<5>
AGP_AD<25>
AGP_AD<30>
NB_STOP_AGP_L
AGP_CLK66M_NB
AGP_SBA_L<6>
AGP_SBA_L<4>
AGP_PAR
AGP_REQ
AGP_AD<13>
AGP_TRDY
AGP_DEVSEL
AGP_RBF
AGP_ST<2>
AGP_AD<1>
AGP_WBF
AGP_AD<17>
AGP_SB_STBS
AGP_SB_STBF
AGP_AD<27> AGP_AD<28>
AGP_AD_STBF<0> AGP_AD_STBS<0>
AGP_CBE<2> AGP_CBE<3>
AGP_AD_STBS<1>
AGP_SBA_L<2>
NB_AGP_BUSY_L
AGP_SBA_L<1>
AGP_AD<11>
AGP_AD_1
AGP_AD<31..16>
AGP_DATAAGP_DATA
AGP_AD<16>
AGP_AD<18> AGP_AD<19>
AGP_SBA_L<3>
AGP_AD<31>
AGP_AD<29>
AGP_AD<7>
AGP_AD<3>
AGP_AD<2>
AGP_AD<21>
AGP_AD<23> AGP_AD<24>
TP_AGP_MB_AGP8X_DET_L
AGP_VREF_GC
AGP_DBI_HI
AGP_CBE<1>
AGP_PVTREF1 AGP_PVTREF2
AGP_SBA_L<0>
AGP_AD_STBF<1>
TP_VREF_CG
AGP_IRDY
AGP_SBA_L<7>
AGP_SBA_L<5>
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
VOLTAGE=1.5V
PP1V5_PWRON_AGP_NB_AVDD
AGP_DATA
AGP_DBI_HI
AGP_AD_1 AGP_DATA
=PP1V5_PWRON_NB_AVDD
=PP1V5_AGP
=PP3V3_AGP
=PP1V5_AGP
=PP3V3_AGP
=PP1V5_AGP
AGP_STROBE
AGP_AD_STBS<1>
AGP_AD_STB1
AGP_AD_STB_1
AGP_STROBE
AGP_AD_STB1
AGP_STROBE
AGP_AD_STBF<1>
AGP_AD_STB_1
AGP_STROBE
AGP_SB_STBS
AGP_SB_STBAGP_STROBE
AGP_SB_STBS
AGP_STROBE
AGP_AD_STBF<0>
AGP_AD_STB0
AGP_STROBE
AGP_AD_STB_0
AGP_STROBE
AGP_DBI_LO
AGP_CBE<0>
59
59
59
58
58
58
56
56
56
50
50
60
50
50
50
50
50
49
49
37
49
49
49
49
49
49
49
49
49
49
49
49
49
48
48
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
28
48
48
48
48
48
49
49
49
49
49
49
48
48
48
48
48
48
48
48
48
7
48
7
48
49
49
49
49
49
49
49
48
48
48
48
48
48
48
48
48
48
48
48
48
48
27
48
48
49
49
48
49
49
49
49
48
49
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
6
49
48
48
48
48
6
49
48
48
48
7
7
7
7
7
7
48
48
48
48
48
48
Preliminary
Page 41
AD_STBS_1*
AGPTEST*
SBA2
FRAME* WBF* RBF*
AD4
AD3
AD2
AD1
AD0
PCICLK
ST2
ST1
REQ*
SB_STBS*
SB_STBF
AD22
AD5
AD7
AD10
AD12 AD13 AD14 AD15
AD18
AD17
AD19
AD21
AD20
AD23 AD24 AD25 AD26 AD27
AD29
AD28
AD31
AD30
SBA0 SBA1
SBA4 SBA5 SBA6
RST*
GNT* STOP*
TRDY*
DEVSEL*
IRDY*
AD11
AD9
AD8
AD6
AGPREF
CBE0* CBE1*
DBI_LO
AD_STBF_0
AD_STBS_0*
CBE2* CBE3*
DBI_HI
PAR
AGP8X_DET*
AD16
AD_STBF_1
VDDP
SBA3
INTA*
SBA7
ST0
(1 OF 5)
AGP
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
TABLE_5_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
U3LITE AGP I/O REFERENCE
(PLACE CLOSE TO GPU AGP BALLS)
GPU AGP I/O REFERENCE
GPU AGP
PLACE C4910 CLOSE TO BALL M26
0.35V
AGP 3.0
(LOW = AGP V3.X)
(HIGH = AGP V2.X)
AGP VERSION SELECT
DO WE NEED THE SERIES R?
(PLACE CLOSE TO GPU AGP BALL)
0.233 * VDDP
U3LITE SIGNALS
1/16W MF-LF
5%
0
402
21
R4912
1/16W MF-LF
1%
402
3.32K
2
1
R4906
402
MF-LF
1.02K
1% 1/16W
2
1
R4907
402
16V CERM
0.01UF
20%
2
1
C4957
1/16W MF-LF
10K
5%
402
2
1
R4909
0
5% 1/16W MF-LF 402
2
1
R4913
1% 1/16W MF-LF 402
1.02K
2
1
R4940
402
3.32K
1% 1/16W MF-LF
2
1
R4914
CERM
16V
20%
0.01UF
402
2
1
C4940
RV351
BGA
OMIT
AC26
Y27
W30
V24
V23
U27
T30
T24
T23
P27
P23
N30
M24
M23
J30
AF27
AE30
AC27
AC23
AB30
AA24
AA23
V28
N26
AE28
AD27
AF29
Y29
Y28
AA29
AA28
AC29
AC28
AD29
AD28
AB28
AB29
AG28
AF28
AE29
AG30
M25
W29
AE26
AD26
W28
V29
AB26
AB25
U26
P26
U28
N29
M27
M26
AC25
V26
M29
V25
M28
P29
N28
L28
L29
K28
K29
AA27
AA25
J28
AA26
Y25
Y26
W25
W26
V27
U25
T26
T25
R25
J29
R27
P25
R26
N25
U29
T28
T29
R28
R29
P28
H28
H29
U4900
CERM
6.3V
10%
1UF
402
2
1
C4900
CERM 402
0.01UF
20% 16V
2
1
C4910
402
1UF
10%
6.3V CERM
2
1
C4901
0.01UF
402
16V
20% CERM
2
1
C4902
16V
20%
0.01UF
CERM 402
2
1
C4903
16V
20%
0.01UF
CERM 402
2
1
C4904
16V
20%
0.01UF
CERM 402
2
1
C4905
402
5%
10K
2
1
R4908
1%
47
402
21
R4910
338S0231
IC,RV351LEP, GRAPHICS CTLR
1
49
04
102
051-6772
=PP1V5_AGP
GPU_AGPTEST_L
=PP1V5_AGP
AGP_TYPEDET_L
NB_AGP_GCDET_L
AGP_AD<22>
AGP_AD<24>
=PP1V5_AGP
AGP_SBA_L<2>
AGP_WBF AGP_RBF
AGP_AD<4>
AGP_AD<3>
AGP_AD<2>
AGP_AD<1>
AGP_AD<0>
AGP_CLK66M_GPU
AGP_ST<2>
AGP_ST<1>
AGP_AD<5>
AGP_AD<10>
AGP_AD<12> AGP_AD<13> AGP_AD<14> AGP_AD<15>
AGP_AD<18>
AGP_AD<17>
AGP_AD<19>
AGP_AD<21>
AGP_AD<20>
AGP_AD<23>
AGP_AD<25> AGP_AD<26> AGP_AD<27>
AGP_AD<29>
AGP_AD<28>
AGP_AD<31>
AGP_AD<30>
AGP_SBA_L<0> AGP_SBA_L<1>
AGP_SBA_L<4> AGP_SBA_L<5> AGP_SBA_L<6>
AGP_AD<11>
AGP_AD<9>
AGP_AD<8>
AGP_AD<6>
AGP_AD<16>
AGP_SBA_L<3>
AGP_SBA_L<7>
AGP_ST<0>
ATI_PCIRST_L
GPU_RESET_L
=PP1V5_AGP
VOLTAGE=0.35V MIN_LINE_WIDTH=0.6 MM
GPU_AGP_VREF
MIN_NECK_WIDTH=0.2 MM
AGP_REQ
AGP_FRAME
AGP_GNT AGP_STOP
AGP_TRDY
AGP_DEVSEL
AGP_IRDY
GPU_AGP_VREF
AGP_AD<7>
AGP_CBE<0> AGP_CBE<1>
AGP_DBI_LO
AGP_AD_STBF<0> AGP_AD_STBS<0>
AGP_CBE<3>
AGP_AD_STBF<1>
AGP_SB_STBS
AGP_AD_STBS<1>
AGP_INT_L
=PP3V3_AGP
AGP_CBE<2>
AGP_DBI_HI
AGP_SB_STBF
AGP_PAR
AGP_VREF_GC
MIN_NECK_WIDTH=0.2 MM
MIN_LINE_WIDTH=0.6 MM
VOLTAGE=0.35V
59 58
50
50
50
50
56
49
49
49
49
50
48
48
48
48
48
7
7
48
48
48
48
7
48
48
48
48
48
48
48
48
27
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
8
7
49
48
48
48
48
48
48
48
49
48
48
48
48
48
48
48
48
48
48
25
7
48
48
48
48
48
Preliminary
Page 42
FB
LD
HD
GND
COMP
SS
VCC
VC
GND
VOUT
VIN
NOISE
CONT
EN
GND
IN
OUT ADJ
PG EN
VIN
ADJ
VOUT
GND
G
D
S
G
D
S
PG EN
VIN
ADJ
VOUT
GND
LM339A
V+
GND
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
PLACE LED5000 NEAR VREG
VOUT=VREF*(R5003+R5005)/R5005 = 1.199 VDC
GPU 1.8V VREG
POWER SEQUENCING FOR RV351: =PP3V3_AGP > PP2V5_GPU > PPVCORE_GPU > VDDC_CT
POWER DOWN SEQUENCE SHOULD BE IN REVERSE ORDER
PP2V5_GPU_A2VDD > PP1V8_GPU
VOUT = 0.59V * [1 + R5090 / R5091]
5A WITH RV351LE
PEAK CURRENT OF TOTAL RAILS
IRU3037ACS VREF = 0.8 VDC
SET OUTPUT = 1.20V +/- 5% FOR RV351LE
NOTE:
GPU VCORE VREG
GRAPHICS VREGS
U5000_FEEDBACK
VOUT = 0.59V * [1 + R5060 / R5061]
GPU 1.80V TPVDD
GPU 2.5V A2VDD
HOWEVER IDEALLY ALL POWER RAILS SHOULD RAMP TOGETHER
VOUT = 1.50V
THIS RAIL SHOULD BE THE LAST UP AND THE FIRST DOWN
GPU 1.50V VDDC_CT
VOUT = 1.80V
1206
6.3V
20%
10UF
CERM
2
1
C5001
1%
10K
2
1
R5005
CERM
10%
603
NOSTUFF
50V
3300PF
2
1
C5007
0.51
1/4W 1206
FF
5%
2
1
R5004
1206
0.1UF
50V
20% CERM
2
1
C5012
603
5%
2200PF
CERM
50V
2
1
C5005
805
0
5%
1/8W
21
R5002
20%
805
1UF
25V
CERM
2
1
C5004
1.6UH
TH
21
L5001
CERM
25V
1UF
20%
805
2
1
C5016
25V CERM 402
5%
220PF
2
1
C5006
20% CERM
16V 603
0.1UF
2
1
C5014
IRU3037ACS
SOI
2 6
8
3
5
4
1
7
U5000
402
4.99K
1% 1/16W MF-LF
2
1
R5003
CERM
50V
10%
402
0.0018UF
2
1
C5023
603
CERM
50V
5%
20PF
2
1
C5013
61.9K
402
1% 1/16W MF-LF
2
1
R5001
805
1/8W
5%
4.7
2
1
R5000
10UF
20% CERM
6.3V 805
2
1
C5072
SOT-25A
MM1572FN
5
1
4
2
3
U5070
CERM
16V
20%
0.01UF
402
2
1
C5071
402
5%
10K
2
1
R5070
10V CERM 805
1UF
20%
2
1
C5070
CRITICAL
SOP-8
MIC39102
3
2
8765
1
4
U5080
402
MF-LF
1/16W
1%
453
2
1
R5081
402
MF-LF
1/16W
5%
3.3K
NOSTUFF
2
1
R5080
0.01UF
CERM
16V
10%
NOSTUFF
402
2
1
C5082
SM-1
ELEC
6.3V
20%
330UF
2
1
C5083
10UF
20% CERM
1206
6.3V
2
1
C5080
1%
1K
402
2
1
R5082
6.3V CERM
1uF
10%
402
2
1
C5092
1%
64.9K
402
2
1
R5091
402
0.001UF
10% 50V CERM
2
1
C5091
FAN2558
CRITICAL
SOT23-6
61
4
2
3 5
U5090
6.3V
20%
4.7UF
805
CERM
2
1
C5090
NTD60N02R
CASE369
3
1
4
Q5001
CASE369
NTD60N02R
3
1
4
Q5002
10BQ040PBF
SMB
2
1
D5000
10BQ040PBF
SMB
2
1
D5090
1/8W
0
805
NOSTUFF
5%
21
R5092
1%
100K
2
1
R5090
ELEC
1800UF
20%
TH-KZJ
6.3V
2
1
C5009
10UF
20%
6.3V CERM 805
2
1
C5008
ELEC
1800UF
20%
TH-KZJ
6.3V
2
1
C5002
ELEC
1800UF
20%
TH-KZJ
6.3V
2
1
C5003
20%
1206
CERM
6.3V
10UF
2
1
C5010
402
10%
1uF
CERM
6.3V
2
1
C5062
402
100K
1%
2
1
R5060
1% 1/16W MF-LF
48.7K
402
2
1
R5061
50V
10%
0.001UF
CERM 402
2
1
C5061
SOT23-6
CRITICAL
FAN2558
61
4
2
3 5
U5060
6.3V
20%
4.7UF
805
CERM
2
1
C5060
5%
0
402
21
R5085
5%
2.0K
402
21
R5095
CERM
10V
20%
0.1UF
402
2
1
C5095
5% 1/16W MF-LF
DEVELOPMENT
330
402
2
1
R5019
GREEN
2.0X1.25A
DEVELOPMENT
2
1
LED5000
DEVELOPMENT
SOI
3
13
11
10
12
U1001
5%
0
402
DEVELOPMENT
21
R5020
102
04
051-6772
50
VOLTAGE=1.5V
PP1V5_GPU_VDDC_CT
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
PP2V5_GPU_A2VDD
U5070_NOISE
=PP3V3_AGP
=PP3V3_AGP
U5060_ADJ
VOLTAGE=1.8V
PP1V8_GPU_TPVDD MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
PP2V5_GPU_A2VDD VOLTAGE=2.5V MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.25MM
U5070_CONT
R5001_2
Q5002_DRAIN
U5000_COMP
Q5001_GATE
U5000_VC
R5004_P2
=PP5V_AGP
=PP12V_AGP
U5000_GATE_L
=PP3V3_AGP
=PP3V3_AGP
U5000_GATE_H
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
VOLTAGE=1.8V
MAKE_BASE=TRUE
PP1V8_GPU
U5080_ADJ
PP2V5_GPU
=PP1V8_GPU
=PP1V5_AGP
FAN2558_ADJ
=PP3V3_AGP
U5000_SS
U5000_FEEDBACK
PP2V5_GPU_A2VDD
U5080_EN
U5090_EN
PP2V5_GPU_A2VDD
=PP3V3_AGP
PP3V3_RUN
LED_GPU_CORE_P
LED_GPU_CORE_N
1V1_REF
GPU_CORE_FOR_LED
PPVCORE_GPU
MIN_NECK_WIDTH=0.25MM
VOLTAGE=1.2V MIN_LINE_WIDTH=0.6MM
59
59
59
59
59
59
34
58
58
58
58
58
58
22
56
56
56
56
56
56
18
50
50
50
50
55
50
50
11
58
49
49
58
49
49
54
58
49
49
58
58
49
10
34
51
51
48
48
51
59
59
48
48
52
52
48
48
51
51
48
7
22
22
51
50
7
7
58
50
7
7
7
7
7
51
7
7
50
50
7
6
10
7
Preliminary
Page 43
PVSS
PVDD
VDD15
VDDC
VSS
VSS
VDDCI
VDDL0
VDDL1
(2 OF 5)
CORE POWER
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
25MA MAX
GPU CORE POWER
RV351
OMIT
BGA
AD18 Y4 W8 W7 W27 W24 W23 W15 V30 V16
V15
U8 U4 U23 U16 U15 T27 T19 T18 T17 T16
T15
T14 T13 T1 R8 R7 R30 R24 R23 R18 R17
R16
R15 R14 R13 R12 P4 P16 P15 N27 N24 N23
N16
N15 M8 M7 M30 M16 L4 K8 K7 K30 K27
K24
K23 K1 H9 H8 H4 H27 H23 H21 H18
H16
H14
H12
G9
G24
G21
G18
G16
G12
F27
E4
D9D6D4
D27
D25
D24
D21
D18
D15
D12
D10
C30C3C28
C1
AK29
AK25
AK2
AJ30
AJ19
AJ1 AG9 AG5 AG27 AG22 AG18 AG15 AG11 AF20 AF15
AE27
AE19 AE16 AD30 AD25 AD16 AD12 AC4 AC18 AC16 AC14
AC12
AB8 AB7 AB4 AB27 AB24 AB23 AB1 AA30 A29 A22
A2
A16
A10
AE20
AE17
AJ20
AF21
AE15
W16
T12
R19
M15
W19
W18
W17
W14
W13
W12
V19
V18
V17
V14
V13
V12
U19
U18
U17
U14
U13
U12
P19
P18
P17
P14
P13
P12
N19
N18
N17
N14
N13
N12
M19
M18
M17
M14
M13
M12
AD15
AD13
AC17
AC15
AC13
Y8
Y23
P8
L23
H20
H11
AC20
AC11
AJ28
AK28
U4900
402
1UF
10%
6.3V CERM
2
1
C5102
CERM
10%
1UF
402
6.3V
2
1
C5101
16V
20%
0.01UF
CERM 402
2
1
C5110
0.01UF
16V
20% CERM
402
2
1
C5109
16V
20%
0.01UF
CERM 402
2
1
C5108
0.01UF
402
16V
20% CERM
2
1
C5107
CERM
6.3V
10%
1UF
402
2
1
C5103
402
1UF
10%
6.3V CERM
2
1
C5104
402
CERM
0.01UF
20% 16V
2
1
C5105
402
CERM
0.01UF
20% 16V
2
1
C5106
402
CERM
0.01UF
20% 16V
2
1
C5111
402
CERM
0.01UF
20% 16V
2
1
C5112
16V
20%
0.01UF
CERM 402
2
1
C5120
16V
20%
0.01UF
CERM 402
2
1
C5119
402
CERM
0.01UF
20% 16V
2
1
C5118
0.01UF
402
CERM
20% 16V
2
1
C5117
402
CERM
0.01UF
20% 16V
2
1
C5116
CERM
20% 16V
402
0.01UF
2
1
C5115
16V
20%
0.01UF
CERM 402
2
1
C5114
16V
20%
0.01UF
CERM 402
2
1
C5113
CERM
6.3V
10%
1UF
402
2
1
C5143
402
CERM
6.3V
10%
1UF
2
1
C5142
CERM
6.3V
10%
1UF
402
2
1
C5141
402
10%
6.3V CERM
1UF
2
1
C5140
10%
1UF
6.3V CERM 402
2
1
C5131
CERM
6.3V
20%
10UF
NOSTUFF
805
2
1
C5130
1.8UH
0805
21
L5130
SM
21
XW5130
0805
FERR-220-OHM
21
L5150
CERM
6.3V
20%
10UF
805
NOSTUFF
2
1
C5100
04
051-6772
102
51
PP1V8_GPU_TXVDDR
VOLTAGE=1.8V MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
PP1V8_GPU_PVDD
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
VOLTAGE=0V
GND_GPU_PVSS
PPVCORE_GPU
=PP1V8_GPU
PPVCORE_GPU
VOLTAGE=2.5V MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
PP2V5_GPU_VDDL1
PP2V5_GPU_A2VDD
PP1V5_GPU_VDDC_CT
51
51
50
58
50
22
52
22
58
58
7
50
7
50
50
Preliminary
Page 44
VDDRH1
VDDRH0
DQA5 DQA6 DQA7
DQA4
DQA0 DQA1 DQA2
DQA23
DQA21
DQA20
DQA18
DQA22
DQA52
DQA25
DQA24
DQA8 DQA9 DQA10 DQA11 DQA12 DQA13 DQA14 DQA15 DQA16 DQA17
DQA19
DQA26 DQA27 DQA28 DQA29 DQA30 DQA31 DQA32 DQA33 DQA34 DQA35 DQA36 DQA37 DQA38 DQA39 DQA40 DQA41 DQA42 DQA43 DQA44 DQA45 DQA46 DQA47 DQA48 DQA49 DQA50 DQA51
DQA53 DQA54 DQA55 DQA56 DQA57 DQA58 DQA59 DQA60
DQA62
DQA3
MAA1
MAA0
MAA2
MAA4
MAA3
MAA5
MAA8
MAA14
DQMA1*
DQMA0*
DQMA2*
DQMA6*
DQMA5*
QSA0
DQMA7*
QSA1 QSA2 QSA3
QSA5
QSA4
RASA* CASA*
WEA*
CSA1*
CSA0*
CKEA
CLKA0*
CLKA0
CLKA1*
CLKA1
MVREFS
MVREFD
DIMA_1
DIMA_0
VDDR1
DQA63
DQA61
QSA6 QSA7
MAA6 MAA7
MAA9 MAA10 MAA11 MAA12 MAA13
DQMA4*
DQMA3*
VSSRH1VSSRH0
(3 OF 5)
MEMORY INTERFACE A
MEMVMODE0
CLKB1*
CLKB0
VDDR1
MAB5
MAB4
MAB10 MAB11
MAB13
DQB33
DQB14
DQB29 DQB30 DQB31 DQB32
DQB34 DQB35 DQB36 DQB37
DQB39
DQB38
DQB40
DQB42
DQB41
DQB43 DQB44 DQB45 DQB46 DQB47 DQB48
DQB50
DQB49
DQB51 DQB52 DQB53
DQB55
DQB54
DQB58
DQB57
DQB56
DQB59 DQB60
DQB63
DQB61 DQB62
DQB3 DQB4 DQB5 DQB6 DQB7 DQB8
DQB12
DQB17
DQB15
DQB19 DQB20
DQB22 DQB23 DQB24 DQB25
DQB27
DQB26
DQB28
DQB9 DQB10 DQB11
DQB13
DQB16
DQB18
DQB21
MAB0 MAB1
MAB3
MAB2
MAB6 MAB7 MAB8 MAB9
MAB14
DQMB0*
DQMB2*
DQMB1*
DQMB3*
DQMB5*
DQMB4*
DQMB6* DQMB7*
QSB0 QSB1 QSB2
QSB4
QSB3
QSB5
QSB7
QSB6
RASB*
WEB*
CKEB
CLKB0*
DIMB_0 DIMB_1
DQB1 DQB2
CASB*
CSB0* CSB1*
CLKB1
ROMCS*
MEMVMODE1
MEMTEST
DQB0
MPVSS
MPVDD
MAB12
MEMORY INTERFACE B
(4 OF 5)
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
11
2.8V
2.5V
1.8V
01
MEMVMODE
GPU FRAME BUFFER
10
01
10MA MAX
BGA
OMIT
RV351
E19
M6
F19
N6
F18
V8
V7
V4
T8
M4
H17
F4
D5
D26
D23
D20
D19
D17
D14
D13
D11
B30
B1
AD4
AA8
AA7
AA4
AA1
A9
A3
A28
A21
A15
A19
F10
B11
B16
E16
B27
F24
F30
J27
B8
B7
A24
C21
F21
F22
C22
C23
B24
B23
C19
B20
E21
A25
C24
B22
E22
E11
C11
C15
F15
A27
E25
F29
J25
D29
G30
G26
F8
F9
E9
F11
H26
F12
E10
E12
E13
B10
B9
C9
C10
B12
C12
H25
A12
A13
C16
C14
B14
C13
B15
B17
B18
C17
J26
F13
E14
F14
E15
F16
D16
E17
F17
B26
C26
K26
B25
B28
C27
C25
C29
B29
D22
E23
F23
E24
K25
F25
E26
F26
G25
F28
G28
G29
E29
E28
D28
L26
L25
B13
D30
F20
E20
A18
C18
C20
B21
B19
E18
U4900
402
CERM
20% 16V
0.01UF
2
1
C5212
16V
20% CERM
402
0.01UF
2
1
C5211
16V
20% CERM
402
0.01UF
2
1
C5210
0.01UF
16V
20% CERM
402
2
1
C5209
20% 16V CERM 402
0.01UF
2
1
C5208
0.01UF
402
16V
20% CERM
2
1
C5207
16V
20%
402
CERM
0.01UF
2
1
C5206
16V
20%
402
CERM
0.01UF
2
1
C5205
RV351
OMIT
BGA
T6
T7
T4
R4
R1
N8
N7
N4
L8
L27
J8
J7
J4
J24
J23
J1
H22
H19
H15
H13
H10
G7
G27
G22
G19
G15
G13
G10
E27
D8
AF5
R2
AD1
AC5
W1
V5
G1
K6
B3
F6
A6
A7
C7
C6
C8
K2
N3
P6
M5
M2
L2
L3
M3
P2
P3
P5
J2
K3
M1
N5
AD2
AC6
W2
W6
G3
J5
B2
E6
C5
B5
C4
AE3
AE2
AE1
AD3
E5
AC3
AC2
AB3
AB2
AE4
AE5
AD5
AD6
AB5
AB6
F5
AA5
AA6
AA2
Y3
Y2
W3
V3
V1
V2
U2
G5
Y5
Y6
W4
W5
V6
U3
U5
U6
H3
F1
G6
J3
F2
E2
H2
F3
G2
L5
L6
K4
K5
E7
J6
H5
H6
G4
D2
D1
D3
C2
B4
A4
F7
D7
AA3
E3
R6
R5
T3
T2
N2
N1
R3
T5
U4900
CERM
6.3V 805
20%
10UF
2
1
C5201
20%
6.3V CERM 805
10UF
2
1
C5200
402
6.3V CERM
10%
1UF
2
1
C5231
NOSTUFF
805
10UF
20%
6.3V CERM
2
1
C5230
1.8UH
0805
21
L5230
SM
21
XW5230
402
10K
5% 1/16W MF-LF
2
1
R5200
402
10K
5% 1/16W MF-LF
2
1
R5201
402
MF-LF
1/16W
1%
100
2
1
R5220
0.1UF
20% 10V
CERM
402
2
1
C5221
402
1%
47
1/16W MF-LF
2
1
R5222
402
1% 1/16W MF-LF
51.1
2
1
R5223
402
20% 10V
CERM
0.1UF
2
1
C5223
100
1% 1/16W MF-LF 402
2
1
R5221
NOSTUFF
402
1/16W MF-LF
5%
4.7K
2
1
R5226
402
MF-LF
1/16W
5%
4.7K
2
1
R5227
47
1% 1/16W MF-LF 402
2
1
R5228
4.7K
5% 1/16W MF-LF
402
2
1
R5224
NOSTUFF
4.7K
5% 1/16W MF-LF
402
2
1
R5225
CERM
6.3V
10%
402
1UF
2
1
C5204
10%
6.3V CERM 402
1UF
2
1
C5203
CERM
6.3V
10%
402
1UF
2
1
C5202
04
102
52
051-6772
MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.25MM
GPU_MVREFS
PP2V5_GPU
VOLTAGE=1.8V
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
PP1V8_GPU_MPVDD
VOLTAGE=0V
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
GND_GPU_MPVSS
=PP1V8_GPU
PP2V5_GPU
FBACS0_L
FBDQS<1>
FBARAS_L
TP_FBA<14>
TP_FBBA<14>
TP_GPU_ROMCS_L
TP_GPU_DIMB_1
TP_GPU_DIMB_0
GPU_MEMVMODE0
FBBCLK1_L
FBBCLK0
FBBA<5>
FBBA<4>
FBBA<10> FBBA<11>
FBBA<13>
FBD<65>
FBD<102>
FBD<119> FBD<115> FBD<117>
FBD<64>
FBD<66> FBD<67>
FBD<68> FBD<70>
FBD<71>
FBD<69>
FBD<72>
FBD<75>
FBD<73>
FBD<74> FBD<76> FBD<77> FBD<78> FBD<79> FBD<80>
FBD<82>
FBD<81>
FBD<83> FBD<84> FBD<85>
FBD<87>
FBD<86>
FBD<90>
FBD<89>
FBD<88>
FBD<91> FBD<92>
FBD<95>
FBD<93> FBD<94>
FBD<111> FBD<109> FBD<110> FBD<108> FBD<105>
FBD<96>
FBD<100>
FBD<121>
FBD<103>
FBD<122> FBD<124>
FBD<125> FBD<127> FBD<116> FBD<113>
FBD<112>
FBD<118>
FBD<114>
FBD<97> FBD<98> FBD<99>
FBD<101>
FBD<120>
FBD<123>
FBD<126>
FBBA<0> FBBA<1>
FBBA<3>
FBBA<2>
FBBA<6> FBBA<7> FBBA<8> FBBA<9>
FBDQM<13>
FBDQM<15>
FBDQM<12>
FBDQM<14>
FBDQM<9>
FBDQM<8>
FBDQM<10> FBDQM<11>
FBDQS<13> FBDQS<12> FBDQS<15>
FBDQS<8>
FBDQS<14>
FBDQS<9>
FBDQS<11>
FBDQS<10>
FBBRAS_L
FBBWE_L
FBBCKE
FBBCLK0_L
FBD<107> FBD<106>
FBBCAS_L
FBBCS0_L
TP_FBBCS1_L
FBBCLK1
GPU_MEMVMODE1
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
GPU_MEMTEST
FBD<104>
FBBA<12>
TP_GPU_DIMA_0 TP_GPU_DIMA_1
FBA<0>
FBA<4> FBA<5> FBA<6>
FBDQM<7>
FBDQM<5>
FBD<43>
FBD<41>
FBD<40>
FBD<42> FBD<44>
FBD<39>
=PP1V8_GPU
FBA<1>
TP_FBACS1_L
FBACLK0
FBACLK1_L
FBDQS<3> FBDQS<2>
FBA<3>
FBACKE
FBACAS_L
FBA<11>
FBA<8> FBA<9>
FBA<13>
FBA<12>
FBA<10>
FBD<19> FBD<21> FBD<22> FBD<23>
PP2V5_GPU
FBA<7>
FBD<46> FBD<45> FBD<47> FBD<35> FBD<38>
FBD<37> FBD<36> FBD<32> FBD<33> FBD<34> FBD<59> FBD<56> FBD<57> FBD<58> FBD<60>
FBD<63> FBD<49>
FBD<53>
FBD<2> FBD<3>
FBD<6> FBD<4> FBD<7>
FBD<5>
FBD<1>
FBD<0>
FBD<9>
FBD<8> FBD<11> FBD<12> FBD<15> FBD<14> FBD<13> FBD<10> FBD<24> FBD<26> FBD<25> FBD<27> FBD<29> FBD<31> FBD<30> FBD<28> FBD<17> FBD<16> FBD<20> FBD<18>
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
GPU_MVREFD
FBACLK1
FBACLK0_L
FBAWE_L
FBDQM<1> FBDQM<3> FBDQM<2>
FBDQS<5> FBDQS<4>
FBDQS<6> FBDQS<0>
FBDQM<0>
FBDQM<6>
FBDQM<4>
FBDQS<7>
FBA<2>
FBD<52>
FBD<55>
FBD<62> FBD<61>
FBD<48> FBD<54>
FBD<51>
FBD<50>
55
55
55
54
58
54
58
54
52
52
52
52
52
50
51
50
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
54
54
54
54
54
54
51
54
54
54
54
54
54
54
54
54
54
50
54
54
54
54
54
54
54
54
54
54
7
50
7
54
53
54
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
55
55
55
53
53
53
55
55
6
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
50
53
53
53
53
53
53
54
54
53
53
53
53
53
53
53
53
53
53
7
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
54
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
Preliminary
Page 45
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
FRAME BUFFER A TERMINATION
ELECTRICAL_CONSTRAINT_SET
NET_PHYSICAL_TYPE DIFFERENTIAL_PAIR
FB TERMINATION
GPU -> MEMORY -> TERMINATION
PLACE CLOCK TERMINATION AFTER MEMORY
FRAME BUFFER B TERMINATION
PLACE R’S CLOSE TO MEMORY
NET_SPACING_TYPE
22
63
RP5300
22
63
RP5301
22
54
RP5301
22
72
RP5301
22
81
RP5301
22
81
RP5302
22
54
RP5302
22
72
RP5302
22
63
RP5302
22
GPU128BIT
54
RP5303
22
GPU128BIT
63
RP5303
GPU128BIT
22
72
RP5303
22
GPU128BIT
81
RP5303
GPU128BIT
22
63
RP5304
GPU128BIT
22
81
RP5305
GPU128BIT
22
54
RP5305
GPU128BIT
22
72
RP5305
GPU128BIT
22
63
RP5305
GPU128BIT
22
54
RP5304
GPU128BIT
22
72
RP5304
GPU128BIT
22
81
RP5304
GPU128BIT
22
81
RP5306
GPU128BIT
22
72
RP5306
GPU128BIT
22
63
RP5306
22
GPU128BIT
54
RP5307
22
GPU128BIT
63
RP5307
22
GPU128BIT
72
RP5307
22
GPU128BIT
81
RP5307
22
GPU128BIT
54
RP5308
22
GPU128BIT
63
RP5308
22
GPU128BIT
81
RP5308
22
GPU128BIT
72
RP5308
22
GPU128BIT
63
RP5309
22
GPU128BIT
54
RP5309
22
GPU128BIT
81
RP5309
22
GPU128BIT
72
RP5309
22
GPU128BIT
72
RP5310
22
GPU128BIT
63
RP5310
22
GPU128BIT
54
RP5310
22
GPU128BIT
81
RP5310
GPU128BIT
22
81
RP5311
GPU128BIT
22
72
RP5311
GPU128BIT
22
63
RP5311
GPU128BIT
22
54
RP5311
GPU128BIT
22
54
RP5306
GPU128BIT
22
54
RP5312
GPU128BIT
22
81
RP5313
GPU128BIT
22
54
RP5313
GPU128BIT
22
63
RP5313
GPU128BIT
22
72
RP5313
GPU128BIT
22
81
RP5314
GPU128BIT
22
72
RP5314
GPU128BIT
22
63
RP5312
GPU128BIT
22
72
RP5312
GPU128BIT
22
81
RP5312
GPU128BIT
22
54
RP5314
GPU128BIT
22
63
RP5314
GPU128BIT
22
63
RP5315
GPU128BIT
22
72
RP5315
GPU128BIT
22
81
RP5315
GPU128BIT
22
54
RP5315
22
54
RP5316
22
81
RP5316
22
63
RP5316
22
72
RP5316
22
GPU128BIT
81
RP5317
22
GPU128BIT
54
RP5317
22
GPU128BIT
72
RP5317
22
GPU128BIT
63
RP5317
GPU128BIT
22
63
RP5318
22
GPU128BIT
54
RP5318
GPU128BIT
22
81
RP5318
GPU128BIT
22
72
RP5318
22
GPU128BIT
63
RP5319
22
GPU128BIT
72
RP5319
22
GPU128BIT
81
RP5319
GPU128BIT
22
54
RP5319
1%
56.2
402
2
1
R5320
402
56.2
1% 1/16W MF-LF
2
1
R5321
CERM
16V
20%
0.01UF
402
2
1
C5321
1%
56.2
402
2
1
R5323
402
56.2
1% 1/16W MF-LF
2
1
R5322
CERM
16V
20%
0.01UF
402
2
1
C5323
402
20%
CERM
16V
0.01UF
2
1
C5325
402
56.2
1% 1/16W MF-LF
2
1
R5324
1%
56.2
402
2
1
R5325
1%
56.2
402
2
1
R5326
CERM
16V
20%
0.01UF
402
2
1
C5327
402
56.2
1% 1/16W MF-LF
2
1
R5327
I421
I423
I425 I426
I427
I428 I429
I430 I431
I432
I433
I434
I435
I436
22
81
RP5320
22
72
RP5320
22
63
RP5320
22
54
RP5320
22
81
RP5321
22
72
RP5321
22
63
RP5321
22
54
RP5321
22
54
RP5322
22
63
RP5322
22
72
RP5322
22
81
RP5322
22
81
RP5323
22
54
RP5323
22
63
RP5323
22
72
RP5323
22
54
RP5324
22
63
RP5324
22
72
RP5324
22
81
RP5324
22
81
RP5325
22
54
RP5325
22
63
RP5325
22
72
RP5325
22
54
RP5326
22
63
RP5326
22
72
RP5326
22
81
RP5326
22
81
RP5327
22
54
RP5327
22
63
RP5327
22
72
RP5327
22
72
RP5328
22
81
RP5328
22
54
RP5328
22
63
RP5328
22
54
RP5329
22
63
RP5329
22
81
RP5329
22
72
RP5329
22
81
RP5330
22
63
RP5330
22
54
RP5330
22
72
RP5330
22
72
RP5331
22
81
RP5331
22
63
RP5331
22
54
RP5331
22
54
RP5300
22
81
RP5300
22
72
RP5300
051-6772
04
102
53
GPU_FBCLK
FBBCLK0
FBBCLK0
GPU_FBCLK
GPU_FBCLK
FBBCLK0
FBBCLK0_L
GPU_FBCLK
GPU_FBCLK
FBBCLK1
FBBCLK1
GPU_FBCLK
FBD<92>
GPU_FB GPU_FB
FBD<127..0>
FBA<13..0>
GPU_FBGPU_FB
FBD<5>
FBD<12>
RFBD<8>
FBD<93>
RFBD<88>
FBD<88>
FBD<94>
RFBD<89>
FBD<89>
RFBD<90>
FBD<90>
RFBD<91>
FBD<91>
FBD<79>
RFBD<78>
FBD<78>
RFBD<77>
FBD<77>
RFBD<76>
FBD<76>
RFBD<83>
FBD<83>
RFBD<82>
FBD<82>
RFBD<81>
FBD<81>
RFBD<80>
FBD<80>
RFBD<71>
FBD<71>
RFBD<69>
RFBD<68> RFBD<70>
FBD<70>
RFBD<74>
FBD<74>
RFBD<75>
FBD<75>
RFBD<72>
FBD<72>
RFBD<87>
RFBD<73>
RFBD<86>
FBD<86>
RFBD<84>
FBD<84>
RFBD<85>
FBD<85>
RFBD<67>
FBD<67>
RFBD<65>
FBD<65>
RFBD<66>
FBD<66>
RFBD<64>
FBD<64>
RFBD<126>
FBD<126>
RFBD<127>
FBD<127>
RFBD<125>
FBD<125>
RFBD<124>
FBD<124>
RFBD<123>
FBD<123>
RFBD<122>
FBD<122>
RFBD<121>
FBD<121>
RFBD<120>
FBD<120>
RFBD<119>
FBD<119>
RFBD<118>
FBD<118>
RFBD<116>
FBD<116>
RFBD<117>
FBD<117>
RFBD<115>
FBD<115>
RFBD<114>
FBD<114>
RFBD<113>
FBD<113>
RFBD<111>
FBD<111>
RFBD<112>
FBD<112>
RFBD<110>
FBD<110>
RFBD<108>
FBD<108>
RFBD<109>
FBD<109>
RFBD<107>
FBD<107>
RFBD<106>
FBD<106>
RFBD<105>
FBD<105>
RFBD<104>
FBD<104>
RFBD<103>
FBD<103>
RFBD<101>
FBD<101>
RFBD<100>
FBD<100>
RFBD<102>
FBD<102>
RFBD<98>
FBD<98>
RFBD<96>
FBD<96>
RFBD<97>
FBD<97>
RFBD<99>
FBD<99>
MAKE_BASE=TRUE
FBDQS<14>
RFBDQS<14>
MAKE_BASE=TRUE
FBDQS<15>
RFBDQS<15>
MAKE_BASE=TRUE
FBDQS<12>
RFBDQS<12>
MAKE_BASE=TRUE
FBDQS<13>
RFBDQS<13>
MAKE_BASE=TRUE
FBDQS<11>
RFBDQS<11>
MAKE_BASE=TRUE
FBDQS<10>
RFBDQS<10>
MAKE_BASE=TRUE
FBDQS<9>
RFBDQS<9>
MAKE_BASE=TRUE
FBDQS<8>
RFBDQS<8>
FBBCLK1_L
FBBCLK1
FBBCLK0_L
FBBCLK0
RFBD<23>
FBD<23>
RFBD<22>
FBD<22>
RFBD<20>
FBD<20>
RFBD<21>
FBD<21>
RFBD<7>
FBD<7>
RFBD<4>
FBD<4>
RFBD<63>
RFBD<62>
FBD<62>
RFBD<60>
FBD<60>
RFBD<61>
FBD<61>
RFBD<59>
FBD<59>
RFBD<58>
FBD<58>
RFBD<6>
FBD<6>
RFBD<57>
FBD<57>
FBD<8>
RFBD<5>
RFBD<10>
FBD<10>
RFBD<9>
FBD<9>
RFBD<11>
FBD<11>
RFBD<12>
RFBD<13>
FBD<13>
RFBD<19>
FBD<19>
RFBD<14>
FBD<14>
RFBD<15>
FBD<15>
RFBD<18>
FBD<18>
RFBD<16>
FBD<16>
RFBD<3>
FBD<3>
RFBD<2>
FBD<2>
RFBD<17>
RFBD<1>
FBD<1>
RFBD<0>
FBD<0>
RFBD<26>
FBD<26>
RFBD<25>
FBD<25>
RFBD<24>
FBD<24>
RFBD<28>
FBD<28>
RFBD<27>
FBD<27>
RFBD<31>
FBD<31>
RFBD<30>
FBD<30>
RFBD<29>
FBD<29>
RFBD<55>
FBD<55>
RFBD<56>
FBD<56>
RFBD<52>
FBD<52>
RFBD<54>
FBD<54>
RFBD<53>
FBD<53>
RFBD<51>
FBD<51>
RFBD<50>
FBD<50>
RFBD<47>
FBD<47>
RFBD<49>
FBD<49>
RFBD<48>
FBD<48>
RFBD<46>
FBD<46>
RFBD<45>
FBD<45>
RFBD<43>
FBD<43>
RFBD<42>
FBD<42>
RFBD<44>
FBD<44>
RFBD<41>
FBD<41>
RFBD<40>
FBD<40>
RFBD<39>
FBD<39>
RFBD<37>
FBD<37>
RFBD<38>
FBD<38>
RFBD<36>
FBD<36>
RFBD<35>
FBD<35>
RFBD<34>
FBD<34>
RFBD<33>
FBD<33>
RFBD<32>
FBD<32>
MAKE_BASE=TRUE
FBDQS<7>
RFBDQS<7>
FBDQS<6>
MAKE_BASE=TRUE
RFBDQS<6>
MAKE_BASE=TRUE
FBDQS<5>
RFBDQS<5>
MAKE_BASE=TRUE
FBDQS<4>
RFBDQS<4>
FBDQS<3>
MAKE_BASE=TRUE
MAKE_BASE=TRUE
FBDQS<2>
RFBDQS<2>
MAKE_BASE=TRUE
FBDQS<1>
RFBDQS<1>
MAKE_BASE=TRUE
FBDQS<0>
RFBDQS<0>
FBACLK1_L
FBACLK1
FBACLK0
RFBD<94>
RFBD<79>
RFBD<92>
FBD<95>
RFBD<95>
RFBD<127..0>
GPU_FBGPU_FB
FBDQM<15..0>
GPU_FBGPU_FB
FBDQS<15..0>
GPU_FB GPU_FB
GPU_FBCLK
FBACLK0
FBACLK0
GPU_FBCLK
GPU_FBCLK
FBACLK0
FBACLK0_L
GPU_FBCLK
GPU_FBCLK
FBACLK1
FBACLK1
GPU_FBCLK
GPU_FBCLK
FBACLK1_L
FBACLK1
GPU_FBCLK
FBD<17>
FBD<69>
FBD<68>
FBD<73>
FBD<87>
FBD<63>
FBACLK0_L
RFBDQS<3>
FBACLK0_TERM
MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.25MM
FBBCLK1_TERM
MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.25MM
FBBCLK0_TERM
MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.25MM
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
FBACLK1_TERM
FBBA<13..0>
GPU_FB GPU_FB
GPU_FBCLK
FBBCLK1
FBBCLK1_L
GPU_FBCLK
RFBD<93>
55
55
55
55
55
55
55
54
54
54
55
55
54
54
54
54
54
55
53
53
53
53
53
54
53
53
54
53
55 53
53
55 53
55 53
55 53
53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55
55
55 53
55 53
55 53
55 53
55
55
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
55 53
53
53
53
53
53
53
53
53
53
53
53
53
54 53
54 53
54 53
54 53
54 53
54 53
54
54 53
54 53
54 53
54 53
54 53
54 53 54 53
53
54
54 53
54 53
54 53
54
54 53
54 53
54 53
54 53
54 53
54 53
54 53
54 53
54
54 53
54 53
54 53
54 53
54 53
54 53
54 53
54 53
54 53
54 53
54 53
54 53
54 53
54 53
54 53
54 53
54 53
54 53
54 53
54 53
54 53
54 53
54 53
54 53
54 53
54 53
54 53
54 53
54 53
54 53
54 53
54 53
54 53
54 53
54 53
53
53
53
53
53
53
53
53
53
53
53
55
55
55
53 55
54
54
53
53
53
53
53
53
53
53
53
53
53
53
55
53
55
52
52
52
52
52
52
52
52
53
52
53 52
52
53 52
53 52
53 52
52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53
53
53 52
53 52
53 52
53 52
53
53
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
52 55
52 55
52 55
52 55
52 55
52 55
52 55
52 55
52
52
52
52
53 52
53 52
53 52
53 52
53 52
53 52
53
53 52
53 52
53 52
53 52
53 52
53 52 53 52
52
53
53 52
53 52
53 52
53
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
53 52
52 54
52 54
52 54
52 54
52
52 54
52 54
52 54
52
52
52
53
53
53
52 53
53
52
52
52
52
52
52
52
52
52
52
52
52
52
54
52
52
53
Preliminary
Page 46
(1 OF 2)
CK
CK
CKE
RFU2
RFU1
MCL
DQ31
NC
BA1
DQ26 DQ27 DQ28 DQ29 DQ30
DQ25
DQ24
DQ21 DQ22 DQ23
DQ19 DQ20
DQ14
DQ16 DQ17 DQ18
DQ15
DQ13
DQ12
DQ11
DQ9
DQ10
DQ8
DQ4
DQ6
DQ5
DQ7
DQ3
DQ2
DQ1
DQ0
CS RAS CAS WE
BA0
DM3
DQS3
DM2
DM1
DM0
DQS2
DQS0 DQS1
A0 A1 A2 A3
A6
A5
A4
A9
A8
A7
A10 A11
VSSQ
VSS_THERM
VSS
VDDQ
VREF
VDD
(2 OF 2)
(1 OF 2)
CK
CK
CKE
RFU2
RFU1
MCL
DQ31
NC
BA1
DQ26 DQ27 DQ28 DQ29 DQ30
DQ25
DQ24
DQ21 DQ22 DQ23
DQ19 DQ20
DQ14
DQ16 DQ17 DQ18
DQ15
DQ13
DQ12
DQ11
DQ9
DQ10
DQ8
DQ4
DQ6
DQ5
DQ7
DQ3
DQ2
DQ1
DQ0
CS RAS CAS WE
BA0
DM3
DQS3
DM2
DM1
DM0
DQS2
DQS0 DQS1
A0 A1 A2 A3
A6
A5
A4
A9
A8
A7
A10 A11
VSSQ
VSS_THERM
VSS
VDDQ
VREF
VDD
(2 OF 2)
TABLE_ALT_ITEM
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_HEAD
TABLE_ALT_ITEM
DESCRIPTION
REFERENCE DES
BOM OPTION
QTY
PART NUMBER
CRITICAL
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
DDR SDRAM A VREF
PLACE NEAR VDD PINS PLACE NEAR VDD PINS
GPU DDR SDRAM A
EVENLY PLACE 0.1UF CAP & 0.01UF CAPS
SGRAM0 & SGRAM1 MEMORY SUPPORT
10UF
6.3V
20%
CERM 805
2
1
C5400
10UF 20%
805
CERM
6.3V
2
1
C5401
402
20%
0.1UF
CERM
10V
2
1
C5402
CERM
20%
402
10V
0.1UF
2
1
C5403
CERM
10V
402
20%
0.1UF
2
1
C5404
10V
402
CERM
20%
0.1UF
2
1
C5405
0.1UF
20% 10V
402
CERM
2
1
C5406
10V CERM 402
20%
0.1UF
2
1
C5407
402
CERM
10V
20%
0.1UF
2
1
C5408
0.1UF
CERM
20%
402
10V
2
1
C5409
402
CERM
10V
20%
0.1UF
2
1
C5410
402
CERM
10V
20%
0.1UF
2
1
C5411
0.1UF
402
CERM
10V
20%
2
1
C5412
CERM 402
10V
20%
0.1UF
2
1
C5413
10UF
CERM
6.3V
20%
805
2
1
C5414
10UF
CERM
6.3V
20%
805
2
1
C5415
SDRAM_DDR_4MX32
BGA
OMIT
L3
M10
L9
M2
N3
M4
M3
L13
L12
H11
H4
C11
C4
M13
B13
H2
H13
B2
K12
K13
E2
D2
D3
C2
B8
C9
B5
B9
B10
C13
D12
D13
E13
K3
K2
J2
J3
B6
G2
G3
F2
F3
F12
F13
G12
G13
J12
J13
C6
B7
B12
H3
H12
B3
N2
N12
M12
M11
L2
M5
N4
M8
N11
N10
N9
M9
N8
N7
M6
M7
L6
N6
N5
U5400
BGA
SDRAM_DDR_4MX32
OMIT
H7
H6
G9
G8
G7
G6
F9
F8
J9
J8
J7
J6
H9
H8
F7
F6
E9
E6
D11
D10
D9
D6
D5
D4
K10
K5
J10
J5
H10
H5
G10
G5
F10
F5
B11
B4
L10
L5
K9
K8
K7
K6
E10
E8
E7
E5
N13
F11
F4
E12
E3
C12
C10
C8
C7
K11
K4
J11
J4
G11
G4
C5
C3
L11
L8
L7
L4
E11
E4
D8
D7
U5400
SDRAM_DDR_4MX32
BGA
OMIT
L3
M10
L9
M2
N3
M4
M3
L13
L12
H11
H4
C11
C4
M13
B13
H2
H13
B2
K12
K13
E2
D2
D3
C2
B8
C9
B5
B9
B10
C13
D12
D13
E13
K3
K2
J2
J3
B6
G2
G3
F2
F3
F12
F13
G12
G13
J12
J13
C6
B7
B12
H3
H12
B3
N2
N12
M12
M11
L2
M5
N4
M8
N11
N10
N9
M9
N8
N7
M6
M7
L6
N6
N5
U5401
BGA
SDRAM_DDR_4MX32
OMIT
H7
H6
G9
G8
G7
G6
F9
F8
J9
J8
J7
J6
H9
H8
F7
F6
E9
E6
D11
D10
D9
D6
D5
D4
K10
K5
J10
J5
H10
H5
G10
G5
F10
F5
B11
B4
L10
L5
K9
K8
K7
K6
E10
E8
E7
E5
N13
F11
F4
E12
E3
C12
C10
C8
C7
K11
K4
J11
J4
G11
G4
C5
C3
L11
L8
L7
L4
E11
E4
D8
D7
U5401
0.1UF
CERM
10V
20%
402
2
1
C5417
1K
1% 1/16W MF-LF 402
2
1
R5400
1K
402
MF-LF
1/16W
1%
2
1
R5401
402
CERM
50V
0.001UF
10%
2
1
C5418
402
10% 50V CERM
0.001UF
2
1
C5419
402
CERM
50V
10%
0.001UF
2
1
C5420
402
10%
0.001UF
CERM
50V
2
1
C5421
CERM
50V
10%
402
0.001UF
2
1
C5422
0.001UF
402
10% 50V CERM
2
1
C5423
10V
20%
CERM 402
0.1UF
2
1
C5424
402
10V
20%
CERM
0.1UF
2
1
C5425
402
10V
20%
CERM
0.1UF
2
1
C5426
402
0.1UF
10V
20%
CERM
2
1
C5427
402
10V
20%
CERM
0.1UF
2
1
C5428
402
10V
20%
CERM
0.1UF
2
1
C5429
10% 50V CERM 402
0.001UF
2
1
C5430
0.001UF
402
10% 50V CERM
2
1
C5431
50V
402
10%
0.001UF
CERM
2
1
C5432
CERM
50V
402
10%
0.001UF
2
1
C5433
402
CERM
10V
20%
0.1UF
2
1
C5434
402
CERM
10V
20%
0.1UF
2
1
C5435
051-6772
04
102
54
333S0251
SDRAM,4MX32,DDR,300MHZ U5400,U5401
CRITICAL
2
SAMSUNG64
HYNIX64
2
333S0252
SDRAM,4MX32,DDR,300MHZ
CRITICAL
U5400,U5401
HYN4M G-DIE
SAMSUNG64
U5400,U5401,U5500,U5501
333S0251333S0290
HYNIX128
SDRAM,8MX32,DDR,300MHZ
333S0299
2
CRITICAL
U5400,U5401
SAM4M B-DIE
HYNIX64
333S0252333S0292
U5400,U5401,U5500,U5501
PP2V5_GPU
RFBD<24>
RFBD<25>
FBDQM<0>
FBARAS_L
RFBDQS<3>
FBA<1>
PP2V5_GPU
RFBD<6>
SGRAVREF
SGRAVREF
FBACS0_L
FBDQM<3>
FBA<6>
FBA<4>
PP2V5_GPU
FBA<13>
FBACLK1
FBACLK1_L
PP2V5_GPU
FBA<3>
PP2V5_GPUPP2V5_GPU
FBA<9>
FBA<8>
FBA<7>
FBA<5>
RFBD<17>
RFBD<14>
FBA<11>
RFBDQS<2>
RFBD<41> RFBD<40>
RFBD<44>
RFBD<42>
RFBD<47> RFBD<45> RFBD<46>
RFBD<39>
RFBD<38>
RFBD<56>
RFBD<57>
RFBD<58> RFBD<59> RFBD<62>
RFBD<61> RFBD<63>
RFBD<60>
RFBD<51> RFBD<53>
RFBD<55>
RFBD<54>
RFBD<32> RFBD<33> RFBD<35>
RFBD<37>
RFBD<34>
RFBD<36>
RFBD<49> RFBD<50>
RFBD<48>
FBACAS_L
FBARAS_L
FBAWE_L
FBACKE
RFBDQS<5>
RFBDQS<7>
FBDQM<4>
FBDQM<6>
FBDQM<7> FBDQM<5>
FBA<12> FBA<13>
RFBDQS<6> RFBDQS<4>
FBA<6>
FBA<5>
FBA<4>
FBA<8>
FBA<9> FBA<10> FBA<11>
FBA<0>
FBA<1>
FBA<3>
FBA<2>
FBACKE
FBA<12>
FBDQM<2>
FBDQM<1>
RFBDQS<1>
FBA<0>
RFBD<18>
RFBD<16>
RFBD<19>
RFBD<22>
RFBD<23>
RFBD<28> RFBD<27>
RFBD<29>
RFBD<30>
RFBD<0>
RFBD<3>
RFBD<7> RFBD<5>
RFBD<4>
RFBD<9>
RFBD<8>
RFBD<11>
RFBD<10>
RFBD<12>
RFBD<15>
RFBD<26>
RFBD<31>
RFBD<1>
RFBD<2>
RFBD<13>
FBAWE_L
FBACAS_L
RFBD<21>
FBACS0_L
RFBD<43>
RFBD<20>
RFBD<52>
FBA<2>
PP2V5_GPU
FBA<10>
RFBDQS<0>
FBACLK0
FBACLK0_L
TP_U5400_RFU2
NO_TEST
NO_TEST
TP_U5400_RFU1
TP_U5401_RFU2
NO_TEST
NO_TEST
TP_U5401_RFU1
FBA<7>
SGRAVREF
VOLTAGE=1.25V MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.25MM
PP2V5_GPU
55
55
55
55
55 55
55
55
54
54
54
54
54 54
54
54
52
54
52
54
54
52
54
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54
52 52
54
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54
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54
54
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54
54
54
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54
54
54
52
54
54
52
50
53
54
53
50
54
53
53
53
50
53
53
53
50
53
50 50
53
53
53
53
53
54
54
54
54
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
54
53
53
53
53
54
54
54
53
50
53
53
53
53
50
7
53
53
52
52
53
52
7
53
54
54
52
52
52
52
7
52
52
52
7
52
7 7
52
52
52
52
53
53
52
53
53
53
53
53
53
53
53
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53
53
53
53
53
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53
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53
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53
53
53
53
53
53
53
53
53
53
53
52
52
52
52
53
53
52
52
52
52
52
52
53
53
52
52
52
52
52
52
52
52
52
52
52
52
52
52
52
53
52
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
52
52
53
52
53
53
53
52
7
52
53
52
52
52
54
7
Preliminary
Page 47
(1 OF 2)
CK
CK
CKE
RFU2
RFU1
MCL
DQ31
NC
BA1
DQ26 DQ27 DQ28 DQ29 DQ30
DQ25
DQ24
DQ21 DQ22 DQ23
DQ19 DQ20
DQ14
DQ16 DQ17 DQ18
DQ15
DQ13
DQ12
DQ11
DQ9
DQ10
DQ8
DQ4
DQ6
DQ5
DQ7
DQ3
DQ2
DQ1
DQ0
CS RAS CAS WE
BA0
DM3
DQS3
DM2
DM1
DM0
DQS2
DQS0 DQS1
A0 A1 A2 A3
A6
A5
A4
A9
A8
A7
A10 A11
VSSQ
VSS_THERM
VSS
VDDQ
VREF
VDD
(2 OF 2)
(1 OF 2)
CK
CK
CKE
RFU2
RFU1
MCL
DQ31
NC
BA1
DQ26 DQ27 DQ28 DQ29 DQ30
DQ25
DQ24
DQ21 DQ22 DQ23
DQ19 DQ20
DQ14
DQ16 DQ17 DQ18
DQ15
DQ13
DQ12
DQ11
DQ9
DQ10
DQ8
DQ4
DQ6
DQ5
DQ7
DQ3
DQ2
DQ1
DQ0
CS RAS CAS WE
BA0
DM3
DQS3
DM2
DM1
DM0
DQS2
DQS0 DQS1
A0 A1 A2 A3
A6
A5
A4
A9
A8
A7
A10 A11
VSSQ
VSS_THERM
VSS
VDDQ
VREF
VDD
(2 OF 2)
DESCRIPTION
REFERENCE DES
BOM OPTION
QTY
PART NUMBER
CRITICAL
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
SGRAM0 & SGRAM1 MEMORY SUPPORT
DDR SDRAM B VREF
PLACE NEAR VDD PINS PLACE NEAR VDD PINS
EVENLY PLACE 0.1UF CAP & 0.01 UF CAPS
GPU DDR SDRAM B
GPU128BIT
10UF
6.3V
20%
CERM 805
2
1
C5500
10UF 20%
805
CERM
6.3V
GPU128BIT
2
1
C5501
0.1UF
GPU128BIT
20% 10V
402
CERM
2
1
C5502
10V CERM
20%
402
0.1UF
GPU128BIT
2
1
C5503
0.1UF
GPU128BIT
20%
402
CERM
10V
2
1
C5504
0.1UF
GPU128BIT
20% 10V
402
CERM
2
1
C5505
20% 10V
402
CERM
0.1UF
GPU128BIT
2
1
C5506
0.1UF
GPU128BIT
20% 10V CERM 402
2
1
C5507
0.1UF
10V CERM 402
20%
GPU128BIT
2
1
C5508
CERM
20%
402
10V
0.1UF
GPU128BIT
2
1
C5509
0.1UF
GPU128BIT
20%
CERM
10V
402
2
1
C5510
0.1UF
GPU128BIT
20%
402
CERM
10V
2
1
C5511
GPU128BIT
402
CERM
10V
20%
0.1UF
2
1
C5512
20%
0.1UF
10V
402
CERM
GPU128BIT
2
1
C5513
GPU128BIT
10UF
CERM
6.3V
20%
805
2
1
C5514
10UF
CERM
6.3V
20%
805
GPU128BIT
2
1
C5515
OMIT
BGA
SDRAM_DDR_4MX32
L3
M10
L9
M2
N3
M4
M3
L13
L12
H11
H4
C11
C4
M13
B13
H2
H13
B2
K12
K13
E2
D2
D3
C2
B8
C9
B5
B9
B10
C13
D12
D13
E13
K3
K2
J2
J3
B6
G2
G3
F2
F3
F12
F13
G12
G13
J12
J13
C6
B7
B12
H3
H12
B3
N2
N12
M12
M11
L2
M5
N4
M8
N11
N10
N9
M9
N8
N7
M6
M7
L6
N6
N5
U5500
OMIT
SDRAM_DDR_4MX32
BGA
H7
H6
G9
G8
G7
G6
F9
F8
J9
J8
J7
J6
H9
H8
F7
F6
E9
E6
D11
D10
D9
D6
D5
D4
K10
K5
J10
J5
H10
H5
G10
G5
F10
F5
B11
B4
L10
L5
K9
K8
K7
K6
E10
E8
E7
E5
N13
F11
F4
E12
E3
C12
C10
C8
C7
K11
K4
J11
J4
G11
G4
C5
C3
L11
L8
L7
L4
E11
E4
D8
D7
U5500
OMIT
SDRAM_DDR_4MX32
BGA
L3
M10
L9
M2
N3
M4
M3
L13
L12
H11
H4
C11
C4
M13
B13
H2
H13
B2
K12
K13
E2
D2
D3
C2
B8
C9
B5
B9
B10
C13
D12
D13
E13
K3
K2
J2
J3
B6
G2
G3
F2
F3
F12
F13
G12
G13
J12
J13
C6
B7
B12
H3
H12
B3
N2
N12
M12
M11
L2
M5
N4
M8
N11
N10
N9
M9
N8
N7
M6
M7
L6
N6
N5
U5501
OMIT
BGA
SDRAM_DDR_4MX32
H7
H6
G9
G8
G7
G6
F9
F8
J9
J8
J7
J6
H9
H8
F7
F6
E9
E6
D11
D10
D9
D6
D5
D4
K10
K5
J10
J5
H10
H5
G10
G5
F10
F5
B11
B4
L10
L5
K9
K8
K7
K6
E10
E8
E7
E5
N13
F11
F4
E12
E3
C12
C10
C8
C7
K11
K4
J11
J4
G11
G4
C5
C3
L11
L8
L7
L4
E11
E4
D8
D7
U5501
20%
402
0.1UF
CERM
10V
GPU128BIT
2
1
C5517
1K
GPU128BIT
MF-LF
1/16W
402
1%
2
1
R5500
1%
MF-LF 402
1K
GPU128BIT
1/16W
2
1
R5501
10V
20%
CERM 402
0.1UF
GPU128BIT
2
1
C5518
402
20%
GPU128BIT
10V CERM
0.1UF
2
1
C5519
GPU128BIT
20% 10V
402
0.1UF
CERM
2
1
C5520
0.001UF
CERM
50V
10%
402
GPU128BIT
2
1
C5521
10V
0.1UF
20%
CERM 402
GPU128BIT
2
1
C5522
CERM
20% 10V
402
0.1UF
GPU128BIT
2
1
C5523
10V
20%
CERM 402
GPU128BIT
0.1UF
2
1
C5524
0.001UF
10% 50V CERM 402
GPU128BIT
2
1
C5525
0.001UF
50V CERM
GPU128BIT
402
10%
2
1
C5526
0.001UF
10% 50V CERM
GPU128BIT
402
2
1
C5527
CERM
50V
10%
402
0.001UF
GPU128BIT
2
1
C5528
GPU128BIT
CERM
0.001UF
10% 50V
402
2
1
C5529
0.001UF
GPU128BIT
10%
CERM
50V
402
2
1
C5530
0.001UF
10% 50V CERM 402
GPU128BIT
2
1
C5531
CERM
50V
10%
402
0.001UF
GPU128BIT
2
1
C5532
CERM
0.001UF
GPU128BIT
10% 50V
402
2
1
C5533
GPU128BIT
20%
CERM
10V
0.1UF
402
2
1
C5534
GPU128BIT
20%
CERM
10V
0.1UF
402
2
1
C5535
HYNIX64
U5500,U5501
2
CRITICAL
SDRAM,4MX32,DDR,300MHZ
333S0252
SAMSUNG64
SDRAM,4MX32,DDR,300MHZ U5500,U5501
CRITICAL333S0251
2
102
04
051-6772
55
HYNIX128333S0299
2
CRITICAL
SDRAM,8MX32,DDR,300MHZ U5500,U5501
PP2V5_GPU
MIN_LINE_WIDTH=0.5MM
VOLTAGE=1.25V
SGRBVREF
MIN_NECK_WIDTH=0.25MM
TP_U5501_RFU1
NO_TEST
NO_TEST
TP_U5501_RFU2
TP_U5500_RFU1
NO_TEST
NO_TEST
TP_U5500_RFU2
FBBCLK0_L
FBBCLK0
FBDQM<8>
RFBD<82>
FBBA<3>
FBBA<0>
SGRBVREF
PP2V5_GPU
FBBA<7>
FBDQM<10>
RFBD<75>
RFBD<79> RFBD<78>
RFBD<88>
RFBD<89>
PP2V5_GPU
PP2V5_GPU
FBBA<12>
FBDQM<9>
RFBDQS<10>
RFBDQS<9>
FBBA<6>
RFBD<92>
RFBD<64>
FBBCLK1
FBBCLK1_L
FBBA<1>
FBBA<3> FBBA<4> FBBA<5> FBBA<6>
FBBA<8>
FBBA<11>
FBBA<11>
FBBA<2>
FBBCAS_L
FBBCS0_L
FBBRAS_L
FBBWE_L
FBBCKE
RFBDQS<13>
RFBDQS<15>
FBDQM<12>
FBDQM<14>
FBDQM<15> FBDQM<13>
FBBA<12>
FBBA<13>
FBBA<10>
FBBA<9>
FBBA<7>
RFBDQS<14> RFBDQS<12>
FBBA<2>
FBBA<0>
FBBCAS_L
FBBCKE FBBCS0_L FBBRAS_L
FBBWE_L
FBDQM<11>
FBBA<10>
FBBA<9>
FBBA<8>
FBBA<5>
RFBDQS<8>
FBBA<1>
RFBDQS<11>
PP2V5_GPU PP2V5_GPU
PP2V5_GPU
PP2V5_GPU
RFBD<72>
RFBD<112> RFBD<115>
RFBD<120> RFBD<122>
RFBD<104> RFBD<105>
RFBD<107> RFBD<108>
RFBD<106>
RFBD<110> RFBD<109> RFBD<111>
RFBD<103>
RFBD<102>
RFBD<121>
RFBD<123> RFBD<126>
RFBD<125> RFBD<127>
RFBD<124>
RFBD<116>
RFBD<117>
RFBD<119>
RFBD<118>
RFBD<97> RFBD<96> RFBD<99>
RFBD<100>
RFBD<98>
RFBD<101>
RFBD<114>
RFBD<113>
RFBD<85> RFBD<84>
RFBD<86>
RFBD<87>
RFBD<73>
RFBD<94>
RFBD<95>
RFBD<66>
RFBD<65>
RFBD<71> RFBD<69>
RFBD<68>
RFBD<70>
RFBD<90>
RFBD<67>
RFBD<93>
RFBD<91>
RFBD<80>
RFBD<81>
RFBD<83>
RFBD<77>
RFBD<74>
RFBD<76>
FBBA<13>
SGRBVREF
FBBA<4>
55
55
55
55
55 55
55
55
54
54
54
54
54 54
54
54
52
55
55
52
55
52
52
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
52 52
52
52
55
55
50
53
53
53
53
53
50
53
53
50
50
53
53
53
53
53
53
53
53
53
53
53
53
53
53
55
55
55
55
55
53
53
53
53
53
53
53
53
53
53
53
55
55
55
55
55
53
53
53
53
53
53
50 50
50
50
53
53
7
55
52
52
52
53
52
52
55
7
52
52
53
53
53
53
53
7
7
52
52
53
53
52
53
53
52
52
52
52
52
52
52
52
52
52
52
52
52
52
52
52
53
53
52
52
52
52
52
52
52
52
52
53
53
52
52
52
52
52
52
52
52
52
52
52
52
53
52
53
7 7
7
7
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
52
55
52
Preliminary
Page 48
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
MULTIFUNC(1:0)
MEMSTRAP(1:0)
GPIO<7>
LCDDATA(17:16)
GPU STRAPS
DEFAULT
00 INTERNAL PULL-DOWN
00
CLOCK PHASE ADJUSTMENT BETWEEN X1 CLK AND X2CLK
00 - REFCLK SLIGHTLY EARLIER THEN FEEDBACK
AGP 1X CLOCK FEEDBACK PHASE ADJUSTMENT WRT REFCLK (CPUCLK)
10 - REFCLK 1 TAP LATER THEN FEEDBACK
01 - REFCLK 1 TAP EARLIER THEN FEEDBACK
DESCRIPTION
00 - 0 TAP DELAY
PIN
GPIO(1:0)
AGPFBSKEW(1:0)
11 - REFCLK 2 TAPS EARLIER THEN FEEDBACK CLOCK (ATI RECOMMENDED)
INTERNAL PULL-DOWN
GPIO(9,13:11)
GPIO(3:2)
0
INTERNAL PULL-DOWN
ID_DISABLE
ROMIDCFG(3:0)
APPLE GPIO
X1CLK_SKWE(1:0)
0X0X - NO ROM, CHG_ID=0
IF NO ROM ATTACHED, CONTROLS CHIP IDS. IF ROM- IDENTIFIES TYPE
GPIO(8)
1 - SHUTS THE CHIP DOWN BY NOT RESPONDING TO ANY CONFIG CYCLES
STRAP
0 - NORMAL OPERATION
BUSCFG(2:0)
GPIO(6:4)
000
PULL-DOWN
INTERNAL
00
10 - TWO FUNCTION DEVICE. AGP ONLY IN FUNCTION 0
IF BUSCFG PIN BASED STRAPS ARE SET TO PCI, THEN AGP WILL NOT BE
11 - TWO FUNCTION DEVICE. AGP IN BOTH FUNCTIONS
00 - SINGLE FUNCTION DEVICE.
ENABLED IN ANY FUNCTION.
GPU_GPIO<15,10>
AGP8X_DETB
BUSCFG[2:0]
AGPMODE
SIGNALING
IDSEL AD160.8V
AGP8X
000
0
INV_CUR_HI
ATI STRAP
01 - TWO FUNCTION DEVICE. NO AGP IN EITHER FUNCTION
MULTI-FUNCTION DEVICE SELECT
INV_CUR_HI 1 0
1 0
0
1
Q45 A
PANEL ID
SYSTEM
0X9C27
0X9C39
TBD TBD
0X9C3A
GPIO<16>
GPIO<14>
TMDS_EN
FPD_PWR_ON
1
0X9C38
0X9C3A
OUTPUT: GPU READS PANEL ID AND SETS THIS BIT ACCORDINGLY
FOR REFERENCE ONLY, ACTIONS COME FROM BOOTROM
Q45 B
Q45 C
Q45 D
Q45 A/B SUPPORT IS FOR DEVELOPMENT
OUTPUT: PANEL POWER SEQUENCING
INPUT: PANEL POWER SEQUENCING
00 - SAMSUNG 4MX32 01 - UNDEFINED 10 - HYNIX 4MX32 11 - HYNIX 8MX32
TO TEST THE RV351LEP PWM, NOSTUFF R5625 & STUFF R5609
5%
10K
402
2
1
R5600
NOSTUFF
5%
10K
402
2
1
R5601
5%
10K
402
2
1
R5602
CERM
20% 10V
402
0.1UF
NOSTUFF
2
1
C5600
NOSTUFF
5%
10K
402
2
1
R5603
402
47
5% 1/16W MF-LF
21
R5620
402
47
5%
21
R5611
402
10K
1% 1/16W MF-LF
NOSTUFF
2
1
R5610
NOSTUFF
SOT23-5
MC74VHC1G08
5
4
1
2
3
U5600
NOSTUFF
5%
0
402
21
R5609
0.1UF
CERM
20% 10V
402
NOSTUFF
2
1
C5601
SOT23-5
MC74VHC1G08
NOSTUFF
5
4
1
2
3
U5601
402
0
5% 1/16W MF-LF
21
R5621
402
10K
5% 1/16W MF-LF
2
1
R5604
402
10K
5% MF-LF
2
1
R5605
5%
402
10K
2
1
R5606
402
10K
5% 1/16W MF-LF
2
1
R5607
5%
10K
402
NOSTUFF
2
1
R5614
5%
10K
402
NOSTUFF
2
1
R5612
5%
10K
402
2
1
R5615
5%
10K
402
2
1
R5613
5%
10K
402
HYNIX128&HYNIX64
2
1
R5618
402
10K
5% 1/16W MF-LF
HYNIX128
2
1
R5616
5%
10K
402
SAMSUNG64
2
1
R5619
402
10K
5% 1/16W MF-LF
SAMSUNG64&HYNIX64
2
1
R5617
1%
10K
402
NOSTUFF
2
1
R5624
402
10K
1% 1/16W MF-LF
NOSTUFF
2
1
R5623
402
0
5% 1/16W MF-LF
2
1
R5625
402
0
5% 1/16W MF-LF
NOSTUFF
2
1
R5626
5%
10K
402
NOSTUFF
2
1
R5627
NOSTUFF
5%
10K
402
2
1
R5628
5%
47
402
21
R5622
NOSTUFF
5%
0
402
21
R5629
102
56
051-6772
04
PCI_RESET_L
GPU_GPIO<7>
INV_CUR_HI
TMDS_EN
GPU_GPIO<16>
FPD_PWR_ON
=PP3V3_AGP
GPU_LCDDATA<16> GPU_LCDDATA<17>
=PP3V3_AGP
GPU_GPIO<15>
=PP3V3_AGP
GPU_GPIO<14>
GPU_GPIO<10>
=PP3V3_AGP
LCD_PWM_U5600
PCI_SLOTF_GNT_L
FPD_PWR_ON
PCI_RESET_L
GPU_GPIO<0> GPU_GPIO<1>
=PP3V3_AGP
GPU_GPIO<11>
GPU_GPIO<12>
GPU_GPIO<13>
GPU_GPIO<9>
ATI_PWM
GPU_GPIO<8>
LCD_PWM
=PP3V3_AGP =PP3V3_AGP
59
59 59
59
59
59 59
58
58 58
58
58
58 58
56
56 56
56
56
56 56
74
50
50 50
50
74
50
50 50
56
49
49 49
49
56
49
49 49
8
59
48
48 48
48
59
8
48
48 48
6
58 59
59
58
56
7
58
58
7
58
7
58
58
7
25
56
6
58
58
7
58
58
58
58
58
58
59
7 7
Preliminary
Page 49
DPLUS DMINUS
HPD1
DVOMODE
LCDCNTL
A2VSSQ
A2VSSN
A2VDDQ
AVSSN
A2VDD
AVSSQ
AVDD
VSS2DI
VSS1DI
VDD1DI VDD2DI
TPVSS
TPVDD
TXVSSR
TXVDDR
DDC3CLK
DDC3DATA
V2SYNC
COMP_B
R2SET
H2SYNC
C_R
Y_G
AUXWIN
STEREOSYNC
RSET
DDC1CLK
DDC1DATA
VSYNC
B
HSYNC
R G
DDC2CLK
DDC2DATA
TX2P
TX2M*
TX0M*
TX1M*
TX1P
TXCM*
TX0P
TXCP
NC
NC
VREFG
GPIO
RSTB_MSK
TESTEN
PLLTEST
TEST_YCLK
TEST_MCLK
XTALOUT
XTALIN
LCDDATA
VDDR4VDDR3
3
2
1
0
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
4
16
15
14
13
12
11
10
9
8
7
6
5
3
2
1
0
(5 OF 5)
EXTERNAL TMDS
CLK
TEST
NO CONNECTS
DAC2
DAC1
TMDS
GND
VDD
D-
D+
ALERT*/
PWM
SMBCLK
SMBDA
TACH
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
THE FREQUENCY OF THE 20" PIXEL CLOCK IS 119 MHZ
NC
75MA MAX
NC
NC
NC
NC
GPU DVI & DACS
DIFFERENTIAL IMPEDANCE SHOULD BE 100 OHM
ELECTRICAL_CONSTRAINT_SET
NET_PHYSICAL_TYPE
NET_SPACING_TYPE
DIFFERENTIAL_PAIR
ROUTE GND IN BETWEEN RGB SIGNALS WITH A VIA EVERY INCH
NC
NC
NC
PLACE R5821-3 & FL5900-2 NEAR MINI-VGA CONNECTOR
ROUTE SIGNALS AT 37.5 OHMS
GPU THERMAL SENSOR
RV351
BGA
OMIT
AJ22
AJ29
AH28
AH25
AE21
AE23
AG4
AG7
AD9
AD10
AC9
AC10
AD7
AD22
AD21
AD19
AC8
AC22
AC21
AC19
AE22
AE24
AK24
AH12
AG14
AG13
AF14
AF13 AK13
AH13
AK15 AJ15
AH15 AJ14
AH14 AJ13
AJ12
AK12
AH27
E8
B6
AG26
AG29
AH26
AK21
AK27
AE25
AK19
AK16
AJ25
AJ18
AJ17
AJ16
AH30
AH29
AH20
AH19
AH18
AH17
AH16
AG20
AG19
AG17
AG16
AG12
AF18
AF17
AF16
AE18
AE12
AJ9
AH9
AJ8
AH8
AJ7
AK7
AH7
AF10
AG10
AF9
AE9
AK6
AF8
AG8
AE8
AF7
AE7
AF6
AG6
AE6
AH10
AK9
AJ6
AH6
AH11
AJ11
AK10
AJ10
AG25
AF12
AJ24
AJ2
AH3
AK3
AJ3
AF4
AH4
AK4
AJ4
AF2
AF3
AG2
AG1
AG3
AH1
AH2
AH5
AJ5
AJ27
AE10
AF11 AE11
AG24
AG23
AE14
AE13
AF25
AF24
AK22
AJ23
AJ26
AD24
AH23
AH24
AF26
AF23
AJ21
AH22
AF22
AH21
AG21
U4900
1%
715
402
2
1
R5824
1UF
10%
6.3V CERM 402
2
1
C5803
CERM
6.3V
10%
1UF
402
2
1
C5802
805
10UF
20%
6.3V CERM
NOSTUFF
2
1
C5800
402
1UF
10%
6.3V CERM
2
1
C5801
402
1M
5%
2
1
R5814
402
5%
0
21
R5815
SM-3
27.000M
31
Y5800
603
22PF
5% 50V CERM
2
1
C5815
603
5%
50V
CERM
22PF
2
1
C5814
1K
1%
402
2
1
R5816
1%
402
1K
2
1
R5817
402
0.1UF
20% 10V CERM
2
1
C5817
1%
75
402
2
1
R5821
499
1%
2
1
R5820
1% 1/16W MF-LF 402
75
2
1
R5822
402
1%
75
2
1
R5823
5% 1/16W MF-LF
10K
402
2
1
R5818
402
0
5%
21
R5819
402
6.3V CERM
10%
1UF
2
1
C5831
6.3V
10UF
CERM
20%
805
NOSTUFF
2
1
C5830
0805
1.8UH
NOSTUFF
21
L5830
SM
21
XW5830
10% CERM
6.3V 402
1UF
2
1
C5832
402
0.1UF
20% CERM
10V
2
1
C5833
402
0.1UF
20% 10V CERM
2
1
C5837
1UF
10% CERM
6.3V 402
2
1
C5836
NOSTUFF
805
10UF
20%
6.3V CERM
2
1
C5835
0805
FERR-220-OHM
21
L5835
SM
21
XW5835
1UF
10% CERM
6.3V 402
2
1
C5841
NOSTUFF
805
10UF
20%
6.3V CERM
2
1
C5840
FERR-220-OHM
0805
21
L5840
SM
21
XW5840
1UF
10% CERM
6.3V 402
2
1
C5846
6.3V
NOSTUFF
805
10UF
20% CERM
2
1
C5845
FERR-220-OHM
0805
21
L5845
SM
21
XW5845
1UF
10% CERM
6.3V 402
2
1
C5856
NOSTUFF
805
10UF
20%
6.3V CERM
2
1
C5855
SM
21
XW5855
FERR-220-OHM
0805
21
L5865
1UF
10% CERM
6.3V 402
2
1
C5866
NOSTUFF
805
10UF
20%
6.3V CERM
2
1
C5865
SM
21
XW5865
5%
10K
402
2
1
R5825
SM
21
XW5847
I572
I573
I574
I575
I576
I577
I578 I579
4.7K
5% 1/16W
8
1
RP5810
5%
4.7K
7
2
RP5810
4.7K
5% 1/16W
6
3
RP5810
5%
4.7K
5
4
RP5810
I589
I590 I591
75
1% 1/16W MF-LF
402
DEVELOPMENT
2
1
R5826
DEVELOPMENT
LM63CIMA
SOI
1
7
8
4
5
3
2
6
U5890
DEVELOPMENT
603
2200PF
5%
50V
CERM
2
1
C5892
402
20% 10V CERM
0.1UF
DEVELOPMENT
2
1
C5890
402
100PF
5% 50V
DEVELOPMENT
CERM
2
1
C5891
10K
5% 1/16W MF-LF 402
DEVELOPMENT
2
1
R5892
402
10K
5% 1/16W MF-LF
DEVELOPMENT
2
1
R5891
102
051-6772
04
58
ANALOG_RED
GPU_VGA_37P5 GPU_VGA_37P5
TMDS_CKP
GPU_TMDS GPU_TMDS
TMDS_CK
TMDS
TMDS_D1P
GPU_TMDS GPU_TMDS
TMDS_D1
TMDS
TMDS_D1M
GPU_TMDS GPU_TMDS
TMDS_D1
GPU_LCDDATA<17>
GPU_LCDDATA<16>
TP_GPU_LCDDATA<15>
TP_GPU_LCDDATA<14>
TP_GPU_LCDDATA<12>
TP_GPU_LCDDATA<11>
TP_GPU_LCDDATA<10>
TP_GPU_LCDDATA<13>
TP_GPU_LCDDATA<19>
TP_GPU_LCDDATA<18>
TP_GPU_LCDDATA<23>
TP_GPU_LCDDATA<21>
TP_GPU_LCDDATA<20>
TP_GPU_LCDDATA<22>
TP_GPU_LCDDATA<6> TP_GPU_LCDDATA<7>
TP_GPU_LCDDATA<4> TP_GPU_LCDDATA<5>
TP_GPU_LCDDATA<9>
TP_GPU_LCDDATA<8>
TP_GPU_LCDDATA<0> TP_GPU_LCDDATA<1> TP_GPU_LCDDATA<2> TP_GPU_LCDDATA<3>
ATI_PWM
GPU_DIODE_PLUS GPU_DIODE_MINUS
GPU_CLK27M_XOUT
MIN_NECK_WIDTH=0.25MM
GPU_VREFG
MIN_LINE_WIDTH=0.5MM
I2C_GPU_DIODE_SDA
I2C_GPU_DIODE_SCL
U5890_ALERT_L
U5890_PWM
GPU_DIODE_MINUS
GPU_DIODE_PLUS
PP3V3_PWRON
VOLTAGE=0V MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
GND_GPU_TXVSSR
GPU_DAC1_VSYNC
NO_TEST=TRUE
TMDS_D1P TMDS_D1M TMDS_D2P TMDS_D2M
I2C_GPU_TMDS_SCL I2C_GPU_TMDS_SDA
GPU_STEREOSYNC
ANALOG_RED
MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.25MM
GPU_RSET
GND_GPU_AVSSQ
TMDS_D2M
GPU_TMDS GPU_TMDS
TMDS_D2
ANALOG_VSYNC
ANALOG_GRN
MIN_NECK_WIDTH=0.25MM
VOLTAGE=0V MIN_LINE_WIDTH=0.5MM
GND_GPU_TPVSS
ANALOG_BLU
TMDS_D2P
GPU_TMDS GPU_TMDS
TMDS_D2
TMDS
TMDS_CKM
GPU_TMDS GPU_TMDS
TMDS_CK
TMDS_D0P
GPU_TMDS GPU_TMDS
TMDS_D0
TMDS
=PP3V3_AGP
MIN_LINE_WIDTH=0.5MM
GPU_R2SET
MIN_NECK_WIDTH=0.25MM
=PP3V3_AGP
=PP3V3_AGP
MIN_LINE_WIDTH=0.5MM
VOLTAGE=1.8V MIN_NECK_WIDTH=0.25MM
PP1V8_GPU_VDDDI
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
VOLTAGE=0V
GND_GPU_VSSDI
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
VOLTAGE=1.8V
PP1V8_GPU_AVDD
GPU_CLK27M_XIN
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
VOLTAGE=0V
GND_GPU_AVSSN
PP2V5_GPU_A2VDD
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
VOLTAGE=1.8V
PP1V8_GPU_A2VDDQ
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
VOLTAGE=0V
GND_GPU_A2VSSQ
GND_GPU_A2VSSN
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
VOLTAGE=0V
GPU_LCDCNTL<3>
GPU_LCDCNTL<2>
GPU_LCDCNTL<1>
GPU_LCDCNTL<0>
MON_DETECT_R
GND_GPU_AVSSQ
I2C_GPU_MON_SCL I2C_GPU_MON_SDA
ANALOG_HSYNC
TMDS_D0M
TMDS_CKM TMDS_D0P
TMDS_CKP
TP_GPU_GPIO<4>
GPU_GPIO<16>
GPU_GPIO<15>
GPU_GPIO<14>
GPU_GPIO<11>
GPU_GPIO<1> TP_GPU_GPIO<2>
GPU_GPIO<13>
GPU_GPIO<9>
GPU_GPIO<0>
TP_GPU_GPIO<3>
TP_GPU_GPIO<5> TP_GPU_GPIO<6> GPU_GPIO<7>
GPU_GPIO<12>
GPU_GPIO<10>
GPU_GPIO<8>
GPU_CLK27M_XOUT_R
MON_DETECT
ANALOG_GRN
GPU_VGA_37P5 GPU_VGA_37P5
TMDS_D0M
GPU_TMDS GPU_TMDS
TMDS_D0
ANALOG_BLU
GPU_VGA_37P5 GPU_VGA_37P5
PP1V8_GPU_TPVDD
VOLTAGE=1.8V MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.25MM
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
VOLTAGE=1.8V
PP1V8_GPU_TXVDDR
=PP1V8_GPU
59
59
59
58
58
58
56
56
56
27
50
50
50
59
18
59
59
59
49
49
49
59
59
52
58
59
59
59
11
59
59
59
59
58
59
58
58
59
59
59
48
48
48
51
59
59
59
59
59
58
59
58
51
6
58
58
58
56
56
56
58
58
18
18
58
58
6
58
58
58
58
59
59
6
58
58
59
6
6
58
58
58
7
7
7
50
58
59
59
59
58
58
58
58
56
56
56
56
56
56
56
56
56
56
56
56
6
6
58
6
50
51
50
Preliminary
Page 50
SYM_VER-1
LCFILTER
LCFILTER
LCFILTER
SYM_VER-1
SYM_VER-1
G
D
S
G
D
S
SYM_VER-1
G
D
S
125
G
S D
G
S D
125
125
125
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
LAMP_STS NOT USED ON Q45C
PLACE R5821-3 & FL5900-2 CLOSE TO J5903 ON BOTTOM SIDE OF BOARD
PLACE R5901-R5904 AS CLOSE TO GPU AS POSSIBLE
(516S0241)
INVERTER INTERFACE
NET_PHYSICAL_TYPE
EXT VGA / TMDS
AND INVERTER
518-0141
ON/OFF FOR 20" LCD INVETER.
NOTE:REMOVED 2 PINS:LAMP_STATUS &
INTERNAL TMDS CONNECTOR
376S0082
(514-0201)
EXTERNAL VGA CONNECTOR
(GRN_RTN)
(BLU_RTN)
(RED_RTN)
NC
518-0135
PIN 3 IS NC
LEAVING CONNECTED DURING DEVELOPMENT SO WE CAN USE Q45A INVERTERS
ON Q45C INVERTER
20" LCD INVERTER NEED +24V. 17" LCD INVERTER NEED +12V.
DIFFERENTIAL_PAIR
NET_SPACING_TYPE
SILKSCREEN: 3
1/16W
33
5%
MF-LF
402
21
R5900
2.0K
5% 1/16W MF-LF
402
2
1
R5905
0.01UF
CERM
10% 16V
402
2
1
C5900
402
16V
0.01UF
10%
CERM
2
1
C5901
NOSTUFF
SM
90-OHM
4
32
1
L5902
402
16V
10%
CERM
0.01UF
2
1
C5903
CERM
10% 16V
402
0.01UF
2
1
C5904
16V
0.01UF
CERM 402
10%
2
1
C5905
47PF
5% 50V CERM 402
2
1
C5978
CRITICAL
DV01793
F-ST-TH
9
8
7
6
5
4
3
2
18
17
16
15
14
13
12
11
10
1
J5903
5% 1/16W MF-LF
4.7K
402
2
1
R5978
402
4.7K
5%
2
1
R5977
47PF
5%
50V
CERM
402
2
1
C5977
SM-220MHZ
NOSTUFF
43
21
FL5902
SM-220MHZ
NOSTUFF
43
21
FL5901
SM-220MHZ
NOSTUFF
43
21
FL5900
0.01UF
20%
CERM
50V
603
17_INCH_LCD
2
1
C5910
DEVELOPMENT
CERM
20% 50V
603
0.01UF
2
1
C5911
603
220PF
5% 25V CERM
17_INCH_LCD
2
1
C5912
603
50V
20%
0.01UF
CERM
17_INCH_LCD
2
1
C5913
NOSTUFF
SM
90-OHM
4
32
1
L5909
NOSTUFF
SM
90-OHM
4
32
1
L5910
50V
20%
0.01UF
CERM 603
17_INCH_LCD
2
1
C5915
17_INCH_LCD
CRITICAL
42375
M-ST-TH
6
5
4
3
2
1
J5900
5% 1/16W MF-LF 402
10K
2
1
R5914
402
16V
20%
0.022UF
CERM
NOSTUFF
2 1
C5918
CERM
0.01UF
402
16V
20%
NOSTUFF
2 1
C5919
2N7002
SOT23-LF
NOSTUFF
2
1
3
Q5901
CRITICAL
53307-3072
F-ST-SM
9
8
7
6
5
4
30
3
29
28
27
26
25
24
23
22
21
20
2
19
18
17
16
15
14
13
12
11
10
1
J5902
STDOFF-118OD-181H-TH
1
SDF5900
STDOFF-118OD-181H-TH
1
SDF5901
20%
10UF
16V ELEC SM
17_INCH_LCD
2
1
C5921
10UF
20% 16V
SM
ELEC
DEVELOPMENT
2
1
C5922
PP3V3_RUN PP12V_RUN
1206
5%
0
1/4W MF-LF
NOSTUFF
2
1
R5922
100K
5%
402
1/16W MF-LF
NOSTUFF
21
R5925
10K
402
1/16W
5%
MF-LF
NOSTUFF
2
1
R5913
0
21
R5932
0
21
R5933
0
21
R5931
0
21
R5930
0
21
R5928
0
21
R5926
0
21
R5929
0
21
R5927
MMBZ5227B
20_INCH_LCD
3
1
DZ5900
1/4W
0
5%
1206
MF-LF
20_INCH_LCD
2
1
R5935
PP12V_RUNPP3V3_RUN
MF-LF
1/4W
1206
0
5%
17_INCH_LCD
2
1
R5934
CERM 1210
16V
10%
10UF
2
1
C5917
100K
5%
MF-LF
402
1/16W
NOSTUFF
2
1
R5915
603
50V
20%
0.01UF
CERM
20_INCH_LCD
2
1
C5943
20_INCH_LCD
603
50V
20%
0.01UF
CERM
2
1
C5944
603
220PF
5% 25V
20_INCH_LCD
CERM
2
1
C5945
20_INCH_LCD
603
50V
20%
0.01UF
CERM
2
1
C5946
402
1/16W
1%
MF-LF
332
2
1
R5903
402
1/16W
1%
MF-LF
332
2
1
R5902
402
1/16W
1% MF-LF
332
2
1
R5901
402
1/16W MF-LF
332
1%
2
1
R5904
CERM
10%
10UF
1210
16V
2
1
C5916
5%
330
603
2
1
R5912
RT-S-TH
53048
CRITICAL
20_INCH_LCD
6
5
4
3
2
1
J5901
20_INCH_LCD
1210
1UF
20% 50V CERM
2
1
C5942
CERM
50V
20%
1UF
1210
NOSTUFF
2
1
C5947
SOT23-LF
2N7002
DEVELOPMENT
Q5902_DRAIN
2
1
3
Q5902
TSOP
SI3433DV
DEVELOPMENT
4
3 6
5
2
1
Q5903
100K
5%
402
DEVELOPMENT
2
1
R5916
200K
402
5% 1/16W MF-LF
DEVELOPMENT
2
1
R5919
402
5%
DEVELOPMENT
100K
21
R5920
10V 402
20% CERM
0.1UF
DEVELOPMENT
2
1
C5920
NOSTUFF
MMBD914XXG
3
1
D5901
10K
5% 1/16W MF-LF
DEVELOPMENT
402
2
1
R5921
NOSTUFF
SM
90-OHM
4
3 2
1
L5908
GREEN
2.0X1.25A 2
1
LED5900
SO-8
IRF7410
NOSTUFF
321
4
8765
Q5900
MF-LF 1206
1/4W
0
5%
NOSTUFF
2
1
R5950
MF-LF 1206
1/4W
0
5%
NOSTUFF
2
1
R5923
402
10K
5% MF-LF
NOSTUFF
2
1
R5960
MMBD914XXG
3
1
D5914
MF-LF
402
5%
1/16W
33
21
R5906
5%
2.0K
402
2
1
R5907
CERM 402
0.1UF
20% 10V
2
1
C5970
CERM
50V
5%
22PF
402
NOSTUFF
2
1
C5908
402
10
5% 1/16W MF-LF
21
R5971
50V
5%
22PF
402
CERM
NOSTUFF
2
1
C5907
402
5%
10
21
R5972
74LCX125
6
14
47
5
U5970
2N7002DW
SOT-363
1
2
6
Q5975
2N7002DW
SOT-363
4
5
3
Q5975
5%
10K
402
2
1
R5973
5%
10K
402
2
1
R5974
100
5% 1/16W MF-LF
402
21
R5975
5%
100
402
21
R5976
CRITICAL
74LCX125
3
14
17
2
U5970
CERM
16V
10%
0.01UF
402
2
1
C5902
74LCX125
8
14
10
7
9
U5970
74LCX125
11
14
13
7
12
U5970
805
0
5%
1/8W
21
R5980
805
0
5%
1/8W
21
R5981
805
0
5%
1/8W
21
R5982
0
805
17_INCH_LCD
21
R5984
805
0
17_INCH_LCD
21
R5985
0
805
DEVELOPMENT
21
R5986
805
0
17_INCH_LCD
21
R5987
805
0
17_INCH_LCD
21
R5988
20_INCH_LCD
0
805
21
R5989
20_INCH_LCD
805
0
21
R5990
20_INCH_LCD
0
805
21
R5991
20_INCH_LCD
0
805
21
R5992
I885
I886
I887
I888 I889
I890
I891
I892
I893
I894
I895
402
0
21
R5940
0
402
21
R5941
402
0
21
R5942
051-6772
04
59
102
FPD_PWR_SW_S
MIN_LINE_WIDTH=0.6MM
VOLTAGE=3.3V
MIN_NECK_WIDTH=0.3MM
FPD_PWR_ON
LED5900_PWR
LED5900_P1
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
PP5V_VGA VOLTAGE=5V
PP5V_USB2
GND_CHASSIS_VGA
=PP3V3_AGP
=PP5V_AGP
PP5V_AGP_P_SEQ
MIN_LINE_WIDTH=2MM MIN_NECK_WIDTH=0.25MM
GND_CHASSIS_17_INCH_INVERTER
GPU_TMDS
TD1
GPU_TMDS
TD1P
TCK
TCKP
GPU_TMDSGPU_TMDS
INV_CUR_HI
LCD_PWM
Q5902_GATE
=PP12V_AGP
Q5903_GATE
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=2MM
VOLTAGE=5V
PP5V_AGP_RL
I2C_TMDS_SDA
I2C_TMDS_SCL
I2C_GPU_TMDS_SCL
I2C_GPU_TMDS_SDA
TMDS_D1P
MON_DETECT
I2C_MON_SCL_R
VGA_VSYNC
FPD_PWR_ON
FPD_PWR_ON_D
TMDS_EN
TMDS_EN_R
PP3V3_ALL
TMDS_CKM
TD0P
TD0M
TD1P
I2C_TMDS_SCL
TCKM TCKP
TD1M
TD2P
GND_CHASSIS_TMDS
VOLTAGE=3.3V
PP3V3_DDC
MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.25MM
TMDS_D0P
GND_CHASSIS_20_INCH_INVERTER
TD1P
TD0P
TCKM
TCKP
TMDS_CKP
TMDS_D0M
ANALOG_HSYNC
ANALOG_VSYNC
VGA_VSYNC_R
VGA_HSYNC_R
VGA_HSYNC_R
VGA_VSYNC_R
PPVCC_TMDS
=PP3V3_AGP
PP3V3_DDC
=PP24V_GRAPHICS
LCD_PWM
INV_CUR_HI
INV_20_CUR_HI_F
FPD_PWR_SW_G
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
VOLTAGE=3.3V
PPVCC_FPD
TD2M
I2C_TMDS_SDA
VOLTAGE=3.3V
PPVCC_TMDS
MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.25MM
FILT_ANALOG_BLU
GPU_VGA
GPU_VGA_75
TD0
TD0M
GPU_TMDS GPU_TMDS
GPU_TMDS
TD1
TD1M
GPU_TMDS
GPU_TMDS
TD2
TD2P
GPU_TMDS
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=2MM
VOLTAGE=0V
GND_17_INV
PP12V_INV
VOLTAGE=12V MIN_LINE_WIDTH=2MM MIN_NECK_WIDTH=0.25MM
=PP12V_AGP
FILT_ANALOG_RED
GPU_VGA_75
GPU_VGA
TD2P
TD2M
TMDS_D1M
TD0M
TMDS_D2P
TD1M
TMDS_D2M
GND_CHASSIS_VGA
VGA_HSYNC
PP5V_VGA
GND_CHASSIS_VGA
I2C_MON_SCL_R
I2C_MON_SDA_R
=PP3V3_AGP
I2C_GPU_MON_SCL
I2C_GPU_MON_SDA
I2C_MON_SCL
I2C_MON_SDA
FILT_ANALOG_BLU
ANALOG_BLU
FILT_ANALOG_GRN
ANALOG_GRN
FILT_ANALOG_RED
ANALOG_RED
GPU_TMDS
TD2
TD2M
GPU_TMDS
FILT_ANALOG_GRN
GPU_VGA_75
GPU_VGA
TCK
TCKM
GPU_TMDSGPU_TMDS
GPU_TMDS
TD0
TD0P
GPU_TMDS
INV_17_CUR_HI_F
INV_17_LCD_PWM_F
PP24V_INV
VOLTAGE=24V MIN_LINE_WIDTH=2MM MIN_NECK_WIDTH=0.25MM
GND_20_INV
VOLTAGE=0V MIN_LINE_WIDTH=2MM MIN_NECK_WIDTH=0.25MM
INV_20_LCD_PWM_
GND_CHASSIS_VGA
I2C_MON_SDA_R
PP5V_VGA
=PP3V3_AGP
59
59
59
59
58
58
58
58
56
56
56
56
50
50
50
50
49
59
49
59
49
49
59
59
48
50
59
59
59
59
50
59
59
58
59
11
59
59
59
59
59
59
59
59
7
59
59
59
59
59
59
48 59
59
59
59
59
59
59
59
59
59
50
59
59
59
59
59
59
59
48
58
58
58
59
59
59
59
59
48
56
59 92
7
7
7
7
6
6
56
56
7
6
6
6
58
58
58
6
59
56
56
7
58
6
6
6
6
6
6
6
6
6
6
58
7
6
6
6
6
58
58
58
58 59
59
59
59
6
7 6
7
56
56
6
6
6
6
6
6
6
6
6
6
7
6
6
6
58
6
58
6
58
7
59
7
59
59
7
58
58
6
6
6
6
6
6
6
6
6
6
6
6
7
59
59
7
Preliminary
Page 51
HT_CTL_TXN0
HT_CTL_TXP0
HT_CTL_RXN0
HT_CTL_RXP0
HT_CLK_RXN0
HT_CLK_RXP0
HT_CLK_TXN0
HT_CLK_TXP0
(SYM 5 OF 7)
INTERFACE
HT
HT_LDTREQ*
HT_LDTSTOP*
HT_RESET*
HT_PWROK
HT_CAD_RXN7
HT_CAD_RXP7
HT_CAD_RXN6
HT_CAD_RXN1
HT_CAD_RXN5
HT_CAD_RXP5
HT_CAD_RXP6
HT_CAD_RXN4
HT_CAD_RXP4
HT_CAD_RXN3
HT_CAD_RXP3
HT_CAD_RXN2
HT_CAD_RXP2
HT_CLK
HT_CAD_RXP0 HT_CAD_RXN0 HT_CAD_RXP1
HT_PVTREF1
HT_PVTREF0
HT_CAD_TXP7 HT_CAD_TXN7
HT_CAD_TXN6
HT_CAD_TXN1
HT_CAD_TXN5
HT_CAD_TXN4
HT_CAD_TXP2
HT_CAD_TXP3
HT_CAD_TXP4
HT_CAD_TXN2
HT_CAD_TXN3
HT_CAD_TXP5
HT_CAD_TXP6
HT_CAD_TXN0 HT_CAD_TXP1
HT_CAD_TXP0
HT_CLK_AVSS
AVDD
HT_CLK VDD_HT VDD_HT
2_5 1_2
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
LAST MODIFIED: APR 12, 04
U3LITE HT
DIFFERENTIAL_PAIR
4 MIL SPACING IN GROUP
HT_2V5
MATCHED GROUP CONSTRAINT IS TIGHT ENOUGH
MASTER: GILA
8 MIL SPACING TO ANYTHING ELSE
LENGTH TOLERENCE CAN BE LOOSE
HT_NB_TO_SB
5 MIL SPACING FOR DIFF PAIR 10 MIL SPACING TO ANYTHING ELSE
HT_SB_TO_NB
NET_SPACING_TYPE
NET_PHYSICAL_TYPE
ELECTRICAL_CONSTRAINT_SET
CERM
10V
20%
0.1UF
402
2
1
C6006
402
0.1UF
20% 10V CERM
2
1
C6005
CERM
10V
20%
0.1UF
402
2
1
C6004
CERM
10V
20%
0.1UF
402
2
1
C6002
402
0.1UF
20% 10V CERM
2
1
C6001
10V
20%
402
CERM
0.1UF
2
1
C6000
402
0.1UF
20% 10V CERM
2
1
C6007
402
0.1UF
20% 10V CERM
2
1
C6008
402
CERM
10V
20%
0.1UF
2
1
C6012
5% 1/10W MF-LF
603
2.2
21
R6000
6.3V
10% CERM
1UF
402
2
1
C6013
CERM
10V
20%
0.1UF
402
2
1
C6011
0.1UF
CERM 402
20% 10V
2
1
C6010
200
1% 1/16W MF-LF 402
2
1
R6001
1K
5% 1/16W MF-LF 402
2
1
R6002
402
5%
1K
2
1
R6003
1K
5% 1/16W MF-LF 402
2
1
R6004
1K
5% 1/16W MF-LF 402
2
1
R6005
I46
I47
I48 I49
I50
I51
I52
I53 I54
I55
I56 I57
I58 I59
I60
I61 I62
I63
I64 I65
I66
I67 I68
I69
I70 I71
I72
I73 I74
I75 I76
I77
I78 I79
I80
I81
I82
I83
I84 I85
I86
I87 I88
I89
PBGA
V1.0-300MM
U3LITE
OMIT
G6
J10
L9
N10
N6N2R9T8T4
G9
F9
L8
L7H8
H7
L6 L5
V2 V1
R7 R8
N1 P1
G8
F8
H9
M7
M5
P6
P8
R5
U4
U6
U8
M8
M6
P5
P7
R6
U3
U5
U7
U1
R1
R3
P2
M2
M4
L3
L1
U2
T1
R2
P3
M1
M3
L4
L2
U3
051-6772
102
60
04
HT_SB_TO_NBHT_SB_TO_NB
HT_SB_TO_NB_CAD7
HT_SB_TO_NB_CAD_N<7>
HT_CAD
HT_PWROK
HT_2V5
HT_PWROK
HT_2V5
HT_2V5
HT_RESET_L
HT_CTL HT_2V5
HT_LDTSTOP_L
HT_2V5HT_CTL HT_2V5
HT_NB_TO_SB
HT_NB_TO_SB_CLK_P
HT_NB_TO_SB_CLK
HT_NB_TO_SB
HT_CAD
HT_SB_TO_NBHT_SB_TO_NB
HT_SB_TO_NB_CAD2
HT_SB_TO_NB_CAD_N<2>
HT_CAD
HT_SB_TO_NBHT_SB_TO_NB
HT_SB_TO_NB_CAD3
HT_SB_TO_NB_CAD_P<3>
HT_CAD
HT_SB_TO_NBHT_SB_TO_NB
HT_SB_TO_NB_CAD5
HT_SB_TO_NB_CAD_N<5>
HT_CAD
HT_SB_TO_NBHT_SB_TO_NB
HT_SB_TO_NB_CAD4
HT_SB_TO_NB_CAD_N<4>
HT_CAD
HT_SB_TO_NB
HT_SB_TO_NB_CAD5
HT_SB_TO_NB_CAD_P<5>
HT_SB_TO_NB
HT_CAD
HT_SB_TO_NBHT_SB_TO_NB
HT_SB_TO_NB_CAD4
HT_SB_TO_NB_CAD_P<4>
HT_CAD
HT_SB_TO_NB
HT_SB_TO_NB_CAD1
HT_SB_TO_NB_CAD_N<1>
HT_SB_TO_NB
HT_CAD
HT_NB_TO_SB
HT_NB_TO_SB_CAD_N<4>
HT_NB_TO_SB_CAD4
HT_NB_TO_SB
HT_CAD
HT_NB_TO_SB
HT_NB_TO_SB_CAD_N<3>
HT_NB_TO_SB_CAD3
HT_NB_TO_SB
HT_CAD
HT_NB_TO_SB
HT_NB_TO_SB_CAD_P<6>
HT_NB_TO_SB_CAD6
HT_NB_TO_SB
HT_CAD
HT_SB_TO_NBHT_SB_TO_NB
HT_SB_TO_NB_CTL
HT_SB_TO_NB_CTL_P
HT_CAD
HT_SB_TO_NBHT_SB_TO_NB
HT_SB_TO_NB_CAD7
HT_SB_TO_NB_CAD_P<7>
HT_CAD
HT_SB_TO_NBHT_SB_TO_NB
HT_SB_TO_NB_CAD1
HT_SB_TO_NB_CAD_P<1>
HT_CAD
HT_SB_TO_NB
HT_SB_TO_NB_CLK_P
HT_SB_TO_NB_CLK
HT_SB_TO_NB
HT_CAD
HT_NB_TO_SB
HT_NB_TO_SB_CAD_P<5>
HT_NB_TO_SB_CAD5
HT_NB_TO_SB
HT_CAD
HT_NB_TO_SB
HT_NB_TO_SB_CAD1
HT_NB_TO_SB
HT_NB_TO_SB_CAD_N<1>
HT_CAD
HT_NB_TO_SB
HT_NB_TO_SB_CAD_P<2>
HT_NB_TO_SB_CAD2
HT_NB_TO_SB
HT_CAD
HT_NB_TO_SB
HT_NB_TO_SB_CAD_N<2>
HT_NB_TO_SB_CAD2
HT_NB_TO_SB
HT_CAD
HT_NB_TO_SB
HT_NB_TO_SB_CAD_P<3>
HT_NB_TO_SB_CAD3
HT_NB_TO_SB
HT_CAD
HT_NB_TO_SB
HT_NB_TO_SB_CAD_N<5>
HT_NB_TO_SB_CAD5
HT_NB_TO_SB
HT_CAD
HT_SB_TO_NBHT_SB_TO_NB
HT_SB_TO_NB_CAD6
HT_SB_TO_NB_CAD_P<6>
HT_CAD
HT_NB_TO_SB
HT_NB_TO_SB_CAD_N<6>
HT_NB_TO_SB_CAD6
HT_NB_TO_SB
HT_CAD
HT_NB_TO_SB
HT_NB_TO_SB_CAD_P<7>
HT_NB_TO_SB_CAD7
HT_NB_TO_SB
HT_CAD
HT_NB_TO_SB
HT_NB_TO_SB_CAD_N<7>
HT_NB_TO_SB_CAD7
HT_NB_TO_SB
HT_CAD
HT_SB_TO_NBHT_SB_TO_NB
HT_SB_TO_NB_CTL
HT_SB_TO_NB_CTL_N
HT_CAD
HT_SB_TO_NBHT_SB_TO_NB
HT_SB_TO_NB_CAD_N<0>
HT_SB_TO_NB_CAD0
HT_CAD
HT_2V5
HT_LDTREQ_L
HT_CTL HT_2V5
HT_NB_TO_SB
HT_NB_TO_SB_CAD_P<0>
HT_NB_TO_SB_CAD0
HT_NB_TO_SB
HT_CAD
HT_NB_TO_SBHT_NB_TO_SB
HT_NB_TO_SB_CTL_P
HT_NB_TO_SB_CTL
HT_CAD
HT_NB_TO_SB
HT_NB_TO_SB_CLK_N
HT_NB_TO_SB_CLK
HT_NB_TO_SB
HT_CAD
HT_NB_TO_SB
HT_NB_TO_SB_CAD_N<0>
HT_NB_TO_SB_CAD0
HT_NB_TO_SB
HT_CAD
HT_SB_TO_NBHT_SB_TO_NB
HT_SB_TO_NB_CAD3
HT_SB_TO_NB_CAD_N<3>
HT_CAD
HT_SB_TO_NBHT_SB_TO_NB
HT_SB_TO_NB_CAD_P<0>
HT_SB_TO_NB_CAD0
HT_CAD
HT_SB_TO_NB
HT_SB_TO_NB_CLK_N
HT_SB_TO_NB_CLK
HT_SB_TO_NB
HT_CAD
HT_NB_TO_SB
HT_NB_TO_SB_CAD_P<4>
HT_NB_TO_SB_CAD4
HT_NB_TO_SB
HT_CAD
HT_NB_TO_SB
HT_NB_TO_SB_CAD_P<1>
HT_NB_TO_SB_CAD1
HT_NB_TO_SB
HT_CAD
HT_NB_TO_SBHT_NB_TO_SB
HT_NB_TO_SB_CTL_N
HT_NB_TO_SB_CTL
HT_CAD
HT_SB_TO_NBHT_SB_TO_NB
HT_SB_TO_NB_CAD6
HT_SB_TO_NB_CAD_N<6>
HT_CAD
HT_SB_TO_NBHT_SB_TO_NB
HT_SB_TO_NB_CAD2
HT_SB_TO_NB_CAD_P<2>
HT_CAD
=PP1V2_HT
HT_SB_TO_NB_CAD_N<1>
HT_SB_TO_NB_CAD_P<4>
=PP1V2_HT
=PP2V5_HT
HT_LDTREQ_L
HT_RESET_L HT_LDTSTOP_L
HT_PWROK
HT_SB_TO_NB_CAD_N<7>
HT_SB_TO_NB_CAD_P<7>
HT_SB_TO_NB_CAD_N<6>
HT_SB_TO_NB_CAD_N<4> HT_SB_TO_NB_CAD_P<5> HT_SB_TO_NB_CAD_N<5> HT_SB_TO_NB_CAD_P<6>
HT_SB_TO_NB_CAD_P<2> HT_SB_TO_NB_CAD_N<2> HT_SB_TO_NB_CAD_P<3> HT_SB_TO_NB_CAD_N<3>
HT_SB_TO_NB_CAD_P<0> HT_SB_TO_NB_CAD_N<0> HT_SB_TO_NB_CAD_P<1>
HT_CLK66M_NB
HT_NB_PVTREF1
HT_NB_PVTREF0
HT_NB_TO_SB_CAD_N<6>
HT_NB_TO_SB_CAD_N<7>
HT_NB_TO_SB_CAD_P<7>
HT_NB_TO_SB_CAD_P<6>
HT_NB_TO_SB_CAD_N<5>
HT_NB_TO_SB_CAD_P<5>
HT_NB_TO_SB_CAD_N<4>
HT_NB_TO_SB_CAD_P<4>
HT_NB_TO_SB_CAD_N<1> HT_NB_TO_SB_CAD_P<2> HT_NB_TO_SB_CAD_N<2>
HT_NB_TO_SB_CAD_N<3>
HT_NB_TO_SB_CAD_P<3>
HT_NB_TO_SB_CAD_P<1>
HT_NB_TO_SB_CAD_N<0>
HT_NB_TO_SB_CAD_P<0>
HT_NB_TO_SB_CLK_P HT_NB_TO_SB_CLK_N
HT_SB_TO_NB_CLK_P HT_SB_TO_NB_CLK_N
HT_SB_TO_NB_CTL_P HT_SB_TO_NB_CTL_N
HT_NB_TO_SB_CTL_P HT_NB_TO_SB_CTL_N
=PP2V5_HT
=PP2V5_HT
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
VOLTAGE=1.5V
PP1V5_PWRON_HT_NB_AVDD
=PP1V5_PWRON_NB_AVDD
48
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
60
64
64
60
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
37
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
24
62
62
24
60
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
60
60
28
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
7
60
60
7
7
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
27
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
7
7
7
Preliminary
Page 52
SEL_HT00_H
HT_S100M66M
HT_CTLOUT_N
HT_CTLOUT_P
HT_CTLIN_N
HT_CTLIN_P
HT_LDTSTOP_L
HT_RESET_L
HT_LDTREQ_L
HT_RXVDD
HT
HT_PLL
VDDPDVDDAVDD
HT_CADIN_7_P HT_CADIN_7_N
HT_PWROK_H
HT_CADIN_6_N
HT_CADIN_3_P HT_CADIN_3_N HT_CADIN_4_P HT_CADIN_4_N HT_CADIN_5_P HT_CADIN_5_N HT_CADIN_6_P
HT_CADIN_2_N
HT_CADIN_2_P
HT_CADIN_1_N
HT_CADIN_1_P
HT_CLKIN_N
HT_CLKIN_P
HT_CADIN_0_P HT_CADIN_0_N
AGND DGND
HT_PLL
HT_RXGND
HT_CADOUT_7_P HT_CADOUT_7_N
HT_TXGND
HT_R100N
HT_R100P
HT_CADOUT_6_N
HT_CADOUT_6_P
HT_CADOUT_5_N
HT_CADOUT_5_P
HT_CADOUT_4_N
HT_CADOUT_4_P
HT_CADOUT_3_N
HT_CADOUT_3_P
HT_CADOUT_2_N
HT_CADOUT_2_P
HT_CADOUT_1_N
HT_CADOUT_1_P
HT_CADOUT_0_N
HT_CADOUT_0_P
HT_CLKOUT_N
HT_CLKOUT_P
(3 OF 8)
HT_TXVDD
HT_REFCLK
HYPERTRANSPORT
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
MASTER: SEEDY
Shasta HyperTransport
0 = 66MHz
HT RefClk 1 = 100MHz
HT I/F Speed 1 = 100MHz
0 = 200MHz
1.0V pk-pk
- _PP1V2_PWRON_HT Signal aliases required by this page:
AC coupled
(NONE)
- _PP2V5_PWRON_HT
ELECTRICAL_CONSTRAINT_SET
NET_SPACING_TYPE
Page Notes
Power aliases required by this page:
BOM options provided by this page:
DIFFERENTIAL_PAIR
- SB_HT_200M Stuffs resistor to select 200MHz HT I/F.
20% 10V CERM 402
0.1uF
2
1
C6231
0.1uF
402
CERM
10V
20%
2
1
C6230
0.1uF
402
CERM
10V
20%
2
1
C6220
SB_HT_200M
5% 1/16W MF-LF
402
1K
2
1
R6251
V1.0
BGA
SHASTA
OMIT
B19
V6
G11
B9
B12
G10
A9
A12
D8
G13
B17
B15
G12
A17
A15
C18
C8
E10 F10
E16
B6
A6
C7C6
E17 A19
C13 D13
F13 E13
B10 A10
D15 C15
A13 B13
E12 F12
C12 D12
A11 B11
D11 C11
E11 F11
B8 A8
D10 C10
B14 A14
E14 F14
D14 C14
B16 A16
D16 C16
F15 E15
B18 A18
D17 C17
U2300
0.1uF
402
CERM
10V
20%
21
C6255
332
1%
402
2
1
R6255
3.3
805
1/8W
5%
21
R6200
3.3
805
1/8W
5%
21
R6210
10K
402
5%
2
1
R6254
NOSTUFF
1206
20%
6.3V CERM
10uF
2
1
C6200
402
6.3V
1uF
10% CERM
2
1
C6201
6.3V
1uF
402
CERM
10%
2
1
C6211
NOSTUFF
10uF
1206
CERM
6.3V
20%
2
1
C6210
47pF
402
CERM
50V
5%
2
1
C6250
47pF
402
CERM
50V
5%
2
1
C6251
82.5
1%
402
21
R6250
5% 1/16W MF-LF
402
4.7K
NO STUFF
2
1
R6252
5%
402
4.7K
2
1
R6253
0.1uF
402
CERM
10V
20%
2
1
C6240
CERM
20%
0.1uF
402
10V
2
1
C6241
0.1uF
20% 10V CERM 402
2
1
C6242
0.1uF
402
CERM
10V
20%
2
1
C6232
051-6772
04
102
62
=PP1V2_PWRON_HT
MIN_NECK_WIDTH=15 mil
MIN_LINE_WIDTH=20 mil
VOLTAGE=1.2V
PP1V2_PWRON_HT_PLLDVDD
=PP2V5_PWRON_HT
=PP1V2_PWRON_HT
PP1V2_PWRON_HT_PLLAVDD
MIN_LINE_WIDTH=20 mil
VOLTAGE=1.2V MIN_NECK_WIDTH=15 mil
HT_CLK66M_SB_C
HT_NB_TO_SB_CAD_P<0> HT_NB_TO_SB_CAD_N<0>
HT_NB_TO_SB_CTL_N
HT_SB_TO_NB_CAD_P<3>
HT_RESET_L
HT_CLK66M_SB_C
15 MIL SPACING
HT_SB_TO_NB_CTL_PHT_NB_TO_SB_CTL_P
HT_SB_TO_NB_CAD_P<6>
HT_SB_TO_NB_CAD_N<5>
HT_SB_TO_NB_CAD_P<7>
HT_SB_TO_NB_CAD_N<6>HT_NB_TO_SB_CAD_N<6>
HT_NB_TO_SB_CAD_N<7>
HT_NB_TO_SB_CAD_P<6>
HT_NB_TO_SB_CAD_N<5>
HT_NB_TO_SB_CAD_P<5>
HT_NB_TO_SB_CAD_N<4>
HT_NB_TO_SB_CAD_P<4>
HT_NB_TO_SB_CAD_P<3> HT_NB_TO_SB_CAD_N<3>
HT_NB_TO_SB_CAD_N<1>
HT_NB_TO_SB_CAD_N<2>
HT_NB_TO_SB_CAD_P<2>
HT_NB_TO_SB_CLK_N
HT_NB_TO_SB_CAD_P<1>
HT_NB_TO_SB_CLK_P
HT_SB_TO_NB_CAD_P<5>
HT_SB_TO_NB_CAD_P<4> HT_SB_TO_NB_CAD_N<4>
HT_SB_TO_NB_CAD_N<3>
HT_SB_TO_NB_CAD_N<1> HT_SB_TO_NB_CAD_P<2> HT_SB_TO_NB_CAD_N<2>
HT_SB_TO_NB_CAD_P<1>
HT_SB_TO_NB_CAD_N<0>
HT_SB_TO_NB_CLK_N
HT_SB_TO_NB_CAD_P<0>
HT_SB_TO_NB_CLK_P
HT_CLK66M_SB
SB_HT_R100_N
=PP1V2_PWRON_HT
HT_LDTREQ_L
HT_SB_TO_NB_CTL_N
HT_SB_TO_NB_CAD_N<7>
HT_LDTSTOP_L
HT_PWROK
SB_SELHT100
=PP1V2_PWRON_HT
SB_HT_S100M66M
HT_NB_TO_SB_CAD_P<7>
SB_HT_R100_P
62
62
64
64
64
64
64
64 64
64
64
64
64 64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
62
64
64
64
64
64
62
64
7
7
7
62
60
60
60
60
60
62
60 60
60
60
60
60 60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
27
7
60
60
60
60
60
7
60
Preliminary
Page 53
GND
GND
GND
GND
GND
GND
CLK+
GND
CLK-
GND
GND
SYM_VER1
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
GND
GND
GND
GND
GND
GND
CLK+
GND
CLK-
GND
GND
SYM_VER1
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
GND
GND
GND
GND
GND
GND
CLK+
GND
CLK-
GND
GND
SYM_VER1
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
HT DEBUG CONN
Q37 HYPERTRANSPORT BETWEEN GOLEM AND K2
SAME CONNECTORS & PINOUT AS
MASTER: GILA
LAST MODIFIED: APR 12, 04
NOSTUFF
P6860
ST-SM-DF
B3
B6
B9
B12
A13
A10
A7
A4
A1
B1
B4
B7
B10
A15
A12
A9
A6
A3
B2
B5
B8
B11
A14
A11
A8
A5
A2
J6401
402
MF-LF
1/16W
5%
10K
DEVELOPMENT
2
1
R6401
10K
1/16W 402
MF-LF
5%
DEVELOPMENT
2
1
R6402
NOSTUFF
0
5%
603
21
R6403
NOSTUFF
5%
0
603
21
R6404
ST-SM-DF
P6860
NOSTUFF
B3
B6
B9
B12
A13
A10
A7
A4
A1
B1
B4
B7
B10
A15
A12
A9
A6
A3
B2
B5
B8
B11
A14
A11
A8
A5
A2
J6400
603
5%
0
NOSTUFF
21
R6400
P6860
ST-SM-DF
NOSTUFF
B3
B6
B9
B12
A13
A10
A7
A4
A1
B1
B4
B7
B10
A15
A12
A9
A6
A3
B2
B5
B8
B11
A14
A11
A8
A5
A2
J6402
04
051-6772
64
102
=PP2V5_HT
MIN_NECK_WIDTH=10MIL MIN_LINE_WIDTH=25MIL
VOLTAGE=1.25V
HT_VREF_DEBUG
HT_SB_TO_NB_CAD_N<1>
HT_NB_TO_SB_CTL_N
HT_LDTREQ_L
HT_RESET_L
HT_SB_TO_NB_CLK_N
HT_PWROK
TEK_HT_B12
TEK_HT_B10
HT_NB_TO_SB_CAD_N<1>
HT_NB_TO_SB_CAD_P<1>
HT_NB_TO_SB_CAD_N<3>
HT_NB_TO_SB_CAD_P<3>
HT_NB_TO_SB_CAD_P<5>
HT_NB_TO_SB_CAD_N<5>
HT_NB_TO_SB_CAD_P<7>
HT_NB_TO_SB_CAD_N<7>
HT_NB_TO_SB_CLK_N
HT_NB_TO_SB_CLK_P
HT_NB_TO_SB_CAD_P<0>
HT_NB_TO_SB_CAD_P<2>
HT_NB_TO_SB_CAD_P<4>
HT_NB_TO_SB_CAD_N<6>
HT_NB_TO_SB_CAD_N<0>
HT_NB_TO_SB_CAD_N<2>
HT_NB_TO_SB_CAD_N<4>
HT_NB_TO_SB_CAD_P<6>
HT_SB_TO_NB_CAD_P<7>
HT_SB_TO_NB_CAD_N<7>
HT_SB_TO_NB_CAD_P<5>
HT_SB_TO_NB_CAD_N<5>
HT_SB_TO_NB_CAD_N<3>
HT_SB_TO_NB_CAD_P<3>
HT_SB_TO_NB_CAD_P<1>
HT_SB_TO_NB_CAD_P<0>
HT_SB_TO_NB_CAD_N<0>
HT_SB_TO_NB_CTL_N
HT_SB_TO_NB_CAD_N<6>
HT_SB_TO_NB_CAD_N<4>
HT_SB_TO_NB_CAD_P<2>
HT_SB_TO_NB_CTL_P
HT_SB_TO_NB_CAD_P<6>
HT_SB_TO_NB_CAD_P<4>
HT_SB_TO_NB_CAD_N<2>
HT_NB_TO_SB_CTL_P
HT_LDTSTOP_L
HT_SB_TO_NB_CLK_P
TEK_HT_A12
TEK_HT_A7
TEK_HT_A10
TEK_HT_A9
60
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
7
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
Preliminary
Page 54
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
AD<27> IS IDSEL FOR USB
AD<17> IS IDSEL FOR AIRPORT
ALL RESISTOR PACKS ARE 47 OHM 1/16W 5%
R PAKS ARE PIN SWAPPABLE ACROSS ALL SIGNALS (EXCEPT IDSELS)
PLACE CLOSE TO SHASTA
PCI SERIES TERMINATION
47
72
RP7303
47
54
RP7303
47
72
RP7309
47
81
RP7300
47
54
RP7309
47
63
RP7300
47
54
RP7300
47
72
RP7301
47
54
RP7301
47
81
RP7301
47
81
RP7309
47
63
RP7309
47
81
RP7307
47
63
RP7301
47
81
RP7308
47
63
RP7306
47
81
RP7305
47
72
RP7305
47
81
RP7302
47
63
RP7302
47
81
RP7304
47
54
RP7306
47
63
RP7305
47
72
RP7302
47
54
RP7304
47
54
RP7302
47
72
RP7304
47
63
RP7303
47
72
RP7306
47
54
RP7305
47
63
RP7304
47
81
RP7306
47
54
RP7307
47
63
RP7307
47
63
RP7308
47
54
RP7308
47
72
RP7308
47
72
RP7307
47
5%
402
21
R7300
5%
47
402
21
R7301
47
72
RP7300
47
81
RP7303
051-6772
04
73
102
PCI_AD<16>
PCI_SB_AD<16>
PCI_AD<15>
PCI_SB_AD<15>
PCI_AD<14>
PCI_AD<13>
PCI_SB_AD<13>
PCI_AD<12>
PCI_SB_AD<12>
PCI_AD<10> PCI_AD<11>
PCI_SB_AD<11>
PCI_AD<9>
PCI_SB_AD<9>
PCI_AD<8>
PCI_SB_AD<8>
PCI_AD<7>
PCI_SB_AD<7>
PCI_AD<6>
PCI_SB_AD<6>
PCI_AD<5>
PCI_SB_AD<5>
PCI_AD<4>
PCI_SB_AD<4>
PCI_AD<2>
PCI_SB_AD<2>
PCI_AD<3>
PCI_SB_AD<3>
PCI_AD<1>
PCI_SB_AD<1>
PCI_AD<0>
PCI_SB_AD<0>
PCI_AD<18>
PCI_SB_AD<20>
PCI_AD<20>
PCI_SB_AD<19>
PCI_AD<19>
PCI_SB_AD<21>
PCI_AD<21>
PCI_SB_AD<25>
PCI_AD<25>
PCI_SB_AD<24>
PCI_AD<24>
PCI_SB_AD<23>
PCI_AD<23>
PCI_SB_AD<22>
PCI_AD<22>
PCI_SB_AD<26>
PCI_AD<26>
PCI_SB_AD<28>
PCI_AD<28>
PCI_SB_AD<29>
PCI_AD<29>
PCI_SB_AD<31>
PCI_AD<31>
PCI_SB_AD<30>
PCI_AD<30>
PCI_SB_CBE_L<1>
PCI_CBE_L<1>
PCI_SB_CBE_L<0>
PCI_CBE_L<0>
PCI_SB_CBE_L<3>
PCI_CBE_L<3>
PCI_SB_TRDY_L PCI_SB_STOP_L
PCI_STOP_L
PCI_SB_FRAME_L
PCI_FRAME_L
PCI_SB_DEVSEL_L
PCI_DEVSEL_L
PCI_SB_IRDY_L
PCI_IRDY_L
PCI_SB_PAR
PCI_PAR
PCI_AD<27>
PCI_SB_AD<27>
PCI_AD<17>
PCI_CBE_L<2>
PCI_TRDY_L
PCI_SB_AD<18>
PCI_SB_AD<14>
PCI_SB_AD<10>
PCI_SB_CBE_L<2>
PCI_SB_AD<17>
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
77
76
76
77
77
76
76
76
76
76
77
77
77
77
77
77
77
77
76
76
77
77
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
76
75
75
76
76
75
75
75
75
75
76
76
76
76
76
76
76
76
75
75
76
76
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
6
74
6
74
6
6
74
6
74
6
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
74
6
74
6
74
6
74
6
74
6
6
74
6
6
6
74
74
74
74
74
Preliminary
Page 55
PCI
(4 OF 8)
PCI1CLK_H
PCIBR_CLK_H
PCI1PAR_H
PCI1AD_31_H
PCI1AD_30_H
PCI1AD_29_H
PCI1AD_28_H
PCI1AD_27_H
PCI1AD_26_H
PCI1AD_19_H
PCI1AD_18_H
PCI1AD_16_H PCI1AD_17_H
PCI1AD_24_H PCI1AD_25_H
PCI1AD_20_H PCI1AD_21_H PCI1AD_22_H PCI1AD_23_H
PCI1AD_15_H
PCI1AD_8_H
PCI1AD_9_H PCI1AD_10_H PCI1AD_11_H PCI1AD_12_H PCI1AD_13_H PCI1AD_14_H
PCI1AD_7_H
PCI1AD_6_H
PCI1AD_5_H
PCI1AD_4_H
PCI1AD_0_H
PCI1AD_1_H
PCI1AD_2_H
PCI1AD_3_H
PCIVDDP
VDDOPC
PCI1GNT_0_L
PCI1REQ_0_L
PCI1REQ_1_L PCI1GNT_1_L
PCI1REQ_2_L PCI1GNT_2_L
ROMCS_L ROMOE_L ROMRW_L
PCI1RST_L
PCI1STOP_L
PCI1TRDY_L
PCI1IRDY_L
PCI1FRAME_L
PCI1DEVSEL_L
PCI1C_BE_3_L
PCI1C_BE_2_L
PCI1C_BE_1_L
PCI1C_BE_0_L
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
may not be valid during power-up, so it is ANDed with a reset from the SMU.
Shasta drives PCI RESET, but its output
- _PP3V3_PWRON_SB
AD30 - FireWire (0x106B/0x0052, PCI0 or 2)
AD29 - UATA 133 (0x106B/0x0050, PCI0 or 2)
AD28 - SATA 150 (0x1166/0x0240, PCI0 or 2)
PCI Devices implemented on this page: AD11 - PCI0 (0x106B/0x0053)
AD31 - Ethernet (0x106B/0x0051, PCI0)
AD23 - KeyLargo (0x106B/0x004F, PCI1)
Signal aliases required by this page:
BOM options provided by this page:
AD11 - PCI1 (0x106B/0x0054) AD11 - PCI2 (0x106B/0x0055)
Page Notes
Power aliases required by this page:
Master: Link
NET_SPACING_TYPE
- _PP3V3_PCI
DIFFERENTIAL_PAIR
ELECTRICAL_CONSTRAINT_SET
Shasta PCI Interface
- _PP3V3_SB_PCI (can be _PP3V3_PCI)
"Slot D" - AD20
"Slot A" - AD17
"Slot G" - AD27
- _PP2V5_PWRON_SB
(NONE)
(NONE)
0.1uF
402
CERM
10V
20%
2
1
C7409
20% 10V CERM 402
0.1uF
2
1
C7408
0.1uF
402
CERM
10V
20%
2
1
C7407
20% 10V CERM 402
0.1uF
2
1
C7406
CERM
20%
0.1uF
402
10V
2
1
C7405
402
0.1uF
20% 10V CERM
2
1
C7404
20% 10V CERM 402
0.1uF
2
1
C7403
0.1uF
402
CERM
10V
20%
2
1
C7402
0.1uF
402
CERM
10V
20%
2
1
C7401
20% 10V CERM 402
0.1uF
2
1
C7400
0.1uF
CERM
10V
20%
402
2
1
C7423
0.1uF
402
CERM
10V
20%
2
1
C7422
0.1uF
20% 10V
CERM
402
2
1
C7421
20%
0.1uF
CERM
10V 402
2
1
C7420
4.7K
5%
63
RP7402
5%
4.7K
54
RP7402
4.7K
5%
72
RP7402
4.7K
5% 1/16W SM-LF
81
RP7402
4.7K
5% 1/16W SM-LF
72
RP7400
4.7K
5%
81
RP7400
4.7K
5% SM-LF
54
RP7400
4.7K
5%
63
RP7400
4.7K
5% 1/16W SM-LF
54
RP7401
4.7K
5% 1/16W SM-LF
63
RP7401
4.7K
5%
27
RP7401
OMIT
SHASTA
V1.0
BGA
V19
U21
R20
N21
M16
J21
H16
E21
B22
AA22
Y10
AA9
AB8
U20
N20
J18
B20
AB9
P19 P17
U18
V17
AB20
AB18
N17
R21
V18
AB19
AA18
T21
T22
V20
V22
P16
L19
U19
P22
M20
N16
M21
L20
M18
M22
T17
AA21
L22
T16
W20
Y21
T18
T19
R18
Y22
W21
R17
R16
K19
T20
P18
V21
P20
R22
P21
N19
M19
N18
M17
L18
U2300
805
20% CERM
10uF
6.3V
NO STUFF
2
1
C7410
805
6.3V
10uF
CERM
20%
NO STUFF
2
1
C7411
MC74VHC1G08
SOT23-5
5
4
1
2
3
U7450
402
20% 10V CERM
0.1uF
2
1
C7450
4.7K
402
5%
2
1
R7450
4.7K
402
5%
2
1
R7455
74 102
04
051-6772
SB_PCI_RESET_L
PCI_RESET_L
=PP3V3_PWRON_SB
PCI_SB_AD<5>
PCI_SB_AD<3> PCI_SB_AD<4>
PCI_SB_AD<2>
PCI_SB_AD<1>
PCI_SB_AD<6>
PCI_SB_AD<0>
PCI_SB_AD<13>
PCI_SB_AD<16>
PCI_SB_AD<15>
PCI_SB_AD<17>
PCI_SB_AD<14>
PCI_SB_AD<12>
PCI_SB_AD<11>
PCI_SB_AD<8> PCI_SB_AD<9>
PCI_SB_AD<7>
PCI_SB_AD<10>
PCI_SB_AD<27>
PCI_SB_AD<26>
PCI_SB_AD<25>
PCI_SB_AD<24>
PCI_SB_AD<23>
PCI_SB_AD<22>
PCI_SB_AD<20>
PCI_SB_AD<18> PCI_SB_AD<19>
PCI_SB_AD<21>
PCI_SB_AD<30>
PCI_SB_DEVSEL_L
PCI_SB_CBE_L<1>
PCI_SB_AD<29>
PCI_SB_CBE_L<2>
PCI_SB_AD<28>
PCI_SB_CBE_L<0>
PCI_SB_AD<31>
PCI_SB_CBE_L<3>
PCI_SB_FRAME_L
PCI_SB_PAR
PCI_SB_IRDY_L
PCI_SB_STOP_L
PCI_SB_TRDY_L
=PP2V5_PWRON_SB
ROM_WE_L
ROM_OE_L
ROM_CS_L
PCI_SLOTD_GNT_L
PCI_SLOTD_REQ_L
PCI_SLOTG_GNT_L
PCI_SLOTG_REQ_L
PCI_SLOTA_REQ_L PCI_SLOTA_GNT_L
PCI_CLK66M_SB_INT
PCI_CLK33M_SB_EXT
PCI_AD<22>
PCI_AD22
=PP3V3_PCI
=PP3V3_PCI
PCI_DEVSEL_L
PCI_IRDY_L
PCI_STOP_L
PCI_FRAME_L
PCI_TRDY_L
PCI_SLOTA_REQ_L
PCI_SLOTA_GNT_L
PCI_SLOTG_GNT_L
PCI_SLOTG_REQ_L
PCI_SLOTD_GNT_L
PCI_SLOTD_REQ_L
PCI_CTL
PCI_IRDY_L
PCI_AD<23>
PCI_AD23
PCI_AD<31..28>
PCI_AD
PCI_AD<27>
PCI_AD27
PCI_AD<21>
PCI_AD21
PCI_FRAME_L
PCI_CTL
PCI_AD
PCI_AD<26..24>
PCI_AD<17>
PCI_AD17
PCI_CTL
PCI_STOP_L
PCI_TRDY_L
PCI_CTL
=PP3V3_SB_PCI
SYS_WARM_RESET_L
PCI_AD
PCI_AD<19..18>
PCI_AD<20>
PCI_AD20
PCI_AD<16..0>
PCI_AD
PCI
PCI_CBE_L<3..0> PCI_PAR
PCI PCI_CTL
PCI_DEVSEL_L
77
77
76
76
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
88
77
75
75
76
76
76
76
76
76
77
76
76
77
76
76
76
76
76
76
76
76
77
77
76
56
25
25
76
76
76
76
76
76
74
74
74
74
74
74
74
76
76
74
76
75
75
76
74
75
75
74
74
77
75
75
75
76
76
74
8
23
23
75
75
75
77
77
74
74
27
73
25
25
73
73
73
73
73
74
74
77
77
73
73
73
73
73
73
73
73
73
73
25
73
73
73
73
73
73
6
7
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
7
6
6
6
74
74
74
74
6
6
27
8
6
7
7
6
6
6
6
6
6
6
74
74
74
74
6
6
6
6
6
6
6
6
6
6
7
8
6
6
6
6
6
6
Preliminary
Page 56
A0 A1
A6
A2 A3 A4 A5
A9
A8
A7
A10 A11 A12 A13 A14 A15 A16
A20
A17 A18 A19
CE OE WE WP PWD
GND
DQ0 DQ1
DQ6
DQ5
DQ2 DQ3 DQ4
DQ7
VPP VCC
FEPR-1MX8
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
BOM options provided by this page:
symbol to declare U7500 part number.
part number. Must use a TABLE_x_ITEM
(NONE)
Signal aliases required by this page: (NONE)
Page Notes
Power aliases required by this page:
- _PP3V3_PCI
BootROM
to intercept ROM chip select
Allows ROM override module
Master: Link
NOTE: This page does not specify a BootROM
TSOP
OMIT
90.0ns
12
9
11 3130
10
24
3923
35
34
33
32
28
27
26
25
22
7
8
14
15
16
17
18
38
19
37
13
40
1
2
3
4
5
6
36
20
21
U7500
1K
5%
402
21
R7502
402
5%
10K
2
1
R7501
5%
10K
402
2
1
R7500
805
20% 10V
CERM
2.2uF
2
1
C7500
402
CERM
10V
20%
0.1uF
2
1
C7501
0.1uF
20% 10V
CERM
402
2
1
C7502
04
051-6772
102
75
=PP3V3_PCI
ROM_ONBOARD_CS_L
PCI_AD<31>
PCI_AD<30>
PCI_AD<29>
PCI_AD<28>
PCI_AD<27>
PCI_AD<26>
PCI_AD<25>
PCI_AD<24>
PCI_AD<9>
PCI_AD<8>
PCI_AD<7>
PCI_AD<6>
PCI_AD<5>
PCI_AD<4>
PCI_AD<3>
PCI_AD<20>
PCI_AD<2>
PCI_AD<19>
PCI_AD<18>
PCI_AD<17>
PCI_AD<16>
PCI_AD<15>
PCI_AD<14>
PCI_AD<13>
PCI_AD<12>
PCI_AD<11>
PCI_AD<10>
PCI_AD<1>
PCI_AD<0>
ROM_OE_L ROM_WE_L ROM_WP_L =PCI_ROM_RESET_L
ROM_CS_L
=PP3V3_PCI
77
77
76
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
76
75
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
75
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
76
76
76
74
25
76
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
74
74
74
25
7
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
8
6
7
Preliminary
Page 57
ALIAS ALIAS
ALIAS
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
DIFFERENTIAL_PAIR
NET_SPACING_TYPE
Page Notes
Power aliases required by this page:
AIRPORT & BLUETOOTH
BOM options provided by this page:
ELECTRICAL_CONSTRAINT_SET
- _PP3V3_PCI
(NONE)
- _PCI_CLK33M_AIRPORT (33MHz PCI clock)
NOTE: This AirPort implementation does
AD17 (Slot "A") - AirPort (0x????/0x????)
not support PME#.
PCI Devices implemented on this page:
Signal aliases required by this page:
Q85 WIRELESS CONNECTOR
516S0285
402
1UF
10%
6.3V CERM
2
1
C7652
5%
402
MF-LF
1/16W
10K
2
1
R7650
1UF
10%
6.3V CERM 402
2
1
C7651
10UF
20%
6.3V CERM 1206
NOSTUFF
2
1
C7650
5%
402
15K
2
1
R7660
5% 1/16W MF-LF 402
15K
2
1
R7661
CERM
6.3V
10%
1UF
402
2
1
C7660
5%
22
402
21
R7651
STDOFF-3MMOD5MMH-TH
1
SDF7600
STDOFF-3MMOD5MMH-TH
1
SDF7601
CRITICAL
F-ST-SM
20-5602-080-041-829
8079
7877
7675
7473
7271
7069
6867
6665
6463
6261
6059
5857
5655
5453
5251
5049
4847
4645
4443
4241
4039
3837
3635
3433
3231
3029
2827
2625
2423
2221
2019
1817
1615
1413
1211
10
9
87
65
43
21
J7650
051-6772
04
76
102
_PP3V3_PWRON_BT
ROM_CS_L
ROM_ONBOARD_CS_L
ROM_OE_L
PCI_SLOTA_INT_L
PCI_AD<2>
ROM_WE_L
PCI_AD<11>
PCI_AD<4>
PCI_CBE_L<1>
AP_ALT_ANT
PCI_AD<15>
PCI_AD<13>
PCI_AD<14>
=PP3V3_PCI
PCI_AD<16>
PCI_CBE_L<2>
PCI_TRDY_L
PCI_AD<17>
PCI_FRAME_L
PCI_AD<20>
PCI_AD<23>
PCI_AD<28>
PCI_AIRPORT_RESET_L
PCI_AD<24>
PCI_SLOTA_GNT_L
TP_AP_PME_L
AIRPORT_CLKRUN_L_PD
PCI_AD<31>
PCI_AD<10>
USB_BT_N
MAKE_BASE=TRUE
USB_BT_P
MAKE_BASE=TRUE
PCI_AD<0>
PCI_AD<5>
PCI_AD<1>
PCI_AD<6>
PCI_AD<3>
PCI_AD<7>
PCI_CBE_L<0>
PCI_AD<9>
PCI_AD<8>
PCI_PAR
PCI_AD<12>
PCI_STOP_L
_PCI_CLK33M_AIRPORT
PCI_DEVSEL_L
PCI_AD<18>
PCI_IRDY_L
PCI_AD<21>
PCI_AD<19>
PCI_SLOTA_IDSEL
PCI_AD<22>
PCI_AD<26>
PCI_CBE_L<3>
PCI_AD<29>
PCI_AD<25>
PCI_SLOTA_REQ_L
PCI_AD<27>
PCI_AD<30>
_PCI_CLK33M_AIRPORT
PCI_CLK_AIRPORT
CLOCKS
PCI_AD<17>
USB2_OC<4>
USB2_P<4> USB2_N<4>
77
77
77
77
77
77
77
77
77
77
76
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
76
75
75
75
77
75
75
75
75
75
77
77
75
77
75
77
75
75
75
75
75
75
75
75
75
75
77
75
75
77
75
77
77
75
77
77
75
77
75
77
75
75
75
75
75
75
75
74
75
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
75
74
25
73
74
73
73
73
73
73
73
25
73
73
73
73
73
73
73
73
73
74
73
73
73
73
73
73
73
73
73
73
73
73
73
73
76
73
73
73
73
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73
73
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73
73
74
73
73
76
73
7 6
6
6
6
6
6
6
6
6
6
6
6
7
6
6
6
6
6
6
6
6
8
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
8
6
6
6
6
6
6
6
6
6
6
6
6
6
6
8
6
91
91
91
Preliminary
Page 58
AD1
SRMOD
NANDTEST
NTEST1
SRDTA
SRCLK
TEST
TEB AMC
SMC
LEGC
PME
PCLK
INTC
INTB
INTA
VBBRST
SMI
CRUN
SERR
REQ
STOP
TRDY
IRDY
FRAME
IDSEL DEVSEL
GNT PERR
PAR
CBE3
CBE2
CBE1
CBE0
AD31
AD30
AD29
AD28
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD25 AD26 AD27
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD15 AD16 AD17
AD7
AD6
AD0
AD2
AD5
AD4
VCCRST
AD3
VDD_PCI
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
USB 2.0 PCI Interface
ELECTRICAL_CONSTRAINT_SET
D3cold.
(NONE)
- _PPVIO_PCI (to 3.3V or 5V)
- _PCI_CLK33M_USB2 (33MHz PCI clock)
NOTE: This USB2 implementation supports
AD27 (Slot "G") - USB2 (0x1033/0x0035)
PCI Devices implemented on this page:
Signal aliases required by this page:
Power aliases required by this page:
BOM options provided by this page:
Page Notes
NET_SPACING_TYPE
DIFFERENTIAL_PAIR
(CHIP RESET)
(PCI RESET)
IPD
IPD
IPD
IPD
IPD
IPD
OD
OD
OD
OD
OD
OD
RP7702 & RP7703 required to
(PCI_AD<27>)
facilitate NAND-tree testing
0.1uF
402
CERM
10V
20%
2
1
C7703
5%
402
10K
2
1
R7716
5% 1/16W SM-LF
47
72
RP7703
47
5%
63
RP7702
5% 1/16W SM-LF
47
72
RP7702
47
5%
54
RP7703
5%
47
63
RP7703
47
5%
54
RP7702
402
22
5%
2
1
R7714
FBGA
CRITICAL
NEC_UPD720101_USB2
C8M4H3
C9
B8
G1
L8
N7
G3
P9
N9
M9
L6
M7
H1
C6
D9
H2
A8
J4
M8
M10
L7
F4
A7
B7
C7
B3
D6
F3
G2
N6
C3
F1
J3
M2
P7
L1
L2
M1
N3
M3
N4
A6
B6
P4
C5
A5
C4
B5
A4
B4
C1
C2
D2
D1
N5
D3
E1
E3
F2
J1
J2
K3
K1
L3
K2
P5
M5
U7700
402
5%
10K
2
1
R7713
5%
47
8
1
RP7703
4.7K
402
5%
2
1
R7715
77
102
04
051-6772
PCI_CBE_L<0>
=PPVIO_PCI_USB2
PCI_AD<7>
PCI_AD<5> PCI_AD<6>
PCI_AD<8> PCI_AD<9>
PCI_AD<2>
PCI_AD<1>
PCI_SLOTG_INT_L
PCI_AD<11>
NEC_PERR_L_PU
SYS_PME_L
=PCI_USB2_RESET_L
SYS_WARM_RESET_L
NEC_INTB_L
TP_NEC_SRMOD
TP_NEC_NANDTEST TP_NEC_SRCLK
TP_NEC_TEST
TP_NEC_NTEST1
NEC_LEGC_PD
NEC_CRUN_L_PD
=PCI_CLK33M_USB2
PCI_SLOTG_GNT_L
PCI_SLOTG_REQ_L
PCI_DEVSEL_L
PCI_STOP_L
PCI_TRDY_L
PCI_IRDY_L
PCI_FRAME_L
PCI_PAR
PCI_CBE_L<2>
PCI_CBE_L<1>
PCI_CBE_L<3>
PCI_AD<31>
PCI_AD<30>
PCI_AD<28> PCI_AD<29>
PCI_AD<26>
PCI_AD<25>
PCI_AD<24>
PCI_AD<23>
PCI_AD<21>
PCI_AD<20>
PCI_AD<19>
PCI_AD<18>
PCI_AD<16> PCI_AD<17>
PCI_AD<14>
PCI_AD<13>
PCI_AD<10>
PCI_AD<3> PCI_AD<4>
PCI_SLOTG_IDSEL
=PP3V3_PCI
NEC_VCCRST_L
NEC_VBBRST_L
NEC_INTA_L
NEC_INTC_L
PCI_AD<12>
TP_NEC_SRDATA
TP_NEC_TEB
TP_NEC_SMC
PCI_AD<0>
TP_NEC_AMC
NEC_SERR_L_PU
TP_NEC_SMI_L
NEC_PME_L
=PCI_CLK33M_USB2
CLOCKS
PCI_CLK_USB2
PCI_AD<27>
PCI_AD<22>
PCI_AD<15>
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
75
75
75
75
75
75
75
75
76
76
76
76
76
76
76
76
76
75
75
75
75
75
75
75
76
76
75
75
75
75
75
75
75
75
75
75
75
75
75
75
76
75
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
73
73
73
73
73
73
73
73
73
25
25
77
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
25
73
73
77
73
73
73
6
7
6
6
6
6
6
6
6
25
6
13
8
8
6
6
6
6
6
8
74
74
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
7
6
6
6
6
6
6
6
8
6
6
6
Preliminary
Page 59
UATA
UD_IDECHRDY_H
UD_IDEDMARQ_H
UD_IDEINTRQ_H
UD_IDEDA2_H
UD_IDEDA1_H
UD_IDEDA0_H
UD_IDEDD_15_H
UD_IDEDD_14_H
UD_IDEDD_0_H UD_IDEDD_1_H UD_IDEDD_2_H UD_IDEDD_3_H UD_IDEDD_4_H UD_IDEDD_5_H UD_IDEDD_6_H UD_IDEDD_7_H UD_IDEDD_8_H
UD_IDEDD_9_H UD_IDEDD_10_H UD_IDEDD_11_H UD_IDEDD_12_H UD_IDEDD_13_H
TXDN1
TXDP1
TXDN2
TXDP2
RXDN2
RXDP2
RXDN1
RXDP1
SATA_GND
SATA_VDD
SATA 0
SATA 1
(5 OF 8)
UD_IDECS1FX_L UD_IDECS3FX_L
UD_IDEDMACK_L
UD_IDERD_L UD_IDEWR_L
UD_IDERST_L
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
NET_PHYSICAL_TYPE
NET_SPACING_TYPE
DIFFERENTIAL_PAIR
Line To Line: 15 mils
Signal aliases required by this page:
UATA Termination
Shasta Disk
ELECTRICAL_CONSTRAINT_SET
Page Notes
Power aliases required by this page:
(NONE)
IORDY/HDMARDY*
DSTROBE aka:
HSTROBE aka: DIOR*
STOP aka: DIOW*
SATA_VDD x 5
Recommend 0.1uF cap placed close to Shasta.
AC coupling required for any SATA pair used.
(Caps provided by device page)
(NONE)
BOM options provided by this page:
- _PP1V2_PWRON_DISK
NOTE: Target differential impedance for
Net Spacing Type: SATA
Length Tolerance: 50 mils
SATA data pairs is 100 ohms.
Primary Max Sep: 9 mils inner
Primary Max Sep: 10 mils outer
Secondary Max Sep: 100 mils Secondary Length: 500 mils
0.1uF
402
CERM
20% 10V
2
1
C8002
0.1uF
20% 10V CERM 402
2
1
C8001
10V
20% CERM
402
0.1uF
2
1
C8000
0.1uF
402
CERM
10V
20%
2
1
C8004
10V
20% CERM
402
0.1uF
2
1
C8003
OMIT
BGA
V1.0
SHASTA
D3 E7
E4
C5
D7 E8
D4
G5
G6
E3
C2
C1
E2
H6
H7
D5
E5
F5
C3
F6
G7
J6
D6
C4
E6
B4
B3
F9
Y15
AA16
Y14
AB16
Y18
W15
T14
AB17
AB14
W16
T13
AA17
AA14
AB15
Y17
AA15
Y16
U2300
5%
33
54
RP8000
33
5%
63
RP8000
33
5% 1/16W SM-LF
72
RP8000
5%
33
54
RP8003
5% 1/16W
33
81
RP8001
33
5%
72
RP8001
33
5% SM-LF
63
RP8003
5%
33
81
RP8002
33
5% SM-LF
72
RP8002
33
5% SM-LF
81
RP8000
5%
33
54
RP8002
33
5%
72
RP8003
5%
33
63
RP8001
5% 1/16W
33
81
RP8004
5%
33
81
RP8003
33
5%
63
RP8002
5% 1/16W
33
72
RP8004
5% 1/16W
33
54
RP8004
5%
33
54
RP8001
33
5%
63
RP8004
5% 1/16W MF-LF
10K
402
2
1
R8005
33
5% 1/16W MF-LF
402
21
R8001
22
402
5%
21
R8002
5% 1/16W MF-LF
402
22
21
R8003
5% 1/16W MF-LF
402
22
21
R8004
402
5%
33
21
R8000
10280
04
051-6772
SATA_RXD_N2_C
SATA_RXD_P2_C
SATA_RXD_N1_C
SATA_RXD_P1_C
UATA_STOP_R
UATA_STOP
UATA_CS1_L_R
UATA_CS1_L
UATA_RESET_L
UATA_RESET_L_R
UATA_DA<1>
UATA_DD<15>
UATA_DD_R<15>
UATA_DD<13>
UATA_DD_R<13>
UATA_DD<11>
UATA_DD_R<11>
UATA_DD<9>
UATA_DD_R<9>
UATA_DD<7>
UATA_DD_R<7>
UATA_DD<5>
UATA_DD_R<5>
UATA_DD<3>
UATA_DD_R<3>
UATA_DD<1>
UATA_DD_R<1>
UATA_DMACK_L_R
UATA_DMACK_L
UATA_HSTROBE_R
UATA_HSTROBE
UATA_CS0_L_R
UATA_CS0_L
UATA_DA<2>
UATA_DA_R<2>
UATA_DA<0>
UATA_DA_R<0>
UATA_DD<14>
UATA_DD_R<14>
UATA_DD<12>
UATA_DD_R<12>
UATA_DD<10>
UATA_DD_R<10>
UATA_DD<8>
UATA_DD_R<8>
UATA_DD<6>
UATA_DD_R<6>
UATA_DD<4>
UATA_DD_R<4>
UATA_DD<2>
UATA_DD_R<2>
UATA_DD<0>
UATA_DD_R<0>
UATA_RESET_L_R
UATA_STOP_R
UATA_HSTROBE_R
UATA_DMACK_L_R
UATA_CS1_L_R
UATA_CS0_L_R
UATA_DA_R<0>
UATA_DD_R<15>
UATA_DD_R<13> UATA_DD_R<14>
UATA_DD_R<12>
UATA_DD_R<11>
UATA_DD_R<10>
UATA_DD_R<8>
UATA_DD_R<7>
UATA_DD_R<9>
UATA_DD_R<6>
UATA_DD_R<5>
UATA_DD_R<4>
UATA_DD_R<3>
UATA_DD_R<2>
UATA_DD_R<1>
UATA_DD_R<0>
UATA_INTRQ
UATA_DMARQ
UATA_DSTROBE
SATA_TXD_N2
SATA_TXD_P2
SATA_TXD_P1 SATA_TXD_N1
UATA_DA_R<2>
UATA_DA_R<1>
UATA_DA_R<1>
=PP1V2_PWRON_DISK_SB
SATA_RXD2_C
SATA_RXD_P2_C
SATA_RXD2
SATASATA
UATA_HSTROBE
UATA_HOST
UATA_DD
UATA_DD<6..0>
SATA_TXD2SATA_TXD2
SATA_TXD_P2
SATASATA
SATA_TXD_N1
SATA_TXD1SATA_TXD1
SATASATA
SATA_RXD1
SATA_RXD1_C
SATA_RXD_N1_C
SATASATA
UATA_DD<7>
UATA_DD7
UATA_STOP
UATA_HOST
UATA_DMACK_L
UATA_HOST_R
UATA_RESET_L
UATA_HOST_R
UATA_INTRQ
UATA_DEV_R
UATA_DSTROBE
UATA_DEV_R_C
SATA_TXD1 SATA_TXD1
SATA_TXD_P1
SATASATA
SATA_TXD2
SATA_TXD_N2
SATA_TXD2
SATASATA
UATA_DD<15..8>
UATA_DD
UATA_CS1_L
UATA_HOST
UATA_DMARQ
UATA_DEV_R
UATA_CS0_L
UATA_HOST
UATA_DA<2..0>
UATA_HOST
SATA_RXD2_C
SATA_RXD_N2_C
SATA_RXD2
SATASATA
SATA_RXD_P1_C
SATA_RXD1_C
SATA_RXD1
SATASATA
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
83
83
83
83
83
83
83
83
80
80
83
83
83
80
80
80
80
83
83
83
83
80
80
83
80
80
83
83
80
80
80
80
80
6
80
6
6
80
6
6
80
6
80
6
80
6
80
6
80
6
80
6
80
6
80
80
6
80
6
80
6
6
80
6
80
6
80
6
80
6
80
6
80
6
80
6
80
6
80
6
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
7
80
6
6
80
80
80
6
6
6
6
80
80
80
80
6
6
80
6
6
80
80
Preliminary
Page 60
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
516S0235
"UATA ACTIVE"
PER ATA7 SPEC
ATA-6 spec does not call out C8177
Sourced by drive
HD POWER
Terminate near connector
Per ATA Spec
Per ATA Spec
ATA-6 spec does not call out R8180 or R8182
NC NC
NC
NC NC
NC
Obsolete
DIFFERENTIAL_PAIR
ELECTRICAL_CONSTRAINT_SET
NET_SPACING_TYPE
NET_PHYSICAL_TYPE
DISK CONNECTORS
SATA CONNECTORS
518-0144
518-0157
Per ATA Spec
PATA CONNECTOR
10K
5%
402
NO STUFF
2
1
R8311
5%
1K
402
2
1
R8312
10K
402
5%
NO STUFF
2
1
R8313
5%
4.7K
2
1
R8314
5%
402
82
21
R8315
82
402
5%
21
R8316
5%
50V
CERM
402
10pF
NO STUFF
2
1
C8301
5%
6.2K
402
2
1
R8317
0
402
5%
2
1
R8318
402
5%
5.6K
2
1
R8319
402
5%
82
21
R8320
DEVELOPMENT
1% 1/16W MF-LF
402
499
2
1
R8321
402
10V
20%
CERM
SATA_TXD_P1
21
C8304
402
CERM
10V
20%
C8305
M-ST-TH
LD18077-S04
7
6
5
4
3
2
1
J8300
CERM
10V
402
20%
C8307
CERM
20% 10V
402
21
C8308
S05B-XA
M-RT-TH
CRITICAL
5
4
3
2
1
J8303
GREEN
DEVELOPMENT
2.0X1.25A
21
LED8301
CRITICAL
804RVS-050505R
F-ST-SM
9
87
6
50
5
49
4847
4645
4443
4241
40
4
39
3837
3635
3433
3231
30
3
29
2827
2625
2423
2221
20
2
19
1817
1615
1413
1211
10
1
52
51
J8301
04
051-6772
102
83
MAKE_BASE=TRUE
TP_SATA_TXD_P2
MAKE_BASE=TRUE
TP_SATA_RXD_P2_C
MAKE_BASE=TRUE
TP_SATA_TXD_N2
MAKE_BASE=TRUE
TP_SATA_RXD_N2_C
SATA_RXD_P2_C
SATA_RXD_N2_C
SATA_TXD_N2
SATA_TXD_P2
SATA_RXD_P1
=PP3V3_PATA
UATA_DD<6> UATA_DD<5> UATA_DD<4>
UATA_DD<1>
UATA_HSTROBE
SATA_TXD_N1_C
UATA_DD<2>
UATA_DD<11>
UATA_DD<8>
SATA_RXD_N1
SATA_TXD_P1_C
SATA_RXD_P1_C
=PP3V3_DISK
=PP12V_DISK
=PP5V_DISK
UATA_DASP_L
=PP5V_PATA
UATA_CS0_L
UATA_HOST
UATA_CS0_L
UATA_HOST
UATA_CS1_L
UATA_HOST_R
UATA_DMACK_L
UATA_HOST
UATA_HSTROBE
UATA_HOST_R
UATA_RESET_L
UATA_STOP
UATA_HOST
UATA_STOP
UATA_CSEL_PD
UATA_INTRQ_R
SATA_TXD_N1
SATA_RXD_N1_C
UATA_DSTROBE
UATA_DEV_R_C
UATA_DSTROBE
UATA_DD
UATA_DD<15..8>
UATA_DD
UATA_DD<6..0>
UATA_HOST
UATA_DA<2..0>
UATA_INTRQ
UATA_DMARQ
UATA_DEV_R
UATA_INTRQ
UATA_DEV_R
UATA_DMARQ
UATA_DSTROBE_R
UATA_DASP_L_DS
UATA_DD<15>
UATA_DD<14>
UATA_DD<13>
UATA_DD<12>
UATA_DD<10>
UATA_DD<9>UATA_DD<7>
UATA_DD7
UATA_DD<7>
UATA_DD<0>
UATA_DA<2>
UATA_DA<1> UATA_DA<0>
=PP5V_PATA
UATA_DD<3>
UATA_CS1_L
UATA_IOCS16_PU
UATA_DMACK_L
UATA_DMARQ_R
UATA_RESET_L
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83 83
83
83
83
83
83
83
83
83
83
80
80
80
80
80
80
80
80
7
7
83
80
80
80
80
80
80
80
80
83
83
80
80
80
83
83
83
83
80
80
80
80
80
80 80
80
80
80
80
80
83
80
80
80
80
80
80
80
80
80
80
80
80
80
7
6
6
6
6
6
6
6
6
80
7
6
6
6
7
6
6
6
6
6
6
6
6
6
6
80
80
80
80
6
6
6
80
80
80
80
6
6
6
6
6
6
6 6
6
6
6
6
6
7
6
6
6
6
6
6
Preliminary
Page 61
ETHERNET
(6 OF 8)
ETH_GTX_CLK_H
ETH_TX_ER_H
ETH_TX_EN_H
ETH_TXD_7_H
ETH_TXD_6_H
ETH_TXD_5_H
ETH_TXD_4_H
ETH_TXD_3_H
ETH_TXD_2_H
ETH_TXD_1_H
ETH_TXD_0_H
ETH_MDC_H
ETH_MDIO_H
ETH_TX_CLK_H ETH_RX_CLK_H
ETH_RXD_0_H ETH_RXD_1_H ETH_RXD_2_H
ETH_REFCLK_H
ETH_RXD_3_H ETH_RXD_4_H ETH_RXD_5_H ETH_RXD_6_H ETH_RXD_7_H
ETH_RX_DV_H ETH_RX_ER_H
ETH_CRS_H
ETH_COL_H
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
NET_PHYSICAL_TYPE DIFFERENTIAL_PAIR
NET_SPACING_TYPE
Page Notes
Signal aliases required by this page:
BOM options provided by this page: (NONE)
(NONE)
Power aliases required by this page: (NONE)
Shasta Ethernet
ELECTRICAL_CONSTRAINT_SET
Master: Link
OMIT
BGA
V1.0
SHASTA
F1
H3
H5
K6
J4
F2
G3
J5
H4
E1
G4
G2
K4
J3
G1
J2
K3
L4
J1
K2
L3
K1
M5
M6
M4
K5
L6
L5
U2300
0
5%
72
RP8400
0
5%
54
RP8400
0
5% 1/16W SM-LF
81
RP8400
0
5% 1/16W SM-LF
63
RP8400
0
5% 1/16W SM-LF
72
RP8401
0
5%
54
RP8401
0
5% 1/16W SM-LF
81
RP8401
5% 1/16W SM-LF
0
63
RP8401
0
402
5%
21
R8400
5%
0
402
21
R8401
0
5% 1/16W MF-LF
402
21
R8402
10284
04
051-6772
ENET_TXD_R<6>
ENET_TXD_R<3>
ENET_TXD_R<7>
ENET_TXD_R<4>
ENET_TX_EN_R
ENET_CLK125M_GBE_REF
ENET_TXD_R<5>
ENET_TX_ER_R
ENET_CLK125M_GTX_R
ENET_TXD_R<1>
ENET_TXD_R<0>
ENET_TXD_R<2>
ENET_COL
ENET_CRS
ENET_RX_ER
ENET_RX_DV
ENET_RXD<7>
ENET_RXD<6>
ENET_RXD<5>
ENET_RXD<4>
ENET_RXD<3>
ENET_RXD<2>
ENET_RXD<1>
ENET_RXD<0>
ENET_MDC
ENET_MDIO
ENET_TXD<7>
ENET_TXD<0>
ENET_TXD<1>
ENET_TXD<2>
ENET_TXD<4>
ENET_TXD<3>
ENET_TXD<6>
ENET_TX_EN
ENET_TXD<5>
ENET_CLK125M_GTX
ENET_TX_ER
ENET_RX_DV
ENET_RX_CTL
ENET_RX
ENET_RXD<7..0>
ENET_RX_CTL
ENET_RX_ER
ENET_TX_EN
ENET_TX_CTL
ENET_MDC
ENET_MDC
ENET_MDIO
ENET_MDIO
ENET_TX_CTL
ENET_TX_ER
ENET_CRS
ENET_RX_CTL
ENET_CLK125M_RX
ENET_CLK25M_TX
ENET_COL
ENET_RX_CTL
ENET_TX
ENET_TXD<7..0>
ENET_CLK125M_GTX_R
ENET_TX_CLK
ENET_CLK125M_GTX
P25MM
ENET_CLK125M_RX
ENET_RX_CLK
P25MM
ENET_RX_CLK
ENET_CLK25M_TX
P25MM
ENET_GBE_REF
ENET_CLK125M_GBE_REF
P25MM
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
Preliminary
Page 62
INTR*/ENERGYDET
GTXCLK
XTALGND BIASGND PLLGND1
CLK125
TXD[4]
TXD[3]
TXD[2]
TXD[1]
TXD[0]
MDIO
MDC
TX_ER
TX_EN
TXD[7]
TXD[6]
TXD[5]
LOWPWR
TXC
RXC
RXD[7]
RX_DV RX_ER
XTALO
XTALI
ER
HUB
MANMS
SPD0
F1000
FDX
RGMIIEN
EN_10B
PHYA[4]
PHYA[3]
PHYA[2]
PHYA[1]
PHYA[0]
TVCO
TEST[0] TEST[1]
COL CRS
RBC0
TRD+[0] TRD-[0]
TRD+[1] TRD-[1]
TRD+[2] TRD-[2]
TRD-[3]
TRD+[3]
RBC1
RXD[2] RXD[3] RXD[4] RXD[5] RXD[6]
RXD[1]
RXD[0]
SLAVE*/AN_EN
ACTLED*
XMTLED*
FDXLED*
LINK2*
LINK1*
QUALITY*/TXC_RXC_DELAY
RDAC1
PLLVDD1
BIASVDD1XTALVDD1
VESTA ENET
2 OF 3
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
NOTE: Target differential impedance for
Page Notes
Put crystal circuit close to PHY
CRYSTAL LOAD CAPACITANCE IS 20PF
1 - If RGMII Mode enabled, RXC clock and
MANMS - Manual Master/Slave Configuration Select Sets manual master/slave configuration enable bit
HUB - Repeater Select
(Internal Pull-down)
(Internal Pull-downs)
PHYA<4..0> - PHY Address Select
EN_10B - TBI Interface Select 1 - TBI/RTBI Mode
(Internal Pull-down)
1 1 1 Auto-negotiate advertise 1000BASE-T
- _PP1V2_ENETFW
See table below
0 0 0 Force 10BASE-T
(Internal Pull-up)
See table below (Internal Pull-down)
SPD0 - Speed Select
0 0 1 Force 100BASE-TX
1 0 0 Auto-negotiate advertise 10BASE-T 1 0 1 Auto-negotiate advertise 10/100BASE-TX 1 1 0 Auto-negotiate advertise 10/100/1000BASE-T
0 1 X Force 1000BASE-T (test use only)
0 - No clock delay (Internal Pull-down)
GTXCLK are delayed by 1.9 ns
TXC_RXC_DELAY
0 - GMII/RGMII Mode (Internal Pull-down)
1 - RGMII/RTBI Mode
(Internal Pull-up)
FDX - Full-Duplex Select
(Internal Pull-down)
ER - Edge Rate Select 1 - Rise time approx. 5 ns 0 - Rise time approx. 4 ns
AN_EN - Auto-Negotiation Select 1 - Auto-negotiation enabled 0 - Auto-negotiation disabled (Internal Pull-up)
Sets Hub/DTE bit and master/slave configuration value bit
ESR < 0.5 ohms
PLACE RESISTORS CLOSE TO PHY
Vesta Ethernet PHY
Power aliases required by this page:
- _PP3V3_ENET
- _PP2V5_ENETFW
Net Spacing Type: ENET
ENET data pairs is 100 ohms.
Signal aliases required by this page:
BOM options provided by this page:
Line To Line: 0.38 mms
Primary Max Sep: 5 mils Secondary Max Sep: 100 mils
(NONE)
(NONE)
NET_TYPE
PHYSICAL
DIFFERENTIAL_PAIR
SPACING
ELECTRICAL_CONSTRAINT_SET
Length Tolerance: 50 mils
Secondary Length: 500 mils
Vesta Config Straps:
RGMIIEN - RGMII Enable
0 - GMII/TBI Mode (Internal Pull-down)
Sets manual duplex mode bit
F1000 - Speed Select
AN_EN F1000 SPD0 Description
49.9
1% 1/16W MF-LF
402
2
1
R8616
1%
49.9
2
1
R8617
402
1%
49.9
2
1
R8614
402
1%
49.9
2
1
R8615
0
402
5% 1/16W MF-LF
21
R8602
CRITICAL
25.0000M
8X4.5MM-SM
21
Y8600
49.9
1%
402
2
1
R8620
1%
49.9
402
2
1
R8618
402
49.9
1%
2
1
R8621
1%
49.9
2
1
R8619
20%
0.01UF
16V CERM 402
2
1
C8620
402
0.01UF
CERM
16V
20%
2
1
C8622
0.01UF
402
CERM
16V
20%
2
1
C8623
0
402
5% 1/16W MF-LF
21
R8601
0
402
5%
21
R8600
402
1%
1.24K
2
1
R8613
5%
0
402
2
1
R8609
0.01UF
20% 16V CERM 402
2
1
C8621
402
5%
1.5K
2
1
R8650
0.001uF
50V
20%
CERM
402
2
1
C8604
SM
FERR-EMI-600-OHM
21
L8602
1206-1
10uF
CERM
20%
6.3V
2
1
C8605
CERM 402
20%
0.1uF
10V
2
1
C8601
SM
FERR-EMI-600-OHM
21
L8600
SM
FERR-EMI-600-OHM
21
L8601
402
50V CERM
0.001uF
20%
2
1
C8603
805
10%
10UF
6.3V X5R
2
1
C8602
OMIT
BCM5462
FBGA-200
N1
P2
N2
P3
B12
C4
B4
A5
B5
C5
E6
D6
C7
C6
B6
A6
N3
R10
R11
R9
R8
R6
R7
R5
R4
M5
M4
K5
C10
C2
D2
D3
D4
D5
E3
E4
E5
F5
F4
C1
B8
R1
B3
A3
A8
M1
M2
L1
L2
L3
L4
L5
G2
G1
D9
H5
B11
A10
D10
A9
A4
B10
C8 K4
H3
K3
G3
F3
D1
P1
R2
A11
U8600
5%
50V
CERM
402
33pF
2
1
C8618
5%
50V
CERM
402
33pF
2
1
C8619
04
051-6772
10286
VOLTAGE=1.2V MIN_LINE_WIDTH=0.5 mm MIN_NECK_WIDTH=0.25 mm
PP1V2_VESTA_PLLVDD1
ENET_MDI
ENET_MDI0
ENETENET
ENET_MDI_N<0>
ENET_CLK125M_GBE_REF_R
P25MM
ENET_MDI
ENET_MDI0
ENETENET
ENET_MDI_P<0>
ENET_MDI
ENET_MDI2
ENETENET
ENET_MDI_N<2>
ENET_MDI
ENET_MDI3
ENETENET
ENET_MDI_P<3>
VESTA_CLK25M_XTALO_R
P25MM
VESTA_CLK25M_XTALO
P25MM
ENET_MDI
ENET_MDI3
ENETENET
ENET_MDI_N<3>
ENET_MDI
ENET_MDI1
ENETENET
ENET_MDI_N<1>
ENET_MDI
ENET_MDI1
ENETENET
ENET_MDI_P<1>
ENET_CLK25M_TX_R
P25MM
ENET_CLK125M_RX_R
P25MM
VESTA_CLK25M_XTAL
VESTA_CLK25M_XTALI
P25MM
ENET_MDI
ENET_MDI2
ENETENET
ENET_MDI_P<2>
ENET_RXD<2>
TP_VESTA_RBC1
TP_VESTA_LINK2_L
MIN_NECK_WIDTH=0.25 mm
VOLTAGE=2.5V MIN_LINE_WIDTH=0.5 mm
PP2V5_VESTA_XTALVDD1
ENET_CLK125M_GBE_REF_R
=PP3V3_ENET
ENET_MDI3ENET_MDI2ENET_MDI1ENET_MDI0
ENET_MDIO
VESTA_CLK25M_XTALO
VESTA_CLK25M_XTALI
ENET_CLK25M_TX
ENET_CLK125M_GBE_REF
ENET_CLK125M_RX
VESTA_ENET_LOWPWR
VESTA_RDAC1_PD
TP_VESTA_ACTLED_L
TP_VESTA_XMTLED_L
TP_VESTA_FDXLED_L
TP_VESTA_LINK1_L
ENET_RXD<6>
ENET_RXD<5>
ENET_RXD<4>
ENET_RXD<1>
ENET_RXD<3>
ENET_RXD<0>
TP_VESTA_RBC0
TP_VESTA_TEST<0> TP_VESTA_TEST<1>
TP_VESTA_F1000
TP_VESTA_RGMIIEN TP_VESTA_FDX
TP_VESTA_EN_10B
TP_VESTA_PHYA<3>
TP_VESTA_PHYA<2>
TP_VESTA_PHYA<1>
TP_VESTA_PHYA<0>
VESTA_CLK25M_XTALO_R
ENET_RX_ER
ENET_RX_DV
ENET_RXD<7>
ENET_CLK125M_RX_R
ENET_TX_ER
ENET_TX_EN
ENET_TXD<7>
ENET_TXD<6>
ENET_TXD<5>
ENET_TXD<3>
ENET_TXD<2>
ENET_TXD<4>
ENET_TXD<0> ENET_TXD<1>
ENET_CLK125M_GTX
ENET_ENERGYDET
TP_VESTA_AN_EN TP_VESTA_TXC_RXC_DELAY
ENET_CLK25M_TX_R
=PP1V2_ENETFW
TP_VESTA_PHYA<4>
ENET_MDC
=PP2V5_ENETFW
TP_VESTA_ER
TP_VESTA_TVCO
TP_VESTA_HUB
TP_VESTA_MANMS
TP_VESTA_SPD0
ENET_MDI_N<3>
ENET_MDI_P<3>
ENET_MDI_N<2>
ENET_MDI_P<2>
ENET_MDI_N<1>
ENET_MDI_P<1>
ENET_MDI_N<0>
ENET_MDI_P<0>
ENET_CRS
ENET_COL
MIN_NECK_WIDTH=0.25 mm
VOLTAGE=2.5V
PP2V5_VESTA_BIASVDD1
MIN_LINE_WIDTH=0.5 mm
87
87
87
87
87
87
87
87
87
89
89
87
87
87
87
87
87
87
87
86
86
86
86
86
86
86
86
86
86
86
86
86
86
84
86
7
84
86
86
84
84
84
12
87
87
84
84
84
84
84
84
86
84
84
84
86
84
84
84
84
84
84
84
84
84
84
84
25
86
7
84
12
86
86
86
86
86
86
86
86
84
84
Preliminary
Page 63
G
D
S
G
D
S
G
D
S
G
D
S
1CT:1CT
1CT:1CT
MDI_3-
ENET_CTAP
MDI_0+
75 OHM
MDI_0-
MDI_1­MDI_2+ MDI_2-
75 OHM
75 OHM
1CT:1CT
75 OHM
RJ45
CABLE SIDE
SECONDARY
J4
J8
J7
J6
J5
J1 J2 J3
1CT:1CT
RJ45
CHIP SIDE
ENET_CTAP
MDI_1+
MDI_3+
PRIMARY
SHIELD 1000PF, 2000V
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
ETHERNET CONNECTOR
PUT DEVELOPMENT LEDS ON TOP SIDE OF BOARD
(514-0222)
SM
FERR-EMI-600-OHM
21
L8700
0.1UF
402
CERM
10V
20%
2
1
C8700
402
CERM
10V
20%
0.1UF
2
1
C8701
402
CERM
10V
20%
0.1UF
2
1
C8702
0.001UF
20% 50V CERM 603
2
1
C8705
0.1UF
20% 10V CERM 402
2
1
C8703
603
CERM
50V
20%
0.001UF
2
1
C8704
5% 1/10W MF-LF 603
330
DEVELOPMENT
2
1
R8701
5% 1/10W MF-LF 603
330
DEVELOPMENT
2
1
R8703
DEVELOPMENT
10K
1/16W
5%
402
MF-LF
2
1
R8700
2N7002DW
SOT-363
DEVELOPMENT
4
5
3
Q8700
2N7002DW
SOT-363
DEVELOPMENT
1
2
6
Q8700
2N7002DW
SOT-363
DEVELOPMENT
4
5
3
Q8701
DEVELOPMENT
10K
1/16W MF-LF
5%
402
2
1
R8702
2N7002DW
DEVELOPMENT
SOT-363
1
2
6
Q8701
CRITICAL
F-ST-TH
MJRR0156
9
8
7
6
5
4
3
2
10
1
14
13
12
11
J8700
GREEN
2.0X1.25A
DEVELOPMENT
2
1
LED8700
GREEN
2.0X1.25A
DEVELOPMENT
2
1
LED8701
102
051-6772
04
87
LED8701_P
LED8701_N
LED8700_P
LED8700_N
GBIT_2_5V
GND_CHASSIS_RJ45
ENET_MDI_P<2> ENET_MDI_N<2>
ENET_MDI_P<3> ENET_MDI_N<3>
ENET_MDI_N<1>
ENET_MDI_P<1>
ENET_MDI_N<0>
ENET_MDI_P<0>
=PP2V5_ENET
VESTA_XMTLED
VESTA_ACTLED
=PP3V3_ENET
=PP3V3_ENET
VESTA_ACTLED_L MAKE_BASE=TRUE
TP_VESTA_ACTLED_L
TP_VESTA_XMTLED_L
VESTA_XMTLED_L MAKE_BASE=TRUE
87
87
86
86
7
86
86
86
86
86
86
86
86
7
7
7
86
86
Preliminary
Page 64
PHY_LINKON_LPHY_PINT_L
FWVDDP
PHY_LREQ_H
PHY_LPS_H
PHY_CTL_1_H
PHY_CTL_0_H
PHY_DATA_7_H
PHY_DATA_6_H
PHY_DATA_0_H PHY_DATA_1_H PHY_DATA_2_H PHY_DATA_3_H PHY_DATA_4_H PHY_DATA_5_H
(7 OF 8)
PHY_LCLK_HPHY_SCLK_H
FIREWIRE
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
NET_SPACING_TYPE
DIFFERENTIAL_PAIRNET_PHYSICAL_TYPE
Page Notes
Shasta FireWire
ELECTRICAL_CONSTRAINT_SET
BOM options provided by this page:
- _PP2V5_PWRON_SB
(NONE)
(NONE)
Signal aliases required by this page:
Power aliases required by this page:
Master: Link
5%
22
402
21
R8800
0.1uF
10V CERM 402
20%
2
1
C8802
20% 10V CERM 402
0.1uF
2
1
C8801
0.1uF
402
CERM
10V
20%
2
1
C8800
OMIT
BGA
V1.0
SHASTA
P2
P3
P1
P6
N7
R1
L2
M3
L1
N6
M7
N1
P5
N4
N3
N2
A4J7N5
U2300
051-6772
04
88 102
FW_LINKON
FW_PINT
=PP2V5_PWRON_SB
FW_DATA<0> FW_DATA<1> FW_DATA<2> FW_DATA<3> FW_DATA<4> FW_DATA<5>
FW_DATA<7>
FW_DATA<6>
FW_CTL<1>
FW_CTL<0>
FW_LPS FW_LREQ
FW_CLK98M_LCLK_R
FW_CLK98M_PCLK FW_CLK98M_LCLK
FW_PINT
FW_PINT
FW_PCLK
FW_CLK98M_PCLK
15 MIL SPACING
FW_LREQ
FW_LREQ
FW_LPS
FW_LPS
FW_CTL<1..0>
FW
FW_CLK98M_LCLK_R
15 MIL SPACING
FW_LCLK
FW_CLK98M_LCLK
15 MIL SPACING
FW
FW_DATA<7..0>
74 25
89
23
89
89
89
89
89
89
89
89
89
89
89
89
89 89
89
89
89
89
89
89
89
89 88
7
88
88
88
88
88
88
88
88
88
88
88
88
88
88 88
88
88
88
88
88
88
88
88
Preliminary
Page 65
FAVDDLFAVDDMFAVDDH
TDBL[1] TDBL[2]
PLI_PCLK
TDBL[0]
TPBIAS[0]
TPAP[0] TPAN[0] TPBP[0] TPBN[0]
TPBIAS[1]
TPAP[1] TPAN[1] TPBP[1] TPBN[1]
TPAP[2] TPAN[2] TPBP[2] TPBN[2]
TPBIAS[2]
PLI_INT
PLI_LINK
SDC SDA
RDAC2
XTALVDD2
BIASVDD2
PLLVDD2
BIASGND PLLGND2
TEST_1394[0] TEST_1394[1] TVCO_24
XTALI_24 XTALO_24
CPS
ESDET1
ESDET0
ESDET2
PLI_LCLK
PLI_DATA[7]
PLI_DATA[0] PLI_DATA[1] PLI_DATA[2] PLI_DATA[3] PLI_DATA[4] PLI_DATA[5] PLI_DATA[6]
PLI_CTL[0]
PWR_CLASS
PLI_CTL[1]
PLI_LPS PLI_LREQ
LPWR_1394 DS_ONLY_EN0
3 OF 3
VESTA FW
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
CRYSTAL LOAD CAPACITANCE IS 12PF
- _PP3V3_ENETFW
Signal aliases required by this page:
If stuffed, adds external pull-up to
See straps table for more information.
counter internal pull-up in Vesta.
(Int PU)
Internal Pull-Up
(Int PU)
(Int PU)
(I2C_VESTA_SCL)
(I2C_VESTA_SDA)
Vesta Config Straps:
PWR_CLASS - FireWire Power Class 1 - Sets Power Class to 0x4 0 - Sets Power Class to 0x0 (Internal Pull-up)
DS_ONLY_EN0 - Port 0 Data/Strobe 1 - Port 0 Data/Strobe mode only
(Internal Pull-down)
0 - Port 0 Bilingual mode
Page Notes
- _PP1V2_ENETFW
- _PP2V5_ENETFW
Power aliases required by this page:
- _PPFW_PHY
- _PP3V3_FW
Internal Pull-Down
Vesta FireWire PHY
counter internal pull-down in Vesta.
BOM options provided by this page:
(NONE)
- VESTA_DS_ONLY_EN0
Net Spacing Type: FW
Line To Line: 0.38 mms
Secondary Max Sep: 100 mils
Primary Max Sep: 7.5 mils
Length Tolerance: 100 mils
See straps table for more information.
- VESTA_PWR_CLASS_0 If stuffed, adds external pull-down to
Put crystal circuit close to PHY
FW data pairs is 110 ohms.
NOTE: Target differential impedance for
Secondary Length: 500 mils
DIFFERENTIAL_PAIR
PHYSICAL
NET_TYPE
SPACING
ELECTRICAL_CONSTRAINT_SET
(PROVIDED BY LINK PAGE)
ESR < 0.5 ohms
5%
22
81
RP8900
22
5%
63
RP8900
5% 1/16W SM-LF
22
72
RP8900
22
5%
54
RP8901
5% 1/16W SM-LF
22
81
RP8901
5% 1/16W SM-LF
22
54
RP8900
5%
22
72
RP8901
22
5%
63
RP8901
22
402
5%
21
R8900
22
402
5%
21
R8901
22
402
5%
21
R8902
402
1% 1/16W MF-LF
2.0K
2
1
R8909
5%
10K
VESTA_DS_ONLY_EN0
402
2
1
R8911
VESTA_PWR_CLASS_0
10K
402
5%
2
1
R8912
402
CERM
20% 10V
0.1uF
2
1
C8913
0.1uF
402
CERM
10V
20%
2
1
C8914
402
0.1uF
CERM
10V
20%
2
1
C8915
20% 10V CERM 402
0.1uF
2
1
C8911
0.1uF
402
CERM
10V
20%
2
1
C8909
CERM
0.1uF
402
10V
20%
2
1
C8908
10V
0.1uF
402
20% CERM
2
1
C8907
0.1uF
20% 10V CERM 402
2
1
C8906
0.1uF
CERM
20% 10V
402
2
1
C8903
FERR-EMI-600-OHM
SM
21
L8901
0.001uF
50V
20% CERM
402
2
1
C8901
1206-1
CERM
20%
10uF
6.3V
2
1
C8900
FERR-EMI-600-OHM
SM
21
L8900
0.001uF
402
CERM
50V
20%
2
1
C8905
X5R
10%
10UF
6.3V 805
2
1
C8904
FERR-EMI-600-OHM
SM
21
L8902
0
5% MF-LF
402
2
1
R8921
CRITICAL
8X4.5MM-SM
24.576M
21
Y8920
1%
1K
402
2
1
R8903
5%
390K
402
2
1
R8914
OMIT
FBGA-200
BCM5462
N15
P13
P14
N13
H15
K15
M15
H14
K14
M14
H13
J13
L13
G15
J15
L15
G14
J14
L14
J4
J5
B14
B13
A14
H1 H2
R15
A12
P15
N14
E15
D12
D11
D14
D15
D13
G11
G12
G13
F13
F12
F11
E11
E12
E13
E14
J3
M12
M11
L12
L11
N12
N11
M10
L10
K13
K12
K11
C13
C12
C11
A13
R13
R14
P12
U8600
10K
402
5%
2
1
R8915
402
5% 1/16W
10K
2
1
R8916
SM
FERR-EMI-600-OHM
21
L8906
SM
FERR-EMI-600-OHM
21
L8909
FERR-EMI-600-OHM
SM
21
L8913
10%
6.3V
10UF
X5R 805
2
1
C8917
6.3V
10UF
10%
805
X5R
2
1
C8918
6.3V 805
10UF
10% X5R
2
1
C8919
22pF
402
5%
CERM
50V
2
1
C8920
50V 402
CERM
5%
22pF
2
1
C8921
402
10K
1%
2
1
R8904
10K
VESTA_BILINGUAL_EN12
5%
402
2
1
R8931
10K
VESTA_PORT1_DISABLE
5% 1/16W MF-LF
402
2
1
R8933
10K
VESTA_PORT2_DISABLE
5% 1/16W MF-LF
402
2
1
R8935
I402
I403
I404
I405
I406
I407 I408
I409
I410
I411
I412
I413
I414
I415
I416
I417
051-6772
04
89 102
=PP3V3_FW
MIN_LINE_WIDTH=0.5 mm
PP1V2_VESTA_PLLVDD2
MIN_NECK_WIDTH=0.25 mm
VOLTAGE=1.2V
MIN_LINE_WIDTH=0.5 mm MIN_NECK_WIDTH=0.25 mm
VOLTAGE=2.5V
PP2V5_VESTA_FAVDDM
PP2V5_VESTA_BIASVDD2
MIN_LINE_WIDTH=0.5 mm MIN_NECK_WIDTH=0.25 mm
VOLTAGE=2.5V
VOLTAGE=3.3V MIN_LINE_WIDTH=0.5 mm MIN_NECK_WIDTH=0.25 mm
PP3V3_VESTA_FAVDDH
VESTA_BILINGUAL_EN12_L VESTA_PORT1_DISABLE_L VESTA_PORT2_DISABLE_L
VESTA_CLK24M_XTALO
FW_TPA_N<2>
FW_TPA2
FW
FW_TPA3
FW_TPA_N<2>
FW
FW_TPA_P<2>
FW_TPA2
FW
FW_TPA3
FW_TPA_P<2>
FW
MIN_NECK_WIDTH=0.25 mm
MIN_LINE_WIDTH=0.25 mm
FW_TPBIAS<2>
FW_CLK98M_PCLK_R
P38MM
CLOCKS
FW_TPA0FW_TPA1
FW_TPA_N<0>
FWFW
VESTA_CLK24M_XTALO
P38MM
CRYSTAL
VESTA_CLK24M_XTALO_R
P38MM
CRYSTAL
VESTA_CLK24M_XTAL
VESTA_CLK24M_XTALI
P38MM
CRYSTAL
FW_TPB2
FW
FW_TPB3
FW_TPB_N<2>
FW
FW_TPB2
FW
FW_TPB3
FW_TPB_P<2>
FW
FW_TPA1
FW
FW_TPA2
FW_TPA_N<1>
FW
FW_TPA1
FW
FW_TPA2
FW_TPA_P<1>
FW
FW_TPB1
FW
FW_TPB2
FW_TPB_P<1>
FW
FW_TPB1
FW
FW_TPB2
FW_TPB_N<1>
FW
FW_TPB0
FW
FW_TPB1
FW_TPB_N<0>
FW
FW_TPB0
FW
FW_TPB1
FW_TPB_P<0>
FW
FW_TPA1 FW_TPA0
FW_TPA_P<0>
FWFW
=PP2V5_ENETFW
FW_CTL_R<0>
FW_LREQ
FW_LPS
I2C_VESTA_SCL
VESTA_CLK24M_XTALO_R
VESTA_CLK24M_XTALI
=PPFW_PHY
=PP3V3_FW
FW_CLK98M_LCLK
MIN_NECK_WIDTH=0.25 mm
MIN_LINE_WIDTH=0.25 mm
FW_TPBIAS<1>
MIN_NECK_WIDTH=0.25 mm
MIN_LINE_WIDTH=0.25 mm
FW_TPBIAS<0>
FW_TPA_P<1>
FW_DATA<3>
FW_CTL<0>
FW_DATA<6>
FW_DATA<4>
FW_DATA<2>
FW_DATA<0>
FW_CTL<1>
FW_DATA<7>
FW_DATA<5>
FW_DATA<1>
FW_CLK98M_PCLK
FW_PINT
FW_TPA_P<0>
FW_TPB_N<0>
TP_VESTA_TDBL<0>
TP_VESTA_TDBL<2>
=PP3V3_ENETFW
=PP2V5_ENETFW
FW_TPB_N<2>
FW_TPA_N<1>
FW_DATA_R<0>
FW_LOWPWR
VESTA_RDAC2_PD
=PP1V2_ENETFW
=PP1V2_ENETFW
MIN_NECK_WIDTH=0.25 mm
VOLTAGE=2.5V
PP2V5_VESTA_XTALVDD2
MIN_LINE_WIDTH=0.5 mm
TP_VESTA_TDBL<1>
FW_TPB_P<2>
MIN_NECK_WIDTH=0.25 mm
VOLTAGE=1.2V MIN_LINE_WIDTH=0.5 mm
PP1V2_VESTA_FAVDDL
FW_TPB_P<1>
FW_CLK98M_PCLK_R
FW_LINKON
FW_TPA_N<0>
FW_TPB_N<1>
FW_TPB_P<0>
I2C_VESTA_SDA
FW_DATA_R<1> FW_DATA_R<2>
VESTA_PORT2_DISABLE_L
VESTA_PORT1_DISABLE_L
VESTA_BILINGUAL_EN12_L
FW_CPS
TP_VESTA_TVCO_24
TP_VESTA_TEST_1394<1>
TP_VESTA_TEST_1394<0>
VESTA_PWR_CLASS
VESTA_DS_ONLY_EN0
FW_DATA_R<5>
FW_DATA_R<4>
FW_DATA_R<3>
FW_CTL_R<1>
FW_DATA_R<7>
FW_DATA_R<6>
90
89
90
89
89
89
89
90
90
90
90
90
90
90
90
90
90
90
90
90
90
86
89
90
90
90
86
90
90
86
86
90
90
90
90
90
7
89
89
89
89
89
89
89
89
90
89
89
89
89
89
89
89
89
89
89
89
89
89
89
12
88
88
89
89
90
7
88
90
90
89
88
88
88
88
88
88
88
88
88
88
88
88
89
89
7
12
89
89
25
7
7
89
89
89
88
89
89
89
89
89
89
90
Preliminary
Page 66
SYM_VER-1
SYM_VER-1
TPI
VGND
VP
TPI#
TPO#
TPO
TPI
VGND
VP
TPI#
TPO#
TPO
SYM_VER-1
SYM_VER-1
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS ALIAS ALIAS ALIAS
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
SPACING
NET_TYPE
PHYSICAL
DIFFERENTIAL_PAIR
ESD Rail
3rd TPA/TPB pair unused
FIREWIRE CONNECTORS
"Snapback" & "Late VG" Protection
8 WATTS MAX
24 VOLTS
"Snapback" & "Late VG" Protection
1394A
514-0202
514-0202
(TPB-)
(TPB+)
(TPA-)
(TPA+)
1394A
(TPA+)
(TPA-)
(TPB+)
(TPB-)
(PPFW_PORT1_VP)
PORT 1
(PPFW_PORT0_VP)
PORT 0
Termination
Place close to FireWire PHY
MURS320XXG
SMC
21
D9000
20%
0.1UF
CERM
50V
805
2
1
C9009
FERR-160-OHM
1206
21
L9001
PP24V_RUN
20%
1.3
1W FF
2512
21
R9056
2512
FF
1W
20%
1.3
CRITICAL
21
R9002
20% 16V
CERM
402
0.01uF
2
1
C9026
402
CERM
16V
20%
0.01uF
2
1
C9025
20% 50V
CERM
402
0.001uF
2
1
C9021
0.001uF
402
CERM
50V
20%
2
1
C9020
805
1/8W
5%
0
21
R9020
SOT-363
BAV99DW-X-F
3
5
4
DP9020
BAV99DW-X-F
SOT-363
3
5
4
DP9021
50V
CERM
402
0.001uF
20%
2
1
C9023
BAV99DW-X-F
SOT-363
6
2
1
DP9020
BAV99DW-X-F
SOT-363
6
2
1
DP9021
402
50V
0.001uF
CERM
20%
2
1
C9022
SM
165-OHM
4
32
1
FL9020
165-OHM
SM
4
32
1
FL9021
CRITICAL
F-ST-TH
FWS22
1
2
5
6
3
4
987
10
J9001
FWS22
F-ST-TH
CRITICAL
1
2
5
6
3
4
987
10
J9000
0.01uF
402
CERM
16V
20%
2
1
C9016
0.01uF
20% 16V CERM 402
2
1
C9015
165-OHM
SM
4
32
1
FL9010
SM
165-OHM
4
32
1
FL9011
0
5%
1/8W
805
21
R9010
BAV99DW-X-F
SOT-363
3
5
4
DP9010
0.001uF
402
CERM
50V
20%
2
1
C9011
SOT-363
BAV99DW-X-F
3
5
4
DP9011
20%
402
CERM
50V
0.001uF
2
1
C9013
SOT-363
BAV99DW-X-F
6
2
1
DP9010
20% 50V
CERM
402
0.001uF
2
1
C9010
SOT-363
BAV99DW-X-F
6
2
1
DP9011
402
50V
20%
CERM
0.001uF
2
1
C9012
0.5AMP
SM
21
F9002
1.5AMP-33V
SM
21
F9000
10%
6.3V 402
CERM
1uF
2
1
C9060
402
1% 1/16W
56.2
2
1
R9061
1%
402
56.2
2
1
R9060
10%
1uF
402
CERM
6.3V
2
1
C9050
402
1%
56.2
2
1
R9051
402
1%
56.2
2
1
R9050
1% 1/16W MF-LF 402
56.2
2
1
R9063
56.2
1%
402
2
1
R9062
1% 1/16W
402
4.99K
2
1
R9064
5%
25V
CERM
402
270pF
2
1
C9064
402
5%
1K
2
1
R9070
402
1%
56.2
2
1
R9053
402
1%
56.2
2
1
R9052
1%
4.99K
402
2
1
R9054
270pF
402
CERM
5%
25V
2
1
C9054
400-OHM-EMI
SM-1
21
L9090
402
665
1%
21
R9090
BZX84C2V7-X-F
31
D9090
I400
I401
I402
I403
I404
I405
I406
I407
102
90
04
051-6772
FW_TPA_P<2>
NC_FW_TPA_P2
MAKE_BASE=TRUE NO_TEST=YES
NO_TEST=YES
MAKE_BASE=TRUE
FW_TPB2_PD
FW_TPB_N<2>
FW_TPB_P<2>
FW_TPA_N<2>
NO_TEST=YES
MAKE_BASE=TRUE
NC_FW_TPA_N2
FW_TPBIAS<2>
MAKE_BASE=TRUE
NC_FW_TPBIAS2
NO_TEST=YES
FW_TPBIAS<1>
FW_PORT0_TPB_P
FW_PORT0_TPA_P_FL
FW_PORT0_TPA_N_FL
FW_PORT0_TPB_P_FL
FW_PORT1_TPA_P_FL
FW_PORT1_TPA_N_FL
FW_PORT1_TPB_P_FL
MIN_LINE_WIDTH=0.6 mm
VOLTAGE=33V MIN_NECK_WIDTH=0.25 mm
PPFW_PORT0_VP
MIN_NECK_WIDTH=0.25 mm
MIN_LINE_WIDTH=0.6 mm
VOLTAGE=0V
GND_FW_PORT0_VG
GND_CHASSIS_FIREWIRE
FW_PORT0_TPA_P
FW_PORT0_TPB_N
PPFW_PORT1_VP
VOLTAGE=0V MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.25 mm
GND_FW_PORT1_VG
GND_CHASSIS_FIREWIRE
FW_PORT1_TPA_P
FW_PORT1_TPB_N
FW_PORT0_TPA_N
PP3V3_FW_ESD
FW_PORT1_TPB_P
MIN_NECK_WIDTH=0.25 mm
VOLTAGE=33V MIN_LINE_WIDTH=0.6 mm
PPFW_PORT1_VP
FW_VP
VOLTAGE=24V
MIN_LINE_WIDTH=35MIL
MIN_NECK_WIDTH=10MIL
VOLTAGE=24V
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=35MIL
PP24V_FW_R
=PPFW_PHY
FW_PORT0_TPB_N_FL
FW_PORT1_TPB_N_FL
FW_PORT1_TPA_N
PP3V3_FW_ESD
=PP3V3_FW
FW_TPBIAS<0>
FW_TPA_P<1> FW_TPA_N<1> FW_TPB_P<1> FW_TPB_N<1>
FW_TPA_C<1>
FW_TPB_P<0>
FW_TPA_N<0>
FW_TPB_N<0>
FW_TPA_C<0>
MIN_NECK_WIDTH=0.25 mm
MIN_LINE_WIDTH=0.38 mm
PP3V3_FW_ESD
VOLTAGE=3.3V
FW_PORT0_TPA_P
MAKE_BASE=TRUE
FW_PORT1_TPA_P
MAKE_BASE=TRUE
FW_PORT0_TPB_N
MAKE_BASE=TRUE
FW_PORT0_TPA_N
MAKE_BASE=TRUE
FW_PORT0_TPB_P
MAKE_BASE=TRUE
FW_PORT1_TPA_N
MAKE_BASE=TRUE
FW_PORT1_TPB_P
MAKE_BASE=TRUE
FW_PORT1_TPB_N
MAKE_BASE=TRUE
PP3V3_FW_ESD_F
MIN_LINE_WIDTH=0.38 mm MIN_NECK_WIDTH=0.25 mm
VOLTAGE=3.3V
FW_TPA0_FL
FWFW
FW_PORT0_TPA_P_FL
FW_TPA0_FL
FWFW
FW_PORT0_TPA_N_FL
FW_PORT1_TPA_N_FL
FW_TPA1_FL
FWFW
FW_TPB0_FL
FWFW
FW_PORT0_TPB_P_FL
FW_TPB0_FL
FWFW
FW_PORT0_TPB_N_FL
FW_PORT1_TPA_P_FL
FW_TPA1_FL
FWFW
FW_PORT1_TPB_P_FL
FW_TPB1_FL
FWFW
FW_PORT1_TPB_N_FL
FW_TPB1_FL
FWFW
FW_TPA_P<0>
MAKE_BASE=TRUE
VOLTAGE=24V
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=35MIL
PP24V_FW
PP24V_FW_D
MIN_LINE_WIDTH=35MIL MIN_NECK_WIDTH=10MIL VOLTAGE=24V
90
90
89
89
89
89
89
89
89
90
90
90
90
90
90
90
7
90
90
90
7
90
90
90
90
90
90
6
89
90
90
90
90
7
89
89
89
89
89
89
89
89
90
90
90
90
90
90
90
90
90
90
90
90
90
90
90
90
90
89
89
Preliminary
Page 67
DM1 DP1
DM2 DP2
RSDM2
RSDP1
RSDM1
RSDP2
AVDD
DM3 DP3
RSDM3
RSDP3
PPON1
OCI2
OCI1
OCI3 OCI4 OCI5
PPON2
PPON5
PPON4
PPON3
RSDM4
DM4 DP4
DM5 DP5
RSDP4
RSDM5
RSDP5
RREF
AVSS(R)
AVSS
NC1 NC2
XT1/SCLK
XT2
VDD
VSS
(8 OF 8)
NC0 NC1
NC3
NC2
NC4 NC5 NC6 NC7 NC8 NC9
NC10
NC12
NC11
NC14
NC13
NC15
NC19
NC18
NC17
NC16
NC20
NC22 NC23 NC24
NC21
NC25
NC29
NC28
NC27
NC26
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
MASTER: SEEDY
USB Host Interfaces
Signal aliases required by this page:
(USB2_OC<3>)
(USB2_OC<1>)
Net Spacing Type: USB2
Page Notes
(NONE)
Power aliases required by this page:
- _PP3V3_PWRON_USB
BOM options provided by this page: (NONE)
Primary Max Sep: 7.5 mils
Line To Line: 19.5 mils Length Tolerance: 50 mils
Secondary Max Sep: 100 mils
(USB2_OC<2>)
ELECTRICAL_CONSTRAINT_SET
(USB2_P<0>)
(USB2_N<0>)
(USB2_N<1>) (USB2_P<1>)
(USB2_N<2>) (USB2_P<2>)
(USB2_P<3>)
(USB2_N<3>)
(USB2_P<4>)
(USB2_N<4>)
Tie to GND at ball N11
(USB2_OC<0>)
(USB2_OC<4>)
DIFFERENTIAL_PAIR
NET_SPACING_TYPE
NET_PHYSICAL_TYPE
Secondary Length: 500 mils NOTE: Target differential impedance for
USB2 data pairs is 90 ohms.
Y9145 LOAD CAPACITANCE IS ??PF
36
402
1%
21
R9102
402
36
1%
21
R9103
36
1% 1/16W MF-LF
402
21
R9104
36
402
1%
21
R9105
1% 1/16W MF-LF
402
36
21
R9106
36
402
1% MF-LF
21
R9107
36
402
1%
21
R9108
1% 1/16W MF-LF
402
36
21
R9109
1%
9.09K
402
2
1
R9138
20%
0.1uF
CERM
10V 402
2
1
C9125
0.1uF
20% 10V
CERM
402
2
1
C9124
402
0.1uF
CERM
10V
20%
2
1
C9130
20% 10V
CERM
0.1uF
402
2
1
C9129
5% 1/16W MF-LF 402
1.5K
2
1
R9141
FBGA
CRITICAL
NEC_UPD720101_USB2
P8
L9
N2B2A2
B14
H14
N14
P10
N1
D8
F11
J11
G4
D12
H12
L12
M11
B13
N13
B1
L13
N8E2A3
A12
A13
P12
P3
D7H4G12
D13
F13
H13
J13
P2
C14
E14
G14
J12
K13
E13
F12
H11
K14
M14
P11
A9
C10
C11
A11
C12
B9
A10
B10
B11
B12
M6
P6
C13
E12
G13
J14
L14
D14
F14
G11
K12
M13
N11
M12
P13
N12
N10
U7700
402
100
5% 1/16W MF-LF
1
2
R9145
402
CERM
50V
5%
22pF
2
1
C9146
402
0.1uF
CERM
10V
20%
2
1
C9123
20% 10V
CERM
0.1uF
402
2
1
C9122
10V
20%
402
0.1uF
CERM
2
1
C9128
20% 10V
CERM
402
0.1uF
2
1
C9127
402
0.1uF
CERM
10V
20%
2
1
C9121
20% 10V
CERM
0.1uF
402
2
1
C9126
5%
10K
5678
4321
RP9110
402
5%
10K
1
2
R9110
20%
CERM
805
6.3V
10uF
NOSTUFF
2
1
C9120
5%
1.5K
402
2
1
R9140
30.0000M
CRITICAL
11.4X4.7X4.2-SM
21
Y9145
402
CERM
50V
5%
22pF
2
1
C9145
OMIT
SHASTA
BGA
V1.0
T2
T1
R8
R7
R6
R5
R4
Y3
Y1
W3
W1
V4
V3
V2
V1
U6
U5
R3
U4
U3
U2
U1
T8
T7
T6
T5
T4
T3
P8
P7
U2300
SM
21
XW9100
CERM
10V 402
0.1uF
20%
2
1
C9137
402
CERM
10V
20%
0.1uF
2
1
C9136
20%
10uF
6.3V CERM
805
NOSTUFF
C9135
SM
FERR-EMI-100-OHM
21
L9135
603
4.7
5%
21
R9135
1%
36
402
21
R9100
36
1% MF-LF
402
21
R9101
04
051-6772
91 102
USB2_3 USB2_3
USB2_P<3>
USB2USB2
NEC_CLK30M_XT2
15 MIL SPACING
USB2_3
USB2_N<3>
USB2_3
USB2USB2
USB2_2
USB2_N<2>
USB2_2
USB2USB2
USB2_0USB2_0
USB2_N<0>
USB2USB2
USB2_1
USB2_P<1>
USB2_1
USB2USB2
USB2_2 USB2_2
USB2_P<2>
USB2USB2
USB2_0USB2_0
USB2_P<0>
USB2USB2
USB2_1USB2_1
USB2_N<1>
USB2USB2
USB2_N<4>
TP_SB_NC_P8
TP_SB_NC_P7
TP_SB_NC_R3
TP_SB_NC_R5
TP_SB_NC_R7
TP_SB_NC_R6
TP_SB_NC_R8 TP_SB_NC_T1 TP_SB_NC_T2
TP_SB_NC_T4
TP_SB_NC_T3
TP_SB_NC_T5 TP_SB_NC_T6 TP_SB_NC_T7
TP_SB_NC_U1
TP_SB_NC_T8
TP_SB_NC_U2
TP_SB_NC_U4
TP_SB_NC_U3
TP_SB_NC_U5 TP_SB_NC_U6 TP_SB_NC_V1
TP_SB_NC_V4
TP_SB_NC_V3
TP_SB_NC_V2
TP_SB_NC_W1 TP_SB_NC_W3
TP_SB_NC_Y3
TP_SB_NC_Y1
USB2_PWREN<1>
USB2_PWREN<3> USB2_PWREN<4>
NEC_CLK30M_XT2_R
NEC_NC1_PU
NEC_RREF_PD
NEC_CLK30M_XT1
=PP3V3_PWRON_USB
USB2_OC<4>
USB2_OC<2> USB2_OC<3>
USB2_OC<1>
=PP3V3_PWRON_USB
NEC_CLK30M_XT2
USB2_P<4>
USB2_N<2> USB2_P<2>
USB2_P<1>
USB2_P<0>
USB2_N<0>
USB_NEC_P<4>
USB_NEC_N<4>
USB_NEC_N<3>
USB_NEC_P<2>
USB_NEC_N<2>
USB_NEC_P<1>
USB_NEC_N<1>
USB_NEC_P<0>
USB_NEC_N<0>
USB2_N<1>
USB2_N<3> USB2_P<3>
TP_SB_NC_R4
USB2_PWREN<2>
USB2_PWREN<0>
NEC_NC2_PU
VOLTAGE=0V
GND_NEC_AVSS_R
MIN_LINE_WIDTH=20 mil MIN_NECK_WIDTH=10 mil
PP3V3_PWRON_NEC_AVDD
VOLTAGE=3.3V MIN_LINE_WIDTH=20 mil MIN_NECK_WIDTH=10 mil
GND_NEC_AVSS_R
USB2_OC<0>
NEC_CLK30M_XT2_R
15 MIL SPACING
USB2_NEC_XTAL
NEC_CLK30M_XT1
15 MIL SPACING
USB2_4
USB2_P<4>
USB2_4
USB2USB2
USB2_4 USB2_4
USB2_N<4>
USB2USB2
=PP3V3_PWRON_USB
USB_NEC_P<3>
92
92
92
92
91
91
92
92
92
92
92
92
91
91
91
91
92
92
92
92
92
92
91
91
91
91
91
6
91
6
91
91
91
91
91
91
76
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
92
92
92
91
91
7
76
92
92
92
7
91
76
91
91
91
91
91
91
6
6
6
92
92
91
91
92
91
91
76
76
7
Preliminary
Page 68
SYM_VER-1
SYM_VER-1
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
SYM_VER-1
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
USB Host Controller page will
to apply to entire USB D+/D- XNets.
Page Notes
Power aliases required by this page:
- _PP5V_PWRON_UDASH
- _PP3V3_PWRON_UDASH
- _PP3V3_PWRON_BT
GND
D+
D-
514-0199
PORT 3
VDD
GND
D+
D-
VDD
514-0199
PORT 2
VDD D­D+ GND
514-0199
PORT 1
External USB Ports
USB pairs to their appropriate destinations and/or to properly
NOTE: USB pairs are NOT constrained on
BOM options provided by this page:
Signal aliases required by this page:
BY
USB Device Interfaces
DIFFERENTIAL_PAIR
- _PP5V_PWRON_USB
necessary aliases to map the
NOTE: This page is expected to contain the
(NONE)
(NONE)
USB
NET_SPACING_TYPE
CONTROLLER
terminate unused signals.
this page. It is assumed that the
provide the appropriate constraints
single-pin connections.
neoBorg Implementation
NOTE: This design does not provide power control on USB ports 2-4. Rename USB controller outputs to indicate
PROVIDED
ELECTRICAL_CONSTRAINT_SET
UNUSED PORT
402
CERM
NO STUFF
5%
33pF
50V
2
1
C9215
NO STUFF
33pF
402
5%
50V
CERM
2
1
C9214
NOSTUFF
SM
165-OHM
4
32
1
L9212
CERM
402
16V
0.01uF
20%
2
1
C9213
CERM
20%
402
0.01uF
16V
2
1
C9212
NOSTUFF
10UF
1210
16V
10% CERM
2
1
C9211
NOSTUFF
POLY
150uF
20%
6.3V SMD
2
1
C9210
SM
FERR-250-OHM
21
L9211
FERR-250-OHM
SM
21
L9210
15K
402
5%
2
1
R9211
5% 1/16W MF-LF
402
15K
2
1
R9210
0.01uF
402
CERM
20% 16V
2
1
C9223
NO STUFF
402
CERM
50V
5%
33pF
2
1
C9225
NO STUFF
33pF
CERM
50V
5%
402
2
1
C9224
1210
NOSTUFF
CERM
16V
10%
10UF
2
1
C9221
402
0.01uF
CERM
20% 16V
2
1
C9222
6.3V POLY
20%
150uF
SMD
NOSTUFF
2
1
C9220
SM
FERR-250-OHM
21
L9220
SM
FERR-250-OHM
21
L9221
SM
165-OHM
NOSTUFF
4
32
1
L9222
15K
5%
402
2
1
R9221
402
5%
15K
2
1
R9220
F-ST-TH
USB-UAS25
CRITICAL
4
3
2
1
7
6
5
J9210
F-ST-TH
USB-UAS25
CRITICAL
4
3
2
1
7
6
5
J9220
165-OHM
SM
NOSTUFF
4
32
1
L9232
402
CERM
0.01uF
20% 16V
2
1
C9233
CRITICAL
USB-UAS25
F-ST-TH
4
3
2
1
7
6
5
J9230
5% 50V CERM 402
33pF
NO STUFF
2
1
C9235
CERM
402
0.01uF
20% 16V
2
1
C9232
CERM 1210
NOSTUFF
10UF
10% 16V
2
1
C9231
NO STUFF
33pF
5%
50V
CERM
402
2
1
C9234
FERR-250-OHM
SM
21
L9230
NOSTUFF
150uF
20%
6.3V SMD
POLY
2
1
C9230
FERR-250-OHM
SM
21
L9231
15K
5% 1/16W
2
1
R9231
15K
5%
402
2
1
R9230
SM-1
2AMP-6V
21
F9200
I526 I527
5%
300
603
2
1
R9201
160
5% 1/10W MF-LF 603
2
1
R9200
402
5%
15K
2
1
R9251
5%
402
15K
2
1
R9250
0
402
21
R9212
0
402
21
R9213
0
402
21
R9222
402
0
21
R9223
0
402
21
R9232
402
0
21
R9233
102
92
051-6772
04
USB2_PORT2_P_F
USB2 USB2_PORT2_F
USB2 USB2_PORT1_F
USB2_PORT1_N_F
USB2_PWREN<0>
USB2_PWREN<4>
USB2_PWREN<3>
USB2_P<3>
USB2_N<3>
USB2_PWREN<1>
USB2_PWREN<2>
MAKE_BASE=TRUE
TP_USB2_PWREN<0>
MAKE_BASE=TRUE
TP_USB2_PWREN<1>
MAKE_BASE=TRUE
TP_USB2_PWREN<2>
MAKE_BASE=TRUE
TP_USB2_PWREN<3>
MAKE_BASE=TRUE
TP_USB2_PWREN<4>
USB2
USB2_PORT1_P_F
USB2_PORT1_F
USB2_PORT2_N_F
USB2_PORT2_FUSB2
USB2
USB2_PORT3_N_F
USB2_PORT3_F
USB2 USB2_PORT3_F
USB2_PORT3_P_F
MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
VOLTAGE=5V
PP5V_USB2_PORT1_F
MIN_NECK_WIDTH=20MIL
VOLTAGE=0V MIN_LINE_WIDTH=25MIL
GND_USB2_PORT1
GND_CHASSIS_USB
MIN_NECK_WIDTH=15MIL MIN_LINE_WIDTH=25MIL
VOLTAGE=0
USB2_N<0>
USB2_P<0>
PP5V_USB2_PORT2_F
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
VOLTAGE=5V
GND_CHASSIS_USB
MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=20MIL
VOLTAGE=0V
GND_USB2_PORT2
USB2_PORT2_P_F
PP5V_USB2_PORT3_F
VOLTAGE=5V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
VOLTAGE=0V MIN_NECK_WIDTH=20MIL
GND_USB2_PORT3
GND_CHASSIS_USB
USB_OC MAKE_BASE=TRUE
USB2_N<1>
USB2_P<1>
USB2_P<2>
USB2_N<2>
_PP5V_PWRON_USB
USB2_OC<0>
USB2_OC<2>
USB2_OC<1>
USB2_OC<3>
USB2_PORT3_P_F
USB2_PORT3_P
MAKE_BASE=TRUE
USB2_PORT3_N_F
USB2_PORT3_N
MAKE_BASE=TRUE
USB2_PORT2_P
MAKE_BASE=TRUE
USB2_PORT2_N_F
MAKE_BASE=TRUE
USB2_PORT2_N
USB2_PORT1_N_F USB2_PORT1_P_F
USB2_PORT1_P
MAKE_BASE=TRUE
MAKE_BASE=TRUE
USB2_PORT1_N
PP5V_USB2
VOLTAGE=5V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
92
92
91
91
92
92
92
92
92
92
92
92
92
92
92
92
92
6
6
91
91
91
6
6
91
91
6
6
6
6
6
6
6
6
6
6
7
91
91
6
7
6
6
7
91
91
91
91
7
91
91
91
91
6
6
6
6
6
59
Preliminary
Page 69
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
BOM options provided by this page: (NONE)
(NONE)
Signal aliases required by this page:
- _PP3V3_PWRON_MODEM
Power aliases required by this page:
Modem Interface
Spec Load: 0.5 A active, 3 mA auxiliary
Page Notes
NCNC
NC
514-0205
SYMBOL USED FOR PLACEMENT
STUFFED AT FATP
RJ11 CONNECTOR
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC NC NC
NC
NC
NC
NC
516S0116
12 - RESERVED 14 - RESERVED
8 - GND
4 - MONO_PHONE 6 - RESERVED
30 - AC97_BITCLK
26 - AC97_SDATA_INA
24 - AC97_SDATA_INB
22 - AC97_SYNC
18 - 5Vd
10 - 5Vmain
2 - AUDIO_PWRON
20 - GND
16 - PRIMARY_DN
28 - GND
23 - AC97_SDATA_OUT
15 - GND 17 - 3.3Vaux 19 - GND 21 - 3.3Vmain
25 - AC97_RESET#
29 - AC97_MSTRCLK
27 - GND
5 - AUXA_RIGHT 7 - AUXA_LEFT
11 - CD_RIGHT
3 - GND
9 - CD_GND
13 - CD_LEFT
Daughter Card Specification Rev 1.0, February 22, 1999
From Intel Mobile Audio/Modem
1 - MONO_OUT/PC_BEEP
Q52 Modem Connector
CRITICAL
C104A-H9.0
F-ST-SM
9
87
65
4
30
3
29
2827
2625
2423
2221
20
2
19
1817
1615
1413
1211
10
1
36
35
3433
3231
J9401
OMIT
RJ11-HGT27.5
2
1
J9402
STDOFF-4MM-9MMH-TH
1
SDF9400
STDOFF-4MM-9MMH-TH
1
SDF9401
5% MF-LF
402
10K
2
1
R9451
805
10UF
20%
6.3V CERM
2
1
C9450
20% CERM
10V
0.1UF
402
2
1
C9451
04
102
94
051-6772
GND_CHASSIS_MODEM
MODEM_RING2SYS_L
I2S1_SYNC
I2S1_BITCLK
I2S1_RESET_L
I2S1_SB_TO_DEV_DTO
I2S1_MCLK
MODEM_FC_RGDT
_PP3V3_PWRON_MODEM
I2S1_DEV_TO_SB_DTI
_PP3V3_PWRON_MODEM
25
25
25
25
25
25
94
25
94
6
6
6
6
6
6
7
6
7
Preliminary
Page 70
DOUT
LRCK
VREF2
L/M# REFO
VREF1
VDD
BCK
MINP
MINM
MBIAS
VCOM
VOUTL VOUTR
VINR
VINL
ATEST
SCKI
PDWN*
SDA
ADR SCL
I2CEN
DOUTS DIN
DGND AGND
VCC
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
AUDIO: CODEC
NC
NC
PLACE AT U9500
AUDIO CODEC
APPLE P/N 353S0933
CERM 805
10V
10%
1UF
2
1
C9503
16V
20% ELEC
SM
10UF
2
1
C9506
1000-OHM-200MA
0603
21
L9500
CERM
10V 805
10%
1UF
2
1
C9502
805
CERM
10% 10V
1UF
2
1
C9501
20% ELEC
16V
10UF
SM
2
1
C9512
33
402
5%
21
R9500
5%
33
402
21
R9502
47K
5% MF-LF
402
2
1
R9501
10UF
20% ELEC
SM
16V
2
1
C9510
0.1UF
603
16V
10% X7R
2
1
C9511
0.1UF
10% 16V X7R 603
2
1
C9509
805
6.3V CERM
10UF
20%
2
1
C9500
0.1UF
10% 16V X7R 603
2
1
C9504
603
X7R
16V
10%
0.1UF
2
1
C9505
NOSTUFF
4.7PF
+/-0.25PF
50V C0G 402
2
1
C9513
402
1%
1K
2
1
R9503
VQFN
PCM3052A
5
4
24
25
6
2
16
26
31237
18
19
17
32
9
29
28
27
10
3
21
14
13
12
15
11
1
30
22
8
20
U9500
10UF
20% 16V ELEC SM
2
1
C9508
603
X7R
16V
10%
0.1UF
2
1
C9507
051-6772
95
04
102
VOLTAGE=3.3V
MIN_NECK_WIDTH=8MIL
PPV_3V3_AUDIO_CODEC
PP3V3_AUDIO
AUD_SPDIF_OUT
NET_SPACING_TYPE=AUDIO
NET_SPACING_TYPE=AUDIO
I2S0_DEV_TO_SB_DTI
GND_AUDIO_CODEC
AUD_CODEC_LI_SHDN_L
NET_SPACING_TYPE=AUDIO
I2S0_BITCLK_DELAYED
AUD_MICIN_N AUD_MICIN_P
AUD_PCM_MBIAS
AUD_PSEUDO_VREF
NET_SPACING_TYPE=AUDIO
AUD_CODEC_MCLK
I2S0_RESET_L
I2C_AUDIO_SDA
I2C_AUDIO_SCL
AUD_PCM_REF2
AUD_PCM_REF1
AUD_PCM_VCOM
AUD_CODEC_OUT_R
AUD_CODEC_OUT_L
AUD_CODEC_IN_R
AUD_CODEC_IN_L
I2S0_SYNC
AUDI2S0OUT AUDSPDIFOUT
NET_SPACING_TYPE=AUDIO
I2S0_SB_TO_DEV_DTO
GND_AUDIO_CODEC
PP4V5_AUDIO_ANALOG
102
102
102
101
98
98
100
96
100
100
96
102
MIN_LINE_WIDTH=12MIL
7
101
25
95
96
102
102
102
102
96
102
25
18
18
100
98
98
96
96
25
25
95
96
Preliminary
Page 71
V-
V+
V-
V+
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
APPLE P/N 353S0642
APPLE P/N 353S0642
LINE IN PSEUDO-DIFFERENTIAL AMP
AV= 0.49
AUDIO: LINE INPUT AMP
CRITICAL
MAX4253EUB
UMAX
4
10
5
1
2
3
U9600
0.47UF
20% 10V
603
CERM
2
1
C9602
SM
16V
20%
10UF
ELEC
2 1
C9600
16V
20%
SM
ELEC
10UF
2 1
C9601
402
1% 1/16W
100K
2
1
R9603
402
47K
5% 1/16W MF-LF
2
1
R9602
NOSTUFF
0
5%
402
21
R9601
1%
20.5K
402
21
R9604
1%
10K
402
21
R9607
402
20.5K
1%
21
R9605
1%
10K
402
21
R9606
1%
165
402
2
1
R9600
NOSTUFF
5%
50V
CERM
402
47PF
21
C9603
BAV99DW-X-F
SOT-363
6
2
1
D9600
1%
10K
402
21
R9611
NOSTUFF
5%
50V
CERM
402
47PF
21
C9606
1%
10K
402
21
R9612
UMAX
MAX4253EUB
CRITICAL
4
10
6
9
8
7
U9600
SOT-363
BAV99DW-X-F
3
5
4
D9600
402
1%
20.5K
21
R9609
402
1%
20.5K
21
R9610
10UF
SM
20%
ELEC
16V
2 1
C9604
ELEC
16V
20%
10UF
SM
2 1
C9605
100K
402
1% 1/16W
2
1
R9608
051-6772
04
96
102
AUD_LI_L
AUD_LI_L1
AUD_LI_VREFL
AUD_LI_L2
AUD_CODEC_IN_L
AUD_CODEC_LI_SHDN_L
AUD_CODEC_IN_R
AUD_PSEUDO_VREF
AUD_LI_GNDR1
PP4V5_AUDIO_ANALOG
AUD_LI_GND
AUD_LI_R1
AUD_LI_GNDL1
AUD_LI_VREFR
GND_AUDIO_CODEC
AUD_LI_R
PP4V5_AUDIO_ANALOG
AUD_LI_R2
GND_AUDIO_CODEC
AUD_CODEC_LI_SHDN_L1
AUD_PSEUDO_VREF
AUD_LI_GND
102
102
102
98
102
98
96
96
101
96
96
96
96
101
101
95
95
95
95
95
96
95
101
95
95
95
96
Preliminary
Page 72
RIN+
SHDN*
VDDR
PVDD
VDDL
C1P
ROUT
PGND
SGND
PVSS
VSS
RIN-
LOUTLIN-
LIN+
C1N
NC
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
AUDIO: LINE OUT AMP
FC = 37 KHZ, HO = -1.4
CANCELLATION
GROUND NOISE
TO SHASTA GPIO
LINE OUT LOW-PASS FILTER
LINE OUT AMP
LINE OUT
APPLE P/N 353S0687
CERM
1UF
10% 10V
805
2
1
C9808
16V SM
20%
10UF
ELEC
2
1
C9811
CERM
10V 805
1UF
10%
2
1
C9810
CRITICAL
QFN
MAX9722AETE
11
9
13
16
6
10
8 7
5
1
3
17
12
14 15
2 4
U9800
402
1%
10K
2
1
R9805
402
1%
14.0K
21
R9806
1%
402
14.0K
21
R9801
402
1%
3.92K
21
R9802
20% 16V
SM
ELEC
10UF
2
1
C9806
402
10K
1% 1/16W MF-LF
21
R9800
10UF
20%
16V ELEC SM-1
21
C9800
0603
1.5NF
5% 25V CERM
CRITICAL
2
1
C9802
CERM 0603
25V
5%
1.5NF
CRITICAL
2
1
C9804
14.0K
1%
402
21
R9809
3.92K
402
1%
21
R9808
402
10K
1%
21
R9807
SM-1
ELEC
16V
20%
10UF
21
C9803
402
4.7K
5%
2
1
R9815
5%
4.7
603
21
R9810
270PF
CERM
603
5%
50V
21
C9801
270PF
CERM
50V
5%
603
21
C9805
50V
100PF
CERM
402
5%
2
1
C9812
402
100PF
5%
50V
CERM
2
1
C9813
402
1K
5% 1/16W MF-LF
21
R9816
1K
1%
2
1
R9817
1K
1% 1/16W MF-LF 402
2
1
R9818
805
6.3V CERM
10UF
20%
2
1
C9807
14
1%
1/8W
805
21
R9811
805
1/8W
1%
14
21
R9812
10K
1% MF-LF
402
2
1
R9804
1/8W
0
805
5%
21
R9813
1/8W
0
805
5%
21
R9814
402
1%
14.0K
21
R9803
1UF
805
10% CERM
10V
2
1
C9809
102
98
051-6772
04
MIN_LINE_WIDTH=20MIL MIN_NECK_WIDTH=10MIL
AUD_LO_GND
GND_AUD_LOAMP
AUD_LOAMP_IN_L_P
AUD_LOAMP_IN_L_M
MIN_NECK_WIDTH=8MIL AUD_MAX9722_PVSS
MIN_LINE_WIDTH=12MIL
AUD_CODEC_OUT_R
GND_AUD_LOAMP_CHGPMP
PP5V_AUDIO_ANALOG
AUD_LO_GND_PRB
AUD_LOAMP_IN_R_P
GND_AUDIO_CODEC
PP5V_AUDIO_LOAMP
VOLTAGE=5V
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=20MIL
AUD_MAX9722_C1P
AUDIO_LO_MUTE_L_F
AUD_LOAMP_IN_R_M
AUD_LOAMP_OUT_L
AUD_LOAMP_IN_L_P
AUD_LOAMP_IN_L_M
AUDCODECOUTL1
AUD_LOAMP_IN_R_P
GND_AUDIO_CODEC
AUDCODECOUTR1
AUDCODECOUTL
AUDCODECOUTR
AUD_CODEC_OUT_L
AUD_LOAMP_OUT_R
AUD_LOAMP_IN_R_M
AUD_LO_L
MIN_LINE_WIDTH=20MIL MIN_NECK_WIDTH=10MIL
AUD_LO_R
MIN_LINE_WIDTH=20MIL MIN_NECK_WIDTH=10MIL
GND_AUD_LOAMP_CHGPMP
AUD_MAX9722_C1N
GND_AUD_LOAMP_CHGPMP
AUDIO_LO_MUTE_L
AUD_LOAMP_OUT_L
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=20MIL
AUD_LOAMP_OUT_R
MIN_LINE_WIDTH=20MIL MIN_NECK_WIDTH=10MIL
102
102
98
98
100
102
96
96
100
102
102
101
102
98
98
95
98
102
101
98
95
98
98
98
98
98
95
95
98
98
101
101
98
98
25
98
98
Preliminary
Page 73
SYM_VER-1
SYM_VER-1
PGND
VDD
G1 G2
CHOLD
AGND
PAD
THM
NC
SHDN*
FS2
FS1
INL-
INL+
INR-
REG
INR+
OUTL+ OUTL+
OUTL­OUTL-
C1+
C1-
OUTR+ OUTR+
OUTR­OUTR-
SS
G
D
S
G
D
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
APPLE P/N 353S0680
SPEAKER AMP
TIE TO SHASTA GPIO
AUDIO: SPEAKER AMP
NC
GAIN SETTINGS: +19DB
MODULATION SETTING: LOW EMI
GAIN AND SWITCHING FREQUENCY STUFF OPTIONS
APPLE P/N 155S0194
402
1% 1/16W MF-LF
10K
21
RA015
5%
47K
402
21
RA013
1%
10K
2
1
RA014
NOSTUFF
800-OHM ACM4532
4
32
1
LA011
NOSTUFF
ACM4532
800-OHM
4
32
1
LA012
MAX9714
QFN
22
21
4
3
33
12
11
14
24
23
2
1
26
28
25
27
30
32
29
31
8
15
16
9
10
18
17
20
19
7
5
6
13
U9700
0
5% 1/10W MF-LF
603
21
RA016
603
5%
0
21
RA017
SM
1.5AMP-33V
21
FA000
180-OHM-1.5A
0603
21
LA003
0.1UF
50V
10% X7R
2
1
CA008
180-OHM-1.5A
0603
21
LA004
X7R
0.47UF
16V
10%
805
2
1
CA009
FERR-250-OHM
SM-1
21
LA000
0.47UF
805
X7R
10% 16V
21
CA004
0.47UF
16V X7R
10%
805
21
CA005
180-OHM-1.5A
0603
21
LA002
0.47UF
X7R 805
10% 16V
2
1
CA014
10% X7R
805
16V
0.47UF
21
CA007
10%
805
X7R
16V
0.47UF
21
CA006
20%
SM-2
ELEC
220UF
16V
2
1
CA000
0603
180-OHM-1.5A
21
LA001
402
5%
0
2
1
RA008
NOSTUFF
0
5% 1/16W MF-LF 402
2
1
RA009
402
5%
0
NOSTUFF
2
1
RA010
NOSTUFF
0
5% 1/16W MF-LF 402
2
1
RA011
16V
20%
SM-2
220UF
ELEC
2
1
CA017
CERM
16V
20%
1206
1UF
2
1
CA002
5%
47K
5678
4321
RPA000
5% 1/16W MF-LF
4.7K
402
2
1
RA012
50R28
1
XCA000
0603
1000-OHM-200MA
21
LA005
CERM
100PF
5%
402
50V
2
1
CA015
402
CERM
50V
5%
100PF
2
1
CA016
1000-OHM-200MA
0603
21
LA006
1000-OHM-200MA
0603
21
LA007
1000-OHM-200MA
0603
21
LA008
0.1UF
603
20% CERM
16V
2
1
CA019
603
20% 16V
CERM
0.1UF
2
1
CA018
100PF
CERM
50V
5%
402
2
1
CA020
CERM
50V
5%
402
100PF
2
1
CA021
NOSTUFF
402
100PF
5%
50V
CERM
2
1
CA022
SM
OMIT 21
XWA001
SM
OMIT 21
XWA000
10UF
10% 16V CERM 1210
2
1
CA003
10UF
10% 16V CERM 1210
2
1
CA023
CERM 1210
10%
10UF
16V
2
1
CA001
OMIT
SM
21
XWA002
OMIT
SM
21
XWA003
1000PF
CERM
25V
5%
603
2
1
CA010
603
1000PF
5% 25V CERM
2
1
CA011
603
1000PF
5% 25V CERM
2
1
CA012
CERM
25V
5%
1000PF
603
2
1
CA013
2N7002DW
SOT-363
1
2
6
QA000
SOT-363
2N7002DW
4
5
3
QA000
051-6772
04
102100
MIN_NECK_WIDTH=10MIL AUDSAMPOURTP
MIN_LINE_WIDTH=20MIL
NET_SPACING_TYPE=AUDIO
AUDSAMPOUTRN
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=20MIL
NET_SPACING_TYPE=AUDIO
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=20MIL
AUD_SPKR_OUTR_N
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=12MIL
MIN_NECK_WIDTH=8MIL
AUD_MAX9714_CHOLD
MIN_LINE_WIDTH=40MIL MIN_NECK_WIDTH=10MIL
PP12V_AUDIO_SPKRAMP
VOLTAGE=12V
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=40MIL
PP12V_AUDIO_SPKRAMP_F
VOLTAGE=12V
AUD_SAMP_FS1
AUD_SAMP_SHDN_L
PP3V3_AUDIO_SPKR_EMI
MIN_LINE_WIDTH=4MIL MIN_NECK_WIDTH=4MIL
PP3V3_AUDIO_SPKR
MIN_LINE_WIDTH=4MIL MIN_NECK_WIDTH=4MIL
PP3V3_AUDIO
AUDSAMPINRP
AUDIO_SPKR_MUTE_L_INV
AUD_CODEC_OUT_R
AUD_CODEC_OUT_L
AUD_SAMP_G1
GND_AUDIO_SPKRAMP_PLANE
AUD_SAMP_G2
AUD_SAMP_FS2
AUDIO_SPKR_MUTE_L
GND_AUDIO_SPKRAMP_PLANE
AUDSAMPINLP
AUD_SAMP_INL_N
MIN_NECK_WIDTH=6MIL
AUD_MAX9714_VREG MIN_LINE_WIDTH=8MIL
AUD_SAMP_INR_P
AUD_SAMP_INL_P
AUD_SAMP_FS1 AUD_SAMP_FS2
AUD_SAMP_G2
AUD_SAMP_G1
GND_AUDIO_SPKRAMP_PLANE
AUDSAMPINRN
PP3V3_AUDIO_SPKR
AUD_PCM_VCOM
AUDIO_SPKR_MUTE_L_F
PP3V3_AUDIO_SPKR
AUDSAMPINLN
NET_SPACING_TYPE=AUDIO MIN_NECK_WIDTH=10MIL
PP12V_AUDIO_SPKRAMP_F2
MIN_LINE_WIDTH=40MIL VOLTAGE=12V
DIFFERENTIAL_PAIR=AUD_SPKRAMP_PWR
DIFFERENTIAL_PAIR=AUD_SPKRAMP_PWR NET_SPACING_TYPE=AUDIO
GND_AUDIO_SPKRAMP
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=40MIL
MIN_LINE_WIDTH=8MIL MIN_NECK_WIDTH=6MIL
AUDSAMPCPP
MIN_NECK_WIDTH=6MIL
MIN_LINE_WIDTH=8MIL AUDSAMPCPN
AUDSAMPCSS
MIN_LINE_WIDTH=8MIL MIN_NECK_WIDTH=6MIL
AUD_SAMP_INR_N
NET_SPACING_TYPE=AUDIO
AUDSAMPOUTLP
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=20MIL
NET_SPACING_TYPE=AUDIO
AUDSAMPOUTLN
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=10MIL
NET_SPACING_TYPE=AUDIO MIN_LINE_WIDTH=20MIL
AUD_SPKR_OUTL_N
NET_SPACING_TYPE=AUDIO MIN_LINE_WIDTH=20MIL
AUD_SPKR_OUTR_P
MIN_NECK_WIDTH=10MIL
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=20MIL
AUD_SPKR_OUTL_P
NET_SPACING_TYPE=AUDIO
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=40MIL
GND_AUDIO_SPKRAMP_PLANE
VOLTAGE=12V PP12V_AUD_SPKRAMP_PLANE
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
102 101
95
98
98
102
102
102
102
102
101
7
100
100
7
95
95
100
100
100
100
25
100
100
100
100
100
100
100
95
100
7
101
101
101
100
Preliminary
Page 74
G
D
S
LED
VIN VDD GND
G
D
S
G
D
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
AUDIO_IN_DET0_L = HIGH: PLUG NOT INSERTED
SPEAKER TYPE DETECT
TO SHASTA GPIO
APPLE P/N 518-0034
APPLE P/N 518-0138
SPEAKER CABLE CONNECTOR
J700
PLACE NEAR
J9801
PLACE NEAR
LINE IN PLUG DETECT
AUDIO: Q45 CONNECTORS
TO SHASTA GPIO
TO SHASTA GPIO
AUDIO_IN_DET0_L = LOW: PLUG INSERTED
LINE OUT JACK
TO SHASTA GPIO
MIC CABLE CONNECTOR
AUDIO_LO_OPTICAL_PLUG_L = HIGH: ANALOG AUDIO PLUG INSERTED
AUDIO_LO_OPTICAL_PLUG_L = LOW: OPTICAL DIGITAL AUDIO PLUG INSERTED
AUDIO_LO_DET_L = LOW: PLUG INSERTED
LINE OUT PLUG DETECTS
AUDIO_LO_DET_L = HIGH: PLUG NOT INSERTED
MMBZ15DLT1
APPLE P/N 514-0204
LINE IN JACK
APPLE P/N 514-0203
100PF
50V CERM 402
5%
2
1
CA103
100K
402
5%
2
1
RA100
0.1UF
20% 10V CERM 402
2
1
CA108
47K
402
5%
21
RA102
402
5% 1/16W
47K
2
1
RA101
402
47K
5%
21
RA105
402
47K
5% 1/16W MF-LF
2
1
RA104
100PF
CERM
50V
5%
402
2
1
CA102
402
5%
100K
2
1
RA103
402
47K
5% 1/16W MF-LF
2
1
RA107
402
47K
5% 1/16W MF-LF
21
RA108
100K
5% 1/16W MF-LF 402
2
1
RA106
0
5% 1/16W MF-LF
402
2
1
RA112
47K
5%
2
1
RA113
M-ST-TH
HF28
3
2
1
JA102
NOSTUFF
14V-15A
0405
42
31
DZA100
CERM
5% 50V
402
100PF
2
1
CA101
1000PF
25V X7R
10%
402
2
1
CA120
10% X7R
1000PF
25V 402
2
1
CA121
402
10% X7R
25V
1000PF
2
1
CA122
402
100PF
5% CERM
50V
2
1
CA100
100PF
CERM
50V 402
5%
2
1
CA124
100PF
CERM
50V 402
5%
2
1
CA123
10-89-7082
M-ST-TH
8 7
5
4 3
2 1
JA101
0603
1000-OHM-200MA
21
LA132
SOT23-LF
2N7002
2
1
3
QA100
50R28
1
XCA100
50R28
1
XCA101
NOSTUFF
603
5%
1000PF
CERM
25V
2
1
CA104
603
5% CERM
NOSTUFF
1000PF
25V
2
1
CA105
NOSTUFF
603
1000PF
5% CERM
25V
2
1
CA106
603
NOSTUFF
CERM
25V
5%
1000PF
2
1
CA107
CERM 603
1000PF
5% 25V
2
1
CA126
5%
1000PF
CERM
25V 603
2
1
CA127
1000PF
CERM
25V
5%
603
2
1
CA119
1000PF
603
25V
5% CERM
2
1
CA125
180-OHM-1.5A
0603
21
LA130
180-OHM-1.5A
0603
21
LA131
180-OHM-1.5A
0603
21
LA133
180-OHM-1.5A
0603
21
LA134
FERR-EMI-100-OHM
SM
21
LA100
SM
FERR-EMI-100-OHM
21
LA101
FERR-EMI-100-OHM
SM
21
LA102
FERR-EMI-100-OHM
SM
21
LA103
SM
FERR-EMI-100-OHM
21
LA104
FERR-EMI-100-OHM
SM
21
LA105
SM
FERR-EMI-100-OHM
21
LA106
SM
FERR-EMI-100-OHM
21
LA107
FERR-EMI-100-OHM
SM
21
LA108
SM
FERR-EMI-100-OHM
21
LA109
FERR-EMI-100-OHM
SM
21
LA110
FERR-EMI-100-OHM
SM
21
LA111
SM
FERR-EMI-100-OHM
21
LA112
FERR-EMI-100-OHM
SM
21
LA113
FERR-EMI-100-OHM
SM
21
LA114
SM
FERR-EMI-100-OHM
21
LA115
FERR-EMI-100-OHM
SM
21
LA116
FERR-EMI-100-OHM
SM
21
LA117
FERR-EMI-100-OHM
SM
21
LA118
SM
FERR-EMI-100-OHM
21
LA119
FERR-EMI-100-OHM
SM
21
LA120
FERR-EMI-100-OHM
SM
21
LA121
SM
FERR-EMI-100-OHM
21
LA122
SM
FERR-EMI-100-OHM
21
LA123
FERR-EMI-100-OHM
SM
21
LA124
FERR-EMI-100-OHM
SM
21
LA126
SM
FERR-EMI-100-OHM
21
LA125
FERR-EMI-100-OHM
SM
21
LA127
FERR-EMI-100-OHM
SM
21
LA128
FERR-EMI-100-OHM
SM
21
LA129
SOT23
15V
3
2
1
DZA101
F-ST-TH
JFJ8210
6 7
9
5
4
3
2
12
11
10
1
8
JA103
10% CERM
10V
1UF
805
2
1
CA118
10V
20%
402
0.1UF
CERM
2
1
CA117
0.01UF
10% 16V
402
CERM
2
1
CA116
100PF
CERM
50V 402
5%
2
1
CA115
100PF
5% 50V CERM 402
2
1
CA114
402
CERM
50V
5%
100PF
2
1
CA113
100PF
402
CERM
50V
5%
2
1
CA112
100PF
CERM 402
5% 50V
2
1
CA111
2N7002DW
SOT-363
4
5
3
QA101
SOT-363
2N7002DW
1
2
6
QA101
F-ST-TH
AJR23
4
3
2
1
8
7
6
5
JA100
NOSTUFF
100K
5% 1/16W MF-LF 402
2
1
RA109
402
0.1UF
20% 10V CERM
2
1
CA109
402
0.1UF
20% 10V CERM
2
1
CA110
051-6772
101 102
04
MIN_LINE_WIDTH=8MIL AUD_LI_DET_EMI
MIN_NECK_WIDTH=6MIL
GND_CHASSIS_AUDIO_EXTERNAL
AUD_SPDIF_OUT_EMI
MIN_LINE_WIDTH=12MIL MIN_NECK_WIDTH=8MIL
AUD_LO_R_EMI
MIN_NECK_WIDTH=8MIL
MIN_LINE_WIDTH=12MIL
AUD_LO_GND_JACK
AUD_LI_GND_EMI
GND_CHASSIS_AUDIO_EXTERNAL
AUD_LO_DET2_EMI
AUD_LO_GND_PRB_EMI
MIN_LINE_WIDTH=12MIL MIN_NECK_WIDTH=8MIL
AUD_LO_GND_EMI
AUD_SPDIF_OUT_JACK
AUD_LO_DET2_JACK
PP5V_AUDIO_SPDIF_JACK
MIN_NECK_WIDTH=8MIL
MIN_LINE_WIDTH=12MIL MIN_NECK_WIDTH=8MIL PP5V_AUDIO_SPDIF_EMI
MIN_LINE_WIDTH=12MIL
AUD_LO_DET1_JACK
AUD_LO_DET1_EMI
MIN_LINE_WIDTH=12MIL MIN_NECK_WIDTH=8MIL
AUD_LO_L_EMI
MIN_LINE_WIDTH=12MIL
MIN_NECK_WIDTH=8MIL
AUD_LO_L_JACK
MIN_LINE_WIDTH=12MIL
MIN_NECK_WIDTH=8MIL
AUD_LO_R_JACK
AUD_LO_GND_PRB
AUD_LO_L
AUD_LO_R
AUD_LO_DET2
AUD_LO_GND
PP5V_AUDIO
AUD_SPDIF_OUT
AUD_LO_DET1
GND_CHASSIS_AUDIO_INTERNAL
AUD_MIC_IN_P_EMI
GND_AUDIO_MIC_CONN
GND_AUDIO_MIC_EMI
AUD_MIC_IN_P_CONN
AUD_MIC_IN_N_EMI
AUD_MIC_IN_N_CONN
AUD_MIC_IN_P
AUD_MIC_IN_N
GND_AUDIO_MIC
AUD_LI_R
MIN_LINE_WIDTH=8MIL MIN_NECK_WIDTH=6MIL
MIN_LINE_WIDTH=8MIL MIN_NECK_WIDTH=6MIL
AUD_LI_DET_H
AUD_LI_GND
MIN_NECK_WIDTH=6MIL
MIN_LINE_WIDTH=8MIL
MIN_LINE_WIDTH=8MIL MIN_NECK_WIDTH=6MIL
AUD_LI_L
AUD_LI_R_JACK
MIN_NECK_WIDTH=6MIL
MIN_LINE_WIDTH=8MIL
MIN_LINE_WIDTH=8MIL MIN_NECK_WIDTH=6MIL
AUD_LI_DET_JACK
MIN_LINE_WIDTH=8MIL
AUD_LI_GND_JACK
MIN_NECK_WIDTH=6MIL
GND_CHASSIS_AUDIO_EXTERNAL
AUD_LI_L_JACK
MIN_NECK_WIDTH=6MIL
MIN_LINE_WIDTH=8MIL
AUD_SPKR_OUTR_P
AUD_SPKR_OUTL_N
NET_SPACING_TYPE=AUDIO MIN_LINE_WIDTH=20MIL MIN_NECK_WIDTH=12MIL
AUD_SPKR_OUTL_N_CONN
AUDIO_GPIO_12_CONN
GND_CHASSIS_AUDIO_INTERNAL
AUD_SPKR_OUTL_P
AUD_SPKR_OUTR_N
NET_SPACING_TYPE=AUDIO MIN_LINE_WIDTH=20MIL MIN_NECK_WIDTH=12MIL
AUD_SPKR_OUTR_N_CONN
AUD_SPKR_OUTL_P_CONN
MIN_NECK_WIDTH=12MIL
MIN_LINE_WIDTH=20MIL
NET_SPACING_TYPE=AUDIO
AUD_SPKR_OUTR_P_CONN
MIN_NECK_WIDTH=12MIL
MIN_LINE_WIDTH=20MIL
NET_SPACING_TYPE=AUDIO
AUD_LO_DET1_1
PP3V3_AUDIO
AUDIO_GPIO_12
MIN_NECK_WIDTH=8MIL
MIN_LINE_WIDTH=12MIL
AUD_SPDIF_GND
PP3V3_AUDIO
AUD_LO_DET2_1
AUD_LO_DET2
AUDIO_LO_DET_L
AUD_LI_DET_H
AUDLINDETH
AUDIO_LI_DET_L
GND_CHASSIS_AUDIO_INTERNAL
PP3V3_AUDIO
AUDIO_LO_OPTICAL_PLUG_L
PP3V3_AUDIO
AUD_LO_DET1
MIN_LINE_WIDTH=8MIL MIN_NECK_WIDTH=6MIL
AUD_LI_L_EMI
MIN_LINE_WIDTH=8MIL AUD_LI_GND_EMI
MIN_NECK_WIDTH=6MIL
AUD_LI_R_EMI
MIN_NECK_WIDTH=6MIL
MIN_LINE_WIDTH=8MIL
102
102
102
102
101
101
101
101
102
102
102
100
100
100
100
101
101
101
101
101
95
95
25
101
95
95
7
101
7
98
98
98
101
98
7
95
101
7
6
6
102
102
102
96
101
96
96
7
100
100
7
100
100
7
25
7
101
6
101
25
7
7
25
7
101
101
Preliminary
Page 75
IN
OUT
SHDN*
GND
BP
OUT
VOUT
IN
ADJ/GND
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
NONE
APPLE P/N 353S0733
MICROPHONE IMPEDANCE MATCHING CIRCUIT
PLACE AT J5903
FC=7HZ
NOT USED: C9906
AUDIO GROUND RETURNS
AUDIO: Q45 POWER SUPPLIES
UNUSED GPIO TERMINATIONS
APPLE P/N 353S0539
5V POWER SUPPLY FOR THE HEADPHONES/LINE OUT AMP
AT RIGHT SIDE OF CA007
PLACE ACROSS GROUND SPLIT
AMP GROUND PLANE
AT CODEC U9500
PLACE NEAR ENTRY TO SPEAKER
4.5V POWER SUPPLY FOR CODEC AND LINE IN AMP
PLACE ACROSS GROUND SPLIT
CRITICAL
SC70-5
MAX8510EXK45+T
3
5
1
2
4
VRA201
0.1UF
16V
10%
603
X7R
21
CA213
0.1UF
X7R 603
10% 16V
21
CA214
1%
1K
2
1
RA223
1%
100K
402
2
1
RA222
402
1%
1K
2
1
RA224
165
1% 1/16W MF-LF
402
21
RA219
25V 402
X7R
10%
1000PF
2
1
CA212
1K
1%
NOSTUFF
2
1
RA218
402
1%
165
21
RA220
NOSTUFF
1K
1%
2
1
RA221
805
10UF
20%
6.3V CERM
NOSTUFF
2
1
CA210
10UF
20%
SM-1
16V ELEC
2
1
CA211
0
5%
NOSTUFF
402
21
RA225
5% 1/16W MF-LF
402
0
21
RA226
402
5%
0
21
RA227
I116
NOSTUFF
402
5% 1/16W
0
2
1
RA228
1/8W
5%
0
805
21
RA229
PP5V_AUDIO_ANALOG
CRITICAL
LM1117MPX
SOT223-4
4 2
3
1
VRA200
AUD_12V_CODEC2
2512
1W
10
FF
5%
21
RA200
SM-1
FERR-250-OHM
21
LA200
100UF
ELEC
16V
20%
SM
2
1
CA203
402
205
1% 1/16W MF-LF
2
1
RA201
1%
634
402
2
1
RA202
16V
SM
100UF
20%
ELEC
2
1
CA202
10UF
20%
SM-1
16V ELEC
2
1
CA208
1UF
CERM
10V
10%
805
2
1
CA207
1%
100K
402
2
1
RA203
10% X7R
0.1UF
603
16V
2
1
CA205
SM
OMIT 21
XWA200
OMIT
SM
21
XWA201
OMIT
SM
21
XWA202
OMIT
SM
21
XWA203
50R28
1
XCA201
CERM
20%
1UF
16V 1206
2
1
CA200
ELEC
16V
20%
220UF
SM-2
2
1
CA201
16V SM-2
220UF
20% ELEC
2
1
CA209
402
5% 1/16W MF-LF
47K
21
RA210
5%
47K
402
21
RA213
402
47K
5% 1/16W MF-LF
21
RA214
402
47K
5% 1/16W MF-LF
21
RA215
402
47K
5% 1/16W MF-LF
21
RA206
5%
402
47K
21
RA207
5%
47K
402
21
RA208
47K
5%
402
21
RA209
5%
603
0
21
RA205
402
47K
5% 1/16W MF-LF
21
RA211
402
47K
5% 1/16W MF-LF
21
RA212
I88
I89
NOSTUFF
1%
100K
402
21
RA204
CERM
6.3V
20%
10UF
805
2
1
CA204
NOSTUFF
805
0
5%
1/8W
21
RA216
402
10% 16V CERM
0.01UF
2
1
CA206
805
0
5%
1/8W
NOSTUFF
21
RA217
051-6772
102 102
04
AUD_CODEC_MCLK
I2S0_MCLK
GND_CHASSIS_AUDIO_EXTERNAL
GND_AUDIO_CODEC
GND_AUDIO_SPKRAMP
GND_AUDIO_SPKRAMP_PLANE
GND_AUDIO_CODEC
I2S0_BITCLK_8NS_DELAY
NET_SPACING_TYPE=AUDIO
ELECTRICAL_CONSTRAINT_SET=8NS
I2S0_BITCLK NET_SPACING_TYPE=AUDIO
I2S0_BITCLK_DELAYED
AUD_12V_CODEC
MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=12MIL VOLTAGE=12V
MIN_LINE_WIDTH=40MIL MIN_NECK_WIDTH=12MIL
NET_SPACING_TYPE=AUDIO
VOLTAGE=12V
DIFFERENTIAL_PAIR=AUD_CODEC_PWR
PP12V_AUDIO_CODEC
GND_AUDIO_CODEC
VOLTAGE=12V
MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=12MIL
AUD_V5_REF
I2S2_MCLK
TP_I2S2_MCLK
I2S2_RESET_L
TP_I2S2_SB_TO_DEV_DTO
I2S2_SB_TO_DEV_DTO
I2S2_SYNC
AUDIO_SPKR_DET_L
AUDIO_GPIO_11
I2S2_BITCLK
AUDIO_HP_DET_L
AUDIO_LI_OPTICAL_PLUG_L
MIN_LINE_WIDTH=12MIL MIN_NECK_WIDTH=8MIL
PP3V3_AUDIO
VOLTAGE=4.5V
GND_AUDIO_MIC
MIN_LINE_WIDTH=10MIL MIN_NECK_WIDTH=6MIL
MIN_LINE_WIDTH=25MIL VOLTAGE=4.5V
GND_AUD_LOAMP_CHGPMP
MIN_NECK_WIDTH=10MIL
GND_AUDIO
MIN_LINE_WIDTH=40MIL MIN_NECK_WIDTH=12MIL
NET_SPACING_TYPE=AUDIO
DIFFERENTIAL_PAIR=AUD_CODEC_PWR
VOLTAGE=4.5V
GND_AUD_LOAMP
MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
AUD_MIC_M1
DIFFERENTIAL_PAIR=AUDIO_MIC_1 NET_SPACING_TYPE=AUDIO
AUD_MIC_IN_P
NET_SPACING_TYPE=AUDIO
DIFFERENTIAL_PAIR=AUDIO_MIC
DIFFERENTIAL_PAIR=AUDIO_MIC NET_SPACING_TYPE=AUDIO
AUD_MIC_IN_N
GND_AUDIO_MIC
AUD_4V5_FB
PP5V_AUDIO_ANALOG
AUD_4V5_SHDN*
GND_AUDIO_CODEC
PP3V3_AUDIO
NET_SPACING_TYPE=AUDIO
AUD_MICIN_P
DIFFERENTIAL_PAIR=AUDIO_MIC_2
PP4V5_AUDIO_ANALOG
MIN_NECK_WIDTH=10MIL VOLTAGE=4.5V
MIN_LINE_WIDTH=25MIL
DIFFERENTIAL_PAIR=AUDIO_MIC_2
AUD_MICIN_N
NET_SPACING_TYPE=AUDIO
GND_AUDIO_CODEC
AUD_PCM_MBIAS
AUDIO_HP_MUTE_L
AUDIO_EXT_MCLK_SEL
I2S2_DEV_TO_SB_DTI
DIFFERENTIAL_PAIR=AUDIO_MIC_1
AUD_MIC_P1
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=25MIL VOLTAGE=4.5V
MIN_NECK_WIDTH=10MIL
GND_AUDIO_CODEC
MIN_LINE_WIDTH=25MIL VOLTAGE=5V
MIN_NECK_WIDTH=10MIL
102
102
102
102
102
101
102
101
102
102
98
98
98
100
98
100
98
98
102
MAKE_BASE=TRUE
101
96
100
96
96
95
102
102
102
96
95
96
96
96
98
95
25
7
95
7
100
95
25 95
7
95
25
MAKE_BASE=TRUE
25
MAKE_BASE=TRUE
25
25
25
25
25
25
25
7
101
98
7
98
101
101
101
98
95
7
95
95
95
95
95
25
25
25
95
Preliminary
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