Agilent Technologies FS2100, FS2101 User Manual

FuturePlus Systems Corporation

LOCAL BUS

Active Analysis Probe Users Manual-

FS2100 / FS2101

For Agilent Technologies Logic Analyzers

Revision 1.8

HOW TO REACH US 5

PRODUCT WARRANTY 6

Limitation of warranty 6

Exclusive Remedies 6

Assistance 6

INTRODUCTION 7

How to Use This Manual 7

ANALYZING THE PCI LOCAL BUS 8

Duplicating the Master Diskette 8

Accessories Supplied 8

Minimum Equipment Required 9

Signal Naming Conventions 9

Viewing the interrupts 10

Configuring the front panel switches and LEDs 10

Powering the PCI Active Analysis Probe 11

Connecting to the PCI Active Analysis Probe 11

Multiplexed versus Demultiplexed 12 32 bit PCI Demultiplexed 12 32 bit PCI Multiplexed 12 64 bit PCI Multiplexed 13 64 bit PCI Demultiplexed 13

USER PINS 14

Installing the PCI Active Analysis Probe 14

How to install a PCI add-in card into the extender card connector 15

Operation of the PCI add-in card 15

The Extender Card Connector 15

Setting up the Analyzer from the diskette 16

The PCI Inverse Assembler 17

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The Format Menu 17

The STAT variable 18 The ADDR, ADDR_B , ADDR_C, DATA_B and DATA variables 19 The BUS_UT variable 19 The L_CMD variable 19

Theory of Operation 20

The Input Buffers 20 The Latching Buffers 21 The interface to the Logic Analyzer 21 The Clocking and Cycle bit Generation Logic 21 The Data Parity Checking Logic 22

STATE ANALYSIS 23

Installation Quick Reference 23

Using the front panel switches in state mode 23

Acquiring Data 24

The State Display 24 Error Messages 25

INVASM OPTIONS 25

Setting up the Analyzer to use the PC Mapper Inverse Assembler 25

Acquiring Data 25

The State Display with the PCI PC Mapper 26 Error Messages 27

PCI PC Mapping for memory transactions 27

Interrupt Vector Table 28

PCI PC Mapping - I/O Transactions 30

TIMING ANALYSIS 33

Installation Quick Reference 33

Timing Mode Skew 33

Using the Cycle bits and L_CMD lines 34

Demultiplexed versus Multiplexed 34

Acquiring Data 34

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The Waveform Display 34

GENERAL INFORMATION 36

Characteristics 36

Analysis Probe Interface Compatibility 36

JTAG Boundary Scan 36

The PCI Present Pins 36

Standards Supported 36

Power Requirements 36

Logic Analyzer Required 36

Number of Probes Used 36

Minimum Clock Period (State) 37

Signal loading 37

Operations 37

Environmental Temperature 37

Altitude 37

Humidity 37

Testing and Troubleshooting 37

Servicing 37

Signal Connections 38

4

How to reach us

For Technical Support:

FuturePlus Systems Corporation 36 Olde English Road Bedford NH 03110 TEL: 603-471-2734 FAX: 603-471-2738 On the web

For Sales and Marketing Support: FuturePlus Systems Corporation TEL: 719-278-3540 FAX: 719-278-9586 On the web

FuturePlus Systems has technical sales representatives in several major countries. For an up to date listing please see

http://www.futureplus.com/contact.html.

Agilent Technologies is also an authorized reseller of many FuturePlus products. Contact any Agilent Technologies sales office for details

http://www.futureplus.com

.

5

Product Warranty

This FuturePlus Systems product has a warranty against defects in material and workmanship for a period of 1 year from the date of shipment. During the warranty period, FuturePlus Systems will, at its option, either replace or repair products proven to be defective. For warranty service or repair, this product must be returned to the factory.

For products returned to FuturePlus Systems for warranty service, the Buyer shall prepay shipping charges to FuturePlus Systems and FuturePlus Systems shall pay shipping charges to return the product to the Buyer. However, the Buyer shall pay all shipping charges, duties, and taxes for products returned to FuturePlus Systems from another country.

FuturePlus Systems warrants that its software and hardware designated by FuturePlus Systems for use with an instrument will execute its programming instructions when properly installed on that instrument. FuturePlus Systems does not warrant that the operation of the hardware or software will be uninterrupted or error-free.

Limitation of warranty

Exclusive Remedies

Assistance

The foregoing warranty shall not apply to defects resulting from improper or inadequate maintenance by the Buyer, Buyersupplied software or interfacing, unauthorized modification or misuse, operation outside of the environmental specifications for the product, or improper site preparation or maintenance. NO OTHER WARRANTY IS EXPRESSED OR IMPLIED. FUTUREPLUS SYSTEMS SPECIFICALLY DISCLAIMS THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.

THE REMEDIES PROVIDED HEREIN ARE BUYER’S SOLE AND EXCLUSIVE REMEDIES. FUTUREPLUS SYSTEMS SHALL NOT BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, WHETHER BASED ON CONTRACT, TORT, OR ANY OTHER LEGAL THEORY.

Product maintenance agreements and other customer assistance agreements are available for FuturePlus Systems products. For assistance, contact the factory.

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Introduction

The PCI Active Analysis Probe module provides a complete interface between any PCI add-in slot and Agilent Logic Analyzers. The Analysis Probe interface buffers and in state mode latches and decodes all PCI cycle types and transactions.

The PCI Active Analysis Probe is a passive bus monitor which does not assert any signals on the PCI bus. The PCI bus signals are buffered and then terminated with 90k ohm/10pf terminators so that they are impedance matched to the logic analyzer. Since the PCI Active Analysis Probe does contains high speed low skew buffers very little skew is introduced.

The configuration software on the diskette sets up the format specification menu of the logic analyzer for compatibility with your PCI bus. When the state configuration file is loaded, an inverse assembler is also loaded which decodes PCI transactions into easy to read mnemonics.

How to Use This Manual

This manual is organized to help you quickly find the information you need.

• Analyzing the PCI Local Bus chapter introduces you to the PCI Active Analysis Probe and lists the minimum equipment required and accessories supplied for PCI bus analysis.

• The State Analysis chapter explains how to configure the PCI Active Analysis Probe to perform state analysis on your PCI bus.

• The Timing Analysis chapter explains how to configure the PCI Active Analysis Probe to perform timing analysis on your PCI bus.

• The General Information chapter provides some general information including the operating characteristics for the PCI Active Analysis Probe module and the cable header pinout.

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Analyzing the PCI Local Bus

This chapter introduces you to the PCI Active Analysis Probe and lists the minimum equipment required and accessories supplied for PCI Local Bus analysis. This chapter also contains information that is common to both state and timing analysis.

Duplicating the Master Diskette

Accessories Supplied

Before you use the PCI Analysis Probe software, make a duplicate copy of the master diskette. Then store the master diskette and use the back-up copy to configure your logic analyzer. This will help prevent the possibility of losing or destroying the original files in the event the diskette wears out, is damaged, or a file is accidentally deleted.

To make a duplicate copy, use the Duplicate Diskette operation in the disk menu of your logic analyzer. For more information, refer to the reference manual for your logic analyzer.

The PCI Active Analysis Probe product consists of the following accessories:

• The Analysis Probe interface hardware, which includes the interface circuit module.

• one jumper which is installed on the circuit module.

• The inverse assembly and configuration software on a 3.5

inch diskette.

• 11 cables

• This operating manual

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The PCI Active Analysis Probe module

Minimum Equipment Required

Signal Naming Conventions

The minimum equipment required for analysis of a PCI Local Bus consists of the following equipment:

• 1660A/C, 1661A/C, 1662A/C, 16550A, 16554A, 16555A, 16556A, 1670A, 1671A, 1672A

• The PCI Active Analysis Probe Product

• A PCI target bus

This operating manual uses the same signal notation as the PCI LOCAL BUS SPECIFICATION - REVISION 2.1. That is, a # symbol at the end of a signal name indicates that the signals active state occurs when it is at a low voltage. The absence of a # symbol indicates that the signal is active at a high voltage.

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Viewing the interrupts

Pod 1 channel 0 can be configured to view any one of the four PCI interrupts. Move the jumper so that it corresponds to the

desired interrupt and that interrupt line will be routed to POD 1 channel 0. The jumper and interrupt stake pins are clearly labeled and are located under POD 7.

Interrupt Jumper

Pod 0 Channel 1 INT

I I I I N N N N T T T T A B C D

Configuring the front panel switches and LEDs

Switch Setting LED

Parity On Parity Checking

enabled

Parity On Parity checking

disabled

No Wait No Wait cycles

acquired

No Wait All Wait cycles

acquired

No Idle No Idle cycles

acquired

No Idle All Idle cycles

acquired

TDO/TDI TDO connected to

TDI

TDO/TDI TDO not connected

to TDI

ON

OFF

ON

OFF

ON

YES

No LED, switch in rightmost position

No LED, switch in

leftmost position State/Timing State ON State/Timing Timing OFF

10

Parity On

No Wait

No Idle

State

1 2 3 4

ON

Parity On No Wait No Idle TD0-TD1

State Timing

FuturePlus Systems

PCI Active Analysis Probe front panel

Powering the PCI Active Analysis Probe

Connecting to the PCI Active Analysis Probe

The active circuitry on the PCI Active Analysis Probe module gets its power from the logic analyzer PODs. No power is taken from the target PCI system. Please Note: If the Analysis

Probe is plugged into the PCI bus and the logic analyzer is not connected or powered up the input buffers on the Analysis Probe will create a low impedance path to ground thus inhibiting the PCI local bus and any card in the extender card connector from working.

The Logic analyzer must be connected and powered on for the PCI Active Analysis Probe to work properly. ONLY connect to the analysis probe headers 7-10 if you are doing 64 bit analysis. Latchup may occur on the 64 bit interface parts if they are powered on and not on a 64 bit bus.

The following explains how to connect the logic analyzer to the PCI Active Analysis Probe for either state or timing analysis:

1. Remove the probe tip assemblies from the logic analyzer cables.

2. Plug the logic analyzer cables into the PCI Active Analysis Probe cable headers as shown in the appropriate following tables.

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Multiplexed versus Demultiplexed

32 bit PCI Demultiplexed

The PCI Local Bus specification specifies that the AD lines and the C/BE lines carry different information at different times. This is referred to as multiplexed. Using the extra clocking features and additional pods of the logic analyzer the AD lines can be demultiplexed. By using the PCI Active Analysis Probe in demultiplexed mode the address of the transaction can be held throughout the transaction thus making triggering and performance analysis easier.

Please note that the C/BE lines have been demultiplexed on the PCI Active Analysis Probe. Thus the command is held through the transaction and no additional clocking or pods is required. The latched command L_CMD signals are on pod 1 channels 10-7.

Logic Analyzer PCI Active Analysis

Probe

Master POD 1 Header 1 POD 2 Header 2 POD 3 Header 3

Comment

32 bit PCI Multiplexed

POD 4 Header 4 POD 5 Header 5 16554/5/6/7

expander card POD 1

POD 6 Header 6 16554/5/6/7

expander card POD 2

Logic Analyzer PCI Active Analysis

Probe

Master POD 1 Header 1 POD 2 Header 2 POD 3 Header 3 POD 4 Header 4

Comment

12

64 bit PCI Multiplexed

Logic Analyzer PCI Active Analysis

Probe

Master POD 1 Header 1 POD 2 Header 2 POD 3 Header 3 POD 4 Header 4 POD 5 Header 7 16554/5/6/7

POD 6 Header 8 16554/5/6/7

POD 7 Header 11 16554/5/6/7

Comment

expander card POD 1

expander card POD 2

expander card POD 3

16550 expander

card Pod 1

64 bit PCI Demultiplexed

Logic Analyzer PCI Active Analysis

Probe

Master POD 1 Header 1 POD 2 Header 2 POD 3 Header 3 POD 4 Header 4 POD 5 Header 5 16554/5/6/7

POD 6 Header 6 16554/5/6/7

POD 7 Header 7 16554/5/6/7

POD 8 Header 8 16554/5/6/7

Comment

expander card POD 1

expander card POD 2

expander card POD 3

16550 expander

card Pod 1

expander card POD 4

16550 expander

card Pod 2

13

POD 9 Header 9 16554/5/6/7

expander 2 card POD 1

16550 expander

card Pod 3

POD 10 Header 10 16554/5/6/7

expander card POD 2

16550 expander

card Pod 4

POD 11 Header 11 16554/5/6/7

expander card POD 3

16550 expander

card Pod 5

USER PINS

Installing the PCI Active Analysis Probe

PCI Active Analysis Probe Header 4 contains 8 User Defined pins. These pins are available to the user to connect whatever additional signals the users wishes to view along with the PCI bus. These pins are located below POD 3 on the PCI Active

Analysis Probe module and clearly marked are available on the logic analyzer on POD 11 channels 15 thru

8. These pins may be used to connect the individual IDSEL signals

from other PCI slots or the bus grant signals from the PCI bus arbitration logic.

The PCI Active Analysis Probe can be installed in any slot of the PCI Local bus. The following steps explain how to install the PCI Active Analysis Probe into the PCI Local bus.

1. Install the logic analyzer cables as described in the previous section.

2. Power off the PCI target. Align the PCI module with the appropriate slot on the target system and plug the module into the PCI connector. Power on the logic analyzer and then power on the target.

If your PCI Local bus is 32 bits the upper portion of the edge connector will not be inserted into any connector. This will not affect the modules operation on a 32-bit PCI Local bus.

. These user pins

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How to install a PCI add-in card into the extender card connector

Operation of the PCI add-in card

The card edge connector of the PCI Active Analysis Probe module can accommodate one 32 or 64 bit 5V OR 3V PCI add in card. The extender card connector is either a 3V or 5V connector depending on how the board was ordered and configured at the factory.

Simply align the module with the connector and gently push the module in until it is seated in the connector. There is sufficient clearance for the add-in card front plate. The PCI Active Analysis Probe/PCI add-in card combination can then be installed in any slot of the PCI Local bus. For mechanical stability the PCI Active Analysis Probe front plate should be secured to the PCI target system chassis.

When removing the PCI add-in card from the card edge extender connector grasp the PCI Active Analysis Probe with one hand and the PCI add-in card with the other. Gently rock the PCI addin card until it is free from the connector.

The nature of an extender card is that it extends the etch length of the bus. Due to the sensitivity of most PCI designs, extending the etch length can interfere with the PCI add-in card operation. Operation of the PCI add-in card when installed in the card edge extender connector is not guaranteed. Please check your system design if you experience failures due to poor signal fidelity.

The Extender Card Connector

The etch from the PCI local bus is routed directly from the PCI local bus to the extender card connector. Although the etch is connected to the input of the PCI Active Analysis Probe input buffers, the extender card connector is NOT buffered from the PCI local bus.

Please Note: If the Analysis Probe is plugged into the PCI bus and the logic analyzer is not powered up, the input buffers on the Analysis Probe will create a low impedance path to ground thus inhibiting the PCI local bus and any card in the extender card connector from working.

The PCI bus is extended up from the gold fingers to the input of the IDT162260 buffers. From the buffer input the etch goes directly to the extender card connector. The buffer input provides a clamping diode. The etch is extended approximately 5 inches from the gold fingers and is on the inner most layer of the board. There are no via’s on this inner layer in order to give this etch a direct route.

One issue that has been encountered with using the extender card connector is that the buffers need power in order to provide a high impedance to the signal. This means that the logic analyzer must be attached to the Analysis Probe and powered up. The PCI Active Analysis Probe module itself is a universal card. It can operate in either a 5V or 3V PCI system.

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