Xilinx Kintex-7 FPGA KC705 Evaluation Kit Getting Started Manual
Kintex-7 FPGA KC705
Evaluation Kit
(Vivado Design Suite 2013.2)
Getting Started Guide
UG883 (v4.0.1) May 28, 2014
XPM 0402894-05
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), even though we are providing to you a copy of the corresponding source code as provided
.
), and you may too. Xilinx made no changes to the software
; IP cores may be
KC705 Getting Started Guide www.xilinx.com UG883 (v4.0.1) May 28, 2014
Revision History
The following table shows the revision history for this document.
Date Version Revision
01/13/2012 1.0 Initial Xilinx release.
01/25/2012 1.1 Changed document title. Added BIST section. Changed Platform Flash to BPI Linear Flash.
Added a note after Figure 30. Updated photos in Figure 2, Figure 3, and Figure 31.
02/27/2012 1.1.1 Added a note to Hardware Test Setup Requirements.
07/10/2012 1.2 Added XPN number to title page. Updated Introduction and Hardware Test Setup Requirements.
Added Kit Contents, AMS Bring-up with the AMS101 Evaluation Card, and AMS Bring-up with
the AMS101 Evaluation Card. Added Appendix B, Warranty. Removed “Modifying the
Kintex-7 FPGA Base TRD” section.
12/20/12 2.0 The document was updated for Vivado™ Design Suite 2012.4. Agile Mixed Signal is now Analog
Mixed Signal. The USB stick is removed from the kit and instead, design files are accessible from
the Docs & Designs tab at www.xilinx.com/kc705
sections including these:
• Kit Contents, page 8
• Hardware Test Setup Requirements, page 9
• AMS Bring-up with the AMS101 Evaluation Card, page 15
•Step 4 in Install the Linux Driver, page 26.
The first bullet under Introduction, page 7 removed “transceivers by using the LogiCORE™
IP Integrated Bit Error Ratio (IBERT) core”.
“cord and brick” changed to “12V power adapter.” Removed the Transceiver Bring-up Using
Integrated Bit Error Ratio Test section on page 14. Requirements to Get Started, page 14 installation
method a and step 3 changed. The use of the ChipScope™ tool is eliminated. Step 2 of Evaluating
AMS, page 17 changed. Below Figure 9, this sentence was deleted: AMS Evaluator source code is
not provided. CD-ROM was replaced with DVD-ROM. Appendix A, Additional Resources was
reorganized.
04/16/2013 3.0 Added third, fourth, and fifth bullets in AMS Bring-up with the AMS101 Evaluation Card,
page 15. Updated step 2 and step 3 in Requirements to Get Started, page 14. Updated step 2 in
Evaluating AMS, page 17. Added eighth bullet in Hardware Test Setup Requirements, page 21.
07/02/2013 4.0 Updated Figure 7. Added Tab le 2 . Replaced Requirements to Get Started with Getting Started,
page 16. Updated links in Further Resources, page 37
05/28/2014 4.0.1 Changed the print number on the title page.
. Removing the USB stick affected many
Under KC705 Evaluation Board Setup, page 10,
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KC705 Getting Started Guide www.xilinx.com UG883 (v4.0.1) May 28, 2014
Table of Contents
Send Feedback
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Getting Started with the
Kintex-7 FPGA KC705 Evaluation Kit
(Vivado Design Suite 2013.2)
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Kit Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Basic Hardware Bring-up Using the BIST. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Hardware Test Board Setup Requirements. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
AMS Bring-up with the AMS101 Evaluation Card . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Advanced Bring-up Using the Base Targeted Reference Design . . . . . . . . . . . . . . 19
Appendix A: Additional Resources
Xilinx Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Solution Centers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Further Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Appendix B: Warranty
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UG883 (v4.0.1) May 28, 2014
Getting Started with the
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Kintex-7 FPGA KC705 Evaluation Kit
(Vivado Design Suite 2013.2)
Introduction
The Kintex®-7 FPGA KC705 evaluation kit provides a comprehensive, high-performance
development and demonstration platform using the Kintex-7 FPGA family for
high-bandwidth and high-performance applications in multiple market segments. The kit
enables designing with DDR3, I/O expansion through FMC, and common serial
standards, such as PCI Express®, XAUI, and proprietary serial standards through the SMA
interface. See the KC705 Evaluation Board for the Kintex-7 FPGA User Guide (UG810
KC705 support website
The built-in self-test (BIST) and Kintex-7 FPGA Base Targeted Reference Design (TRD) are
developed on this kit.
This Getting Started Guide is divided into two sections:
• Basic Hardware Bring-up: Enables hands-on operation of all the features in the BIST
as well as evaluation of Analog Mixed Signal (AMS) using the AMS101 evaluation
card.
• Advanced Operation: Enables hands-on operation with the base TRD, which features
PCIe, DDR3 memory, and AXI—all supported through a custom evaluation graphical
user interface (GUI).
.
) and the
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Kit Contents
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Kit Contents
The Kintex-7 FPGA KC705 evaluation kit includes:
• KC705 EK-K7-KC705-G base board, including the XC7K325T-2FFG900C FPGA.
• AMS101 evaluation card, enabling evaluation of the AMS technology built into all
7seriesFPGAs.
• Software and licenses:
• Vivado™ Design Suite Installation DVD.
• Printed entitlement voucher: Provides entitlement of the Vivado Design Suite
Logic Edition device-locked to the XC7K325T-2FFG900 FPGA. Follow the printed
instructions on the voucher to redeem your software entitlement.
• Fedora 16 Live DVD to support the Base Targeted Reference Design.
•Designs:
• Targeted Reference Design: Robust sub-system including PCIe Gen2 x4,
Northwest Logic DMA, multi-port virtual FIFO, AXI, and DDR3 memory
controller.
• Additional Reference Designs: Numerous additional reference designs available
online and linked from the KC705 product page w
• Documentation:
• Kintex-7 FPGA KC705 Evaluation Kit Getting Started Guide (UG883
included in the box)
• KC705 Evaluation Board for the Kintex-7 FPGA User Guide (UG810
product page)
• KC705 Reference Design User Guide (UG845
• Kintex-7 FPGA KC705 Base Targeted Reference Design User Guide (Vivado Design
Suite 2012.4) (UG882
• Board design files including schematics, Gerber files, and BOM (online on
product page)
• Cables and power supply:
• Universal 12V power adapter and cords
• Two USB cables (1x USB Type-A/Mini-B and 1x USB Type-A/Micro-B) for
download and debug
• Ethernet crossover cable
•HDMI cable
) (online on product page)
) (online on product page)
ww.xilinx.com/kc705.
—this guide,
) (online on
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Basic Hardware Bring-up Using the BIST
BPI Flash (U58)
USB-UART
(J6)
UG883_01_040913
Powe r Switch
(SW15)
Power (J49)
USB-JTAG
(U59)
Ethernet
(U37)
User Push Buttons
DDR3
Mode Switches
(SW13)
Rotary Switch (SW8)
Switch is underneath LCD screen
Prog
CPU Reset
User LEDs
User DIP (SW11)
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The built-in self-test (BIST) tests many of the features offered by the Kintex-7 FPGA KC705
evaluation kit. The test is stored in the nonvolatile BPI Linear Flash memory, and
configures the FPGA when the mode and upper flash address pins on the board are set for
Master BPI.
Figure 1 provides an overview of the board features used by the BIST.
X-Ref Target - Figure 1
Basic Hardware Bring-up Using the BIST
Figure 1: KC705 Board Features Used by the BIST
Note:
Kintex-7 FPGA User Guide (UG810
For a diagram of all the features on the KC705, see KC705 Evaluation Board for the
).
Hardware Test Setup Requirements
The prerequisites for testing the design in hardware are:
• KC705 Evaluation board with the Kintex-7 FPGA XC7K325T-2FFG900CES device
• USB-to-Mini-B cable (for UART)
• AC power adapter (12 VDC)
• Terminal program [Ref 3]
Note:
used.
• USB-UART drivers from SiLabs [Ref 4]
The Tera Term Pro program is used for illustrative purposes. Other programs can be
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Hardware Test Board Setup Requirements
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Hardware Test Board Setup Requirements
This section details the hardware setup and use of the terminal program for running the
BIST application. It contains step-by-step instructions for board bring-up.
KC705 Evaluation Board Setup
1. Set the jumpers and switches on the KC705 board as follows:
• The mode switches (SW13) are set for Master BPI mode 010.
• The upper flash address switches (SW13) are set to 11.
2. Verify the switch and jumper settings are set as shown in Ta bl e 1 and Figure 2.
Note:
from the 12V power adapter included with the KC705 evaluation kit.
Tab le 1 : Switch & Jumper Settings
For this application, the board should be set up as a stand-alone system, with power coming
Switch Setting
SW15
SW11
SW13
Board Power slide-switch
.. Off
User GPIO DIP switch
4Off
3Off
2Off
1Off
Configuration Mode switch
5Off
4On
3Off
2On
1On
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X-Ref Target - Figure 2
UG883_02_040913
UG883_03_011912
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Hardware Test Board Setup Requirements
Figure 2: BIST Switch and Jumper Settings
Hardware Bring-Up
This section details the steps for hardware bring-up:
1. With the board switched off, plug a USB-to-Mini-B cable into the UART port of the
KC705 board and your PC (see Figure 3).
X-Ref Target - Figure 3
2. Install the power cable.
3. Switch the KC705 board power to ON.
Figure 3: KC705 with the UART and Power Cable Attached
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Hardware Test Board Setup Requirements
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Install the UART Driver
1. Run the downloaded executable UART-USB driver file listed in Hardware Test Setup
Requirements, page 9. This enables UART-USB communications with a host PC (see
Figure 4).
X-Ref Target - Figure 4
UG883_04_011512
Figure 4: UART Cable Driver Installation
2. Set the USB-UART connection to a known port in the Device Manager as follows:
•Right-click My Computer and select Properties.
• Select the Hardware tab, then click the Device Manager button.
• Find and right-click the Silicon Labs device in the list. Then select Properties.
•Click the Port Settings tab and the Advanced… button.
• Select an open COM port between COM1 and COM4.
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