SUPRA CS6230Z, CS6818, STV2910MS Service manual & schematics

Page 1

SERVICE MANUAL

MODEL: CS6230Z CHASSIS: Z66 & RM111

COLO	JR TELEV	ISION	RECE	VER


SPECIFICATIONS Television System :	PAL,SECAM - B/G,D/K	,I, NTSC 3.58,4	.43, Remote Contro	ol Multi Syst	em
Receiving Channel :	System	PAL/SECAM	PAL/	SECAM-K1	NTSC-M
	Band	B/G, I	SECAM D/K	PAL-D
	VHF	2 - 12	1 - 13	2 - 9	2 - 13
	UHF	21 - 69	21 - 69	13 - 57	14 - 69
Intermediate Frequency :	System I-F Carrier Frequency	PAL/ SECAM B/G	PAL/SECAM D/I SECAM-K1	C PAL - I	NTSC-M
	Picture I-F Carrier	38.00	38.00	38.00	38.00
	Sound I-F Carrier	32.50	31.50	32.00	33.50
	Colour Sub Carrier	33.57	33.57	33.57	34.42
				(Units:M	Hz)
Picture Tube :	25" A59KPR84X01, A59K	PR84X01/-200	MG diagonal meas	ured. Ouick-	-start.
	In-line-gun, Black stripe,	110° degrees de	flection
Power Requirements :	AC 120 - 280 V , 50/60	Hz , 125 WAT	r
Antenna Input Impedance :	VHF,UHF : Telescopic d	lipole antenna (	75 Ohm unbalance	d type)
Speaker :	Impedance: 8 Ohm, 10	). W + 10W		4 E - 7
Features :	Voltage synthesized tunin	g System, On-se	creen Display. Aut	o-Fine Tunir	1 0 .
	Dark Tube, Auto Brightn	ess/Contrast Co	ontrol, 37-Key Tran	smitter.	0

SAFETY CAUTION :

Before servicing this chassis, it is important that a service technician reads and follows the "Safety Precaution" and "Product Safety Notice" in this Service Manual.

* For continued X-radiation, replace the picture tube with original type.

* Design and specifications are subject to change without prior notice.

* WARNING-SHOCK HAZARDS - Use an isolation transformer when servicing.

Page 2

For Safe Use

1. Read all of these instructions.
2. Save these instructions for later use.
3. Unplug this television receiver from the wall outlet before cleaning. Do not use liquid or aerosol for cleaning.

4. Do not use attachments not recommended by the television receiver manufacturer as they may cause hazards.
5. Do not use this television receiver near water for example, near a bathtub, washbowl, kitchen sink, or laundry tub, in a wet basement, or near a swimming pool, etc.
6. Do not place this television receiver on an unstable cart, stand, or table. If the television receiver falls, it may cause serious injury to a child or an adult, and serious damage to the appliance. Use only with a cart or stand recommended by the manufacturer, or sold with the television receiver. Wall or shelf mounting should follow the manufacturer's instructions, and should use a mounting kit approved by the manufacturer.
7. Slots and openings in the back and bottom of the cabinet are provided for ventilation, and to insure reliable operation of the television receiver and to protect it from overheating. These openings must not be blocked or covered. The openings should never be blocked by placing the television receiver in a built-in installation such as a bookcase unless proper ventilation is provided.
8. This television receiver should be operated only from the type of power source indicated on the marking label. If you are not sure of the type of power supplied to your home, consult your television dealer or local power complany. For television receivers designed to be operated from battery power refer to the operating instructions.

9. This television receiver is equipped with a polarized alternating-current line plug(a plug having one blade wider than the other.) This plug will fit the power outlet only one way. This is a safe feature. If you are unable to insert the

plug fully into the outlet, try reversing the plug. If the plug still doesn't fit, contact your electrician to replace your obsolete outlet. Do not defeat the safety purpose on the polarized plug.

If your television receiver has a threewire grounding-type plug, please note the following. This television receiver is equipped with a 3-wire grounding type plug(a plug having a third(grounding) pin). This plug will only fit into a grounding type power outlet. This is a safe feature. If you are unable to insert the plug into the outlete, contact your electrician to replace your obsolete outlet. Do not defeat the safety purpose of the grounding plug.

Page 3

10. Do not allow anything to rest on the power cord. Do not locate this television receiver where the cord will be abused by persons walking on it.

11. Follow all warmings and instructions marked on the television receiver.
12. If an outside antenna is connected to the television receiver, be sure the antenna system is grounded so as to provide some protection against voltage surges and built up static charges. Section 810 of the National Electrical Code, NFPA No. 70-1975 provides infomation with respect to proper grounding of the mast and supporting structure, grounding of the lead-in wire to an antenna discharge unit, size of grounding conductors, location of an antenna dicharge unit, connection to grounding electrodes, and requirements for the grounding electrodes. See Figure 1.

13. For added protection for this television receiver during a lightening storm, or when it is unattended and unused for a long period of time, unplug it form the wall outlet and disconnect the antenna. This will prevent the receiver from damages due to lightning and power-line surges.
14. An outside antenna system should not be located in the vicinity of overhead power lines, other electric light, power circuits, or where it can fall into such power lines or circuits. When installing an outside antenna system, extreme care should be taken to keep from touching such power lines or circuits as contact with them might be fatal.
15. Do not overload wall outlets and extension cords as this can result in a fire or an electric shock.
16. Never push any kinds of objects into this television receiver through cabinet slots as they may touch dangerous voltage points or short out parts that could result in a fire or an electric shock. Never spill any kinds of liquid on the television receiver.
17. Do not atempt to service this television receiver yourself as opening or removing covers may expose you to dangerous voltage or other hazards. Refer all service to a qualified service personnel.

18. Unplug this television receiver from the wall outlet and refer service to a qualified service personnel under the following conditions:
- a. When the power cord or plug is damaged or frayed.
- b. If liquid has been spilled into the television receiver.
- c. If the television receiver has been exposed to rain or water.
- d. If the television receiver does not operate normally by following the operating instructions. Adjust only those controls that are covered by the operating instructions as improper adjustment of other controls may result in damage and will often requir extensive work by a qualified technician to restore the television receiver to the normal operation.
- e. If the television receiver has been dropped or the cabinet has been damaged.
- f. When the television receiver exhibits a distinct change in performance, this indicates a need for service.
19. When replacement parts are required, be sure the service technician has used the replacement parts specified by the manufacturer that have the same characteristics as the original part. Unauthorized substitutions may result in a fire, an electric shock, or other hazards.
20. Upon completion of any service or repairs to this television receiver, ask the service technician to perform routine safety checks to determine that the television is in safe operating condition.
21. Television equipment and car combination should be moved with care. Quick stops, excessive force, and uneven surfaces may cause the equipment and cart combination to overturm.

Page 4

PRODUCT SAFETY NOTICE

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These characteristics are often passed unnoticed by visual inspection and the protection afforded by them cannot necessarily be obtained by using replacement components rated for higher voltage, wattage, etc. Replacement parts which have these special safety characteristics are identified in this manual and its supplements;

the electrical components having such features are identified by asterisks the parts list. Before replacing any of these components, read the parts list in this manual carefully. The use of subsititute parts which do not have the same safety characteristics as specified in the parts list may create a shock, a fire,X- radiation or other hazards.

SERVICE NOTES

1. When replacing the parts or the circuit boards, clamp the lead wires to terminals before soldering.
2. When replacing a high wattage resistor (metal oxide film resistor) on circuit board, keep the resistor away from the circuit board about 10mm (1/2 in).
3. Keep the wires away from high voltage or high temperature components.
4. If any fuse in this TV receiver opens replace it only with the fuse specified in the chassis parts list.

The lighting flash and arrowhead within the triangle is a warning sign alerting you of "dangerous voltage" inside the product.

CAUSION

RISK OF AN ELECTRIC SHOCK DO NOT OPEN

CAUTION : To reduce the risk of an electric shock, do not remove cover (or back). No user serviceable parts inside. Refer servicing to a qualified service personnel.

The exclamation point within the triangle is a warning sign alerting you of important instructions accompanying the product.

*IN CASE OF3312 SERIES3313 SERIES3315 SERIES3325 SERIES3327 SERIES3827 SERIES5012 SERIES5013 SERIES5025 SERIES5026 SERIES5027 SERIES5027 SERIES5022 SERIES

PULL THE CHASSIS-RAIL TO BESIDE (1) THEN SEPARATE THE CHASSIS (2)

*IN CASE OF 3351 SERIES 3357 SERIES 3857 SERIES 5057 SERIES

AT FIRST PUSH THE LOCK SWITCH,((1)) THEN TAKE OUT THE CHASSIS. ((2)) CODE NO ; 38114-699-710

Page 5

X-RADIATION PRECAUTION

Excessive high voltage can produce potentially hazardous X-RADIATION. To avoid such hazards, the high voltage must not exceed the specified limit. The norminal value of the high voltage of this receiver is 24.0KV at zero beam current (minimum brightness). The high voltage must not, under any circumstances, exceed 30KV. Each time a receiver requires servicing and the high voltage should be checked following the HIGH VOLTAGE CHECK procedures in this manual. It is recommended that the reading of the high voltage should be recorded as a part of the service record. It is important to use an accurate and reliable high voltage meter.
2. This receiver is equipped with a Fail Safe (FS)circuit which prevents the receiver from producing an excessively high

voltage even if the B⁺ voltage increases abnormally. Each time the receiver is serviced, the FS circuit must be checked to determine that the circuit is properly functioning, following the FS CIRCUIT CHECK procedures in this manual.

3. The only source of X-RADIATION is this TV receiver. It is the picture tube. For continued X-RADIATION protection, the replacement tube must be exactly the same type as specified in the parts list.
4. Some parts in this receiver have special safety related characteristics for X-RADIATION protection. For continued safety, the parts replacement should be undertaken only after referring to the PRODUCT SAFETY NOTICE.

SAFETY PRECAUTION

Warning : Serivce should not be attempted by anyone unfamiliar with the necessary precautions on this receiver. The followings are the necessary precautions to be observed before servicing this chassis. Since the chassis of this receiver is directly connected to the AC power line-(Hot chassis), an isolation transformer should be used during any dynamic service to avoid possible shock hazards.
Always discharge the picture tube anode to the CRT conductive coating before handling the picture tube. The picture tube is highly evacuated and if broken, glass fragments will be violently expelled. Use shatter proof goggles and keep picture tube away from the unprotected body during handling.
2. When replacing a chassis in the cabinet, always be certain that all the protective devices are put back in place, such as non metallic control knobs, insulating covers, shields, isolation resistor, capacitor, network, etc.
3. Before returning the set to a customer, always perform an AC leakage current check on the exposed metallic parts of the cabinet, such as antennas, terminals, screwheads, metal overlays, control shafts, etc. To be sure the set is safe to operate without danger of an electrical shock. Plug the AC line cord directly to a AC outlet (do not use a line isolation transformer during this check). Use an AC voltmeter having 5000 ohms per volt or more sensitivity in the following manner: Connect a 1500 ohm 10 watt resistor, paralleled by a 0.15 uF. AC type capacitor, between a known good earth oround(water pipe, conduit, etc.) and the exposed metallic parts, one at a time. Measure the AC voltage across the combination of 1500 obm resistor and 0 15mfd canacitor. Reverse the AC plug at the AC outlet and repeat the AC voltage measurements for each exposed metallic part. The measured voltage must not exceed 0.3 volts RMS. This corresponds to 0.5 milliamp AC. Any value exceeding this limit constitutes a potential shock hazard and must be corrected immediately.

Page 6

1. INSTRUCTION
1. IC LINE UP	•••••••••••••••••••••••••••••••••••••••
2. MEANS OF COMPONENTS NUMBER SEF	RIES
3. ABBREVIATION	•••••••••••••••••••••••••••••••••••••••
2. BLOCK DIAGRAM
3. POWER SUPPLY SECTION(SP-210)
1. INSTRUCTION
2. BLOCK-DIAGRAM
3. FLYBACK PATTERN SMPS
FUNDAMENTAL THEORY	3.4
4. MASTER-SLAVE STRUCTURE ·····	E
5. PRIMARY CIRCUIT (TEA2260) ·····	5-8
6. SECONDARY CIRCUIT (TEA5170) ······	9-12
7. TROUBLESHOOTING OF POWER STAGE	13
4. MULTI COLOR VIDEO, CHROMA,
DEFLECTION SECTION(TA8659AN)
1. INSTRUCTION	14
2. BLOCK-DIAGRAM ·····	15
3. CHARACTERISTICS	16-18
4. TERMINAL DESCRIPTION	18-22
5. OPERATING INSTRUCTIONS ·····	23
6. VIDEO SYSTEM
1) BLOCK-DIAGRAM	24
2) INSTRUCTION	25-27
7. CHROMA SYSTEM
1) BLOCK-DIAGRAM ·····	28
2) PAL/NTSC CHROMA PROCESSING	29
3) SECAM CHROMA PROCESSING	29
4) APC SEARCH AND SYSTEM IDENTIFICA	ATION
	29-31
5) OTHERS ·····
8. DEFLECTION SYSTEM
1) BLOCK-DIAGRAM ·····
2) SYNC SEPARATION CIRCUIT	33-34
3) HORIZONTAL AFC CIRCUIT
4) OPERATING PRINCIPLE	35-37
5) VERTICAL DRIVE OUTPUT SECTION
5. SYSTEM SWITCHING SECTION (TA8615N)
1 SIF SWITCHING

2. CHROMA SWITCHING41
6. DEFLECTION SECTION
1. DEFLECTION NON-MOVEMENT42
2. THE ANALYSIS OF THE VERTICAL CONTROL
CIRCUIT42-43
3. DIODE MODULATION SYSTEM ACTUATING THEORY
43-44
4. THE PRACTICAL APPLICATION CIRCUIT
5. SIDEPINCUSHION MODULATION46-49
7. μ -COM SECTION(SMM-111)
1. INSTRUCTION 50
2. OUTLINE FOR SMM-111 SPECIFICATIONS
3. SYSTEM KIT CONFIGURATION51
4. THE ILLUSTRATION OF RM-111 SYSTEM BLOCK
51
5. MICROCOMPUTER (SMM-111) TERMINALS
DESCRIPTION52-56
6. CIRCUIT DESCRIPTION56-59
8. INSTRUCTION MANUAL
1. FRONT PANEL60
2. CONTROL FUNCTIONS (FRONT)60-61
3. TRANSMITTERS PANEL ·····61
4. CONTROL FUNCTIONS(TRANSMITTERS) ·······62-64
9. SEMICONDUCTOR SPECIFICATION
1. DECADE COUNTER/DIVIDER(TC4017BP)65
2. SYSTEM SWITCH FOR A MULTI-COLOR TV
(TA8615N) ······66-73
3. VIDEO AND SOUND IF FOR TV SET(TA8700N)
74-77
4. PIF/SIF SYSTEM FOR TV(TA8700N)
1) PIF PART78
?) SIF PART78-79
5. AV SWITCH FOR COLOR TV WITH S-TERMINAL
(TA8720AN)
6. DUAL AUDIO POWER AMPLIFIER (TA8200AH) ··83-85
10. ALIGNMENT AND ADJUSTMENT
1. GENERAL86
2. MAGNIFIED RESPONSE ALIGNMENT
3. AFC RESPONSE ALIGNMENT

Page 7

4. 4.5MHZ, 6.0MHZ TRAP ALIGNMENT88
5. SOUND DETECTION ALIGNMENT
6. SIF CONVERTER ALIGNMENT
7. SIF IDENT ALIGNMENT
8. B ⁺ VOLTAGE ADJUSTMENT90
9. FOCUS ADJUSTMENT90
10. VERTICAL HEIGHT AND LINEARITY ADJUSTMENT
90-91
11. E-W CORRECTION & HORIZONTAL SIZE
ADJUSTMENT91
12. COLOR MATRIX ADJUSTMENT91
13. SECAM COLOR IDENT ALIGMENT91

14. BELL FILTER ALIGNMENT ....................................

15. SECAM CHROMA DET, VR ALIGNMENT92
16. PURITY ADJUSTMENT92-93
17. CENTER CONVERGENCE ADJUSTMENT94
18. WHITE BALANCE ADJUSTMENT94-95
19. CIRCUMFERENCE CONVERGENCE ADJUSTMENT
95-96
20. R.F AGC ADJUSTEMENT96-97
21. SUB-BRIGHTNESS ADJUSTMENT97
11. TROBLESHOOTING CHARTS98-102
12. CHASSIS REPLACEMENT PARTS LIST103-115
13. EXPLODED-VIEW & PARTS-LIST116-117
14. SCHEMATIC-DIAGRAM ······118
15. PWB LOCATION & PATTERN

MEMO

1

	] .

	1	· ·
	1
· ·	1
	1
	1















	ĺ

	ľ
	ļ
	ŀ
	L

Page 8

3. POWER SUPPLY SECTION (SP-210)

1. INSTRUCTION

Through the SP210 is the discontinous mode flyback SMPS, it is moved with the fixed frequency.

At the fundamental, the regulation consists of the PWM system and it is moved with Burst Mode during stand-by. Also, it consists of the Master-Slave structure and should be the Line Locking by the Heater pulse of FBT.

2. BLOCK-DIAGRAM

3. FLYBACK PATTERN SMPS FUNDAMENTAL THEORY.

1) WHEN THE SWITCH CLOSES.

At the figure 2, the switching TR Q801 was appeared with the simple switch. The Loop current Ic of the first side increases with the vertical line during switch-on. After the Ton passes, if the switch turns off, then the IC peak current Ip is Ip= V_IN Ton (1)

V_IN :The refined DC by Bridge Diode L_P : Transformer the first inductance

Fig. 2 Simplified Diagram of Flyback SPMS

Page 9

2) WHEN THE SWITCH OPENS

The magnetic field within the transformer core can't do the sudden change of the non-linear.

That is to say, the magnetic field quantity at the just before and after Turn-off is equalled.

As the magnetic field quantity is proportion to the Ampere-Turn value, the Ampere-Turn value of the primary and secondary wire wound is equalled at the just before and after turnoff. I_D.N_s=I_P · N_P

I_D: The second side Diode current

N_s : Trans the second Turn number

N_P : Trans the first Turn number

$I_{\rm D} = \frac{N_{\rm p}}{N_{\rm s}} \cdot I_{\rm P}$

So, with the secondary Diode, the next current flows. As the secondary output voltage is fixed to Vo, after ID decrease the Vo obliquity.

In a ID+0 moment, right now it calls the Discontinuous Mode because the switch don't become ON.

The (Vo-Vd) voltage is caught on the secondary wire wound duing the ID flows. So the just Voltage appeares with the voltage superposition at the primary both switch units.

(Namely Vr is a superposition in connection with

$\frac{N_s}{N_P} = \frac{V_O}{V_r}$

So the voltage between switching TR C-E is making a staircase form.

In a I_D=0 moment, right now the switching device may not be ON

After ID flows, the occuring damped oscillation is base up the LP and the snubber circuit R(See fig.3)

3) REGULATION

Just before Turn-off, the accumulating magnetic energy to Lp is Ein= 1. Lp lp²

If the switching is repeated with the regularity frequency F,

the each secondary energy providing to Lp is $P_{IN} = \frac{1}{2} Lp lp^2 \left( \frac{1}{T_{ON} + T_{OFF}} \right) = \frac{1}{2} Lp \cdot lp^2 \cdot lp^2$

The power providing to Lp is the efficiency y value. And if it conveys to the secondary and is exhausted, the comsumption power is

$P_{O} = IO \ VO = Y \ PIN$ $\therefore I_{O} \ V_{O} = y \ \cdot \ \frac{1}{2} \ \cdot \ Lp \ Ip2 \ \cdot \ f \ \leftarrow \ (I_{P} = \frac{V_{IN}}{L_{P}} \ T_{ON})$ $V_{O} = \ \frac{y \ \cdot (V_{IN} \ \cdot \ T_{ON})^{2}}{2L_{P} \ \cdot \ I_{O}} \ \cdot \ f$

As the SP-210 fixes the switching frequency for Line Locking, V_IN · T_ON = Consto may be done if Vo maintains regularily.

Namely, it must be controlled to take inverse proportion with VIN.

For this, the PWM is used.

Page 10

4. MASTER-SLAVE STRUCTURE.

In this configuration the master circuit(TEA 5170) located on the secondary side generates PWM pulses used for output voltage regulation. These pulses are sent via a pulse transformer(T802) to the slave circuit(Fig.4).

In this mode of operation, the falling edge of the PWM signal may be synchronized with an sync pulse. By this way the switching-off time of the power transistor, which generates lots of noises, can be synchronized on the line flyback signal.

Fig. 4. Master-Slave Structure

5. PRIMARY CIRCUIT. (TEA 2260)

1) DESCRIPTION

The TEA2260 is a integrated circuit for the use in primary part(slave).

All functions required for SMPS control under normal operating transient or abnormal conditions are provided.

2) PIN CONNECTIONS.

1 IS	Transformer demagnetization
sensing input
21N	Secondary pulses input
3. IMAX	Power transistor current
	limitation input
4. GND	Ground
5. GND	Ground
6. E	Error amplifier input(invertin)
7. S	Error amplifier output

8. C2 Overload integration capacitor 9. C1 Soft-start capacitor 10. CO Oscillator capacitor 11. RO Oscillator capacitor 12. GND Ground 13. GND Ground 14. OUT Power output 15. V+ Positive output stage supply 16. V_CC Power supply

Page 11

3) BLOCK DIAGRAM

-6 -

Page 12

4) OPERATING DESCRIPTION

(1) STARTING MODE - STAND BY MODE

Power for circuit supply is taken from the mains through a high value resistor(R800) before starting. As long as VCC of the TEA2260 is below VCCstart(7.4V). the quiescent current is very low (typically 0.7mA) and the electrolytic capacitor across VCC is linearly charged. When VCC reaches VCCstart (typically 10 3V), the circuit starts, generating output pulses with a soft-startng. Then the SMPS goes into the stand-by mode and the output voltages are appeared. For this, the TEA2260 contains all the functions required for primary mode regulation : a fixed frequency oscillator, a reference voltage, an error amplifier and a pulse width modulator(PWM). For transmission of low power with a good efficiency in stand-by, an automatic burst generation system is used, which generates bursts with a varying period as a function of the output power.(fig. 7)

COLLECTOR CURRENT ENVELOP

DETAIL OF ONE BURST

Fig. 7 BURST MODE OPERATION

(2) NORMAL MODE

The normal operating of the TV set is obtained by sending to the TEA2260 regulation pulses generated by a regulator(TEA5170) located in the secondary side of the power supply.

Stand-by mode or normal mode are obtained by supplying or not the secondary regulator. This can be controlled by the power control of the microprocessor. (RIC01)

The transition : normal mode - stand-by mode is made automatically by secondary regulation pulses occurence or disappearance.

Regulation pulses are applied to the TEA2260 through a small pulse-transformer(T802) to the IN input(pin 2). This input is sensitive to positive square pulses. The typical threshold of this input is 0.85V.

The frequency of pulses coming from the secondary regulator can be lower or higher than the frequency of the starting oscillator.

The TEA2260 has no soft-starting system when it receives pulses from the secondary. The soft-starting is located in the secondary regulator.

(3) STAND-BY MODE - NORMAL MODE TRANSITION

During the transition there are simultaneously pulses coming from the primary and secondary regulators. These signals are not synchronized and some care has to be taken to ensure the safety of the switching power transistor(Q801).

A very sure and simple way consists in checking the transformer demagnetization state.

A primary pulse is taken in account only if the transformer is demagnetized after a conduction of the power transistor required by the secondary regulator.
A secondary pulse is taken in account only if the transformer is demagnetized after a conduction of the power transistor required by the primary regulator.

With this arrangement the switching safety area of the power transistor is respected and there is no risk of transformer magnetization.

Page 13

The magnetization state of the transformer is checked by sensing the voltage across a winding of the transformer. This is made by connecting a resistor between this winding and the demagnetization sensing input of the circuit(pin 1).

(4) SECURITY FUNCTIONS OF SP210

Undervoltage detection. This protection works in association with the starting device Vcc switch (see paragraph starting-mode - standby mode). If Vcc is lower than Vcc stop(typically 7.4V) output pulses are inhibited, in order to avoid awrong operation of the power supply or bad power transistor drive.
Overvoltage detection. If VCC exceeds VCCmax (typically 15.7V), output pulses are inhibited. Restarting of the power supply is obtained by reducing VCC below VCC stop.
Current limitation of the power transistor. (Fig. 8, Fig. 9) The current is measured by a shunt resistor. A double threshold system is used :
- When the first threshold (pin 3 : 0.6V) is reached, the conduction of the power transistor is stopped until the end of the period : a new conduction signal is needed to obtain conduction again.
- Furthermore as long as the first threshold is reached(it means during several periods), an external capacitor C838 is charged. When the voltage across the capacitor reaches VC2(typically 2.55V), the output is inhibited. This is called the "repetitive overload protection." If the overload disappears before VC2 is reached, C838 is discharged, so transient overloads are tolerated. Second current limitation threshold(pin 3 : 0.9V). When this threshold is reached, the output of the
- circuit is immediatly inhibited. This protection is helpfull in case of hard overload for example to avoid the magnetization of the transformer.

Fig. 8 current limitation

Fig. 9 Example of first curent limitation threshold triggering

- Restart of the power supply. After stopping due to protective functions above mentioned, the restart of the power supply can be obtained by the normal operating of the VCC switch but thanks to an integrated counter, if normal restart cannot be obtained after three trials, the circuit is definitively stopped. In this case it is necessary to reduce VCC below approximately 5V to reset the circuit. From a practical point of view, it means that the power supply has to be temporarily disconnected from any power source to get the restart.

Page 14

6. SECONDARY CIRCUIT (TEA5170)

2) PIN CONNECTIONS,

1) DESCRIPTION

The TEA5170 is in the secondary part of SMPS, sending pulses to the slaved TEA2260 which are located on the primary side of the main transformer. An accurate regulated voltage is obtained by duty cycle control. The TEA5170 is externally synchronized by the Heater pulse of FBT.

3) BLOCK DIAGRAM

- 9 -

Page 15

4) GENERAL DESCRIPTION

The TEA5170 takes place in the secondary part of the SMPS. During normal mode operation, it sends pulses to the slave circuit(TEA2260) through a pulse transformer to achieve a precisely regulated voltage by duty cycle control.

According to this, the output duty cycle is varying between Donmin (0.05) and Donmax(0.75) : then even in case of open load, pulses are still sent to the slave circuit.

Operating Description

The error voltage amplifier inverting-input and output are connected to feedback network. The non-inverting input is internally connected to 2V reference voltage. The RC oscillator is designed to generate a sawtooth. R_T (R830) sets the capacitor charging current I_O= 2/R_T. The capacitor C_T(C830) is loaded from V1 ≈ 1V to V2 ≈ 2V during

T1 = C_TR_T 1.985 and then down loaded through an integrated resistor.

R₂ ≈ 1KQ during T₂ = 1300C_T

The ramp is used to limit the duty cycle. Then the maximum duty cycle is

DONMAX = $\frac{1}{T1+T2}$ (0.73 T1+ T2)

The output level is Vcc independant when V_CC is over 8V.

5) ASYNCHRONIZED MODE

The regulated voltage image is compared to 2V reference voltage. The error voltage amplifier output and the RC oscillator voltage ramp are applied to the internal pulse width modulator inputs.

The PWM logic output is connected to a logic block which behaves like a RS latch, sets by the PWM output and resets when Ct downloading occurs. Finally, the push-pull output block delivers square wave signal which the output leading edge occurs during Ct uploading time, and the output trailing edge at Ct downloading time end. The duty cycle is limited to 75% of oscillator period as maximum value and to Ct downloading time/oscillator period as the minimum value(Figure.12).

Fig. 12. Asynchronized Mode

- 10 -

Page 16

6) SYNCHRONIZED MODE(Fig. 13, 14, 15)

The TEA5170 will enter the synchronized mode when it receives one pulse through Rt during Ct discharge. At that time Ct charging current will be multiplied by 0.75 and the period will increase up to Tosc × 1.33.

A pulse occuring during the synchro window, commands the Ct downloading. If none, the TEA5170 will return to normal mode at the end of the period.

Fig. 14. Downloading Vct

Page 17

7) STARTING

When Vcc is under 4V, output pulses are not allowed and the slave circuit keeps its own mode. When Vcc is going over 4V, output pulses are sent via the pulse transformer to the slave circuit which is synchronizing and entering the slaved mode. Output pulses can be shut down only if Vcc goes below 3.8 Volt.

8) SOFT START

Using Csf(C832), it is possible to make a soft start sequence. When Vcc grows from 0V to 4V, voltage on Csf equals 0V. When Vcc is higher than 4V, Csf is loaded by a 3.7•µ A current, then TonMAX(Vcsf) will vary linearly from Tonmin to Tonmax according to Csfst bias. When Vcc will go low(3.8 Volt threshold), Csf will be downloaded by an internal transistor.

Soft Start Sequence

Page 18

7. TROUBLESHOOTING OF POWER STAGE.

Page 19

4. MULTICOLOR VIDEO-CHROMA DEFLECTION SECTION (TA8659AN)

1. INSTRUCTION

The TA8659AN is an NTSC/PAL/SECAM video-chromadeflection subsystem with a teletext interface circuit. The TA8659AN includes all of the functions required to realize a multicolor CTV in conjunction with a PIF/SIF IC, in a 64-lead, shrink-type, dual-in-line plastic package.

1) FEATURES

Realizes full automatic multicolor processing in conjunction with the TA8615AN system switch, with minimal external components.
Forced system selection.
Automatic system change by subcarrier detection
The mode change output can be used for switching the external components or circuits.
RGB interface with high switching speed, half-tone control, and independent contrast control.

2) FUNCTIONS

Video Section

DC- controlled, 2nd-order differential picture sharpness.
Contrast control with uni-color control.
Brightness control.
Internal vertical blanking.

Chroma Section

ACC circuit.
Color control/uni-color control.
RGB primary color demodulator outputs.

Adjustment-free APC circuit.
Tint control.
PAL/SECAM/NTSC automatic system detection.
Forced system selection/Automatic subcarrier detection and switching.

Deflection Section

Excellent sync separator performance.
Adjustment-free H/V oscillator by countdown system.
Stable vertical sync.
Sawtooth-type horizontal AFC.
Horizontal predriver.
X-ray protecter.
Vertical NFB amplifier.
50Hz/60Hz automatic detection.

3) MAXIMUM RATINGS(Ta=25 °C)

ITEM	SYMBOL	RATING	UNIT
Power Supply Voltage	V _cc	15.0	v
Input Terminal Voltage	V _in	GND-0.3 to	V
		V _CC +0.3
Input Singnal Level	e _in	5.0	V _p-p
Power Dissipation	PD	2.2	W
Operating Temperature	T _opr	-20 to 65	r
Storage Temperature	T _stg	-55 to 150	r

* Note : When using at Ta = 25 °C or more, reduce 17.6 mW

per 1°C

- 14 -

Page 20

Page 21

3. CHARACTERISTICS

1) DC VOLTAGE CHARACTERISTICS

#	TERMINAL	SYMBOL	MTN.	TYP.	MAX.	UNIT.	NOTE
1	SECAM B-Y De-emphasis	V ₁	8.3	8.65	9.0
2	R-Y OUT	V ₂	7.4	7.95	8.4		-
3	SECAM R-Y De-emphasis	V ₃	8.3	8.65	9.0
4	OF OAND VOEF	V ₄	6.0	6.5	7.0	]
5	SECAM B-Y DEF	V ₅	6.0	6.5	7.0		5.5V IN SECAM MODE
6	vcc	V ₆	-	V _cc	-
7	Color Control	V ₇	-	-	-	]	-
8		V ₈	6.0	6.5	7.0
9		V ₉	6.0	6.5	7.0		5.5V IN SECAM MODE
10	SW I	V ₁₀	5.4	6.0	6.6		PAL, SECAM MODE
11	swI	V ₁₁	5.4	6.0	6.6		PAL, 4.43 NTSC MODE
12	Delay Line Input	V ₁₂	4.8	5.2	5.6
13	Bias	V ₁₃	4.8	5.2	5.6		-
				40.05	10.0		NTSC B/W MODE, 8.0V at P/S
14	Delay Line Drive	V ₁₄	9.9	10.25	10.6	v	MODE
15	Tint Control	V ₁₅	5.5	5.9	6.3		-
10		Via	_	11.3			B/W MODE, 10.7V at P/N MODE
16		¥16	-	11.0			(100 mVp-p burst)
17	DC Feedback	V ₁₇	3.2	3.55	3.9		-
18	SECAM Input	V ₁₈	4.1	4.45	4.8		50Hz MODE, 7.5V at 60Hz MODE
19	GND	V ₁₉	-	GND	-		-
		V	5.5	5.95	6.2		HID MODE. 4.8V at VID(15k.Q
20	PAL/NTSC Input	V ₂₀	5.5	5.65	0.2		GND)
21	SW∐	V ₂₁	1.6	2.0	2.8		PAL, SECAM, NTSC MODE
22	PAL Ident	V ₂₂	4.1	4.35	4.8
23	SECAM Ident	V ₂₃	4.1	4.35	4.8
24	SECAM Reference	V ₂₄	5.4	5.8	6.2
25	APC Filter	V ₂₅	-	6.0	-		-
26	4.43 X'tai	V ₂₆	2.8	3.15	3.5
27	NTSC Ident	V ₂₇	4.1	4.45	4.8

Page 22

#	TERMINAL	SYMBOL	MTN.	TYP.	MAX.	UNIT.	NOTE
58	3.58 Xtal	V ₂₈	2.8	3.15	3.5
8	Vertical Drive	V ₂₉	,	•	•
30	vcxo	V ₃₀	8.4	9.5	10.6
31	Vertical Ramp	V ₃₁	•		I
32	Vertical NFB Input	V ₃₂	۱	•	•
ß	Sync Separaton Input	V ₃₃	5.4	6.0	6.6
34	Gate Pulse Filter	V ₃₄	1	1	1
35	H.BLK Input	V ₃₅	3.8	4.1	4.4
36	AFC Filter	V ₃₆	7.0	7.5	8.0
37	vco	V ₃₇	2.7	3.05	3.4
38	H.AFC Pulse Input	V ₃₈	6.3	6.7	7.1
39	Horizontal Output	V ₃₉	I	1	1
40	H.VCC	V ₄₀	•	H.V _CC	ı
41	R Output	V ₄₁	0.7	1.25	1.8
42	G Output	V ₄₂	0.7	1.25	1.8	>
ą	B Output	V ₄₃	0.7	1.25	1.8
44	R Clamp	V ₄₄	2.5	3.2	3.6
45	G Clamp	V ₄₅	2.5	3.2	3.6
46	B Clamp	V ₄₆	2.5	3.2	3.6
47	Ext. R Input	V47	4.7	6.0	7.3
48	Brightness Control	V ₄₈	ł	1	r		#34 : 3.0V
49	Ext. G Input	V49	4.7	6.0	7.3	·	#35 : 2.5V(through 10k. Q )
50	GND	V ₅₀	-	GND	•
51	Ext. B Input	V ₅₁	4.7	6.0	7.3
52	X-ray	V ₅₂	۱	•	ľ	L
53	TV/EXT. ŚW	V ₅₃	1	۲	ı
54	Half Tone	V ₅₄	1	•	ı
55	Picture Sharpness	V ₅₅	5.0	5.4	5.8	,
56	Diff. Input	V ₅₆	2.9	3.25	3.6		•
57	Clamp	V ₅₇	ı	5.9	۱
58	Video Input	V ₅₈	4.4	4.8	5.2
59	Contrast Control	V ₅₉	,	•	ı
09	R-Y Input	V ₆₀	5.8	6.2	6.6		×

Page 23

#	TERMINAL	SYMBOL	MTN.	TYP.	MAX.	NOTE
61	V _CC	V ₆₁	-	V _CC	-	#34 : 3.0V
62	B-Y Input	V ₆₂	5.8	6.2	6.6	#35 : 2.5V(through 10k.e)
63	V _CC	V ₆₃	-	V _CC	-
64	B-Y Output	V ₆₄	7.4	7.95	8.4	-

2) CURRENT CHARACTERISTICS

#	TERMINAL	SYMBOL	MTN.	TYP.	MAX.	UNIT.	NOTE
6	V _CC (CHROMA)	l ₁ -	30	42	65
63	V _CC (VIDEO)	I ₂	25	38	55
61	V _CC (VIDEO, DEF)	l ₃	8	10	15	mA	-
40	H.V _CC (H.DEF)	14	6	10	15
	V _CC Total Current		63	90	135		I _CC1 = I ₁ + I ₂ + I ₃
	H.V _CC Total Current	I _CC2	6	10	15		I _CC2 = I ₄

4. TERMINAL DESCRIPTION

#	TERMINAL	FUNCTION
1 3	SECAM De-emphasis	Connect a capacitor to GND for SECAM de-emphasis. #1 : B-Y #3 : R-Y
2 64	Color differential signal outputs	#2 : R-Y #64 : B-Y Load resistor of 8.2 k g is connected to GND.
4 5		A4.250 MHz tuned tank circuit for SECAM B-Y detector is connected.
8 9	SECAM R-Y detector	A4.406 MHz tuned tank circuit for SECAM R-Y detector is connected.
6	V _CC for chroma stage	The typical supply voltage is 12.0V. By-pass capacitance is connected to terminal 19.
7	Color control	Color saturation increases when the terminal voltage of #7 increases. When the color killer circuit operates, the terminal voltage of #7 turns to low.

Page 24

	TERMINAL	FUNCTION
10 11 21	System logic I/O	This terminal is an output of system identification logic circuit and also is an input of Manual Select Mode. #10 : SW I #11 : SW II #21 : SW III
12	Delayed chroma signal input	1H delayed chroma signal input for PAL/SECAM. The signal phase shift between teminal #14 and terminal #12 should be less than 5 deg. The signal loss of the 1H delay line should be 16 dB.
13	By-pass	An external capacitor for a bias circuit is connected.
14	Delay line driver output	The PAL/SECAM chroma signal output for a 1H delay line. Connect a load resistor of 2k e to GND.
15	Tint control(NTSC Mode)	A phase of burst signal is controlled by this terminal in the NTSC mode.
16	ACC filter	An external capacitor for ACC filter is connected.
17	By-pass filter	An external by-pass capacitor for a bias circuit is connected.
18	SECAM signal input	SECAM chroma signal is led to this terminal through a Bell filter circuit. Terminal DC voltage is changed by the 50/60 identification logic output. 7.4V for 60 Hz 4.4V for 50 Hz This identification output is useful for changing a vertical size and shifting a horizontal position on the screen.
19	GND	GND of the chroma stage.
20	PAL/NTSC chroma signal input	PAL/NTSC chroma signal is led to this terminal through band pass filter circuit. The SECAM identification mode is determined by this terminal DC voltage. Open : Line Ident. 15k a to GND : Line + Frame Ident.
22	PAL ident filter
23	SECAM ident filter
27	NTSC ident filter

Page 25

	TERMINAL	FUNCTION
24	SECAM ident discriminator	A4.328 MHz tuned tank circuit for SECAM identification is connected. Adjust tank coil so that the recovered DC voltage at terminal 23 is the maximum value for 4.328 MHz.
25	APC filter	APC filter time constant is connected. When the killer operates, automatic searching circuits operated to widen the pull-in range of the APC circuit. The external time contant also determines the searching speed.
26	4.43 MHz X'tal IN	4.43 MHz X'tal is connected between terminal 26 and terminal 30. No adjustment is required.
28	3.58 MHz X'tal IN	3.58 MHz X'tal is connected between terminal 28 and terminal 30. During a color system detection, the X'tals are switched at every 4 APC sweep period. When 3.58 MHz mode is not needed, 5.6 kg is connected between terminal 28 and GND.
29	Vertical output	Output terminal of vertical driver.
30	X'tal drive
31	Ramp generator	A vertical sawtooth-wave generater circuit is composed of a ramp capacitor, a zener diode which determines sawtooth starting voltage, and a discharge resistor.
32	Vertical NFB	AC and DC negative feedback terminal. The waveform of terminal #32 is equivalent to that of terminal #31 according to the internal operational amplifier.
33	Sync sepa. input	Input terminal of emitter-time constant-type sync separator. sync sepa. level is Vth = (6+Vi) R1Tr R1tr+R2Ts
34	Gate Pulse Filter	An external filter for a gate pulse is connected.
35	Flyback pulse input/Sync pulse output	Flyback pulse is used as a horizontal blanking of color differential signal output(#2, #64), color primary signal output(#41, #42, #43), and 1H delay line output(#14), and also used as a masking pulse for a gate pulse generator, PAL matrix switching, and a SECAM permutator switching. This terminal is also the output of sync signal. During sync period, the terminal voltage of #35 turns to high.

Page 26

	TERMINAL	FUNCTION
36	AFC filter
38	Integrated flyback pulse input	A sawtooth-type horizontal AFC circuit is composed. #38 is an input terminal of integrated flyback pulse(sawtooth). #36 is an AFC filter terminal for 32 fH VCO. A time constant for integration of flyback pulse should be switched so that screen position is equivalent for 15.734 kHz and 15.625 kHz of horizontal frequency.
37	32 fH VCO	Adjustemt-free, 32 fH Voltage-Controlled Oscillator. A ceramic resonator is connected. A wide pull-in range covers both 15.625 kHz and 15.734 kHz of horizontal frequency.
39	Horizontal drive output	An emitter follower output of horizontal predriver. An external load resister is required.
40	H.V _CC	Supply terminal for a horizontal deflection circuit. Recommended supply voltage is 9.0V.(9.0V zener diode is required.) A by-pass capacitance is connected to terminal 50.
41 42 43	Color primary signal output	#41 : R out #42 : G out #43 : B out
44 45 46	Clamp capacitor	Clamp capacitor for DC restoration is connected. #44 : R #45 : G #46 : B
47 49 51	External RGB signal input	An input decoupling capacitor is used as a clamp capacitor. Input signal level is 0.7 Vp-p. #47 : R input #49 : G input #51 : B input
48	Brightness control
50	GND for video circuit and deflection circuit
52	X-ray protector	The input terminal of the X-ray protector. #39 Hor. driving terminal turns to low when to input voltage of this terminal exceeds the specified threshold voltage. (1. 3V typ.)

Page 27

TERMINAL FUNCTION		INTERFACE
53	EXT/TV switching signal input	Fast blanking pulse is acceptable. The threshold level is 1.0V typ.
54	Half-tone/Full-tone switching signal input	When a half-tone circuit is active, the TV video signal amplitude becomes smaller than nominal level. WPS(white peak supress) switch This terminal also switches the white peak suppress circuits. When this circuit is active, in case the RGB output voltage becomes higher than 7.5V, the contrast control terminal voltage is lowered by the internal open collector circuit. A time constant is determined by external capacitance and variable resistor value at #59.
55	Picture sharpness control/mute switch.	When #55 voltage becomes lower than 0.7V, the mute function operates. The brightness control circuits become the same condition when 3V is applied at #48, EXT/TV switch turns to TV mode, and the video signal and the color differential signal are cut.
56	Second-order differential video signal input.
57	Pedestal clamp	A terminal for a pedestal clamp capacitor.
58	Video input	A video signal of sync negative should be applied.
59	TV contrast control with uni-color control Text contrast control	Video gain and color gain are controlled simultaneously. The typical gain control range is -20 dB. Contrast control teminal for external RGB signal. The typical gain control range is -12 dB.
60 62	Color differential signal input	The decoupling capacitor is used as a clamp capacitor. #60 : R-Y input #62 : B-Y input
61	V _CC for video & vertical deflection stage. (12V)	By-pass capacitance is connected to #50.
63	V _CC for RGB output stage. (12V)	By-pass capacitance is connectd to #50.

]
]

Page 28

5. OPERATING INSTRUCTIONS

1) FUNCTION OF THE TA8659AN

The TA8659AN is a PAL/ SECAM/NTSC, video-chromadeflection processor with RGB interface circuit. It includes color system identification circuits, a color sub-carrier identification circuit and a vertical frequency detector in a shrink-type 64 leads dual-in-line plastic package. The TA8659AN realizes a very simple PAL CTV with RGB interface, PAL/SECAM dual system CTV(with RGB interface), PAL/NTSC dual system CTV(with RGB interface), and PAL/SECAM/4.43NTSC/3.58NTSC multistandard CTV(with RGB interface) in conjunction with the TA8648N, PIF/SIF combination IC.

This new combination can reduce the number of componets to approximately 70% of current PAL/SECAM dual system, reduce the PCB area to half of current dual system simplify the production process of the CTV, and increase flexibility of the chassis design.

2) SEPARATION OF THE VCC LINES AND THE GND LINES

The TA8659AN equips 4 V_CC lines. The first is the terminal (6)12V line for the chroma sub-system. The

3) Vcc GND SEPARATION

second is the terminal (61) 12V line for the video subsystem, the sync-separator and the vertical deflection system. The third is the terminal (63) 12V line for the RGB output stage. The fourth is the terminal (40) 9V line for the horizontal deflection stage. This 9V line is driven by the high +B line(+110V to +130V) through a series resistor with zener regulator to start up the system. After setting up the system operation, current from the 12V VCC line maintains this 9V line power requirement. The TA8659AN also equips separated GND lines. To prevent intersection interferences, each section has it's own GND line. The lines are tied together at the IC GND pad to reduce common impedances. The terminal (19) is a GND line for the chroma section and the terminal (50) is a GND line for the video section and the deflection section.

These GND lines are pulled out to each side of the IC package to minimize the common impedance. Special attention should be paid to a pattern layout of the external GND line and connections of decoupling capacitances. The external component's GND and VCC should be connected to the GND and VCC of each stage which the component is subjected to.

- 23 -

Page 29

. VIDEO SYSTEM

თ

1) BLOCK-DIAGRAN

Page 30

2) INSTRUCTION

Functions of TA8659AN video system(including an External RGB Interface system) are as follows.

R.G.B. primary color drivers
Built-in G-Y matrix (PAL. SECAM / NTSC switching)
TV signal 3dB/6dB attenuation by shadow switching
Built-in Y-picture sharpness control circuit(2nd order differential type picture sharpness circuit)
Built-in H-BLK/V-BLK
Built-in W.P.S. (White Peak Suppressor) circuit for preventing white peak from saturation in a CRT drive stage.
Built-in service switch(During service switch ON : Y mute operates, color control is minimum, TV mode, output-stage black level is fixed at 3V)
Unicolor control
Color control
Brightness control
TV/Ext. RGB switching function

(1) Ext. RGB contrast control

(a) TV signal RGB matrix section

In this matrix section, R.G.B primary-color signals are composed of -Y signals and color difference signals of (R-Y), (B-Y), and (G-Y) that are processed respectively at the Y-signal processing section and the color difference signal processing section.

(b) Ext. RGB signal processing section

Pedestal levels of external RGB signals, input from terminals (47), (49) and (51) are aligned with pedestal levels of RGB signals composed of TV signal by the input clamp circuit that functions during the pedestal pulse period.

Then the signals are transmitted to the contrast control stage.

The contrast control ranges are -20dB for TV signals and -12dB for Ext. RGB signals.

Therefore, the RGB data can be always observed while the contrast is reduced to the minimum level.

- TV/Ext. RGB switch

Output of either TV signals or Ext. RGB signals can be switched at high speed by the voltage applied at terminal (53). Therefore, Ext. RGB signals can be superimposed on TV signals.

0.7V, and the output is selected as follows :

V53 < 0.7V - TV mode

V₅₃ > 0.7V - Ext. RGB mode.

(2) Outline of Video System(including RGB interface) Fig. 2 shows the block diagram of video system (including RGB interface).

(a) Y signal processing section

- From input terminals (58) and (56) to Half-Tone Mute

This block involves a picture sharpness control citcuit, a Y signal contrast control circuit, a pedestal clamp circuit and a halftone circuit with 3dB/6dB switch. In the picture sharpness control circuit, 2nd order differential signals from terminal 56, normal video signals from terminal 58 and signals passed through CR low pass filter circuit are mixed together, and the mixing ratio is controlled by the terminal 55 voltage. The half tone circuit functions to reduce TV signal contrast so that Ext. RGB characters become easy to observe during the mix mode(superimpose mode). The attenuation ratio of the half tone circuit is able to be set to 3dB or 6dB

Page 31

by the voltage applied at terminal (54) (see Fig. 5). The frequency band width of the Y signal processing stage is more then 10MHz, so the high quality picture can be achieved.

(b) Color difference signal processing section

- From input terminal 60 and 62 to G-Y MATRIX This block is composed of the clamp circuits, half-tone control circuit, color control, unicolor control, G-Y matrix, and primary-color matrix. Color difference signals of R-Y and B-Y are clamped at the inputs, then led to gain control stages(unicolor control/color

control). After that, (G-Y) signal is composed of (R-Y) signal and (B-Y) signal, and finally RGB primary color signals are produced by mixing with Y signal, amplitudes of these R-Y and B-Y signals used during composing of G-Y signals are switched as follows between PAL/SECAM and NTSC mode. G-Y = -0.51(R-Y) - 0.19(B-Y) -PAL/SECAM G-Y = -0.32(R-Y) - 0.22(B-Y) - NTSC The attenuation ratio of the half-tone circuit is controlled by the voltage applied at terminal (54) (See Fig. 5).

Fig. 4 Gain distribution of video system

From the above-mentioned gain distribution, relative amplitude and phases of RGB output determined. Bandwidth of 19MHz is provided for the RGB interface in correspondence to the TELETEXT.

(d) Primary-color signal output section

Composed RGB signals are subjected to the brightness control and H/V-BLANK processing, then come out from terminal (41), (42), (43). Terminals (44), (45) and (46), which function as clamp filters for brightness control, offer the DC restoration rate of 100%.

To prevent the CRT from saturating at signal white

peak, the output circuit is provided with WPS and WPL functions.

Explanations of WPS/WPL Operation.

WPS-White peak suppressor.

The WPS detects white peak of output signals and reduces the contrast of TV signals so that the white peak level does not exceed 7.5V at RGB output. Namely, this is the function of preventing white peak from saturation in the CRT drive stage. The WPS feature operates against white peak, not against video signal average levels; its response speed can be varied by changing the time constant of the CR connected to the contrast terminal (59).

Page 32

Generally, under the NTSC mode, 2nd order differential picture sharpness compensation is often used. When the amplitude of 2nd order differential signals is large, the WPS function sometimes operates against signal, and contrast is caused to vary along with picture sharpness control. As a measure against this problem, the WPS OFF mode is made available(see Fig. 5). WPS is called by another name of white peak ACL(auto contrast limiter).

WPL - white peak limiter (white clip, white peak slice)The threshold voltage of WPL is set to 8.1V at the output terminal; this voltage is higher than that of WPS.When the output signal voltage exceeds this threshold voltage, the signal is sliced.

While the WPS function operates on TV signals only by the contrast control terminal, the WPL function is available for both TV signls and external RGB signals.

Page 33

1) BLOCK-DIAGRAM

- 28 -

Page 34

2) PAL/NTSC CHROMA PROCESSING

(A) PAL/NTSC chroma signals are input from terminal 20 To this input terminal 20, 4.43MHz/3.58MHz bandpass filters are connected; use of these filters must be selected according to the frequencies of color subcarrier. Under the AUTO mode, information of 3. 58 MHz or 4.43MHz can be obtained from SWII(terminal
(1) ). Therefore, use this information to achieve filter switching. Chroma signals input from terminal (20) are led to the ACC circuit and the amplitude is controlled to become constant. Then, by the PAL · NTSC/SECAM change-over switch, their signal paths are altered. This path change is achieved by the outputs from the PAL/NTSC/SECAM system identification circuits. (B) PAL chroma processing : The output of PAL ·
NTSC/SECAM switch comes out from terminal (14) to drive 1H delay line. Simultaneously 16dB-level of terminal (14) signals are transmitted to the PAL matrix internally as a direct signal. The output signals of the terminal (14) are led to the terminal (12) through 1H delay line(Use-16dB delay line with matching). At the PAL matrix, the sum of the difference between these direct signals and delay signals are obtained. Then, R-Y and B-Y are demodulated by means of quadrature 2phase demodulation. Demodulated signals are transmitted through the PAL · NTSC/SECAM system switch and are output from terminals (2) and (64). Operation of this system switch is achieved through logic processing of respective output signals of identification circuits.
(C) NTSC chroma processing : NTSC signals do not come out from terminal (14); they are transmitted to the PAL/NTSC matrix internally. This PAL/NTSC matrix is switched to the NTSC mode, and the gain becomes two times that of the PAL, resulting in equalizing demodulated R-Y and B-Y levels. Demodulated output then passes through the PAL • NTSC/SECAM system switch and comes out from terminals (2) and (64).

3) SECAM CHROMA PROCESSING

SECAM chroma signals are input from terminal (18). This terminal (18) input is led to the limiter-amplifier and enters the PAL · NTSC/SECAM system switch. Then, SECAM chroma signals come out from terminal (14); simultaneously direct signals are transmitted into the SECAM permutator internally. These direct signals are set at -16dB against the signal levels at terminal (14). Therefore, if the attenuation of 1H delay line path is -16dB, the level of direct signal input. Output from the permutator is subjected to the SECAM demodulation by the FM detector, while demodulation output of R-Y and B-Y passes through the PAL · NTSC/SECAM system switch and comes out from terminals (2) and (64).

4) APC search and system identification (AUTO mode)

Fig. 7 shows the flow chart for system identification. The APC sweep method is adopted on this system to realize elimination of the APC adjustement. During the nosignal period, voltage at terminal (25) is subjected to force sweeping to cause VCXO oscillation frequency to vary and realize expansion of pull-in ranges.

(A) System identification flow chart(Refer to Fig. 7) During the no-signal period, oscillation of 4.43MHz and 3.58MHz is repeated with predetermined time intervals. This oscillation continues for 4 sweep periods, and a one-sweep period is determined by the time constants of terminal (25).

First, 4 sweeps are applied to 4.43MHz. and system identification is performed by the outputs from PAL/SECAM/NTSC identification circuits. This identification is determined by voltage at terminals (22), (23) and (27) as shwon in Table 1. System switching is achieved within the V-BLK period ; therefore, no switching noise appears on the screen. When the system is not determined within the 4-sweep period under 4.43MHz, another 4-sweep is continued under 3.58MHz. During this period, when the status in table 1 appears on ID output, 3.58MHz NTSC signal is judged to be received and the system is fixed on this basis.

Page 35

When the system is not determined within the 4-sweep period under 3.58MHz, sweeping is started all over again under 4.43MHz. Therefore, during receiving the B/W signals, this 4.43MHz sweeping and 3.58MHz sweeping are alternately repeated.

Since three independent identification circuits are always in operation, the system identifying time has been reduced.

Further, for the SECAM identification, switching is possible between line ID and line ID+frame ID. This switching can be achieved by the voltage applied at terminal (20).

(B) Identification output

System identification output can be monitored by SWI, SWII, and SWIII(terminals 10, 11) and 21) respectively). Refer to Table 1.

When "M" in table 1 is considered as "L" (2V or less is considered as "L"), systems of PAL/SECAM/4.43NTSC/3.58NTSC can be identified by combinations of output logics from SWI, SWII and SWIII.
2) By monitoring SWII(considering "M" as "H" ), identification between 3.58 and 4.43 is possible.
IF "M" is considered as "H" (2V or more is considered as "H"), identification as to whether color or B/W on SWIII output can be achieved.

By setting "H" at SWIII, the forced mode is designated and the system can be fixed from the external (by means of combination between SWI and SWII).

Fig. 7 Flow chart of system identification

Page 36

Table 1 List of logics under AUTO mode

	IDENTIFICATION			SWI	SWII	SWIII
PAL	SECAM	NTSC	X'tal mode				Identificaiton mode
#22	#23	#27		#10	#11	#21
н	L	Н	4.43	Н	н	М	PAL
L	н	L	4.43	н	М	м	SECAM
L	L	н	4.43	L	н	м	4.43NTSC
L	L	н	3.58	L	L	М	3.58NTSC
L	L	L	4.43/3.58	L	M/L	L	B/W
	H→V _CC L = 6V		-	H = 6.0V(1/2 M = 2.0V (1) L = 0V(conr 30K. Output from	2 V _CC ) /6 V _CC ) nected GND via 2) I IC	a	-

Table 2 Switch input voltage under MANUAL mode

	SWI	SWII	SWIII
MODE	#10	#11	#21
PAL	н	н	н
SECAM	Н	м	н
4.43NTSC	L	н	н
3.58NTSC	L	L	н

H:6V L:0V

5) OTHERS

On TA8659AN, gate pulses are generated by time constants at terminal (34). Therefore, even if the electricfield is weak, stable gate pulses can be obtained, resulting in improving the killer sensitivity.

50Hz or 60Hz is judged by I ²L logic circuit to enable accurate identification ; therefore, the forced mode is not provided. Identification output can be monitored with DC voltage at SECAM input terminal (18).

Page 37

1) BLOCK-DIAGRAM

Page 38

2) SYNC SEPARATION CIRCUIT

(Outline)

The sync separation circuit separates sync signals from composite video signals and supplies these sync signals to

the horizontal and vertical deflection circuits. Vertical integrator is on the chip, so no external components are required.

Fig. 9 Block diagram of sync separation circuits

(Operating principle)

Horizontal/vertical sync separation circuits

Fig. 10 shows the basic sync separation circuit.

Sync separation level can be calculated as follows.

$Vth = \frac{Eo+Vi}{R1+R2} \frac{Ts}{Ts} + \frac{Tr}{R1} \frac{Tr}{R1+R2}$

Eo : Terminal (33) voltage when Q1 becomes ON

Fig. 10 Basic circuit diagram

Page 39

On conventional sync separation circuits, separation is achieved by turning a transistor ON during the sync signal period. However, since this transistor is used in the saturation condition, such problems are caused as widening of sync signal width due to switching delay by charging time or expansion of the noise period. To eliminate these problems, the circuit used on TA8659AN

is in the nonsaturation status and a common base circuit is adopted.

Let's assign Vth to the sync separation level, Vi to the input video signal amplitude, Ts to the sync signal period, and Tr to other horizontal periods(Eo is emitter voltage of Q1, when this Q1 is turned ON and this voltage is set in the IC at V_CC/2 = 6V.

By selecting C1 that causes C1 × R1 ≫ (Ts+Tr), voltages charged C1 can be regarded as almost constant.

Sync signal period(Ts)

Current(Vth/R1) charges C1 via Q1. The charge amount can be calculated as follows :

$\frac{V_{th}}{R1} \cdot Ts$

• Other period(Tf)

Q1 becomes OFF and C1 discharges via R1 and R2. This discharge amount can be calculated as follosws :

$\frac{\text{Eo} + \text{Vi} - \text{Vth}}{\text{R1} + \text{R2}} \cdot \text{Tr} = \frac{6 + \text{Vi} - \text{Vth}}{\text{R1} + \text{R2}} \cdot \text{Tr}$

The charge amount charged in C1 during Q1 ON period (Ts period) is equal to the discharge amount released from C1 during Q1 OFF period(Tr period). Consequently, the following relation can be established :

$\frac{V_{th}}{R1} \cdot Ts = \frac{6 + Vi - Vth}{R1 + R2} \cdot Ts$

By solving the above equation regarding Vth, this Vth value can be calculated as --

From the above equation, it is evident that the separation level(Vth) is determined by the resistance value of R1 and R2, and that this level is also subject to variation depending on video signal amplitude(Vi)--namely, APL.

For example, by assuming R1 = 390 µ , R2 = 240k µ , Tr = 58.8µs, Ts = 4.7µss(in case of field frequency of 60Hz), the separation levels against APL variations become as shown in the Table 3 below.

Table 3 Variation of separation level for APL

APL	Separation level	Percentage
100% (2.0 V _P-P )	0.159V	31.9%
50% (1.25 V _P-P )	0.144V	28.9%
0% (0.5 V _P-P )	0.130V	25.9%

Percentage : Against sync signal amplitude(0.5 Vp-p)

From the above table, it is also clear that as the APL rises, the separation level approaches to the pedestal level (separation level become deeper).

Using common base circuit of Q1, nonsaturating sync separator has been achieved. D1 and D2 cause constant voltage of V_CC-2V_F at the Q2 base. Therefore, Q2 collector current becomes the constant value of V_F/R4. As a result, the sync separation voltage becomes(V_F/R4) × R5. R1 and C2 constitute LPF to reduce noise.

Page 40

3) HORIZONTAL AFC (AUTOMATIC FREQUENCY CONTROL) CIRCUIT

(Outline)

The block diagram of horizontal AFC loop is shown in Fig. 11.

Fig. 11 Block diagram of horizontal AFC circuit

The phase detector compares the phases during the flyback period of reference signals(sawtooth wave shape) with the phases of horizontal sync signals from sync separator. When phase difference $\triangle \phi \exists, the error portion corresponding to the difference is detected and its output is transmitted to the integration circuit. Further, compensation voltage \(\Delta$ V corresponding to phase difference $\Delta$ $\phi \exists, the error portion corresponding to the difference is detected and its output is transmitted to the integration circuit. Further, compensation voltage \(\Delta$ V corresponding to phase difference $\Delta$ $\phi \exists, the error portion corresponding to phase difference \(\Delta$ $\phi \exists, the error portion circuit is controlled by the \(\Delta$ $\Delta$.

control voltage of the VCO varies either in the positive or the negative direction. This varying direction is determined whether the phase of horizontal output pulse(reference signals) is leading or delaying against the phase of horizontal sync signals respectively. The horizontal oscillator(32×fH) incorporates a voltage controlled oscillator that used AFC voltage(control voltage) to control oscillation frequency and phase.

4) OPERATING PRINCIPLE

(A) Horizontal AFC (automatic frequency control) circuit

Fig. 12 Pulse width AFC basic circuit diagram

Page 41

The phase detector is activated only during horizontal sync signal period by switching a current source lo. During vertical sync period, AFC mask signal is applied to the current source.
2) DC bias is applied to Q4 base, and when the reference signal shown in Fig. 12 is applied to Q3 base, the current flows through Q4 during the former half of sync signal period. Namely, constant current lo flows from terminal (36). As for the latter half of sync signal period, current flow occurs on Q3, Q1 and Q2. And constant current lo flows into terminal (36).

Current waveform at terminal (36) during horizontal period is shown in Figure 13.

Fig. 13

3) When the phase of output pulse(reference signals) from horizontal output circuit varies against sync signal phase, the flow-in/flow-out pulse widths also vary, accompanying variation of average output current.
4) When average output current varies, AFC voltage is altered, resulting in also changing oscillation frequencies. For instance, if horizontal output pulse phase leads, flowin current pulse width is narrowed as shown in Fig. 14. Consequently, the average output current increases and control is applied in the direction of lowering 32fH VCO oscillation frequency. On the other hand, if the phase of horizontal output pulse is delayed the average output current decreases, and control is effected in the direction

to cause the oscillation frequency to become higher.

Fig. 14

(B) Horizontal oscillation circuit

(Outline)

This circuit incorporates a countdown system with a 503kHz(32 × fH) voltage controlled oscillator employing a ceramic oscillator and achieves an adjustment-free horizontal/vertical deflection system.

(Operating principle)

5) Terminal (38) is a input of an AFC reference signal (sawtooth wave); C2 is a coupling capacitor. Flyback pulse is integrated by R1 and C1 and converted to sawtooth wave.

Fig. 15 Block diagram of horizontal oscillation circuit

Page 42

6) Horizontal sync signals from the sync separation circuit are led to the AFC circuit and activate the phase detector. Phase difference(frequency difference) between sawtooth wave signals and horizontal sync signals is detected by the phase detector, subjected to smoothing process by the integration circuit(lowpass filter) externally connected to terminal 36, and then converted to DC voltage (AFC voltage).
7) Oscillation frequency(32×fH) of the oscillator(VCO) is controlled by this AFC voltage. Fig. 16 on the below shows the control characteristics of VCO.

8) Horizontal output is obtained by using the flip-flop circuit to apply 32 frequency division to output from 32 × fH(503kHz) oscillator.
9) Vertical output is obtained by using the vertical counter to count 4×fH pulses generated by 8 frequency divider of 32×fH oscillator output, and resetting is applied by vertical reset pulses. The vertical counter is reset by vertical reset pulses come from sync separator circuit through vertical integrator. The vertical counter is driven by 4fH pulses, so good interlace performance is achieved.
10) As explained above, vertical output is not generated by counting down the horizontal output pulses. Instead, the direct sync method that applies vertical synchronization is adoped. A vertical sync window of

50Hz : 248-314H 60Hz : 248-288H

performed by using vertical reset pulses that enter into this window range. This direct sync method enables coping with nonstandard signals.

MEMO			-




	·
				\|

and the second of the second s


				••••





















				- · [

Page 43

(5) VERTICAL DRIVE OUTPUT SECTION

Fig. 18

The vertical output circuit operates as an NFB amplifier that transmits, to the deflection coil, the ramp waveform generated at terminal (31) so that the waveform of NFB(terminal (32)) become similar to that of terminal (31). Deflection coil current IDY is converted to voltage waveform by series resistor Rs and then fed back to terminal (32). Simultaneously, feedback of DC elements is also achieved by composing.

The components of this feedback circuit determine the output center-point potential and deflection current amplitude. Output current from terminal (29) is 15mA(typ); therefore, direct drive of the SRPP output stage is possible.

Page 44

5. SYSTEM SWITCHING SECTION

1. SIF SWITCHING

The SIF Output Pin 14 of IF IC (TA8700N) is under the condition not selected as one of the system 4,5,5.5,6.0 and 6. 5 MHZ. The signal of SIF output passes the 4.5,5.5,6.0 and 6.5 MHZ Band Pass filter which was divided into 4.5 MHZ and other group.

The SIF passed the 4.5 MHZ BPF inputs into the ident circuit and then the ident circuit identifies SIF signal is 4.5 MHZ. The resonance circuit is connected to pin 20.21 of TA8615N in order to identify the 4.5 MHZ.

When resonating the 4.5 MHZ, the high signal is output to pin 18. When the PIN 18 of TA8615N became high voltage, 4.5 MHZ / others discrimination identify the 4.5 MHZ system and output the signal to switch on/off the SIF switching circuit and sound trap circuit.

Contrariwise, in case that external force makes the PIN 18 to be high, TA8615N identifies the 4.5 MHZ system. Also, TA8615N outputs the one of two SIF signal synchronized to 4.5 MHZ and 6.0 MHZ. At the same time, output the signal to detect the 4.5 MHZ and 6.0 MHZ (see Fig.1)

1) SIF DETECTION

The PIN25 of the TA8615N upkeeps low/high condition by SIF, the FM detection circuit operates propeched (refer to the following Fig.2)

In case that the pin 25 is low condition, D103 is turned on so that T605 and X101 one connects parallal. At this time resonance frequency was varied by the value of composion capacity. By fo = 1/(2π √LC) under the fixed value of L, the frequency becomes to be low as the value of C rises up.

Therefore in case of 4.5 MHZ find the resonance point resulting from T605 and X101. In case of 6.0 MHZ open X101, according to establishing the resonance frequency of T605, detect the FM easily.

2) SYSTEM SWITCHING

TA 8615N have the system logic circuit.

TA 8615N have the SIF identification capability and obtains the information of system from the TA8659AN and then sends the signal to the µ -COM so that it informs the system. Contrariwise, TA8615N can switch on/off the ident circuit at back terminal by selecting the system forcely.

Page 45

In case of auto mode, it identifies SWI, SWII and SWIII signal and then generates the system logic. All auto mode signal from µ -COM keeps low condition.

The signal passed system logic was sent to the µ- COM and it is used as the signal managed OSD of µ-COM, At this time the output at 10 (SWI), 11 (SWII), and 21 (SWIII) of TA8659AN is as following table 1.

	IDENT			SWI	SWII	SWIII
PAL	SECAM	NTSC	X'TAL MODE				MODE SELECT
#22	#23	#27		#10	#11	#21
Н	L	н	4.43	н	н	М	PAL
L	н	L	4.43	н	М	М	SECAM
L	L	Н	4.43	L	н	М	4.43 NTSC
L	L	н	3.58	L	L	М	3.58 NTSC
L	L	L	4.43/3.58	L	M/L	L	B/W
C	Dutput DC Leve H → V _CC L = 6.0V	el	-	Output DC H = 6.0V(1 M = 2.0V ( L = 0V(Con 30k	Level /2 V _CC ) 1/6 V _CC ) nnected to GN ( Q )	D through	-

TABLE.1

In case of forced mode, the forced mode is output and in regular sequence Pin 2.3.4. and 7 of TC4017BP(shift registor)keeps high condition.

TC4017BP receives the toggle signal at Pin 14 from µ-COM, only under forced mode, source power is supplied.

In case of forced mode the TC4017BP switches on/off the system without relation with input system.

The logic table of TC4017BP is as following table 2.

	TC 40	System
3pin	2 pin	4 pin	7 pin	Oystern
Н	L	L	L	PAL
L	н	L	L	SECAM
L	L	н	L	NTSC 4.43
L	L	L	н	NTSC 3.58

(TABLE2. TC4017BP logic table)

Page 46

The output from the TC4017BP goes to the pin 7 8.10 and 11of the TA8615N.

This signal is input the system logic of TA8615N and the system logic outputs OSD information to µ -COM and then output the signal to SWI. SWII and SWIII of the TA 8615N is like following table 3.

SWI	SWII	SWIII	Ident
29 pin	28 pin	23 pin	Non
Н	н	н	PAL
н	L	н	SECAM
L	н	н	NTSC4.43
L	L	н	NTSC3.58

(TABLE, 3)

(In case of forced mode, TA8615N output)

The system switching inputs the signal (NTSC 3.58 MHz), which is input into the pin 11 of TA8615N, into pin 18 of TA8615N so that switches on/off sound by resulting from selection of the SIF (4.5 MHz) forcely.

The OSD signal, going from TA8615N to µ -COM, is output through pin 1.2 and 4. This output signal can identify the PAL, SECAM and NTSC but it requires other switching singal to identify NTSC 4.43 MHZ and NTSC 3.58 MHz. Exactly, the signal is obtained from SWII. If the system is NTSC 3.58, SW I is LOW. If the system is NTSC 4.43, SW I is high.

2. CHROMA SWITCHING

1) PAL/ NTSC Chroma Processing

In case of auto mode, the information of 4.43 MHz and 3. 58 MHz is obtained from SWII. The information switches on/off the filter. The operation of Fig.4 is as following. In case that the chroma sub-carrier frequency is 4.43 MHz the SWII becomes to be logic high.

Therefore TR Q514 is turned on and the collector electric potential fall to zero. Because the base of Q501 connected to collector is low level, Q501 is turned off.

In result, the composite video signal go through R520 and pass the R .L. C filter composed with C531 and L 532. The composite video signal passed the R.L.C filter goes through D502 and then is output to Q502.

In case that the chroma sub-carrier frequency is 3.58 MHZ , because SWII is low, the Q514 is turned off and the Q501 is turned on. In result, the R517 operates in parallel resistance against the filter.

In this case because the D503 is turned on ,the filter composited with R519. L533 and O530 is selected and go through D503 and then is output to TR Q502. In this process, the obtained NTSC 4.43 / 3.58 signal inputs to the µ -COM by using the NTSC 4.43/3.58 signal input to the µ - COM the OSD is output.

SWI
NTSC 443	NTSC 3.58
н	L

Fig.4 NTSC 4.43 / NTSC 3.58 filter switching

- 41 -

Page 47

6. DEFLECTION SECTION

1. DEFLECTION NON- MOVEMENT

The CRT clinging to the main set is a non - spherical plate one. Because the deflection angle of this CRT is 110° optical angles, and this CRT is needed large deflection power and static sidepincushion modulation.

So this CRT is not to use general over - saturation pincushion trance but to select Diode modulation system with useful revision.

(Diode modulation system advantage)
1) The sidepincushion of modulation amount is large.
2) The modulation wave form is obtained easily.
3) The picture change related the high tension charge is corresponded to easily.
4) The deflection efficiency is large.

From now, the fundamental theory of the deflection circuit is explained. At first, if it is moving at the situation without adding the modulation for the sidepincushion revision, the vertical of the picture vertical - line improves notably. Now, with all steps of the Diode modulation system should explain the vertical control circuit from the actuation principle.

2. THE ANALYSIS OF THE VERTICAL CONTROL CIRCUIT.

If the comparative wide- part of a picture aspect is continued, the horizontal amplitude of the part like the fig 1 becomes wide, so the vertical line is showed the bent effect.

Because this is weaked the Beam vertical at the light parts. According to the fig2, if the vertical is low, the deflection power is high. So the electronic Beam's locus is wide as many as Q to outside. Therefore, in order that the vertical of the light parts is secured, the deflection power corresponding high - tension can not but low.

According to the equiralent circuit of the general horizontal deflection output circuit seeing from the fig. 3, the charging current 2 from the resonance period deflection coil to the CI and the charging current 2 in the CB line flow by parallel. Because the high -tension is low by the continuous light picture, the current 2 increases but the current 2 decreases. Finally, because current 2 goes back to the deflection coil, the energy volume is nearly regular. That is, even though the electronic Beam linearity is weaked, the deflection power is nearly regular. So the vertical line occurres to bend like above - mentioned. In order to revise this, the horizontal output circuit is added D2 and C3 newly like the fig. 4.

Page 48

At the equivalent circuit of this circuit, the charging current (2) in the resonance period C_B line charges and flows new adding C3. The electronic charge adding to the C3, after doesn't go back the deflection coil, is discharged by D2 during the current (1)'s flowing period to the transister at the next time. This is, if the high - tension is low, the deflection power is low relating to this. So the electronic Beam is drawed a right locus.

Fig.3 The equivalent circuit and current wave form of general horizontal output circuit.

Fig.4 re-elected horizontal output circuit

Fig.5 The equivalent circuit of re-elected horizontal output circuit

3. DIODE MODULATION SYSTEM ACTUATING THEORY.

At the figure 6, VB providing from FBI 1 becomes the condensor division to Vy and VA by C3 and C4

VB = V_Y + V_A ..... 1)

At the horizontal deflection coil, Vy as the power flows the deflection current on the ly cannel at the latter scanning. The deflection current flows on the I₁, cannel at the first scanning. Now, the non - modulation time as an example, when the Sidepincushion drive TR is opened, it would be Vy = VA

- the latter scanning : I_Y = I_A

- the first scanning : I₁ = I₂

Page 49

The 11 and I2 offset each other between (A) and (B) and ID (Damper Current) is to flow equivalently.

Say again, the H.DY and the LM are flowed the same as current, and after, when they are added the modulation, that is, the drive TR would be connected to C4 and the electric charge of C4 flows to the drive TR. So it discharges on the I3 cannel at the figure 6 and the voltage VA is low. Then the relation between Vy and VA is like the mode 2. VV > VA ....2)

<figure 6> Diode modulation horizontal output circuit

<figure 7-b> the deflection current during the modulation <the latter scanning>

Scanning	H · DY current L2 current
the latter	ly = ly' + imod > l _A ' (ly' = iA')
the first	l ₁ ' Imod > l ₂ '

From the mode 2), because the flowing current to the H.DY is larger than the flowing current to the LM, the current route is like the figure 7.

Namely, the modulation current Imod between (A) and (B) is to flow. After all, when the internal resistance by the Base Bias voltage (the direct current voltage and the vertical period parabola voltage), the Imod changes and can control the deflection current.

<figure 7-a> the deflection current during the modulution (the latter scanning)

Like above -mentioned, the sidepincushion is rivised by the diode modulation. If the circuit is analyzed constructively, we can think the mixing of one main generator and one assistant generator.

That is the main generator consists of the deflection coil H. DY, C,;C3,D1, and the horizontal output TR. The two generator must be tuning publicly during the horizontal flyback line period. That is, the condition of H.DY (Ln) . C1 = LM.C2 must be satisfied.

At the movement of pre-mentioned modulation time, when the Vm becomes O in the limit condition, the assistant generator is not flowed the current. So it is IA = O and the deflection current ly and the modulation current Imod is to the maximum. That is, ly (max) = Imod (max) = ^V_B _L ts (ts is the scanning period)

The VB is regular regardless the value of VM in the general modulation condition and through each generator is keeping tuning the same cycle.

Page 50

4. THE PRACTICAL APPLICATION CIRCUIT

In order that the Diode modulation horizontal output circuit applying at the main set improves the linearity control effect from the prementioned Diode modulation form fundamental circuit, it is added and consisted the switching TR at the assistant generator. The CRT screen form belong to the main set consists of the non-spherical under IR at the central part 4R, the surround part 2R, and the economical part.

In the view of these facts, through the geometrician wrap is generated, we can not but consider a special means for modulating to this. At the figure 9. the picture harizontal linearity happening to the non -spherical CRT is comparable with the horizontal linearity of the generated CRT.

That is, in case of the non - spherical CRT is wide on the one fourth (1/4) part in the right and left end but narrow on the central part. In order that this is modulated, the frequency voltage is occurred the double times of the horizontal frequency by the non - spherical coil L440 and C 441 resonance, and it divides C440 and C442 and is addes to C442 like the figure 8. (see Figure 10)

L453 — — – Linearity coil L452 — — – Width Coil

<Figure. 8> horizontal output circuit

<Figure. 9> horizontal linearity comparison(non-modulation period)

Page 51

<Figure.10> modulation voltage wave

5. SIDEPINCUSHION MODULATION

In case of the sidepincushion can't add, the modulation is like the figure 11-a.

At the point, the right and left of the central part are crushed deeper because the second distortion is occurred by the effect of the non - spherical modulation clinging to the D.Y.

Then if it is modulated only the parabola wave, the second distortion remains not to be the modulation like the figure 11-b So some parts of the parabola wave form can add the fundamental parabola wave of the clamped second modulation wave and must be the total modulation. The figure 12 appears the modulation wave form and the figure 13 is the practical example of the fundamental modulation circuit.

a) the picture not adding the modulationb) the first modulation picturec) the final picture

<Figure.11> sidepincushion modulation period picture

① the parabola wave

② the clamp wave

1+2 the final modulation wave

al Output Voltage

<Figure.13> The fundamental modulation voltage occurring circuit

<Figure.12> sidepincushion modulation wave form

Page 52

1) The fundamental modulation circuit movement

The sidepincushion modulation as the parabola wave of the vertical period must be modulated, so uses the vertical output wave form. The vertical output wave form makes nearly the sawtooth wave like seeing to the figurs 13, so the integrating circuit consisting of R and C1, makes the parabola fundamental wave and this makes a reverse amplification to Q1. Somewhat, the fundamental parabola wave by R and C1 adds to the A2 base through R4 and the established voltage by R5 and R6 adds to Q2 base the same time through D. So the provided parabola wave by R4 is to the clamp. This clamp wave also is the reverse amplification and adds to the making parabola wave by Q1. So the total modulation wave is made, and is modulated to the sidepincushion by this using. But only the fundamental modulation circuit can't modulate the distortion by the beam current feedback and we can not but consider about this modulation means.

2) The practical appliciation modulation circuit movement

The tical output voltage of the fundamental circuit at the pre-mentioned includes the countervoltage pulse happening from the vertical deflection coil among the flyback period. In case of the integrating just like this, the perfect parabola wave is hardly to obtain. So in order that the flyback pulse removed, after is passed the deflection coil, and the voltage only happening from the output condensor and the feedback resistance is used. This sawtooth wave voltage is integrated by the R474 and C463, and makes the parabola voltage and after is amplified at the Q458. As the Q458 is the common base amplification circuit, the input voltage and the same parabola voltage amplifies the flyback pulse and puts out at the Q 458 collector.

<Figure 14> The correction quality control circuit by the beam current variation

Somewhat, the beam current is the feedback according to the picture light. As the assistant generator movement current changes, so the sidepincushion modulation amount and the horizontal top width change. By the circuit showing the figure 14 dotted line part, the beam current change is detected and required at the ABL voltage. The voltage amplification circuit consisting of Q458 toward the inputed voltage of Q458 emitter (P Point) is to AV = hfe · impedence of the next step is much larger than R470, it is Av = hfe · R10 bio

As the compensation circuit consisting of Q460 would be the alternative equivalant circuit, the resistance value (variable nature) of D-S relation between R490 and 460 is inserted the parallel way. If Q406 conductance changes, the voltage amplification

Page 53

figure changes. Through the conductive is changed according to Q460 as N- CHANNEL FET is the added counter voltage between G -S, the source side is kept the regulation voltage by DZ 451. If the average value of the ABL voltage is added at the GATE, it can be compensated the modulation amount change relating to the beam current change.

Beam Current	ABL Voltage	Counter Voltage between G-S	RL	Av	Modulation amount

The relation between Beam and modulation amount

Also, the ABL voltage change part by the beam current instantaneously changes through C466 and R 492 is approved, and it can compensate the local modulation amount change. The making parabola wave like above goes through the butter amplification (BUFFER) consisting of Q456 and puts in the final wave form setform circuit consisting of Q455 and Q454 is the reversal amplitude making the clamp wave. The modulation voltage making at the Q455 and Q454 adds the driving output circuit consisting of Q453 and Q452, and can change C458 voltage. So it adds the voltage modulation to the horizontal output circuit. (referring to the figure 15).

a) Sidepincushion control

Page 54

Control(VR450)	Q453 Base Voltage	Horizontal Deflection current	Picture change
Clockwise
Counter clockwise	0

Page 55

7. μ-COM SECTION

1. INSTRUCTION

The SMM-111 is a 4-bit CMOS microcomputer (ROM size 8185 words × 8bits RAM size : 256 words × 4bits) containing in it a character generator for the on-screen display and controller capable of receiving TV signals. It is a 52 pin shrink Dip(Dual in-Line package) occupying a small space on a printed circuit board, which has of the ample functions such as various of on-screen display functions, automatic search function, remote control decoder function, Audio/Video mode function, PWM(pulse width modulation) control function of VOLUME/BRIGHTNESS/COLOR, Clock function, ON/OFF/SLEEP timer function, auto mute function, auto off function, digital AFT function, MTS(Multi-Television Sound) control function, and etc.

2. OUTLINE FOR SMM-111 SPECIFICATIONS
- 1) Single operating power of 5V±10%
- Voltage synthesizer tuning system with programmable 40 or 60 positions.
- 3) Built-in on-screen display function.
- 4) Fade out function of on-screen display.
- 5) 12-hour display clock function.
- Power ON/OFF timer function. (ON/OFF timer which operates at 24 hour intervals, and ON/OFF can be independentity set.)
- Sleep timer function (Substraction can be set at 30 minutes intervals from Max 120 minutes)
- 8) Direct remote control with 37 keys.
- Capable of directly selecting channel with 11 keys of the transmitter.
- 10) Auto search up/down functions of broadcasting stations.
- Full auto search / memory functions of broadcasting stations.

12) High precision digital AFT (Automatic Fine Tuning) function.
13) Capable of automatic/manual switching of fine tuning with AFT ON/OFF switch
14) Memory function of manual fine tuning up/down condition.
15) Built-in decoder; M50560-001P(for transmission) and preamp module(SC-05 or MM-007) are used.
16) Volume, Color, Brightness UP/DOWN functions(64 step duty variable PWM output).
17) Previous channel call function(This function is for reading out the NO. of channel selected just before selecting the present channel).
18) TV/VIDEO1/VIDEO2/S. VIDEO change over output : TV/VIDEO1/VIDEO2/S. VIDEO
19) Auto power-off function (This function is the automatic power-off operation in case of no-signal of receiving channel under its state for 15 minutes without any operation).
20) Auto power-on function(This function is the automatic power-on function for aging TV set in the production line)
21) Auto sound mute function(Sound is automatically muted while there is no signal).
22) Auto video mute function(Noise is automatically blanked while there is no signal).
23) calculator function.
24) Capable of selection MTS(Muiti-Television Sound) mode.
25) Message function (Capital letters : 8 words, small letters :16 words, total 24 words).
26) Station name function(0-9 position) Option.
27) Automatic system switching and on-screen display function of the multi-system TV(PAL/NTSC). On-screen display corresponding to the ident input is performed by the follwing table.

Page 56

On screen display	-	PAL	SECAM	NTSC 4.43	NTSC 3.58
pin 21 (H3)	н	L	Н	L	L
pin 22 (H2)	Н	Н	L	L	L
pin 23 (H1)	×	х	х	L	н
On screen display position	60	50	50	60	60

3. SYSTEM KIT CONFIGURATION

Location NO.	Type NO.	Package	Description
RIC01	SMM-III	SDIP-52Pin	4bits microcomputer
RIC02	KM93C46	DIP-8Pin	Non-Voltatile memory(E ² PROM)
ICT01	M50560-001P	DIP-20Pin	Remote Control transmitter

4. THE ILLUSTRATION OF RM-111 SYSTEM BLOCK

Page 57

5. MICROCOMPUTER (SMM-111) TERMINALS DESCRIPTION

Pin No.	SYMBOL	NAME OF TERMINAL	DESCRIPTION	PIN STRUCTURE
1	VAPO	volume control output	It is control terminal of the volume. It becomes 64 steps as 6bit DATA. The modulated wave form of the pulse width is the frequency 1KHZ, It is put out the minimum pulse width as t=16µsec. The output wave form is all ^¬ L _J at the minimum and after the ^¬ H _J pulse(16µsec) increase each one according to the up-key puts in. It becomes ^¬ H _J between 62 and 63 as the maximum.
2	VAP1	color control output	It is the color control terminal. The output wave form is equalled with VDPO.	equality with VDPO
3	VDP2	Brightness control output	It is the color control terminal The output wave form is equalled with VDPO.	equality with VDPO
4	VDP3	contrast control output	It is the contrast control terminal. The output wave form is equalled with VDPO.	pull-up resistance withstand
5	INT	Remote control signal input	It is Active ^[L] as the input terminal of the remote control signal. It uses M50560-001P to the transmtter.	equalify with- VDPO
7		TV/video control output	TV Video1 Video2 S-Video	NCH, TR open drain I2V with stand
8
9	D/A	Tunning control output	It is the terminal for the tunning voltage control. The 14bit PWM is put out. The output wave form of D/A port divides the period To(the frequency about 122HZ) to 2 ¹⁴ pieces minimum pulse width and the pulse width as the To unit is modulated according to the 14bit DATA.
10	P2	Power control output	It is the power control terminal. This output is the Active 「H」 H → power on L → power off If the power key is put in, this output is alteratied. When the Reset is removed, 「L」, that is, started at the power off.	CMOS inverter

Page 58

Pin No.	SYMBOL	NAME OF TERMINAL	DESCRIPTION	PIN STRUCTURE
11	P1	Multi control output	^¬L 」 output is becoms at the auto mode time and ^¬ H」 is become at the manual mode time.	CMOS inverter
12	P0	Diode switch output	Station name. Auto on. It is the output of the UM and UM1. It becomes ^¬ L _J only at the first time during reset remove, and after becomes ^¬ H _J	CMOS inverter
13 14 15 16	F3 F2 F1 F0	Key Scan output	It is the output for the key scan. It puts out the 「L」pulse by about a 3 msec period. The key scan is used at the Active 「L」	CMOS inverter
17 18 19 20	G3 G2 G1 G0	Key Retum input	Key Matrix, Diode switch. It is the scan signal input of the alternative switch. The key scan is used at the Active ^¬ L _J
21 22 23	H3 H2 H1	PAL INPUT SECAM INPUT NISC INPUT	OSD - PAL SECAM NTSC4.40 NTSC3.58 H3(21) H L H L L H2(22) H H L H1(23) X L H OSD Position 60 50 50 60 60	N.CH · TR open Drain
24	H0	50/60
25	TEST	Test Mode Terminal	It Connects to Vcc at the using time usually.
26	Vss	GND terminal	It Connects to the DV power
27	ĀĊ	Reset input	The circuit; like the below, between the AC terminal and Vss terminal is added, So It is able to the moving of reset at the power input time.	pull-up resistance with- stand
			become ^r L _J for the minimum 8µsec at the point of view that the power voltage arrives to the regular voltage, the reset is moving and each terminal is set at the first situation

Page 59

Pin No.	SYMBOL	NAME OF TERMINAL	DESCRIPTION	PIN STRUCTURE
28	OSC output	Oscillate Circult input, output	Because the CMOS inverter and the high resistance in the interval is withstand, the passive vibrator and the condensor of the 4,000MHZ between both terminals is attached at the external, so the standard signal can be obtained.
29	OSC input		OSC OSC IN OUT 4MHz Quartz RC813 T RC812
30	oL	Video Mute Output	It is the Video Mute output. Video Mute ON at the 「H」 Video Mute OFF at the 「L」	CMOS inverter
31	J1	Toggle
32	J2	Band		CMOS inverter
33	J3	Output	Band J2 L L H
34	D.	E ² PROM CS output	It is the output for E ² PROM CS control. Usually it is ⁽ H _J , it becomes ⁽ L _J at the E ² PROM Acess time	CMOS 3 state
35	AFT	AFT signal input	It is the AFC signal input terminal. The AFT signal putting out from TV is compared with the 3 bit A/D converter. So it is doing the Version of the Up and Down signal. As it is using this version, the search is doing.

Page 60

Pin No.	SYMBOL	NAME OF TERMINAL	DESCRIPTION	PIN STRUCTURE
36	Lo	Sync pulse input	It is the input terminal of H-sync(horizontal synchronizing) signal. The pulse of this horizontal synchronizing signal makes about 1.02 µsec count. So, when the value is 14≦Syns ≦21, it decides to be the synchronizing.
37	L1	SCL output	It is the PIP control output It uses with the SCL	Nch TR open drain
38	L2	E ² PROM DT input, output	It is the E ² PROM control input and output It uses with DT I/O	Nch. TR open drain pull up withstand nothing
39	L3	E ² PROM CK output	It is the E ² PROM control output, It uses with E ² PROM CK.	Nch. TR open drain pull up withstand nothing
40	КО	BASS output	It is the Balance control terminal. The output wave form is equalled to the VDPO	Nch, TR open drain pull up withstand nothing
41	К1	BALANCE output	It is the Balance control terminal. The output wave form is equalled to the VDPO	Nch TR open drain 12V withstand
42	К2	TREBLE output	It is the TREBLE control terminal. The output is equalled to the VDPO	Nch TR open drain 12V withstand
43	КЗ	SDA	It's the PIP control output It uses at the SDA control	Nch TR open with- stand
44	output	RGB OR output	It's the Video output terminal for CRT indication. The	CMOS inverter
45	В	B Drive output	output polarity is the ^r H _J active, and the reset time
46	G	G drive output	becomes ^r L _J The OUT output is the OR output of
47	R	R Drive ourput	the R.G.B.
48	OSC ₂	CRT Oscillation output	Simply the oscillation circuit for the CRT indication is made up.	CMOS inverter
49	OSC1	CRT Oscillation output

Page 61

Pin No.	SYMBOL	NAME OF TERMINAL	DESCRIPTION	PIN STRUCTURE
50	V-sync	V-sync input	It has the hysteresis as the vertical synchronism signal input terminal for the CRT indication	-
51	H-sync	H-sync input	It has the hysteresis as the horizontal synchronism signal input terminal for the CRT indication The input polarity is the Active ^[L]	-
52	Vdd	The power terminal	It connects to the +5 V power	-

6. CIRCUIT DESCRIPTIONS

1) Stand-by power supply

The stand-by voltage is put out at the switching trans second 2 pin for power, rectifies the switching voltage by the rectifying small character (D816, C828, C827), and is provided to the 5V requlator circuit through D401. The stand-by power is kept up regularily even if the AC input voltage increase or not between 100V~260V. RQ803 is the series regulator that provides 5 volts to the load and the base voltage of RQ803 is capacited by zener diode (RD804).

The regulated 5V is supplied to micom (SMM-111) VDD. NVRAM(KM93C46) VDD, the reset circuit, preamplitier for the remote control and the other circuits.

2) Reset Circuit

If pin 27 of SMM-111 is low when the stand-by power is turned on(V_DD=Low - > High), this logical low initializes every internal logic and inhibites every the operation except the oscillator circuit and the scanning counter. And then the rising edge of this reset signal reads out the tuning data from NVRAM and the other data from the preset matrix and the internal ROM. This reset signal is made by the reset circuit(RQ801, RR801, RR902, RR803, RD801). The 5V from stand-by 5V regulator is input to RQ801 base when the stand-by power is turned on for the first time. RQ801 maintains OFF station, before the 5V line rises to 4.2V(3.6V+VBE of RQ801) or so. That is, the reset signal from RQ801 collector goes to "Low". After the 5V line rise to 4.2V, then "RQ801 --> ON". So the reset becomes "High" and continuously keep it unit the stand-by power is turned off

3) Power ON/OFF Control

Pin 10 of SMM-111 is the output terminal of controlling the main power supply. When the power button is depressed, pin 10 output goes "High", and Q805 is turned on and Q806 is turned off. Then horizontal oscillation becomes active.

4) Clock oscillator

Pin 28 and pin 29 are the terminals for the reference frequency oscillator of SMM-111. The frequency of this oscillator is set to approximately 4MHz by means of RC812, RC813, and RX01 connected to these pins. The accuracy of 4MHz determines the precision of 12hour clock function. Also pin 48 and pin 49 are terminals for reference frequency oscillator of character generator (onscreen display). The frequency of this oscillator is set to approximatelu 5MHz by adjusting the variable resistor (VR111). This reference frequency (approx. 5MHz) relates to the horizontal display position of onscreen charactor.

5) Analog control(Volume, Color, Brightness, Contrast, Tint etc.)

The volume output from SMM-111 pin 1 and its duty is changed in 64 steps(6 bit resolution) by pressing the volume up/down key. When the power is turned on for the first time(Vdd=Low -> High, AC=High -> Low), voice signal is about 33% of the max. The volume value is output as initial volume value. When the volume reaches the maximum value or minimum value during the volume up/down operation, duty does not change beyond these values in the volume-up. Key is kept pushed, "High" period of the output waveform from pin 1 becomes longer

Page 62

than "Low" period.

By the Low pass Filter consists of the RR102 and RC101, it becomes D.C. So it controls the IC AN5836 for control and is doing the Volume Up/Down.

The analog control of Color, Brightness, Contrast and Tint are the same as above volume control.

6) Auto search up/down

When "Program/Normal" switch is set to "Program" position, the tuning system searches upward/downward for

an active TV station by pushing "search up/down" key. The searching is automatically stopped when an active broadcasting station channel is encountered. If this channel is desired, its exact tuning voltage can be memorized by pressing "Memory" key. If not, "search up/down" key should be pressed repeatedly until the system catches a desired TV station. The following figure illustrates the timing chart of auto search up/down operation.

The principle of search up(down) is as following.

When the system is starting to search up(down), if the sync signal(pin 36) that comes from RQ404 is existing, the system is searching upward(downward) at a fast speed (coarse tuning) until the sync signal and "AFT down(up)" signal disappear.
② The system is still searching upward(downward) at a fast speed until the syne signal and "AFT up(down)" signal is encountered.
(3) The rising edge of "AFT up(down)" signal changes the tuning speed from Coarse to Fine(slow speed), while the sync signal is existing.
④ If "AFT down(up)" signal becomes active within about 250ms from the trailing edge of "AFT up(down)" signal, the rising edge of "AFT down(up)" signal enables the

system to stop the search tuning. If there is no sync signal at this time, Coarse tuning(like mode 2) will automatically begin from the trailing edge of "AFT up (down)" signal. When the tuning system stops, the exact tuning point is computed by the ALU(Arithmetic Logic Unit) of SMM-111 as the function of the tuning voltage at the trailing edge of "AFT up(down)" signal and the rising edge "AFT down(up)" signal. AFT command in above figure is derived from the frequency discriminator of IC101(TA8700) and the sync signal comes from the amp of IC201(M51494L) Noise reduction through the inverter(RQ404). The following figure shows the flow chart of "search up/down" operations.

Page 63

7) Auto Serach up/down

8) Memory in

Channel memory operation is performed by pressing "Memory" key in "Program" mode, after finishing the search operation. This key triggers the memory writing sequence to store the digitalword into NVRAM(RIC02: KM93C46) corresponding to the tuning voltage and the band of the selected channel.

9) Tuning voltage

The tuning data with 14 bit resolution is synthesized by D/A (Digital to Analog) output (pin(9)) of SMM-111 in the inverter (RQ804) and the integrator(SMM111), and then the tuning voltage is applied into the Vt terminal of the electronic tuner (TU001). The purpose of the 3rd integrator(LPF) is to remove any

Page 64

high frequency or ripple and assure a clean DC voltage. For generating a tuning voltage(Vt), it is necessary to supply 33 volts to the collector of RQ804 throung RR808. So the B+(130volts) is fed to RD813(UPC574J/KA33V) via RR807/RR809(24k 2watts) producing a 33Vpower source.

10) Fine tuning up/down

In "Normal" mode, the tuning voltage is ramped up/down by the sweep time of 120sec in VHF low band, 240sec in VHF high band and 480sec in UHF band while "Fine tuning up/down" key is pressed. Once "Fine tuning up/down" key is depressed, AFT is automatically defeated and AFT status can be memorized in NVRAM(RIC02)

11) Band selection

Pin32 and 33 of SMM-111 are the band selection terminals for VL, VH and UHF respectively. These terminals are operated as the output terminals for band selection. During "Normal" mode, the contents of the memory(RIC02) selects the VL, VH and UHF. The outputs(active "Low") of these pins control the band switching terminals(BL, BH, Bu) of tuner by the driver RIC03(LA7910).

12) Infra-red remote control

The remote system used with the synthesizer operates with infra-red signals. It uses a PCM(Pulse Code Modulation) for low battery drain.

The system provides the maximum of 32 commands from the transmitter. The remote encoder IC(TIC01) outputs a series of 16 bit coded pulses to the LED. These LED emit energy in the infra-red spectrum when current flows through them. The code will vary depending on the function button pressed, but will consist of binary ones and zeros. The carrier frequencies for the remote control operation(455KHz) are generated by a ceramic resonator (XT 1). The I -R digit signal is picked up by the photo diode and amplified in the preamplifier module(RCP01). RCP01 is shielded in the shield box to eliminate the improper operation which can result from external noise. The data from preamplifier(RCP01) are input to SMM-111 pin(s) and the applied signals are directly decoded.

Output table

	VL	V _H	UHF
Band1 (33)	L	н	L
Band2(32)	L	L	н





s

Page 65

8. INSTRUCTION MANUAL

Page 66

MEMO BUTTON

O TV/VIDEO BUTTON

Use the button to programme the channels manually.

M NOISE REDUCTION ON/OFF BUTTON

NOISE REDUCTION

Press the button to reduce a noise on the

picture.

SPACE WIDE ON/OFF BUTTON

Press the button to hear a extended sound.

will be changed as below.

Press the button to select TV or VIDEO.

Whenever this button is pressed the mode

3. TRANSMITTERS PANEL

Page 67

4. CONTROLS FUNCTIONS (TRANSMITTERS)

CHANNEL SELECTION BUTTON

figures.

POWER BUTTON

(a) (b) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) (c) ⇒ ਭ( ) ह( ) ह(

Press the Button to turn Power on or off.

These keys are channel numbers except

In the calculator mode, these keys are

In the message or station name mode,

MENU 1 mode or MENU 2 mode.

O VOLUME UP / DOWN BUTTON

1
	+
	VOL.
	Ξ

Press the button to increase or decrease

I -/- BUTTON

In the case of selecting the channel number. Press the button to select a single or double digit, In the calculator mode, the button is used for point.

P.SEL (PICTURE SELECTION) BUTTON

S. SEL(SOUND SELECTION) BUTTON

- MEMORY -

PMODE (PICTURE MODE) BUTTON

Press the button to select the picture

Press the button to leave a space between

TV/VIDEO

Whenever the button is pressed, the mode will be changed as below.

Press the button to select TV or VIDEO.

G CHANNEL UP / DOWN BUTTON

Press the button to increase or decrea

the channel numbrer.

Using the button, you can select up to 40 or 60 channel numbers.

Page 68

♠ S.MODE (SOUND MODE)BUTTON

MODE UP / DOWN BUTTON

RECALL BUTTON

Press the button to select the sound mode.

In the picture or sound mode you can

using this button.

Timer on clock.

control the level of sound or picture mode

1		>

	HOUR

	MIN
1		/

Using these buttons, set the Clock,On Time, OFF time.

MENU 2 BUTTON

Using the button, you can select the mode of calculator, message or station name.

STORE BUTTON

In the message or station name mode, press the button to store. In the calculator mode, this button is used by a equal (=) key.

MUTE BUTTON

Press the Button to mute the sound.

Press the button to display channel

number. system name. station name.

Ø Q.VIEW (QUICK VIEW )BUTTON

Press the button to view quickly. In the calculator mode, the button is used by a plus (+) key.

1 TIMER BUTTON

The button is used to activate the ON and

OFF TIMER.

Press the button to set the time.

In the calculator mode, the button is used by a minus (-) key.

NORM/CLEAR BUTTON

When the button is pressed, the picture mode change to STANDARD 1 mode and the sound mode change to STANDARD mode.

In the MENU 2 mode, press the button to clear.

Page 69

SLEEP BUTTON

Press the button to set the sleep time.

Use the SLEEP button, if you require the TV to switch off automatically after a period of time.
Whenever the SLEEP button is pressed, the time will be changed as below.

$0 \rightarrow 120 \rightarrow 90 \rightarrow 60 \rightarrow 30$

Press the SLEEP button until you get the time you want. The set will automatically turn off after that time.
· In the caculator mode, press the button to clear all.

20 MANUAL SYSTEM BUTTON

Press the button to discriminate between systems by Manual.

Press the button to change system mode as below.

→ PAL-→SECAM-→NT 4.43-→ NT 3.58 ------------------------------------

AUTO / MAN SYSTEM BUTTON

active.

Press the button to discriminate between systems by Auto or Manual. After the button AUTO/MAN SYSTEM to be pressed, the manual system button is

In the calculator mode, the button is used by a dividing (÷) key.

MEMO






	┥

	_
	┥



	┥

	4
	-

Page 70

9. SEMICONDUCTOR SPECIFICATION

1. DECADE COUNTER/DIVIDER(TC4017BP)

1) INSTRUCTION

TC4017BP is decimal Johnson counter consisting of 5 stage D type flip-flops equipped with the decoder to convert the output to decimal. Depending on the number of count pulses fed to CLOCK or CLOCK ENABLE, one output among 10 output lines "Qo" through "Q9" becomes "H" level.

The counter advances its state at rising edge of CLOCK (CE = "L") or falling edge of CLOCK ENABLE(CLOCK = "H"). CLEAR input of "H" level resets the counter to Qo = "H" and Q1 through Q9 = "L" regardless of CLOCK and CE.

ITEM SYMBOL BATING UNIT Supply Voltage VDD VSS-0.5~VSS+20 Input Voltage VSS-0.5~VDD+0.5 Output Voltage VOUT VSS-0.5~VDD+0.5 Input Current lιN mA ±10 PD Power Dissipation mW 300 Storage Temperature Tsta -65~150 r Lead Temp./Time T_sol 260°C . 10sec.

2) MAXIMUM RATINGS

3) TIMING DIAGRAM

4) BLOCK DIAGRAM

Page 71

2. SYSTEM SWITCH FOR A MULTI-COLOR TV(TA8615N)

1) INSTRUCTION

The TA8615N is a TV system detection IC designed for providing an automatic multicolor standard system detection and processing the Video-Chroma-Deflection and the SIF frequency conversion in conjunction with the TA8616N multicolor Video-Chroma-Deflection. This device includes an SIF switch and a converter with a 500kHz oscillator for the SIF frequency conversion and selection, and a system logic circuit for the system detection and control the system in a shrink type 30 leads

plastic-Dual-In-Line package.

The system logic circuit may be controlled by a mode control µ -COM(Forced mode) or a mode logic I/O set of the TA8659AN.

The SIF switch controlled by an internal 4.5MHz recognition circuit selects on of the SIF signals(4.5MHz or 6.0MHz converted from 5.5MHz, 6.0MHz or 6.5MHz) and sound trap circuits for the video signal path.

500kHz Oscillator and Mlxer
SIF Switch 4.5/5.5MHz
Sound trap (4.5/5.5/6.0/6.5MHz)
System Logic

Characteristic	Symbol	Rating	Unit
Supply Voltage	V _CC	12	V
Maximum Logic Input Level	V _in	V _CC	V
Input signal Voltage	V _in	3	V _p-p
Power Dissipation*	PD	1.4	W
Operating Temperature	T _opr	-20 to 65	deg. C.
Storage Temperature	T _stg	-55 to 150	deg. C.

Derated linearly above Ta=25deg. C. in the proportion of 11.2mW/deg.

2) MAXIMUM RATINGS(Ta = 25 deg.C.)

Page 72

- 67 -

3) BLOCK DIAGRAM

Page 73

4) MULTI-COLOR SYSTEM

- 68 -

Page 74

		TARC			[		·
	ļ		או ↔ או א ד	48615N		CPU Con	trol Signal		((	OSD Inform	ation	3 58 / 4 43
		SWI	SWII	SWIII		CPU → TA8615N			CPU ← TA8615N
		#29	#28	#23	#7	#8	#10	#11	#1	#2	#4	#28
	PAL	н	Н	М	L	L	L	L	L	н	н	L
AUTO	SECAM	Н	М	м	L	L	L	L	н	L	н	L
MODE	NTSC 4.43	L	Н	M	L	L	L	L	н	н	L	L
	NTSC 3.58	L	L	М	L	L	L	L	н	н	L	Н
	B/W	L	M/L	L	L	L	L	L	н	н	н	L
	PAL	н	н	Н	Н	L	L	L			į	L
FORCED	SECAM	н	Ľ	н	L	н	L	L		FREE		L
MODE	NTSC 4.43	L	н	Н	L	L	Н	L				L
	NTSC 3.58	L	L	Н	L	L	L	н				Н
Control Terminal Output or Input Voltage			H = 6V M = 2V L = 0V			H = 5 L = C	₹V IV			H = 9V L = 0V		3.58 : H 4.43 : L H = 9V L = 0V

5) LOGIC TABLE

- 69 -

Page 75

6) DC CHARACTERISTICS(V_CC = 9V, Ta = 25±3℃)

TERMINAL	FUNCTION	SYMBOL	MIN	TYP	MAX	UNIT	COMMENT
1	OS I OUT	-	-	-	-	v
2	OS I OUT	-	-	-	-	V
3	VIDEO 4.5M Trap	V3	2.0	2.3	2.6	v
4	OS II OUT	-	-	-	-	v
5	GND	-	-	0	-	v
6	VIDEO 6M Trap	V6	2.0	2.0	2.6	v
7	PAL IN	-	-	-	-	v	5v Applied
8	SECAM IN	-	-	0	-	v	GND
9	SIF OUT	V9	3.4	3.8	4.2	V
10	4.43 NTSC IN	-	-	-	-	v	GND
11	3.58 NTSC IN	-	-	-	-	v	GND
12	MIX IN	V12	3.4	3.7	4.0	v
13	V PULSE IN	-	-	-	-	v	OPEN
14		V14	4.0	4.4	4.8	v
15	500k OSC	V15	3.9	4.3	4.7	v
16	MIX OUT	V16	6.4	6.8	7.2	v
17	6M Oscillator	V17	-	9	-	v
18	S & F	V18	3.9	4.4	4.9	v
19	GND	-	-	0	-	v
20		V/00.01	٨E	EI	60	V
21	SIFIANK	V20,21	4.0	5.1	0.2	v
22	V _CC	VCC	_	9	-	v	Power Supply
23	SWI	V23	5.8	6.1	6.4	V
24	SIF 6M IN	V24	4.2	4.5	4.8	V
25	4.5M/OTHER Disc.	V25	7.2	7.5	7.8	v
26	3.58/4.43 Disc.	V26	-	-	0.5	v
27	SIF 4.5M IN	V27	4.2	4.5	4.8	V
28	SW I	V28	5.3	6.1	6.4	V
29	SWI	V29	5.8	6.1	6.4	V
30	VIDEO OUT	V30	1.1	1.5	1.9	V
17	6M Oscillator		0.7	20	E 4	m۸
22	V _CC		2.1	৩.খ	D. I	IDA.	+17, +22 Total Current

Page 76

7) TERMINAL DESCRIPTION

TE	RMINAL	FUNCTION
1	OSD I (PAL)	Control signal output terminal to CPU in auto mode. Mode infromation identified by TA8616N are put out after decoded by TA8615N as a OSD information. PAL mode is low state. High=9V, Low=0V
2	OSD II (SECAM)	Control signal output terminal to CPU in auto mode. Mode information identified by TA8616N are put out after decoded by TA8615N as a OSD information. SECAM mode is low state. High= 9V, Low=0V
3	VIDEO INPUT	Video input terminal after 4.5MHz sound trap. Sync tip Clamp is performed in this section.
4	OSD II (NTSC)	Control signal output terminal to CPU in auto mode. Mode information identified by TA8616N are put out after decoded by TA8615N as a OSD information. NTSC mode is low state. High= 9V, Low=0V
5	GND	·
6	VIDEO INPUT	Video input terminal of the 5.5, 6.0 and 6.5MHz sound trap. sync tip clamp is performed in this section.
7	PAL. MODE INPUT	Control signal input terminal in forced mode. Set to low state in auto mode and to high state in forced mode (PAL). High=5V, Low=0V
8	SECAM MODE INPUT	DITTO(SECAM) High=5V, Low=0V
9	SIF OUTPUT	SIF input signal either from #24 or #27 are selected and put it out under the control of 4.5/other discriminator.

Page 77

Т	ERMINAL			FUI	INTERFACE
10	NTSC(4.43) MODE INPUT	Control signal input terminal in forced mode. Set to low state in auto mode and to high state in forced mode (4.43NTSC) High=5V, Low=0V
11	NTSC(3.58) MODE INPUT	DITTO(3. High=5V,	58NTSC Low=0V	>) /
12	MIXER INPUT	SIF signal After mixi SIF signal	l 5.5, 6.0 ng with 5 l is gene	and 6.5Ml 500kHz osc rated.	Hz input termir sillator output, o	nal. converted 6.0M	ЛНz
13	V-PULSE INPUT	SIF freque pulse). To chroma su the pulse	ency disc avoid m ubcarrier input is e	criminator a hisfunction or the discrir exist-existin	activation pulse of the discrimir minator make t ng.	e input(Vertical nator by such a function only d	Sync as uring
14	OSC	Connect t	he reson	ator of 500	)KHz between	terminal #15.
15	OSC	Connect th	he reson	ator of 500	kHz between	the terminal #1	14.
16	MIXER OUTPUT	Converted after mixin	i 6MHz c ng with 50	output of SI 00kHz osci	F input of 5.5, illator output of	6.0 and 6.5Mł 6MHz.	-Iz
17	6MHZ RESONATOR	A resonan output pick	t tank an king up.	e connecte	ed between Vc	c for 6.0MHz	SIF
18	SAMPLE &	S/H termin	al of 4.5	/other disci	riminator.
	HOLD		#18	#25	#19 OUT	#30 OUT
		4.5	Н	L	#27 Input	#3 Input
		OTH- ER	L	Н	#24 Input	#6 Input
19	GND

Page 78

-	rerminal	FUNCTION
20	4.5M Resonator	Connect the tank coil of 4.5MHz to discriminate the SIF input frequency.
21	4.5M Resonator	4.5 6.0 Input frequency(MH _z )
22	Vcc	9V(Тур.)
23	SW≣	Input/Output interface terminal with TA8659AN and state of the terminal is in accordance with logic table. Input threshold level is 1.0V. Output levels are High=2/3VCC, Low=GND
24	SIF 6M INPUT	Converted 6MHz SIF input terminal
25	4.5M/ OTHER DISCRIMINA- TOR OUTPUT	4.5MHz/other SIF frequency discriminator output terminal. 4.5MHz=Low(0.2V) Other=High(4.5V) Max. current sink capability is 10mA typ.
26	CHROMA TRAP SWITCHING OUTPUT	Chroma trap switching control output terminal. By the output chroma trap of either 3.58MHz or 4.43 at video input terminal of TA8616N are selected in accordance with mode information from CPU(in Forced mode) or TA8659AN(in Auto Mode). The state of output are discribed on logic table. High=6V, Low=0V current capability of the terminal is ±5mA.
27	SIF 4.5M INPUT	Input terminal of 4.5MHz SIF signal.
28	SWI	Input/output interface terminal with TA8659AN and state of the terminal is in accordance with logic table. Input threshold level is 4.0V. Output levels are High=2/3Vcc, Low=GND
29	SWI	ΟΤΤΙΟ
30	VIDEO OUTPUT	Video input signal from either #3 or #6 is selected and put it out under the control of 4.5MHz/other SIF discriminator.

Page 79

3. VIDEO AND SOUND IF FOR TV SET(TA8700N)

1) FUNCTION

PIF

3-stage IF amplifier
Video detector
Black/white noise inverting circuits
Single AFT output
Fast response AGC(peak) with dual time constants
Reverse RF AGC
SIF
Quadrature detector

2) MAXIMUM RATINGS(TA + 25 $\mathcal{Q}$ )

ITEM	SYMBOL	RATING	UNIT
Power Supply Voltage	Vcc MAX	15	V
Power Disspation	PD	1.4	м
Operating Temperature	Topr	-20 to	r
Storage Temperature	Tstg	-55 to 150	r



NENO





4




























	•

Page 80

- 75 -

Page 81

ITEM		SYMBOL	MINIMUM	TYPICAL	MAXIMUM	UNIT
Recommended Supply Volta	ge	V _CC	8.1	9.0	9.9	v
Supply Currient		ICC	28	38	48	mA
	3	V ₃	5.7	6.2	6.7	V
	4	V ₄	3.5	4.0	4.5	V
	5	V ₅	3.5	4.0	4.5	V
	7	V ₇₍₁₎	8.8	· -	-	V
		V ₇₍₂₎	-	-	0.1	V
	8	V ₈	3.3	3.9	4.5	v
Torminal Valtage	9	V ₉	2.2	2.7	3.2	v
Terminal voltage	10	V ₁₀	3.2	3.7	4.2	V
	12	V ₁₂	2.5	3.0	3.5	V
	14	V ₁	4.0	4.5	5.0	V
	15	V ₁₅	4.0	4.5	5.0	V
	16	V ₁₆	5.9	6.4	6.9	v
	17	V ₁₇	5.9	6.4	6.9	v
	18	V ₁₈	2.3	2.8	3.3	v
	20	V ₂₀	2.5	4.0	5.5	V

4) ELECTRICAL CHARACTERISTICS DC CHARATERISTICS(Ta= 25°C, VCC= 9V)

Page 82

5) TEMINAL DESCRIPTION

Term	ninal	Function
1 2	AGC Filter	It's the twofold time constant system for the AGC speed up. As the terminal 2 connects to the GND, it is able to the picture mute.
3	AGC Delay	The standard voltage of the converter is changed, so the delay point of the RF AGC is mediated.
4 5	PIF Input	With the input terminal of the PIF signal and with the emitter follower, it is put in. The input impedence is the 2.5F and 4 PF.
6	PIF GND	It's the GND section of the PIF. The condensor between PIF and Vcc pin 19 is connected.
7	RF AGC Output	It's the RF AGC output terminal for the tunner
8	FM Output	It's the output of the FM detection circuit.
9 10	SIF tank	It's the sound detection coil connection terminal. It's able to the non-adjustment by the ceramic descriminator. Also, the terminal 9 is able to do the sound mute by doing the GND.
11	SIF GND	It's the GND section of the SIF. The condenser between the SIF and the Vcc pin 13 is connected.
12	SIF Input	In case of the SIF ingredient is obtained from the picture detection output terminal 14, it connects through the sound Trap.
13	SIF Vcc	It's the Vcc section of the SIF. The condensor between the SIF and the GND pin 11 is connected.
14	Video Output 1	As the picture output terminal for the SIF detection, it is the terminal not through the noise inverter.
15	Video Output 2	It's the picture output terminal. The piture mute appears by the terminal 2
16 17	Video Tank	It connects the video detection coil
18	AFT Tank	The control signal is added the single end, and the phase difference is extracted by the current. As the voltage change is become by the external resistance, it is able to connect the AFT tank with 1 pin. Also if the 10k Q connects the GND, it able to check by the AFT deteat.
19	PIF Vcc	It is the Vcc section of the PIF. It connects the condenser between the DIF and the GND 6
20	AFT Output	It's the AFT output terminal

Page 83

4. PIF/SIF SYSTEM FOR CTV (TA8700N)

1) PIF PART

(1) PIF amplification unit

The #4 and #5 terminals are the input terminals, and anything among the input terminal and the different input and single and is able to use. The PIF unit is controlled the profit by the internal peak ration AFC.

(2) Video detection unit

At the PIF detection unit, the amplified PIF signal with the requirement level enters into the video detection unit. Also, by the tank coil connected to the terminal #16 and #17, the IF carrier is extracted. This signal which amplifies and restains in the internal limiter and the amplified PIF signal is the synchronous detection at the multiplier circuit.

Then, the 4.5MHz of the SIF signal is the duplication of the intercarrier simultaneously. The composite video signal duplicated from the video deflection unit amplifies in the video amplification unit (simultaneously to remove the high-frequency at the internal low pass filter), so it is put out at the terminal #14 and the same time is used with the input signal of the internal AGC circuit and noise inverter.

(3) Video amplication unit

When the video amplification is in the Amp unit including the emitter follower output unit of the 6mA output capacity, #14 and #15 terminal becomes the SIF signal output terminal and the composite video signal output terminal for Video, Chroma, and Deflection. At here, because #14 is the output not through the noise inverter for the SIF input, the phase distortion doesn't become by this.

The sync Tip (the synchronizing signal vertical hem) of the composite video signal putting out from the #14 terminal is to the 2.0 clamp, so the #14 terminal D.C potential becoms the bias voltage of the latter video management part. Also, this output sends to the noise inverter circuit of the AGC circuit.

(4) Noise inverter

Because the peak ration movement level is decided

by the standard of the sync level at the TA8700N, the black side(Low potential side) noise causes the fire movement of AGC, S/N blazing fire, and the synchronizing insecurity. Also, because to white-side noise can be brazed the S/N of both sides, the noise inverter(white/black)has been prepared as this counterplan

(5) AGC circuit

The Video deflection output becomes the input signal of the internal AGC and the external delaged RF AFC circuit. The input part of the AGC circuit, in order to preventing the abnormal condition of the lock up etc, has inserted the double column. The internal AGC circuit becomes the sequential output at the final unit of the triple column PIF amplification unit, and the each column of the gain should be controlled. The response time constant of the AGC circuit should be decided at the external time constant of #1 and #2 terminals. The #7 terminal should be made with the open collector as the output terminal of the RF AGC.

The #7 terminal should be made with the open collector as the output terminal of the RF AGC. At the D.C.voltage of the RF AGC actuating begining level(Delay Point) #3 terminal, it should be decided.

2) SIF PART

() SIF limiter unit

The TA8700N SIF is consisted of the 3-column differential SIF of the Limit Quadrature FM detection of circuit for the 3- column differential SIF and decides the De-emphasis time constant by the capacity connecting to the terminal 8#. The TA 8700N SIF limitter unit is consisted of the 3 - column differential amp of the input limiting sensitivity 200µ Vrms Typ. The #12 terminal is the SIF input terminal and the limiter output inducted the detection circuit from the balance consisting emitter follower 2 circuit.

(2) detector

The detector is doing the synchronizing detection

Page 84

between the limiter signal output at the synchronizing detection of the double and the balance forms and the abnormal signal by the abnormal Tank circuit connecting to #9 and #10 terminals.

The detection quality and band-pass quality of the detector is able to mediate and modulate by the plan of unique Tank coil Q. The detector output becomes the turning level shift by the current mirror circuir and is connected to the next unit electronic volume control circuit.

5. AV SWITCH FOR COLOR TV WITH S-TERNINAL (TA8720AN)

1) INTRUCTION

TA8720AN is an IC used for switching of 4-inputs 3 circuits of sound(L, R) and video signals.

2) MAXIMUM PATINGS (Ta=25°C)

Audio Section(2 channels for a STEREO signal) Inputs : Three inputs for external signals an input for an internal TV signal

outputs : A switched and selected output Sound Mute

Video Section

Inputs : Two inputs for external signal

(Sync negative)

: YC inputs for S-VHS

: An input for an internal TV signal

(Sync negative or positive)

Outputs : Monitor output

(YC MIX circuit for S-VHS is built-in)

: Y signal output

: Chroma Signal output

CHAPACTERISTIC	SYMBOL	RATING	UNIT
Power Supply Voltage	V _CC max	15	V
Input Terminal Signal Voltage	E _in max	3	Vр-р
Input Terminal Voltage	V _in max	GND-0.3V~VCC+0.3V	*
Power Dissipation	P _D max	1.6(Note)	w
Operating Temperature	T _opr	-20~65	r
Storage Temperature	T _stg	-55~150	C

Page 85

LOGIC TABLE

	x	AV2 [#16]
		HIGH	LOW
AV1	HIGH	τv	E1
[#15]	LOW	S-VHS	E2

Page 86

4) DC Voltage Characteristic

TERMINAL	TERMINAL NAME	SYMBOL	MIN.	TYP.	MAX.	UNIT	NOTE
1	TV L Input	V1	5.2	5.7	6.2	v
2	TV R Input	V2	5.2	5.7	6.2	v
3	TV Input	∨3	5.1	5.6	6.1	v
4	S-VHS L. Input	V4	5.2	5.7	6.2	v
5	S-VHS R Input	V5	5.2	5.7	6.2	V
6	S-VHS Video Input	V6	5.0	5.5	6.0	V
7	TV Polarity Switch	V7	-	-	-	V
8	S-VHS Chroma Input	V8	5.0	5.5	6.0	V
9	L Input (1)	V9	5.2	5.7	6.2	V
10	R Input (1)	V10	5.2	5.7	6.2	V
11	External Video Input (1)	V11	5.0	5.5	6.0	V
12	L Input (2)	V12	5.2	5.7	6.2	V
13	R Input (2)	V13	5.2	5.7	6.2	V
14	External Video Input (2)	V14	5.0	5.5	6.0	V
15	Switch (1)	V15	-	-	-	V
16	Switch (2)	V16	-	-	-	v	-
17	Mute	V17	-	-	-	V
18	Video (Y) Output	V18	3.5	4.0	4.5	V
19	GND	V19	-	-	-	V
20	Chroma Output	V20	3.5	4.0	4.5	V
21	R Output	V21	3.8	4.3	4.8	v
22	L.Output	V22	3.8	4.3	4.8	v
23	Mode Output	V23	1.5	2.0	2.5	V
24	Video (Y) Input	V24	5.0	5.5	6.0	V
25	Clamp	V25	2.6	3.1	3.6	V
26	Chroma Input	V26	5.0	5.5	6.0	V
27	Gain Switch	V27	-	-	-	v
28	V _CC(1)	V28	-	VCC	-	V
29	V _CC(2)	V29	-	VCC	1	v	-
30	Monitor Output	V30	2.4	2.9	3.4	v

Page 87

5) Supply Current

CHARACTERISTIC	SYMBOL	MIN.	TYP.	MAX.	UNIT	NOTE
Supply Current (Pin 28 : VCC1)	ICC1	4.0	6.0	9.0
Supply Current (Pin 29 : VCC2)	ICC2	14	21	31	mA	—
Total Supply Current (I _CC1 +I _CC2 )	lcc	18	27	40

6) Input Resistance

TERMINAL	TERMINAL NAME	SYMBOL	MIN.	TYP.	MAX.	UNIT	NOTE
3	TV Input	R3
6	S-VHS Video Input	R6
8	S-VHS Chroma Input	R8
11	External Video Input (1)	R11	10	15	21	Kø
14	External Video Input (2)	R12					Supply an external voltage
24	Viedo (Y) Input	R24					which is 0.5V higher than
26	Chroma Input	R26					open voltage.
1	TV L Input	R1					Measure the flow-in current.
2	TV R Input	R2					Calculate the resistor value.
4	S-VHS L Input	R4
5	S-VHS R Input	R5	48	70	98	Kø
9	L Input (1)	R9
10	R Input (1)	R10
12	L Input	R12
13	R Input	R13

7) Output Resistance

TERMINAL	TERMINAL NAME	SYMBOL	MIN.	TYP.	MAX.	UNIT	NOTE
18	Video (Y) Output	R18	-	100	-		Measure the terminal voltage
20	Chroma Output	R20	-	100	-		variation when the flow-in
21	R Output	R21		100	-	2	current is 100µ A.
22	L Output	R22	-	- 130	-	2	Calculate the resister value.
23	Mode Output	R23	-	11	-	K₽
30	Monitor Output	R30	-	17	-	Q

8) Recommended Power Supply Voltage

CHARACTERISTIC	SYMBOL	MIN.	TYP.	MAX.	UNIT
9V Power Supply	Vcc	8.1	9.0	9.9	v

Page 88

6. DUAL AUDIO POWER AMPLIFIER (TA8200AH)

1) INSTRUCTION

The TA8200AH is dual audio power amplifer for consumer applications. This IC provides an output power of 13 watts per channel (at VCC=28V f=1KHz, THD=10%, RL=8 \varrow ).

It is suitable for power amplifier of TV and home stereo.

· High Output Power : Pout=13W(Typ.)

(Vcc=28V, RL=8 2, f=1KHz, THD=10%)

· Very Few External Parts.
· Built in Thermal Shut Down Protector Circuit.
Operating Supply Voltage Range : Vcc(opr)=10~37V
Built in Audio Muting Circuit.

2) MAXIMUM RATINGS (Ta=25°C)

CHARACTERISTIC	SYMBOL	RATING	UNIT
Supply Voltage	Vcc	37	v
Output Current (Peak/ch)	lo(peak)	2.5	А
Power Dissipation	PD	25	w
OperatingTemperature	Topr	-20~75	r	]
Storage Temperature	Tstg	-55~150	ъ	weigi

eight : 4.04g(TYP).

3) ELECTRICAL CHARACTERISTICS

(Unless otherwise specified, VCC=28V, RL=8g, RG=600 , f=1KHZ, Ta=25 °C)

CHARACTERISTIC	SYMBOL	TEST CIRCUTT	TEST CONDITION	MIN.	TYP.	MAX.	UNIT
Quiescent Current	Icca	-	VIN=0	-	50	105	mA
	POUT(1) - THD=10%	10	13	-	w
Output Power	POUT92)	-	THD=1%	-	10	-
Total Harmonic Distortion	THD	-	POUT=2W	-	0.04	0.2	%
Voltage Gain	GV	-	Closed Loop	32.5	34.0	35.5	dB
Input Resistance	RIN	-	-	-	30	-	Kø
Ripple Rejection Ratio	R.R.	-	Rg=0, fripple=100Hz Vripple=odBm	40	50	-	dB
Output Noise Voltage	VNO	-	Rg=10K ⊉ BW=20Hz∼20KHZ	-	0.14	0.14	mVrms

Page 89

4) APPLICATION INFORMATION

(1) Voltage Gain

The close loop voltage gain is determined by R1, R2.

$Gv=20\log \frac{R1 + R2}{R2} (dB)$ = 20log $\frac{20 \times 10^3 \ 10^3 + 400}{400}$ $\Rightarrow 34 (dB)$

$G_V = 20\log \frac{R1 + R2 + R3}{R2 + R3}$ (dB

When R3=220 g

G_V ≑ 30dB is given.

- 84 -

Page 90

5) MUTING

(1) Audio Muting

This IC is possible to make audio muting operation by using pin 11 muting terminal. In Fig. 3, the equivalent circuit in the muting circuit section is shown.

By means of reducing the voltage of pin 11 down to 2. 8V or less in Fig.3, Q1 is turned ON and the base voltage of Q2 in the differential circuit fablicated with Q 2 and Q3

Therefore, with the voltage reduction of pin 11, the input circuits of dummy of input terminal and that in the doted line operate and cut-off the input signal. After muting, the bias circuit continues it's operation and the power

supply current of quiescent time.

pin 8, the capacitor terminal for reducing the pop noise can reduce the pop noise through making the time constant longer by means of inserting the capacitor externary.

In the care this terminal is not used, short pin 8 with pin 11.

The voltage of pin 11 set up to 4V or more.

(2) IC Internal Muting at V_CC OFF

When V_CC=8V or less at V_CC off, the detection circuit at V_CC off is operated. And the base voltage of Q1 is reduced and the muting operation is mode.

Fig. 3

Page 91

10. ALIGNMENT AND ADJUSTMENT

1. GENERAL

Read the following carefully before attempting alignment.

A warm up period of at least twenty minutes should be allowed for the proper stabilization of the test equipment and receiver.
The alignment requires an exact procedure and sequence of contents.
A fine braids non-metallic alignment tool is required for peaking of coils during the alignment.
4) The isolation transformer should be used to prevent the shock hazards.
5) The test equipment specified or its equivalent is required to perform the alignment properly. The use of equipment that dose not meet these requirement may result in improper alignment.
6) Correct matching of the equipment is essential. The failure to use the proper matching will result in response which can not represent the true operation of the receiver.
7) The excessive signal and bias voltages from the

generator can cause the overloading of the receiver circuits and distortion of the response curve.

All shieds and shield grounding braids must be in place and grounded to chassis before proceeding with alignment.
9) The A. C power line voltage should be kept within the standard voltage ± 5 volts during the alignment.
10) Do not attempt to connect disconnect any wire while the receiver is in operation.

2. MAGNIFIED RESPONSE ALIGNMENT

1) Equipment
- a) Sweep / Marker generator b) Monitor scope (or Oscilloscope) c) D.C power supply (+12V) d) Bias supply (+4~4.5V) e) Matching Pad (See Figure 2)
- f) Direct probe

2) Connections

Fig 1. Magnitied Response Alignment

Page 92

3) Preparation

a) Connect the horizontal output of sweep / marker generator to the horizontal input of monitor scope.
b) Set the monitor scope gain for 0.1 V / DIV.
c) Connect the output of sweep / marker generator in series with matching pad to test point on the tuner through 10K ohm resistor.
d) Connect the monitor scope with direct probe to terminal TP -22
e) Apply +12V power supply to TP 12 on the main board.
f) Apply +4~4.5V bias to terminal TP15 on the main board.
g) Gradually increase or decrease the output of sweep / marker generator to obtain the 1.0V p-p response curve on the scope. If necessary, adjust the sweep center and the sweep width control for the proper location curve.

4) Step

Adjust the video detector coil (T106) for the maximum amplitude at point p (See Figure 3)

Fig. 3

3.AFT RESPONSE ALIGNMENT

1) Equipment
- a) Sweep /Marker generator
- b) Monitor scope
- c) D.C Power supply (+12V)
- d) Bias supply(+4~4.5v)
- e) Matching pad
- f) Direct probe
- g) Digital Voltmeter

2) Preparation

a) Apply +12 volts to TP-12 on the main board.
b) Apply +4~4.5V volts to TP-15 on the main board.
c) Connect the output of sweep / marker generator through the matching pad to the test point of tuner.
d) Connect the moniter scope with direct probe to terminal TP-17
f) Gradually increase or decrease the output of sweep / marker generator to obtain the 2V p-p response curve.

3) Step

PIF(P) Point

Fig. 4. AFT Response Alignment

- 87 -

Page 93

Adjust T105 (AFT TANK COIL) the PIF marker position to be kept just the reference level. after this adjustment, PIF keying pulse on the monitor scope must be in the minimum amplitude (Refer to Figure. 4)

4. 4.5 MHZ. 6.0 MHZ TRAP ALIGNMENT

1) Equipment

a) sweep / Marker generatorb) Monitor scope

c) D. C power supply (+12)
d) Bias Supply (+4~4.5V)
e) Direct Probe and Matching Pad (Figure. 5)

2) Connect

Fig 5. 4.5MHz, 6.0MHz Trap alignment

3) Preparation

a) Connect the horizontal output of sweep / marker generator to the horizontal input of monitor scope.
b) Set the monitor scope gain for 0.1V / DIV.
c) Connect the output of sweep / marker generator in serise with matching pad to test point in the tuner through 10K ohm resistor (Figure5)
d) Connect the monitor scope with direct probe to terminal

TP-22 on the main board.

e) Apply T12 volts bias to terminal TP-12 on the main board.
f) Apply +5 ~6 volts bias to terminal TP15 on the main board.
g) Gradually increase (or decrease) the output of sweep / marker generator to obtain the 1.0V p-p response curve.

4) Step

Condition : Connect the J130 to chassis ground with a short jumper.

a) Adjust T103 until the 32.0 MHZ marker amplitude of response curve become the minimun.
b) Adjust T102 until the 33.5 MHZ marker amplitude of response curve becomes the minimun.

5.SOUND DETECTION ALIGNMENT

1) Equipment
- a) SIF signal Generator
- b) Distortion Meter
- c) DC Power supply (+12V)
- d) Oscilloscope
- e) Direct probe

2) Connection

a) The 12V power supply connects to the TP-12
b) The SSG output probe inserts to the C-ceramic 103P and connects to the IC101 12 Pin.

Page 94

c) The input probe of the distortion meter inserts to the C-Electrolytic 10µ F and connects to the IC101 Pin 8.
d) The Moniter scope is conneted at the same place like the distortion meter.

3) Step

a) The SIF signal generator is setting with the TA ...
b) The T605 is varied and the indictation price of the Distortion Meter controls to be the minimum.
c) The TA8615N Pin 25 must be the high.
d) The SIF signal Generator is setting the ^GB_J.
e) The X101 is varied and the indictation price of the distortion meter controls to be the minimum.

	A	В
Mode	6.0 MHZ	4.5 MHZ
	Alignment	Alignment
Carrier frequency	6.0 MHZ	4.5 MHZ
Sound frequency	400HZ	400HZ
Modulation frequency	50KHZ	25KHZ
Output gain	100dBµ V	100dBµ V

6. SIF CONVERTER ALIGNMENT

1) Equipment
- a) SIF signal Generator
- b) DC power supply (+12V)
- c) Oscilloscope
- d) Direct probe

2) Connection

SIF signal Generator Carrier frequency :6.0 MHz Output Gain : 100 dBµ V

a) The 12V power supply is connected to the TP-12

b) The SSG output probe is inserted to the C-ceramic103P and connects to the IC101 Pin 12.
c) The oscilloscope connects to the IC101 Pin 24.

3) Step

The T601 is varied and the oscilloscope wave form controls to be the maximum.

Page 95

7. SIF IDENT ALIGNMENT

1) Equipment

a) SIF signal Generator

b) Dc power supply (+12V)
c) Volt meter

2) Connection

SIF signal Generator Carrier frequency : 5.5 MHZ Output Gain : 100 dB# V

a) The 12V power supply connects to the TP-12

b) The voltmeter connects to the IC 101 Pin 18.
c) The SSG output probe is inserted to the C- ceramic 103 and connects to the IC 101 24 Pin.

3) Step

The T602 is varied and the voltmeter DC voltage which connected to Pin 18 controls to be the 4.5 V.

8. B⁺ VOLTAGE ADJUSTMENT

1) Equipment

Digital Voltmeter

2) Preparation

a) Check that if the power AC line is normally (AC : 100 ~ 260 volts 50/60HZ)
b) Connect the voltmeter to terminal TP130 on the power board.

3) Step

a) The T.V receiver connects to the AC line to be the stand by mode.
b) Through the VR801 is controlled, the Voltmeter DC voltage controls to be130 ± 0.5V
c) The T.V receiver power switch turns the ON and the T.V set must be the philips pattern.
d) As the VR 802 is controlled, the voltmeter DC voltage controls to be 130±0.5V.

9. FOCUS ADJUSTMENT

1) Preparation
- a) Check that if the power. A.C line is normally (A.C 100~260 volts,50HZ /60HZ)
- b) Connect A.C line and the receiver power switch sets to "ON"position.
- c) Receive a black and white signal.
- d) Turn the tuning control for the indication of the clearest picture.

2) Step

Adjust the focus control for well defined scanning lines in the center area of the screen.

10. VERTICAL HEIGHT AND LINEARLTY ADJUSTMENT

1) Preparation

a) Check that if the A.C power line is normally (100~260

Page 96

volts, 50 HZ / 60HZ).

b) Connect A.C line and the receiver power switch sets to "ON" position.
c) Set the channel selector to an active channel (Lion Head Pattern).

2) Step

a) Adjust the VERTICAL HEIGHT CONTROL VR310 so that the inside of the largest circle of test pattern overscans the mask 2 Cm of the top and bottorm.
b) And the center of the circumference circle of test pattern should be visible more than 3 circles.
c) Adjust the vertical linearity control VR409 so that the linearity is in the optimum condition.

3) Note

While this alignment, set the brightness and contrast control to the maximum position.

11. E.W CORRECTION & HORIZONTAL SIZE ADJUSTMENT

Set the channel selector to an CROSS-HATCH pattern.

1) HORIZONTAL PHASE ADJUSTMANT

If you want to move the center of picture, adjust HORIZONTAL phase control (VR409)

2) BARREL ADJUSTMENT

The sidepincushion control (VR451)on the power board changes the sidepincushion of the picture.

3) HORIZONTAL SIZE ADJUSTMENT

The horizontal size control (VR450) on the power board changes the horizontal size of the picture.

12. COLOR MATRIX ADJUSTMENT

1) Equipment

a) Oscilloscope

2) Preparation

a) Set the Power switch to "ON" position.

b) Set the contrast brightness and color controls to the maximum position.
c) Connect the oscilloscope probe to TR51.

3) Step

a) Receive the color programme of philips pattern.
b) Set the color control V.R.,to obtain the proper color.
c) If the PAL matrix adjustment is incorrect, a Venetian blind will appear in the color bars area. This needs adjustment.
d) At first, adjust DL phase ADJ.Coil T503 (TRF -5418) to minimize the Venetian Blind.
e) Next adjust LH-DL ADJ.VR501. to minimize the blind.
f) If the Venetian Blind still remains, readjust IH DL phase ADJ. Coil to minimize the blind.
g) Repeating item 5 and 6 procedures, adjust the V.R and coil until the bilnd does not appear.

Fig 7. Matrix Alignment

13. SECAM COLOR IDENT ALIGNMENT

1) Receive the SECAM color bar signal.
2) Connect the DC voltmeter (digital voltmeter) to TP-58 (Pin 23)
3) Adjust ident coil (T506) for the maximum indication on the meter.

14. BELL FILTER ALIGNMENT

1) Receive the SECAM color bar signal.
2) Connect the synchroscope to terminal TP-59 (pin 2)
3) Adjust Filter coil(T504) for the flat level of amplitude in

Page 97

each color bar waveform on the scope.

Fig 8. Bell Filter alignment

15.SECAM CHROMA DET, VR ALIGNMENT

1) Receive the SECAM color bar signal.

2) Set the color, brightness and contrast controls free.
3) Connect the synchroscope to TP-52 (pin 60)
4) Adjust coil(R-Y) so that the white level in picture part reaches the vertical retrace line.
5) Then change the connection of synchroscope from TP-52 (pin 60) to TP -51 (pin62)
6) Adjust coil (B-Y) so that the white level in picture part reaches the vertical retrace line.

16. PURITY ADJUSTMENT

1) Preparation

a) Operate the receiver for at least 20 minutes to warm up the C.R.T.
b) Plug the deflection yoke in the C.R.T and tighten the deflection yoke damper screw temperarily.
c) Plug the convergence yoke in the C.R.T and set in as shown in Fig.13
d) Check that if the A.C Power line is normally (AC 100~ 260volts, 50/60HZ).
e) Connect the A.C line and the receiver power switch set to "ON"position.

f) Receive a black and white signal.

2) Step

a) Demagnetize the receive fully by using an external degaussing coil.
b) Turn the CONTRAST and BRIGHTNESS controls to the maximum.
c) Adjust RED and BLUE CUT OFF controls (VR557 and VR 559) to provide only a green raster.
d) Advance the GREEN CUT OFF control (VR558) if necessary.
e) Looden the clamper screw holding the yoke, and slide the yoke backward or forward to provide vertical green

Page 98

belt (zone)in the picture screen(Fig.10)

f) Then tighten the convergence yoke clamper.
g) Sowly move the deflection yoke forward and adjust for the best overall green screen.
h) Roughly tighten the deflection yoke clamper.
Produce the blue and red raster by low light control and observe that if the good purity is obtained on the respective field.
j) Tighten the deflection yoke clamper.

3) Convergence Magnet Assembly

Fig 11

Page 99

17. CENTER CONVERGENCE ADJUSTMENT

1) Preparation

a) Operate the receiver for at least 20 minutes before attempting the convergence adjustment.
b) Check that if the power A.C. line is normally(AC 100 ~ 260 volits, 50HZ /60HZ).
c) Connect A.C. line and the receiver power switch sets to "ON" position.
d) Receive a crosshatch pattern or dot pattern with a color bar signal generator.

2) Step

a) Adjust the brightness and contrast controls for well defined picture.
b) Adjust the two taps of the 4 pole magnets to change the

FIXED

ROTATE TWO TABS

4) Center Convergence by convergence Magnets

ADJUST THE ANGLE (VERTICAL LINES)

ADJUST OF MAGNETS

Fig. 12

angle between them and superimpose the red and blue vertical lines in the center area of the screen.

c) Turn the both taps at the same time keeping the angle contrast to superimpose the red and blue horizontal lines at the center of the screen.
d) Adjust two taps of 6-pole magnets to superimpose the red and blue line with green. Adjusting the angle affects the vertical lines and rotating both magnets affects the horzontal lines.

e) Repeat adjustments b)~ d) necessary.

3) Note

As 4 pole magnet and 5 pole magnets interact and as it makes dots' movement complex, practice above steps until understanding the red and blue movements(Figure11)

6 - POLE MAGNETS MOVEMENT

18. WHITE BALANCE ADJUSTMENT

1) Preparation

a) Operate the receiver for at least 20 minutes before attempting white balance adjustment.
b) Connect A.C line and the receiver power switch sets to "ON"position.
c) Receive a black and white signal (Lion head pattern is better)
d) Set the color control to the central position.
e) Set the brightness and contrast controls to the maximum position.
f) Set the red, blue and green low light controls to the mechanical central position.
g) Set the blue and red drive controls to the mechanical

Page 100

central position.

h) Set the screen the VR control on FBT to the minimum position (fully counter clockwise)
i) Temporarily slide the service switch (SW201) on main board to the left (Service) position to cut off the vertical oscillation.

2) Step

a) Rotate the SCREEN control on FBT (T444) gradually clockwise until the first horizontal line appears slightly on the screen.
b) Adjust the two CUT-OFF controls to obtain the slightly

lighted horizontal line on the same level of three colors (red, green, blue).

The line look like white if the CUT-OFF controls are adjusted properly.

c) Reset the SERVICE switch (SW201) on Main board to the right position to obtain a raster("NORMAL" position)
d) Adjust the blue and red drive controls to obtain proper white-blanced picture in high light areas.
e) Set the contrast control to the minimum position and turn the brightness control slightly counterclockwise to obtain a dark gray raster.
- Then check the white balance in low brightness.
- If the white balance is not enough, repeat step a) ~ 4)for correct white balance.

19. CIRCUMFERENCE CONVERGENCE ADJUSTMENT

1) Proparation

a) Operate the receiver for at least 20 minutes before attempting the circumference convergence adjustment.
b) Check that if the power A.C. line is normally (Ac 100~260 volts, 50Hz/60Hz).
c) Connect A.C. line and the receiver power switch sets to "ON" Position.
d) Receive a crosshatch pattern with a Color bar signal generator.

2) Step

a) Temporarily place a rubber wedge (Spacer D.Y) as shown in Figure 17.
b) Tilt the front of the deflection yoke up and down to obtain better convergence in circumference (Figure 12). Push the mounted wedge into the space between the picture tube and the deflection yoke to fix the Yoke temporarily in place.

c) Put other wedge into bottom space and remove the cover paper to stick.

d) Tilt the front of the yoke right or left to obtain better convergence in circumference.

e) Keep the yoke position and put another wedge in either upper space.

Remove cover paper and stick the wedge on picture tube to fix the yoke.

f) Detach the temporarily mounted wedge and put it in another upper space.

Stick it on the picture tube to fix the yoke.

g) After fixing three wedge, recheck overall convergence.
h) Tighten the screen firmly to fix the yoke and check if the voke is firm.
i) Stick three adhesive tapes on the wedges.

3) Preliminary Preparation of a Wedge

a) Paint the silicon bond on the the edge of the wedge as shown in Figure 17.
b) Remove the cover paper and stick it on the picture tube within 10 minutes.
c) Push a wedge into the space between the picture tube and the deflection yoke as shown in Figure 18.

SUPRA CS6230Z, CS6818, STV2910MS Service manual & schematics

SERVICE MANUAL

SAFETY CAUTION :

For Safe Use

PRODUCT SAFETY NOTICE

SERVICE NOTES

X-RADIATION PRECAUTION

SAFETY PRECAUTION

TABLE OF CONTENTS

3. POWER SUPPLY SECTION (SP-210)

1. INSTRUCTION

2. BLOCK-DIAGRAM

3. FLYBACK PATTERN SMPS FUNDAMENTAL THEORY.

2) WHEN THE SWITCH OPENS

3) REGULATION

4. MASTER-SLAVE STRUCTURE.

5. PRIMARY CIRCUIT. (TEA 2260)

1) DESCRIPTION

2) PIN CONNECTIONS.

4) OPERATING DESCRIPTION

DETAIL OF ONE BURST

Fig. 7 BURST MODE OPERATION

(2) NORMAL MODE

(3) STAND-BY MODE - NORMAL MODE TRANSITION

(4) SECURITY FUNCTIONS OF SP210

Fig. 9 Example of first curent limitation threshold triggering

6. SECONDARY CIRCUIT (TEA5170)

2) PIN CONNECTIONS,

1) DESCRIPTION

3) BLOCK DIAGRAM

4) GENERAL DESCRIPTION

Operating Description

5) ASYNCHRONIZED MODE

6) SYNCHRONIZED MODE(Fig. 13, 14, 15)

7) STARTING

8) SOFT START

7. TROUBLESHOOTING OF POWER STAGE.

4. MULTICOLOR VIDEO-CHROMA DEFLECTION SECTION (TA8659AN)

1. INSTRUCTION

1) FEATURES

2) FUNCTIONS

Video Section

Chroma Section

Deflection Section

3) MAXIMUM RATINGS(Ta=25 °C)

3. CHARACTERISTICS

1) DC VOLTAGE CHARACTERISTICS

2) CURRENT CHARACTERISTICS

4. TERMINAL DESCRIPTION

5. OPERATING INSTRUCTIONS

1) FUNCTION OF THE TA8659AN

2) SEPARATION OF THE VCC LINES AND THE GND LINES

2) INSTRUCTION

(1) Ext. RGB contrast control

(a) Y signal processing section

1) BLOCK-DIAGRAM

2) PAL/NTSC CHROMA PROCESSING

3) SECAM CHROMA PROCESSING

Table 1 List of logics under AUTO mode

Table 2 Switch input voltage under MANUAL mode

5) OTHERS

1) BLOCK-DIAGRAM

2) SYNC SEPARATION CIRCUIT

(Outline)

3) HORIZONTAL AFC (AUTOMATIC FREQUENCY CONTROL) CIRCUIT

(Outline)

4) OPERATING PRINCIPLE

Fig. 14

(Outline)

(5) VERTICAL DRIVE OUTPUT SECTION

Fig. 18

5. SYSTEM SWITCHING SECTION

1. SIF SWITCHING

1) SIF DETECTION

2) SYSTEM SWITCHING

(In case of forced mode, TA8615N output)

2. CHROMA SWITCHING

1) PAL/ NTSC Chroma Processing

6. DEFLECTION SECTION

1. DEFLECTION NON- MOVEMENT

ITEM SYMBOL BATING UNIT Supply Voltage VDD VSS-0.5~VSS+20 Input Voltage VSS-0.5~VDD+0.5 Output Voltage VOUT VSS-0.5~VDD+0.5 Input Current lιN mA ±10 PD Power Dissipation mW 300 Storage Temperature Tsta -65~150 r Lead Temp./Time T_sol 260°C . 10sec.

6) DC CHARACTERISTICS(V_CC = 9V, Ta = 25±3℃)

2) MAXIMUM RATINGS(TA + 25 $\mathcal{Q}$ )