Rockwell Automation 1772-LP3 User Manual

PLC2/30 Programmable Controller
Programming and Operations Manual
Important User Information
Because of the variety of uses for this equipment and because of the differences between this solid state equipment and electromechanical equipment, the user of and those responsible for applying this equipment must satisfy themselves as to the acceptability of each application and use of the equipment. In no event will Allen-Bradley Company, Inc. be responsible or liable for indirect or consequential damages resulting from the use or application of this equipment.
The illustrations, charts, and layout examples shown in this manual are intended solely to illustrate the text of this manual. Because of the many variables and requirements associated with any particular installation, Allen-Bradley Company, Inc. cannot assume responsibility or liability for actual use based upon the illustrative uses and applications.
No patent liability is assumed by Allen-Bradley Company, Inc. with respect to use of information, circuits, equipment or software described in this text.
Reproduction of the contents of this manual, in whole or in part, without written permission of the Allen-Bradley Company, Inc. is prohibited.
1988 Allen-Bradley Company, Inc. PLC is a registered trademark of Allen-Bradley Company, Inc.
WARNING: Warnings tell readers where people may be hurt if procedures are not followed properly.
CAUTION: Cautions tell them where machinery may be damaged or economic loss can occur if procedures are not followed properly.
A Warning or Caution alerts you to:
a possible trouble spot what causes the trouble to occur the result of an improper action how to avoid the situation

Table of Contents

Introduction 11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.0 Introduction to This Manual 11. . . . . . . . . . . . . . . . . . . . . . . . . .
1.1 General 11
1.2
Capabilities
1.2.1
Complementary I/O Data Highway Compatibility
1.2.2
1.2.3 Industrial T
1.3
Additional Publications
1.4 Terms Used in This Manual 16
Hardware Considerations 21. . . . . . . . . . . . . . . . . . . . . . . . .
2.0 General 21. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Mode Select Switch
2.1
2.2 Memory Write Protect 22
2.3 RunTime Errors 23
2.4 Processor Diagnostic Indicators 24
2.5 PowerUp Recovery 25
2.6 Switch Group Assembly 25
Last State Switch
2.6.1
2.6.2 I/O Rack Number 26
2.7 Industrial Terminal 27
2.8 Local System Structure 27
2.9 Remote System Structure 28
2.10 Local/Remote System Structure 29
2.11 Hardware Addressing Modes 210
2.12 Auxiliary Power Supplies 210
2.12.1 1771P2 Auxiliary Power Supply 210
2.12.2 1777P2 Auxiliary Power Supply 211
2.12.3 1771P3, P4, and P5 Slot Power Supplies 211
2.12.4 1771P7 Power Supply 211
2.12.5 1771PSC Power Supply Chassis 211
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erminal Compatibility
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13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
14. . . . . . . . . . . . . . . . . . . . . . . . .
14. . . . . . . . . . . . . . . . . . . . .
15. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
21. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
26. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Data Table 31. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.0 General 31. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1 Memory Structure 31
3.2 Memory Organization 32
3.2.1 Data Table 32
3.2.2 User Program 316
3.2.3 Message Storage Area 317
3.3 Hardware/Program Interface 317
3.3.1 Image Tables 317
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Table of Contentsii
3.3.2 Instruction Address 318. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.3.3 Fundamental Operation 321
3.4 Data Table Documentation Forms 323
3.4.1 Data Table Word Map (1024 Word) 323
3.4.2 Data Table Map (128 Word) 324
3.4.3 Data Table Word Assignments (64 Word) 325
3.4.4 Data T
3.4.5 Sequencer T
3.4.6
3.4.7 Timer/Counter Assignments 329
3.4.8 Data Storage Assignments 329
able Bit Assignments
able Bit Assignments
I/O Assignments
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326. . . . . . . . . . . . . . . . . . . . . . . .
327. . . . . . . . . . . . . . . . . . . .
328. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Introduction
4.0 General 41. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.1
Notational Conventions
4.2 Ladder Diagram Logic 42
4.3 RelayType Instructions 43
4.3.1 Examine Instructions 43 Output Instructions
4.3.2
4.3.3 Branch Instructions 49
4.3.4 Ending a Program 412
4.3.5 Programming RelayType Instructions 413
4.4 Operating Instructions 414
4.4.1 Addressing 415
4.4.2 Help Directories 415
4.4.3 Searching 416
4.4.4
Editing
4.4.5 OnLine Programming 423
4.4.6 Clearing Memory 430
4.5 Program Recommendations 432
to Programming
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41. . . . . . . . . . . . . . . . . . . . . . .
41. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
45. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
419. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timer and Counter Instructions 51. . . . . . . . . . . . . . . . . . . . .
5.0 General 51. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.1 Timer Instructions 52
5.1.1 Timer OnDelay Instruction 53
5.1.2 T
imer Of
fDelay Instruction 55. . . . . . . . . . . . . . . . . . . . . . . . .
5.1.3
Retentive T Retentive T
5.1.4
5.1.5 Timer Accuracy for 10ms Timers 58
5.2 Counter Instructions 58
5.2.1 UpCounter Instruction 59
5.2.2 Counter Reset Instruction 511
5.2.3 DownCounter Instruction 512
5.2.4 Scan Counter Instruction 513
5.3 Cascading Timers or Counters 514
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imer Instruction 56. . . . . . . . . . . . . . . . . . . . . . . . .
imer Reset Instruction 58. . . . . . . . . . . . . . . . . . . .
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Table of Contents iii
5.4 Programming Timer and Counter Instructions 514. . . . . . . . . . . . .
5.5 Scan Time and Instruction Execution Times 517
5.5.1 Scan Time 517
5.5.2 Program for Determining Scan Time 518
5.6 Instruction Execution Time 519
5.6.1 Relay Type, Timer and Counter Arithmetic, Output Override and I/O Update, Jump, and
Subroutine Instructions 519. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.6.2 WordtoFile, Sequencers, FIFO, W
Diagnostic, File Search, and Block Transfer Instructions 520. . . . . .
FiletoFile Move and File Complement
5.6.3
5.6.4
Logic Instructions FiletoFile AND, OR, XOR
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, Data Manipulations,
ord and Bit Shifts, File
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522. . . . . . . . . . . . . . . .
523. . . . . . . . . . . .
Data Manipulation Instructions 61. . . . . . . . . . . . . . . . . . . . .
6.0 General 61. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.1 Data Transfer Instructions 62
6.1.1
Get Instruction Put Instruction
6.1.2
6.2 Data Comparison Instructions 64
6.2.1 Les and Equ Instructions 64
6.2.2
Get Byte and Limit T
6.2.3
Get Byte-Put Instruction
6.3 Programming Data Manipulation Instructions 69
Arithmetic Instructions
6.4
6.4.1 Add Instruction 612
6.4.2 Subtract Instruction 613
6.4.3
Multiply Instruction
6.4.4
Divide Instruction
6.5 Programming Arithmetic Instructions 615
6.6 BCD to Binary Conversion 616
6.6.1 Programming a BCD to Binary Conversion Instruction 617
6.7 BinarytoBCD Conversion 618
6.7.1 Programming a Binaryto BCD Conversion Instruction 618
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62. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
63. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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est Instructions 67. . . . . . . . . . . . . . . . . . .
68. . . . . . . . . . . . . . . . . . . . . . . . . . .
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611. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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614. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
614. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Output Override and I/O Update Instructions 71. . . . . . . . . . .
7.0 General 71. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.1 Output Overrides 71
7.2
I/O Updates
7.2.1 Scan Sequence 73
7.2.2
Immediate Input Instruction
7.2.3
Immediate Output Instruction
7.3
Programming Immediate I/O Instructions
7.4 Remote Fault Zone Programming 79
7.4.1 Dependent Programming 712
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73. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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75. . . . . . . . . . . . . . . . . . . . . . . . .
76. . . . . . . . . . . . . . . . . . . . . . . .
78. . . . . . . . . . . . . . . . .
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Table of Contentsiv
7.4.2 Independent Programming 713. . . . . . . . . . . . . . . . . . . . . . . . .
7.5
I/O Update T
7.5.1 Local Systems 715
7.5.2 Remote Systems 715
7.6 Watchdog Timer 716
imes 715. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Peripheral Functions 81. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8.0 General 81. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8.1
Communication Rate Setting
8.2 Contact Histogram 82
8.3 Digital Cassette Recorder 84
8.3.1 Dumping Memory Content to Cassette Tape 84
8.3.2 Loading Memory from Cassette Tape 84
8.3.3 Verification 85
8.3.4 Program Verification 85
8.3.5 Displaying and Locating Errors 86
8.4 Data Cartridge Recorder 86
8.4.1 Dumping Memory Content onto Data Cartridge Tape 86
8.4.2 Loading Memory from a Data Cartridge Tape 87
8.4.3 Data Cartridge Verification 88
8.5 Ladder Diagram Dump 88
8.6 Total Memory Dump 88
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81. . . . . . . . . . . . . . . . . . . . . . . . .
Report Generation 91. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9.0 General 91. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9.1 Report Generation Commands 93
9.1.1 Message Control Word File - MS, 0 94
9.1.2 Message Store - MS 95
9.1.3 Message Print - MP 96
9.1.4 Message Report - MR 97
9.1.5 Message Delete - MD 97
9.1.6 Message Index - MI 97
9.1.7 Control Codes and Special Commands 97
9.2
Manually Initiated Report Generation
9.3 Automatic Report Generation 912
9.3.1 Messages 16 913
9.3.2 Additional Messages 913
9.3.3 Example Programming 914
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911. . . . . . . . . . . . . . . . . . .
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Block Transfer 101. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.0 General 101. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.1 Basic Operation 101
10.2 Block Transfer Instructions 104
10.2.1 Data Address and Module Address 104
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Table of Contents v
10.2.2 Block Length 105. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.2.3 File Address 105
10.2.4
Enable Bit and Done Bit
10.3 Instruction Notes for Block Transfer Read and Write Instructions 106
10.4 Causes of RunTime Errors 106
10.5 Programming Block Transfer Read and Write Instructions 106
10.6
Multiple Reads of Dif
10.7
Defining the Block T
10.8
Buf
fering Data 1012. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.9 Bidirectional Block Transfer 1014
10.9.1 Operation 1014
10.9.2 Data Address and Module Address 1017
10.9.3 File Address 1017
10.9.4 Block Length 1017
10.9.5 Programming Considerations 1018
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106. . . . . . . . . . . . . . . . . . . . . . . . . .
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. . .
ferent Block Lengths from One Module 108. .
ransfer Data Address Area 1011. . . . . . . . . . .
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Jump Instructions and
11.0 General 111. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.1 Jump Instruction 111
11.1.1 Programming Jump/ Subroutine Instructions 113
11.1.2
Multiple Jumps to the Same Label
11.2 Label Instruction 116
11.3 Jump to Subroutine Instruction 117
11.3.1 Subroutine Area 1110
11.3.2 Nested Subroutines 1111
11.3.3 Recursive Subroutine (Looping) Calls 1112
11.3.4 Subroutine Programming Considerations 1112
11.4 Return Instruction 1114
Subroutine Programming
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111. . . . . . . .
113. . . . . . . . . . . . . . . . . . .
Data Transfer File Instructions 121. . . . . . . . . . . . . . . . . . . . . .
12.0 General 121. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12.1 File Concepts 121
12.1.1
File Definition
12.1.2
File Planning
12.1.3
File Instructions
12.1.4 Programming File Instructions 1211
12.1.5 File Instruction RunTime Error 1212
12.2 FiletoFile Move 1212
12.2.1 Programming FiletoFile Move Instructions 1214
12.3 FiletoWord Move 1215
12.3.1 Programming FiletoWord Move Instructions 1216
12.4 WordtoFile Move 1218
12.4.1 Programming WordtoFile Move Instructions 1219
12.5 Data Monitor Mode 1221
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121. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
122. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
122. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Table of Contentsvi
12.5.1 Accessing the Data Monitor Mode 1221. . . . . . . . . . . . . . . . . . .
12.5.2
Data Monitor Display
12.5.3 Cursor Controls 1225
12.5.4 Data Monitoring Procedures 1226
12.5.5 Entering and Changing Data 1227
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1224. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Shift Register Instructions 131. . . . . . . . . . . . . . . . . . . . . . . . .
13.0 General 131. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13.1
Shift File Up
13.1.1
Programming Shift File Up Instruction
13.2
Shift File Down
13.2.1
Programming Shift File Down Instruction
13.3 FIFO Load and FIFO Unload 136
13.3.1 Programming FIFO Load and FIFO Unload Instruction 138
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132. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
133. . . . . . . . . . . . . . . .
135. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
135. . . . . . . . . . . . . .
Bit Shifts 141. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
14.0 General 141. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
14.1
Bit Shift Left
14.1.1
Programming Bit Shift Left Instruction
Bit Shift Right
14.2
14.2.1
Programming Bit Shift Right Instruction
14.3
Examine Of
14.3.1 Programming Examine Of
14.4
Examine On Shift Bit
14.4.1
Programming Examine On Shift Bit Instruction
Set Shift Bit
14.5
14.5.1
Programming Set Shift Bit Instruction
14.6
Reset Shift Bit
14.6.1
Programming Reset Shift Bit Instruction
f Shift Bit
f Shift Bit Instruction
141. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
143. . . . . . . . . . . . . . . . .
145. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
146. . . . . . . . . . . . . . .
146. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
146. . . . . . . . . .
148. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
148. . . . . . . . . .
149. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
149. . . . . . . . . . . . . . . . .
1410. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1411. . . . . . . . . . . . . . .
Sequencer Instructions 151. . . . . . . . . . . . . . . . . . . . . . . . . . .
15.0 General 151. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
15.1 Sequencer Output Instruction 153
15.1.1 Sequencer Output Analogy 153
15.1.2 Operation of the Sequencer Output Instruction 154
15.1.3
Masking Output Data
15.1.4 Instruction Overview 156
15.1.5 Programming the Sequencer Output Instruction 156
15.2 Sequencer Input Instruction 1510
15.2.1 Operation of the Sequencer Input Instruction 1510
15.2.2 Masking Input Data 1510
15.2.3 Instruction Overview 1510
15.2.4 Programming the Sequencer Input Instruction 1511
15.3 Sequencer Load Instruction 1513
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155. . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Table of Contents vii
15.3.1 Operation of the Sequencer Load Instruction 1513. . . . . . . . . . .
15.3.2 Instruction Overview 1514
15.3.3 Programming the Sequencer Load Instruction 1514
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File Logic Instructions 161. . . . . . . . . . . . . . . . . . . . . . . . . . . .
16.0 General 161. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16.1 FiletoFile Logic Instructions 161
16.1.1
FiletoFile AND
16.1.2
FiletoFile OR
16.1.3
FiletoFile XOR
16.1.4
File Complement
16.2 WordtoFile Logic Instructions 168
16.2.1 WordtoFile AND 169
16.2.2 WordtoFile OR 1611
16.2.3 WordtoFile XOR 1612
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162. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
164. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
165. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
166. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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File Search and File Diagnostic Instructions 171. . . . . . . . . . .
17.0 General 171. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
17.1 File Search 171 File Diagnostics
17.2
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174. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Troubleshooting Aids 181. . . . . . . . . . . . . . . . . . . . . . . . . . . .
18.0 General 181. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
18.1
Bit Manipulation and Monitor
18.1.1
Bit Manipulation
18.1.2
Bit Monitor
18.2 Force On and Force Off Functions 183
18.3 Forced Address Display 184
18.4 Temporary End Instruction 185
18.5 ERR Message for an Illegal OP Code 185
Special
19.0 General 191. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
19.1 One Shot 191
19.1.1 Leading Edge OneShot 191
19.1.2 Trailing Edge OneShot 192
Programming T
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echniques 191. . . . . . . . . . . . . . . . . . .
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182. . . . . . . . . . . . . . . . . . . . . . . .
182. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
183. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Addressing A1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A.0 Appendix Objectives A1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A.1 Addressing Your Hardware A1 A.2 Addressing Modes A2 A.2.1 2Slot Addressing A3 A.2.2 1Slot Addressing A8
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Table of Contentsviii
A.2.3 1/2Slot Addressing A11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A.3 System Configurations A16
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Number Systems B1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
B.0 General B1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
B.1 Decimal Numbering System B1 B.2 Octal Numbering System B2 B.3 Binary Numbering System B3 B.3.1 Binary Coded Decimal B4 B.3.2 Binary Coded Octal B5 B.4 Hexadecimal Numbering System B6
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Programming .01Second Timers C1. . . . . . . . . . . . . . . . . . . .
C.0 Introduction C1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
C.1 T
ime Base Selection C.2 Timer Accuracy C2 C.3 10Msec Timers - T C.4 Hardware/Processor Considerations C5 C.5 10Msec Timers - Programming Techniques C5 C.5.1 Scan Time C6 C.5.2 Program Execution C6 C.5.3 Programming Compensation C7 C.6 Program ScanT
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ypical Applications
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ime Computation
C1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
C4. . . . . . . . . . . . . . . . . .
C9. . . . . . . . . . . . . . . . . . . . .
Introduction
Chapter
1
1.0 Introduction to This Manual
This manual presents the information you need to program and operate your Allen-Bradley PLC-2/30 Programmable Controller.
After reading this manual, you should be able to:
establish system configurations consisting of:
- scanners
- interface modules
- input modules
- output modules
- power supplies
program:
- timers
- counters
- extended arithmetic functions
- relay-type functions
- and data transfer, for a few examples.
This manual is your entry into understanding the PLC-2/30 programmable controller.
To find what the topics are in the individual chapters — Use the Table of
Contents.
1.1 General
To get an overview of what that chapter presents — Look in the “General” section of each chapter.
To get a better understanding of slot addressing — Use the Appendix. To find where a specific item is located in the text — Use the Index.
The PLC-2/30 programmable controller consists of:
The 1772-LP3 processor An I/O structure (I/O chassis containing I/O modules)
11
Chapter 1
Introduction
With a user-written program and appropriate I/O modules, the PLC-2/30 programmable controller can be used to control many types of industrial applications such as:
Process control Material handling Palletizing Measurement and gauging Pollution control and monitoring
The 1772-LP3 processor has a read/write CMOS memory that stores user program instructions, numeric values and I/O device status. The user program is a set of instructions in a particular order that describes the operations to be performed and the operating conditions. It is entered into memory, rung by rung, in a ladder diagram and functional block display format from the keyboard of a 1770-T3 or 1784–T50 terminal. The ladder diagram symbols closely resemble the relay symbols used in hardwired relay control systems. The functional block displays are an easy method of programming and monitoring advanced instructions.
During program operation, the PLC-2/30 processor continuously monitors the status of input devices and, based on user program instructions, either energizes or de–energizes output devices. Because the memory is programmable, the user program can be readily changed if required by the application.
The PLC-2/30 processor’s functions include:
Relay-type functions (Examine On, Examine Off, Output Energize,
Output Latch, Output Unlatch and Branching) Complete forced I/O Data transfer Data comparison
Three-digit, four-function arithmetic (+, –, ×, :–) :–:– Timing functions: On-Delay and Off-Delay, Retentive and Nonretentive
with time bases of 1.0, 0.1 and 0.01 seconds (timing range 0.02 to 999
seconds). Bidirectional counting (up or down) with a range of 0 to 999 counts. Self-monitoring/diagnostic capabilities Expandable data table Memory capacity of 16,256 words 896 I/O device capacity is available in local or remote configurations. 896 inputs and 896 outputs when used with specific configurations. Memory write protect Program control instructions
- Jump
- Subroutines
12
Chapter 1
Introduction
Functional Block Instructions
- Shift Register instructions
- File-to-File and Word-to-File Logic instructions
- File-to-File, Word-to-File and File-to-Word transfer instructions
Binary to BCD and BCD to Binary conversions On-line programming Data Highway and Data Highway II compatible Sequencers Contact histogram Report generation
1.2 Capabilities
The data table for the 1772-LP3 processor can be expanded to 8,064 words with an 8K memory or to 8,192 words with a 16K memory. However, an 8,064 word data table is impractical with an 8K memory since there would be nothing available for the user program.
You can expand the data table from the default size of 128 words (1 rack) to 256 words (2 racks, word address 377 word address 400
on, the data table must be expanded in 128-word
8
) in 2-word increments. From
8
sections. The I/O image tables, therefore, can be configured in size from 1 to 7 I/O racks. Each rack added, above one, increments by 10
the first
8
available address for timers and counters. Table 1.A lists the first available timer/counter address when different numbers of racks are selected.
In addition, the processor can control up to 896 inputs and 896 outputs for a total of 1,792 I/O points in a remote system of seven 128 I/O racks (Table 1.A).
Table 1.A PLC2/30
#I/O Racks Max. I/O Points1 (decimal)
Processor Capabilities (Cat. No. 1772LP3)
First Available T/C Address (octal)
1 2 3 4 5 6 7
1
Without complementary I/O. With complementary I/O, maximum I/O points is double the tabulated number up to 1,792.
128 256 384 512 640 768 896
020 030 040 050 060 070 200
13
Chapter 1
Introduction
1.2.1 Complementary
I/O
1.2.2 Data Highway Compatibility
When using a 1772-SD2 remote I/O scanner/distribution panel, the I/O device capacity can be increased from 896 to 1,792 I/O. The increase is accomplished through configuration of the racks and programming. For more information, refer to the Remote I/O Scanner/Distribution Panel Product Data (publication 1772-2.18).
With the proper interface module, the PLC-2/30 processor can be connected to the Allen-Bradley Data Highway or other industry standard buses. Table 1.B lists several “from-to” possibilities and the Allen-Bradley module used to accomplish that function.
Table 1.B Interface
Modules
Interface Locations -
From: To:
PLC2/30 Data Highway 1771KA2
PLC2/30 Data Highway II 1779KP2
Interface Module
1779KP2R
1.2.3 Industrial Terminal Compatibility
PLC2/30 RS232 1771KG
1771KGM 1771KH
Data Highway Non AB
Data Highway Fisher Provox 1771KX1
Data Highway II Non AB
1
Non AllenBradley implies using Data Highway or Data Highway II to communicate with industry standard devices. See the
individual product brochures for specific connectivity information.
1
1
1771KE 1771KF 1770KF2
1779KFL 1779KFM
Industrial Terminals (cat. no. 1770-T1 or -T2) can be used on a limited basis to program a PLC-2/30 programmable controller. Be aware that only features supported by these terminals may be entered. The 1770-T3 and 1784-T50 terminals provide full PLC-2/30 capability. Refer to the Industrial Terminal System User’s Manual (publication 1770-6.5.3 or 1784-6.5.1) for details.
14
Chapter 1
Introduction
WARNING: Do not use a 1770-T1 or 1770-T2 industrial terminal to edit or change a program or data table values in PLC-2/30 memory that were generated using a 1770-T3 industrial terminal. Block instructions and instructions with word addresses 4008 or greater will not be displayed properly (Figure 1.1). The ERR message may appear randomly in the user program at instructions and addresses that the -T1 and -T2 industrial terminals are not designed to handle. Changes to the user program and/or data table with a -T1 or -T2 terminal could result in unpredictable machine motion with possible damage to equipment and/or injury to personnel.
Figure 1.1
Message for Invalid Display of Processor Memory
ERR
113
][
14
11314
][
1.3 Additional Publications
1025
()
1770T3
Display (Actual content in processor memory)
1770T1 or T2 Display (Invalid display of processor memory)
ERR
16
02516
()
Additional information regarding PLC-2/30 programmable controller components is available in:
PLC-2/20, PLC-2/30 Programmable Controller Assembly and
Installation Manual (publication 1772-6.6.2) contains necessary
information on installation, assembly, maintenance and troubleshooting.
Appendix C, Programming 0.01-Second Timers with the Mini-PLC-2
Programmable Controller.
15
Chapter 1
Introduction
1.4 Terms Used in This Manual
We use the following terms to describe the various parts of your PLC-2/30 system.
Chassis — a hardware assembly used to house PC devices such as I/O modules, adapter modules, processor modules, power supplies and some processors (PLC-2/02, -2/16 and -2/17, for example).
I/O Group — The logical assignment of a specific input image table word and its companion output image table word to a rack location. For example: address 123 indicates an input module in rack 2, I/O group 3 This applies to all addressing modes.
Rackan I/O addressing unit that corresponds to 8 input image table words and 8 output image table words (128 input and 128 output terminals).
Rack Fault1) The condition that occurs because of a loss of communication between the processor and remote I/O chassis; 2) any diagnostic indicator that lights up to signal a rack fault.
Slot — 1) The physical location where each module is placed within a chassis; 2) a part of the Rack-Group-Slot addressing information for intelligent I/O modules.
.
Slot Addressinga method of assigning one input and one output image table word to two slots, one slot, or one-half of a slot. (Appendix A is an in-depth discussion on this topic.)
Slot Pairtwo adjacent slots that can share image table words. Slot pairs are: slots 0 and 1, 2 and 3, 4 and 5, and 6 and 7. (See Appendix A)
These and other terms are defined in Programmable Controller Terms (publication no. PCGI–7.2).
16
Chapter
Hardware Considerations
2
2.0 General
2.1 Select Switch
Mode
This chapter describes only those hardware items required when programming or operating the PLC-2/30 programmable controller. For more complete hardware information, refer to the PLC-2/20, PLC-2/30 Programmable Controller Assembly and Installation Manual (publication no. 1772-6.6.2).
A four-position mode select switch (Figure 2.1) is located on the front of the processor. You can select one of four positions with this switch:
PROG — This switch position places the processor in the program
mode. It is used when instructions are entered into memory. They can be entered from an industrial terminal, a 1770-SA digital cassette recorder or a 1770-SB data cartridge recorder. All outputs are disabled when the switch is in this position.
TEST — This switch position places the processor in the test mode. The
user program is tested under simulated operating conditions without actually energizing any output devices. All outputs are disabled in this switch position.
RUN — This switch position places the processor in the run mode.
The user program will be executed and outputs are controlled by the program. Changes to the user program or data table are not permitted in this switch position.
RUN/PROG — This switch position places the processor in the
run/program mode. The processor functions as it does in the RUN position. In this position, you can cause the processor to go into the program or test mode without having to turn the switch to that position. On-line changes to the program and/or data table are allowed in this position with 1770-T3 or 1784-T50 industrial terminals.
The key can be removed from the processor in any of the four switch positions.
21
Chapter 2
Hardware Considerations
Diagnostic Indicators
Figure 2.1 PLC2/30
Processor
Keylock
Mode
Select Switch
2.2
Memory
W
rite Protect
When the memory write protect jumper (Figure 2.2) is removed from a 1772-LH processor interface module, data table values can be changed between word addresses 010
and 3778. These values can be changed only
8
when the processor is in the program mode or in the run/program mode using on-line data change.
22
Chapter 2
Hardware Considerations
Figure 2.2 Memory
W
rite Protect Jumper
HALFT
ONE WITH CALLOUT
2.3
RunTime
Errors
The remaining words in memory from 4008 to the end of memory, including data table and user program, are protected and cannot be altered by programming. The memory write protect feature guards against unintentional changes to processor memory.
The processor and an industrial terminal can diagnose certain errors occurring during the execution of the user program which result from improper programming techniques. For example, it is possible to program a series of instructions which require the processor to perform an operation which it cannot do or perform an operation which is defined as illegal (such as jump to a label that is not located closer to the end of program; i.e., a jump backwards). These errors become apparent only while the program is being executed, so are termed run-time errors. If a run-time error occurs, the processor halts program execution and the PROCESSOR FAULT indicator illuminates.
The first step in diagnosing run-time errors is to connect the industrial terminal. It will display the message run-time error in the initial mode select display. If the industrial terminal is already connected at the time that a run-time error occurs, the ladder diagram is replaced by the mode select display containing the error message. Run-time errors can be detected by the industrial terminal when the processor is in either of two
23
Chapter 2
Hardware Considerations
modes, program or remote program. (If the keyswitch is in RUN/PROGRAM position, the industrial terminal automatically puts the processor into remote program mode. If the keyswitch is in the RUN position, or when it is connected to the processor through the 1771-KA2 communications adapter module, you must manually change the keyswitch to the PROGRAM position).
WARNING: Forces are immediately removed if a Run-time error occurs.
After returning the industrial terminal display to ladder diagram mode by pressing [1][1] in mode selection operation, the industrial terminal displays the instruction that caused the error with a message describing the run-time error.
2.4
Processor Diagnostic Indicators
After you have corrected the run-time error by editing the user program, the processor can be restarted by switching to the run or run/program mode.
Five indicators are located on the front of the processor (Figure 2.1). You should become familiar with these indicators.
MEMORY FAULT — Illuminates when an error in the parity of data
retrieved from memory is detected. Changing the mode select switch to the PROG position or cycling line power may clear this fault condition. Reloading the program may also clear the fault.
BATTERY LOW — When the batteries for memory back-up are low,
this red indicator flashes on and off. Alkaline batteries will continue to back up memory for about one week after the BATTERY LOW indicator begins to flash. Lithium batteries have a longer life, but are essentially dead when the indicator flashes. Regular replacement of the batteries is recommended: for alkaline, every 6 to 12 months; for lithium, every 2 years. (See the Assembly and Installation manual for replacement details, publication no. 1772-6.6.2.)
The low battery bit, bit 027/00, will cycle on and off when a low battery voltage condition is detected and the mode select switch is not in the PROG position. Programming techniques can be used to examine this bit and to control some type of alerting device when a low battery condition exists.
24
Chapter 2
Hardware Considerations
PROCESSOR FAULT — Illuminates when the logic circuits controlling
the processor scan fail or if processor error or run-time errors occur which cause the processor to halt operation.
If the processor fault is a run-time error, the industrial terminal will display RUN TIME ERROR when the keyswitch is in the PROGRAM or RUN/PROGRAM position.
RUN — Illuminates when the processor is in the run or run/program
mode. It also indicates that outputs are being controlled by user program.
DC ON — Illuminates when the 5.1V DC line to the logic circuitry in
the processor memory and I/O modules is satisfactory.
2.5
PowerUp
Recovery
2.6
Switch Group Assembly
When local I/O racks are powered by 1771-P3, -P4, -P5 or -P7 power supplies, the processor control module (Cat. No. 1772-LG) may experience a problem with these racks.
Upon recovery from a power lock (momentary or otherwise), processors in the RUN or TEST mode attempt to read the local racks before the power supplies are ready. This leads to a processor fault. The fault may be identified by the conditions of the indicators:
Indicators
1772LG Module
Series A, Rev. L OFF ON
Series A, Rev. K or earlier OFF OFF
RUN
PROC FAULT
If the problem occurs, put the keyswitch in the program load position, then return to RUN, or cycle power to the processor.
A switch group assembly is located on the I/O chassis backplane. It is used to control output behavior when a fault occurs, to identify the I/O rack number for local systems and to identify the addressing mode for remote systems.
The switch and its functions, when used in local racks, are shown in Figure 2.3. In this setup, the PLC-2/30 is communicating with the I/O chassis through a 1771-AL Local I/O Adapter module.
25
Chapter 2
Hardware Considerations
When using remote I/O (the 1772-SD2 scanner and the 1771-ASB remote I/O Adapter), these switches will be set according to the adapter module’s requirements.
2.6.1
Last State Switch
2.6.2
I/O Rack Number
The last state switch (switch no. 1) on the 1771 I/O chassis must be properly set. ON indicates that the outputs are left in their last state when a fault is detected. Machine operation can continue after fault detection. OFF indicates that the outputs are de-energized when a fault is detected. In addition, in remote systems, the switches on the 1772-SD2 Remote I/O Scanner/Distribution panel and the 1771-ASB Remote I/O Adapter must be properly set. Refer to publications 1772-2.18 and 1771-6.5.37, respectively, for information on their switch settings.
WARNING: Switch No. 1 of the 1771 I/O chassis should be set to OFF for most applications. This allows the processor to turn controlled devices off when a fault is detected. If this switch is set to ON, machine operation can continue after fault detection. Damage to equipment and/or injury to personnel could result.
The setting of switches 3, 4 and 5 determines the I/O data table and program address of the modules in this chassis — this is the local rack number.
26
Improper setting of these switches will result in misdirected communications between processor and the desired I/O rack.
Chapter 2
Hardware Considerations
Figure 2.3
I/O Chassis Backplane Switch Settings for Local I/O Systems
1771
On:
Off:
2.7
Industrial Terminal
No significance ­should be set to OFF
Outputs remain in last state when fault is detected.
Outputs deenergized when fault is detected.
The 1770-T3 and 1784-T50 industrial terminals are the primary programming terminals for the PLC-2/30 programmable controller. They are used to load, edit, monitor and troubleshoot the user’s program in the PLC-2/30 memory.
Local
Rack
Numbers
1 2 3 4 5 6 7
Switch
354
On On On On Off Off Off
On On Off Off On On Off
On Off On Off On Off On
2.8
Local System Structure
For detailed information about the 1770-T3 Industrial Terminal, refer to the Industrial Terminal System User’s Manual, publication no. 1770-6.5.3.
For detailed information about the 1784-T50 Industrial Terminal, refer to the Industrial Terminal T50 User’s Manual, publication no. 1784-6.5.1.
A local system has the processor and each I/O chassis within 3-6 cable feet of each other. Up to 7 local I/O racks may be assigned.
For proper transmission of data between the PLC-2/30 processor and local bulletin 1771 I/O modules, the I/O chassis must contain a local I/O Adapter Module (Cat. No. 1771-AL). The local adapter module must be installed in each I/O chassis used with the processor. Diagnostic indicators
27
Chapter 2
Hardware Considerations
on the front panel of the local adapter module aid in troubleshooting. These indicators are:
ACTIVE — Illuminates when proper communication is established between the processor and the I/O chassis. It also indicates that DC power is properly supplied to the I/O chassis. It is normally on.
RACK FAULT — Illuminates when I/O data is not in the proper format. It is normally off.
Possible causes of a rack fault are:
Data parity error on address or control lines Missing terminator plug Disconnected/broken communications cable No power at the processor.
An I/O Interconnect cable is required to connect between the PLC-2/30 and local I/O rack adapter modules. It is available in two sizes:
2.9
Remote System Structure
3 ft. I/O Interconnect cable (.92m) 1777–CA 6 ft. I/O Interconnect cable (1.85m) 1777-CB
I/O Cable Terminator Plug 1777-CP
(used to “close” the I/O interconnect cable link at the last I/O adapter module)
A remote system allows the processor and the I/O chassis to be separated by up to 10,000 cable feet (approx. 3,048 meters). Up to 7 remote I/O racks may be assigned.
Proper transmission of data between the PLC-2/30 processor and remote bulletin 1771 I/O modules requires a 1772-SD2 Remote I/O Scanner/Distribution Panel plus a 1771-ASB Remote Adapter in each I/O chassis. Connection between the PLC-2/30 processor and the 1772-SD2 is through a 1772-CS interconnect cable. Connection from the 1772-SD2 to a 1771-ASB Remote I/O Adapter and from one remote I/O adapter to another is through 1770-CD twinaxial interconnect cable.
The front of the 1772-SD2 distribution panel has eight bicolor red/green LED indicators. If the I/O chassis is used and serial communication is valid, the RACK STATUS LED will be green. If the I/O chassis is not used, the LED is off. For an I/O rack fault condition, the corresponding RACK STATUS LED will be red. The rack 0 indicator will also go to red if there is a dependent I/O fault.
28
Chapter 2
Hardware Considerations
Three diagnostic indicators are located on the front of the 1771-ASB adapter. These indicators are:
ACTIVE — Illuminates when proper communications have been established between the 1772-SD2 distribution panel and the 1771-ASB adapter, DC power is properly supplied to the I/O chassis and 1771-ASB adapter is actively controlling the I/O. The ACTIVE indicator is normally on.
ADAPTER FAULT — Illuminates when the module is not operating properly. It tells you that a fault has been detected and that the I/O chassis has responded in the manner selected by the last state switch. When this indicator is on, the other indicators are no longer valid. the ADAPTER FAULT indicator is normally off.
I/O RACK FAULT — Illuminates when a fault has been detected at the 1771-ASB adapter, the I/O chassis, or the logic side of the I/O modules. The I/O RACK FAULT is normally off.
2.10
Local/Remote Structure
System
NOTE: For a full listing of the possible combinations of these indicators (on, off or blinking), see the 1771-ASB User’s manual (publication no. 1771-6.5.37).
A local/remote system has both nearby (3-6 cable-ft) and remote (up to 10,000 cable-ft) I/O chassis. Up to 2 local and 5 remote racks may be assigned.
The PLC-2/30 processor system can also be configured with a combination of local and remote I/O chassis. Each local chassis must have a 1771-AL Local I/O Adapter module. And as previously stated, communication with the remote chassis (one or more) requires a 1772-SD2 Remote Distribution panel and one 1771-ASB Remote I/O Adapter in each chassis.
The 1772-SD2 distribution panel may be connected directly to the processor interface module or up to two local I/O chassis may precede it. Connection to the preceding local I/O chassis is made with a 1772-CS interconnect cable.
NOTE: The 1772-SD2 must not be more than 10 cable feet from the PLC-2/30 processor module.
29
Chapter 2
Hardware Considerations
CAUTION: For proper system data communications, a local/remote system structure with 2 local racks, you must use a 1777-CA cable (3 ft./.92m) between the processor and the two local racks. You must also use the 1772-CS cable (3 ft./.92m) from the second local rack to the distribution panel.
2.11
Hardware Addressing Modes
2.12
Auxiliary Power Supplies
The term “addressing mode” refers to the method of hardware addressing within individual I/O chassis. Appendix A, Hardware Addressing, provides a complete presentation on 2-slot, 1-slot and 1/2-slot addressing. In general:
Local I/O chassis that are communicating through a 1771-AL Local I/O
Adapter module can only be 2-slot addressed.
Remote I/O that are communicating through a 1771-ASB Series A
Remote I/O Adapter module can be addressed in either 2-slot or 1-slot modes.
Remote I/O that are communicating through a 1771-ASB Series B
Remote I/O Adapter module can be addressed in either 2-slot, 1-slot or 1/2-slot modes.
NOTE: Processor-to-I/O chassis communication requires the setting of I/O chassis backplane switches. See the 1771-ASB Remote I/O Adapter manual (publication no. 1771-6.5.37) for this information.
The Series C programmable controller’s power supply provides 4 amperes of current to power local I/O chassis or the 1772-SD2 distribution panel. When the total output current required to power these modules exceeds the supply, or a core memory is issued, an auxiliary power supply must be used. The total output current must not exceed the rating of the auxiliary power supply.
2.12.1
1771P2 Auxiliary Power Supply
210
The 1771-P2 power supply provides 6.5 amperes to power one bulletin 1771 I/O chassis with a maximum 128 I/O. This includes the adapter and the I/O modules in the chassis.
This power supply may be operated from either a 120 or a 220/240V AC source.
Chapter 2
Hardware Considerations
2.12.2
1777P2
Auxiliary Power
Supply
2.12.3
1771P3, P4, and P5 Slot Power Supplies
The 1777-P2 Series C power supply provides 9 amperes to power one or two bulletin 1771-I/O chassis. This includes the I/O adapter and the I/O modules in each chassis. The power supply must be used to power the 1772-SD2 distribution panel when the PLC-2/30 processor contains a core memory module.
This power supply may be operated from either a 120 or a 220/240V AC source.
These power supply modules provide 5V DC for an I/O chassis. The -P3 and the -P4 operate on 120V AC; the -P5 operates on 240V DC. The -P3 supplies up to 3 amperes to an I/O chassis; the -P4 and -P5 supply up to 8 amperes to an I/O chassis.
You may place one of these modules in any slot of a Series B 1771 Universal I/O chassis except the adapter/processor slot. Follow the recommendation of the Power Supply Considerations section of publication no. 1771-2.111 when locating these modules in a 1771 Series B I/O chassis.
Full specifications are in publication no. 1771-2.111.
2.12.4
1771P7 Power Supply
2.12.5
1771PSC Power Supply Chassis
The 1771-P7 power supply provides 16 amperes to power one bulletin 1771 I/O chassis. This includes the adapter and the I/O modules in the chassis.
This power supply may be operated from either a 120 or a 220/240V AC source.
NOTE: The 1771-P7 power supply may not be used in conjunction with a slot power supply.
The 1771-PSC provides 4 slots for mounting modular power supplies to provide up to 16 amperes to a 1771 Series B Universal I/O chassis. It can also be used to mount communication modules that need only +5V DC and a processor enable signal.
The power supply chassis may be mounted separately (when used with communications modules) or mounted directly to 1771-A1B, A2B or A4B I/O chassis (when supplying additional backplane current and/or when supporting communications modules).
211
Data Table
Chapter
3
3.0
General
3.1
Memory Structure
MSB LSB
This chapter introduces concepts and terminology necessary for a general understanding of programmable controller memory. It explains the memory organization of the PLC-2/30 programmable controller.
The memory of the processor can be thought of as a large arrangement of storage points, each called a BInary digiT, or bit (Figure 3.1). A bit is the smallest unit of information a memory is capable of retaining. Information stored in each bit is represented as a 1 or 0. When a bit is on, it is represented by a logic 1. When a bit is off, it is represented by a logic 0.
Figure 3.1 Memory
Upper Byte Lower Byte
17 16 15 14 13 12 11 10 07 06 05 04 03 02 01 00
1001110111000110001001011011100
W
ord Structure
1
Address 030
Word
W
ord Address 031
8
8
17 16 15 14 13 12 11 10 07 06 05 04 03 02 01 00
1001010110001000011110001001000
Each bit in a word is identified by a two-digit number using the octal numbering system. Memory bits are numbered 00 through 07 and 10 through 17, with the least significant bit (LSB = 00 most significant bit (MSB = 17
) at the left.
8
A group of 8 bits forms a single byte. A byte is defined as the smallest complete unit of information that can be transmitted to or from the processor at a given time.
0
W
ord Address 1700
W
ord Address 1701
) at the right and the
8
8
8
31
Chapter 3
Data Table
A group of 16 bits makes up a word. This word can be thought of as being made up of two 8-bit bytes; a lower byte and an upper byte.
Because of its function in memory, one PLC-2/30 word may also be thought of as a memory location: when a word is being used, an actual physical location in memory is being accessed.
A specific bit in memory can be identified by combining the word address and bit number to form the bit address, such as 030/12 or 1701/04. The bit address is shown by writing the word address above the instruction and the bit number below it.
3.2
Memory Organization
3.2.1
Data Table
The processor can have a memory capacity of up to 16,256 words. These memory words are organized by their word address and are divided into three major areas (Figure 3.2):
Data table User program
-Main Program
-Subroutine Area
Message Storage Area
All input/output status and user program instructions are stored in one of these parts (Figure 3.2).
Data table words, and/or the 16 bits in each word, are controlled and utilized directly by the processor. The processor uses the status of input devices and the control logic established in the user program to determine the status of output devices. Transfer of input data from input devices and transfer of output data to output devices occurs during the I/O scan. If the output instruction’s status changed in the program, the actual output device’s on/off status is updated during the I/O scan to reflect this change.
32
Chapter 3
Data Table
Decimal
Words
Up to 16,256
Total
8
64
72
128
256
384
512
Figure 3.2 PLC2/30
Decimal
Words
Per Area
Processor W
8
Rack 1010017
Rack 2020027
Rack 3030037
Rack 4040047
Rack 5050057
Rack 6060067
56
8
56
128
128
128
4
128640
Rack 7070077
Processor W
Rack 11
Rack 2120127
Rack 3130137
Rack 4140147
Rack 5150157
Rack 6160167
Rack 7170177
T
imer/Counter ACC V
Internal Storage
T
imer/Counter Preset V
Internal Storage
User (User Program Begins
After End of Last
Data T
End of Program
Message Storage
Memory Organization (Expanded Data T
ork Area
No. 1
1
ork Area
No. 2
10117
2
alues or
alues or
Expansion
1
Expansion
2
Expansion
3
(etc.)
Program Storage
able Expansion)
3
Octal
ord Address
W
000
007 010
77
100
107 110
177 200
277 300
377 400
577 600
777
1000
1177
1200
17777
able)
Output Image Table
Rack address areas that are not configured as output image table become available for timer/counter accumulated values or word/bit storage.
Input Image Table
Rack address areas that are not configured as input image table become available for timer/counter preset values or word/bit storage.
Data table can be expanded in 128 word increments (unused sections are utilized for user program storage) up to 8064 words maximum.
1
027 - Bits in this word are used by the processor for battery low condition, message generation, and data highway output modules in rack 2, I/O group 7.
2
125 and 126 - These words are used to indicate remote rack fault I/O system. Do not put input modules in rack 2, I/O groups 5 or 6.
3
Report generation messages can be stored in memory locations not used by data table or user program.
4
Maximum data table size is 8192 words.
. Do not put
status
in a remote
33
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