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201905AG35NA
User Manual
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Quectel Wireless Solutions 201905AG35NA User Manual

AG35-Quecopen
Hardware Design
LTE Module Series
Rev. AG35-Quecopen_Hardware_Design_V1.3
Date: 2018-12-12
Status: Released
LTE Module Series
AG35-Quecopen
Hardware Design
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GENERAL NOTES
QUECTEL OFFERS THE INFORMATION AS A SERVICE TO ITS CUSTOMERS. THE INFORMATION
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TO ENSURE THE QUALITY OF THE INFORMATION IT MAKES AVAILABLE. QUECTEL DOES NOT
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COPYRIGHT
THE INFORMATION CONTAINED HERE IS PROPRIETARY TECHNICAL INFORMATION OF
QUECTEL WIRELESS SOLUTIONS CO., LTD. TRANSMITTING, REPRODUCTION, DISSEMINATION
AND EDITING OF THIS DOCUMENT AS WELL AS UTILIZATION OF THE CONTENT ARE
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Copyright © Quectel Wireless Solutions Co., Ltd. 2018. All rights reserved.
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About the Document
History
Revision Date Author Description
Eden LIU/
1.0 2017-10-19
Dominic GONG/
Jun WU
Initial
Hardware Design
1.1 2018-03-19
Eden LIU/
Dominic GONG
1. Updated the variants and/or frequency bands of
AG35-Quecopen in Table 1.
2. Changed pins 132 and 133 into RESERVED
pins (Table 4, Table 8 and Figure 2).
3. Deleted SIM IC in Figure 1.
4. Updated transmitting power and GSM features in
Table 2.
5. Updated SD card interface into SDIO interface to
support both eMMC and SD card.
6. Added the description of eCall temperature
range in Table 2 and Chapter 6.3.
7. Updated GNSS data update rate into 10Hz in
Chapter 4.1.
8. Updated the description of PCM interface in
primary and auxiliary modes, and the auxiliary
mode timing (Figure 23) of PCM interface.
9. Updated antenna gain in Table 42, and added a
note for GNSS antenna.
10. Updated current consumption in Chapter 6.4.
11. Updated RF receiving sensitivity in Chapter 6.6.
12. Updated part of the description of thermal
consideration (Chapter 6.8).
1. Added variants and updated bands of the module
1.2 2018-08-27
AG35-QuecOpen_Hardware_Design 2 / 137
Eden LIU/
Dominic GONG
(Table 1).
2. Updated the PAM power supply diagram in the
functional diagram (Figure 1).
LTE Module Series
AG35-Quecopen
Hardware Design
3. Enabled SHDN_N, and added the description of
the pin in Table 4 and Chapter 3.7.2.3.
4. Changed the name of pin 143 from
OTG_PWR_EN to GPIO8 (Table 4).
5. Updated the description of alternate functions of
multiplexing pins (Table 5).
6. Enabled the analog audio interface, and added
the description of the interface in Table 4 and
Chapter 3.12.
7. Enabled UART4 and UART5 interfaces (Chapter
3.11).
8. Added a note for I2C1 interface (Chapter 3.13).
9. Updated the power domain and the reference
circuit with PHY application of SGMII interface
(Chapter 3.16).
10. Updated the pin definition of wireless connectivity
interfaces (Table 26) and the reference circuit for
connection with AF20 module (Figure 30).
11. Added ADC sample rate in Table 28.
12. Updated the reference circuit of USB_BOOT
interface (Figure 33).
13. Added the description of RTC function (Chapter
3.22).
14. Updated the frequency of Galileo and QZSS
(Table 49).
15. Updated current consumption values of the
module (Chapter 6.4).
16. Added RF output power of AG35-E (Chapter 6.5).
17. Added RF receiving sensitivity of AG35-E
(Chapter 6.6).
18. Updated the reflow soldering thermal profile and
related parameters (Chapter 8.2).
1. Updated supported bands of the module (Table
1).
2. Updated the functional diagram (Figure 1).
3. Updated the pin assignment (Figure 2).
4. Updated the drive current of STATUS pin (Table
4) and its reference circuit design (Figure 34).
5. Updated alternate functions of multiplexing pins
(Table 5).
1.3 2018-12-12
Eden LIU/
Dominic GONG/
Ethan SHAN
6. Updated the drive circuit of SHDN_N interface
(Figure 14).
7. Added a note relating to PCM interface (Chapter
3.13). Added GNSS performance values of
AG35-QuecOpen_Hardware_Design 3 / 137
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Hardware Design
AG35-NA and AG35-J (Chapter 4.2).
8. Updated the maximum clock frequency of SPI2
interface into 38MHz (Chapter 3.15).
9. Updated current consumption values of the
module (Chapter 6.4).
10. Completed the RF output power values of the
module (Chapter 6.5).
11. Added the RF receiving sensitivity of AG35-E,
AG35-NA and AG35-J (Chapter 6.6).
1.4 2019-02-01 Eden 1. Updated the description of the notes (table 5).
AG35-QuecOpen_Hardware_Design 4 / 137
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Contents
About the Document ................................................................................................................................ 2
Contents .................................................................................................................................................... 5
Table Index ............................................................................................................................................... 8
Figure Index ............................................................................................................................................ 10
1 Introduction ..................................................................................................................................... 12
1.1. Safety Information .................................................................................................................. 13
2 Product Concept ............................................................................................................................. 14
2.1. General Description ................................................................................................................ 14
2.2. Key Features .......................................................................................................................... 15
2.3. Functional Diagram ................................................................................................................ 19
2.4. Evaluation Board .................................................................................................................... 20
3 Application Interfaces ..................................................................................................................... 21
3.1. General Description ................................................................................................................ 21
3.2. Pin Assignment ....................................................................................................................... 21
3.3. Pin Description ....................................................................................................................... 23
3.4. Operating Modes .................................................................................................................... 40
3.5.
Power Saving ......................................................................................................................... 40
3.5.1. Sleep Mode.................................................................................................................. 40
3.5.1.1. USB Application with USB Remote Wakeup Function ...................................... 41
3.5.1.2. USB Application without USB Remote Wakeup Function ................................. 42
3.5.1.3. USB Application without USB Suspend Function .............................................. 42
3.5.2. Airplane Mode .............................................................................................................. 43
3.6. Power Supply ......................................................................................................................... 44
3.6.1. Power Supply Pins ....................................................................................................... 44
3.6.2. Decrease Voltage Drop ................................................................................................ 44
3.6.3. Reference Design for Power Supply ............................................................................ 45
3.6.4. Monitor the Power Supply ............................................................................................ 46
3.7. Turn on and off Scenarios ...................................................................................................... 46
3.7.1. Turn on Module Using PWRKEY ................................................................................. 46
3.7.2. Turn off Module ............................................................................................................ 48
3.7.2.1. Turn off Module Using the PWRKEY Pin .......................................................... 48
3.7.2.2. Turn off Module Using AT Command or API Interface .............
.......................... 49
3.7.2.3. Turn off Module Using SHDN_N ....................................................................... 49
3.8. Reset The Module .................................................................................................................. 51
3.9. (U)SIM Interface ..................................................................................................................... 52
3.10. USB Interface ......................................................................................................................... 55
3.11. UART Interfaces ..................................................................................................................... 56
3.12. Audio Interface (Optional) ....................................................................................................... 60
3.13. PCM and I2C Interfaces ......................................................................................................... 61
3.14. SDIO Interfaces ...................................................................................................................... 64
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3.14.1. SDIO1 Interface ........................................................................................................... 64
3.14.2. SDIO2 Interface ........................................................................................................... 64
3.14.2.1. Reference Design for SD Card Application ....................................................... 65
3.14.2.2. Reference Design for eMMC Application .......................................................... 67
3.15. SPI Interfaces ......................................................................................................................... 68
3.16. SGMII Interface (Optional) ...................................................................................................... 70
3.17. Wireless Connectivity Interfaces ............................................................................................ 72
3.17.1. WLAN Interface ........................................................................................................... 75
3.17.2. BT Interface* ................................................................................................................ 75
3.18. ADC Interfaces ....................................................................................................................... 75
3.19. Network Status Indication ....................................................................................................... 76
3.20. STATUS .................................................................................................................................. 77
3.21. USB_BOOT Interface ............................................................................................................. 78
3.22. RTC ........................................................................................................................................ 79
4 GNSS Receiver ................................................................................................................................ 80
4.1. General Description ...........................................
..................................................................... 80
4.2. GNSS Performance ................................................................................................................ 80
4.3. Layout Guidelines ................................................................................................................... 83
5 Antenna Interfaces .......................................................................................................................... 84
5.1. Main/Rx-diversity Antenna Interface ....................................................................................... 84
5.1.1. Pin Definition ................................................................................................................ 84
5.1.2. Operating Frequency ................................................................................................... 84
5.1.3. Reference Design of RF Antenna Interface ................................................................. 88
5.1.4. Reference Design of RF Layout ................................................................................... 89
5.2. GNSS Antenna Interface ........................................................................................................ 91
5.3. Antenna Installation ................................................................................................................ 92
5.3.1. Antenna Requirements ................................................................................................ 92
5.3.2. Recommended RF Connector for Antenna Installation ................................................ 93
6 Electrical, Reliability and Radio Characteristics .......................................................................... 95
6.1. Absolute Maximum Ratings .................................................................................................... 95
6.2. Power Supply Ratings ..........................................
.................................................................. 96
6.3. Operation and Storage Temperatures .................................................................................... 96
6.4. Current Consumption ............................................................................................................. 97
6.5. RF Output Power ................................................................................................................... 111
6.6. RF Receiving Sensitivity ........................................................................................................ 115
6.7. Electrostatic Discharge .......................................................................................................... 119
6.8. Thermal Consideration .......................................................................................................... 119
7 Mechanical Dimensions................................................................................................................ 122
7.1. Mechanical Dimensions of the Module ................................................................................. 122
7.2. Recommended Footprint ...................................................................................................... 124
7.3. Design Effect Drawings of the Module .................................................................................. 125
8 Storage, Manufacturing and Packaging ...................................................................................... 126
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8.1. Storage ................................................................................................................................. 126
8.2. Manufacturing and Soldering ................................................................................................ 127
8.3. Packaging ............................................................................................................................. 128
9 Appendix A References ................................................................................................................ 130
10 Appendix B GPRS Coding Schemes ........................................................................................... 134
11 Appendix C GPRS Multi-slot Classes .......................................................................................... 135
12 Appendix D EDGE Modulation and Coding Schemes ................................................................ 137
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Table Index
TABLE 1: FREQUENCY BANDS OF AG35-QUECOPEN MODULES .............................................................. 15
TABLE 2: KEY FEATURES OF AG35-QUECOPEN MODULES ...................................................................... 15
TABLE 3: I/O PARAMETERS DEFINITION ....................................................................................................... 23
TABLE 4: PIN DESCRIPTION ........................................................................................................................... 24
TABLE 5: ALTERNATE FUNCTIONS OF MULTIPLEXING PINS ..................................................................... 35
TABLE 6: PULL-UP/PULL-DOWN RESISTANCE OF GPIOS .......................................................................... 39
TABLE 7: OVERVIEW OF OPERATING MODES ............................................................................................. 40
TABLE 8: VBAT AND GND PINS ....................................................................................................................... 44
TABLE 9: PWRKEY PIN DESCRIPTION .......................................................................................................... 46
TABLE 10: PIN DEFINITION OF SHDN_N ....................................................................................................... 50
TABLE 11: RESET_N PIN DESCRIPTION ....................................................................................................... 51
TABLE 12: PIN DEFINITION OF (U)SIM INTERFACE ..................................................................................... 53
TABLE 13: PIN DESCRIPTION OF USB INTERFACE ..................................................................................... 55
TABLE 14: PIN DEFINITION OF UART1 INTERFACE ..................................................................................... 57
TABLE 15: PIN DEFINITION OF UART2 INTERFACE ..................................................................................... 57
TABLE 16: PIN DEFINITION OF UART3 INTERFACE (MULTIPLEXED FROM SPI) ...................................... 57
TABLE 17: PIN DEFINITION OF UART4 INTERFACE (MULTIPLEXED FROM SDIO1) ................................. 58
TABLE 18: PIN DEFINITION OF UART5 INTERFACE (MULTIPLEXED FROM SDIO1) ................................. 58
TABLE 19: PIN DEFINITION OF DEBUG UART INTERFACE ......................................................................... 58
TABLE 20: LOGIC LEVELS OF DIGITAL I/O .................................................................................................... 59
TABLE 21: PIN DEFINITION OF ANALOG AUDIO INTERFACE ...................................................................... 60
TABLE 22: PIN DEFINITION OF PCM INTERFACE ......................................................................................... 63
TABLE 23: PIN DEFINITION OF I2C INTERFACES ......................................................................................... 63
TABLE 24: PIN DEFINITION OF SDIO2 INTERFACE ...................................................................................... 65
TABLE 25: PIN DEFINITION OF SPI1 INTERFACE ......................................................................................... 68
TABLE 26: PIN DEFINITION OF SPI2 INTERFACE (MULTIPLEXED FROM UART1) .................................... 68
TABLE 27: PIN DEFINITION OF SPI3 INTERFACE (MULTIPLEXED FROM UART2) .................................... 68
TABLE 28: PARAMETERS OF SPI INTERFACE TIMING ................................................................................ 69
TABLE 29: PIN DEFINITION OF SGMII INTERFACE ...................................................................................... 70
TABLE 30: PIN DEFINITION OF WIRELESS CONNECTIVITY INTERFACES ................................................ 72
TABLE 31: PIN DEFINITION OF ADC INTERFACES ....................................................................................... 76
TABLE 32: CHARACTERISTIC OF ADC INTERFACES ................................................................................... 76
TABLE 33: PIN DEFINITION OF THE NETWORK STATUS INDICATOR (NET_STATUS ) .............................. 77
TABLE 34: WORKING STATE OF THE NETWORK STATUS INDICATOR (NET_STATUS) ........................... 77
TABLE 35: PIN DEFINITION OF STATUS ........................................................................................................ 78
TABLE 36: PIN DEFINITION OF USB_BOOT INTERFACE ............................................................................. 79
TABLE 37: AG35-CE GNSS PERFORMANCE ................................................................................................. 80
TABLE 38: AG35-E GNSS PERFORMANCE .................................................................................................... 81
TABLE 39: AG35-NA GNSS PERFORMANCE ................................................................................................. 81
TABLE 40: AG35-LA GNSS PERFORMANCE .................................................................................................. 82
TABLE 41: AG35-J GNSS PERFORMANCE .................................................................................................... 82
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TABLE 42: PIN DEFINITION OF THE RF ANTENNA INTERFACES ............................................................... 84
TABLE 43: AG35-CE OPERATING FREQUENCIES ........................................................................................ 84
TABLE 44: AG35-E OPERATING FREQUENCIES ........................................................................................... 85
TABLE 45: AG35-NA OPERATING FREQUENCIES ........................................................................................ 86
TABLE 46: AG35-LA OPERATING FREQUENCIES ......................................................................................... 86
TABLE 47: AG35-J OPERATING FREQUENCIES ........................................................................................... 87
TABLE 48: PIN DEFINITION OF GNSS ANTENNA INTERFACE ..................................................................... 91
TABLE 49: GNSS FREQUENCY ....................................................................................................................... 91
TABLE 50: ANTENNA REQUIREMENTS .......................................................................................................... 92
TABLE 51: ABSOLUTE MAXIMUM RATINGS .................................................................................................. 95
TABLE 52: POWER SUPPLY RATINGS ........................................................................................................... 96
TABLE 53: OPERATION AND STORAGE TEMPERATURES .......................................................................... 96
TABLE 54: AG35-CE CURRENT CONSUMPTION (25°C, 3.8V POWER SUPPLY) ........................................ 97
TABLE 55: AG35-E CURRENT CONSUMPTION ............................................................................................. 99
TABLE 56: AG35-NA CURRENT CONSUMPTION ......................................................................................... 102
TABLE 57: AG35-LA CURRENT CONSUMPTION ......................................................................................... 104
TABLE 58: AG35-J CURRENT CONSUMPTION ............................................................................................ 108
TABLE 59: AG35-CE GNSS CURRENT CONSUMPTION ............................................................................. 109
TABLE 60: AG35-E GNSS CURRENT CONSUMPTION ................................................................................. 110
TABLE 61: AG35-NA GNSS CURRENT CONSUMPTION .............................................................................. 110
TABLE 62: AG35-LA GNSS CURRENT CONSUMPTION ............................................................................... 110
TABLE 63: AG35-J GNSS CURRENT CONSUMPTION.................................................................................. 111
TABLE 64: AG35-CE RF OUTPUT POWER .................................................................................................... 111
TABLE 65: AG35-E RF OUTPUT POWER ....................................................................................................... 112
TABLE 66: AG35-NA RF OUTPUT POWER .................................................................................................... 113
TABLE 67: AG35-LA RF OUTPUT POWER ..................................................................................................... 113
TABLE 68: AG35-J RF OUTPUT POWER ....................................................................................................... 114
TABLE 69: AG35-CE RF RECEIVING SENSITIVITY ...................................................................................... 115
TABLE 70: AG35-E RF RECEIVING SENSITIVITY ......................................................................................... 116
TABLE 71: AG35-NA RF RECEIVING SENSITIVITY ....................................................................................... 117
TABLE 72: AG35-LA RF RECEIVING SENSITIVITY ....................................................................................... 117
TABLE 73: AG35-J RF RECEIVING SENSITIVITY .......................................................................................... 118
TABLE 74: ELECTROSTATIC DISCHARGE CHARACTERISTICS ................................................................ 119
TABLE 75: RECOMMENDED THERMAL PROFILE PARAMETERS ............................................................. 127
TABLE 76: RELATED DOCUMENTS .............................................................................................................. 130
TABLE 77: TERMS AND ABBREVIATIONS .................................................................................................... 130
TABLE 78: DESCRIPTION OF DIFFERENT CODING SCHEMES ................................................................ 134
TABLE 79: GPRS MULTI-SLOT CLASSES .................................................................................................... 135
TABLE 80: EDGE MODULATION AND CODING SCHEMES ......................................................................... 137
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Figure Index
FIGURE 1: FUNCTIONAL DIAGRAM ............................................................................................................... 20
FIGURE 2: PIN ASSIGNMENT (TOP VIEW) .................................................................................................... 22
FIGURE 3: SLEEP MODE CURRENT CONSUMPTION DIAGRAM ................................................................ 41
FIGURE 4: SLEEP MODE APPLICATION WITH USB REMOTE WAKEUP .................................................... 41
FIGURE 5: SLEEP MODE APPLICATION WITHOUT USB REMOTE WAKEUP ............................................. 42
FIGURE 6: SLEEP MODE APPLICATION WITHOUT SUSPEND FUNCTION ................................................ 43
FIGURE 7: POWER SUPPLY LIMITS DURING BURST TRANSMISSION ...................................................... 45
FIGURE 8: STAR STRUCTURE OF THE POWER SUPPLY ............................................................................ 45
FIGURE 9: REFERENCE CIRCUIT OF POWER SUPPLY .............................................................................. 46
FIGURE 10: TURN ON THE MODULE USING DRIVING CIRCUIT ................................................................. 47
FIGURE 11: TURN ON THE MODULE USING KEYSTROKE .......................................................................... 47
FIGURE 12: TIMING OF TURNING ON MODULE ........................................................................................... 48
FIGURE 13: TIMING OF TURNING OFF MODULE ......................................................................................... 49
FIGURE 14: SHUT DOWN THE MODULE USING DRIVING CIRCUIT ........................................................... 50
FIGURE 15: TIMING OF TURNING OFF MODULE VIA SHDN_N ................................................................... 50
FIGURE 16: REFERENCE CIRCUIT OF RESET_N BY USING DRIVING CIRCUIT ...................................... 51
FIGURE 17: REFERENCE CIRCUIT OF RESET_N BY USING BUTTON ...................................................... 52
FIGURE 18: TIMING OF RESETTING MODULE ............................................................................................. 52
FIGURE 19: REFERENCE CIRCUIT OF (U)SIM INTERFACE WITH AN 8-PIN (U)SIM CARD CONNECTOR
................................................................................................................................................................... 53
FIGURE 20: REFERENCE CIRCUIT OF (U)SIM INTERFACE WITH A 6-PIN (U)SIM CARD CONNECTOR . 54
FIGURE 21: REFERENCE CIRCUIT OF USB APPLICATION ......................................................................... 55
FIGURE 22: REFERENCE CIRCUIT WITH TRANSLATOR CHIP ................................................................... 59
FIGURE 23: REFERENCE CIRCUIT WITH TRANSISTOR CIRCUIT .............................................................. 60
FIGURE 24: PRIMARY MODE TIMING ............................................................................................................ 62
FIGURE 25: AUXILIARY MODE TIMING .......................................................................................................... 62
FIGURE 26: REFERENCE CIRCUIT OF PCM APPLICATION WITH AUDIO CODEC .................................... 64
FIGURE 27: REFERENCE CIRCUIT DESIGN FOR SD CARD APPLICATION ............................................... 66
FIGURE 28: REFERENCE CIRCUIT DESIGN FOR EMMC APPLICATION .................................................... 67
FIGURE 29: SPI TIMING ................................................................................................................................... 69
FIGURE 30: SIMPLIFIED BLOCK DIAGRAM FOR ETHERNET APPLICATION ............................................. 71
FIGURE 31: REFERENCE CIRCUIT OF SGMII INTERFACE WITH PHY APPLICATION .............................. 71
FIGURE 32: REFERENCE CIRCUIT FOR CONNECTION WITH AF20 MODULE .......................................... 74
FIGURE 33: REFERENCE CIRCUIT OF THE NETWORK STATUS INDICATOR ........................................... 77
FIGURE 34: REFERENCE CIRCUITS OF STATUS ......................................................................................... 78
FIGURE 35: REFERENCE CIRCUIT OF USB_BOOT INTERFACE ................................................................ 79
FIGURE 36: REFERENCE CIRCUIT OF RF ANTENNA INTERFACES ........................................................... 88
FIGURE 37: MICROSTRIP DESIGN ON A 2-LAYER PCB ............................................................................... 89
FIGURE 38: COPLANAR WAVEGUIDE DESIGN ON A 2-LAYER PCB ........................................................... 89
FIGURE 39: COPLANAR WAVEGUIDE DESIGN ON A 4-LAYER PCB (LAYER 3 AS REFERENCE GROUND)
................................................................................................................................................................... 90
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FIGURE 40: COPLANAR WAVEGUIDE DESIGN ON A 4-LAYER PCB (LAYER 4 AS REFERENCE GROUND)
................................................................................................................................................................... 90
FIGURE 41: REFERENCE CIRCUIT OF GNSS ANTENNA ............................................................................. 91
FIGURE 42: DIMENSIONS OF THE U.FL-R-SMT CONNECTOR (UNIT: MM) ................................................ 93
FIGURE 43: MECHANICALS OF U.FL-LP CONNECTORS ............................................................................. 93
FIGURE 44: SPACE FACTOR OF MATED CONNECTOR (UNIT: MM) ........................................................... 94
FIGURE 45: REFERENCED HEATSINK DESIGN (HEATSINK AT THE TOP OF THE MODULE) ................ 120
FIGURE 46: REFERENCED HEATSINK DESIGN (HEATSINK AT THE BACKSIDE OF CUSTOMERS’ PCB)
................................................................................................................................................................. 121
FIGURE 47: MODULE TOP AND SIDE DIMENSIONS ................................................................................... 122
FIGURE 48: MODULE BOTTOM DIMENSIONS (TOP VIEW) ....................................................................... 123
FIGURE 49: RECOMMENDED FOOTPRINT (TOP VIEW) ............................................................................ 124
FIGURE 50: TOP VIEW OF THE MODULE .................................................................................................... 125
FIGURE 51: BOTTOM VIEW OF THE MODULE ............................................................................................ 125
FIGURE 52: RECOMMENDED REFLOW SOLDERING THERMAL PROFILE .............................................. 127
FIGURE 53: TAPE SPECIFICATIONS ............................................................................................................ 128
FIGURE 54: REEL SPECIFICATIONS ............................................................................................................ 129
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1 Introduction
This document defines the AG35-Quecopen module and describes its air interface and hardware
interface which are connected with customers’ applications.
This document can help customers quickly understand module interface specifications, electrical and
mechanical details, as well as other related information of the module. Associated with application notes
and user guides, customers can use AG35-Quecopen module to design and set up automotive industry
mobile applications easily.
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1.1. Safety Information
The following safety precautions must be observed during all phases of the operation, such as usage,
service or repair of any cellular terminal or mobile incorporating AG35-Quecopen module. Manufacturers of
the cellular terminal should send the following safety information to users and operating personnel, and
incorporate these guidelines into all manuals supplied with the product. If not so, Quectel assumes no
liability for customers’ failure to comply with these precautions.
Full attention must be given to driving at all times in order to reduce the risk of an
accident. Using a mobile while driving (even with a handsfree kit) causes
distraction and can lead to an accident. Please comply with laws and regulations
restricting the use of wireless devices while driving.
Switch off the cellular terminal or mobile before boarding an aircraft. The operation
of wireless appliances in an aircraft is forbidden to prevent interference with
communication systems. If the device offers an Airplane Mode, then it should be
enabled prior to boarding an aircraft. Please consult the airline staff for more
restrictions on the use of wireless devices on boarding the aircraft.
Wireless devices may cause interference on sensitive medical equipment, so
please be aware of the restrictions on the use of wireless devices when in
hospitals, clinics or other healthcare facilities.
Cellular terminals or mobiles operating over radio signals and cellular network
cannot be guaranteed to connect in all possible conditions (for example, with
unpaid bills or with an invalid (U)SIM card). When emergent help is needed in such
conditions, please remember using emergency call. In order to make or receive a
call, the cellular terminal or mobile must be switched on in a service area with
adequate cellular signal strength.
The cellular terminal or mobile contains a transmitter and receiver. When it is ON, it
receives and transmits radio frequency signals. RF interference can occur if it is
used close to TV set, radio, computer or other electric equipment.
In locations with potentially explosive atmospheres, obey all posted signs to turn
off wireless devices such as your phone or other cellular terminals. Areas with
potentially explosive atmospheres include fuelling areas, below decks on boats,
fuel or chemical transfer or storage facilities, areas where the air contains
chemicals or particles such as grain, dust or metal powders, etc.
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2 Product Concept
2.1. General Description
Quecopen
of communication technology and the ever-changing market demands, more and more customers have
realized the advantages of Quecopen
greatly valued by customers. With Quecopen
hardware design will be simplified. Main features of Quecopen
Simplifies the development of embedded applications, and shortens product development cycle
Simplifies circuit design, and reduces product cost
Decreases the size of terminal products
Reduces power consumption
Supports remote upgrade of firmware wirelessly
Improves products’ cost-performance ratio, and enhances products’ competitiveness
AG35-Quecopen module is a baseband processor platform based on ARM Cortex A7 kernel. The
maximum dominant frequency is up to 1.2GHz. Customers can use AG35-Quecopen modules as the
basis for development of Quecopen® applications.
AG35-Quecopen is a series of automotive-grade LTE-FDD/LTE-TDD/WCDMA/TD-SCDMA/EVDO/
CDMA/GSM wireless communication module with receive diversity, and provides data connectivity on
LTE-FDD, LTE-TDD, DC-HSDPA, HSPA+, HSDPA, HSUPA, WCDMA, TD-SCDMA, EVDO, CDMA,
EDGE and GPRS networks. It also provides GNSS and voice functionalities to meet customers’ specific
application demands.
Engineered to meet the demanding requirements in automotive applications and other harsh operating
conditions, AG35-Quecopen offers a premium solution for high performance automotive and intelligent
transportation system (ITS) applications, such as fleet management, onboard vehicle telematics, in-car
entertainment systems, emergency calling, and roadside assistance.
With a compact profile of 33.0mm × 37.5mm × 3.0mm, AG35-Quecopen can meet almost all
requirements for automobile application. It is an SMD type module which can be embedded into
applications through its 299-pin LGA pads.
®
is an application solution where the module acts as a main processor. With the development
®
solution. Especially, its advantage in reducing the product cost is
®
solution, development flow for wireless application and
®
solution are listed below:
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Table 1: Frequency Bands of AG35-Quecopen Modules
Hardware Design
Network
Typ e
LTE-FDD
(with
Rx-diversity)
LTE-TDD
(with
Rx-diversity)
WCDMA
(with
Rx-diversity)
AG35-CE AG35-E AG35-NA AG35-LA* AG35-J*
B1/B3/
B5/B8
B1/B3/B5/
B7/B8/B20/
B28
B2/B4/B5/
B7/B12/B13/
B17/B28
1)
B1/B2/B3/
B4/B5/B7/
B8/B28
B1/B3/B5/B8/
B9/B19/B21/
B28/
B34/B38/
B39/B40/
B38/B40 N/A N/A B41
B41
B1/B8 B1/B5/B8 B2/B4/B5
B1/B2/B3/
B4/B5/B8
B1/B3/B5/
B6/B8/B19
TD-SCDMA B34/B39 N/A N/A N/A N/A
EVDO/CDMA BC0 1) N/A N/A N/A N/A
GSM 900/1800MHz 900/1800MHz 850/1900MHz
GPS,
GLONASS,
BeiDou/
Compass,
Galileo, QZSS
GNSS
GPS,
GLONASS,
BeiDou/
Compass,
Galileo, QZSS
GPS,
GLONASS,
BeiDou/
Compass,
Galileo, QZSS
850/900/
1800/1900MHz
GPS,
GLONASS,
BeiDou/
Compass,
Galileo, QZSS
N/A
GPS,
GLONASS,
BeiDou/
Compass,
Galileo, QZSS
NOTES
1)
1.
EVDO/CDMA BC0 for AG35-CE and LTE-FDD B28 for AG35-NA are optional.
2. “*” means under development.
2.2. Key Features
The following table describes the detailed features of AG35-Quecopen module.
Table 2: Key Features of AG35-Quecopen Modules
Feature Details
Power Supply
Supply voltage: 3.3V~4.3V
Typical supply voltage: 3.8V
AG35-QuecOpen_Hardware_Design 15 / 137
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AG35-Quecopen
Transmitting Power
LTE Features
Class 4 (33dBm±2dB) for GSM850
Class 4 (33dBm±2dB) for EGSM900
Class 1 (30dBm±2dB) for DCS1800
Class 1 (30dBm±2dB) for PCS1900
Class E2 (27dBm±3dB) for GSM850 8-PSK
Class E2 (27dBm±3dB) for EGSM900 8-PSK
Class E2 (26dBm±3dB) for DCS1800 8-PSK
Class E2 (26dBm±3dB) for PCS1900 8-PSK
Class 3 (24dBm+2/-1dB) for EVDO/CDMA BC0
Class 3 (24dBm+1/-3dB) for WCDMA bands
Class 2 (24dBm+1/-3dB) for TD-SCDMA bands
Class 3 (23dBm±2dB) for LTE-FDD bands
Class 3 (23dBm±2dB) for LTE-TDD bands
Support up to non-CA Cat 4 LTE FDD and TDD
Support 1.4 to 20MHz RF bandwidth
Support Multiuser MIMO in DL direction
FDD: Max 150Mbps (DL)/50Mbps (UL)
TDD: Max 130Mbps (DL)/30Mbps (UL)
Hardware Design
UMTS Features
TD-SCDMA Features
CDMA2000 Features
GSM Features
Support 3GPP R8 DC-HSDPA, HSPA+, HSDPA, HSUPA, WCDMA
Support QPSK, 16-QAM and 64-QAM modulation
DC-HSDPA: Max 42Mbps (DL)
HSUPA: Max 5.76Mbps (UL)
WCDMA: Max 384Kbps (DL)/384Kbps (UL)
Support CCSA Release 3 TD-SCDMA
Max 4.2Mbps (DL)/2.2Mbps (UL)
Support 3GPP2 CDMA2000 1X Advanced, CDMA2000 1x EV-DO Rev.A
EVDO: Max 3.1Mbps (DL)/1.8Mbps (UL)
1X Advanced: Max 307.2Kbps (DL)/307.2Kbps (UL)
GPRS:
Support GPRS multi-slot class 33 (33 by default)
Coding scheme: CS-1, CS-2, CS-3 and CS-4
Max 107Kbps (DL)/85.6Kbps (UL)
EDGE:
Support EDGE multi-slot class 33 (33 by default)
Support GMSK and 8-PSK for different MCS (Modulation and Coding
Scheme)
Downlink coding schemes: CS 1-4 and MCS 1-9
Uplink coding schemes: CS 1-4 and MCS 1-9
Max 296Kbps (DL)/236.8Kbps (UL)
Support TCP/UDP/PPP/FTP/HTTP/NTP/PING/QMI/HTTPS/SMTP/MMS/
Internet Protocol Features
FTPS/SMTPS/SSL protocols
Support the protocols PAP (Password Authentication Protocol) and CHAP
(Challenge Handshake Authentication Protocol) usually used for PPP
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LTE Module Series
AG35-Quecopen
connections
Text and PDU modes
SMS
Point to point MO and MT
SMS cell broadcast
SMS storage: ME by default
(U)SIM Interface Support USIM/SIM card: 1.8V, 3.0V
Built-in audio codec with two microphone inputs and one stereo output or
two mono outputs
Audio Features
(Optional)
GSM: HR/FR/EFR/AMR/AMR-WB
WCDMA: AMR/AMR-WB
LTE: AMR/AMR-WB
Support echo cancellation and noise suppression
Used for audio function with external codec
Support 16-bit linear data format
PCM Interface
Support long frame synchronization and short frame synchronization
Support master and slave modes, but must be the master in long frame
synchronization
Hardware Design
USB Interface
UART Interfaces
Compliant with USB 2.0 specification (support USB HOST) and the data
transfer rate can reach up to 480Mbps
Used for AT command communication, data transmission, GNSS NMEA
output, software debugging and firmware upgrade
Support USB serial driver under Windows 7/8/8.1/10, Windows CE
5.0/6.0/7.0*, Linux 2.6/3.x/4.1~4.14, Android 4.x/5.x/6.x/7.x/8.x
UART1:
Baud rate reach up to 921600bps, 115200bps by default
Support RTS and CTS hardware flow control
UART2:
Baud rate reach up to 921600bps, 115200bps by default
Support RTS and CTS hardware flow control
UART3 (Multiplexed from SPI):
Baud rate reach up to 921600bps, 115200bps by default
Support RTS and CTS hardware flow control
UART4 (Multiplexed from SDIO1):
Baud rate reach up to 921600bps, 115200bps by default
Support RTS and CTS hardware flow control
UART5 (Multiplexed from SDIO1):
Baud rate reach up to 921600bps, 115200bps by default
Debug UART:
Used for Linux console and log output, 115200bps baud rate
SDIO1:
SDIO Interfaces
Compliant with SD 3.0 protocol
Used for WLAN function
AG35-QuecOpen_Hardware_Design 17 / 137
LTE Module Series
AG35-Quecopen
SDIO2:
Compliant with SD 3.0 protocol
Support eMMC and SD card
SPI Interfaces
Support master mode only Maximum clock frequency rate: 50MHz
I2C1:
Compliant with I2C specification version 5.0
Multi-master is not supported
I2C Interfaces
Used for codec configuration by default
I2C2:
Compliant with I2C specification version 5.0
Multi-master is not supported
SGMII Interface (Optional) Support 10/100Mbps
Hardware Design
Wireless Connectivity
Interfaces
Support SDIO1 interface for WLAN and UART & PCM interfaces for
Bluetooth*
Rx-diversity Support LTE/WCDMA Rx-diversity
GNSS Features
AT Commands
Gen8C-Lite of Qualcomm
Protocol: NMEA 0183
3GPP TS 27.007/3GPP TS 27.005 AT commands and Quectel enhanced
AT commands
Network Indication NET_STATUS is used to indicate network connectivity status
Antenna Interface
Physical Characteristics
Temperature Range
Including main antenna interface (ANT_MAIN), Rx-diversity antenna
interface (ANT_DIV) and GNSS antenna interface (ANT_GNSS)
Size: (33.0±0.15)mm × (37.5±0.15 )mm × (3.0±0.2)mm
Weight: approx. 8.1g
2)
1)
Operation temperature range: -35°C ~ +75°C
Extended temperature range: -40°C ~ +85°C
eCall temperature range: -40°C ~ +90°C 3)
Storage temperature range: -40°C ~ +95°C
Firmware Upgrade
USB interface
DFOTA
RoHS All hardware components are fully compliant with EU RoHS directive
NOTES
1. 1) Within operation temperature range, the module is 3GPP compliant, and emergency call can be
dialed out with a maximum power and data rate.
2. 2) Within extended temperature range, the module remains fully functional and retains the ability to
establish and maintain a voice, SMS, data transmission, emergency call, etc. There is no
unrecoverable malfunction. There are also no effects on radio spectrum and no harm to radio
network. Only one or more parameters like P
might reduce in their value and exceed the specified
out
AG35-QuecOpen_Hardware_Design 18 / 137
LTE Module Series
AG35-Quecopen
Hardware Design
tolerances. When the temperature returns to normal operation temperature levels, the module will
meet 3GPP specifications again.
3. 3) Within eCall temperature range, the emergency call function must be functional until the module is
broken. When the ambient temperature is between 75°C and 90°C and the module temperature has
reached the threshold value, the module will trigger protective measures (such as reduce power,
decrease throughput, unregister the device, etc.) to ensure the full function of emergency call.
4. “*” means under development.
2.3. Functional Diagram
The following figure shows a block diagram of AG35-Quecopen and illustrates the major functional parts.
Power management
Baseband
DDR+NAND flash
Radio frequency
Peripheral interfaces
AG35-QuecOpen_Hardware_Design 19 / 137
LTE Module Series
AG35-Quecopen
Hardware Design
Figure 1: Functional Diagram
2.4. Evaluation Board
In order to help customers develop applications conveniently with AG35-Quecopen module, Quectel
supplies the evaluation board (EVB), USB data cable, earphone, antenna and other peripherals to control
or test the module. For more details, please refer to document [4].
AG35-QuecOpen_Hardware_Design 20 / 137
LTE Module Series
AG35-Quecopen
Hardware Design
3 Application Interfaces
3.1. General Description
AG35-Quecopen is equipped with 299-pin LGA pads that can be connected to cellular application
platform. Sub-interfaces included in these pads are described in detail in the following sub-chapters:
Power supply
(U)SIM interface
USB interface
UART interfaces
Audio interface (optional)
PCM and I2C interfaces
SDIO interfaces
SPI interfaces
SGMII interface (optional)
Wireless connectivity interfaces
ADC interfaces
Status indication interfaces
USB_BOOT interface
3.2. Pin Assignment
The following figure shows the pin assignment of AG35-Quecopen module.
AG35-QuecOpen_Hardware_Design 21 / 137
LTE Module Series
AG35-Quecopen
Hardware Design
GND
SPK2_P
SPK1_P
MICBIAS
MIC2_P
MIC_P
GND
GPIO 4
COEX_UART_RX
GND
WAKEUP_I N
MCLK
GND
VBAT_BB
GND
WLAN_WAKE
RESERVED
UART2_CTS
UART2_RTS
VDD_EXT
NET_STATUS
ADC2
GND
SHDN_N
GND
SPK2_N
SPK1_N
MIC2_N
MIC1_N
AGND
GPIO 8
COEX_UAR T_TX
GPIO 5
WLAN_EN
RESERVED
GND
VBAT_BB
GND
GPIO 7
RESERVED
UART2_TXD
UART2_RXD
GND
WLAN_SLP_CLK
STATUS
ADC0
ADC1
ANT_DI V
129
127
299
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
296
125
128
126
124
214
213
224
233
242
251
260
269
278
287
178
177
6
4
2
5
3
1
ANT_GNSS
RESERVED
RESERVED
123
121
119
117
115
113
122
120
118
116
114
112
212
211
210
209
208
207
216 217 218215 219 220 221 222 223
225
226
227
234
235
236
244
253
262
271
280
289
183
182
14
12
13
15
245 246 247
254 255 256
263 264 265
272
281
290
184
18
16
17
243
252
261
270
279
288
181
180
179
8
10
9
7
11
ANT_MAIN
111
109
107
110
108
206
205
204
228
237
273
282
291
187
186
185
22
20
23
21
19
RESERVED
99
105
103
106
104
102
203
202
229
238
274
283
292
189
188
28
26
24
27
97
101
98
100
201
200
199
230
231
239
240
248
249
257
258
266
267
275
276
284
285
293
294
192
191
190
32
30
33
31
29
RESERVED
95
93
91
89
298
96
94
92
90
198
197
196
232
241
250
259
268
277
286
295
195
194
193
36
34
39
37
35
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
71
69
67
65
63
61
59
57
55
53
51
49
47
45
43
402538
41
RESERVED
72
RESERVED
70
68
66
64
62
60
58
56
54
52
50
48
46
44
42
297
VBAT_RF
VBAT_RF
GND
GND
SPI_CS
SPI_MOSI
GND
GND
PCM_CLK
PCM_SYNC
GND
GPIO 2
GPIO 1
UART1_RTS
GND
SDC2_CL K
SDC2_CM D
SDC2_DATA0
SDC2_DATA2
GND
I2C1_SCL
VBAT_RF
VBAT_RF
GND
GND
SPI_CL K
SPI_MISO
GND
RESERVED
RESERVED
GND
PCM_OUT
PCM_IN
GND
GPIO 3
UART1_TXD
UART1_RXD
UART1_CTS
GND
SDC2_INS_DET
SDC2_DATA1
SDC2_DATA 3
SDC2_VDD
GND
I2C1_SDA
GND
GND
VDD_MDIO
EPHY_RST_N
PWRKEY
BT_EN
RESET_N
PM_ENABLE
Powe r Pin s GND Pins Signa l Pins RESV RVED P ins
MDIO Pins
ADC Pins
COEX_UART Pins SGMII Pins
GND
RESERVED
RESERVED
SGMII_R X_P
GND
SGMII_MD ATA
SGMII_MC LK
EPHY_IN T_N
SGMII_R X_M
SDIO Pin s
UART2 Pins
RESERVED
GND
GND
RESERVED
SDC1_CMD
SGMII_T X_P
GND
SGMII_T X_M
GND
RESERVED
SDC1_DATA0
SDC1_CLK
(U)SI M Pins
UART1 Pins
SPI Pins
RESERVED
SDC1_DATA1
GND
RESERVED
SDC1_DATA2
USIM_GND
USIM_VDD
SDC1_DATA3
USIM_PRESENCE
RESERVED
USIM_RST
USIM_CLK
GND
RESERVED
USB_VBUS
GND
GND
USIM_DATA
USB Pins
Debug UART Pins
Audio Pins
RESERVED
USB_DM
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
GND
IIC Pi ns
SD Pin s
GPIO Pi ns
PCM Pins
RESERVED
USB_DP
GND
Figure 2: Pin Assignment (Top View)
NOTES
1. Pins 59, 65, 67, 144~147, 149 and 159 cannot be pulled up before power-up. Pin 80 cannot be pulled
down before power-up.
2. PWRKEY (pin 2) output voltage is 0.8V because of the diode drop in the Qualcomm chipset.
AG35-QuecOpen_Hardware_Design 22 / 137
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AG35-Quecopen
Hardware Design
3. GND pins 215~299 should be connected to ground in the design.
4. Keep all RESERVED pins and unused pins unconnected.
3.3. Pin Description
The following tables show the pin definition of AG35-Quecopen module, as well as the alternate functions
of multiplexing pins.
Table 3: I/O Parameters Definition
Typ e Description
AI Analog input
AO Analog output
B Bidirectional digital with CMOS input
BH High-voltage tolerant bidirectional digital with CMOS input
DI Digital input
DO Digital output
H High level
IO Bidirectional
L Low level
OC Open collector
OD Open drain
PD Pull down
PI Power input
PO Power output
PU Pull up
AG35-QuecOpen_Hardware_Design 23 / 137
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AG35-Quecopen
Hardware Design
Table 4: Pin Description
Power Supply
Pin Name Pin No. I/O Description DC Characteristics Comment
VBAT_BB 155, 156 PI
VBAT_RF
85, 86,
87, 88
PI
VDD_EXT 168 PO
10, 13, 16,
17, 30, 31,
35, 39, 44,
45, 54, 55,
63, 64, 69,
70, 75, 76,
81~84,
89~94,
96~100,
102~106,
108~112,
GND
114,
Ground
116~118,
120~126,
128~131,
142, 148,
153, 154,
157, 158,
167, 174,
177, 178,
181, 184,
187, 191,
196~299
Power supply for
module’s baseband
part
Power supply for
module’s RF part
Provide 1.8V for
external circuit
Vmax=4.3V
Vmin=3.3V
Vnorm=3.8V
Vmax=4.3V
Vmin=3.3V
Vnorm=3.8V
Vnorm=1.8V
I
max=50mA
O
It must be able to
provide sufficient
current up to 0.8A.
It must be able to
provide sufficient
current up to 1.8A in a
transmitting burst.
Power supply for
external GPIO’s pull up
circuits.
Turn on/off
Pin Name Pin No. I/O Description DC Characteristics Comment
PWRKEY 2 DI
Turn on/off the
module
V
max=2.1V
IH
V
min=1.3V
IH
The output voltage is
0.8V because of the
AG35-QuecOpen_Hardware_Design 24 / 137
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AG35-Quecopen
Hardware Design
VILmax=0.5V diode drop in the
Qualcomm chipset.
max=2.1V
V
RESET_N 1 DI Reset the module
Emergency
SHDN_N 176 DI
shutdown for the
module
IH
V
min=1.3V
IH
V
max=0.5V
IL
max=2.1V
V
IH
V
min=1.3V
IH
V
max=0.5V
IL
Internally pulled up to
1.8V. Active low.
(U)SIM Interface
Pin Name Pin No. I/O Description DC Characteristics Comment
USIM_GND 24
USIM_
PRESENCE
25 DI
USIM_VDD 26 PO
USIM_CLK 27 DO
USIM_RST 28 DO
USIM_DATA 29 IO
Specified ground for
(U)SIM card
(U)SIM card
insertion detection
Power supply for
(U)SIM card
Clock signal of
(U)SIM card
Reset signal of
(U)SIM card
Data signal of
(U)SIM card
V
min=-0.3V
IL
V
max=0.6V
IL
V
min=1.2V
IH
V
max=2.0V
IH
For 1.8V (U)SIM:
Vmax=1.9V
Vmin=1.7V
For 3.0V (U)SIM:
Vmax=3.05V
Vmin=2.7V
IOmax=50mA
For 1.8V (U)SIM:
V
max=0.45V
OL
V
min=1.35V
OH
For 3.0V (U)SIM:
max=0.45V
V
OL
V
min=2.55V
OH
For 1.8V (U)SIM:
V
max=0.45V
OL
V
min=1.35V
OH
For 3.0V (U)SIM:
max=0.45V
V
OL
V
min=2.55V
OH
For 1.8V (U)SIM:
VILmax=0.6V
V
min=1.2V
IH
Connect to ground of
(U)SIM card
connector.
1.8V power domain.
If unused, keep it
open.
Either 1.8V or 3.0V is
supported by the
module automatically.
AG35-QuecOpen_Hardware_Design 25 / 137
LTE Module Series
AG35-Quecopen
Hardware Design
VOLmax=0.45V
VOHmin=1.35V
For 3.0V (U)SIM:
max=1.0V
V
IL
V
min=1.95V
IH
V
max=0.45V
OL
V
min=2.55V
OH
USB Interface
Pin Name Pin No. I/O Description DC Characteristics Comment
USB_VBUS 32 PI
USB_DM 33 IO
USB_DP 34 IO
USB connection
detection
USB differential data
bus (-)
USB differential data
bus (+)
Vmax=5.25V
Vmin=3.0V
Vnorm=5.0V
Compliant with USB
2.0 standard
specification.
Compliant with USB
2.0 standard
specification.
Maximum current:
1mA.
Require differential
impedance of 90Ω.
Status Indication
Pin Name Pin No. I/O Description DC Characteristics Comment
STATUS 171 OD
NET_
STATUS
170 DO
Indicate the
module’s operation
status
Indicate the
module’s network
activity status
The drive current
should be less than
0.15mA.
V
min=1.35V
OH
V
max=0.45V
OL
Require external
pull-up. If unused,
keep it open.
1.8V power domain.
If unused, keep it
open.
UART1 Interface
Pin Name Pin No. I/O Description DC Characteristics Comment
1.8V power domain.
If unused, keep it
open.
1.8V power domain.
If unused, keep it
open.
1.8V power domain.
If unused, keep it
open.
UART1_CTS 56 DO DTE clear to send
UART1_RTS 57 DI DTE request to send
UART1_RXD 58 DI Receive data
V
max=0.45V
OL
V
min=1.35V
OH
V
min=-0.3V
IL
V
max=0.6V
IL
V
min=1.2V
IH
V
max=2.0V
IH
min=-0.3V
V
IL
V
max=0.6V
IL
V
min=1.2V
IH
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AG35-Quecopen
Hardware Design
VIHmax=2.0V
1.8V power domain.
If unused, keep it
open.
UART1_TXD 60 DO Transmit data
V
max=0.45V
OL
V
min=1.35V
OH
UART2 Interface
Pin Name Pin No. I/O Description DC Characteristics Comment
1.8V power domain.
If unused, keep it
open.
1.8V power domain.
If unused, keep it
open.
1.8V power domain.
If unused, keep it
open.
1.8V power domain.
If unused, keep it
open.
UART2_TXD 163 DO Transmit data
UART2_CTS 164 DO DTE clear to send
UART2_RXD 165 DI Receive data
UART2_RTS 166 DI DTE request to send
V
max=0.45V
OL
V
min=1.35V
OH
V
max=0.45V
OL
V
min=1.35V
OH
V
min=-0.3V
IL
V
max=0.6V
IL
V
min=1.2V
IH
V
max=2.0V
IH
V
min=-0.3V
IL
V
max=0.6V
IL
V
min=1.2V
IH
V
max=2.0V
IH
Debug UART Interface
Pin Name Pin No. I/O Description DC Characteristics Comment
1.8V power domain.
If unused, keep it
open.
1.8V power domain.
If unused, keep it
open.
DBG_TXD 71 DO Transmit data
DBG_RXD 72 DI Receive data
V
max=0.45V
OL
V
min=1.35V
OH
V
min=-0.3V
IL
V
max=0.6V
IL
V
min=1.2V
IH
V
max=2.0V
IH
ADC Interfaces
Pin Name Pin No. I/O Description DC Characteristics Comment
ADC0 173 AI
ADC1 175 AI
General purpose
analog to digital
converter interface
General purpose
analog to digital
converter interface
Voltage range:
0.3V to VBAT_BB
Voltage range:
0.3V to VBAT_BB
If unused, keep it
open.
If unused, keep it
open.
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AG35-Quecopen
Hardware Design
ADC2 172 AI
General purpose
analog to digital
converter interface
Voltage range:
0.1V to 1.7V
If unused, keep it
open.
Audio Interface (Optional)
Pin Name Pin No. I/O Description DC Characteristics Comment
SPK2_P 132 AO
SPK2_N 133 AO
SPK1_P 134 AO
SPK1_N 135 AO
MICBIAS 136 AO
MIC2_N 137 AI
Earphone analog
output 2 (+)
Earphone analog
output 2 (-)
Earphone analog
output 1 (+)
Earphone analog
output 1 (-)
Bias voltage output
for microphone
Microphone analog
input 2 (-)
Vmax=1.55V
Vmin=1.5V
Vnorm=1.525V
If unused, keep it
open.
If unused, keep it
open.
If unused, keep it
open.
If unused, keep it
open.
If unused, keep it
open.
If unused, keep it
open.
MIC2_P 138 AI
MIC1_N 139 AI
MIC1_P 140 AI
Microphone analog
input 2 (+)
Microphone analog
input 1 (-)
Microphone analog
input 1 (+)
AGND 141 Analog ground
If unused, keep it
open.
If unused, keep it
open.
If unused, keep it
open.
If unused, keep it
open.
PCM Interface
Pin Name Pin No. I/O Description DC Characteristics Comment
1.8V power domain.
In master mode, it is
an output signal. In
slave mode, it is an
input signal.
If unused, keep it
open.
PCM_SYNC 65 IO
PCM data frame
synchronization
signal
V
max=0.45V
OL
V
min=1.35V
OH
V
min=-0.3V
IL
V
max=0.6V
IL
V
min=1.2V
IH
V
max=2.0V
IH
V
min=-0.3V
PCM_IN 66 DI PCM data input
IL
V
max=0.6V
IL
V
min=1.2V
IH
V
max=2.0V
IH
1.8V power domain.
If unused, keep it
open.
AG35-QuecOpen_Hardware_Design 28 / 137
LTE Module Series
AG35-Quecopen
Hardware Design
1.8V power domain.
In master mode, it is
an output signal. In
slave mode, it is an
input signal.
If unused, keep it
open.
1.8V power domain.
If unused, keep it
open.
1.8V power domain.
If unused, keep it
open.
PCM_CLK 67 IO PCM clock
PCM_OUT 68 DO PCM data output
MCLK 152 DO Output 12.288MHZ
VOLmax=0.45V
V
min=1.35V
OH
V
min=-0.3V
IL
V
max=0.6V
IL
V
min=1.2V
IH
V
max=2.0V
IH
V
max=0.45V
OL
V
min=1.35V
OH
V
max=0.45V
OL
V
min=1.35V
OH
I2C1 Interface (for Codec Configuration by Default)
Pin Name Pin No. I/O Description DC Characteristics Comment
V
max=0.45V
I2C1_SDA 42 IO
I2C1 serial data.
Used for external
codec.
OL
V
min=1.35V
OH
V
min=-0.3V
IL
V
max=0.6V
IL
V
min=1.2V
IH
V
max=2.0V
IH
External pull-up
resistor is required.
1.8V only.
If unused, keep it
open.
External pull-up
resistor is required.
1.8V only.
If unused, keep it
I2C1_SCL 43 DO
I2C1 serial clock.
Used for external
codec.
V
max=0.45V
OL
V
min=1.35V
OH
open.
I2C2 Interface
Pin Name Pin No. I/O Description DC Characteristics Comment
V
max=0.45V
OL
External pull-up
resistor is required.
1.8V only. If unused,
keep it open.
I2C2_SDA 73 IO I2C2 serial data
V
min=1.35V
OH
V
min=-0.3V
IL
V
max=0.6V
IL
V
min=1.2V
IH
V
max=2.0V
IH
External pull-up
I2C2_SCL 74 DO I2C2 serial clock
max=0.45V
OL
V
min=1.35V
OH
resistor is required.
1.8V only. If unused,
V
keep it open.
SDIO2 Interface (for eMMC & SD Card)
AG35-QuecOpen_Hardware_Design 29 / 137
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