ACIAccessory Control Interface
ADCAnalog Digital Connector
ARMAdvanced RISC Machines
ASIC Application Specific Integrated Circuit
ATRAnswer To Reset
BB Baseband
BL-5CBattery type.
BSIBattery Size Indicator
CbusControl bus (internal phone interface between UPP-UEM)
CCSCustomer Care Service
CTICover Type Indicator
CTSIClock Timing Sleep and Interrupt
DbusDSP controlled bus (Internal phone interface between UPP-UEM)
DCDirect Current
DCT4.0Digital Core Technology, generation 4.0
DSP Digital Signal Processor
DUT Device under test
EADExternal Accessory Detection
EMC Electro Magnetic Compatibility
ESD Electro Static Discharge
FbusFast Bus, asynchronous message bus connected to DSP (commu-
nications bus)
FCIFunctional cover interface
FPCFlexible printed circuit
FR Full Rate
GENIOGeneral Purpose Input/Output
GSMG lobal System Mobile
HW Hardware
IF Interface
IHF Integrated Hands Free
IMEI International Mobile Equipment Identity
LCD Liquid Crystal Display
LDOLow Drop Out
LED Light Emitting Diode
Li-IonLithium Ion battery
LPRF Low Power Radio Frequency
LynxBattery type
MALTMedium And Loud Transducer
MbusAsynchronous message bus connected to MCU (phone control
interface). Slow message bus for control data.
MCUMicro Controller Unit
NO_SUPPLYUEM state where UEM has no supply what so ever
NRTNokia Ringing Tones
NTCNegative temperature Coefficient, temperature sensitive resistor
used as a temperature sensor.
PAPower Amplifier (RF)
PDMPulse Density Modulation
PDRAMProgram/Data RAM
Phoenix SW tool of DCT4.x
PLLPhase locked loop
PnPHFPlug and Play Handsfree
PUPGeneral Purpose IO ( PIO), USARTS and Pulse Width Modulators
PWB Printed Wired Board
PWR_OFFUEM state where phone is off
PWRONXSignal from power on key.
R&DResearch and development
RESETUEM state where regulators are enabled
RTCUEM internal Real Time Clock
SARAMSingle Access RAM
SIM Subscriber Identification Module
SLEEPUEM power saving state controlled by UPP
SPRStandard Product Requirements
SRAMStatic RAM
STISerial Trace Interface
SW Software
TBSFThrough the Board Side Firing
TITexas Instruments, American company
UEMUniversal Energy Management
UI User Interface
UPPUniversal Phone Processor
VBATMain battery voltage
VCHARCharger input voltage
VCHARDETCharger detection threshold level
VMSTR+,
This document specifies the baseband module for the Nokia 2300 phone. The baseband module includes the baseband engine chipset, the UI components and the acoustical parts for the
transceiver.
Nokia 2300 is a hand-portable dual band 900/1800MHz phone, featuring DCT4 generation
baseband (UEM/UPP) and RF (MJOELNER) circuitry. Nokia 2300 is closely related to Nokia
3510 and 3510i
Technical Summary
The baseband module contains 2 main ASICs named UEM and UPP. The baseband module
furthermore contains a Flash IC of 16Mbit. The baseband is based on the DCT4 engine program.
Figure 1: Nokia 2300 baseband block diagram
PA Supply
RF Supplies
RF RX/TX
SIM
EAR
MIC
LM4890
IHF
Battery
Baseband
UEM
DLIGHT
SLEEPCLK
Supplies
UI
32kHz
CBUS/
DBUS
BB
Mjoelner
26MHz
UPP
RFBUS
MEMADDA
M
VIBRA
External Audio
Charger connection
DCT4 Janette connector
MBus/FBus
AM/FM
Radio
FLASH
The UEM supplies both the baseband module as we ll as the RF module with a series of voltage
regulators. Both, the RF and baseband modules are supplied with regulated voltages of 2.78V
and 1.8V. The UEM includes 6 linear LDO (low drop-out) regulators for baseband and 7 regulators for RF. The UEM is furthermore supplying the baseband SIM interface with a program-
mable voltage of either 1.8 V or 3.0 V. The core of the UPP is supplied with a programmable
voltage of 1.0 V, 1.3 V, 1.5 V or 1.8 V.
The UPP operates from a 26MHz clock, coming from the RF ASIC MJOELNER, the 26 MHz
clock is internally divided by two, to the nominal system clock of 13MHz. The DSP and MCU
contain phase locked loop (PLL) clock multipliers, which can multiply the system frequency.
The UEM contains a real-time clock, sliced down from the 32768 Hz crystal oscillator. The
32768 Hz clock is fed to the UPP as a sleep clock.
Communication between the UEM and the UPP is carried out via the bi-directional serial buses
CBUS and DBUS. The CBUS is controlled by the MCU and it operates at a speed of 1 MHz set
by SW. The DBUS is controlled by the DSP and it operates at a speed of 13 MHz. Both processors are located in the UPP.
The UEM ASIC mainly handles the interface between the baseband and the RF section. The
UEM provides A/D and D/A conversion of the in-phase and quadrature receive and transmit
signal paths and also A/D and D/A conversions of received and transmitted audio signals to
and from the user interface. The UEM supplies the analog signals to RF section according to
the UPP DSP digital control.
The RF ASIC MJOELNER is controlled through the UPP RFBUS serial interface. There are
also separate signals for PDM coded audio. Digital speech processing is handled by the DSP
inside the UPP ASIC. The UEM is a dual voltage circuit, the digital parts are running from the
baseband supply 1.8V and the analog parts are running from the analog supply 2.78V, VBAT
is directly used by some blocks also.
The baseband supports both internal and external microphone inputs and speaker outputs. Input and output signal source selection and gain control is carried out by the UEM according to
control messages from the UPP.
Nokia 2300 has two external serial control interfaces: FBUS and MBUS. These buses can be
accessed only through the production test pattern as described in section 4.
The transceiver module is implemented on 6 layer selective OSP/Gold coated PWB.
Modes of Operation
Nokia 2300 baseband engine has six different operating modes (in normal mode):
•No_Supply
•Power_off
•Acting_Dead
•Active
•Sleep
•Charging
Additionally, two modes exist for product verification: 'test mode' and 'local mode'.
In No_Supply mode, the phone has no supply voltage. This mode is due to disconnection of
the main battery or low battery voltage level.
The phone is exiting from No_Supply mode when sufficient battery voltage level is detected.
Battery voltage can rise either by connecting a new battery with VBAT > V
ing charger and charging the battery above V
mstr+
.
or by connect-
mstr+
Power_off
In this state the phone is powered off, but supplied. The VRTC regulator is active (enabled)
having supply voltage from the main battery. Note that the RTC status in the PWR_OFF mode
depends on whether RTC was enabled or not when entering PWR_OFF. From the Power_off
mode the UEM enters the RESET mode (after 20ms delay), if any of the following statements
is true (logical OR –function):
•Power_on button detected (PWROFFX)
•charger connection detected (VCHARDET)
•RTC_ALARM detected
The phone enters the POWER_OFF mode from all the other modes except NO_SUPPLY if the
internal watchdog elapses.
Acting Dead
If the phone is off when the charger is connected, the phone is powered on but enters a state
called ”Acting Dead”. In this mode no RF parts are powered. To the user, the phone acts as if
it was switched off. A battery-charging alert is given and/or a battery charging indication on the
display is shown to acknowledge the user that the battery is being charged.
Active
In the active mode the phone is in normal operation, scanning for channels, listening to a base
station, transmitting and processing information. There are several sub-states in the active
mode depending on if the phone is in burst reception, burst transmission, if DSP is working etc.
In active mode SW controls the RF regulators.
Table 1: Regulator controls
RegulatorNOTE
VFLASH1Enabled; Low Iq mode during sleep
VFLASH2Enabled; Disabled in sleep mode; Used for FM radio
VANAEnabled; Disabled in sleep mode
VIOEnabled; Low Iq mode during sleep
VCOREEnabled; Low Iq mode during sleep
VSIMControlled by register writing.
VR1A Enabled; Disabled in sleep mode
VR1B Not used in Nokia 2300, disabled
VR2Controlled by register writing; Enabled in sleep mode
VR3Enabled; Disabled in sleep mode
VR4Not used in Nokia 2300, disabled
VR5Enabled; Disabled in sleep mode
VR6Enabled; Disabled in sleep mode
VR7Enabled; Disabled in sleep mode
IPA1-2Not used in Nokia 2300, disabled
Sleep mode
The sleep mode is entered when both MCU and DSP are in stand-by mode. Sleep is controlled
by both processors. When SLEEPX low signal is detected, the UEM enters SLEEP mode.
VCORE, VIO and VFLASH1 regulators are put into low quiescent current mode. All RF regulators, except VR2, are disabled in SLEEP. When SLEEPX=1 is detected UEM enters ACTIVE
mode and all functions are activated.
The sleep mode is exited either by the expiration of a sleep clock counter in the UEM or by
some external interrupt, generated by a charger connection, key press, headset connection
etc.
In the sleep mode, the main oscillator (26MHz) is shut down and the 32kHz sleep clock oscillator is used as a reference clock for the baseband.
Charging
Charging can be performed in parallel with any other operating mode. A BSI resistor inside the
battery pack indicates the battery type/size. The resistor value corresponds to a spe cific battery
capacity and technology.
The battery voltage, temperature, size and current are measured by the UEM controlled by the
charging software running in the UPP.
The charging control circuitry (CHACON) inside the UEM controls the charging current delivered from the charger to the battery. Charging current is monitored by measuring the voltage
drop across a 220 mOhm resistor.
Following voltages are assumed as normal and extreme voltages for used battery:
Table 3: Battery voltage range
SignalMinNomMaxNote
VBAT3.21V3.80V4.39V
1
Vcoff+3.0V3.13.2HW off to on
Vcoff-2.7V2.8V2.9VHW on to off
Vmstr+2.0V2.1V2.2VUEM off to on
Vmstr-1.8V1.9V2.0VUEM on to off
Sw shutdown-3.1V-In Call
Sw shutdown-3.2V-In Idle
1
According to the GSM specifications, a GSM device with a Li- ion batte ry should work correctly
if it is powered by its nominal voltage +/-15%. The UEM hardware shutdown is from 3.10V
and below . The Energy Management of this ph one shut s the phon e down at 3.20V in orde r to
perform a correct shutdown of the phone. Above 3.20V + tolerances, at 3.21V, the phone is
still fullfilling all the GSM requirements. The nominal voltage is therefore set at 3.80V. This is
higher than the normal battery voltage and is only set so that the phone is fullfilling Type
Approval. Some of BB testing might be done on battery level.
During fast charging of an empty battery voltages between 4.20 and 4.60 might appear for a
short while.
VBATBattery voltage terminal.Battery calibration.
GNDBattery ground terminal.
BSIBattery size identification.Flash and local mode forcing.
Battery temperature is estimated by measurement in transceiver PWB with a separate NTC resistor.
Baseband – RF interface
The interface between the baseband and the RF can be divided into three categories:
•The digital interface from the UPP to the RF ASIC (Mjoelner). The serial
digital interface is used to control the operation of the different blocks in
the RF ASICs.
•The analogue interface between the UEM and RF. The analogue interface consists of RX and TX converter signals. The power amplifier control signal TXC and the AFC signal come from the UEM as well.
•Reference clock interface between Mjoelner and UPP which supplies
the 26Mhz system clock for the UPP.
Internal Signals and Connections
The tables below describe internal signals. The signal names can be found on the schematic
for the PWB.
Audio
Table 10: Internal microphone
SignalMinNomMaxConditionNote
MIC1P (Differential input P)-5mV-G=0dB1kΩ to MIC1B
(RC filtered by 220R/
4.7uF)
MIC1N (Differential input N)-5mV-G=0dB1kΩ to GND
MICB1 (Microphone Bias)2.0 V2.1 V2.25 VDC
External loading of MICB1--600uADC
Normal operation-25 ° C … +55 °CSpecifications fulfilled
Reduced performance-40 °C ..-25 °C
and +55 °C … +85 °C
No operation and/or
storage
< -40 °C or > +85 °C No storage or operation. An
Ambient
temperature
Remarks
attempt to operate may damage the phone permanently
Humidity
The Nokia 2300 BB module is not protected against water. Condensed or splashed water might
cause malfunction. Any submerge of the phone will cause permanent damag e. Long-term high
humidity, with condensation, will cause permanent damage because of corrosion.
Nokia 2300 is designed to support a fully differential external audio accessory connection. A
headset and PnPHF can be directly connected to the system connector. Detection of the different accessories is made in an analogue way by reading the DC voltage value of EAD converter.
Figure 3: Headset interface
2.7V
Hookint
/MBUS
EAD
Headint Headint
Mic_bias
HF
HFCM
UEM
MICB2
MIC2P
MIC2N
3...25k
Not all components are shown
Bottom
Connector
33N
1k0
1k0
0.3V
1.8V
2.1V
33N
0.8V
0.8V
MicGnd
Audio Internal
Earpiece
The earpiece selected is a 13 mm dynamic earpiece with a nominal impedance of 32 Ω (previously used for 3210, 3310, 6210, among others).
The earpiece is placed within the mechanical parts, e.g. C-cover and Light guide. The holes of
the A-cover and the choice of dust shield are made in a way to have the best transmission of
the sound, without having much impact on the sound waves and sound qualities.
The acoustic design involves a sandwich of five parts: Earmat, A-cover, C-cover, lightguideand D-cover.
On top of the lightguide there will be a metal frame (C-cover) that will protect the earpiece. The
C-cover will contain 5 acoustical holes and a double-sided gasket for sealing in the area over
the earpiece.
The front cover consists of two parts, an A-cover and an earmat.
The earpiece circuit includes only a few components:
•two 10 ohm in order to have a stable output
•an EMC filter
Figure 4: Earpiece interface
Placed in top of
PWB, near
earpiece
EARP
UEM
EARP
Placed near UEM
10
ohm
10
EARN
ohm
EARN
Microphone
Acoustical design
An omni directional microphone is used. The microphone is placed in the system connector
sealed in its rubber gasket. The sound port is provided in the system connector. This design is
well known from Nokia 3310. The only change done to the bottom connector is that the external
charger pads were removed.
Figure 5: Bottom connector
Sound port
opening
Microphone
boot
Electrical interface
Nokia 2300 uses a differential bias circuit, driven directly from the MICB1 bias output with external RC filters.
The RC filter (220 Ω, 4.7µF) is scaled to provide damping at 217 Hz. 217 Hz audible noise (TDMA).
The speaker has an external amplifier connected (a so-called boomer) to provide sufficient
power for an 8 Ω load. The boomer is implemented with a differential configuration on the input.
The inputs are wired to the headset connections HF and HFCM from UEM. These two outputs
can each deliver an output swing up to 1.6 Vpp before clipping occurs. HF and HFCM are 180
× out of phase.
Under normal conditions HF and HFCM will be used for downlink audio to the headset/car kit.
During headset/car kit usage, where the MIDI speaker is supposed not to be active, the MIDI
amplifier can be disabled by means of the shutdown pin, which is controlled by changing the
logic level on SHUTDOWN (managed by UPP). During sleep, keeping the shutdown pin "low"
also secures a minimum amount of stand-by current to be consumed.
The SHUTDOWN pin shall be timed so that GENIO14 isn't enabled until the DC level shift on
HF and HFCM have reached their permanent level (0.8 V
sounds in the MALT speaker. Furthermore, when a ringing tone is ending, SHUTDOWN shall
be disabled before the DC level on HF and HFCM changes again.
). This in order to remove click
DC
Table 16: Control of SHUTDOWN.
Accessory modeHF-output of UEMSHUTDOWN
In-coming callNo accessories connectedMIDI-tone routed to HF and
HFCM
Accessories connectedMIDI-tone routed to HF and
HFCM
Conversation
(non IHF)
Conversation
(IHF)
Sleep--Logic "Low"
No accessories connectedNo audio routed to HF and
HFCM
Accessories connectedDownlink routed to HF and
HFCM
No accessories used, or
headset connected
Car kit connectedNo audio routed to HF and
Downlink routed to HF and
HFCM
HFCM
SHUTDOWN is an active high input.
The amplification for the given boomer configuration will be equal to 18.5 dB.
Normal75Used for calculating the Capacity (BL5-C =
850mA)
Service3.23.33.4Pull-down resistor in battery. Used for fast
power-up in production (LOCAL mode), R/D
purposes or in after sales, 1% tolerance resistors shall be used.
Test6.76.86.9Pull-down resistor in battery, used in produc-
tion for testing purposes. 1% tolerance resistors shall be used.
Banned<3.2
Inside the battery, an over-temperature and an over-voltage protection circuit are present.
The BL-5C battery does not contain a temperature sensor. An external temperature sensor
(NTC resistor) is placed on the PWB to measure the temperature.
As the chipset and the bottom connector used by Nokia 2300 doesn’t support true stereo, the
stereo functionality from a radio point of view cannot be used efficiently for playing stereo over
headset.
The nominal output of the radio will be in the order of max. 86mVrms @ 22.5kHz swing, max.
190mVrms @ 50kHz swing, max. 280mVrms @ 75kHz swing. This outp ut is routed as a single
ended signal to MIC3P and internally in UEM routed to HF/HFCM (by means of an appropriate
routing that either amplifies or provides attenuation). From there, the radio signal is sent to the
headset and possibly also the IHF speaker, depending on the user’s choice.
The BB interface consist of the following lines:
Data and clock
•Bus_en (GENIO8)
The data direction is controlled by the edges of the Bus_en signal. Ris-
ing edge means reading from the chip, falling edge means writing data
into the chip.
•Data (GENIO 12)
•Data clk (GENIO 11)
Serial clock for data transfer, the rising edge clock the data into the chip
•Reference clock (GENIO 3)
The reference clock is 13 MHz.
The reference clock is only needed when the radio is active. This means
that data transfer can be made without having the reference clock
active. Using a reference clock of 13 MHz also indicates that the radio
will not work if the phone is in sleep modes where the RF reference is
turned off.
Audio
•Single ended line signal (Input is MIC3P)
Keyboard
The keyboard PWB layout consists of a grounded outer ring and an inner pad.
The power key is integrated in keypad. The following table shows the principles of the key-
All lines are configured as input, when there is no key pressed.
When a key is pressed, the specific line where the key is placed is pulled low. This genera tes
an interrupt to the MCU and the MCU now starts its scanning procedure.
When the key has been detected all the keypad-register inside the UPP is reset and it's ready
receiving new interrupt.
Display & Keyboard Backlight
LCD Backlight
LCD Backlight consists of 2 sidefirering white LED's which are placed on the display FPC beside the LCD area. They lit into the light guide where the light is distributed to generate sufficient backlight for the LCD & keyboard area.
Keyboard light
There is no dedicated keyboard light implemented. Keyboard light is provided by the LCD backlight.
LED driver circuit
The LED drivers for the LCD & Keyboard backlight are shown in the following figure.The driver
circuit is controlled by the UEM output pin [DLIGHT].
R307 defines the current through the LED’s. Dlight is used for switching on and off the driver.
The driver itself controls the current and is temperature compensated.
Figure 11: LED driver circuit for LCD and keyboard backlight
The LCD is a black and white 96x65 full dot matrix display. The LCD cell is part of the complete
LCD module, which includes C-cover, gasket, light guide, spring connector, transflector, LEDs
and earpiece.
Figure 12: LCD module
The LCD is powered from both V
V
for the driver chip.
IO
FLASH1
and VIO. V
FLASH1
is used for the boosting circuit and
Memory Module
The Nokia 2300 baseband memory module consists of external burst flash memory 2Mbyte
(16Mbit) (optional: 4Mbyte (32Mbit). The UPP contains internal SRAM with 2 Mbit.
SIM Interface
The whole SIM interface is located in the two ASICs, UPP and UEM.
The SIM interface in the UEM contains power up/down, port gating, card dete ct, data receiving,
ATR-counter, registers and level shifting buffers logic. The SIM interface is the electrical interface between the Subscriber Identity Module Card (SIM Card) and mobile phone (via UEM device).
The vibra is controlled from the UEM by a PWM (Pulse Wide Modulated) square wave signal.
In Nokia 2300 Duty cycle is 40.5% if the Vbat is less than 4.0 volts otherwise it will be set to
Production test pattern is placed on the engine PWB, for service and production purposes. The
same test pattern is used for after sales purposes as well.
Through MBUS or FBUS connections, the phone HW can be tested by PC software (Phoenix)
and production equipment (FLALI/FINUI/LABEL).
The testpads are listed in the schematic diagrams.
Connections to Baseband
The flash programming box, FPS8, is connected to the baseband using a galvanic connector
or test pads for galvanic connection. The UEM watchdog is disabled during flash programming
to prevent a hardware reset of the timer. The flash programming interface connects the flash
prommer to the UPP via the UEM and the connections correspond to a logic level of 2.7 V. The
flash prommer is connected to the UEM via the MBUS (bi-directional line), FBUS_TX, and
FBUS_RX. The programming interface connections between the UEM and the UPP constitute
the MBUS, FBUS_TX, and FBUS_RX lines. The interface also uses the BSI (Battery Size Indicator).
FLASH Interface
Flash programming in production is done through the production test pattern (J396) on the
PWB.
Table 19: Flash interface signals
SignalMinNomMaxNote
TX_D2.7V
0V
RX_D2.7V
0V
GND0V
SCK2.7V
0V
VPP0V12VFlash programming voltage
BSI0V2.7VBattery size indication. Falling edge
3.0V
3.0V
3.0V
required for flash programming.
FBUS Interface
FBUS is an asynchronous data bus having separate TX and RX signals. The default bit rate of
the bus is 115.2 kbit/s. FBUS is mainly used for controlling the phone in production. Typical
VFLASH1 is 2.78V
The MBUS interface is used for controlling the phone in R&D and CCS. It is a b i-directional serial bus between the phone and PC. In production, the phone initialisation is made using MBUS.
The default transmission speed is 9.6 kbit/s.
In the following general description the different parts is described at block level.
Receiver signal path
The signal from the antenna pad is routed to the RX/TX switch (Z700). If no control voltages
are present at VANT2 and VANT1, the switch works as a diplexer and the GSM900 signal is
passed through the RX/TX switch to the GSM-RX and the GSM1800 signal to PCS-RX.
VRX
RXIP
RXIM
RXQP
RXQM
VPLL
VCP
VVCO
VXO
REFOUT
VBB
TXIP/TXIM
TXQP/TXQM
VREF1
RESET_X
VTX
TXC
TXP
2
2
2 22 2
PWC
TXP
TXC
2
B
B
X
R
D
D
V
2
1/2
1/2
222
1/4
1/4
2
Mjoelner
BIQUAD
RBEXT
2,7k
LPF1
BBAMP
BBAMP
64/65
LOCNT
2
REFCNT
CTRL
SENSE
VDDTX
LPF1
NDIV
ADIV
RDIV
Hitachi PA:33k
Philips PA:56k
RFMD PA:82k
DCN1
AGC
AGC
DCN1
ϕ
LO
buffer
BIQUAD
DCN2
LPF2
DCN2
LPF2
charge
pump
Lock
detect
VDDPLL
VDDLO
VDDPRE
VDDCP
CPOUT
loop
filter
VDDXO
REFOU
Buffer
T
XTALM
26MHz
XTALP
VCCVCO1
VCCVCO2
VDDBBB
VDDDL
VDDDIG
2
2
VBEXT
RESETX
RFBUSCLK
3
RFBUSX
RFBUSDA
F
X
R
D
D
V
INPL
RX
GSM
TX
RX
Ant Switch
PCN
TX
SAW
RX900/850
SAW
RX1900
VANT1 / VANT2
2
INML
INPM
RX1800
INMM
INPH
INMH
RF
Controls
RF
Controls
From the RX/TX switch, the GSM900 signal is routed to the SAW filter (Z602). The purpose of
the SAW filter is to provide out-of band blocking immunity and to provide the LNA I Mjoelner
(N600) with a balanced signal. The front end of Mjoelner is divided into a LNA and a Pre-Gain
amplifier before the mixers.
The output from the mixer is fed to the baseband part of Mjoelner, where the signals are amplified in the BBAMP and lowpass filtered in LPF1 before the DC compensations circuits in
DCN1. The DCN1 output is followed by a controlled attenuator and a second lowpass filter
LPF2. The output from LPF2 is DC centered in DCN2 before being feed to the BB for demodulation.
The GSM1800 signal chain is similar to GSM900, the SAW filter is numbered Z601.
Transmitter signal path
The I/Q signal from the BB is routed to the modulators for both 900 and 1800 MHz. The output
of the modulators is either terminated in a SAW filter (Z603) for GSM900 or a balun for
GSM1800.
The signal is then amplified in the PA (N700) where the gain control takes place. The TX signal
from the couplers is fed to the RX/TX switch, used to select which signal to route to the antenna.
The PLL supplies Local Oscillator (LO) signals for the RX and TX mixers. In order to be able to
generate LO-frequencies for the required EGSM and PCN channels, a regular synthesizer circuit is used. All blocks for the PLL except for the VCO, reference X-tal and lopp filter is located
in the Mjoelner IC.
The reference frequency is generated by a 26 MHz Numerically controlled X-tal Oscillator
(NCXO), which is located in the Mjoelner IC. Only the X-tal is external. 26 MHz is supplied to
BB, where a divide-by-2 (located in the UPP IC) generates the BB-clock at 13 MHz. The reference is supplied to the reference divider (RDIV), where the frequency is divided by 65. The output of RDIV (400kHz) is used as a reference clock for the Phase Detector (
ϕ).
The PLL is a feedback control system controlling the phase and frequency of the LO signal.
Building blocks for the PLL include: Phase detector, Charge Pump, Voltage Controlled Oscillator (VCO) and loop filter. As mentioned earlier, only the VCO and loop filter is external to the
Mjoelner IC.
The VCO (G600) is the component that actually generates the LO frequency. Based on the
control voltage input, the VCO generates a single-enede RF output. The signal is then differentiated through a balun. The signal is fed to the Pre-scaler and N-divider in Mjoelner, these 2
blocks will together divide the frequency by a ratio based on the selected channel.
The divider output is supplied to the phase detector, which compares the freque ncy and phase
of the 400 kHz reference clock. Based on this comparison, the phase detector controls the
charge pump to either charge or discharge the capacitors in the loop filter. By charging/discharging the loop filter, the control voltage to the VCO changes and the LO frequency will
change. Therefore the PLL keeps the LO frequency locked to the 26 MHz NCXO frequency.
The loop filter consists of the following components: C639-C640-C641 and R618-R619.
The PLL is operating at twice the channel center frequency when transmitting or receiving in
the GSM1800 band. For the GSM900 band the PLL is operating at 4 times the channel frequency. Therefore divide-by-2 and divide-by-4 circuits are inserted between the PLL and output and
the LO input for the GSM900 and GSM1800 mixers.
ItemEGSM900GSM1800
Receive frequency range925…960 MHz1805…1880MHz
Transmit frequency range880…915 MHz1710…1785MHz
Duplex spacing45 MHz95 MHz
Channel spacing200 kHz
Number of channels174374
Power class4 (2 W peak)1 (1 W peak)
Number of power levels1516