NEC UPA1811GR-9JG Datasheet
DATA SHEET
MOS FIELD EFFECT TRANSISTOR
P-CHANNEL MOS FIELD EFFECT TRANSISTOR
FOR SWITCHING
PA1811
µµµµ
DESCRIPTION
The µPA1811 is a switching device which can be
driven directly by a 2.5-V power source.
The µPA1811 features a low on-state resistance and
excellent switching characteristics, and is suitable for
applications such as power switch of portable machine
and so on.
FEATURES
Can be driven by a 2.5-
•
Low on-state resistance
•
DS(on)1
R
= 75 mΩ MAX. (VGS = –4.5 V, ID = –2.0 A)
DS(on)2
R
= 80 mΩ MAX. (VGS = –4.0 V, ID = –2.0 A)
DS(on)3
R
= 120 mΩ MAX. (VGS = –2.5 V, ID = –2.0 A)
V power source
ORDERING INFORMATION
PART NUMBER PACKAGE
PA1811GR-9JG Power TSSOP8
µ
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Drain to Source Voltage V
Gate to Source Voltage V
••••
Drain Current (DC) I
Drain Current (pulse)
Total Power Dissipation
Channel Temperature T
Storage Temperature T
Note1
Note2
DSS
GSS
D(DC)
D(pulse)
I
P
ch
stg
−
T
–55 to +150 °C
PACKAGE DRAWING (Unit : mm)
85
14
3.15 ±0.15
3.0 ±0.1
0.65
0.27
–20 V
12/+6 V
±4.0 A
±16 A
2.0 W
150 °C
+0.03
–0.08
0.8 MAX.
1, 5, 8 :Drain
2, 3, 6, 7: Source
4 :Gate
±0.055
0.145
0.10 M
1.2 MAX.
1.0±0.05
0.25
+5°
3°
–3°
0.1±0.05
6.4 ±0.2
4.4 ±0.1
0.5
0.6
1.0 ±0.2
0.1
EQUIVALENT CIRCUIT
Drain
Body
Gate
Gate
Protection
Diode
Source
Diode
+0.15
–0.1
Notes 1.
Remark
PW ≤ 10 µs, Duty Cycle ≤ 1 %
2.
Mounted on ceramic substrate of 5000 mm2 x 1.1 mm
The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage
exceeding the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. D11820EJ1V0DS00 (1st edition)
Date Published January 2000 NS CP(K)
Printed in Japan
The mark
••••
shows major revised points.
©
1996, 2000
ELECTRICAL CHARACTERISTICS (TA = 25 °C)
CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
µµµµ
PA1811
Zero Gate Voltage Drain Current I
Gate Leakage Current I
••••
Gate Cut-off Voltage V
••••
Forward Transfer Admittance | yfs |VDS = –10 V, ID = –2.0 A2.56.8S
Drain to Source On-state Resi stance R
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Turn-on Delay Time t
Rise Time t
Turn-off Delay Time t
Fall Time t
Total Gate Charge Q
Gate to Source Charge Q
Gate to Drain Charge Q
Diode Forward Voltage V
Reverse Recovery Time t
Reverse Recovery Charge Q
DSS
GSS
GS(off)VDS
DS(on)1VGS
DS(on)2VGS
R
DS(on)3VGS
R
iss
oss
rss
d(on)
r
d(off)
f
G
GS
GD
F(S-D)IF
rr
rr
VDS = –20 V, VGS = 0 V –10
VGS = ±12 V, VDS = 0 V±10
A
µ
A
µ
= –10 V, ID = –1 mA –0.5 –0.9 –1.5 V
= –4.5 V, ID = –2.0 A4275m
= –4.0 V, ID = –2.0 A4680m
= –2.5 V, ID = –2.0 A 73 120 m
Ω
Ω
Ω
VDS = –10 V 1160 pF
VGS = 0 V 680 pF
f = 1 MHz 210 pF
VDD = –10 V40ns
ID = –2.0 A 100 ns
GS(on)
V
= –4.0 V90ns
RG = 5
Ω
60 ns
VDD = –10 V36nC
ID = –4.0 A5nC
VGS = –4.0 V16nC
= 4.0 A, VGS = 0 V0.74V
IF = 4.0 A, VGS = 0 V
di/dt = 100 A/
S
µ
77 ns
69 nC
TEST CIRCUIT 1 SWITCHING TIME
D.U.T.
L
R
R
PG.
GS
(−)
V
0
τ = 1 s
µ
Duty Cycle ≤ 1 %
G
V
DD
τ
V
GS
Wave Form
I
D
Wave Form
TEST CIRCUIT 2 GATE CHARGE
D.U.T.
V
GS
(−)
10 %
0
I
90 %
D
(−)
10 %
0
t
d(on)
r
t
on
t
90 %
V
GS
(on)
PG.
90 %
I
D
t
d(off)
10 %
t
f
t
off
IG = −2 mA
50 Ω
R
L
V
DD
2
Data Sheet D11820EJ1V0DS00
••••
TYPICAL CHARACTERISTICS (TA = 25
µµµµ
PA1811
C)
°°°°
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
100
80
60
40
dT - Derating Factor - %
20
0
30 60 90 120 150
TA - Ambient Temperature -
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
−16
Pulsed
V
GS
= −10 V
−12
−8
- Drain Current - A
D
I
−4
−4.5 V
˚C
−4.0 V
FORWARD BIAS SAFE OPERATING AREA
−100
Limited
R
(@V
DS(on)
4.0
−
=
GS
−10
−1
- Drain Current - A
D
I
−0.1
TA = 25 ˚C
Single Pulse
Mounted on Ceramic
Substrate of 5000 mm x 1.1 mm
−0.01
−0.1
V
TRANSFER CHARACTERISTICS
−100
VDS = −10 V
−10
−1
−0.1
- Drain Current - A
D
I
−0.01
I
I
D(DC)
D(pulse)
2
V)
−1
DS
- Drain to Source Voltage - V
PW
10
ms
100 ms
DC
−10 −100
= 125˚C
A
T
75˚C
25˚C
−
25˚C
=
1 ms
0
−0.2
V
GATE TO SOURCE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
−1.4
VDS = −10 V
I
D = −1 mA
−0.4
DS
- Drain to Source Voltage - V
−0.6
−1.2
−1
−0.8
−0.6
−0.4
VGS(off) - Gate to Source Cut-off Voltage - V
−50
ch - Channel Temperature - ˚C
T
50 1000
−0.8 −1
150
−0.001
0 −1 −2 −3
VGS - Gate to Sorce Voltage - V
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
100
VDS = −10 V
TA = −25 C
25 C
10
75 C
125 C
1
| - Forward Transfer Admittance - S
fs
| y
0.1
−1
ID - Drain Current - A
−10 −100−0.1
Data Sheet D11820EJ1V0DS00
3
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