NEC UPA1810GR-9JG Datasheet

DATA SHEET

MOS FIELD EFFECT TRANSISTOR

P-CHANNEL MOS FIELD EFFECT TRANSISTOR

FOR SWITCHING

PA1810

µµµµ

DESCRIPTION

The µPA1810 is a switching device which can be
driven directly by a 2.5 V power source.
The µPA1810 features a low on-state resistance and
excellent switching characteristics, and is suitable for
applications such as power switch of portable machine
and so on.

FEATURES

Can be driven by a 2.5

•

Low on-state resistance

•

DS(on)1

R

= 55 mΩ MAX. (VGS = –4.5 V, ID = –2.0 A)

DS(on)2

R

= 60 mΩ MAX. (VGS = –4.0 V, ID = –2.0 A)

DS(on)3

R

= 100 mΩ MAX. (VGS = –2.5 V, ID = –2.0 A)

V power source

ORDERING INFORMATION

PART NUMBER PACKAGE

PA1810GR-9JG Power TSSOP8

µ

ABSOLUTE MAXIMUM RATINGS (TA = 25°C)

Drain to Source Voltage V
Gate to Source Voltage V
Drain Current (DC) I
Drain Current (pulse)
Total Power Dissipation

Note1

Note2

Channel Temperature T
Storage Temperature T

DSS

GSS

D(DC)

D(pulse)

I

P

ch

stg

T

85

14

3.15 ±0.15

3.0 ±0.1

0.65

0.27

–12 V

10/+5 V

−

±4.0 A

±16 A

2.0 W

150 °C

–55 to +150 °C

PACKAGE DRAWING (Unit : mm)

+0.03
–0.08

0.8 MAX.

1, 5, 8 :Drain
2, 3, 6, 7: Source
4 :Gate

±0.055

0.145

0.10 M

1.2 MAX.

1.0±0.05

0.1±0.05

6.4 ±0.2

4.4 ±0.1

+5°

3°

–3°

EQUIVALENT CIRCUIT

Drain

Gate

Gate
Protection
Diode

Source

0.5

0.6

1.0 ±0.2

Body
Diode

0.25

+0.15
–0.1

0.1

Notes 1.

Remark

PW ≤ 10 µs, Duty Cycle ≤ 1 %

2.

Mounted on ceramic substrate of 5000 mm2 x 1.1 mm

The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage
exceeding the rated voltage may be applied to this device.

The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.

Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.

Document No. D11819EJ1V0DS00 (1st edition)
Date Published June 1999 NS CP(K)
Printed in Japan

©

1996, 1999

ELECTRICAL CHARACTERISTICS (TA = 25 °C)

CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT

µµµµ

PA1810

Zero Gate Voltage Drain Current I
Gate Leakage Current I
Gate Cut-off Voltage V

DSS

VDS = –12 V, VGS = 0 V –10

GSS

VGS = ±10 V, VDS = 0 V±10

GS(off)VDS

= –10 V, ID = –1 mA –0.5 –0.8 –1.5 V

A

µ

A

µ

Forward Transfer Admittance | yfs |VDS = –10 V, ID = –2.0 A2.58.5S
Drain to Source On-state Resi stance R

Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Turn-on Delay Time t
Rise Time t
Turn-off Delay Time t
Fall Time t
Total Gate Charge Q
Gate to Source Charge Q
Gate to Drain Charge Q
Diode Forward Voltage V
Reverse Recovery Time t
Reverse Recovery Charge Q

DS(on)1VGS

DS(on)2VGS

R

DS(on)3VGS

R

iss

oss

rss

d(on)

r

d(off)

f

G

GS

GD

F(S-D)IF

rr

rr

= –4.5 V, ID = –2.0 A4155m
= –4.0 V, ID = –2.0 A4360m
= –2.5 V, ID = –2.0 A 71 100 m

Ω
Ω
Ω

VDS = –10 V 1100 pF
VGS = 0 V 750 pF
f = 1 MHz 240 pF
VDD = –10 V40ns
ID = –2.0 A 100 ns

GS(on)

V

= –4.0 V90ns

RG = 5

Ω

70 ns
VDD = –10 V35nC
ID = –4.0 A5nC
VGS = –4.0 V16nC

= 4.0 A, VGS = 0 V0.75V

IF = 4.0 A, VGS = 0 V
di/dt = 100 A/

S

µ

50 ns

35 nC

TEST CIRCUIT 1 SWITCHING TIME TEST CIRCUIT 2 GATE CHARGE

IG = 2 mA

50 Ω

D.U.T.

R

L

V

DD

PG.

V

GS

RG = 10 Ω

0

τ

τ = 1 s

µ

Duty Cycle ≤ 1 %

R

G

D.U.T.

V

L

R

V

Wave Form

V

DD

I

D

Wave Form

GS

GS

0

10 %

V

GS(on)

90 %

PG.

0

10 %

t

d(on)

90 %

t

on

90 %

I

D

t

r

t

d(off)

10 %

t

f

t

off

D

I

2

Data Sheet D11819EJ1V0DS00

µµµµ

PA1810

TYPICAL CHARACTERISTICS (TA = 25

DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA

100

80

60

40

dT - Derating Factor - %

20

0

−100

−10

−1

−0.1

- Drain Current - A

D

I

−0.01

30 60 90 120 150

TA - Ambient Temperature -

TRANSFER CHARACTERISTICS

VDS = −10 V

= 125˚C

A

T

−

75˚C
25˚C
25˚C

˚C

C)

°°°°

FORWARD BIAS SAFE OPERATING AREA

−100

ID(pulse)

V)

Limited

4.5

−10

−

=

DS(on)

R

GS

(@V

ID(DC)

−1

- Drain Current - A

D

I

−0.1

TA = 25 ˚C
Single Pulse
Mounted on Ceramic
Substrate of 50cm x 1.1mm

−0.01

−0.1

GATE TO SOURCE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE

−1.0
VDS = −10 V
I

D = −1 mA

2

−1

V

DS

- Drain to Source Voltage - V

PW

=

1 ms

10

ms

100 ms

DC

−10 −100

−0.9

−0.8

−0.7

−0.6

−0.001

−0.50 −1.0 −1.5 −2.0 −3.0−2.5

VGS - Gate to Sorce Voltage - V

FORWARD TRANSFER ADMMITTANCE Vs.
DRAIN CURRENT

100

VDS = −10V

TA = −25

10

25

˚C
˚C

75

125

1

| - Forward Transfer Admittance - S

fs

| y

0.1

−1

ID - Drain Current - A

˚C

˚C

−0.5

VGS(off) - Gate to Source Cut-off Voltage - V

−50

ch - Channel Temperature - ˚C

T

50 1000

150

DRAIN TO SOURCE ON-STATE RESISTANCE vs.
DRAIN CURRENT

100

V

GS

= −2.5 V

80

TA = 125˚C

75˚C

60

25˚C

−

25˚C

40

- Drain to Source On-State Resistance - mΩ

−10 −100−0.1

20

DS(on)

R

−0.1−0.01

D

- Drain Current - A

I

−1

−10 −100

Data Sheet D11819EJ1V0DS00

3