MSI MS-6584 Schematics
1
Cover Sheet
Block Diagram
Intel mPGA478B CPU - Signals
Intel mPGA478B CPU - Power
1
2
3
4
Shadow (MS-6584)
Intel (R) Springdale (GMCH) + ICH5 Chipset
Version 0A
Intel Northwood & Prescott mPGA478B Processor
Intel Springdale - Host Signals
Intel Springdale - Memory Signals
Intel Springdale - AGP & LDT Signals
Intel ICH5 - PCI & IDE & AC97 Signals
Intel ICH5 - Other Signals
5
6
7
8
9
CPU:
Intel Northwood/Prescott - 3.0G & Above
System Chipset:
Intel Springdale - GMCH (North Bridge)
Intel ICH5 (South Bridge)
Clock - Cypress CY28405 & FWH & Manual
LPC I/O - LPC47M233 & FDD & KB/MS & LPT
I/O Connectors COM1,2 & VEDIO CONNECTOR
10
11
12
On Board Chipset:
BIOS -- FWH EEPROM
AC'97 Codec -- AD1981B
AC97 Audio Codec- AD1981B
A A
LAN Kinnnereth-R/Kenai II-32 14
LAN Transform & RJ45 Connector
DDR System Memory 1 , 2
13
15
16-17
LPC Super I/O -- LPC47M233
LAN -- KINNERETH-R/(KENAI-II-32)
CLOCK -- Cypress CY28405
Main Memory:
PCI Riser Card
USB Connectors
ATA33/66/100 IDE & FAN Connectors
ATX & FRONT PANEL & POV3 Connector
DDR ,VCC_DAC & VTT Controller
ACPI CONTROLLER W83302D
VRM 10 - Intersil HIP 6556B + HIP 6602B/6601B
PULL UP/ DOWN RESISTORS
GPIO Definition
Manual Parts
Revision History
18
19
20
21
22
23
24
25
26
27
28
DDR * 2 (Max 2GB)
Expansion Slots:
PCI2.3 SLOT * 1
Intersil PWM:
Controller: HIP6556B
Driver: HIP6602B *1 / HIP6601B * 1
ACPI Controller:
Winbond W83302D
1
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
COVER SHEET
(MS-6584)
1 28Tuesday, September 17, 2002
0A
1
VRM 10
Intersil 6556
Intel mPAG478B Proc essor
Block Diagram
3-Phase PWM
FSB
Analo g
Video
Out
IDE Prim ary
UltraDMA
33/66/100
Springdale
Link
64bit DDR
HCT
2 DDR
DIMM
Modules
PCI CNTRL
PCI Slot 1
IDE Seco ndary
ICH5
A A
USB Port 0
PCI ADDR/DATA
USB Port 1
USB Port 2
USB Port 3
USB
LPC Bus
USB Port 4
LPC SIO
USB Port 5
SMSC
LPC47M233
USB Port 6
USB Port 7
AD1981B
AC'97 Codec
10/100 LAN
KINNERETH-R
GIGA LAN
KENAI-II-32
AC'97 Link
LCI
PCI
Flash
Keyboard
Mouse
1
Floopy Parallel Seria l
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
BLOCK DIAGRAM
(MS-6584)
2 28Tuesday, September 17, 2002
0A
8
7
6
5
4
3
2
1
ITP_DBR# {25}
VCC_SENSE {24}
CPU SIGNAL BLOCK
HA#[3..31]{5}
D D
HA#12
HA#18
HA#19
HA#25
HA#27
HA#28
HA#31
HA#30
HA#26
HA#24
HA#29
CPU1A
HDBI#[0..3]{5}
FERR#{9,25}
STPCLK#{9}
HINIT#{9,10}
HDBSY#{5}
HDRDY#{5}
HTRDY#{5}
HADS#{5}
C C
10:10:10<8"
5:7<10"
5:7<17"
B B
5:13<12"
5:13<10"
HLOCK#{5}
HBNR#{5}
HIT#{5}
HITM#{5}
HBPRI#{5}
HDEFER#{5}
ITP_TDI{25}
ITP_TDO{25}
ITP_TMS{25}
ITP_TRST#{25}
ITP_TCK{25}
THERMDP#{11}
THERMDN#{11}
TRMTRIP#{9,25}
PROCHOT#{5,25}
IGNNE#{9}
SMI#{9,10,11}
A20M#{9}
SLP#{9}
BOOT{22}
BSEL0{5,10}
BSEL1{5,10}
CPU_GD{9,25}
CPURST#{5,25}
HD#[0..63]{5}
HDBI#0
HDBI#1
HDBI#2
HDBI#3
5:5<17"
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_TCK
PROCHOT#
BOOT
CPU_GD
CPURST#
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54
AF26
AB26
AE21
AF24
AF25
AE26
AB23
AB25
AA24
AA22
AA25
E21
G25
P26
V21
AC3
V6
B6
Y4
AA3
W5
AB2
H5
H2
J6
G1
G4
G2
F3
E3
D2
E2
C1
D5
F7
E6
D4
B3
C4
A2
C3
B2
B5
C6
A22
A7
AD1
AD6
AD5
Y21
Y24
Y23
W25
Y26
W26
V24
AB1Y1W2V3U4T5W1R6V2T4U3P6U1T2R3P4P3R2T1N5N4N2M1N1M4M3L2M6L3K1L6K4K2
V22
D53#
U21
D52#
V25
D51#
U23
A35#
D50#
U24
DBI0#
DBI1#
DBI2#
DBI3#
IERR#
MCERR#
FERR#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
BOOTSELECT
OPTIMIZED/COMPAT#
BSEL0
BSEL1
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
A34#
D49#
U26
A33#
D48#
T23
A32#
D47#
T22
A31#
D46#
T25
A30#
D45#
T26
A29#
D44#
R24
A28#
D43#
R25
A27#
D42#
P24
A26#
D41#
R21
A25#
D40#
N25
A24#
D39#
HA#23
N26
HA#22
A23#
D38#
M26
HA#21
A22#
D37#
N23
HA#20
A21#
D36#
M24
A20#
D35#
P21
A19#
D34#
N22
HA#17
A18#
D33#
M23
HA#16
A17#
D32#
H25
HA#15
A16#
D31#
K23
HA#14
A15#
D30#
J24
HA#13
A14#
D29#
L22
A13#
D28#
M21
HA#11
A12#
D27#
H24
HA#10
A11#
D26#
G26
HA#9
A10#
D25#
L21
HA#8
A9#
D24#
D26
HA#7
A8#
D23#
F26
HA#6
A7#
D22#
E25
HA#5
A6#
D21#
F24
HA#4
A5#
D20#
F23
HA#3
A4#
D19#
G23
A3#
D18#
E24
AE25A5A4
D17#
D16#
H22
D25
DBR#
VCC_SENSE
D15#
D14#
D13#
J21
D23
C26
AD26
AC26
AD2
ITP_CLK1
ITP_CLK0
VSS_SENSE
D12#
D11#
D10#
D9#
D8#
H21
G22
B25
C24
C23
VID2
VID3
VID4
VID5
AE1
AE2
AE3
AD3
VID4#
VID3#
VID5#
VIDPWRGD
D7#
D6#
D5#
D4#
B24
D22
C21
A25
VID2#
D3#
VSS_SENSE {24}
ITP_CLK# {10,25}
ITP_CLK {10,25}
VID_GD {10,23,24}
VID[0..5] {24}
VID0
VID1
AE4
AE5
VID1#
VID0#
GTLREF3
GTLREF2
GTLREF1
GTLREF0
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
D2#
D1#
D0#
NORTHWOOD/PRESCOTT
A23
B22
B21
AA21
AA6
F20
F6
AB4
AA5
Y6
AC4
AB5
AC6
H3
J3
J4
K5
J1
AD25
A6
Y3
W4
U6
AB22
AA20
AC23
AC24
AC20
AC21
AA2
AD24
AF23
AF22
F4
G5
F1
V5
AC1
H6
P1
L24
L25
K26
K25
J26
R5
L5
W23
P23
J23
F21
W22
R22
K22
E22
E5
D1
GTLREF
C70 220p
BPM#5
BPM#4
BPM#3
BPM#2
BPM#1
BPM#0
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI2
TESTHI0
HRS#2
HRS#1
HRS#0
HBR#0
COMP1
COMP0
12:15<1.5"
GTLREF {5}
PLACE CLOSE TO CPU
BPM#5 {25}
BPM#4 {25}
BPM#3 {25}
BPM#2 {25}
BPM#1 {25}
BPM#0 {25}
R159 62
R134 62
R130 62
R129 62
R122 62
R158 62
R128 62
CPU_CLK# {10}
CPU_CLK {10}
5:7<8"
HBR#0 {5,25}
R123 61.9RST
R157 61.9RST
HADSTB#1 {5}
HADSTB#0 {5}
HDSTBP#3 {5}
HDSTBP#2 {5}
HDSTBP#1 {5}
HDSTBP#0 {5}
HDSTBN#3 {5}
HDSTBN#2 {5}
HDSTBN#1 {5}
HDSTBN#0 {5}
NMI {9}
INTR {9}
HREQ#[0..4] {5}
CPU GTL REFERNCE VOLTAGE BLOCK
VTT
R199
200RST
VCCP
HRS#[0..2] {5}
5:13<1.5"
5:7<1"
3"
GTLREF
0.63*VCC_AVG
VCCP
R163
3"
200RST
C71
R162
0.1u
169RST
P LACE CLOSE TO CPUPLACE CLOSE TO GMCH
HD#12
HD#11
HD#6
HD#5
HD#1
HD#4
HD#2
HD#7
HD#8
HD#10
HD#9
HD#0
MSI
Title
Size Document Number Rev
4
3
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
Intel mPGA478B - Signals
(MS-6584)
2
3 28Tuesday, September 17, 2002
1
0A
HD#52
HD#53
A A
8
7
HD#51
HD#44
HD#48
HD#49
HD#47
HD#43
HD#50
HD#41
HD#42
HD#46
HD#45
6
HD#34
HD#37
HD#39
HD#35
HD#40
HD#38
HD#36
HD#27
HD#26
HD#29
HD#28
HD#32
HD#30
HD#33
HD#31
HD#25
5
HD#19
HD#18
HD#23
HD#24
HD#22
HD#21
HD#16
HD#15
HD#14
HD#17
HD#20
HD#13
HD#3
8
7
6
5
4
3
2
1
CPU VOLTAGE BLOCK
VCC_VID{23}
D17
VCC
VSS
D19D7D9
VCC
VCC
VSS
VSS
F12
F14
E10
VCC
VSS
F16
4.7u-0805
E12
E14
VCC
VCC
VSS
VSS
F18F2F22
VCC
VSS
E16
VCC
VSS
Place C4, C5 close
B17
B19B7B9
VCC
VSS
VCC
VSS
VCC
VSS
VCC
VSS
C10
C12
VCC
VSS
to CPU SOCKET.
C14
C16
C18
C20C8D11
D13
D15
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E13
E15
E17
E19
E23
E7E9F10
E4
E26
VCC
VSS
D D
C C
B B
AA11
AA13
AA15
AA17
AA19
AA23
AA26
AB10
AB12
AB14
AB16
AB18
AB20
AB21
AB24
AC11
AC13
AC15
AC17
AC19
AC22
AC25
CPU1B
D10
A11
A13
A15
A17
A19
A21
A24
A26
AA1
AA4
AA7
AA9
AB3
AB6
AB8
AC2
AC5
AC7
AC9
VCCP
A10
A12
A14
A16
A18
A20A8AA10
AA12
AA14
AA16
AA18
AA8
AB11
AB13
AB15
AB17
AB19
AB7
AB9
AC10
AC12
AC14
AC16
AC18
AC8
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
AE16
AE18
AE20
AE6
AE8
AF11
AF13
AF15
AF17
AF19
AF2
AF21
AF5
AF7
AF9
B11
B13
B15
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
D14
VSS
D16
VCC
VSS
VSS
VSS
VSS
D18
D20
D21D3D24D6D8E1E11
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A3
VSS
A9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AD10
AD12
AD14
AD16
AD18
AD21
AD4
AD23
AD8
AE11
AE13
AE15
AE17
AE19
AE22
AE24
AE7
AE9
AF1
AF10
AF12
AF14
AF16
AF18
AF20
AF6
AF8
B10
B12
B14
B16
B18
B23
B20
B26B4B8
C11
C13
C15
C17C2C19
C22
C25C5C7C9D12
C64
E18
E20E8F11
VCC
VSS
F25F5F8
VCC
VSS
VCC
VSS
G21G6G24
F13
F15
VCC
VCC
VSS
VSS
G3H1H23
1.2V 150mA
C66
0.1u
F17
F19
F9
VCC
VCC
VCC
VSS
VSS
VSS
VCC
VSS
H26H4J2
AF4
VCC-VID
VSS
VSS
AE23
AD20
AF3
VCCA
VCC-IOPLL
VCC-VIDPRG
VSS
VSS
VSS
VSS
VSS
NORTHWOOD/PRESCOTT
J22
J25J5K21
CPU_IOPLL
10u-1206
VSSA
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AD22
Y5
Y25
Y22
Y2
W6
W3
W24
W21
V4
V26
V23
V1
U5
U25
U22
U2
T6
T3
T24
T21
R4
R26
R23
R1
P5
P25
P22
P2
N6
N3
N24
N21
M5
M25
M22
M2
L4
L26
L23
L1
K6
K3
K24
EC46
VSSA
It must close EC1, EC2 caps.
It support DC current if 100mA.
L3 10uH-0805
L4 10uH-0805
EC45
22u-1206
Place EC1, EC2 close to
CPU SOCKET<500 mils .
W=12 mils for CPU_IOPLL
& VSSA.
DC voltage drop should
be less than 70mV.
VCCP
CPU DECOUPLING CAPACITORS
MSI
VCCP
+
EC56
150u-2.5V(S/S)
+
EC55
150u-2.5V(S/S)
+
EC54
150u-2.5V(S/S)
Solder side
MICRO-STAR INt'L CO., LTD.
Intel mPGA478B - Power
(MS-6584)
2
4 28Tuesday, September 17, 2002
1
0A
VCCP
A A
EC18
10u-1206-6.3V-X5R
EC20
10u-1206-6.3V-X5R
EC34
10u-1206-6.3V-X5R
EC33
10u-1206-6.3V-X5R
EC36
10u-1206-6.3V-X5R
EC23
10u-1206-6.3V-X5R
Place these caps within socket cavity Place these caps within south side of processor
8
VCCP VCCP VCCP
EC22
10u-1206-6.3V-X5R
EC19
10u-1206-6.3V-X5R
EC21
10u-1206-6.3V-X5R
EC35
10u-1206-6.3V-X5R
EC38
10u-1206-6.3V-X5R
EC37
10u-1206-6.3V-X5R
12pcs
VCCP
EC7
10u-1206-6.3V-X5R
EC9
10u-1206-6.3V-X5R
EC15
10u-1206-6.3V-X5R
EC32
10u-1206-6.3V-X5R
EC41
10u-1206-6.3V-X5R
EC44
10u-1206-6.3V-X5R
19pcs 9pcs
Place these caps within north side of processor
7
6
EC6
10u-1206-6.3V-X5R
EC10
10u-1206-6.3V-X5R
EC17
10u-1206-6.3V-X5R
EC31
10u-1206-6.3V-X5R
EC40
10u-1206-6.3V-X5R
EC43
10u-1206-6.3V-X5R
5
EC12
10u-1206-6.3V-X5R
EC13
10u-1206-6.3V-X5R
EC25
10u-1206-6.3V-X5R
EC26
10u-1206-6.3V-X5R
EC28
10u-1206-6.3V-X5R
EC29
10u-1206-6.3V-X5R
EC42
10u-1206-6.3V-X5R
VCCP VCCP
4
EC5
10u-1206-6.3V-X5R
EC8
10u-1206-6.3V-X5R
EC11
10u-1206-6.3V-X5R
EC14
10u-1206-6.3V-X5R
EC16
10u-1206-6.3V-X5R
EC24
10u-1206-6.3V-X5R
EC27
10u-1206-6.3V-X5R
EC30
10u-1206-6.3V-X5R
EC39
10u-1206-6.3V-X5R
3
Title
Size Document Number Rev
Date: Sheet of
8
HA#[3..31]{3}
D D
C C
HADSTB#0{3}
HADSTB#1{3}
HBR#0{3,25}
HBPRI#{3}
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HBNR#{3}
HLOCK#{3}
HADS#{3}
HREQ#[0..4]{3}
HITM#{3}
HDEFER#{3}
HTRDY#{3}
HDBSY#{3}
HDRDY#{3}
HRS#[0..2]{3}
B B
MCH_CLK{10}
MCH_CLK#{10}
PWR_GD{14,22,23,25}
CPURST#{3,25}
PCIRST_ICH5#{8,23}
ICH_SYNC#{25}
PROCHOT#{3,25}
R279 2.49KST
BSEL0{3,10}
BSEL1{3,10}
R287 2KST
R286 2KST
R282 2.49KST
R186 20RST
HSWING{25}
GTLREF{3}
HIT#{3}
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
HRS#0
HRS#1
HRS#2
SEL0
SEL1
HRCOMP
10:7<0.5"
12:10<3"
12:15
C86
220p
AE14
D26
D30
L23
E29
B32
K23
C30
C31
J25
B31
E30
B33
J24
F25
D34
C32
F28
C34
J27
G27
F29
E28
H27
K24
E32
F31
G30
J26
G26
B30
D28
B24
B26
B28
E25
F27
B29
J23
L22
C29
J21
K21
E23
L21
D24
E27
G24
G22
C27
B27
B7
C7
E8
AK4
AJ8
L20
L13
L12
E24
C25
F23
VCCA_FSB
VCCA_DPLL
U2A
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HAD_STB0#
HAD_STB1#
BREQ0#
BPRI#
BNR#
HLOCK#
ADS#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HIT#
HITM#
DEFER#
HTRDY#
DBSY#
DRDY#
RS0#
RS1#
RS2#
HCLKP
HCLKN
PWROK
CPURST#
RSTIN#
ICH_SYNC#
PROCHOT#
BSEL0
BSEL1
HDRCOMP
HDSWING
HDVREF
7
C82 0.1u
B3
VCCA_DPLL
C8
A31
B4
J6J7J8J9K6K7K8K9L6L7L9
VCC
VCC
VCCA_FSB
VCCA_FSB
VSS
VSS
VSS
VSS
VSS
VSS
C12
C14
C16
C18
C20
C10
VCC
VSS
C22
VCC
VSS
C24
VCC
VCC
VSS
VSS
C26
C28D1D11
VCC
VSS
VCC
VSS
D9
VCC
VSS
VCC
VSS
D13
L10
VCC
VSS
D15
L11
VCC
VSS
D17
6
VCC
VSS
D19
VCC
VSS
D21
M10
VCC
VSS
D23
M11M8M9
VCC
VSS
D25
VCC
VSS
D27
VCC_AGP
N11N9P10
N10
VCC
VCC
VCC
VSS
VSS
VSS
D29
D31
D33
P11
VCC
VSS
D35
R11
VCC
VSS
E1
T16
VCC
VSS
E3
VCC
VSS
T17
F1
T18
VCC
VCC
VSS
VSS
F3F5F8
5
4
3
2
1
VTT
C90
C91
4.7u-0805
T19
U16
U17
U20
V16
V18
V20
W16
W19
W20
Y16
Y17
Y18
Y19
VCC
VSS
VCC
VSS
F24
VCC
VSS
F26
VCC
VSS
G28
Y20
A3
A33
A35B2B25
B34C1C23
NCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
G31
G35
VSS
H5
VSS
H8
VSS
H9
VSS
H12
H14
H16H2H20
H18
VSS
VSS
H22
VSS
H24
C35
VSS
H26
E26
VSS
H30
M31
VSS
H33
VSS
R25
J10
AF13
NC
VSS
J12
AF23
VSS
J14
VSS
AJ12
J16
AN1
VSS
J18
AP2
VSS
J20
VSS
AR3
J22
AR33
VSS
J28
AR35
VSS
J32
VSS
J35
A7A9A11
VSS
VSS
VSS
K11
K12
VSS
VSS
K14
VSS
VSS
A13
K16
A16
VSS
VSS
K18
A20
VSS
VSS
K20
A23
VSS
VSS
K22
T20
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
F18
F20
F22
F14
F16
F10
F12
A25
VSS
VSS
K25
A27
VSS
VSS
K27
A29
VSS
VSS
K29
VSS
VSS
A32
K33
C4
VSS
VSS
L24
VSS
VSS
D5D6D7E6E7
VTT
VSS
VSS
L25
L26
L31
VTT
VSS
L35
VTT
VSS
F7
VTT
VTT
VSS
VSS
M3M6M26
VTT
VSS
A4A5A6B5B6C5C6
VTT
VTT
VTT
VTT
VSS
VSS
VSS
VSS
M27
M28
M30
M33N1N4
1u-0603
VTT
VTT
VTT
VSS
VSS
Intel Springdale-N
VTT_FSB1
VTT_FSB2
A15
A21
VTT_FSB
VTT_FSB
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
DINV_0#
DINV_1#
DINV_2#
DINV_3#
HD_STBP0#
HD_STBN0#
HD_STBP1#
HD_STBN1#
HD_STBP2#
HD_STBN2#
HD_STBP3#
HD_STBN3#
HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
CB90 0.47u
CB86 0.47u
HD#0
B23
HD#1
E22
HD#2
B21
HD#3
D20
HD#4
B22
HD#5
D22
HD#6
B20
HD#7
C21
HD#8
E18
HD#9
E20
HD#10
B16
HD#11
D16
HD#12
B18
HD#13
B17
HD#14
E16
HD#15
D18
HD#16
G20
HD#17
F17
HD#18
E19
HD#19
F19
HD#20
J17
HD#21
L18
HD#22
G16
HD#23
G18
HD#24
F21
HD#25
F15
HD#26
E15
HD#27
E21
HD#28
J19
HD#29
G14
HD#30
E17
HD#31
K17
HD#32
J15
HD#33
L16
HD#34
J13
HD#35
F13
HD#36
F11
HD#37
E13
HD#38
K15
HD#39
G12
HD#40
G10
HD#41
L15
HD#42
E11
HD#43
K13
HD#44
J11
HD#45
H10
HD#46
G8
HD#47
E9
HD#48
B13
HD#49
E14
HD#50
B14
HD#51
B12
HD#52
B15
HD#53
D14
HD#54
C13
HD#55
B11
HD#56
D10
HD#57
C11
HD#58
E10
HD#59
B10
HD#60
C9
HD#61
B9
HD#62
D8
HD#63
B8
HDBI#0
C17
HDBI#1
L17
HDBI#2
L14
HDBI#3
C15
B19
C19
L19
K19
G9
F9
D12
E12
HD#[0..63] {3}
HDBI#[0..3] {3}
HDSTBP#0 {3}
HDSTBN#0 {3}
HDSTBP#1 {3}
HDSTBN#1 {3}
HDSTBP#2 {3}
HDSTBN#2 {3}
HDSTBP#3 {3}
HDSTBN#3 {3}
A A
HEAT SINK
HEATSINK
U2_X
I=30mA
VCCA_FSB
CHECK
P/N
8
W=25,S=10 mils W=25,S=10 mils
7
C93
0.1u
L5 0.82uH-35mA
+
CT27
22U/16V/S
ALE
R205 0
CLOSE TO PINA31
6
VCC_AGP VCC_AGP
5
I=35mA
VCCA_DPLL DPLL
ESR is 0.1mohm to GMCH
+
C96
CT30
0.1u
100u_6.3V
ALU
4
CLOSE TO PINB3
MSI
R207 1RSTL6 100nH-300mA
Title
Size Document Number Rev
3
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
Intel Springdale - CPU Signals
(MS-6584)
2
5 28Tuesday, September 17, 2002
1
0A
8
MCS_A#0{16}
D D
MCS_A#1{16}
MRAS_A#{16}
MCAS_A#{16}
MDQ_A[0..63]{16} MCKE_A[0..1] {16}
MWE_A#{16}
MA_A[0..12]{16}
MA_A0
MA_A1
MA_A2
MA_A3
MA_A4
MA_A5
MA_A6
MA_A7
MA_A8
MA_A9
MA_A10
MA_A11
MA_A12
AM34
AM26
C C
B B
MBA_A0{16}
MBA_A1{16}
MDQM_A[0..7]{16}
MDQS_A[0..7]{16}
MCLK_A0{16}
MCLK_A#0{16}
MCLK_A1{16}
MCLK_A#1{16}
MCLK_A2{16}
MCLK_A#2{16}
MDQM_A0
MDQM_A1
MDQM_A2
MDQM_A3
MDQM_A4
MDQM_A5
MDQM_A6
MDQM_A7
MDQS_A0
MDQS_A1
MDQS_A2
MDQS_A3
MDQS_A4
MDQS_A5
MDQS_A6
MDQS_A7
AM24
AM30
AM16
CB79 0.47u
CB77 0.22u
CB83 0.1u
CB112 0.22u
CB119 0.1u
XRCOMP{25}
XCOMPH{25}
XCOMPL{25}
XVREF{25}
XRCOMP
XCOMPH
XCOMPL
XVREF
VCC_DDR_C2{25}
VCC_DDR_C3{25}
XRCOMP
XCOMPH
XCOMPL
XVREF
0.01uC127
0.01uC134
0.01uC129
C78 0.1u
A A
8
AA34
Y31
Y32
W34
AC33
Y34
AB34
AJ34
AL33
AK29
AN31
AL30
AL26
AL28
AN25
AP26
AP24
AJ33
AN23
AN21
AL34
AP32
AP31
AE33
AH34
AP12
AP16
AP30
AF31
W33
M34
H32
AN11
AP15
AP23
AF34
V34
M32
H31
AK32
AK31
AP17
AN17
N33
N34
AK33
AK34
AL16
P31
P32
AK9
AN9
AL9
E34
VCC_DDR_C1
VCC_DDR_C2
VCC_DDR_C3
VCC_DDR_C4
VCC_DDR_C5
7
U2B
SCS_A0#
SCS_A1#
SCS_A2#
SCS_A3#
SRAS_A#
SCAS_A#
SWE_A#
SMAA_A0
SMAA_A1
SMAA_A2
SMAA_A3
SMAA_A4
SMAA_A5
SMAA_A6
SMAA_A7
SMAA_A8
SMAA_A9
SMAA_A10
SMAA_A11
SMAA_A12
SMAB_A1
SMAB_A2
SMAB_A3
SMAB_A4
SMAB_A5
SBA_A0
SBA_A1
SDM_A0
SDM_A1
SDM_A2
SDM_A3
SDM_A4
SDM_A5
SDM_A6
SDM_A7
SDQS_A0
SDQS_A1
SDQS_A2
SDQS_A3
SDQS_A4
SDQS_A5
SDQS_A6
SDQS_A7
SMDCLK_A0
SMDCLK_A0#
SMDCLK_A1
SMDCLK_A1#
SMDCLK_A2
SMDCLK_A2#
SMDCLK_A3
SMDCLK_A3#
SMDCLK_A4
SMDCLK_A4#
SMDCLK_A5
SMDCLK_A5#
SMXRCOMP
SMXCOMPVOH
SMXCOMPVOL
SMVREF_A
7
MDQ_A0
MDQ_A1
AP10
AP11
SDQ_A0
SDQ_A1
VCC_DDR
E35
MDQ_A3
MDQ_A4
MDQ_A2
AM12
AN13
AM10
SDQ_A2
SDQ_A3
VCC_DDR
VCC_DDR
AA35
R35
AR21
MDQ_A7
MDQ_A5
MDQ_A6
AL10
AL12
AP13
SDQ_A4
SDQ_A5
SDQ_A6
SDQ_A7
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
AL7
AR15
AL6
6
MDQ_A9
MDQ_A8
AP14
AM14
SDQ_A8
SDQ_A9
VCC_DDR
VCC_DDR
AM1
AM2
MDQ_A12
MDQ_A10
MDQ_A11
AL18
AP19
AL14
SDQ_A10
SDQ_A11
VCC_DDR
VCC_DDR
AN8
AP3
AP4
MDQ_A13
MDQ_A14
MDQ_A15
AN15
AP18
AM18
SDQ_A12
SDQ_A13
SDQ_A14
SDQ_A15
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
AP5
AP6
AP7
MDQ_A16
MDQ_A17
MDQ_A18
AP22
AM22
AL24
SDQ_A16
SDQ_A17
VCC_DDR
VCC_DDR
AR4
AR5
AR7
MDQ_A19
AN27
SDQ_A18
VCC_DDR
AR31
VCC_DDR
MDQ_B[0..63]{17}
DEMO SCH PINAR31 OPEN
6
MDQ_A21
MDQ_A20
MDQ_A22
AP21
AL22
AP25
SDQ_A19
SDQ_A20
SDQ_A21
SDQ_A22
VCC_DDR
SDQ_B0
SDQ_B1
AJ10
AE15
MDQ_B0
MDQ_B1
MDQ_A23
MDQ_A25
MDQ_A24
AP27
AP28
AP29
SDQ_A23
SDQ_A24
SDQ_B2
SDQ_B3
AL11
AE16
AL8
MDQ_B3
MDQ_B2
MDQ_B4
MDQ_A28
MDQ_A27
MDQ_A26
AP33
AM33
AM28
SDQ_A25
SDQ_A26
SDQ_A27
SDQ_B4
SDQ_B5
SDQ_B6
AF12
AK11
AG12
MDQ_B6
MDQ_B5
MDQ_B7
MDQ_A30
MDQ_A31
MDQ_A29
AN29
AM31
AN34
SDQ_A28
SDQ_A29
SDQ_A30
SDQ_B7
SDQ_B8
SDQ_B9
AE17
AL13
AK17
MDQ_B8
MDQ_B10
MDQ_B9
MDQ_A32
MDQ_A34
MDQ_A33
AH32
AG34
AF32
SDQ_A31
SDQ_A32
SDQ_A33
SDQ_B10
SDQ_B11
SDQ_B12
AL17
AK13
AJ14
MDQ_B12
MDQ_B11
MDQ_B13
5
MDQ_A35
MDQ_A36
MDQ_A37
AD32
AH31
AG33
SDQ_A34
SDQ_A35
SDQ_A36
SDQ_B13
SDQ_B14
SDQ_B15
AJ16
AJ18
AE19
MDQ_B15
MDQ_B14
MDQ_B16
5
MDQ_A38
MDQ_A40
MDQ_A39
AE34
AD34
AC34
SDQ_A37
SDQ_A38
SDQ_A39
SDQ_B16
SDQ_B17
SDQ_B18
AE20
AG23
AK23
MDQ_B18
MDQ_B17
MDQ_B19
MDQ_A42
MDQ_A41
MDQ_A43
AB31
V32
V31
SDQ_A40
SDQ_A41
SDQ_A42
SDQ_B19
SDQ_B20
SDQ_B21
AL19
AK21
AJ24
MDQ_B22
MDQ_B21
MDQ_B20
MDQ_A45
MDQ_A46
MDQ_A44
AD31
AB32
U34
SDQ_A43
SDQ_A44
SDQ_A45
SDQ_B22
SDQ_B23
SDQ_B24
AE22
AK25
AH26
MDQ_B24
MDQ_B23
MDQ_B25
MDQ_A47
MDQ_A48
MDQ_A49
U33
T34
T32
SDQ_A46
SDQ_A47
SDQ_A48
SDQ_B25
SDQ_B26
SDQ_B27
AG27
AF27
AJ26
MDQ_B27
MDQ_B26
MDQ_B28
MDQ_A50
MDQ_A51
MDQ_A52
K34
K32
T31
SDQ_A49
SDQ_A50
SDQ_A51
SDQ_B28
SDQ_B29
SDQ_B30
AJ27
AD25
AF28
MDQ_B30
MDQ_B31
MDQ_B29
4
MDQ_A55
MDQ_A53
MDQ_A54
P34
L34
L33
SDQ_A52
SDQ_A53
SDQ_A54
SDQ_B31
SDQ_B32
SDQ_B33
AE30
AC27
AC30
MDQ_B33
MDQ_B34
MDQ_B32
4
MDQ_A57
MDQ_A58
MDQ_A56
J33
H34
E33
SDQ_A55
SDQ_A56
SDQ_A57
SDQ_B34
SDQ_B35
SDQ_B36
Y29
AE31
AB29
MDQ_B35
MDQ_B37
MDQ_B36
MDQ_A61
MDQ_A59
MDQ_A60
F33
K31
J34
SDQ_A58
SDQ_A59
SDQ_A60
SDQ_B37
SDQ_B38
SDQ_B39
AA26
AA27
AA30
MDQ_B40
MDQ_B39
MDQ_B38
MDQ_A63
MDQ_A62
G34
F34
SDQ_A61
SDQ_A62
SDQ_A63
SDQ_B40
SDQ_B41
SDQ_B42
W30
U27
T25
MDQ_B43
MDQ_B41
MDQ_B42
MCKE_A1
MCKE_A0
AL20
AN19
AM20
SCKE_A0
SCKE_A1
SDQ_B43
SDQ_B44
SDQ_B45
AA31
V29
U25
MDQ_B44
MDQ_B46
MDQ_B45
AP20
AB25
SCKE_A2
SCKE_A3
SDQ_B46
SDQ_B47
SDQ_B48
R27
P29
R30
MDQ_B49
MDQ_B48
MDQ_B47
3
C92 0.1u
AC26
AC25
AL35
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
SDQ_B49
SDQ_B50
SDQ_B51
SDQ_B52
K28
L30
R31
R26
MDQ_B53
MDQ_B51
MDQ_B52
MDQ_B50
3
W=50 mils.
AN4
AM3
AN5
AM5
VCC_DDR
VCC_DDR
VCC_DDR
SDQ_B53
SDQ_B54
SDQ_B55
SDQ_B56
P25
L32
K30
H29
MDQ_B56
MDQ_B55
MDQ_B54
AM6
AM7
VCC_DDR
VCC_DDR
VCC_DDR
SDQ_B57
SDQ_B58
SDQ_B59
F32
G33
MDQ_B58
MDQ_B57
MDQ_B59
2
VCC_DDR
VCCA_DDR
C104
0.1u
L8 1uH-1A_1206
+
C100
100u_6.3V
CLOSE TO NB
AM8
AN2
AN6
AN7
P3P6P8
N35
N32
Its current is 5.1A.
U26
SCS_B0#
T29
SCS_B1#
VSS
SCS_B2#
SCS_B3#
SRAS_B#
SCAS_B#
SWE_B#
SMAA_B0
SMAA_B1
SMAA_B2
SMAA_B3
SMAA_B4
SMAA_B5
SMAA_B6
SMAA_B7
SMAA_B8
SMAA_B9
SMAA_B10
SMAA_B11
SMAA_B12
SMAB_B1
SMAB_B2
SMAB_B3
SMAB_B4
SMAB_B5
SBA_B0
SBA_B1
SDM_B0
SDM_B1
SDM_B2
SDM_B3
SDM_B4
SDM_B5
SDM_B6
SDM_B7
SDQS_B0
SDQS_B1
SDQS_B2
SDQS_B3
SDQS_B4
SDQS_B5
SDQS_B6
SDQS_B7
SMVREF_B
V25
W25
W26
W31
W27
AG31
AJ31
AD27
AE24
AK27
AG25
AL25
AF21
AL23
AJ22
AF29
AL21
AJ20
AE27
AD26
AL29
AL27
AE23
Y25
AA25
AG11
AG15
AE21
AJ28
AC31
U31
M29
J31
AF15
AG13
AG21
AH27
AD29
U30
L27
J30
AG29
AG30
AF17
AG17
N27
N26
AJ30
AH29
AK15
AL15
N31
N30
AA33
R34
R33
AP9
MA_B0
MA_B1
MA_B2
MA_B3
MA_B4
MA_B5
MA_B6
MA_B7
MA_B8
MA_B9
MA_B10
MA_B11
MA_B12
MDQM_B0
MDQM_B1
MDQM_B2
MDQM_B3
MDQM_B4
MDQM_B5
MDQM_B6
MDQM_B7
MDQS_B0
MDQS_B1
MDQS_B2
MDQS_B3
MDQS_B4
MDQS_B5
MDQS_B6
MDQS_B7
YRCOMP
YCOMPH
YCOMPL
YVREF
YRCOMP
YCOMPH
YCOMPL
YVREF
VCC_DDR
VCC_DDR
SDQ_B60
SDQ_B61
N25
M25
J29
MDQ_B62
MDQ_B61
MDQ_B60
VSS
VCC_DDR
VCC_DDR
SDQ_B62
SDQ_B63
SCKE_B0
G32
AK19
MDQ_B63
MCKE_B0
VSS
VSS
VSS
SCMDCLK_B0
SCMDCLK_B0#
SCMDCLK_B1
SCMDCLK_B1#
SCMDCLK_B2
SCMDCLK_B2#
SCMDCLK_B3
SCMDCLK_B3#
SCMDCLK_B4
SCMDCLK_B4#
SCMDCLK_B5
SCMDCLK_B5#
SMYRCOMP
SMYCOMPVOH
SMYCOMPVOL
SCKE_B1
SCKE_B2
SCKE_B3
AF19
AG19
AE18
MCKE_B1
Intel Springdale-N
MCKE_B[0..1] {17}
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
Intel Springdale - Memory Signals
(MS-6584)
2
C125 0.1u
MCS_B#0 {17}
MCS_B#1 {17}
MRAS_B# {17}
MCAS_B# {17}
MWE_B# {17}
MBA_B0 {17}
MBA_B1 {17}
MCLK_B0 {17}
MCLK_B#0 {17}
MCLK_B1 {17}
MCLK_B#1 {17}
MCLK_B2 {17}
MCLK_B#2 {17}
0.01uC85
0.01uC80
0.01uC79
1
VCC_AGP
MA_B[0..12] {17}
MDQM_B[0..7]{17}
MDQS_B[0..7] {17}
YRCOMP {25}
YCOMPH {25}
YCOMPL {25}
YVREF {25}
6 28Tuesday, September 17, 2002
1
0A
8
AE6
AC11
GRCOMP
GSWING
AGP_REF
AA10
AB11
AA11
AD5
AE5
AC9
AB7
AA9
AA6
AA5
W10
W6
W9
V7
AA2
Y4
Y2
W2
Y5
V2
W3
U3
T2
T4
T5
R2
P2
P5
P4
M2
Y7
W5
AA3
U2
AC6
AC5
V4
V5
N6
M7
N3
N5
N2
R10
R9
U6
V11
AB5
AB4
W11
AB2
H4
R6
P7
R3
R5
U9
U10
U5
T7
U11
T11
M4
M5
AC2
AC3
AD2
D D
C C
B B
MCH_66{10}
R248 43.2RST
VCC_AGP
0.01uC111
0.01uC115
A A
VCC_AGP
+
CT32
1000u-6.3V
CB118
0.1u
CB121
0.1u
8
7
U2C
GAD0/DVOB_HSYNC
GAD1/DVOB_VSYNC
GAD2/DVOB_D1
GAD3/DVOB_D0
GAD4/DVOB_D3
GAD5/DVOB_D2
GAD6/DVOB_D5
GAD7/DVOB_D4
GAD8/DVOB_D6
GAD9/DVOB_D9
GAD10/DVOB_D8
GAD11/DVOB_D11
GAD12/DVOB_D10
GAD13/DVOBC_CLKINT
GAD14/DVOB_FLDSTL
GAD15/MDDC_DATA
GAD16/DVOC_VSYNC
GAD17/DVOC_HSYNC
GAD18/DVOC_BLANK#
GAD19/DVOC_D0
GAD20/DVOC_D1
GAD21/DVOC_D2
GAD22/DVOC_D3
GAD23/DVOC_D4
GAD24/DVOC_D7
GAD25/DVOC_D6
GAD26/DVOC_D9
GAD27/DVOC_D8
GAD28/DVOC_D11
GAD29/DVOC_D10
GAD30/DVOBC_INTR#
GAD31/DVOC_FLDSTL
GCBE0/DVOB_D7
GCBE1/DVOB_BLANK#
GCBE2
GCBE3/DVOC_D5
GADSTBF0/DVOB_CLK
GADSTBS0/DVOB_CLK#
GADSTBF1/DVOC_CLK
GADSTBS1/DVOC_CLK#
GREQ
GGNT
GST0
GST1
GST2
GRBF
GWBF
GFRAME/MDVI_DATA
GIRDY/MI2CCLK
GTRDY/MDVI_CLK
GDEVSEL/MI2CDATA
GSTOP/MDDC_CLK
GPAR/ADD_DETECT
GCLKIN
GSBA0#/ADD_ID0
GSBA1#/ADD_ID1
GSBA2#/ADD_ID2
GSBA3#/ADD_ID3
GSBA4#/ADD_ID4
GSBA5#/ADD_ID5
GSBA6#/ADD_ID6
GSBA7#/ADD_ID7
GSBSTBF
GSBSTBS
DBI_HI
DBI_LO
GRCOMP/DVOBC_RCOMP
GVSWING
GVREF
VSS
VSS
VSS
AE1
AD30
AD33
AD28
R257 100RST
7
VSS
AE4
VSS
AE10
P9
VSS
AE11
R254
100RST
6
P26
P27
P28
P30
P33R1R4
R32T1T3
T6T8T9
T10
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AF9
VSS
AF11
VSS
VSS
AF14
VSS
AF16
VSS
AF18
VSS
VSS
AF20
VSS
VSS
VSS
AE12
VSS
AE13
VSS
AE25
VSS
AE26
VSS
AE32
VSS
AE35
AF3
VSS
AF6
For AGP 2.0 => AGP_REF:0.75V
6
T26
VSS
VSS
AF22
T27
VSS
VSS
AF24
T28
VSS
VSS
AF25
T30
VSS
VSS
AF30
VCC_AGPVCC_AGP
T33
VSS
VSS
AF33
T35
AG4
U4
VSS
VSS
AG8
U18
U19
U32V3V8V9V10
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AG14
AG16
AG18
V6
V17
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AG20
AG22
AG24
AG26
AG28
AG32
R249 60.4RST
5
V27
V33
V30W4W17
VSS
VSS
VSS
VSS
VSS
VSS
AH12
AH14
AH16
AH18
GSWINGAGP_REF
Y3
W18
W32Y6Y8Y9Y26
Y10
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH20
AJ1
AJ4
AH22
AH24
AH30
AH33
R262=47RST,
R266=53.6RST,
G SWING=0.8V(For 3.0)
R262=60.4RST,
R266=140RST,
GSWING=1.048V (For 2.0)
V19
V26
V28
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AG35
AH10
AH3
AH6
R250
140RST
For without AGP slot & DVI
implement GSWING= 0.8V.
5
VSS
VSS
AJ9
Y27
VSS
VSS
AJ32
VSS
VSS
Y28
AJ35
Y30
VSS
VSS
AK3
Y33
VSS
VSS
AK8
VSS
VSS
Y35
VSS
VSS
AK10
4
AA1
VSS
VSS
AK12
4
AA4
AA32
AB10
AB3
AB6
AB8
AB9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AK16
AK18
AK20
AK22
AK24
AK26
AK14
CI_SWING
CI_VREF
CLOSE TO NORTH BRIDGE
AB26
VSS
VSS
AK28
VSS
VSS
AB27
VSS
VSS
AL1
AB28
VSS
VSS
AL32
AB30
AM9
AC1
AC4
AB33
VSS
VSS
VSS
VSS
VSS
VSS
AM13
AM15
AM11
R277 226RST
R260
147RST
R267 113RST
VCC_AGP_C
AC32
AC35
VSS
VSS
VSS
VSS
AM17
AM19
AD3
VSS
VSS
AM21
AD6
VSS
VSS
AM23
3
VCC_AGP
C132 0.1uC110 0.1u
L1L5Y1J1J2J3K2K3K4K5J4J5L4L2L3
AD8
AD9
AD10
VSS
VSS
VSS
VSS
VCC_AGP
VCC_AGP
VCC_AGP
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AM25
AM27
AM29
AM35
AN10
AN12
AN14
VCC_AGP
3
2
USE TRACE CONNECT TO VCC_AGP
VCCA_AGP_C
AG1
Y11
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCCA_AGP
VCCA_AGP
HI10
HI_STRF
HI_STRS
HI_RCOMP
HI_SWING
HI_VREF
CI10
CISTRF
CISTRS
CI_RCOMP
CI_SWING
CI_VREF
DREFCLK
DDCA_CLK
DDCA_DATA
VSYNC
HSYNC
BLUE
BLUE#
GREEN
GREEN#
RED
RED#
REFSET
VCC_DAC
VCC_DAC
VCCA_DAC
VSSA_DAC
EXTTS#
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AN16
AN18
AN20
AN22
AN24
AN26
AN28
AN30
MSI
AN32
AR9
Title
Size Document Number Rev
Date: Sheet of
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
Intel Springdale-N
AR23
AR11
AR13
AR16
AR20
MICRO-STAR INt'L CO., LTD.
Intel Springdale - AGP & HLink & LAN Signals
2
C102
0.1u
HI0
HI1
HI2
HI3
HI4
HI5
HI6
HI7
HI8
HI9
CI0
CI1
CI2
CI3
CI4
CI5
CI6
CI7
CI8
CI9
VCC_AGP
HL0
AF5
HL1
AG3
HL2
AK2
HL3
AG5
HL4
AK5
HL5
AL3
HL6
AL2
HL7
AL4
HL8
AJ2
HL9
AH2
HL10
AJ3
AH5
AH4
HL_COMP
AD4
AE3
AE2
AK7
AH7
AD11
AF7
AD7
AC10
AF8
AG7
AE9
AH9
AG6
AJ6
AJ5
CI_RCOMP
AG2
CI_SWING
AF2
CI_VREF
AF4
G4
F2
H3
E2
G3
H7
G6
H6
G5
F4
E4
GSET
D2
G1
G2
CB107
0.1u
VCCA_DAC
C2
D3
C97
CB104
0.1u
0.01u
AP8
AG9
AG10
AN35
AP34
AR1
AR25
AR27
AR29
AR32
(MS-6584)
R253 52.3RST
0.01uC122
0.01uC119
R273 52.3RST
R215 137RST
100nH-300mA
CT31
470u_10V
1
HL_STRF {9}
HL_STRS {9}
DOT_48 {10}
3VDDCCL {12}
3VDDCDA {12}
CRT_VSYNC {12}
CRT_HSYNC {12}
CRT_B {12}
CRT_G {12}
CRT_R {12}
VCC3
R214 0
L7
DEMO SCH use
100uH
inductor.
7 28Tuesday, September 17, 2002
1
HL[0..10] {9}
VCC_AGP
HL_SWING {25}
HL_VREF {25}
VCC_AGP
VCC_DAC
Max 250mA.
0A
8
7
6
5
4
3
2
1
VCC1_5SB
VCC3 VCC_AGP VCC3_SBVCC3_SB
B5F6G1H6K6L6M10
D D
C C
AD[0..31]{14,18}
C_BE#[0..3]{14,18}
FRAME#{14,18}
IRDY#{14,18}
TRDY#{14,18}
DEVSEL#{14,18}
STOP#{14,18}
PERR#{14,18}
SERR#{14,18}
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C_BE#0
C_BE#1
C_BE#2
C_BE#3
PAR{14,18}
LOCK#{18}
PCI_PME#{14,18}
PIRQ#A{14,18}
PIRQ#B{18}
B B
PIRQ#C{18}
PIRQ#D{18}
PIRQ#E{18}
PIRQ#F{18}
PIRQ#G{18}
PIRQ#H{18}
PREQ#[0..4]{14,18}
PGNT#2{18}
PGNT#3{14}
PGNT#4{18}
ATADET0{20}
ATADET1{25}
PREQ#0
PREQ#1
PREQ#2
PREQ#3
PREQ#4
PGNT#2
PGNT#3
PGNT#4
ICH_PCLK{10}
A A
PCIRST_ICH5#{5,23}
8
U3A
J4
AD0
J5
AD1
G3
AD2
K4
AD3
H5
AD4
H2
AD5
J3
AD6
J2
AD7
K5
AD8
F2
AD9
M4
AD10
H4
AD11
L5
AD12
G2
AD13
K1
AD14
G5
AD15
G4
AD16
L1
AD17
B2
AD18
P5
AD19
H3
AD20
N5
AD21
C4
AD22
N4
AD23
E6
AD24
P3
AD25
D3
AD26
N2
AD27
F5
AD28
P4
AD29
F4
AD30
P2
AD31
E3
C/BE0#
J1
C/BE1#
N3
C/BE2#
M2
C/BE3#
D2
FRAME#
M3
IRDY#
E4
TRDY#
L3
DEVSEL#
E5
STOP#
F1
PAR
K2
PERR#
L4
SERR#
L2
PLOCK#
V2
PME#
B3
PIRQA#
E1
PIRQB#
A2
PIRQC#
C2
PIRQD#
D7
PIRQE#/GPI2
A6
PIRQF#/GPI3
E2
PIRQG#/GPI4
B1
PIRQH#/GPI5
D5
REQ0#
C1
REQ1#
C5
REQ2#
B6
REQ3#
C6
REQ4#/GPI40
D4
GNT0#
A3
GNT1#
B7
GNT2#
C7
GNT3#
A4
GNT4#/GPO48
A5
REQA#/GPI0
E7
REQB#REQ5#/GPI1
E8
GNTA#/GPO16
B4
GNTB#/GNT5#/GPO17
N1
PCICLK
V4
PCIRST#
Intel ICH5-N
7
VCC3_3
VCC3_3
G19
G21
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
GND
GND
A1A7A10
N10P6R13
VCC3_3
VCC3_3
VCC3_3
GND
GND
GND
A15
A17
VCC3_3
GND
A19
A21
V19
W15
VCC3_3
VCC3_3
VCC3_3
GND
GND
GND
A23
AA5
W17
W24
VCC3_3
GND
AA7
AA9
AD13
AD20
VCC3_3
VCC3_3
VCC3_3
GND
GND
GND
AA11
AA13
6
GND
AA21
K10
K12
VCC1_5
GND
AA24
AB5
K13
L19
VCC1_5
VCC1_5
VCC1_5
GND
GND
GND
AB7
AB9
P19
R10R6H24
VCC1_5
GND
AB11
AB15
VCC1_5
VCC1_5
VCC1_5
GND
GND
GND
AB18
AC2
J19
K19
VCC1_5
GND
AC4
AC6
M15
N15
VCC1_5
VCC1_5
VCC1_5
GND
GND
GND
AC8
AC10
N23
E15
VCC1_5
GND
AC13
AC23
F15
F14
VCC1_5
VCC1_5
VCC1_5
GND
GND
GND
AD4
AD6
W19
R12W9W10
VCC1_5
GND
AD8
AD17
5
VCC1_5
VCC1_5
VCC1_5
GND
GND
GND
AD21
AD12
W11W6W7W8E22
VCC1_5
VCC1_5
VCC1_5
VCC1_5
GND
GND
GND
GND
B13
B17
B19
B21
B23C3C8
B15
VCC1_5
VCCSUS3_3
GND
GND
GND
E13
E14
E18
F16
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
GND
GND
GND
C16
C18
C20
C22D1D6
F17
F18
K15U6V6
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
GND
GND
GND
GND
D11
VCC1_5SB_A
F19Y5AA4
VCCSUS3_3
VCCSUS3_3
GND
GND
GND
D16
D18
D20
D22
4
VCC1_5SB_B
AB4F7F8
VCCSUS1_5A
VCCSUS1_5B
VCCSUS1_5B
VCCSUS1_5B
GND
GND
GND
GND
GND
D24
E17
E19
E20
E21
VCC1_5SB_C
E11
F10
F11
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
VCCLAN3_3/VCCSUS3_3
VCCLAN3_3/VCCSUS3_3
VCCLAN3_3/VCCSUS3_3
VCCLAN1_5/VCCSUS1_5C
PDD12
VCCLAN1_5/VCCSUS1_5C
PDD13
PDD14
PDD15
PDA0
PDA1
PDA2
PDCS1#
PDCS3#
PDIOR#
PDIOW#
PIORDY
PDDREQ
PDDACK#
IRQ14
SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15
SDA0
SDA1
SDA2
SDCS1#
SDCS3#
SDIOR#
SDIOW#
SIORDY
SDDREQ
SDDACK#
IRQ15
AC_SDIN0
AC_SDIN1
AC_SDIN2
AC_SDOUT
AC_SYNC
AC_BIT_CLK
AC_RST#
GND
GND
GND
GND
E23F3F9
AB16
Y13
Y14
AC14
AA14
AC15
AD14
AB14
AD15
Y15
AD16
AA15
AC16
Y16
AA16
AB17
AA19
AD19
AC19
AB19
Y18
AD18
AA17
AA18
AC17
AC18
Y17
AA22
AB23
AD23
AD24
AB21
AC21
AB20
AC20
Y19
AD22
AC22
AA20
AB22
AC24
AB24
AA23
W22
W23
W21
V22
V20
Y23
Y22
Y21
Y20
W20
Y24
E12
D12
A13
A9
B8
D8
C12
3
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
R353 33
R355 33
PDD[0..15] {20}
ICH5 Decoupling Capacitors
All caps be placed less than 100mils.
PD_A0 {20}
PD_A1 {20}
PD_A2 {20}
PD_CS#1 {20}
PD_CS#3 {20}
PD_IOR# {20}
PD_IOW# {20}
PD_IORDY {20}
PD_DREQ {20}
PD_DACK# {20}
IRQ14 {20}
SD_IORDY {25}
IRQ15 {25}
AC_SDIN0 {13}
AC_SDOUT {13}
AC_SYNC {13}
AC_BITCLK {13}
AC_RST# {13}
MSI
Title
Size Document Number Rev
Date: Sheet of
VCC3 VCC3
CB139
0.1u
CB136
0.1u
CB143
0.1u
Close A1,A7,H1,P1,AD12 and AD21 of ICH5.
VCC3_SB
0.1uF close A15,A23, and V1 of ICH5.
Another close A17,A19 and A21 of ICH5.
CB146
0.1u
CB145
1u-0805
CB120
0.1u
CB140
0.1u
CB141
0.1u
VCC3_SB
Close L24,C24,D8,G24,M24 and AD18 of ICH5.
VCC_AGP
CB129 0.01u
Close AD18 of ICH5.
VCC1_5SB
VCC1_5SB_A
VCC1_5SB_B
VCC1_5SB_C
MICRO-STAR INt'L CO., LTD.
Intel ICH5 - PCI & IDE & AC97 Signals
(MS-6584)
2
VCC_AGPVCC_AGP
8 28Tuesday, September 17, 2002
X_0.01u_(S/S)
CB147
0.1u
CB131
0.1u
CB138
0.1u
1
CB135
0.1u
CB128
0.1u
CB186
0.1u
CB195
X_0.1u(S/S)
CB137
Solder
CB194
0.22u
CB102
0.1u
CB122
0.1u
CB130
0.1u
0A
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