MSI MS-6541 Schematics

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MS-6541
D D
Cover Sheet Block Diagram Clock CY28323 & ATA100 IDE CONNECTORS mPGA478-B INTEL CPU Sockets INTEL Brookdale-G GMCH -- North Bridge
1 2
3 4 - 5 6 - 8
INTEL (R) Brookdale-G Chipset Willamette/Northwood 478pin mPGA-B Processor Schematics
CPU:
Willamette/Northwood mPGA-478B Processor
System Brookdale-G Chipset:
Micro-ATX
INTEL GMCH (North Bridge) +
INTEL ICH4 -- South Bridge LPC I/O -- LPC47B367
C C
AC'97 Codec AD1981/1885 & Internal Speaker
9-10
11
12
INTEL ICH4 (South Bridge)
On Board Chipset:
BIOS -- FWH
FWH -- BIOS & SMBus Isolation DDR DIMM1&2 and DDR Terminator Resistor AGP Slot PCI SLOT 1 & 2 & 3 IO Connectors USB Connectors Front Panel & ATX Connectors
B B
13
14-15
16
17
18
19
20
AC'97 Codec -- AD1981/1885 LPC Super I/O -- LPC47B367 Clock Generation -- CY28323 LAN -- Intel KINNERITH controller
Expansion Slots:
PCI2.2 SLOT * 3 PCI Extender Connector * 1
Votlage Regulator DDR REGULATOR Intersil HIP6301V+HIP6601A/02A-- CPU Power
21
22
23
PCI Extender & Front Audio Connector 24 LAN KINNERITH 10/100/Mbit Controller VGA Connector Manual Part
A A
8
7
6
25
26
27
28-29GPIO SETTTING
5
4
3
MSI
Title
Size Document Number Rev
Date: Sheet of
2
MICRO-STAR
H/W Project Leader : Joey Lee H/W Project Engineer : Daniel Lee
COVER SHEET
MS-6541I1
1 29Tuesday, March 05, 2002
1
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ITP Port
VCC12 Power Supply CONN
VRM 9.2 CK408 Clock
Willamette/Northwood Socket (mPGA478-B)
(100/133MHz)
Scalable Bus
(100/133MHz)
AGP 4X (1.5V) VGA CONN
C C
4X (66MHz) AGP
GMCH: Graphic & Memory Controller HUB
HUB Interface
(200/266 MHz)
DDR DIMM1,2
(14.318MHz)
Hardware Monitor
IDE CONN 1&2
USB Port 0:1 USB Back Panel
USB Port 2:3 USB Back Panel
B B
USB Port 4:5 USB Front Panel
PS2 Mouse & Keyboard
SM Bus
ATA33/ATA66/ATA100
(48MHz)
LPC Bus
SMC I/O LPC47M133
Parallel (1) Serial (2)
ICH4: I/O
Controller HUB
(33MHz)
FWH: Firmware HUB
Brookdale -G Chipset
Floppy Disk Drive
(33MHz)
PCI (33MHz)
PCI (33MHz)
AC Link
PCI Slots 1:3
LAN Controller
AC '97 Audio
Codec
MIC In
Line In
Line Out
CD-ROM (Option)
A A
MSI
Title
Size Document Number Rev
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Date: Sheet of
2
MICRO-STAR
H/W Project Leader : Joey Lee H/W Project Engineer : Daniel Lee
BLOCK DIAGRAM
MS-6541I1
2 29Tuesday, March 05, 2002
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CLOCK GENERATOR BLOCK
Shut Source Termination Resistors
U1
39
CPU_VDD
CB2
0.1u
36
CPU_GND
46
MREF_VDD
CB3
0.1u
43
MREF_GND
CB4
0.1u
29
3V66_GND
9
PCI_VDD
CB6
0.1u
5
PCI_GND
18
PCI_VDD
CB5
0.1u
13
PCI_GND
24
48_VDD
C24
0.01u
21
48_GND
2
REF_VDD
C27
0.01u
47
REF_GND
34
CORE_VDD
C26
0.01u
33
CORE_GND
26
SCLK
25
SDATA
19
VTT_GD#
CYPRESS CY28323/ICS 950208, 950213
R39 X_1K
CPU0#
CPU1#
CPU2/CPU_STP#
CPU2#/PCI_STP#
3V66_03V66_VDD 3V66_1 3V66_2 3V66_3
FS2/PCI_F0 FS3/PCI_F1
MODE/PCI_F2
FS4/PCI0
FS0/48MHz
FS1/24_48MHz
MUL0/REF0 MUL1/REF1
PWR_DN#
CPU0
CPU1
PCI1 PCI2 PCI3 PCI4 PCI5 PCI6
IREF
RST#
CPU0
41
CPU0#
40
CPU1
38
CPU1#
37
CPU2 ITP_CLK
45
CPU2#
44
3V66_0
3132
3V66_1
30 28 27
6 7
PCI_F2
8
FS4
10
PCI1
11
RN2
12
PCI3
33
14
PCI4
15
PCI5
16 17
22 23
48 1
3
X1
4
X2
35 20
42
R643 33
FS0 FS1
MUL0 MUL1
CLK_X1
X1 14M-32pf-HC49S-D
CLK_X2
32pF
IREF
R28 475_1%
Iref = 2.32mA
R37 1K
R2 27.4_1% R4 27.4_1%
R10 27.4_1% R12 27.4_1%
R765 27.4_1% R766 27.4_1%
R13 33 R508 33 R588 33
R20 33 R15 33 R16 33
7 8 5 6 3 4 1 2
R26 33 R27 33
R808 X_33 R24 33 R25 33 R799 33
10u-12060.1u
SMBDATA_ISO(13)
CB273
10u-1206
CB311
10u-0805
SMBCLK_ISO(13)
VCC3V
CB275
CLK_VCC3
R30 2.2K
VCC3V
VCC3VAVCC3VA
SMBCLK_ISO SMBDATA_ISO
R9 1K
VTT_GD#
CB7
filtering from 10K~1M
VCC3
VCC3
-PWRGD_30MS(11)
FB1 80S/0805
FB2 80S/0805
CB1
0.1u
for good filtering from 10K~1M
R757 10
VCC3
D D
C C
CPUCLK CPUCLK#
MCHCLK MCHCLK#
ITP_CLK#
MCH_66 ICH_66 AGPCLK3V66_2
ICH_PCLKFS2 SIO_PCLKFS3 FWH_PCLK
PCICLK0 PCICLK1PCI2 PCICLK2 PCICLK3 PCICLK4
ICH_48
DOT_CLK
BITCLK_14 SIO_14 ICH_14 CODEC_14
22pC23
22pC25
VCC3VPWR_DN#
CPUCLK (4) CPUCLK# (4)
MCHCLK (6) MCHCLK# (6)
ITP_CLK (4) ITP_CLK# (4)
MCH_66 (6) ICH_66 (10) AGPCLK (16)
ICH_PCLK (9) SIO_PCLK (11) FWH_PCLK (13)
PCICLK0 (17) PCICLK1 (17) PCICLK2 (17) PCICLK3 (24) PCICLK4 (24)
ICH_48 (10) DOT_CLK (6)
BITCLK_14 (10) SIO_14 (11) ICH_14 (10) CODEC_14 (12)
CPUCLK CPUCLK# MCHCLK
MCHCLK# ITP_CLK ITP_CLK#
Trace less 0.2"
49.9ohm for 50ohm M/B impedance
CLOCK STRAPPING RESISTORS
FS4 VCC3V FS3 VCC3V
FS1
R767 10K
FS0
R768 10K R642 1.5K
X_2N3904S
FS4 FS3
1 1 1 1
MUL0
MUL1
R1 49.9_1% R3 49.9_1% R5 49.9_1%
R7 49.9_1% R763 49.9_1% R764 49.9_1%
R639 10K R640 10K R641 10K
Q66
VCC3VFS2
R18 1.5K
Q66_C
Q66_B BSEL0
BSEL0="0" FOR 100 PSB, "1" FOR 133 PSB
FS2 FS1 FS0
VCC3V
VCC3V
R644 X_1K
CPU (MHz) 1 0 1 100 MHz 1 1 1 133 MHz
R31 X_1K R727 10K
R509 X_1K R36 10K
VCC3V
VCC3V
BSEL0 (4)
MUL 1:0 0 0 4X
0 1 5X 1 0 6X 1 1 7X
Pull-Down Capacitors
CPUCLK CPUCLK# MCHCLK MCHCLK# ITP_CLK ITP_CLK# MCH_66 ICH_66 AGPCLK ICH_PCLK FWH_PCLK PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4 SIO_PCLK ICH_14 SIO_14 ICH_48
DOT_CLK CODEC_14 BITCLK_14
used only for EMI issue
Trace less 0.2"
SMBCLK_ISO SMBDATA_ISO
R29 4.7K R32 4.7K
X_10pC1 X_10pC2 X_10pC3 X_10pC4 X_10pC324 X_10pC325 X_10pC7 X_10pC8 X_10pC9 X_10pC10 X_10pC11 X_10pC13 X_10pC14 X_10pC15 X_10pC12 X_10pC309 X_10pC16 10pC18 10pC19 X_10pC20 X_10pC21 10pC327 X_10pC328
VCC3
PRIMARY IDE BLOCK SECONDARY IDE BLOCK
PRIMAR1
R48 10K
VCC3
YJ220-CB-1
1 3 4 5 6 7 8 91110
13 14 17 18
19 21 23 25 27 29 31 33 35 37
2
PDD8 PDD9 PDD10 PDD11 PDD12
12
PDD13 PDD14
1615
PDD15
VCC5 VCC5
22 24 26 28
R645
30
20K
32 34 36 38 4039
C30
X_4700p
6
B B
A A
PDD[0..7](10)
PD_DREQ(10)
PD_IOW#(10)
PD_IOR#(10) PD_IORDY(10) PD_DACK#(10)
IRQ14(9)
PD_A1(10)
PD_CS#1(10) PD_CS#3 (10)
PD_LED(20)
PCIRST#(9)
PCIRST# PCIRST#
8
PDD7 PDD6 PDD5 PDD4 PDD3 PDD2 PDD1 PDD0
R47
C29
4.7K
VCC5 VCC5VCC3
220p
RESET BLOCK
U2A
1 2
DM7407-SOIC14
(VCC5_SB) (VCC5_SB)
R51 330
PCIRST#1 (6,11,13)
7
PRIMAR1_1HD1_RST#
R43 33 R44 33
ATA100 IDE CONNECTORS
PDD[8..15] (10)
ATADET0(11) PD_A2 (10)PD_A0(10)
U2B
3 4
DM7407-SOIC14
R52 1K
HD2_RST#
5
VCC5
PCIRST# HD1_RST#
SECON1
HD2_RST#
R53 1K
SDD7 SDD6 SDD5 SDD4 SDD3 SDD2 SDD1 SDD0
R49
C31
4.7K
220p
VCC5
3
SDD[0..7](10)
SD_DREQ(10)
SD_IOW#(10)
SD_IOR#(10) SD_IORDY(10) SD_DACK#(10)
IRQ15(9) SD_A1(10) SD_A0(10)
SD_CS#1(10) SD_CS#3 (10)
SD_LED(20)
U2E
11 10
DM7407-SOIC14
(VCC5_SB)
4
SECON_1
R50 10K
VCC3
YJ220-CW-1
1 3 4 5 6 7 8 91110
13 14 17 18
19 21 23 25 27 29 31 33 35 37
2
SDD8 SDD9 SDD10 SDD11 SDD12
12
SDD13 SDD14
1615
SDD15
22 24 26 28
R646
30
20K
32 34 36 38 4039
C32
X_4700p
MSI
Title
Clock CY28323 & ATA100 IDE CONNECTORS
Size Document Number Rev
Date: Sheet of
2
* Trace Width : 5mils * Trace Spacing : 7mils * Length(longest)-Length(shortest)<0.5" * Trace Length less than 5"
SDD[8..15] (10)
ATADET1(11) SD_A2 (10)
MICRO-STAR
H/W Project Leader : Joey Lee H/W Project Engineer : Daniel Lee
MS-6541I1
3 29Tuesday, March 05, 2002
1
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CPU GTL REFERNCE VOLTAGE BLOCKCPU SIGNAL BLOCK
VID0
AE5
VID0#
GTLREF3 GTLREF2 GTLREF1 GTLREF0
TESTHI12 TESTHI11 TESTHI10
TESTHI9 TESTHI8 TESTHI7 TESTHI6 TESTHI5 TESTHI4 TESTHI3 TESTHI2 TESTHI1 TESTHI0
ADSTB1# ADSTB0# DSTBP3# DSTBP2# DSTBP1# DSTBP0# DSTBN3# DSTBN2# DSTBN1# DSTBN0#
LINT1/NMI
LINT0/INTR
D2#
D1#
A23
B22
B21
HD#0
HD#2
HD#1
BPM5# BPM4# BPM3# BPM2# BPM1# BPM0#
REQ4# REQ3# REQ2# REQ1# REQ0#
BCLK1# BCLK0#
RS2# RS1# RS0#
AP1# AP0# BR0#
COMP1 COMP0
DP3# DP2# DP1# DP0#
D0#
ITP_CLK# (3) ITP_CLK (3)
VID[0..4] (11,23)
AA21 AA6 F20 F6
AB4 AA5 Y6 AC4 AB5 AC6
H3 J3 J4 K5 J1
AD25 A6 Y3 W4 U6 AB22 AA20 AC23 AC24 AC20 AC21 AA2 AD24
AF23 AF22
F4 G5 F1
V5 AC1 H6
P1 L24
L25 K26 K25 J26
R5 L5 W23 P23 J23 F21 W22 R22 K22 E22
E5 D1
SOCKET478
GTLREF1
BPM#5 BPM#4 BPM#3 BPM#2 BPM#1 BPM#0
HREQ#4 HREQ#3 HREQ#2 HREQ#1 HREQ#0
TESTHI11 TESTHI10 TESTHI9 TESTHI8
TESTHI1
HRS#2 HRS#1 HRS#0
COMP1 COMP0
R59 51 R60 51 R61 51 R62 51
R592 51
R64 51.1_1% R65 51.1_1%
* Short trace
HREQ#[0..4] (6)
VCCP
CPUCLK# (3) CPUCLK (3)
HRS#[0..2] (6)
HBR#0 (6)
HADSTB#1 (6) HADSTB#0 (6) HDSTBP#3 (6) HDSTBP#2 (6) HDSTBP#1 (6) HDSTBP#0 (6) HDSTBN#3 (6) HDSTBN#2 (6) HDSTBN#1 (6) HDSTBN#0 (6)
NMI (9) INTR (9)
BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5
ITP_TCK
ITP_CLK ITP_CLK# BPM#5
C323 220p
2/3*Vccp
GTLREF1
Every pin put one 220pF cap near it. Trace Width 7mils, Space 10mils. Keep the voltage divider within
1.5" of the GETREF pin.
CPU ITP BLOCK
-C_BMP2
-C_BMP3
-ITP_RSTCPURST#
R770
X_0
R774 150 R775 0
R776 150
R777 1.5K R778 49.9_1%
R779 X_220
R780 51 R781 51 R782 51 R783 51 R784 51 R785 51
R74 39 R76 75
R77 27
R769
X_0
R771 0 R772 0
R773 0
-ITP_DBR
-ITP_DBA
ITP_VCC
-ITP_RST
ITP_FBI BPM#4
BPM#5 BPM#2 BPM#3 BPM#1 BPM#0
ITP_TMS ITP_TDO
ITP_TCK
VCCP
R54
49.9_1%
C35
1u-0805
VCC3
TRST#
VCC3
VCCP
VCCP
DBA# DBR#
GND TMS
GND
VCCP
R55 100_1%
TDI
LPC_MR# (11)
C34
0.1u
JTAG1
1 2
GND GND
3
BPM#0
5
BPM#1
7
BPM#2
9
BPM#3
11
BPM#4
13
BPM#5
15 16
RESET# TCK
17 18
FBO FBI
19
BCLK
21 22
BCLK# VCC
23 24
BPM5DR# TDO
25
GND
JTAG
-ITP_DBA
4
-ITP_DBR
6 8
ITP_TDI
10
ITP_TMS
12
ITP_TRST#
14
ITP_TCK ITP_FBI
20
ITP_VCC ITP_TDO
HA#[3..31](6)
HA#8
HA#22
HA#25
HA#23
HA#26
HA#27
HA#28
HA#30
HA#29
D D
HINV#[0..3](6)
FERR#(9)
STPCLK#(9)
HINIT#(9)
HDBSY#(6)
HDRDY#(6)
HTRDY#(6)
HADS#(6)
HLOCK#(6)
HBNR#(6)
HITM#(6)
C C
B B
HBPRI#(6)
HDEFER#(6)
CPU_TEM+(11) CPU_TEM-(11)
TRMTRIP#(9,11) SKTOCC#(11) PROCHOT#(10,11)
IGNNE#(9)
HSMI#(9) A20M#(9)
SLP#(9)
BSEL0(3,6)
CPU_GD(10)
CPURST#(6)
HD#[0..63](6)
HINV#0 HINV#1 HINV#2 HINV#3
HINIT#
HIT#(6)
ITP_TDI ITP_TDO ITP_TMS ITP_TRST# ITP_TCK
TRMTRIP# SKTOCC#
CPU_GD CPURST# HD#63
HD#62 HD#61 HD#60 HD#59 HD#58 HD#57 HD#56 HD#55 HD#54
AF26
AB26
AE21 AF24 AF25
AB23 AB25 AA24
AA22 AA25
E21
G25
P26 V21
AC3
AA3
W5
AB2
G1 G4 G2
A22
AD2 AD3
AD6 AD5
Y21 Y24 Y23
W25
Y26
W26
V24
U3A
V6 B6 Y4
H5 H2
J6
F3 E3 D2 E2
C1 D5 F7 E6 D4 B3 C4 A2
C3 B2 B5 C6
A7
DBI0# DBI1# DBI2# DBI3#
IERR# MCERR# FERR# STPCLK# BINIT# INIT# RSP#
DBSY# DRDY# TRDY#
ADS# LOCK# BNR# HIT# HITM# BPRI# DEFER#
TDI TDO TMS TRST# TCK THERMDA THERMDC THERMTRIP# GND/SKTOCC# PROCHOT# IGNNE# SMI# A20M# SLP#
RESERVED0 RESERVED1 RESERVED2 RESERVED3 RESERVED4 RESERVED5 RESERVED6
BSEL0 BSEL1
PWRGOOD RESET# D63#
D62# D61# D60# D59# D58# D57# D56# D55# D54#
D53#
V22
HD#53
HA#31
AB1Y1W2V3U4T5W1R6V2T4U3P6U1T2R3P4P3R2T1N5N4N2M1N1M4M3L2M6L3K1L6K4K2
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
A26#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
D41#
U21
V25
U23
U24
U26
T23
T22
T25
T26
R24
R25
P24
R21
HD#52
HD#51
HD#48
HD#50
HD#49
HD#41
HD#47
HD#46
HD#45
HD#42
HD#44
HD#43
HD#40
HA#24
A25#
D40#
N25
HD#39
A24#
D39#
N26
HD#38
A23#
D38#
M26
HD#37
HA#21
A22#
D37#
N23
HD#36
HA#20
A21#
D36#
M24
HD#35
HA#19
A20#
D35#
P21
HD#34
HA#18
A19#
D34#
N22
HD#33
HA#17
A18#
D33#
M23
HD#32
HA#16
A17#
D32#
H25
HD#31
A16#
D31#
HA#15
K23
HD#30
HA#14
A15#
D30#
J24
HD#29
HA#13
A14#
D29#
L22
HD#28
HA#12
A13#
D28#
M21
HD#27
HA#11
A12#
D27#
H24
HD#26
HA#10
A11#
D26#
G26
HD#25
HA#9
A10#
D25#
L21
HD#24
A9#
D24#
D26
HD#23
HA#7
A8#
D23#
F26
HD#22
HA#6
A7#
D22#
E25
HD#21
HA#5
A6#
D21#
F24
HD#20
HA#4
A5#
D20#
F23
HD#19
HA#3
A4#
D19#
G23
HD#18
A3#
D18#
E24
HD#17
AE25A5A4
D17#
D16#
H22
D25
HD#16
DBR#
D15#
HD#15
J21
HD#14
NC_VCC_SENSE
D14#
D23
HD#13
NC_VSS_SENSE
AD26
AC26
ITP_CLK1
ITP_CLK0
VCC_SENSE
VSS_SENSE
D13#
D12#
D11#
D10#
D9#
C26
H21
G22
B25
C24
HD#8
HD#9
HD#10
HD#11
HD#12
D8#
C23
HD#7
D7#
VID4
AE1
B24
HD#6
VID3
AE2
VID4#
VID3#
D6#
D5#
D22
HD#5
VID2
AE3
C21
HD#4
VID1
AE4
VID2#
VID1#
D4#
D3#
A25
HD#3
A A
BPM#4 BPM#5 BPM#2 BPM#3 BPM#1 BPM#0
8
R82 51 R85 51 R87 51 R88 51 R787 51 R788 51
CPU STRAPPING RESISTORS
VCCP
7
ITP_TDI
-ITP_DBR ITP_TRST#
ALL COMPONENTS CLOSE TO CPU
PROCHOT#
R79 150 R80 300 R786 X_150 R83 680
6
VCCP
CPU_GD HBR#0 CPURST# HINIT#
5
R78 62 R81 150
R84 51 R86 X_300
VCCP
CB9
0.1u
ALL COMPONENTS CLOSE TO CPU
4
CB10
0.1u
VCCP
3
MSI
Title
Size Document Number Rev
Date: Sheet of
mPGA478-B INTEL CPU SOCKET Part1
2
MICRO-STAR
H/W Project Leader : Joey Lee H/W Project Engineer : Daniel Lee
MS-6541I1
4 29Tuesday, March 05, 2002
1
0AE0
Page 5
8
D D
AA11 AA13 AA15 AA17 AA19 AA23
C C
B B
AA26
AB10 AB12 AB14 AB16 AB18 AB20 AB21 AB24
AC11 AC13 AC15 AC17 AC19
AC22 AC25
VCCP
A10
A12
A14
A16
A18
VSS
AD10
VCC
VSS
AD12
VCC
VSS
AD14
VCC
VSS
AD16
VCC
VSS
AD18
AD21
A20A8AA10
VCC
VCC
VSS
VSS
AD4
AD23
U3B
D10
VSS
A11
VSS
A13
VSS
A15
VSS
A17
VSS
A19
VSS
A21
VSS
A24
VSS
A26
VSS
A3
VSS
A9
VSS
AA1
VSS VSS VSS VSS VSS VSS VSS VSS
AA4
VSS
AA7
VSS
AA9
VSS VSS VSS VSS VSS VSS VSS VSS VSS
AB3
VSS
AB6
VSS
AB8
VSS VSS VSS VSS VSS VSS
AC2
VSS VSS VSS
AC5
VSS
AC7
VSS
AC9
VSS
AD1
VSS
VCC
VSS
AD8
AA12
VCC
VSS
AE11
VCC
VSS
AA14
VCC
VSS
AE13
AA16
VCC
VSS
AE15
AA18
VCC
VSS
AE17
7
AA8
VCC
VSS
AE19
AB11
VCC
VSS
AE22
CPU VOLTAGE BLOCK
AB13
AB15
AB17
AB19
AB7
AB9
AC10
AC12
AC14
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE24
AE26
AE7
AE9
AF1
AF10
AF12
AF14
AF16
AC16
VCC
VSS
AF18
AC18
VCC
VSS
AF20
AC8
AF6
VCC
VSS
AD11
VCC
VSS
AF8
AD13
VCC
VSS
B10
AD15
VCC
VSS
B12
AD17
VCC
VSS
B14
AD19
VCC
VSS
B16
AD7
B18
6
AD9
VCC
VSS
B20
VCC
VSS
AE10
VCC
VSS
B23
AE12
AE14
VCC
VCC
VSS
VSS
B26B4B8
AE16
VCC
VSS
AE18
VCC
VSS
C11
AE20
VCC
VSS
C13
AE6
C15
AE8
VCC
VSS
C17C2C19
AF11
VCC
VSS
AF13
VCC
VSS
AF15
VCC
VSS
C22
AF17
AF19
AF2
AF21
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
C25C5C7C9D12
AF5
VCC
VSS
VCC
VSS
AF7
D14
AF9
VCC
VSS
D16
5
CB228 X_0.1u
VCC5
R811 X_5.1K CB315 X_0.1u
VCCVID_GD(23)
B11
B13
B15
B17
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
D18
D20
D21D3D24D6D8E1E11
B19B7B9
VCC
VCC
VSS
VSS
VCC
VSS
C10
VCC
VSS
VCC
VSS
C12
VCC5
C14
VCC
VSS
E13
C16
VCC
VSS
E15
EN
C18
VCC
VSS
E17
C20C8D11
VCC
VCC
VSS
VSS
E19
4
U42
1
VIN
VOUT
2
GND
3 4
EN POK
X_TTPM0125
D13
D15
D17
D19D7D9
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
E23
E7E9F10
F12
E4
E26
VCC
VSS
F14
E10
VCC
VSS
F16
5
E12
VCC
VCC
VSS
VSS
F18F2F22
E14
E16
VCC
VSS
E18
VCC
VSS
F25F5F8
E20E8F11
VCC
VCC
VSS
VSS
VCC_VID
VCC
VCC
VSS
VSS
G21G6G24
+
EC1
ELS10/16
F13
F15
F17
VCC
VCC
VSS
VSS
G3H1H23
VCC
VSS
3
2
CPU_IOPLL CPU_VCCA
10u-1206
AD22
Y5 Y25 Y22 Y2 W6 W3 W24 W21 V4 V26 V23 V1 U5 U25 U22 U2 T6 T3 T24 T21 R4 R26 R23 R1 P5 P25 P22 P2 N6 N3 N24 N21 M5 M25 M22 M2 L4 L26 L23 L1 K6 K3 K24
CB312
YREG431L
3 1
VR8
CB316
0.1u
F19
AF4
F9
VCC
VCC
VCC-VID
VSS
VSS
VSS
VSS
VSS
H26H4J2
AE23
AF3
VCC-IOPLL
VCC-VIDPRG
VSS
VSS
VSS
VSS
J22
J25J5K21
1u-0603
AD20
VSSA
VCCA
SOCKET478
C331
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
2
RN75
330
C39 22u-1206
VSSA
22u-1206
Keep the 22uF cap within 0.6" of the CPU pin. Trace Width 12mils, Space 10mils.
VCC5 78 56 34 12
L23 4.7uH-1206 L24 4.7uH-1206
CB313
10u-1206
C40
CB317
0.1u
1
VCCP
CPU DECOUPLING CAPACITORS
VCCP VCCP
A A
CB12 10u-1206 CB19 10u-1206 CB26 10u-1206 CB33 10u-1206 CB40 10u-1206 CB47 10u-1206 CB53 10u-1206
Place 14 pcs 1206 size cap north side of processor
8
CB13 10u-1206 CB20 10u-1206 CB27 10u-1206 CB34 10u-1206 CB41 10u-1206 CB48 10u-1206 CB54 10u-1206
CB14 10u-0805 CB21 10u-0805 CB28 10u-0805 CB35 10u-0805 CB42 10u-0805 CB49 10u-0805 CB55 10u-0805 CB18 10u-0805 CB25 10u-0805
PLACE CAPS WITHIN CPU CAVITY
7
VCCPVCCP VCCP
6
CB15 10u-0805 CB22 10u-0805 CB29 10u-0805 CB36 10u-0805 CB43 10u-0805 CB50 10u-0805 CB56 10u-0805 CB59 10u-0805 CB32 10u-0805
VCCP
Place these caps on south side of processor
CB39 10u-0805 CB46 10u-0805 CB52 10u-0805 CB57 10u-0805 CB60 10u-0805 CB58 10u-0805
5
CB16
0.1u CB24
0.1u CB31
0.1u
4
VCCP
+
+
Solder side
3
CT4 X_150u-2.5V CT5 X_150u-2.5V
MSI
Title
Size Document Number Rev
Date: Sheet of
2
C41 0.1u
VCCP
C42 X_0.1u
VCCP
MICRO-STAR
H/W Project Leader : Joey Lee H/W Project Engineer : Daniel Lee
mPGA478-B INTEL CPU Part2
MS-6541I1
VCC5
/N
VCC5
5 29Tuesday, March 05, 2002
1
0AE0
Page 6
5
HA#[3..31](4) HD#[0..63] (4)
* Length must be matched within +/-0.1"of the Strobe Signals
D D
HBR#0(4)
HBNR#(4)
HBPRI#(4)
HLOCK#(4)
HADS#(4)
HREQ#[0..4](4)
C C
HIT#(4)
HITM#(4)
HDEFER#(4)
HTRDY#(4)
HRS#[0..2](4)
HDBSY#(4)
HDRDY#(4)
HADSTB#0(4) HADSTB#1(4)
HDSTBN#0(4) HDSTBP#0(4) HDSTBN#1(4) HDSTBP#1(4) HDSTBN#2(4) HDSTBP#2(4) HDSTBN#3(4) HDSTBP#3(4)
B B
HINV#[0..3](4)
MCHCLK(3)
MCHCLK#(3)
R94 24.9_1% R95 24.9_1%
HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31
HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4
HRS#0 HRS#1 HRS#2
HINV#0 HINV#1 HINV#2 HINV#3
HY_RCOMP
HX_RCOMP
U4A
W31
HA3#
AA33
HA4#
AB30
HA5#
V34
HA6#
Y36
HA7#
AC33
HA8#
Y35
HA9#
AA36
HA10#
AC34
HA11#
AB34
HA12#
Y34
HA13#
AB36
HA14#
AC36
HA15#
AC31
HA16#
AF35
HA17#
AD36
HA18#
AD35
HA19#
AE34
HA20#
AD34
HA21#
AE36
HA22#
AF36
HA23#
AE33
HA24#
AF34
HA25#
AG34
HA26#
AG36
HA27#
AE31
HA28#
AH35
HA29#
AG33
HA30#
AG31
HA31#
U33
BREQ0#
T34
BNR#
M34
BPRI#
T35
HLOCK#
T36
ADS#
V36
HREQ0#
AA31
HREQ1#
W33
HREQ2#
AA34
HREQ3#
W35
HREQ4#
P36
HIT#
M36
HITM#
N36
DEFER#
V30
HTRDY#
R36
RS0#
U34
RS1#
P34
RS2#
U31
DBSY#
U36
DRDY#
AB35
HAD_STB0#
AF30
HAD_STB1#
N31
HD_STBN0#
L31
HD_STBP0#
G33
HD_STBN1#
J34
HD_STBP1#
C30
HD_STBN2#
E29
HD_STBP2#
D25
HD_STBN3#
E25
HD_STBP3#
N33
DINV_0#
C35
DINV_1#
B33
DINV_2#
C26 H30
DINV_3# HD_VREF0
K30
HCLKP
J31
HCLKN
V35
HY_RCOMP
B28
HX_RCOMP
HOST
Trace 10 mils & 7mils space < 0.5"
BAV99
HL0 HL1 HL2 HL3 HL4 HL5
3
D2
HL[0..5](9)
HL_STB(9)
HL_STB#(9)
A A
CRT_B(26)
CRT_B#(26)
CRT_G(26)
CRT_G#(26)
CRT_R(26)
CRT_R#(26)
VCC_AGP
BAV99
D1
5
AA7
HI0
AB8 AC7 AC5 AD8 AF4 AD3
AD4 AC4
G15
H16 E15
F16 C15
D16
2
2
2
3
3
1
1
1
HUB LINK
HI1 HI2 HI3 HI4 HI5 HI_REF
HI_STBS HI_STBF
VGA
Brookdale_MCH
D3 BAV99
BLUE BLUE#
GREEN GREEN#
RED RED#
4
HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38# HD39# HD40# HD41# HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63#
GCLKIN
RSTIN#
CPURST#
PWROK
HD_VREF1 HD_VREF2
HA_VREF
HCC_VREF
HY_SWNG HX_SWNG
HI_SWING
HL_RCOMP
DDCA_DATA
DDCA_CLK
HSYNC VSYNC
DREFCLK
REFSET
4
HD0# HD1# HD2# HD3# HD4# HD5# HD6# HD7# HD8# HD9#
3
HD#0
T30
HD#1
R33
HD#2
R34
HD#3
N34
HD#4
R31
HD#5
L33
HD#6
L36
HD#7
P35
HD#8
J36
HD#9
K34
HD#10
K36
HD#11
M30
HD#12
M35
HD#13
L34
HD#14
K35
HD#15
H36
HD#16
G34
HD#17
G36
HD#18
J33
HD#19
D35
HD#20
F36
HD#21
F34
HD#22
E36
HD#23
H34
HD#24
F35
HD#25
D36
HD#26
H35
HD#27
E33
HD#28
E34
HD#29
B35
HD#30
G31
HD#31
C36
HD#32
D33
HD#33
D30
HD#34
D29
HD#35
E31
HD#36
D32
HD#37
C34
HD#38
B34
HD#39
D31
HD#40
G29
HD#41
C32
HD#42
B31
HD#43
B32
HD#44
B30
HD#45
B29
HD#46
E27
HD#47
C28
HD#48
B27
HD#49
D26
HD#50
D28
HD#51
B26
HD#52
G27
HD#53
H26
HD#54
B25
HD#55
C24
HD#56
B23
HD#57
B24
HD#58
E23
HD#59
C22
HD#60
G25
HD#61
B22
HD#62
D24
HD#63
G23 AE7
RSTIN#
PWROK
HL6 HL7 HL8 HL9 HL10
HUB_MREF HI_SWING
HL_RCOMP
R99 2.7K R100 2.7K
3VDDCDA 3VDDCCL
HSYNC VSYNC
DOT_CLK
REFSET
R593 0 R819 33
X_10pC294
HVREF HSWNG
R98
R594 47 R595 47
R103 121_1%
68.1_1%
AJ31 D22 E7
H24 D27 AD30 P30
Y30 H28
AE4
HI6
AE5
HI7
AF3
HI8
AE2
HI9
AF2
HI10
AD2 AC2
C7 D7
B7 C6
D14 B16
MCH_66 (3) PCIRST#1 (3) CPURST# (4,11) PWR_GD (20)
Trace 10 mils & 7mils space < 0.5"
VCC_AGP
VCC3
BSEL0(4) 3VDDCDA (26) 3VDDCCL (26)
3V_HSYNC (26) 3V_VSYNC (26)
DOT_CLK (3)
VCC_AGP MEM_STR
HL[6..10] (9)
VCCA_SM
VCC_AGP VCC_AGP
VCCA_DPLL
VCC3
R101 8.2K
R102
8.2K
3
CB71 0.1u
U4C
A3
VCC_AGP
A7 C1 D4 D6
G1
K6
L1
L9 P6 R1 R9
T14 V14
W9
Y14
V6
AD6 AC9
AB14
AC1 AE3
W19
Y19
AA19
T20
W20
AB20
U21
W21
AA21
T22 V22 Y22
AB22
A9 B9 C9 D9 E9
B10 C10 D10 F10 H10 A11 B11 C11 D11 E11
G11
J11 B12 C12 D12 F12 H12
G13
J13 H14 P14
J15 P15 P18
AB18 AB16 AA17
Y16
W18 W17
V19 V16 U19 U17 T18 T16 P17 P16
AG2 AT20 AG1
AD14
A15 B14 A13
C14 B15
B6
PSBSEL
Y3
Y2 AA2 AA4 AA3 AA5
W7
Y4
Y8
A37 AB2 AB3
POWER
VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP
VCC_HI VCC_HI VCC_HI VCC_HI VCC_HI
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
VCCA_SM VCCQ_SM VCCA_SM VCC_HI
VCCA_DAC VCCA_DAC VCCA_DPLL
VSSA_DAC VSSA_DAC VCC_GPIO
PSBSEL RSVD
RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD
Other
Brookdale_MCH
VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM
VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB
VCCA_FSB
VCCQ_SM VCCQ_SM
VTT_DECAP VTT_DECAP VTT_DECAP VTT_DECAP VTT_DECAP
2
AH8 AK8 AG9 AJ9 AL9 AD22 AM22 AJ23 AL37 AU9 AK10 AD24 AJ11 AL11 AU25 AM26 AU13 AM14 AJ27 AJ1 AL1 AJ15 AP15 AU29 AH2 AJ2 AK2 AL2 AM30 AH3 AJ3 AK3 AL3 AH4 AJ4 AK4 AL4 AU17 AD18 AJ5 AL5 AU5 AM18 AJ19 AK32 AU33 AH6 AK6 AD20 AP20 AG7 AJ7 AL7 AP7
B18 C18 D18 H18 B19 C19 D19 E19 G19 J19 B20 C20 D20 F20 H20 P20 P22 P24 T24 V24 AB24 F18 Y24 A17
AT21 AU21
G37 L37 R37 AC37 A31
A2
NC
A36
NC
AH34
NC
AJ35
NC
AT1
NC
AT37
NC
AU1
NC
AU2
NC
AU36
NC
AU37
NC
B1
NC
B37
NC
2
VCCP
VCCA_FSB
VCCQ_SM
VTT_CAP1 VTT_CAP2 VTT_CAP3 VTT_CAP4 VTT_CAP5
Place <0.1"
Title
Size Document Number Rev
Date: Sheet of
GMCH REFERENCE BLOCK
VCCA_FSB
VCCA_DPLL
VCCA_SM
VCCQ_SM
Place Cap. as Close as possible to GMCH
CB66 0.1u CB67 0.1u CB68 0.1u CB69 0.1u CB70 0.1u
Place 0.01uF Cap. as Close as possible to GMCH< 0.25"
Trace width 12 mils & 10mils space
MSI
Brookdale-G GMCH-1 (HOST & HI & VGA)
CB62
0.1u_X7R
+
CB63
C46
X_0.1u
680uF
CB64
0.1u_X7R
CB270
0.1u_X7R
HSWNG
HVREF
, Trace width 12 mils & 10mils space
Keep the voltage divider within 3" of the GMCH pin.
HI_SWING
HUB_MREF
1
L25 0.82uH_0603 C284
22u-1206
L26
L26_1
10uH-0805
L27 1uH-0805
CT10
+
100u_25V
L28 0.68uH-0805 C285
4.7u-0805
C285_2
R520 1
VCCP
R89
301 1%
C48
0.01u
C50
0.1u
MICRO-STAR
R90 150 1%
VCCP
R91
49.9_1%
R92 100_1%
C52
0.01u
C53
0.01u
H/W Project Leader : Joey Lee H/W Project Engineer : Daniel Lee
MS-6541I1
1
I=30mA
R605
I=35mA
I=500mA
I=150mA
C47
0.01u
C51
0.1u
C54
0.1u
6 29Tuesday, March 05, 2002
1
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
MEM_STR
R93 226_1%
R96 100_1%
R97 100_1%
0AE0
Page 7
5
MDQ0 MDQ1 MDQ2 MDQ3 MDQ4 MDQ5 MDQ6 MDQ7 MDQ8 MDQ9 MDQ10
R118
X_0_Solder
MDQ11 MDQ12 MDQ13 MDQ14 MDQ15 MDQ16 MDQ17 MDQ18 MDQ19 MDQ20 MDQ21 MDQ22 MDQ23 MDQ24 MDQ25 MDQ26 MDQ27 MDQ28 MDQ29 MDQ30 MDQ31 MDQ32 MDQ33 MDQ34 MDQ35 MDQ36 MDQ37 MDQ38 MDQ39 MDQ40 MDQ41 MDQ42 MDQ43 MDQ44 MDQ45 MDQ46 MDQ47 MDQ48 MDQ49 MDQ50 MDQ51 MDQ52 MDQ53 MDQ54 MDQ55 MDQ56 MDQ57 MDQ58 MDQ59 MDQ60 MDQ61 MDQ62 MDQ63
5
SRC_O# SRC_I#
GAD0 GAD1 GAD2 GAD3 GAD4 GAD5 GAD6 GAD7 GAD8 GAD9 GAD10 GAD11 GAD12 GAD13 GAD14 GAD15 GAD16 GAD17 GAD18 GAD19 GAD20 GAD21 GAD22 GAD23 GAD24 GAD25 GAD26 GAD27 GAD28 GAD29 GAD30 GAD31
GC_BE#0 GC_BE#1 GC_BE#2 GC_BE#3
D D
C C
Trace lengh must as short as possible for SRCVEN
Trace width 12 mil with 12 mil space for SM_VREF.
B B
A A
DDR_VREF
GAD[0..31](16)
GC_BE#[0..3](16)
AR10
AP10 AT11 AT13 AT14 AT10 AR12 AR14 AP14 AT15 AP16 AT18 AT19 AR16 AT16 AP18 AR20 AR22 AP22 AP24 AT26 AT22 AT23 AT25 AR26 AP26 AT28 AR30 AP30 AT27 AR28 AT30 AT31 AR32 AT32 AR36 AP35 AP32 AT33 AP34 AT35 AN36
AM36
AK36
AJ36
AP36
AM35
AK35 AK34
AK24
AL23
AN4 AP2 AT3 AP5 AN2 AP3 AR4 AT4 AT5 AR6 AT9
AT6 AP6 AT8 AP8
W4 W5
U4B
V4 V2
U5 U4 U2 V3 T2 T3 T4 R2 R5 R7 T8 P3 P8 K4 K2
J2
M3
L5 L4
H4
G2
K3
J4 J5
J7 H3 K8
G4
R4 N4
M2
H2
SDQ0 SDQ1 SDQ2 SDQ3 SDQ4 SDQ5 SDQ6 SDQ7 SDQ8 SDQ9 SDQ10 SDQ11 SDQ12 SDQ13 SDQ14 SDQ15 SDQ16 SDQ17 SDQ18 SDQ19 SDQ20 SDQ21 SDQ22 SDQ23 SDQ24 SDQ25 SDQ26 SDQ27 SDQ28 SDQ29 SDQ30 SDQ31 SDQ32 SDQ33 SDQ34 SDQ35 SDQ36 SDQ37 SDQ38 SDQ39 SDQ40 SDQ41 SDQ42 SDQ43 SDQ44 SDQ45 SDQ46 SDQ47 SDQ48 SDQ49 SDQ50 SDQ51 SDQ52 SDQ53 SDQ54 SDQ55 SDQ56 SDQ57 SDQ58 SDQ59 SDQ60 SDQ61 SDQ62 SDQ63
SRCVEN_OUT# SRCVEN_IN#
G_AD0 G_AD1 G_AD2 G_AD3 G_AD4 G_AD5 G_AD6 G_AD7 G_AD8 G_AD9 G_AD10 G_AD11 G_AD12 G_AD13 G_AD14 G_AD15 G_AD16 G_AD17 G_AD18 G_AD19 G_AD20 G_AD21 G_AD22 G_AD23 G_AD24 G_AD25 G_AD26 G_AD27 G_AD28 G_AD29 G_AD30 G_AD31
G_C/BE0# G_C/BE1# G_C/BE2# G_C/BE3#
DDR
AGP
Brookdale_MCH
SCMDCL_K0
SCMDCLK_0#
SCMDCLK_1
SCMDCLK_1#
SCMDCLK_2
SCMDCLK_2#
SCMDCLK_3
SCMDCLK_3#
SCMDCLK_4
SCMDCLK_4#
SCMDCLK_5
SCMDCLK_5#
SMX_RCOMP SMX_RCOMP SMY_RCOMPSM_VREF
G_DEVSEL#
AGP_RCOMP
SMA0 SMA1 SMA2 SMA3 SMA4 SMA5 SMA6 SMA7 SMA8
SMA9 SMA10 SMA11 SMA12
SMAB1 SMAB2 SMAB4 SMAB5
SDQS0 SDQS1 SDQS2 SDQS3 SDQS4 SDQS5 SDQS6 SDQS7
SDM0
SDM1
SDM2
SDM3
SDM4
SDM5
SDM6
SDM7 SCKE0
SCKE1 SCKE2 SCKE3
SCS0# SCS1# SCS2# SCS3#
SBA_0
SBA_1 SRAS# SCAS#
SWE#
G_FRAME#
G_IRDY#
G_TRDY#
G_STOP#
G_PAR
G_REQ# G_GNT#
SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7
SB_STB
SB_STB#
AD_STB0
AD_STB0#
AD_STB1
AD_STB1#
PIPE#
RBF#
WBF#
AGP_VREF
4
MSDQS0 MSDQS1 MSDQS2 MSDQS3 MSDQS4 MSDQS5 MSDQS6 MSDQS7
MSDM0 MSDM1 MSDM2 MSDM3 MSDM4 MSDM5 MSDM6 MSDM7
MSCKE0 MSCKE1 MSCKE2 MSCKE3
MSCS0# MSCS1# MSCS2# MSCS3#
DCLK0 DCLK0# DCLK1 DCLK1# DCLK2 DCLK2# DCLK3 DCLK3# DCLK4 DCLK4# DCLK5 DCLK#5
MSBS0 MSBS1 MRAS# MCAS# MWE#
SMX_RCOMP SMY_RCOMP
R120 30.1_1%
SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7
ST0 ST1 ST2
CB72 0.1u
R121 40.2_1%
Place < 0.5"
DDRMAA0 DDRMAA1 DDRMAA2 DDRMAA3 DDRMAA4 DDRMAA5 DDRMAA6 DDRMAA7 DDRMAA8 DDRMAA9 DDRMAA10 DDRMAA11 DDRMAA12
DDRMAB1 DDRMAB2 DDRMAB4 DDRMAB5
R119
30.1_1% C56 0.1uC55 0.1u
MSCS0# (14,15) MSCS1# (14,15) MSCS2# (14,15) MSCS3# (14,15)
DCLK0 (14) DCLK0# (14) DCLK1 (14) DCLK1# (14) DCLK2 (14) DCLK2# (14) DCLK3 (14) DCLK3# (14) DCLK4 (14) DCLK4# (14) DCLK5 (14) DCLK5# (14)
MSBS0 (14) MSBS1 (14) MRAS# (14,15) MCAS# (14,15) MWE# (14,15)
VTT_DDR
GFRAME#(16) GIRDY# (16) GTRDY# (16) GDEVSEL# (16) GSTOP# (16) GPAR (16)
GREQ# (16) GGNT# (16)
SBA[0..7] (16)
SB_STB (16) SB_STB#(16)
ST[0..2](16)
GAD_STB0(16) GAD_STB#0 (16) GAD_STB1(16) GAD_STB#1 (16)
PIPE# (16) RBF# (16) WBF# (16)
AGPREF (16)
DDRMAB1 (14,15) DDRMAB2 (14,15) DDRMAB4 (14,15) DDRMAB5 (14,15)
MSCKE[0..3] (14,15)
C57 0.1u
AL25 AN25 AP23 AK20 AL19 AL17 AP19 AP17 AN17 AK16 AK26 AL15 AN15
AP25 AN23 AN19 AK18
AR2 AT7 AT12 AT17 AR24 AT29 AT34 AL36
AP4 AR8 AP12 AR18 AT24 AP28 AR34 AL34
AP13 AN13 AK14 AL13
AL29 AP31 AK30 AN31
AL21 AK22 AN11 AP11 AM34 AL33 AP21 AN21 AP9 AN9 AP33 AN34
AN27 AP27 AK28 AN29 AP29
AF10 AD16 AJ34AM2
M4 N7 N5 N2 P2 P4
D5 B5
C3 C2 D3 D2 E4 E2 F3 F2
F4 E5
C4
ST0
B4
ST1
B3
ST2
V8 U7 M8 L7
H8 G7 G5
W2
AGP_RCOMP
L2
4
3
DDRMAA[0..12] (14,15)
Trace width 12 mil with 10 mil space.
Place 0.1uF <1" to GMCH
3
2
1
DDR SERIAL RESISTORS
DDRMD1
RN3 10
DDRMD[0..63](14,15)
DDRMD5 DDRMD4 DDRMD0 DDRMD3 DDRMD7 DDRMD6 DDRMD2 DDRMD13 DDRMD12 DDRMD9 DDRMD8 DDRMD11 DDRMD10 DDRMD15 DDRMD14 DDRMD21 DDRMD17 DDRMD16 DDRMD20 DDRMD23 DDRMD19 DDRMD22 DDRMD18
DDRMD29 DDRMD28 DDRMD24 DDRMD31 DDRMD27 DDRMD30 DDRMD26 DDRMD37 DDRMD33 DDRMD36 DDRMD32 DDRMD35 DDRMD39 DDRMD38 DDRMD34 DDRMD41 DDRMD45 DDRMD44 DDRMD40 DDRMD47 DDRMD43 DDRMD46 DDRMD42 DDRMD53 DDRMD52 DDRMD49 DDRMD48 DDRMD51 DDRMD50 DDRMD55 DDRMD54 DDRMD57 DDRMD61 DDRMD56 DDRMD60 DDRMD59 DDRMD63 DDRMD58 DDRMD62
MSDM0 SDM0 MSDM1 MSDM2 MSDM3 MSDM4 MSDM5 MSDM6 MSDM7
MSDQS0 MSDQS1 MSDQS2 MSDQS3 MSDQS4 MSDQS5 MSDQS6 MSDQS7
2
7 8 5 6 3 4 1 2
RN5 10
7 8 5 6 3 4 1 2
RN7 10
7 8 5 6 3 4 1 2
RN9 10
7 8 5 6 3 4 1 2
RN10 10
7 8 5 6 3 4 1 2
RN12 10
7 8 5 6 3 4 1 2
RN13 10
7 8 5 6 3 4 1 2
RN14 10
7 8 5 6 3 4 1 2
RN15 10
7 8 5 6 3 4 1 2
RN16 10
7 8 5 6 3 4 1 2
RN18 10
7 8 5 6 3 4 1 2
RN20 10
7 8 5 6 3 4 1 2
RN21 10
7 8 5 6 3 4 1 2
RN22 10
7 8 5 6 3 4 1 2
RN23 10
7 8 5 6 3 4 1 2
RN24 10
7 8 5 6 3 4 1 2
R609 10 R610 10 R611 10 R612 10 R613 10 R614 10 R615 10 R616 10
R110 10 R111 10 R112 10 R113 10 R114 10 R115 10 R116 10 R117 10
MSI
Title
Size Document Number Rev
Date: Sheet of
MDQ1 MDQ5 MDQ4 MDQ0 MDQ3 MDQ7 MDQ6 MDQ2 MDQ13 MDQ12 MDQ9 MDQ8 MDQ11 MDQ10 MDQ15 MDQ14 MDQ21 MDQ17 MDQ16 MDQ20 MDQ23 MDQ19 MDQ22 MDQ18 MDQ25DDRMD25 MDQ29 MDQ28 MDQ24 MDQ31 MDQ27 MDQ30 MDQ26 MDQ37 MDQ33 MDQ36 MDQ32 MDQ35 MDQ39 MDQ38 MDQ34 MDQ41 MDQ45 MDQ44 MDQ40 MDQ47 MDQ43 MDQ46 MDQ42 MDQ53 MDQ52 MDQ49 MDQ48 MDQ51 MDQ50 MDQ55 MDQ54 MDQ57 MDQ61 MDQ56 MDQ60 MDQ59 MDQ63 MDQ58 MDQ62
SDM1 SDM2 SDM3 SDM4 SDM5 SDM6 SDM7
SDQS0 SDQS1 SDQS2 SDQS3 SDQS4 SDQS5 SDQS6 SDQS7
SDM0 (15) SDM1 (15) SDM2 (15) SDM3 (15) SDM4 (15) SDM5 (15) SDM6 (15) SDM7 (15)
Brookdale-G GMCH-2 (DDR & AGP)
SDQS[0..7] (14,15)
MICRO-STAR
H/W Project Leader : Joey Lee H/W Project Engineer : Daniel Lee
MS-6541I1
1
7 29Tuesday, March 05, 2002
0AE0
Page 8
AA18
AL31 AR31 AU31
AB32 AD32 AF32 AH32
AB19 AD19 AR19
AM32
AJ33 AN33 AR33
AA20
AM20
AB21 AD21
AJ21 AR21
U18 V18 Y18
F32 H32 K32
M32
P32 T32 V32 Y32
AM4
A5 C5
AG5
AN5 AR5
P19 T19
A33 C33
F6 H6
M6
T6
Y6 AB6 AF6
AM6
U20 V20 Y20
A21 B21 C21 D21 E21
G21
J21
D34
W34
A35 E35
G35
J35
L35 AN7 AR7 AU7
B8 C8 D8
F8 P21 T21 V21 Y21
F22 H22 U22
W22
U29R29
J29
L29
N29
U4D
VSS VSS
VSS
VSS
VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSSVSS
FOOTPRINT REV1.5
C29
A29
VSS
U3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AT2E3G3J3L3N3R3
VSS
VSS
GMCH DECOUPLING CAPACITOR
C17
D17
E17
G17
J17
T17
V17
AH30
C31
AC3
AG3
AM3
AN3
AR3
AU3
AB4
AG4
Y17
AB17
AD17
AJ17
AR17
AR9
AM10
AR23
AU23
F24
R24
VSS
VSS
VSS
VSS
VSS
VSS
U24
VSS
AM24
VSS
VSS
A25
AC24
VSS
AA24
VSS
W24
VSS
VSS
B17
AM16
VSS
AA16
VSS
W16
VSS
AJ29
AR29
F30
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
U16
VSS
W3
VSS
VSS
AG29
VSS
AE29
VSS
AC29
VSS
AA29
VSS
W29
VSS VSS
VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
AA22 N35 R35 U35 AA35 AC35 AE35 AG35 AL35 AN35 AR35 AU35 B36 W36 AF8 AM8 G9 J9 N9 U9 AA9 AE9 A23 C23 D23 J23 P23 AD23 AH36 AT36 C37 E37 J37 U37 AA37 AE37 AG37 AJ37 C25 AN37 AR37 AR11 AU11 J25 AJ25 AR25 F26 AK12 AM12 B13 C13 D13 E13 A27 C27 J27 AJ13 AR13 F14 R14 U14 W14 AA14 AC14 AL27 AR27 AU27 F28 AM28 E1 J1 N1 U1 AA1 AE1 AN1 AR1 B2 D15 AD15 AR15 AU15 N37 C16
VCC_AGP
C58
Pin A5
0.1u CB74
Pin J1
0.1u CB75
Pin E1
0.1u CB77
Pin N1
0.1u CB80
Pin U1
0.1u
Place decoupling cap close to GMCH AGP Interface < 0.1"
VCC_AGP
CB73
0.1u C142
0.01u
Place decoupling cap close to GMCH Core Logic Interface <
0.1"
VCC_AGP
CB76
Pin AA1
0.1u CB79
Pin AE1
0.1u
Place decoupling cap close to GMCH Hub-Link Interface<
0.1"
VCCP
CB84
0.1u CB86
0.1u CB89
0.1u CB91
0.1u CB93
0.1u
Place decoupling cap close to GMCH CPU Interface < 250mil in the Vtt corridor
VCC_AGP
+
CT11
1000UF_6V
Place Bulk cap for Core Logic, AGP & Hub Link Interface
MEM_STR
+
CT13 470u
+
CT72 470u
Place Bulk cap between GMCH & DIMM slot
VCC5
0.1uC67
0.1uC69
MEM_STR
+
MEM_STR
Place decoupling cap close to GMCH Memory Interface < 0.1", with 18 mil trach width
+
CT14 470u
VCC_AGP
C137
0.01u CB88
0.1u
Place decoupling cap close to GMCH DAC Interface< 0.1"
CB81
Pin AL37
0.1u CB82
Pin AU33
0.1u CB83
Pin AU29
0.1u CB85
Pin AU25
0.1u CB87
0.1u
Pin AU17
CB90
Pin AU13
0.1u CB92
0.1u
Pin AU9
CB94
0.1u
Pin AU5
VCCP
CT15 470u
CB276
10u-1206
+
CT16 470u
CB277 10u-1206
Pin B14 Pin A15
MEM_STR
VCCSM
AH26
AH22
VCCSM
VCCSM
AH18
AH14
VCC_AGP
VCCSM
VCCSM
VCCSM
AH12
AH10
VCCAHI
AD10
VCCAGP
VCCAGP
AB10
V10
VCCAGP
P10
K10
VCC
VCCP
K12
VCC
K14
VCC
K16
VCC
VTTFSB
K18
K20
VTTFSB
VTTFSB
VTTFSB
K22
K26
VTTFSB
M28
T28
VTTFSB
VTTFSB
VTTFSB
Y28
AD28
VSS
AH24
VSS
AH20
VSS
AH16
Y10
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
T10
M10
K24
K28
P28
V28
AB28
AF28
AH28
VCC5 VCC3
0.1uC77
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR
H/W Project Leader : Joey Lee H/W Project Engineer : Daniel Lee
Broodale GMCH(VSS)
MS-6541I1
8 29Tuesday, March 05, 2002
0AE0
Page 9
AD[0..31](17,24)
C_BE#[0..3](17,24)
DEVSEL#(17,24)
FRAME#(17,24)
IRDY#(17,24)
TRDY#(17,24)
STOP#(17,24)
PAR(17,24)
PLOCK#(17)
SERR#(17,24) PERR#(17,24)
PME#(16,17,24)
ICH_PCLK(3)
PCIRST#(3)
EE_EECS(25) EE_DIN(25) EE_DOUT(25) EE_SHCLK(25)
Pin A1 Pin H1
VCC3
Pin A4
CB103
0.1u
0.1u
ICH4 PCI / HUB LINK / CPU / LAN / INTERRUPT SIGNALS
VCC_AGP VCC3_SB
K12
K18
K22
P10
T18
U19
VCC1_5
VCC1_5
VCC1_5
GND3
GND4
GND5
A20
A22A4AA12
VCC1_5
VCC1_5
VCC1_5
GND6
GND7
GND8
AA16
V14A5AC17
VCC1_5
VCC1_5
GND9
GND10
AA22
AA3
AA9
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C_BE#0 C_BE#1 C_BE#2 C_BE#3
LAN_RST#
EE_EECS EE_DIN EE_DOUT EE_SHCLK
H5
J3 H3 K1
G5
J4 H4
J5 K2
G2
L1
G4
L2 H2
L3 F5 F4 N1 E5 N2 E3 N3 E4
M5
E2 P1 E1 P2 D3 R1 D2 P4
J2 K4
M4
N4
M3
F1
L5 F2 F3
G1 M2
K5
L4
W2
B5 E8
P5 U5 Y5
D10 D11
A8
C12
K10
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C/BE0# C/BE1# C/BE2# C/BE3#
DEVSEL# FRAME# IRDY# TRDY# STOP# PAR PLOCK# SERR# PERR# PME#
GPIO0/REQA# GPIO16/GNTA#
PCICLK PCIRST# LAN_RST# EE_CS
EE_DIN EE_DOUT EE_SHCLK
GND1
GND2
A1
A16
A18
ICH4 DECOUPLING CAPACITORS
Pin AC10
Pin T1
0.1u
CB105
0.1u
Pin AC18
0.1u
CB107
0.1u
VCC3_3
GND11
GND12
AB20
AB7
AC8B2H18H6J1
VCC3_3
VCC3_3
VCC3_3
GND13
GND14
GND15
AC1
AC10
AC14
VCC3_3
VCC3_3
VCC3_3
GND16
GND17
GND18
AC18
AC23
VCC3
J18K6M10
VCC3_3
VCC3_3
GND19
GND20
AC5
B12
P12P6U1
VCC3_3
GND21
B16
B18
VCC3_3
VCC3_3
GND22
GND23
B20
B22B9C15
V10
V16
VCC3_3
VCC3_3
VCC3_3
GND24
GND25
GND26
V18
VCC3_3
GND27
C17
C19
VCC1_5SB
E20
E13
E12
VCCSUS1_5
VCCSUS1_5
VCCSUS1_5
GND28
GND29
GND30
GND31
C21
C23C6D1
F14
G18R6T6
VCCSUS1_5
VCCSUS1_5
VCCSUS1_5
GND32
GND33
GND34
D12
D15
D17
U6
E11
F10
VCCSUS1_5
VCCSUS1_5
VCCSUS3_3
VCCSUS3_3
GND35
GND36
GND37
GND38
GND39
D19
D21
D23D4D8
F15
F16
F17
F18
K14V7V8
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
GPIO1/REQB#/REQ5#
GPIO17/GNTB#/GNT5#
GND43
GND40
GND41
GND42
GND44
E14
D22
E10
E16
V9
CPUSLP#
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
STPCLK#
A20GATE
THRMTRIP#
HI_SWING
LAN_RSTSYNC
LAN_RXD0 LAN_RXD1 LAN_RXD2 LAN_TXD0 LAN_TXD1 LAN_TXD2
GND45
GND46
GND47
E17
E18
E19
HL_STB# HLCOMP
APICCLK
LAN_CLK
Place one 0.1u close to ICH4 <100 mil
Pin K23 Pin C23 Pin A16 Pin AC1Pin T23 Pin N23 Pin C22 Pin C22
VCC_AGP
CB96
0.1uCB104
CB99
0.1uCB102
VCC_AGP VCC_AGP
C83
CB97
0.1u
0.1u
FOR Core Logic FOR Hub Interface FOR PLL
A20M#
FERR#
IGNNE#
INIT#
INTR
NMI
SMI#
RCIN#
HI10 HI11
HI_STB
HIREF
PIRQA# PIRQB# PIRQC# PIRQD#
IRQ14 IRQ15
APICD0 APICD1
SERIRQ
REQ0# REQ1# REQ2# REQ3# REQ4#
GNT0# GNT1# GNT2# GNT3# GNT4#
INT-82801DB
ICH4 STRAPPING RESISTORS
FERR#
R123 62
TRMTRIP#
R124 62
TRIP#_R
U5A
A20M#_R SLP_R FERR# IGNNE#_R HINIT#_R INTR_R NMI_R HSMI#_R
STPCLK#_R
KB_RST# A20GATE#
TRIP#_R
HL0 HL1 HL2 HL3 HL4 HL5 HL6 HL7 HL8 HL9 HL10 HL11
R521
HLCOMP
HI_ISWING HUB_IREF
APICCLK APIC_D0 APIC_D1 SERIRQ
PREQ#0 PREQ#1 PREQ#2 PREQ#3 PREQ#4 REQB#REQA#
PGNT#0 PGNT#1 PGNT#2 PGNT#3 PGNT#4
ELAN_CLK ELAN_SYNC ELAN_RXD0 ELAN_RXD1 ELAN_RXD2 ELAN_TXD0 ELAN_TXD1 ELAN_TXD2
R632 62 R633 62
R634 62 R635 62 R636 62 R637 62 R122 62 R638 62
R733 X_0
60.4_1%
R130 68.1_1%
A20M# (4) SLP# (4) FERR# (4) IGNNE# (4) HINIT# (4,13) INTR (4) NMI (4) HSMI# (4) STPCLK# (4) KB_RST# (11) A20GATE#(11)
TRMTRIP#(4,11)
HL[0..10] (6)
This resistor less than 0.5" from ICH use 15 mils trace
HL_STB (6) HL_STB# (6)
VCC_AGP
INTA# (16,17,24) INTB# (16,17) INTC# (17,24) INTD# (17)
IRQ14 (3) IRQ15 (3)
SERIRQ (11)
PREQ#[0..4] (17,24)
PGNT#0 (17) PGNT#1 (17) PGNT#2 (17) PGNT#3 (24) PGNT#4 (24)
ELAN_CLK (25) ELAN_SYNC (25) ELAN_RXD0 (25) ELAN_RXD1 (25) ELAN_RXD2 (25) ELAN_TXD0 (25) ELAN_TXD1 (25) ELAN_TXD2 (25)
ICH4 REFERENCE VOLTAGE
Place Cap. as Close as possible to ICH4 < 0.25" Trace width use 12 mils and 10mils space
VCC3_SB
LAN_DIS(11)
2N3904S
AB23 U21 AA21 W21 V22 AB22 V21 W23 V23 U22 Y22 U23
NC
W20 L19
HI0
L20
HI1
M19
HI2
M21
HI3
P19
HI4
R19
HI5
T20
HI6
R20
HI7
P23
HI8
L22
HI9
N22 K21 P21 N20 R23 R22 M23
D5 C2 B4 A3
AC13 AA19 J19 H19 K20 J22
B1 A2 B3 C7 B6 A6
C1 E6 A7 B7 D6 C5
C11 B11 A10 A9 A11 B10 C10 A12
R822 62
SERIRQ
R125 8.2K
KB_RST#
R126 10K
A20GATE#
R127 10K
REQA#
R131 10K
REQB#
R132 10K
APIC_D0
R128 10K
APIC_D1
R129 10K
APICCLK
EE_DOUT
R133 X_10K
HI_ISWING
HUB_IREF
0.01u
C80
C81
0.01u
C79
0.1u
C82
0.1u
LAN Disable Circuit
RSMRST#(11)
LAN_DIS#
R569 8.2K
Q58_B
R570
Q58
10K
If LAN_DIS="L", LAN_RST#=RSMRST#, If LAN_DIS="H", LAN_RST#="L"
MSI
MICRO-STAR
Brookdale-G ICH4 PCI & HI & LAN
H/W Project Leader : Joey Lee H/W Project Engineer : Daniel Lee
MS-6541I1
CB95
0.1u
0.01u
C140
VCC1_5SB
CB100
0.1u
CB101
0.1uCB106
Title
Size Document Number Rev
Date: Sheet of
VCC_AGP
R135 226_1%
R136 100_1%
R137 100_1%
U2C
5 6
DM7407-SOIC14
U2F
13 12
DM7407-SOIC14
9 29Tuesday, March 05, 2002
VCCP
VCC3
VCC3_SB
R522
1K
LAN_RST#
0AE0
Page 10
D4
1N5817-S-DO-241AC
Place Cap close to Pin E7
R734 62
INTRUDER# RTCRST#
VBIAS
R809 X_0 R149 0
R176 22.6 1%
THRM# NC_SLP_S4# PWR_GD
CPUGD VRMPWRGD PWRBTN_IN#
RSMRST# NC_SUSSTAT#
SYS_RST# BATLOW# GPIO6 SMBALERT#
RTCX1 RTCX2
ACBITCLK AC_SDIN0
NC_AC_SDIN1 NC_AC_SDIN2
GPI12
-EXTSMI
GPI28
NC_LDRQ1#
BIAS
SLP_S3#(11,21,22) SLP_S5#(11,21)
PWR_GD(20)
CPU_GD(4)
-IO_PME(11)
RSMRST#(11)
SUSCLK(11)
SMBDATA(11,13,14,17,24)
SMBCLK(11,13,14,17,24)
ICH_66(3) ICH_14(3) ICH_48(3)
AC_RST#(12) AC_SYNC(12) BITCLK_14(3) AC_BCLK(12)
AC_SDOUT(12)
AC_SDIN0(12)
SPKR(12)
GPI12(11)
-EXTSMI(11)
LAD0/FWH0(11,13) LAD1/FWH1(11,13) LAD2/FWH2(11,13) LAD3/FWH3(11,13)
LFRAME#/FWH4(11,13)
LDRQ#(11)
USBP0+(19)
USBP0-(19)
USBP1+(19)
USBP1-(19)
USBP2+(19)
USBP2-(19)
USBP3+(19)
USBP3-(19)
USBP4+(19)
USBP4-(19)
USBP5+(19)
Place < 0.5"
USBP5-(19)
OC_REAR#(19)
OC_FRONT#(19)
ICH4 DECOUPLING CAPACITOR
VCC3_SB
CB111
0.1u
Pin A22 Pin AC5 Pin AA23
CB112
0.1u
VCCP
CB113
0.1u
R138 1K
VCC5 VCC3
V1
THRM#
Y4
SLP_S3#
Y2
SLP_S4#
AA2
SLP_S5#
AB6
PWROK
Y23
CPUPWRGD
V19
VRMPWRGD
AA1
PWRBTN#
Y1
RI#
AA6
RSMRST#
AB3
SUSSTAT#
AA4
SUSCLK
Y3
SYS_RESET#
AB2
BATLOW#/TP0
R2
AGPBUSY#/GPIO6
AA5
GPIO11/SMBALERT#
AC3
SMLINK0
AB1
SMLINK1
W6
INTRUDER#
W7
RTCRST#
Y6
VBIAS
AB4
SMBDATA
AC4
SMBCLK
AC7
RTCX1
AC6
RTCX2
V20
NC
T21
CLK66
J23
CLK14
F19
CLK48
C13
AC_RST#
C9
AC_SYNC
B8
AC_BITCLK
D9
AC_SDOUT
D13
AC_SDIN0
A13
AC_SDIN1
B13
AC_SDIN2
H23
SPKR
V5
GPIO12
W3
GPIO13
T3
C3_STAT#/GPIO21
Y20
CPUPERF#/GPIO22
J21
SSMUXSEL/GPIO23
W1
GPIO27
W4
GPIO28
T2
LAD0/FWH0
R4
LAD1/FWH1
T4
LAD2/FWH2
U2
LAD3/FWH3
T5
LFRAME#/FWH4
U3
LDRQ0#
U4
LDRQ1#
C20
USBP0+
D20
USBP0-
A21
USBP1+
B21
USBP1-
C18
USBP2+
D18
USBP2-
A19
USBP3+
B19
USBP3-
C16
USBP4+
D16
USBP4-
A17
USBP5+
B17
USBP5-
A23
USBRBIAS
B23
USBRBIAS#
B15
OC0#
C14
OC1#
A15
OC2#
B14
OC3#
A14
OC4#
D14
OC5#
CB109
0.1u CB108
Pin A16 Pin E7
V5REF
VCC3_SB
GND48
E21
E22F8G19
GND49
VCC3_SB
V5REF1
GND50
Place one 0.1u close to ICH4 <100 mil
VCC_AGP
E15E7V6
V5REF2
V5REF_SUS
GND51
GND52
GND53
GND54
G21G3G6H1J6
V5REF
0.1u
RTC_VCC
C22
VCCPLL
GND55
GND56
K11
AB5
GND57
GND58
K13
K19
CB110 1u-0603
VCC_AGP
L23
M14
VCC_HI
VCCRTC
GND59
GND60
GND61
K23K3L10
VCC3_SB
VCC1_5SB
P18
T22F6F7E9F9
VCC_HI
VCC_HI
VCC_HI
VCCLAN1_5/VCCSUS1_5
VCCLAN1_5/VCCSUS1_5
GND62
GND63
GND64
GND65
GND66
GND67
GND68
L11
L12
L13
L14
L21M1M11
VCCP
PROCHOT#(4)
VCCP
AA23
P14
Y19
Y7
U18
GND99
GND100
GND101
GND102
VCPU_IO0
VCPU_IO1
VCPU_IO2
VCCLAN3_3/VCCSUS3_3
VCCLAN3_3/VCCSUS3_3
INT-82801DB
GND69
GND70
GND71
GND72
GND73
GND74
GND75
GND76
GND77
GND78
GND79
M12
M13
M20
M22
N10
N11
N12
N13
N14
N19
GND98
GND80
N21
V17V3W22W5W8
GND97
GND81
N23N5P11
T19
T23
U20
V15
GND93
GND94
GND95
GND96
STP_PCI#/GPIO18
SLP_S1#/GPIO19
STP_CPU#/GPIO20
CLKRUN#/GPIO24
GND82
GND83
GND84
GND85
P13
P20
P22P3R18
R21R5T1
PDCS1# SDCS1# PDCS3#
GND89
GND90
GND91
GND92
SDCS3#
PDDREQ
SDDREQ PDDACK# SDDACK#
PDIOR#
SDIOR# PDIOW# SDIOW#
PIORDY SIORDY
PDD10 PDD11 PDD12 PDD13 PDD14 PDD15
SDD10 SDD11 SDD12 SDD13 SDD14 SDD15
GPIO2/PIRQE# GPIO3/PIRQF#
GPIO4/PIRQG#
GPIO5/PIRQH#
GPIO7 GPIO8
GPIO25
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO38
GPIO39
GPIO40
GPIO41
GPIO42
GPIO43
GND86
GND87
GND88
PDA0 PDA1 PDA2 SDA0 SDA1 SDA2
PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9
SDD0 SDD1 SDD2 SDD3 SDD4 SDD5 SDD6 SDD7 SDD8 SDD9
U5B
Y13 AB21 AB14 AC22
AA13 AB13 W13 AA20 AC20 AC21
AA11 AB18 Y12 AB19 AC12 Y18 W12 AA18 AB12 AC19
PDD0
AB11
PDD1
AC11
PDD2
Y10
PDD3
AA10
PDD4
AA7
PDD5
AB8
PDD6
Y8
PDD7
AA8
PDD8
AB9
PDD9
Y9
PDD10
AC9
PDD11
W9
PDD12
AB10
PDD13
W10
PDD14
W11
PDD15
Y11
SDD0
W17
SDD1
AB17
SDD2
W16
SDD3
AC16
SDD4
W15
SDD5
AB15
SDD6
W14
SDD7
AA14
SDD8
Y14
SDD9
AC15
SDD10
AA15
SDD11
Y15
SDD12
AB16
SDD13
Y16
SDD14
AA17
SDD15
Y17 C8
D7 C3 C4
GPIO7
R3 V4 Y21 W18 W19 AC2 V2 J20 G22 F20 G20 F21 H20 F23 H22 G23 H21 F22 E23
PROCHOT BLOCK SYSTEM RESET
THRM#
R183 4.7K
2N3904S
Q3_B
Q3
-RSTBTN(20)
R145
R528 8.2K
SYS_RST#
0
PD_CS#1 (3) SD_CS#1 (3) PD_CS#3 (3) SD_CS#3 (3)
PD_A0 (3) PD_A1 (3) PD_A2 (3) SD_A0 (3) SD_A1 (3) SD_A2 (3)
PD_DREQ (3) SD_DREQ (3) PD_DACK# (3) SD_DACK# (3) PD_IOR# (3) SD_IOR# (3) PD_IOW# (3) SD_IOW# (3) PD_IORDY (3) SD_IORDY (3)
PDD[0..15] (3)
SDD[0..15] (3)
INTE# (17) INTF# (17,24) INTG# (17,24) INTH# (17)
F_AUD_DET (24)
VCC3_SB
VCC5_SBVCC3_SB
* Put a GND Plane under X'TAL
R140
R139
X_1K
0
D5_1
R141 X_3K
Password Clear Jumper
* Please put this block close ICH2
D5 1N4148-S-LL34
D6 1N5817-S-DO-241AC
C84_1 VBIAS
R146
1K
BAT1_1
BAT1
R523 180K
0.047uC84
CB271 X_0.1u
VCC3
R175 300
JPWD1_1
GPI28
R168 10K
RTC_VCC
CB297
0.1u/0805
ICH4 STRAPPING RESISTORS
INTRUDER#
PD_IORDY SD_IORDY THRM# -IO_PME
SPKR GPIO6 GPIO7 VRMPWRGD
RSMRST# PWR_GD
AC_SDOUT="1" to enter Safe Mode, Internal 20K pull-down.
VCC3
R602 X_8.2K
AC_SDOUT
R525 330K
R151 4.7K R153 4.7K R155 8.2K R169 X_1K R171 4.7K R172 4.7K R760 X_10K R758 X_22K R759 X_22K
R823 1K R162 X_15K
RTC_VCC VCC3_SB
VCC3
Q83_C
POWER BUTTOM IN
PWRBTN_OUT#(11)
R648 62
CB298
0.1u
MSI
Title
Size Document Number Rev
Date: Sheet of
ICH4 ASIC/RTC/AC'97/GPIO/LPC/USB/IDE
C85 18p
JPWD1 PIN1*2
Default Short
SMBDATA SMBCLK BATLOW# SMBALERT# F_AUD_DET
SLP_S3# GPI12
-EXTSMI SLP_S5#
Q83_B
Q83
X_2N3904S
PWRBTN_IN#
RTC BLOCK
JBAT1 Clear CMOS
JBAT1_1 RTCRST#
JBAT1_3
R647
4.7K
R147
10M
R148 10M
X2
32K-12.5pf-CSA-309-D
+-30PPM 32pF
R152 4.7K R154 4.7K R156 8.2K R158 4.7K R160 150 R166 8.2K R585 X_10K R177 10K R178 10K R803 X_10K
VCC3
R526
X_1K
-CPU_CHG default LOW.
MICRO-STAR
H/W Project Leader : Joey Lee H/W Project Engineer : Daniel Lee
MS-6541I1
R814
8.2K
Normal1 - 2 Clear CMOS2 - 3
1 2 3
10 29Tuesday, March 05, 2002
*
JBAT1 D1x3-BK
RTCX1 RTCX2
C86 18p
-CPU_CHG (11)
0AE0
Page 11
5
4
3
2
1
LPC SUPER I/O LPC47B367
U8
27
GP70
R794
TACH3 TACH1
TACH2
R795
8.2K
30 31 26 25 28
21 22 23 24
105 106 107 108 109
10 11 14 36 37 38 39
53 100 111
12
13
17
18
29
33
34
35
40
41
42
43
44
45
47
48
49
50
51
54 101 102 103 104 110
52
87
57
32
LRESET# LCLK SERIRQ LDRQ# LFRAME# LPC_PD#
LAD0 LAD1 LAD2 LAD3
4
PWRGOODA
5
RSMRST# PWRGD_D10M/GP75/IRQ9 PWRGD_D30M/GP76/IRQ10 5VIN MR# 12VIN
1
PWRBTN_IN#/GP62
2
SLP_S3#/GP63
3
SLP_S5#/GP64
7
PDS_EN/GP85/FAN_TACH1
8
S3_2_5V_ON#/GP86 PWRBTN_OUT#/GP66 PS_ON/GP67 IO_PME#/GP42 PME_IN#/GP13 WOL#/GP14 EVENT5#/GP15 S3_3V_CTRL/EVENT6#/GP16 THERMTRIP#/GP32 R_OFF/GP70/IRQ3 IO_SMI#/GP46
COLOR/GP30 BLINK_GR/GP31
9
CPU_SLOW/GP65 GPRST1#/GP60 GPRST2#/GP61 GP43/DDRC GP10 GP11 GP12/FAN_TACH2 GP17 GP20/P17 GP21/P16 GP22/P12 GP23/RING# GP24/SYSOPT INTRUDER#/GP25 CPUOCC1#/GP26 GP27/CPUOCC2# GP44/HDLOCK# GP45/HDUNLCK# GP33/WDO RISER1#/GP71/IRQ4 RISER2#/GP72/IRQ5 GP73/IRQ6/FAN_TACH3 GP74/IRQ7 FAN_TACH4
AVSS
VSS4 VSS3 VSS2
6
VSS1
SMSC LPC47B367
U35
1
SDA
2
SCL
3
GND
4
VCC
5
VID0
6
VID1
7
VID2
8
VID3
9
TACH3
11
TACH1
12
TACH2
ADM1027
PCIRST#1(3) SIO_PCLK(3)
SERIRQ(9)
LDRQ#(10)
GPI12(10)
LFRAME#/FWH4(10,13)
LAD0/FWH0(10,13) LAD1/FWH1(10,13) LAD2/FWH2(10,13) LAD3/FWH3(10,13)
PWR_GD_10MS(23)
-PWRGD_30MS(3) VCC5 VCC3
+12V
PWRBTN_OUT#(10)
PHY_DIS(25)
Default Low
LPC_MR#(4)
SMBDATA(10,13,14,17,24) SMBCLK(10,13,14,17,24)
VID0(4) VID1(4) VID2(4) VID3(4)
PWRGDA(20) RSMRST#(9,10)
PWRBTN#(20)
SLP_S3#(10) SLP_S5#(10)
-IO_PME(10)
CHASS_ID0(20) CHASS_ID1(20)
-EXTSMI(10)
SUS_LED(20)
-CPU_CHG(10) PCIRST#2(17,24)
AGP_RST#(16)
ATADET0(3) ATADET1(3)
SKTOCC#(4)
-RISER1(24)
-RISER2(24)
VCC3_SB
D D
C C
B B
A A
R188 4.7K
VCC3
R668 8.2K
R656 13K
R657 1.78K_1%
-FAN_OFF
PS_ON(20)
PME#(16,17,24)
-IO_TRMTRIP
R816 8.2K
VCC3
COLOR(20)
GP33(18)
SYS_FAN PHY_DIS CPU_FAN
FB42
600S/0805
LPC_MR#
CB304 0.01u
SYSFAN
R791 X_0
CPUFAN
R792 X_0
R793
X_8.2K
CPUFAN SYSFAN
R798 X_0
5
LPC_PD#
LPC_MR#
12VIN
BRD_REV0
BRD_REV1
BRD_ID0 SIO_ADDR
BRD_ID1
LPC_AVSS
X_8.2K
DRVDEN0/GP40
DRVDEN1/GP41/IOCHCK#
RXD2/GP52/IRRX
TXD2/GP53/IRTX
PWM1/XTO
TACH4/PROCHOT#
PWM3/ADDRESS_EN#
INDEX#
MTR#0
GP37/DS1#
DS#0
GP36/MTR1#
DIR#
STEP# WDATA# WGATE#
TRACK0#
WP#
RDATA#
HEAD#
DSKCHG#
PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7
SLCT BUSY
ACK#
SLIN#
INIT#
ERR#
AFD#
STB#
IRRX2/GP34
IRTX2/GP35
RI#1
RXD1
CTS#1
DCD#1
DSR#1
TXD1
RTS#1
DTR#1
RI2#/GP50
CTS#2/GP56
DCD#2/GP51
DSR#2/GP54
RTS#2/GP55
DTR2#/GP57
GA20/GP37
KBRST#/GP36
KBDATA
KBCLK
MSDATA
MSCLK
VTR1
VBAT
VCC3_3VSS5 VCC3_2 VCC3_1
CLK_14M
SUSCLK
VCCP
2.5V 12V
5V
VID4
D1+
D1-
D2+
D2-PWM2/SMBALERT#
R797 100K
60 61 70 62 59 64 58 65 66 67 68 71 72 73 69 63
83 84 85 86 88 89 90 91 92 93
PE
94 95 82 81 96 97 98
55 56
118 112 116 119 114 113 115 117
120 123 127 122 125 124 126 128
79 78 74 75 76 77
15 46 1999
80 121
20 16
ADM_PWM
24 23 22 21 20 19 18 17 16 1510 14 13
CB314
0.1u
4
R_LP_D0 R_LP_D1 R_LP_D2 R_LP_D3 R_LP_D4 R_LP_D5 R_LP_D6 R_LP_D7
RI2#
CB301
0.1u
VCCP MEM_STR +12V VCC5
RN76 33
7 8 5 6 3 4 1 2 7 8 5 6 3 4 1 2
RN77 33
BIOS_P
FWH_RST#
R702 X_1K
CB299 0.1u CB300 0.01u
CB302
0.1u
R796
8.2K
INT_CMDADM_PWM
VID4 (4) CPU_TEM+ (4) CPU_TEM- (4)
PROCHOT# (4)
+12VVCC2.5
3
+
2
-
LP_D0 LP_D1 LP_D2 LP_D3 LP_D4 LP_D5 LP_D6 LP_D7
VCC3_SB
VCC3_SB RTC_VCC VCC3
CB303
0.1u
U41A
NS-LM358MX-SOIC8
1
4 8
DRVDEN0 (18) LAN_DIS (9) INDEX# (18) MOT_A# (18) DRV_B# (18) DRV_A# (18) MOT_B# (18) DIR# (18) STEP# (18) WT_DT# (18) WT_EN# (18) TRACK0# (18)
FDD_WP# (18) RDATA# (18) HEAD# (18) DSKCHG# (18)
LP_D[0..7] (18) LP_SLCT (18) LP_PE (18) LP_BUSY (18) LP_ACK# (18) LP_SLIN# (18) LP_INIT# (18) LP_ERR# (18) LP_AFD# (18) LP_STB# (18)
BIOS_P (13) FWH_RST# (13)
RIA# (18) SINA (18) CTSA# (18) DCDA# (18) DSRA# (18) SOUTA (18) RTSA# (18) DTRA# (18)
A20GATE# (9) KB_RST# (9) KBDATA (18) KBCLK (18) MSDATA (18) MSCLK (18)
SIO_14 (3) SUSCLK (10)
CB305
0.0022u
FAN_CMD (20)
CPU_TEM+
CPU_TEM-
3
CPU FAN
VCC3
FAN_PWR1
FAN_OFF R_FAN_OFF
R655 1K
FAN POWER Selection FAN GND Selection
VCC5
+12V
FAN_PWR1
JFANV_SEL1
1 2 3
YJ103
R650 2.2K R653 X_68_0805
R654 X_68_0805
Q67 SI2303DS-S-SOT23
C295 33p
FAN_SEL 1 - 2 5V
Normal 12V
2 - 3
Normal Short Pin 2-3 Normal Short Pin 2-3
SYSTEM FAN1
FAN_PWR1
33pC296
R661 4.7K
R663 1K
Q69
GR664 1.5K
NDS7002AS
S D
VCC3
FAN_OFF
Q69.G
-FAN_OFF
LPC I/O STRAPPING RESISTOR
-RISER1
-RISER2
GP33
PWR_GD_10MS PWRBTN_OUT# RSMRST#
SKTOCC# LAN_DIS PHY_DIS
SIO_ADDR
SYS_ADDR L: 0x02E
X: BIOS PROGRAMS.
CHASS_ID0 CHASS_ID1
BRD_ID0 BRD_ID1 BRD_REV0 BRD_REV1
GP14 :CHASSIS ID0 GP15 :CHASSIS_ID1 GP23 :BRD_ID0 GP27 :BRD_ID1
GP10, GP11 PULLDOWN FOR INITIAL VERSION.
R665 8.2K R666 8.2K
R669 10K R670 4.7K R671 8.2K
C87 X_2.2u-0805
R672 10M R673 10K R817 2.2K
R187 4.7K
R674 8.2K R675 8.2K R676 X_1K R677 10K R678 X_1K R679 X_10K
R681 1K R682 X_4.7K R683 1K R684 X_4.7K R685 1K
VCC3 VCC3
VCC5
VCC3_SB VCC3_SB VCC3_SB
RTC_VCC
VCC3 VCC3
VCC3 VCC3 VCC3 VCC3
2
CPU_FAN_SENSE
VCC3
R658 2.2K
SYS_FAN_B
Q68
SI2303DS-S-SOT23
CPURST#(6)
2.2K R651
CFAN1_2
FAN_GND1
FAN_SINK(20)
C297
33p
SYS_FAN_SENSE
R662
X_0/0805
SFAN1_2
FAN_GND1
FAN_GND1
R659 2.2K
THRMTRIP LEVEL SHIFT
R729 15K Q22
MSI
Title
Size Document Number Rev
Date: Sheet of
Q22_B
I/O LPC47B367 & ADM1028
R652 0
D22
1N4148-S-LL34
3
C_FAN1
2
D1x3-WH-SN
1
JFANG_SEL1
1 2 3
YJ103
SYSFAN
D23 1N4148-S-LL34
3
S_FAN1
2
D1x3-WH-SN
1
VCC3
R728
8.2KR667 1K
-IO_TRMTRIP
2N3904S
MICRO-STAR
H/W Project Leader : Joey Lee H/W Project Engineer : Daniel Lee
MS-6541I1
1
CPU_FANCPUFAN
R660
SYS_FAN
0
TRMTRIP# (4,9)
11 29Tuesday, March 05, 2002
0AE0
Page 12
ID1# ID0#
1 1 1 0 0 1 0 0
D D
C C
8
CODEC CLOCK
24.576MHz
12.288MHz
48.000MHz
14.318MHz
FB4 80S/0805
VCC3
AC_RST#(10)
AC_SDIN0(10) AC_SDOUT(10) AC_SYNC(10) AC_BCLK(10)
CODEC_14(3)
Internal Pull-up
R195 4.7K1 2 R199 4.7K1 2
+
CB126
CT19
0.1u
10u
0
R815
R204 33 R205 33
R206 33
X_10pC92
DVDD1
CB127
0.1u
X_INCODEC_14 X_OUT
SDIN SDOUT
BITCLK
AUX_L AUX_R
CD_L
CD_GND
7
R800 1K R801 1K
U10
1
DVDD1
9
DVDD2
4
DVSS1
7
DVSS2
2
XTL_IN
3
XTL_OUT
11
RESET#
8
SDATA_IN
5
SDATA_OUT
10
SYNC
6
BIT_CLK
12
PC_BEEP
R753 4.7K
R754 4.7K
ID0# ID1#
U10_47 U10_48
4847464544424140394338
NC
NC
TEST6
TEST5
TEST4
AVSS2
TEST1
DACOUTR
AD1981
PHONE
AUXL
AUXR
VIDEOL
VIDEOR
CDL
CDGND
1314151617181920212223
U10_16 U10_17
TEST2
DACOUTL
CDR
MIC1
CMIMIC_INCD_R
37
AVDD2
MIC2
6
MONO
LINL
LOUTR
LOUTL
NC NC
VRDA VRAD
AFILT2 AFILT1
NC
VREF
AVDD1
AVSS1
LINR
ADI-AD1981
24
LINR1
LINL1
HP_OUTR HP_OUTL
+
CT17 10u
36 35
34 33
32 31
30 29
28 27 25
26
C98 1u-0603
C102 1u-0603
CB128
0.1u
+5VR
U10_34
CB125
0.1u
R209 6.2K_1%
R212 6.2K_1%
VREF
5
HP_OUTR (24) HP_OUTL (24)
+5VR
AC'97 AUDIO CODE AD1981/1885 CHIPSET
R752
For AD1981 C298 mount 0 ohm, For
0
AD1885 C298 mount 0.047uF
C89
U10_33
0.1u
+5VR
CB309
X_10u
R207_1
R211_1
R813 0
+
C330
1u-0603
R207 6.2K_1%
R211 6.2K_1%
X_0.047uC298
U10_29
C93
C94
0.1u 270p
U10_30
C95 270p
C99 390p
C103 390p
LINR
LINL
U10_31
C96 270p
U10_32
4
3
2
1
AUDIO CODE CRYSTAL CIRCUIT
X_OUT
SPEAKER_R MONO_R MONO_L SPEAKER_L
LINR
LINL
MIC_REF
C97R802 X_0
270p
MIC1
AUD_X1
1 2 4 5 3
6 7 8 9
17 10
11 12 13 14 15 16 18
L_OUT_IN_MIC
AUDIO CODE REGULATORS
VCC5
FB47 X_80S/0805
+12V
3 1
C100 1u-0805
R200 X_10M
C90 X_22p
VR1 L78L05-TO92-100mA
VIN VOUT
X3
X_24M-16pf-HC49S-D
16pF
GND
2
+5VR
C101
1u-0805
+5VR
C91 X_22p
X_IN
R812
X_0
1 O
TOP VIEW
2
3
G
I
CD-IN CONNECTOR
CD_R
C112 1u-0603
CD_GND R529_1
C114 1u-0603
CD_L
L9
HPR_OUTR(24)
HPR_OUTL(24)
B B
R216 1K
R219 1K
1 2
300
L10
1 2
300
SPEAKER_R
C109 560p
SPEAKER_L
C116 560p
CMIMIC_IN(24)
R213 1.5K R214 2.2K
+5VR
C117 0.1u
C104 4.7u/0805
C105 0.1u/0805
VCC5
C106
0.1u
MIC_REFR214_1
R215 100
C107 390p
MIC_REF (24)
MIC1R215_1
C115 1u-0603 R221 4.7K
AUX_R JAUX1_4
C299 1u-0603
C300 1u-0603
R218_1
R221_1
R222
4.7K
R687_1AUX_L
R688
4.7K
R686_1
R530
2.7K
R224
4.7K
R686 4.7K
R687 4.7K
R689
4.7K
R218 4.7K R529 2.7K
JCD1_4 JCD1_2
JCD1_1
2.54mm
JAUX1_1
4
JCD1
3
YJ104-B
2 1
CD IN
4
JAUX1
3
YJ104-B
2 1
AUX IN
2.54mm
INTERNAL_SPEAKER
+12V
FB43
M_OUT
SPKR_OUT
7
R691 20K
+12VA
M_OUT_R
C302 1u/0805
FB44 80S/0805
R693 22K
R699
1.91K_1%
6
GNDA
VOL_IN VOL_CTRL
CB307 0.1u
U36
5
VI
7
VC
6
S_GND
15
P_GND
TDA7056AT(3W)
OUT+
C301 1u/0805R690 20K
R692 10K
MONO_L
R694 20K R695 10K
R697
SPKR(10)
A A
8
R_SPKR
100K
C301_1
C303 0.01u R698 20K
R700
C304
10K
0.01u
80S/0805
VCC
OUT-
+12VAMONO_R
4 14
17
5
+
CT74 100u_25V
MONO_OUT+ MONO_OUT-
CB306
0.1u INTL_SPK1
2 1
SIP2B
4
3
DECOUPLING CAPACITOR
FB6 0/0805 FB5 0/0805 C122 X_0.1u C123 X_0.1u
MSI
Title
AC'97 AUDIO Codec-AD1981 & Amplifer-SSM2211
Size Document Number Rev
Date: Sheet of
2
MICRO-STAR
H/W Project Leader : Joey Lee H/W Project Engineer : Daniel Lee
MS-6541I1
12 29Tuesday, March 05, 2002
1
0AE0
Page 13
PCIRST#1(3) FWH_RST#(11)
FRONT_USB#(19)
BIOS_P(11)
LAD0/FWH0(10,11) LAD1/FWH1(10,11) LAD2/FWH2(10,11)
R820 X_0 R821 0
PRES3 FRONT_USB# PRES1 PERS0
TBL#
FWH DECOUPLING CAPACITORS
VCC3
CB129
0.1u
+
CT23 10u
VCC3
U12
1
RST#
Place Cap. as Close to FWH< 350 mil
VPP
2
RST#
3
FGPI3
4
FGPI2
5
FGPI1
6
FGPI0
7
WP#
8
TBL#
9
ID3
10
ID2
11
ID1
12
ID0
13
FWH0
14
FWH1
15
FWH2
16 17
GND FWH3
PLCC32-SMT
FGPI4
IC(VIL)
GNDA
VCCA
INIT#
FWH4
GND
VCC
VCC
RFU RFU RFU RFU RFU
FWH RESISTORSFirware Hub (FWH)
PRES4
32 31
CLK
30 29 28 27 26 25 24 23 22 21 20 19 18
PRES4
INIT#
VCC3
FWH_PCLK (3)
LFRAME#/FWH4 (10,11)
LAD3/FWH3 (10,11)
PRES3
PRES1
PERS0
TBL#
FRONT_USB#
FWH INIT Signal Voltage Translation Block
VCC3
R233
8.2K
Q7_B
Q8_B
HINIT#(9)
R234 10K
Q8
2N3904S
2N3904S
Q7
R236 1K R242 1K R244 1K R240 1K
R604 X_10K R243 8.2K
TBL# PRES1
R789 8.2K
VCC3
INIT#
R232 330
R790
JTBL1 PIN1*2
Default OPEN
8.2K
TBL#
VCC3
VCC3
PCB OTHER COMPONENT
BS1
X_150 Drill / 300 Pad
1
8
2
7
3
6
4 5
9
BS4
X_150 Drill / 300 Pad
1
8
2
7
3
6
4 5
9
BS7
X_150 Drill / 300 Pad
1
8
2
7
3
6
4 5
9
SIMULATION TRACE
VCC5
J1
J1_2
X_PIN1*2
BS2
X_150 Drill / 300 Pad
1 2 3 4 5
9
BS5
X_150 Drill / 300 Pad
1 2 3 4 5
9
BS8
X_150 Drill / 300 Pad
1 2 3 4 5
9
8 7 6
8 7 6
8 7 6
J2_1
X_PIN1*2
X_150 Drill / 300 Pad
1 2 3 4 5
X_150 Drill / 300 Pad
1 2 3 4 5
J2
BS3
8 7 6
9
BS6
8 7 6
9
SMBus Isolation
+12V
Q47 2N7002S
Q49 2N7002SG
SMBCLK (10,11)
SMBCLK_ISO (3)
SMBDATA(10,11)
SMBDATA_ISO (3)
R444
3.3K
Q59_D
R445 10K
DS
PWROK#(20)
PWROK#
Q59 2N7002S
G
Q49_G
DS
G
DS
Location Reference Hold
12
12
FM2 FM
12
FM6 FM
MICRO-STAR
12
12
MS-6541I1
FM4
FM3
FM
FM
12
FM8
FM7
FM
FM
H/W Project Leader : Joey Lee H/W Project Engineer : Daniel Lee
13 29Tuesday, March 05, 2002
12
FM1 FM
12
FM5 FM
MSI
Title
Size Document Number Rev
Date: Sheet of
FWH & Write Protect
0AE0
Page 14
8
7
MEM_STR
6
5
4
3
MEM_STR
2
1
SYSTEM MEMORY
738467085
108
120
148
738467085
108
120
148
168223054627796
D D
DDRMD[0..63](7,15)
C C
B B
MWE#(7,15)
150_1%
DDR_VREF
A A
150_1%
Keep the voltage divider within 1" of DIMM1. Trace width 12 mil with 12 mil space.
Place 104p Cap. near the DIMM
8
MEM_STR
R250
MWE#
DDRMD0 DDRMD1 DDRMD2 DDRMD3 DDRMD4 DDRMD5 DDRMD6 DDRMD7 DDRMD8 DDRMD9 DDRMD10 DDRMD11 DDRMD12 DDRMD13 DDRMD14 DDRMD15 DDRMD16 DDRMD17 DDRMD18 DDRMD19 DDRMD20 DDRMD21 DDRMD22 DDRMD23 DDRMD24 DDRMD25 DDRMD26 DDRMD27 DDRMD28 DDRMD29 DDRMD30 DDRMD31 DDRMD32 DDRMD33 DDRMD34 DDRMD35 DDRMD36 DDRMD37 DDRMD38 DDRMD39 DDRMD40 DDRMD41 DDRMD42 DDRMD43 DDRMD44 DDRMD45 DDRMD46 DDRMD47 DDRMD48 DDRMD49 DDRMD50 DDRMD51 DDRMD52 DDRMD53 DDRMD54 DDRMD55 DDRMD56 DDRMD57 DDRMD58 DDRMD59 DDRMD60 DDRMD61 DDRMD62 DDRMD63
C129
0.1u
C130
0.1u
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
2
DQ0
4
DQ1
6
DQ2
8
DQ3
94
DQ4
95
DQ5
98
DQ6
99
DQ7
12
DQ8
13
DQ9
19
DQ10
20
DQ11
105
DQ12
106
DQ13
109
DQ14
110
DQ15
23
DQ16
24
DQ17
28
DQ18
31
DQ19
114
DQ20
117
DQ21
121
DQ22
123
DQ23
33
DQ24
35
DQ25
39
DQ26
40
DQ27
126
DQ28
127
DQ29
131
DQ30
133
DQ31
53
DQ32
55
DQ33
57
DQ34
60
DQ35
146
DQ36
147
DQ37
150
DQ38
151
DQ39
61
DQ40
64
DQ41
68
DQ42
69
DQ43
153
DQ44
155
DQ45
161
DQ46
162
DQ47
72
DQ48
73
DQ49
79
DQ50
80
DQ51
165
DQ52
166
DQ53
170
DQ54
171
DQ55
83
DQ56
84
DQ57
87
DQ58
88
DQ59
174
DQ60
175
DQ61
178
DQ62
179
DQ63
90
WP(NC)
63
WE#
1
VREF
9
NC2
101
SLAVE ADDRESS = 1010000B
NC3
102
NC4
7
VDD8
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
3111826344250586674818993
VDDQ0
VDDQ1
VSS6
VSS7
VDDQ2
VDDQ3
VSS8
VSS9
VDDQ4
DDR DIMM
VSS10
104
112
VDDQ5
VDDQ6
VSS11
VSS12
100
128
VDDQ7
SOCKET
VSS13
116
136
143
VDDQ8
VDDQ9
VSS14
VSS15
124
132
156
164
172
1801582
VDDQ11
VDDQ12
VDDQ13
VSS17
VSS18
VSS19
145
152
VDDQ14
NC(RESET#)
VSS20
160
176
VDDID
VDDQ15
FETEN
A10_AP
CK0(DU) CK0#(DU) CK1(CK0)
CK1#(CK0#)
CK2(DU) CK2#(DU)
VSS21
VDDQ10
VSS16
139
Close to North-Bridge
6
184
VDDSPD
CS0# CS1# CS2# CS3#
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9
A11 A12 A13
BA0 BA1 BA2 SCL
SDA
SA0 SA1 SA2
CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7
NC5
CKE0 CKE1 CAS# RAS#
DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DM8
DDR1 N13-1840021
DDR1
VDD0
DDRMD0
157 158 71 163
SDQS0
5
SDQS1
14
SDQS2
25
SDQS3
36
SDQS4
56
SDQS5
67
SDQS6
78
SDQS7
86 47
167
DDRMAA0
48
DDRMAA1
43
DDRMAA2
41
DDRMAA3
130
DDRMAA4
37
DDRMAA5
32
DDRMAA6
125
DDRMAA7
29
DDRMAA8
122
DDRMAA9
27
DDRMAA10
141
DDRMAA11
118
DDRMAA12
115 103
MSBS0
59
MSBS1
52 113
SMBCLK
92
SMBDATA
91 181 182 183
44 45 49 51 134 135 142 144
DCLK1
16
DCLK1#
17
DCLK0
137
DCLK0#
138
DCLK2
76
DCLK2#
75 173
10
MSCKE0
21
MSCKE1
111
MCAS#
65
MRAS#
154
SDM0
97
SDM1
107
SDM2
119
SDM3
129
SDM4
149
SDM5
159
SDM6
169
SDM7
177 140
MSCS0# (7,15) MSCS1# (7,15)
MSBS0 (7,15) MSBS1 (7,15)
SMBCLK (10,11) SMBDATA (10,11)
9Pcs doupling caps place between DDR1 and DDR2
DCLK1 (7) DCLK1# (7) DCLK0 (7) DCLK0# (7) DCLK2 (7) DCLK2# (7)
MSCKE0 (7,15) MSCKE1 (7,15) MCAS# (7,15) MRAS# (7,15)
SDM0 (15) SDM1 (15) SDM2 (15) SDM3 (15) SDM4 (15) SDM5 (15) SDM6 (15) SDM7 (15)
SDQS[0..7] (7,15)
DDRMAA[0..12] (7,15)
MEM_STR
CB130
0.1u CB131
0.1u CB132
0.1u CB133
0.1u CB134
0.1u CB135
0.1u CB136
0.1u CB137
0.1u CB138
0.1u
DDR_VREF
DDRMD1
DDRMD2
DDRMD3
DDRMD4
DDRMD5
DDRMD6
DDRMD7
DDRMD8
DDRMD9
DDRMD10
DDRMD11
DDRMD12
DDRMD13
DDRMD14
DDRMD15
DDRMD16
DDRMD17
DDRMD18
DDRMD19
DDRMD20
DDRMD21
DDRMD22
DDRMD23
DDRMD24
DDRMD25
DDRMD26
DDRMD27
DDRMD28
DDRMD29
DDRMD30
DDRMD31
DDRMD32
DDRMD33
DDRMD34
DDRMD35
DDRMD36
DDRMD37
DDRMD38
DDRMD39
DDRMD40
DDRMD41
DDRMD42
DDRMD43
DDRMD44
DDRMD45
DDRMD46
DDRMD47
DDRMD48
DDRMD49
DDRMD50
DDRMD51
DDRMD52
DDRMD53
DDRMD54
DDRMD55
DDRMD56
DDRMD57
DDRMD58
DDRMD59
DDRMD60
DDRMD61
DDRMD62
DDRMD63
MWE#
C128
0.1uR249
VDD1
2
DQ0
4
DQ1
6
DQ2
8
DQ3
94
DQ4
95
DQ5
98
DQ6
99
DQ7
12
DQ8
13
DQ9
19
DQ10
20
DQ11
105
DQ12
106
DQ13
109
DQ14
110
DQ15
23
DQ16
24
DQ17
28
DQ18
31
DQ19
114
DQ20
117
DQ21
121
DQ22
123
DQ23
33
DQ24
35
DQ25
39
DQ26
40
DQ27
126
DQ28
127
DQ29
131
DQ30
133
DQ31
53
DQ32
55
DQ33
57
DQ34
60
DQ35
146
DQ36
147
DQ37
150
DQ38
151
DQ39
61
DQ40
64
DQ41
68
DQ42
69
DQ43
153
DQ44
155
DQ45
161
DQ46
162
DQ47
72
DQ48
73
DQ49
79
DQ50
80
DQ51
165
DQ52
166
DQ53
170
DQ54
171
DQ55
83
DQ56
84
DQ57
87
DQ58
88
DQ59
174
DQ60
175
DQ61
178
DQ62
179
DQ63
90
WP(NC)
63
WE#
1
VREF
9
NC2
101
NC3
102
NC4
Place 104p Cap. near the DIMM
MEM_STR
+
CT24
1000UF_6V
5
CT26
+
470u
4
168223054627796
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
SLAVE ADDRESS = 1010010B
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
3111826344250586674818993
3
VDDQ0
VDDQ1
VSS6
VSS7
104
112
128
136
143
156
164
172
1801582
184
VDDQ2
VDDQ3
DDR DIMM
VSS8
VSS9
VDDQ4
VDDQ5
VSS10
VSS11
VDDQ6
VDDQ7
SOCKET
VSS12
VSS13
100
116
VDDQ8
VDDQ9
VSS14
VSS15
124
132
VDDQ10
VSS16
139
VDDQ11
VDDQ12
VDDQ13
VSS17
VSS18
VSS19
145
152
VDDQ14
VDDQ15
CK1#(CK0#)
NC(RESET#)
VSS20
VSS21
160
176
VDDID
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8
FETEN
A10_AP
CK0(DU) CK0#(DU) CK1(CK0)
CK2(DU) CK2#(DU)
CKE0 CKE1 CAS# RAS#
DDR2 N13-1840021
VDDSPD
CS0# CS1# CS2# CS3#
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9
A11 A12 A13
BA0 BA1 BA2 SCL
SDA
SA0 SA1 SA2
CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7
NC5
DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DM8
157 158 71 163
SDQS0
5
SDQS1
14
SDQS2
25
SDQS3
36
SDQS4
56
SDQS5
67
SDQS6
78
SDQS7
86 47
167
DDRMAA0
48
DDRMAB1
43
DDRMAB2
41
DDRMAA3
130
DDRMAB4
37
DDRMAB5
32
DDRMAA6
125
DDRMAA7
29
DDRMAA8
122
DDRMAA9
27
DDRMAA10
141
DDRMAA11
118
DDRMAA12
115 103
MSBS0
59
MSBS1
52 113
SMBCLK
92
SMBDATA
91 181 182 183
44 45 49 51 134 135 142 144
16 17 137 138 76 75
173 10
21 111 65 154
97 107 119 129 149 159 169 177 140
DCLK4 DCLK4# DCLK3 DCLK3# DCLK5 DCLK5#
MSCKE2 MSCKE3 MCAS# MRAS#
SDM0 SDM1 SDM2 SDM3 SDM4 SDM5 SDM6 SDM7
MEM_STR
DDR2
MSI
Title
Size Document Number Rev
Date: Sheet of
2
MICRO-STAR
DDR DIMM1&2
MS-6541I1
H/W Project Leader : Joey Lee H/W Project Engineer : Daniel Lee
MSCS2# (7,15) MSCS3# (7,15)
DDRMAB1 (7,15) DDRMAB2 (7,15)
DDRMAB4 (7,15) DDRMAB5 (7,15)
DCLK4 (7) DCLK4# (7) DCLK3 (7) DCLK3# (7) DCLK5 (7) DCLK5# (7)
MSCKE2 (7,15)
MSCKE3 (7,15)
14 29Tuesday, March 05, 2002
1
0AE0
Page 15
8
7
6
5
4
3
2
1
DDR TERMINATORS
DDRMD1
RN27 56
D D
SDM5(7,14) SDM3(7,14) SDQS4(7,14)
SDQS5(7,14) DDRMAA12(7,14) DDRMAA6(7,14) DDRMAA3(7,14)
MSBS0(14) DDRMD41(7,14) DDRMAB5(7,14) DDRMAB4(7,14) DDRMAA4(7,14) DDRMAA5(7,14)
MSCKE[0..3](7,14)
MSBS1(14)
DDRMAA10(7,14)
C C
B B
DDRMAA0(7,14)
DDRMAA8(7,14) DDRMAA7(7,14) DDRMAA9(7,14) DDRMAA11(7,14)
MSCS1#(7,14) MSCS0#(7,14) MSCS3#(7,14) MSCS2#(7,14)
DDRMAA1(7,14) DDRMAB1(7,14) DDRMAA2(7,14) DDRMAB2(7,14)
MCAS#(7,14) MWE#(7,14) MRAS#(7,14)
SDM5 SDM3 SDQS4 SDQS5 DDRMAA12 DDRMAA6 DDRMAA3 MSBS0 DDRMD41 DDRMAB5 DDRMAB4 DDRMAA4 DDRMAA5
MSBS1 DDRMAA10 DDRMAA0
DDRMAA8 DDRMAA7 DDRMAA9 DDRMAA11
MSCS1# MSCS0# MSCS3# MSCS2#
DDRMAA1 DDRMAB1 DDRMAA2 DDRMAB2
MCAS# MWE# MRAS#
MSCKE0 MSCKE2 MSCKE1 MSCKE3
R251 56 R252 56 R253 56 R263 56 R617 56 R256 56 R618 56 R619 56 R259 56
R620 33 R621 33 R622 33 R623 33
RN32 56
1 2 3 4 5 6 7 8
RN35 56
1 2 3 4 5 6 7 8
RN37 56
1 2 3 4 5 6 7 8
RN40 56
1 2 3 4 5 6 7 8
RN70 33
1 2 3 4 5 6 7 8
R738 56 R739 56 R740 56
VTT_DDR
DDRMD1(7,14) DDRMD5(7,14) DDRMD0(7,14) DDRMD4(7,14) DDRMD6(7,14) DDRMD2(7,14) SDQS0(7,14) SDM0(7,14) DDRMD9(7,14) DDRMD8(7,14) DDRMD3(7,14) DDRMD7(7,14) DDRMD11(7,14) DDRMD10(7,14) DDRMD15(7,14) DDRMD14(7,14) SDM1(7,14) SDQS1(7,14) DDRMD13(7,14) DDRMD12(7,14) DDRMD21(7,14) DDRMD17(7,14) DDRMD16(7,14) DDRMD20(7,14) DDRMD22(7,14) DDRMD18(7,14) SDM2(7,14) SDQS2(7,14)
DDRMD24(7,14) DDRMD23(7,14) DDRMD19(7,14) SDQS3(7,14) DDRMD29(7,14) DDRMD25(7,14) DDRMD28(7,14) DDRMD31(7,14) DDRMD27(7,14) DDRMD26(7,14) DDRMD30(7,14) DDRMD37(7,14) DDRMD33(7,14) DDRMD36(7,14) DDRMD32(7,14) DDRMD39(7,14) DDRMD38(7,14) DDRMD34(7,14) SDM4(7,14) DDRMD45(7,14) DDRMD44(7,14) DDRMD40(7,14) DDRMD35(7,14) DDRMD47(7,14) DDRMD43(7,14) DDRMD46(7,14) DDRMD42(7,14) DDRMD53(7,14) DDRMD52(7,14) DDRMD49(7,14) DDRMD48(7,14) DDRMD56(7,14) DDRMD60(7,14) DDRMD51(7,14) DDRMD50(7,14) DDRMD55(7,14) DDRMD54(7,14) SDQS6(7,14) SDM6(7,14) SDQS7(7,14) SDM7(7,14) DDRMD57(7,14) DDRMD61(7,14) DDRMD59(7,14) DDRMD63(7,14) DDRMD58(7,14) DDRMD62(7,14)
DDRMD5 DDRMD0 DDRMD4 DDRMD6 DDRMD2 SDQS0 SDM0 DDRMD9 DDRMD8 DDRMD3 DDRMD7 DDRMD11 DDRMD10 DDRMD15 DDRMD14 SDM1 SDQS1 DDRMD13 DDRMD12 DDRMD21 DDRMD17 DDRMD16 DDRMD20 DDRMD22 DDRMD18 SDM2 SDQS2
DDRMD24 DDRMD23 DDRMD19 SDQS3 DDRMD29 DDRMD25 DDRMD28 DDRMD31 DDRMD27 DDRMD26 DDRMD30 DDRMD37 DDRMD33 DDRMD36 DDRMD32 DDRMD39 DDRMD38 DDRMD34 SDM4 DDRMD45 DDRMD44 DDRMD40 DDRMD35 DDRMD47 DDRMD43 DDRMD46 DDRMD42 DDRMD53 DDRMD52 DDRMD49 DDRMD48 DDRMD56 DDRMD60 DDRMD51 DDRMD50 DDRMD55 DDRMD54 SDQS6 SDM6 SDQS7 SDM7 DDRMD57 DDRMD61 DDRMD59 DDRMD63 DDRMD58 DDRMD62
1 2 3 4 5 6 7 8
RN28 56
1 2 3 4 5 6 7 8
RN29 56
1 2 3 4 5 6 7 8
RN30 56
1 2 3 4 5 6 7 8
RN31 56
1 2 3 4 5 6 7 8
RN33 56
1 2 3 4 5 6 7 8
RN34 56
1 2 3 4 5 6 7 8
R735 56 R736 56 R737 56
RN38 56
1 2 3 4 5 6 7 8
RN39 56
1 2 3 4 5 6 7 8
RN41 56
1 2 3 4 5 6 7 8
RN42 56
1 2 3 4 5 6 7 8
RN43 56
1 2 3 4 5 6 7 8
RN44 56
1 2 3 4 5 6 7 8
RN45 56
1 2 3 4 5 6 7 8
RN46 56
1 2 3 4 5 6 7 8
RN72 56
1 2 3 4 5 6 7 8
RN73 56
1 2 3 4 5 6 7 8
RN74 56
1 2 3 4 5 6 7 8
VTT_DDR
VTT_DDR
DDR Decouping Caps
VTT_DDR VTT_DDR
CB280
0.1u CB281
0.1u CB282
0.1u CB283
0.1u CB284
0.1u CB285
0.1u CB286
0.1u CB287
0.1u CB288
0.1u CB289
0.1u CB290
0.1u CB291
0.1u CB292
0.1u CB293
0.1u CB294
0.1u CB295
0.1u CB296
0.1u
CB139
0.1u CB141
0.1u CB143
0.1u CB145
0.1u CB147
0.1u CB149
0.1u CB151
0.1u CB153
0.1u CB155
0.1u CB157
0.1u CB159
0.1u CB161
0.1u CB163
0.1u CB165
0.1u CB167
0.1u CB169
0.1u CB171
0.1u
Total 110 signal, need 55 pcs decoupling.
Place for VTT_DDR island
VTT_DDR
CT27
+
470u
Place at the end of the VTT_DDR island
VTT_DDR
C133
4.7u-0805 C132
4.7u-0805 C131
4.7u-0805
Top Vtt
C enter Vtt
B ottom Vtt
CB140
0.1u CB142
0.1u CB144
0.1u CB146
0.1u CB148
0.1u CB150
0.1u CB152
0.1u CB154
0.1u CB156
0.1u CB158
0.1u CB160
0.1u CB162
0.1u CB164
0.1u CB166
0.1u CB168
0.1u CB170
0.1u CB172
0.1u CB173
0.1u CB174
0.1u CB175
0.1u CB176
0.1u
A A
MSI
Title
Size Document Number Rev
8
7
6
5
4
3
Date: Sheet of
2
MICRO-STAR
H/W Project Leader : Joey Lee H/W Project Engineer : Daniel Lee
DDR Terminator Resistor
MS-6541I1
15 29Tuesday, March 05, 2002
0AE0
1
Page 16
8
7
6
5
4
3
2
1
AGP SIGNAL REFERENCE CIRCUIT
AGP 1.5V 2X/4X SLOT(AGP VER:2.0 COMPLY)
D D
INTB#(9) INTA# (9,24)
AGPCLK(3)
GREQ#(7)
ST0(7) ST2(7)
RBF#(7)
SBA0(7) SBA2(7)
SB_STB(7)
SBA4(7) SBA6(7)
C C
B B
GAD31(7) GAD29(7)
GAD27(7) GAD25(7)
GAD_STB1(7)
GAD23(7) GAD21(7)
GAD19(7) GAD17(7)
GC_BE#2(7)
GIRDY#(7)
GDEVSEL#(7)
GC_BE#1(7)
GAD14(7) GAD12(7)
GAD10(7)
GAD8(7)
GAD_STB0(7)
GAD7(7) GAD5(7)
GAD3(7) GAD1(7)
AGPREF(7)
VCC5 = 60mils trace / 15 mils space
AGP1
B1
-OVRCNT
VCC5
INTB# INTA# GREQ#
VCC3
RBF#
SB_STB
VCC3_SB
GAD_STB1
VCC_AGP
GIRDY#
GPERR# GSERR#
GAD_STB0
AGPREF
CB178
0.1u
B2
5V
B3
5V
B4
USB+
B5
GND
B6
-INTB
B7
CLK
B8
-REQ
B9
3.3V
B10
ST0
B11
ST2
B12
-RBF
B13
GND
B14
RESERVED
B15
SBA0
B16
3.3V
B17
SBA2
B18
SB_STB
B19
GND
B20
SBA4
B21
SBA6
B22
RSVD/KEY
B23
GND/KEY
B24
AUX3V/KEY
B25
3.3V/KEY
B26
AD31
B27
AD29
B28
3.3V
B29
AD27
B30
AD25
B31
GND
B32
AD_STB1
B33
AD23
B34
VDDQ
B35
AD21
B36
AD19
B37
GND
B38
AD17
B39
C/-BE2
B40
VDDQ
B41
-IRDY
B42
AUX3V/KEY
B43
GND/KEY
B44
RSVD/KEY
B45
3.3V/KEY
B46
-DEVSEL
B47
VDDQ
B48
-PERR
B49
GND
B50
-SERR
B51
C/-BE1
B52
VDDQ
B53
AD14
B54
AD12
B55
GND
B56
AD10
B57
AD8
B58
VDDQ
B59
AD_STB0
B60
AD7
B61
GND
B62
AD5
B63
AD3
B64
VDDQ
B65
AD1
B66
VREF_CG
AGP-D124-BN_1.5V
INTA# INTB#
-TYPEDET
RESERVED
-INTA
-GNT
RESERVED
-PIPE
-WBF SBA1
SBA3
-SB_STB SBA5
SBA7
RSVD/KEY
GND/KEY
RSVD/KEY
3.3V/KEY
-AD_STB1 C/-BE3
VDDQ
VDDQ
-FRAME
RSVD/KEY
GND/KEY
RSVD/KEY
3.3V/KEY
-TRDY
-STOP
-PME
VDDQ
C/-BE0
VDDQ
-AD_STB0
VDDQ
VREF_GC
USB-
GND
-RST
GND
GND
AD30 AD28
AD26 AD24
GND
AD22 AD20
GND AD18 AD16
GND AD15 AD13
AD11
GND
GND
A1
12V
3.3V ST1
3.3V
3.3V
PAR
AD9
AD6 AD4
AD2 AD0
+12V
A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66
GGNT#
VCC3
PIPE# WBF#
SB_STB#
GAD_STB#1
VCC_AGP
GFRAME#
GTRDY#GDEVSEL# GSTOP#
GPAR
GAD_STB#0
AGP Slot Imax VCCq 8.0A
VCC3 6.0A VCC12 1.0A VCC5 2.0A VCC3_SB ?A
AGP_RST#(11) GGNT#(7)
ST1(7) PIPE# (7) WBF# (7)
SBA1 (7) SBA3 (7)
SB_STB# (7) SBA5 (7)
SBA7 (7)
GAD30 (7) GAD28 (7)
GAD26 (7) GAD24 (7)
GAD_STB#1 (7) GC_BE#3 (7)
GAD22 (7) GAD20 (7)
GAD18 (7) GAD16 (7)
GFRAME# (7)
GTRDY# (7) GSTOP#(7) PME# (9,11,17,24)
GPAR (7) GAD15 (7)
GAD13 (7) GAD11 (7)
GAD9 (7) GC_BE#0 (7)
GAD_STB#0 (7) GAD6 (7)
GAD4 (7) GAD2 (7)
GAD0 (7)
GFRAME# GIRDY# GTRDY# GDEVSEL# GSTOP#
GPAR GPERR# GSERR#
WBF# PIPE# RBF# ST1 ST2
ST0 GREQ# GGNT#
VCC_AGP VCC5
+
CT28 1000UF_6V CB78
0.1u C138
0.1u C139
0.1u 0.01u C141
0.01u C322
0.01u CB272
0.1u
VCC_AGP
R277
AGPREF: 10uA
1K_1%
AGPREF
R278 1K_1%
NEAR AGP SLOT
AGP TERMINATION RESISTORS
3 4 5 6 7 8 1 2 3 4 5 6 7 8
/N /N /N /N /N
VCC_AGP
X_8P4R-6.8K
R279 X_6.8K R281 X_6.8K R283 X_6.8K R285 X_6.8K R286 X_6.8K
R289 X_6.8K R291 6.8K R292 6.8K
RN78 X_8P4R-6.8K1 2
RN79
AGP SLOT DECOUPLING CAPACITORS
C134
0.01u
GAD_STB0 GAD_STB1 SB_STB
GAD_STB#1 GAD_STB#0 SB_STB#
LESS 100MILS STUB TRACE LENGTH FOR 2/4X LESS 500MIL FOR 1X MUST BE FOLLOWING.
R280 X_6.8K R282 X_6.8K R284 X_6.8K
R287 X_6.8K R288 X_6.8K R290 X_6.8K
/N
VCC_AGP
/N /N
/N /N /N
Place these resistors between AGP slot & GMCH
VCC3_SB VCC3+12V
C135
0.01u
C136
0.01u
+
CT29 1000UF_6V CB179
0.1u CB180
0.1u CB181
A A
MSI
Title
Size Document Number Rev
8
7
6
5
4
3
Date: Sheet of
2
MICRO-STAR
H/W Project Leader : Joey Lee H/W Project Engineer : Daniel Lee
AGP SLOT
MS-6541I1
16 29Tuesday, March 05, 2002
1
0AE0
Page 17
8
7
6
5
4
3
2
1
PCI SLOT 1 (PCI VER: 2.2 COMPLY) PCI SLOT 2 (PCI VER: 2.2 COMPLY)
PREQ#1
VCC3
-12V
PCI2
B1 B2 B3 B4 B5 B6 B7 B8
B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49
B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62
-12V TCK GND TDO +5V +5V INTB# INTD# PRSNT#1 RESERVED PRSNT#2 GND GND RESERVED GND CLK GND REQ# +5V(I/O) AD31 AD29 GND AD27 AD25 +3.3V C/BE#3 AD23 GND AD21 AD19 +3.3V AD17 C/BE#2 GND IRDY# +3.3V DEVSEL# GND LOCK# PERR# +3.3V SERR# +3.3V C/BE#1 AD14 GND AD12 AD10 GND
AD8 AD7 +3.3V AD5 AD3 GND AD1 +5V(I/O) ACK64# +5V +5V
PCI-D120-WH-SN
TRST#
RESERVED
+5V(I/O)
RESERVED
RESERVED
+5V(I/O)
RESERVED
FRAME#
TRDY#
STOP#
SDONE
C/BE#0
+5V(I/O)
REQ64#
+12V
TMS
INTA# INTC#
GND GND
RST#
GNT#
GND
AD30
+3.3V
AD28 AD26
GND
AD24
IDSEL
AD22 AD20
GND AD18 AD16
+3.3V
GND
GND
+3.3V SBO#
GND AD15
+3.3V
AD13 AD11
GND
+3.3V
GND
+3.3
PAR
+12V
A1 A2 A3 A4
TDI
A5
+5V
A6 A7 A8
+5V
A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49
AD9
A52 A53 A54
AD6
A55
AD4
A56 A57
AD2
A58
AD0
A59 A60 A61
+5V
A62
+5V
VCC5
VCC3
INTC# INTG#
VCC3_SB
PCIRST#2
PGNT#1 (9)
PME# AD30
AD28 AD26
AD24
AD25 AD26
R306 300
AD22 AD20
AD18 AD16
FRAME# TRDY# STOP# SMBCLK
SMBDATA PAR
AD15 AD13
AD11 AD9
C_BE#0 AD6
AD4 AD2
AD0 REQ#64
-12V
PCI1
B1
-12V
B2
TCK
B3
GND
B4
TDO
VCC3
B5 B6 B7 B8
B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49
B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62
+5V +5V INTB# INTD# PRSNT#1 RESERVED PRSNT#2 GND GND RESERVED GND CLK GND REQ# +5V(I/O) AD31 AD29 GND AD27 AD25 +3.3V C/BE#3 AD23 GND AD21 AD19 +3.3V AD17 C/BE#2 GND IRDY# +3.3V DEVSEL# GND LOCK# PERR# +3.3V SERR# +3.3V C/BE#1 AD14 GND AD12 AD10 GND
AD8 AD7 +3.3V AD5 AD3 GND AD1 +5V(I/O) ACK64# +5V +5V
PCI-D120-WH-SN
RESERVED
+5V(I/O)
RESERVED
RESERVED
+5V(I/O)
RESERVED
FRAME#
STOP#
SDONE
C/BE#0
+5V(I/O)
REQ64#
D D
C C
B B
VCC5
INTC# INTG#
PCICLK0(3) PCICLK2(3)
PREQ#0
AD31(9,24) AD29(9,24)
AD27(9,24) AD25(9,24)
C_BE#3(9,24)
AD23(9,24) AD21(9,24)
AD19(9,24) AD17(9,24)
C_BE#2(9,24)
IRDY#(9,24)
DEVSEL#(9,24)
PLOCK#(9)
PERR#(9,24) SERR#(9,24)
C_BE#1(9,24)
AD14(9,24) AD12(9,24)
AD10(9,24)
AD8(9,24) AD7(9,24)
AD5(9,24) AD3(9,24)
AD1(9,24)
ACK#64
TRST#
+12V
TMS
INTA# INTC#
GND GND
RST#
GNT#
GND
AD30
+3.3V
AD28 AD26
GND
AD24
IDSEL
AD22 AD20
GND AD18 AD16
+3.3V
GND
TRDY#
GND
+3.3V SBO#
GND AD15
+3.3V
AD13 AD11
GND
+3.3V
GND
+3.3
PAR
+12V
A1 A2 A3 A4
TDI
A5
+5V
A6 A7 A8
+5V
A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49
AD9
A52 A53 A54
AD6
A55
AD4
A56 A57
AD2
A58
AD0
A59 A60 A61
+5V
A62
+5V
INTA# INTF#
VCC5
VCC3
VCC3_SB
PCIRST#2 (11,24) PGNT#0 (9) PME# (9,11,16,24)
AD30 (9,24) AD28 (9,24)
AD26 (9,24) AD24 (9,24)
R308 300 R307 300
PCI1_ID
AD22 (9,24) AD20 (9,24)
AD18 (9,24) AD16 (9,24)
FRAME# (9,24) TRDY# (9,24) STOP#(9,24)
SMBCLK (10,11) SMBDATA(10,11)
PAR (9,24) AD15 (9,24)
AD13 (9,24) AD11 (9,24)
AD9 (9,24)
C_BE#0 (9,24) AD6 (9,24)
AD4 (9,24) AD2 (9,24)
AD0 (9,24)
REQ#64
AD20
INTF# INTA#
PCICLK1(3)
AD31 AD29
AD27 AD25
C_BE#3 AD23
AD21 AD19
AD17 C_BE#2
IRDY# DEVSEL# PLOCK#
PERR# SERR# C_BE#1
AD14 AD12
AD10
AD8 AD7
AD5 AD3
AD1 ACK#64
PCI SLOT 3 (PCI VER: 2.2 COMPLY)
-12V
PCI3
B1
-12V
B2
TCK
B3
GND
B4
TDO
VCC3
B5 B6 B7 B8
B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49
B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62
+5V +5V INTB# INTD# PRSNT#1 RESERVED PRSNT#2 GND GND RESERVED GND CLK GND REQ# +5V(I/O) AD31 AD29 GND AD27 AD25 +3.3V C/BE#3 AD23 GND AD21 AD19 +3.3V AD17 C/BE#2 GND IRDY# +3.3V DEVSEL# GND LOCK# PERR# +3.3V SERR# +3.3V C/BE#1 AD14 GND AD12 AD10 GND
AD8 AD7 +3.3V AD5 AD3 GND AD1 +5V(I/O) ACK64# +5V +5V
PCI-D120-WH-SN
RESERVED RESERVED
RESERVED
RESERVED
INTG# INTC#
PREQ#2
AD31 AD29
AD27 AD25
C_BE#3 AD23
AD21 AD19
AD17 C_BE#2
IRDY# DEVSEL# PLOCK#
PERR# SERR# C_BE#1
AD14 AD12
AD10
AD8 AD7
AD5 AD3
AD1 ACK#64
VCC5VCC5
TRST#
+12V
INTA# INTC#
+5V(I/O)
RST#
+5V(I/O)
GNT#
AD30
+3.3V
AD28 AD26
AD24
IDSEL
AD22 AD20
AD18 AD16
+3.3V
FRAME#
TRDY#
STOP#
+3.3V
SDONE
SBO#
AD15
+3.3V
AD13 AD11
C/BE#0
+3.3V
+5V(I/O)
REQ64#
TMS
GND GND
GND
GND
GND
GND GND
GND
GND
GND
+3.3
PAR
+12V
A1 A2 A3 A4
TDI
A5
+5V
A6 A7 A8
+5V
A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49
AD9
A52 A53 A54
AD6
A55
AD4
A56 A57
AD2
A58
AD0
A59 A60 A61
+5V
A62
+5V
VCC3
VCC5
INTF# INTA#
VCC3_SB
PCIRST#2
PGNT#2 (9)
PME# AD30
AD28 AD26
AD24 PCI3_IDPCI2_ID
AD22 AD20
AD18 AD16
FRAME# TRDY# STOP# SMBCLK
SMBDATA PAR
AD15 AD13
AD11 AD9
C_BE#0 AD6
AD4 AD2
AD0 REQ#64
IDSEL = AD20
IDSEL = AD25 MASTER = PREQ0 INTA#
PCI PULL-UP / DOWN RESISTORS
DEVSEL#
1 2
TRDY#
3 4
IRDY#
5 6
FRAME#
7 8
SERR#
1 2
PERR#
3 4
PLOCK#
5 6
STOP#
7 8 C143
SMBCLK
R310 2.7K
SMBDATA
A A
8
R311 2.7K
VCC5 VCC5
RN48
2.7K
RN51
2.7K
VCC3_SB
7
PREQ#3(9,24) PREQ#2(9) PREQ#1(9) PREQ#0(9) PREQ#4(9,24)
REQ#64 ACK#64
PREQ#3 PREQ#2 PREQ#1 PREQ#0 PREQ#4
1 2 3 4 5 6 7 8
R309 2.7K
R313 4.7K R314 4.7K
6
VCC5
RN49
2.7K
INTC#
PCI SLOT DECOUPLING CAPACITORS
RN50
8.2K
INTC#
INTC#(9,24) INTA#(9,24) INTE#(10) INTD#(9)
INTB#(9) INTF#(10,24)
INTH#(10) INTG#(10,24)
5
INTA# INTE# INTD#
INTB# INTF# INTH# INTG#
1 2 3 4 5 6 7 8
RN52
8.2K
1 2 3 4 5 6 7 8
VCC3
VCC3
4
VCC5
+
+
CT75 1000UF_6V CT30 1000UF_6V CB184
0.1u CB189
0.1u CB192
0.1u CB194
0.1u CB196
0.1u CB198 100p CB200 100p CB202 100p
VCC3
3
+
CT73 1000UF_6V
+
CT31 1000UF_6V CB185
0.1u CB190
0.1u CB193
0.1u CB195
0.1u CB197
0.1u CB199 100p CB201 100p CB203 100p
IDSEL = AD26 MASTER = PREQ2MASTER = PREQ1 INTF#
-12V
CB182
0.1u CB186
0.1u
0.1u
MSI
Title
Size Document Number Rev
Date: Sheet of
+12V VCC3_SB
PCI SLOT 1&2&3
2
CB183
0.1u CB187
0.1u C308
4.7u/1206
MICRO-STAR
H/W Project Leader : Joey Lee H/W Project Engineer : Daniel Lee
MS-6541I1
+
CT32 1000UF_6V CB188
0.1u CB191
0.1u
17 29Tuesday, March 05, 2002
1
0AE0
Page 18
8
7
6
5
4
3
2
1
VCC5
C144 0.1u
DCDA RXDA
CTSA
CB206
0.1u
DSRA
D9
1N4148-S-LL34
D D
DTRA#(11) RTSA#(11)
SOUTA(11)
-12V
C C
U14
20
VCC
2
RIN1 RIN2 RIN3 RIN4 RIN5
DIN1 DIN2 DIN3 GND
75232-1
X_120ohm/100Mhz
ROUT1 ROUT2 ROUT3 ROUT4 ROUT5
DOUT1 DOUT2 DOUT3
1 2 3 4 5 6 7 8
LN1
3 4 7 9
16 15 13 11
-12VR +12VR
DCDA RXDA RIA DTRA
V+
V-
+12VP
+12VR
1
CB205 0.1u
19 18 17 14 12
5 6 8 10
CB204 0.1u
-12VR
1N4148-S-LL34
CB207
0.1u
DTRA RTSA TXDA
D10
RTSA CTSA TXDA DSRA
DCDA# (11) SINA (11)
CTSA# (11) DSRA# (11)
PARALLEL PORT
SERIAL PORT 1
1N4148-S-LL34
D11_1
D11
VCC5
LP_SLIN#
LP_SLIN#(11)
LP_D3(11)
LP_INIT#(11)
LP_D[0..7](11)
B B
A A
LP_D2 LP_INIT# LP_D3
LP_SLCT(11)
LP_PE(11)
LP_BUSY(11)
LP_ACK#(11)
LP_ERR#(11)
LP_D1(11)
LP_AFD#(11)
LP_D0(11)
LP_STB#(11)
8
1 2 3 4 5 6 7 8
LN3
X_120ohm/100Mhz
LP_D3 LP_INIT# LP_D2 LP_D4 LP_D5 LP_D6 LP_D7
LP_SLCT LP_PE LP_BUSY LP_ACK# LP_ERR# LP_D1 LP_AFD# LP_D0
LP_STB#
1 2 3 4 5 6 7 8 7 8 5 6 3 4 1 2
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
R320 2.2K
RN53
2.2K
RN55
2.2K
RN56
2.2K
RN57
2.2K
LP_D4 LP_D5 LP_D6 LP_D7LP_SLIN#
LP_D0 LP_AFD# LP_D1 LP_ERR#
7
LP_D2 LP_INIT# LP_D3 LP_SLIN#
LP_D4 LP_D5 LP_D6 LP_D7
LP_ACK# LP_BUSY LP_PE LP_SLCT
LP_D0 LP_AFD# LP_D1 LP_ERR#
LP_STB#
1 2 3 4 5 6 7 8
LN4
X_120ohm/100Mhz
1 2 3 4 5 6 7 8
LN6
X_120ohm/100Mhz
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
33pC161
CN5 220p
CN6 220p
CN7 220p
CN8 220p
LP_ACK# LP_BUSY LP_PE LP_SLCT
6
1 2 3 4 5 6 7 8
X_120ohm/100Mhz
LP_STB#
DCDA RXDA RIA DTRA
RTSA CTSA TXDA DSRA
DCDA RXDA RTSA TXDA DTRA
VCC5
LN2
LP_STB# LP_D0 LP_D1 LP_D2 LP_D3 LP_D4 LP_D5 LP_D6 LP_D7 LP_ACK# LP_BUSY LP_PE LP_SLCT
1 2 3 4 5 6 7 8
X_120ohm/100Mhz
FB48 X_120ohm/100MHz
2 4 6 8
2 4 6 8
26 27 28 29 30
FB8 0/0805 C153 0.1u
1 2 3 4 5 6 7 8
9 10 11 12 13
FB15 0/0805
LN5
1 3 5 7
1 3 5 7
4749
31 32 33 34
LPT-D25-BK-BI
51
52
LPT-D25-BK-BI
LPT1B
14 15 16 17 18 19 20 21 22 23 24 25 48
DSRA CTSA
RIA
LPT1A
CN2 220p
CN4 220p
LP_AFD# LP_ERR# LP_INIT# LP_SLIN#
5
INTERNAL MODEMWAKEUP HEADER
123456
78
RN54
4.7K
MSDATA(11)
MSCLK(11)
KBDATA(11)
KBCLK(11)
FB16 0/0805
FB10 300 FB12 300
FB13 300 FB14 300
FLOPPY CONNECTOR
VCC5
R322 150 R323 150 R324 150 R325 150 R326 150
INDEX# TRACK0# FDD_WP# RDATA# DSKCHG#
4
VCC3_SB
R703 1K
R193 4.7K Q6
Q6_BRIA
R194 1K
2N3904S
RIA# (11)
PS2 KEYBOARD & MOUSE CONNECTOR
R319 1K
KBMS1
14
MS_DT MS_CK
KB_DT KB_CK
C157 180p
C158 180p
4 6 2
13
1 5
C159
3
180p
15 17
C160 180p
FDD1
1 2
FDD1_4
546
R704 X_0
7 8 9 10
11 12 13 14 15 16 17 18 19
20 21 22 23 24 25 26 27 28 29 30 31 32 33 34
CN-BH-D2x17-1:3-BK
3
MINIDINx2-D12-ML
DRVDEN0 (11) GP33 (11)
INDEX# (11) MOT_A#(11) DRV_B# (11) DRV_A# (11) MOT_B#(11) DIR# (11) STEP# (11) WT_DT# (11) WT_EN# (11) TRACK0# (11) FDD_WP# (11) RDATA# (11) HEAD# (11) DSKCHG# (11)
Title
Size Document Number Rev
Date: Sheet of
MSI
FB11_1
C155
C154
33p
0.1u
MICRO-STAR
FB11
80S/0805
FS1_1
C156
0.1u
H/W Project Leader : Joey Lee H/W Project Engineer : Daniel Lee
FS1
1.1A-S
POLY SWITCH
VCC5_STR
16
10 12 8 7 11 9
I/O CONNECTORS
MS-6541I1
2
18 29Tuesday, March 05, 2002
1
0AE0
Page 19
E
D
C
B
A
FRONT PANEL USB CONNECTOR FOR USB PORT 4,5
POWER CIRCUIT FOR USB PORT 4,5
4 4
VCC5_STR
OC_FRONT#(10)
FS2
1.5A-miniSMDC200-S
C165
0.1u
SVCC2
R327
2.7K
R329
5.1K
NEAR USB CONNECTOR
USBP5+(10) USBP5-(10)
USBP4-(10) USBP4+(10)
SVCC2
FRONT_USB#(13)
1 2 3 4
6
5 7 8
10
JUSB1 CN-BH-D2x5-1:1-BK-S2
SVCC2
REAR PANEL USB CONNECTOR FOR USB PORT 2,3
3 3
FS3
VCC5_STR
OC_REAR#(10)
2 2
1 1
2A-miniSMDC200-S
C177
0.1u
E
POWER CIRCUIT FOR USB PORT 0,1,2,3
FB19 70S/1206
R330
2.7K
R332
5.1K
NEAR USB CONNECTOR
C171
1u-0805
C170 47p
SVCC1FS3_2
CT34 1500u-16V
C_GND
FB20
X_0/0805
D
C_GND
R331 1K
USBP3-(10) USBP3+(10)
USBP2-(10) USBP2+(10)
USBP1-(10)
USBP1+(10)
USBP0-(10)
USBP0+(10)
C
FB32 X_80_0603
L13 CMC_90ohm_0603
FB33 X_80_0603 FB34 X_80_0603
FB35 X_80_0603
4 3
1 2
L14
CMC_90ohm_0603
4 3
1 2
NEAR USB CONNECTOR
C172 X_33p
C173 X_33p
SVCC1 USB2_14 USB2_15 C_GND SVCC1 USB2_10 USB2_11 C_GND
C175
C174
X_33p
X_33p
For ESD Protection
D01-0220K00-I05
REAR PANEL USB CONNECTOR FOR USB PORT 0,1
FB36 X_80_0603
FB37 X_80_0603 FB38 X_80_0603
43
12
CMC_90ohm_0603
43
12
CMC_90ohm_0603
FB39 X_80_0603
L15
L16
C180 X_33p
NEAR USB CONNECTOR
B
SVCC1 USB2_6 USB2_7 C_GND SVCC1 USB2_2 USB2_3 C_GND
C181 X_33p
C182 X_33p
For ESD Protection
D01-0220K00-I05
MSI
Title
Size Document Number Rev
Date: Sheet of
USB2A
5 6 7 8 1 2 3 4
USB*4P
C183 X_33p
USB CONNECTORS
THIRD
DOWN
USB2B
13 14 15 16
UP
9 10 11 12
SECOND
USB*4P
19 21 20
MICRO-STAR
H/W Project Leader : Joey Lee H/W Project Engineer : Daniel Lee
MS-6541I1
A
17 22 18
0AE0
19 29Tuesday, March 05, 2002
Page 20
5
4
3
2
1
ATX CONNECTOR
D D
For CPQ Power Supply PSON="1" to power on system. For Normal Power Supply PSON="0" to power on system.
VCC3_SB
Power Supply FAN
VCC3
CB210
0.1u
PS_ON
VCC5_SB
PS_ON(11)
R337 10K
R708 4.7K
4.7K
Q14_B
2N3904S
VCC5
R707 X_0
Q14
CB216
0.1u
FAN_CMD(11)
FAN_SINK(11)
-12V
CB212
0.1u
PSON
C187 X_1000p
CT37 470u
11 12 13 14 15 16 17 18 19 20
+
POWER
3.3V
-12V GND PSON GND GND GND
-5V 5V 5V
3.3V
3.3V
GND
5V
GND
5V GND POK
5VSB
12V
PWR_FAN
2 1
CON2N
1 2 3 4 5 6 7 8 9 10
R709 X_0
POK
+
CT36 470u
R535
C189 X_1000p
VCC3
CB209 1u-0805
VCC5
VCC5
CB214
0.1u
CB219
0.1u
U2D DM7407-SOIC14
9 8
(VCC5_SB)
CB220
0.1u
1KR339
VCC3
R336
1K
R340 33
VCC5_SB +12V
+
CT38 10u/16V
R761 33
R338 X_33
C188
0.1u
-RSTBTN
5 6
(VCC3_SB)
VRM_GD (23) PWRGDA (11)
U7C
74LCX14-SOIC14
U7_5U2_9
U7D
74LCX14-SOIC14
9 8
U7_8
R341 33
PWROK# (13)
PWR_GD (6,10)
Customer Front Panel
LED BLOCK
C C
S4/S5STATE
DARK DARK
BRIGHT
DARKBRIGHT
VCC5_STR
R713 330
GNRP
VCC5
CHASS_ID1(11)
R710 330 R711 100
-RSTBTN(10)
CONN_IDE_LED IDE_LED CONN_RESET
-RSTBTN
VCC5 VCC5
F_P1
1
IDE_PWR
3
IDE_LED
5
-RESET
7
RESET
9
VCC_1
C305
0.1u
11
NC11
13
GND1
15
NC15
17
CHA_ID1
PIN2X9-17
PWR_SW
-PWR_SW CHA_ID0
GND2
VCC_2
GND3
LED1 LED2
S0
BRIGHT
S1 S3
DARK
P_LED (Green)
S_LED DARK 2 4 6 8 10 12 14
KEY
16 18
GPRN GNRP PWRSW CONN_PSW_GND
R712 100
CHASS_ID0 (11)
(Yellow)
SUS_LED(11)
B B
IDE LED
IDE_LED
PD_LED(3) SD_LED (3)
R716 47K R717 47K
2N3906S
Q73
R_IDEACTSR_IDEACTP
Q74 2N3906S
COLOR(11)
R714 4.7K
SLEEP LED
R718 4.7K
R_SUS_LED
R_COLOR
C306
0.1u
VCC5_STR
R715 330
Q75 2N3904S
Q72 2N3904S
GPRN
POWER LED
A A
VCC3_SB
POWER BUTTON
R371 4.7K R372 10K
C196
/N
X_0.1u
5
U7_11PWRSW
U7E
74LCX14-SOIC14
11 10
C197 1u-0805
U7F
74LCX14-SOIC14
U7_10 PWRBTN#
13 12
4
PWRBTN# (11)
MSI
Title
Size Document Number Rev
3
2
Date: Sheet of
Front Panel & ATX Connector & FAN
MICRO-STAR
H/W Project Leader : Joey Lee H/W Project Engineer : Daniel Lee
MS-6541I1
1
20 29Tuesday, March 05, 2002
0AE0
Page 21
8
7
6
5
4
3
2
1
POWER TRANSLATOR
3V3DLSB
SLP_S3#(10) SLP_S5#(10)
VCC5_SB
Q60
1
B
234
CEC
NPN-NZT651-S-SOT223
D D
VCC3_SB
C C
R540 4.7K R542 4.7K
R543 0 R544 X_0
Q64
45N02_T0252
VCC5_SB
VCC3
EN5VDL
C289
0.1u
FAULT
R541
1K
SS
13
AGP 4X 1.5V & GMCH POWER TRANSLATOR
VCC5
R545 100
VR7
3 2
LCSK-1,SOT23-3L-100mA
R546
U32_3VR7_2
1K_1%
1
C290 1000p
B B
A A
8
+12V
3
+
2
-
+12V
5
+
6
-
7
+12V
U32_2
U32_6
VCC5_SB
C288
4.7u-0805
14
1
12V
5VSB
VSEN2
5VDLSB
5VDL
GND
U33
8
INTS-HIP6501A-SOIC16
DLA
C76
0.1u
Q56_G
1
R548 1K_1%
R549 1K_1%
09N05_T0252
Q57_G
7
R554 215 1%
R555 1K_1%
C287
0.1u
3 15
3V3DLSB DRV2
4
3V3DL
9
FAULT/SEL
6 10
S3 DLA
7
S5
5
EN5VDL
2
EN3VDL SS
U32A NS-LM358MX-SOIC8
4 8
U32B NS-LM358MX-SOIC8
4 8
X_NPN-2SC5001-T0252
DIMMCTR
16
5VCTR
11
12
VCC3
G
Q57
G
6
Q62
N CHANNEL
DS
Q56 09N05_T0252
Q57_D
DS
+
CT44
1000UF_6V
G
+
VCC2.5
G
VCC_AGP
VCC3
VCC5_SB
SD
VCC5
CT12
1000UF_6V
Q63 NDS352AP-S-SOT23
P CHANNEL
Q61 45N02_T0252
DS
Q87 X_09N05_T0252
VCC3_SB Main Standby VCC5_STR
Q86
NPN-2SC5001-T0252
MEM_STR
VSEN2 output current 250mA to 300mA.
VCC5_STR
5
S0Power S5S3
Main Main
Standby Standby
4
Standby
0V 0VMEM_STR
REGULATORS OUTPUT DECOUPLING CAPACITORS
CT47 470u CB235
0.1u CB238
0.1u CB240
0.1u
VCC3_SBMEM_STR
+
VCC5
CB227
0.1u CB230 1u-0805
VCC5_SB VCC5_STRVCC3
+
CT46 470u CB233
0.1u CB237 1u-0805
C329
0.1u
CB229
0.1u CB234 1u-0805
+
1.5V STANDBY POWER TRANSLATOR
VR2 LM317LZ-TO92-100mA
VCC5_SB
3
3 2
C199
0.1u
VIN VOUT
R375 20_1%
C200R378 100p
ADJ
1
2
1 3
O
A
100_1%
ADJ
C203
0.01u
I
TOP VIEW
MSI
Title
Size Document Number Rev
Date: Sheet of
2
MICRO-STAR
VOLTAGE REGULATOR
MS-6541I1
CT45 1000UF_6V CB232
0.1u CB236 1u-0805 CB239
0.1u CB241
0.1u
VCC1_5SB
C202
C201
4.7u-0805
0.1u
H/W Project Leader : Joey Lee H/W Project Engineer : Daniel Lee
21 29Tuesday, March 05, 2002
1
0AE0
Page 22
8
7
6
5
4
3
2
1
DDR REGULATOR
VTT_DDR
R403 0
C220
0.1u
C221 1000p
R408 100K
CHOCK1
1 2
3.3UH
C215 0.1u
DDRVCC2VCCQ
R407 1K
CT48
1000UF_6V
+
Remote Sense
C214
0.1u
VTT_SD="1" to shutdown CM8500.
VCC3_SB
R606 1K
VTT_SD
R607 2K
Q65
2N3904S
Q65_B
R608 1K
SLP_S3# (10)
D D
MEM_STR
C219
0.1u
DDRVCC1 DDRVCC2
+
CT49 1000UF_6V
1
VCC1
16
VCC2
2
PVDD1
15
PVDD2
4
PGND1
13
PGND2
5
AGND1
8
AGND2
9
AGND3
12
AGND4
VL1 VL2
VIN/2
VCCQ
SD
FB
CM8500
R400 5.1 R401 5.1
C216
C217
0.1u
Check Pin8 & Pin 11 connect
C C
to bulk capacitor's pin.
C218
0.1u
0.1u
R399 X_10K_1%
U18
3
VL
14
VIN/2
7
R402 X_10K_1%
10
VTT_SD
6
DDRFB C221_1
11
VCC5 Discharge residual voltage on Power Off
VCC5
123456
78
123456
Q32 NDS7002AS
78
RN61 22
Q33_D
Q33
NDS7002AS
MSI
Title
Size Document Number Rev
4
3
Date: Sheet of
2
MICRO-STAR
H/W Project Leader : Joey Lee H/W Project Engineer : Daniel Lee
DDR REGULATOR& THERMTRIP
MS-6541I1
22 29Tuesday, March 05, 2002
0AE0
1
B B
RN60 22
VCC5 VCC5_SB
R387
4.7K
R388
4.7K
Q32_G
Q34_B
R391
4.7K
A A
8
7
6
Q34 2N3904S
5
Page 23
5
4
3
2
1
GND
PWM1
ISEN1
PWM2
ISEN2FS/DIS
PWM3
ISEN3
PWM4
ISEN4
VSEN
VCC
10101 00101 11001 01001 10001 00001 11110 01110 10110 00110
+12VP_M
C223 33p
20
9 15
16
14 138
11 12
18 17
10
VCC
PWM1 ISEN1
PWM2
ISEN2
PWM3
R420 3K_1%
ISEN3 VCC
VSEN
1.325
1.350
1.375
1.400
1.425
1.450
1.475
1.500
1.525
1.550
CT50 820u-25V
VCC5
R414 3K_1%
R417 3K_1%
+12VP
R412 0
C229 1u-0805
CT51 820u-25V
R410 10
CB246
0.1u-0805
CB247 1u-0805
+12VP
+12VP
CT52 820u-25V
U19_14
R419
10
U19_5
R431 10
U21_6
CB248
0.22u-0805
14
CT53 820u-25V
U19A
VCC
3
GND
1
PWM1
HIP6602A
U19B
5 9
PVCC U_G2
6
PGND
2
PWM2
HIP6602A
U21
6
VCC
7
PVCC
4
GND
3
PWM
HIP6601A/03A
U_G1
BOOT1
PHASE1
L_G1
BOOT2
PHASE2
L_G2
BOOT
PHASE
C224 1u-0805
U_G
L_G
C225 1u-0805
12
BOOT1
11
C227
0.1u
13
C228
/N
X_1000p
4
BOOT2
10
C233
0.1u
8
C235
/N
X_1000p
7
1
BOOT
2
C238
0.1u
8
C239
/N
X_1000p
U21_5 Q45_G
5
C307 1u-0805
R411 3.3
PHASE1
R413 0
R421 3.3
PHASE2
R425 0
R432 3.3
PHASE
R434 0
Q40_GU_G1
Q41_GU19_4
C231 1u-0805
Q42_GU_G2
Q43_GU19_7
C237 1u-0805
Q44_GU_G
C226 1u-0805
DS
DS
DS
DS
DS
DS
G
Add Heatsink for MOSFET
Q40 IPB15N03LG
CHOK3 1.1uH-25A
Q41 FDB6670AL-S-TO263G
Q42 IPB15N03LG
CHOK4 1.1uH-25A
Q43 FDB6670AL-S-TO263G
Q44 IPB15N03LG
CHOK5 1.1uH-25A
Q45 FDB6670AL-S-TO263
C240
X_0.01u
R433 0
CT54 1500u-6.3V
+
CT58 2200u-6.3V
+
CT61 2200u-6.3V
NOTE: INSIDE ON CPU SOCKET.
/N
CT55 1500u-6.3V
CT59 2200u-6.3V
+
CT62 2200u-6.3V
CT56 1500u-6.3V
VCCP
CT57 1500u-6.3V
+
CT60 2200u-6.3V
CT63 2200u-6.3V
PGOOD
X_100pC230
COMP
R422 15K
R422_2
C234 5600p
FB
R600 X_4.7K_THERMISTOR
R600_2
R601 X_402
CHOK2 1.1uH-25A
CB245 33p
U20
1
VID4
2
VID3
3
VID2
4
VID1
5
VID0
19
PGOOD
/N
6
COMP
7
FB
HIP6301V
R428 X_0
R430 0
VCCP
+12VP
D D
1.82K_1%
C236_1
VID4 VID3 VID2 VID1 VID0
R416 0
R418 154K
VID[0..4](4)
R415 10K
VCC3
VRM_GD(20)
C C
VCC5
DIS
C232 15p
R423 365K_1%
R426 X_15K R427
R426_2
C236 X_5600p
HIP6301 -- VRM 9.0/9.2 VID4 VID3 VID2 VID1 VID0 VDC(V) VID4 VID3 VID2 VID1 VID0 VDC(V)
1
1 1 1 1 1 1 1 1 1 1 1 1
B B
1 1 11
0
0 1 1 1 1 1 1
0 0
0
1 0 0
1 0 1 1 1
OFF
0
1.100
1.125
1.150
00111
1.175
00
1.200
1
1.225
1.250
1.275
01101
1.300
Q36_G
VCC3_SB
2
R394 1K
Q46_G
Q36 NDS7002ASR551 1K
DIS
DS
Q46 2N7002S
G
MSI
Title
INTERSIL HIP6301A+HIP6601A/02A - CPU Power
Size Document Number Rev
Date: Sheet of
MICRO-STAR
H/W Project Leader : Joey Lee H/W Project Engineer : Daniel Lee
MS-6541I1
1
23 29Tuesday, March 05, 2002
0AE0
ATX12V POWER CONNECTOR
A A
+12VP
C241
CB251
CB250 1u-0805
1u-0805
0.01u
5
JPW1
3
4
D2x2
1
GND
12V
2
GND
12V
VID PULL-UP RESISTORS
VID0
1
VID1 VID2 VID3 VID4
VCC5
4
2
3
4
5
6
7
8
R436 1K
CB249 100p
RN62 1K
VCC3
PWR_GD_10MS(11) VCCVID_GD(5)
3
R810 X_1K
PWM GOOD
Page 24
8
7
6
5
4
3
2
1
PCI EXPANSION
6
AD[31..0]
-RISER1
-RISER2
VCC3
PREQ#3 (9,17) PREQ#4 (9,17)
C_BE#3 (9,17) C_BE#2 (9,17) C_BE#1 (9,17) C_BE#0 (9,17)
FRAME# (9,17) IRDY# (9,17) TRDY# (9,17) STOP# (9,17) DEVSEL# (9,17)
PERR# (9,17) SERR# (9,17) PME# (9,11,16,17)
INTC# (9,17) INTA# (9,16,17) INTG# (10,17) INTF# (10,17)
SMBCLK (10,11) SMBDATA (10,11)
-RISER1 (11)
-RISER2 (11)
FRONT AUDIO HEADERS
Q76 2N3904S
Q81
NDS7002AS
+5VR
R719 X_0 R720 X_0
S D
NDS7002AS
G
G
S D
Q80
Q80_D
CB308 0.1u
CT76 100u_25V
Q78
CT77 100u_25V
HPR_OUTR (12) HPR_OUTL (12)
+
+
JAUD1
CN-BH-D2x5-1:1-BK-S2
NDS7002AS
B_HPOUTL
G
Q82
1 2 3 4 5 7 9 10
Q78_D
+12V
R725 4.7K
Q81_B
S D
6
FAUD
R723
4.7K
HPOUTR HPOUTL
2N3904S
CMIMIC_IN(12)
MIC_REF(12)
HP_OUTR(12)
HP_OUTL(12)
R721 X_0
Q77 NDS7002AS
SD
FAUD_DET
G
Q79
NDS7002AS
R726 X_0
F_AUD_DET(10)
FAUD_DET
R722 8.2K
G
B_HPOUTR
SD
Stitch CAP
VCC5
CB318 0.1u CB319 0.1u
CB320 0.1u CB321 0.1u CB322 0.1u CB323 0.1u
5
4
VCC3
VCC3VCC_AGP
MSI
Title
Size Document Number Rev
3
Date: Sheet of
2
MICRO-STAR
H/W Project Leader : Joey Lee H/W Project Engineer : Daniel Lee
SMBUS_ISOLATION
MS-6541I1
0AE0
24 29Tuesday, March 05, 2002
1
AD[31..0](9,17)
D D
C C
B B
A A
PGNT#3(9) PGNT#4(9)
PCICLK3(3) PCICLK4(3)
PCIRST#2(11,17)
PAR(9,17)
VCC3_SB
+12V
-12V
VCC5
8
AD31
AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
PAR
U37
14
GNT0#
23
GNT1#
73
CLK0
69
CLK1
9
CLK2
12
RST#
40
PAR
77
AD31
17
AD30
78
AD29
19
AD28
80
AD27
20
AD26
81
AD25
22
AD24
84
AD23
25
AD22
86
AD21
26
AD20
87
AD19
28
AD18
89
AD17
29
AD16
41
AD15
102
AD14
43
AD13
104
AD12
44
AD11
105
AD10
46
AD9
107
AD8
108
AD7
49
AD6
110
AD5
50
AD4
111
AD3
52
AD2
113
AD1
53
AD0
62
NC
11
VCC3_SB
2
+12V
3
+12V
61
-12V
4
VCC5
7
VCC5
8
VCC5
64
VCC5
65
VCC5
76
VCC5
57
VCC5
117
VCC5
114
VCC5
13
VCC5
54
VCC5
56
VCC5
116
VCC5
15
GND
119
GND
FOXCONN_QB11607-P1
7
EXP_IDSEL0# EXP_IDSEL1#
EXP_IDGND
ISA
REQ0# REQ1#
C/BE3# C/BE2# C/BE1# C/BE0#
FRAME#
IRDY#
TRDY#
STOP#
DEVSEL#
LOCK# PERR# SERR#
PME#
INTD# INTC# INTB# INTA#
SDONE
SBO#
SER_IRQ PCI_DREQ# PCI_DGNT#
NOGO
VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
75 71
83 90 101 47
31 92 33 35 94 96 97 99 16
67 6 66 5
37 38
115 55 1
58 60 120 118
24 36 42 88 93 82 98 48 109 18 30 100
63 72 21 32 74 27 34 79 85 91 39 45 68 95 103 106 51 59 112 70 10
Page 25
5
D D
VCC3_SB
C311
0.1u
1 2
U38_46
Y1
L_25MHZ
U38_47
TESTEN
C312
C313
0.1u
0.1u
VCC3_SB
+
CT70 10u
125364027914171219
VCC1
VCC2
46
X1
47
X2
39
LAN_CLK
42
LAN_RSTSYNC
34
LAN_RXD0
35
LAN_RXD1
37
LAN_RXD2
43
LAN_TXD0
44
LAN_TXD1
45 27
LAN_TXD2 LILED#
41
ADV10
30
ISOL_TCK
28
ISOL_TI
29
ISOL_TEX
26
TOUT
21
TESTEN
VSS1
VSS2
VSS3
8131824483338362022
C310
0.1u
C C
B B
C317 22p
C318 22p
ELAN_CLK(9) ELAN_SYNC(9) ELAN_RXD0(9) ELAN_RXD1(9) ELAN_RXD2(9) ELAN_TXD0(9) ELAN_TXD1(9) ELAN_TXD2(9)
PHY_DIS(11)
TCK= "1" to Disable Kinnerth LAN
PHY_DIS
R818 300
VCCP1
VCCP2
VSS4
VSS5
C314
0.1u
VCCA
VSSP1
VCCA2
VSSP2
4
VCCT1
VSSA
VCCT2
VCCT4
VSSA2
VCCT3
ACTLED# SPDLED#
RBIAS10
RBIAS100
VSSR1
VSSR2
U38
23
VCCR1
VCCR2
TDP
TDN
RDP
RDN
W82562ET
U38_19
C315
0.1u
L29 150_100MHz
C316
CT71
0.1u
10u
Place Termination R as close to 82562EM as possible
U38_4
U38_5
R744 100_1%
R745 121_1%
LILED# ACTLED# SPEEDLED#
R746 549_1%
R747 619_1%
TXDN
RXIN
10
11
15
16
32 31
4
5
TXDP
RXIP
3
LAN1
GREEN-
RJ45
RXGND RXGND RDN TXGND TXGND RDP TDN TDP
GREEN+
YELLOW­YELLOW+
GND GND
VCC3_SB
+
2
RXGND TXGND
R742 75_1%
SPEEDLED# G_VCC
R741 330
RXIN_C
RXIP_C TXDN_C TXDP_C LILED# ACTLED#
R743 75_1% FB45 0/0805
LAN_GND
FOR TEST ONLY.
12
CP1 1500p/DIP
VCC3_SB
11 12 4 5 6 7 8 3 2 1 9 10
15 16
1
*** 1500P is DIP compoment ***
VCC3_SB
FB46
TXDP_C TXDN_C RXIP_C
RXIN_C
L30 0 L31 0
LAN_GND
TX+ TX-
R748 75_1%
CMT
R749 75_1%
T1
16
TX+
15
CMT
14
TX-
11
RX+
9
RX-
10
RXC
1:1-TX
1
TD+
2
TDC
3
TD-
6
RD+
8
RD-
7
RDC
C319
X_120S/0805
C320
X_0.1u
TXDP TXDN
RXIP RXIN
TDC
RDCRXC
22p
R755 X_49.9_1% R756 X_49.9_1%
A A
EE_EECS(9) EE_SHCLK(9) EE_DOUT(9) EE_DIN(9)
5
EE_EECS
EE_SHCLK EE_DOUT
EE_DIN
R751 X_4.7K
U39
1
CS
VCC
2
SK
3 4
ATL-93C46-128x8-0.5us-SOIC8
NC
DI
NC
DO
GND
8 7
U39_6
6 5
4
R750 4.7K
VCC3_SB
CB310
0.1u
3
2
TXDP_NTXDP TXDN
C321
For EMI
X_0.1u
solution
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR
H/W Project Leader : Joey Lee H/W Project Engineer : Daniel Lee
LAN LAVON/KENAI32
MS-6541I1
1
25 29Tuesday, March 05, 2002
0AE0
Page 26
Video Connector
CRT_R(6)
CRT_R#(6)
CRT_G(6)
CRT_G#(6)
CRT_B(6)
CRT_B#(6)
CRT_R
12
R493
C276
37.4_1%
2.2p
1 2
CRT_G
12
C279
R495
2.2p
37.4_1%
1 2
CRT_B
12
C282
R497
2.2p
37.4_1%
1 2
VCC5 VCC5 VCC5 VCC5
2
D18
3
BAV99
1
5VDDCCL 5V_VSYNC 5V_HSYNC VGA_B 5VDDCDA
VCC5
R804
2.2K
5VDDCCL
Q84
VCC3
VCC3
R805 4.7K
R807 4.7K
3VDDCCL(6)
3VDDCDA(6)
NDS7002AS
Q84_B
NDS7002AS
Q85_B
Q85
R806
2.2K
VCC5
2
1
2
1
3
D24 BAT54C
3
D25 BAT54C
2
D19
3
BAV99
1
2
D20
3
BAV99
1
2
D21
3
BAV99
1
R498 100
R499 100
3V_HSYNC(6)
3V_VSYNC(6)
3V_HSYNC
3V_VSYNC
VCC5
7
8
R501 10K
U40_15VDDCDA
FS5
1.1A-S
12
BC1
0.1u
VGA_15
VGA_9
VGA_12
135
CN9 100p
246
VCC5
53
1 2
U28
NC7WZ08
VCC5
53
1 2
U40
NC7WZ08
15 10 14
9
13
8
12
7
11
6
5V_HSYNC
4
5V_VSYNC
4
L20 80ohm/100MHz
12
R492 75_1%
L21 80ohm/100MHz
12
R494 75_1%
L22 80ohm/100MHz
12
R496 75_1%
JVGA1
VGA-D15-BL-B-SC
C275
C274
3.3p
3.3p
1 2
1 2
C277
C278
3.3p
1 2
1 2
3.3p
1 2
C280
C281
3.3p
3.3p
1 2
17
5 4 3 2 1
16
VGA_G
VGA_R
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR
H/W Project Leader : Joey Lee H/W Project Engineer : Daniel Lee
VGA Connector
MS-6541I1
26 29Tuesday, March 05, 2002
0AE0
Page 27
MANUAL
PCB P01-6541-0A
U4_X1
HEATSINK
U12_X BIOS_4Mbit
U4_X21 U4_X22
U3_X
X_RETENTION MODUAL
1011
COM1
1
6
2
7
3
8
4
9
5
COM
BAT1_X1 BH-D2
JPWD1_M GREEN
JFANV_SEL1M
RED
MINI JUMPER
JBAT1_M YELLOW
JFANG_SEL1M RED
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR
H/W Project Leader : Joey Lee H/W Project Engineer : Daniel Lee
GPIO SETTING
MS-6541I1
27 29Tuesday, March 05, 2002
0AE0
Page 28
5
4
3
2
1
PIN NAME NOTES
ICH4
D D
GPI0 GPI1 GPI2 GPI3 GPI4 GPI5 GPI6 GPI7 GPI8 GPI11 GPI12
POWER WELL
CORE CORE CORE CORE CORE CORE CORE CORE RESUME RESUME
RESUME GPI13 GPO16 GPO17 GPO18 GPO19 GPO20 GPO21
C C
GPO22 GPO23 GPO24 GPO25 GPO27 GPO28 GPI32 GPI33 GPI34 GPI35 GPI36 GPI37 GPI38 GPI39
B B
GPI40 GPIO41 GPIO42 GPIO43 RI* THERM*
FWH
GPI0 GPI1
CORE
CORE
CORE
CORE
CORE
CORE
CORE
CORE
RESUME
RESUME
RESUME
RESUME
CORE
CORE
CORE
CORE
CORE
CORE
CORE
CORE
CORE
CORE
CORE
CORE
RESUME
CORE
GPI2 GPI3 GPI4
USAGE
UNUSED UNUSED INTE# INTF# INTG# INTH# UNUSED UNUSED F_AUD_DET UNUSED GPI12
-EXTSMI UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED GPI28 Clear password indicator, Active LOW. UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED
-IO_PME THRM# UNUSED TBL# FRONT_USB# UNUSED UNUSED
DURING RESET
HIGH HIGH HIGH HIGH HIGH HIGH HIGH-Z LOW LOW HIGH HIGH HIGH HIGH HIGH HIGH HIGH HIGH HIGH HIGH HIGH HIGH HIGH HIGH HIGH
INPUT INPUT INPUT INPUT INPUT
S3/ S4/S5
OFF OFF OFF OFF OFF OFF OFF OFF DEFINED DEFINED DEFINED DEFINED OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF
DEFINED DEFINED DEFINED DEFINED DEFINED
Front Audio Cable detection, active LOW
Connect to SMBALERT# signal of ADM1028. From LPC I/O IO_SMI# signal.RESUME
From LPC I/O IO_PME# signal From CPU PROHOT# signal
FWH TBL function, Active High. Front USB Cable detection, active LOW
A A
MSI
Title
Size Document Number Rev
5
4
3
2
Date: Sheet of
MICRO-STAR
H/W Project Leader : Joey Lee H/W Project Engineer : Daniel Lee
GPIO SETTING
MS-6541I1
1
28 29Tuesday, March 05, 2002
0AE0
Page 29
5
4
3
2
1
PIN NAME NOTES
SIO
GPIO14 GPIO15 GP15 CHASSIS ID 1 GPIO30 COLOR For POWER LED use
D D
GPIO31 SUS_LED For Suspend LED use GPIO65 -CPU_CHG When CPU had been changed, let this signal to LOW to enter SAFE mode. GPIO20 Detect ATA cable type for Primary IDE. GPIO21 GPIO26 SKTOCC#
USAGE
Input/Output
INPUT
CHASSIS ID 0GP14 INPUT OUTPUT OUTPUT OUTPUT
ATADET0 ATADET1 Detect ATA cable type for Secondary IDE.
INPUT INPUT INPUT Connect to CPU SKTOCC#, Low to High means CPU had been changed.
GPIO41 LAN_DIS OUTPUT LAN disable control. Active High. GPIO71 -RISER1 INPUT Riser card 1 insert, active LOW. GPIO72 -RISER2 INPUT Riser card 2 insert, active LOW. GPIO73 SYS_FAN INPUT System FAN techometer input. FAN_TACH4 CPU_FAN INPUT CPU FAN techometer input. GPIO34 BIOS_P OUTPUT FWH write protection function, active LOW. GPIO35 FWH_RST# OUTPUT FWH reset signal. Need to confirm this signal's level. GPIO32 -IO_TRMTRIP INPUT Connect to CPU TRMTRIP#, active LOW. GPIO75 PWR_GD_10MS OUTPUT Power Good delay 10m Second output.
C C
GPIO62 PWRBTN# INPUT Power buttom input
GPIO76 PWR_GD_30MS Power Good delay 30m Second output.
OUTPUT
GPIO63 SLP_S3# INPUT S3 state indicator signal GPIO64 SLP_S5# INPUT S5 state indicator signal GPIO67 PS_ON
OUTPUT Connector to Power Supply to turn Power.
GPIO42 -IO_PME OUTPUT LPC I/O PME function. GPIO13 PME# INPUT PCI PME# signal input. GPIO60 PCIRST#2 OUTPUT Reset signal output for PCI Slot. GPIO61 AGP_RST# OUTPUT Reset signal output for AGP Slot. GPIO27 BRD_ID1 INPUT Board ID 1 GPIO23 BRD_ID0 INPUT Board ID 0 GPIO10 GP10 INPUT Initial Version ID GPIO11 GP11 INPUT Initial Version ID GPIO85 -FAN_OFF OUTPUT FAN ON/OFF control, HIGH to turn on FAN. GPIO66 PWRBTN_OUT# OUTPUT Power buttom output, connect to ICH4 power buttom input.
B B
GPIO46 -EXTSMI OUTPUT LPC I/O SMI# signal. GPIO33 GP33 INPUT Floppy TYPE indicator
Before 11/6
GPIO74 PHY_DIS OUTPUT PHY disable control. Active High.
A A
MSI
Title
Size Document Number Rev
5
4
3
2
Date: Sheet of
MICRO-STAR
H/W Project Leader : Joey Lee H/W Project Engineer : Daniel Lee
GPIO SETTING
MS-6541I1
1
29 29Tuesday, March 05, 2002
0AE0
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