MSI MS-6552 Schematics

Page 1
8
7
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Version 100
Cover Sheet Block Diagram Power Delivery Map
D D
GPIO Spec.
1 2
MS-6552
(LEGEND)
1024
INTEL (R) Brookdale Chipset
3 4
Willamette/Northwood 478pin mPGA-B Processor Schematics
Clock ICS94208 & ATA100 IDE CONNECTORS mPGA478-B INTEL CPU Sockets INTEL Brookdale MCH -- North Bridge INTEL ICH2 -- South Bridge
5 6 - 7 8 - 9
10 - 11
CPU:
Willamette/Northwood mPGA-478B Processor
LPC I/O W83627HF AC'97 Codec
C C
Audio Amp TL072 & GAME FWH -- BIOS & CNR RISER DDR DIMM1,2 DDR DAMPING DDR TERMINATION & DDR 2.5V POWER AGP 4X SLOT (1.5V) PCI SLOT 1 & 2 & 3
B B
Front Panel & Connectors USB & FAN Connectors
12 13 14 15 16 17 18 19 20 21 22
System Brookdale Chipset:
INTEL MCH (North Bridge) + INTEL ICH2 (South Bridge)
On Board Chipset:
BIOS -- FWH LPC Super I/O -- W83627HF Clock Generation -- ICS950213AF
Expansion Slots:
AGP2.0 SLOT * 1
CPU_VID CONTROL Votlage Regulator
23 24
PCI2.2 SLOT * 3 CNR SLOT * 1
HIP6301V CPU Power ( PWM )-VRM9.0 IO Connectors Realtek RTL8100BL LAN
A A
JUMPER SETTING MANUAL
8
7
6
25 26 27 28 29 30
5
4
3
Micro-Star
Document Number
Last Revision Date:
Tuesday, October 23, 2001
Title
MS-6552
Cover Sheet
Sheet of
2
Rev
100
1 35
1
Page 2
8
D D
AGP 4X(1.5V) AGP CONN
7
Power Supply CONN
AGP 4X (1.5V)
6
VRM
9.X
4X (66MHz) AGP
(593PINS/FCBGA)
5
(478PINS)
Willamette/Northwood Socket (mPGA478-B)
(400MHz)
Scalable Bus
MCH: Memory
Controller HUB
4
3
2
1
(100MHz)
CK408 Clock
(100MHz) Scalable Bus/2
(DDR200 or 266MHz)
DDR DIMM 1:2
( 66MHz X 4 )
HUB Interface
(14.318MHz)
C C
B B
Heceta Hardware Monitor
IDE CONN 1&2
USB Port 0:3
PCI LAN / Realtek RTL8100
PS2 Mouse & Keyboard
SM Bus
ICH2: I/O
(360PINS/EBGA)
(48MHz)
LPC Bus AC Link
Controller HUB
(33MHz)
(33MHz)
FWH: Firmware HUB
SIO
Parallel (1) Serial (2)
Floppy Disk Drive CONN
PCI (33MHz)
PCI Audio / C-MEDIA CMI8738
AC '97 Audio
Codec
Audio In
Line In
CD-ROM
Telephone In
MIC In
PCI Slots 1:3
CNR Riser
(Shared slot)
AMP
Line Out
A A
Title
Micro-Star
Document Number
Last Revision Date:
8
7
6
5
4
3
Tuesday, October 23, 2001
2
MS-6552
Block Diagram
Sheet of
Rev
100
2 35
1
Page 3
8
Power Delivery Map
7
6
5
4
3
2
1
D D
ATX 12V POWER Supply
3.3V 5V 5VSB1A12V
VRM9.2
Processor Core Processor Vtt
Power Translator ACPI IC
1.5V VREG
MCH Core 1.5V
MCH Vtt MCH AGP
OP
C C
1.8V VREG
3.3V DUAL FET
3.3V VREG
2.5V FET
MCH HUB Interface 1.8V
MCH Memory sdr 3.3V
DDR System Memory 2.5V
ICH2 Core 1.8V ICH2 I/O 3.3V ICH2 Resume 1.8V
1.8V VREG 5V TO 3.3V
RESISTOR
ICH2 Resume I/O 3.3V
ICH2 RTC 3.3V ICH2 5V
FWH 3.3V
B B
LPC Super I/O 3.3V
CLOCK GEN 3.3V
HARDWARE AUDIO 3.3V
PCI LAN 3.3V/2.5V
5VDual For USB and K/B
A A
Title
Micro-Star
Document Number
Last Revision Date:
8
7
6
5
4
3
Wednesday, October 31, 2001
2
MS-6552
Power Delivery Map
Sheet of
Rev
100
3 35
1
Page 4
5
4
3
2
1
General Purpose I/O Spec.
D D
ICH2
FunctionTypeGPIO Pin
GPIO 0 GPIO 1 GPIO 2~4 GPIO 5 GPIO 6
C C
GPIO 7 GPIO 8 GPIO 9 GPIO 10 GPIO 11 GPIO 12 GPIO 13 GPIO 14~15 GPIO 16 GPIO 17
B B
GPIO 18 GPIO 19 GPIO 20 GPIO 21 GPIO 22 GPIO 23 GPIO 24 GPIO 25 GPIO 26
A A
GPIO 27 GPIO 28 GPIO 29~31
5
I
Non Connect
I
Non Connect
I
Not Implemented
I
Non Connect
I
AC97 Enabled/Disabled
I
None
I
LAN Wake Up
I
AC'97 Serial Data In
I
Non Connect
I
Non Connect
I
External SMI
I
LPC PME
I
Not Implemented
O
Non Connect
O
Non Connect
O
Not Implemented
O
Not Implemented O Non O
Not Implemented O
Non
OD
BIOS Locked/Unlocked O
Non O
Non O
Non
I/O
Non
I/O
Non
I/O
Not Implemented
IDSEL
AD16
AD17
FWH
GPIO Pin Type Function
GPI 0 GPI 1 GPI 2 GPI 3
I
ATA IDE 1 Detect
I
ATA IDE 2 Detect Reserved
I I
Reserved
DEVICE
PCI Slot 1
ICH INT Pin
INTA# INTB# INTC# INTD#
PCI Slot 2 INTB#
INTC# INTD# INTA#
PCI Slot 3
INTC#
AD18 INTD# INTA# INTB#
PCI Audio
INTD#/INTE#
AD23 INTA# INTB# INTC#
PCI Lan INTC#/INTF#
AD22 INTD# INTA# INTB#
Title
Micro-Star
Document Number
Last Revision Date:
4
3
2
Wednesday, September 05, 2001
MS-6552
GPIO Spec.
Sheet of
1
Rev
0A
4 35
Page 5
8
7
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1
*Trace less 0.5"
X_COPPER
CP12
VCC3
D D
VCC3
VCC3
*Put GND copper under Clock Gen. connect to every GND pin
* 40 mils Trace on Layer 4 with GND copper around it * put close to every power pin
C C
Trace Width 7mils.
*
Same Group spacing 15mils
*
Different Group spacing 30mils
*
Different mode spacing 7mils on itself
*
VCC3
VCCP
+12V
R735 X R736 X
B B
A A
RESET BLOCK
FB18 X_0/0805
Rubycon
CB145 104P
for good filtering from 10K~1M
CB238
X_COPPER104P
CP13
FB20 X_0/0805
CB166 104P
for good filtering from 10K~1M
VTT_GD#
R323
10K
R304 220
Q36 2N3904S
C328
X
PDD[0..7]11
PCIRST#
PCIRST#10 PCIRST#1 8,12,15,27 PCIRST#2 19,20
8
CB229
CB144
102P
105P
R228 X_0
+
Rubycon
X_ELS10U/16V-B
Q61 X_2N3904S
PD_DREQ11
PD_IOW#11
PD_IOR#11 PD_IORDY11 PD_DACK#11
IRQ1410 PD_A111 PD_A011
PD_CS#111
PD_LED21
R191 8.2K
1 2
U21A 7407S (VCC5_STR)
CB178
CT36
105P
SMBCLK11,12,15,16
SMBDATA11,12,15,16
R318 X_1K
PDD7 PDD6 PDD5 PDD4 PDD3 PDD2 PDD1 PDD0
R189 33
R388 330
R190 X_4.7K R188 33
C199
X_10P
7
HD_RST# HD_RST#
CLOCK GENERATOR BLOCK Shut Source Termination Resistors
CPUCLK
R233 49.9RST
CPUCLK#
U18
39
CPU_VDD
CB154 104P
36
CPU_GND
VCC3V
VCC3C
VCC3C
SMBCLK SMBDATA
CB151 104P
CB153 104P
CB183 104P
CB177 104P
CB164 104P
CB165 104P
CB152 104P
VTT_GD#
46
MREF_VDD
43
MREF_GND
29
3V66_GND
9
PCI_VDD
5
PCI_GND
18
PCI_VDD
13
PCI_GND
24
48_VDD
21
48_GND
2
REF_VDD
47
REF_GND
34
CORE_VDD
33
CORE_GND
26
SCLK
25
SDATA
19
VTT_GD#
ICS950213AF
ICS950208 CY28323
3VMREF/CPU_STP#
3VMREF#/PCI_STP#
FS2/PCI_F0 FS3/PCI_F1
MODE/PCI_F2
FS1/24_48MHz
PRIMARY IDE BLOCK SECONDARY IDE BLOCK
IDE1 YJ220-CB-1
1
2 3 4 5 6 7 8 91110
12
13 14
1615
17 18 19
22
21
24
23
26
25 27 29 31 33 35 37
R119
C79
10K
47P
VCC3 VCC3
VCC3 VCC3
28
30
32
34
36
38
4039
R129 470
C76 X_473P
PCIRST#
PCIRST#
6
41
CPU0
CPU0#
CPU1
CPU1#
3V66_03V66_VDD 3V66_1 3V66_2 3V66_3
FS4/PCI0
PCI1 PCI2 PCI3 PCI4 PCI5 PCI6
FS0/48MHz
MUL0/REF0 MUL1/REF1
IREF
RST#
PWR_DN#
X1
X2
R246 33
40
R247 33
38
R239 47
37
R240 47
C_STP
45
P_STP
44
3132
RN17
30 28
8P4R-33
27
3V66_3
FS2
6
FS3
7
MODE
8
FS4
10 11
APIC_CLK
12 14
RN24
15
8P4R-33
16 17
FS0
R307 33
22
FS1
23
R281 33
MUL0
48
R251 33
MUL1
1
3
32pF
X1 14.318MHZ/32PF
4 35 20
42
1 2 3 4 5 6 7 8
7 8 5 6 3 4 1 2
R227 475RST R306 X_0
R245 4.7K
ATA100 IDE CONNECTORS
PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15
9 8
U21D 7407S (VCC5_STR)
3 4
U21B 7407S (VCC5_STR)
PDD[8..15] 11
PD_DET 15 PD_A2 11 PD_CS#3 11
R407 X_1K
HD_RST# R724 X_0 R197 330
7 8 5 6 3 4 1 2
8P4R-33
18PC171
18PC166
VCC5
VCC5
5
RN25
CPUCLK CPUCLK#
MCHCLK MCHCLK#
MCH_66 ICH_66 AGPCLK
10PC157
ICH_PCLK FWH_PCLK SIO_PCLK
PCICLK0 PCICLK1 PCICLK2 PCICLK3
ICH_48 SIO_48
ICH_14
FP_RST#CRST# VCC3V
VCC3V
VCC3
102PC238
PCIRST#
CPUCLK 6 CPUCLK# 6
MCHCLK 8 MCHCLK# 8
MCH_66 8 ICH_66 11 AGPCLK 19
ICH_PCLK 10 FWH_PCLK 15 SIO_PCLK 12
PCICLK0 20 PCICLK1 20 PCICLK2 20 PCICLK3 27
ICH_48 11 SIO_48 12
ICH_14 11
FP_RST# 21
R386
4.7K
R385 10K
SDD[0..7]11
VCC5VCC5
4
MUL0=0 MUL0=1 Ioh=6*Iref
Voh=0.71V
SD_DREQ11
SD_IOW#11
SD_IOR#11 SD_IORDY11 SD_DACK#11
IRQ1510 SD_A111 SD_A011
SD_CS#111
SD_LED21
R103 8.2K
VCC3
R384
4.7K
R387 4.7K Q48
Q43 2N3904S
Trace less 0.2"
49.9ohm for 50ohm M/B impedance
CLOCK STRAPPING RESISTORS
SDD7 SDD6 SDD5 SDD4 SDD3 SDD2 SDD1 SDD0
R101 33
R234 49.9RST
MCHCLK
R229 49.9RST
MCHCLK#
R230 49.9RST
FS4
R324 10K
FS3
R334 10K
FS1
R282 X_10K R283 10K
FS0
R321 10K R322 X_10K
FS2
R326 X_10K R325 10K
MODE
R336 X_10K
MUL0
R241 X_10K R231 10K
MUL1
R316 10K R315 X_10K
CRST# VCC3V
R305 10K
SMBCLK
R255 1K
SMBDATA
R254 1K
C_STP
R242 X_1K
P_STP
R235 X_1K
R186 X_4.7K R187 33
C81 R120 47P
R406 1K
HD_RST#
2N3904S
3
IDE2
YJ220-CW-1 1 3 4 5 6 7 8 91110
13 14 17 18
19 21 23 25 27 29 31 33 35 37
10K
VCC5_SB
VCC3V VCC3V
VCC3V
VCC3V
VCC3V
VCC3V
VCC3V
VCC3V
2
12 1615
22 24 26 28 30 32 34 36 38 4039
VCC3
R128 470
C77 X_473P
Micro-Star
Document Number
Last Revision Date:
Tuesday, October 30, 2001
2
Pull-Down Capacitors
MCH_66 ICH_66 AGPCLK
SIO_PCLK FWH_PCLK ICH_PCLK
PCICLK0 PCICLK1 PCICLK2 PCICLK3
APIC_CLK
ICH_48 SIO_48
ICH_14
used only for EMI issue
Trace less 0.2"
SDD8 SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15
SD_DET 15 SD_A2 11 SD_CS#3 11
Title
SDD[8..15] 11
MS-6552
Clock CY28323/4 & ATA100 IDE
CN16 8P4C-10P
1
2
3
4
5
6
7
8
CN18 8P4C-10P
7
8
5
6
3
4
1
2
CN17 8P4C-10P
7
8
5
6
3
4
1
2
X_10PC177
10PC175 10PC169
10PC164
Sheet of
5 35
1
Rev
1.0
Page 6
8
7
6
5
4
3
2
1
CPU GTL REFERNCE VOLTAGE BLOCKCPU SIGNAL BLOCK
VID2
AE3
VID2#
D4#
C21
VID1
VID0
AE4
AE5
VID1#
VID0#
LINT1/NMI
LINT0/INTR
D3#
D2#
A25
A23
B22
VCCPS+ 25 VCCPS- 25
VID[0..4] 12,25
GTLREF3 GTLREF2 GTLREF1 GTLREF0
BPM5# BPM4# BPM3# BPM2# BPM1# BPM0#
REQ4# REQ3# REQ2# REQ1# REQ0#
TESTHI12 TESTHI11 TESTHI10
TESTHI9 TESTHI8 TESTHI7 TESTHI6 TESTHI5 TESTHI4 TESTHI3 TESTHI2 TESTHI1 TESTHI0
BCLK1# BCLK0#
RS2# RS1# RS0#
AP1# AP0# BR0#
COMP1 COMP0
DP3# DP2# DP1# DP0#
ADSTB1# ADSTB0# DSTBP3# DSTBP2# DSTBP1# DSTBP0# DSTBN3# DSTBN2# DSTBN1# DSTBN0#
D1#
D0#
B21
SOCKET478
AA21 AA6 F20 F6
AB4 AA5 Y6 AC4 AB5 AC6
H3 J3 J4 K5 J1
AD25 A6 Y3 W4 U6 AB22 AA20 AC23 AC24 AC20 AC21 AA2 AD24
AF23 AF22
F4 G5 F1
V5 AC1 H6
P1 L24
L25 K26 K25 J26
R5 L5 W23 P23 J23 F21 W22 R22 K22 E22
E5 D1
GTLREF1 GTLREF2
BPM#5 BPM#4
BPM#1 BPM#0
HREQ#4 HREQ#3 HREQ#2 HREQ#1 HREQ#0
R77 4.7K R46 4.7K
R82 4.7K
R45 4.7K
HRS#2 HRS#1 HRS#0
R47 49.9RST R80 49.9RST
HREQ#[0..4] 8
VCCP
CPUCLK# 5 CPUCLK 5
HRS#[0..2] 8
HBR#0 8
* Short trace
HADSTB#1 8 HADSTB#0 8 HDSTBP#3 8 HDSTBP#2 8 HDSTBP#1 8 HDSTBP#0 8 HDSTBN#3 8 HDSTBN#2 8 HDSTBN#1 8 HDSTBN#0 8
NMI 10 INTR 10
GTLREF1
GTLREF2
2/3*Vccp
C48
C49
220P
220P
2/3*Vccp
C35
C36 C13
220P
220P
Every pin put one 220pF cap near it. Trace Width 15mils, Space 15mils. Keep the voltage dividers within 1.5 inches of the first GTLREF Pin
ITP_TMS
R17 39
ITP_TDO
R10 75
ITP_TCK
R15 27
HINIT#
R720 300
HA#[3..31]8
HA#8
HA#22
HA#25
HA#23
HA#26
HA#27
HA#28
HA#30
HA#29
D D
HDBI#[0..3]8
C C
B B
HDEFER#8
Trace : 10 mil width 10mil space
CPU_TMPA12
VTIN_GND12
THERMTRIP#23
PROCHOT#11
CPURST#8
HD#[0..63]8
HDBI#0 HDBI#1 HDBI#2 HDBI#3
FERR#10
STPCLK#10
HINIT#
HINIT#10,15
HDBSY#8
HDRDY#8
HTRDY#8
HADS#8
HLOCK#8
HBNR#8
HIT#8
HITM#8
HBPRI#8
ITP_TDI ITP_TDO ITP_TMS ITP_TRST# ITP_TCK
THERMTRIP#
IGNNE#10
HSMI#10 A20M#10
SLP#10
R78
CPU_GD
CPU_GD11
CPURST# HD#63
HD#62 HD#61 HD#60 HD#59 HD#58 HD#57 HD#56 HD#55 HD#54
U7A
E21
DBI0#
G25
DBI1#
P26
DBI2#
V21
DBI3#
AC3
IERR#
V6
MCERR#
B6
FERR#
Y4
STPCLK#
AA3
BINIT#
W5
INIT#
AB2
RSP#
H5
DBSY#
H2
DRDY#
J6
TRDY#
G1
ADS#
G4
LOCK#
G2
BNR#
F3
HIT#
E3
HITM#
D2
BPRI#
E2
DEFER#
C1
TDI
D5
TDO
F7
TMS
E6
TRST#
D4
TCK
B3
THERMDA
C4
THERMDC
A2
THERMTRIP#
AF26
GND/SKTOCC#
C3
PROCHOT#
B2
IGNNE#
B5
SMI#
C6
A20M#
AB26
SLP#
A22
RESERVED0
A7
RESERVED1
AD2
X_0
AD3 AE21 AF24 AF25
AD6
AD5 AB23 AB25 AA24
AA22 AA25
W25 W26
Y21 Y24 Y23
Y26 V24
RESERVED2 RESERVED3 RESERVED4 RESERVED5 RESERVED6
BSEL0 BSEL1
PWRGOOD RESET# D63#
D62# D61# D60# D59# D58# D57# D56# D55# D54#
V22
D53#
HA#31
AB1Y1W2V3U4T5W1R6V2T4U3P6U1T2R3P4P3R2T1N5N4N2M1N1M4M3L2M6L3K1L6K4K2
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
A26#
A25#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
D41#
U21
V25
U23
U24
U26
T23
T22
D40#
T25
T26
R24
R25
P24
R21
HA#18
HA#24
A24#
A23#
D39#
D38#
N25
N26
M26
A22#
D37#
N23
HA#16
HA#21
HA#20
HA#19
HA#17
A21#
A20#
A19#
A18#
A17#
A16#
D36#
D35#
D34#
D33#
D32#
D31#
M24
P21
N22
M23
H25
HA#9
HA#5
HA#4
HA#14
HA#10
HA#15
HA#11
HA#13
HA#12
A15#
A14#
A13#
A12#
A11#
A10#
D30#
D29#
D28#
D27#
D26#
D25#
K23
J24
L22
M21
H24
G26
HA#3
HA#7
HA#6
AE25A5A4
A9#
A8#
A7#
A6#
A5#
A4#
A3#
DBR#
VCC_SENSE
Differential Host Data Strobes
D24#
D23#
D22#
D21#
D20#
D19#
D18#
D17#
D16#
D15#
D14#
G23
D13#
E24
H22
D25
J21
D23
L21
D26
F26
E25
F24
F23
AD26
AC26
ITP_CLK1
VSS_SENSE
D12#
D11#
D10#
C26
H21
G22
B25
VID4
AE1
ITP_CLK0
D9#
D8#
D7#
C24
C23
B24
VID3
AE2
VID4#
D6#
D22
VID3#
D5#
105P
105P
VCCP
R81
49.9RST
C58
R79 100RST
VCCP
R32
49.9RST
R34 100RST
VCCP
VCCP
HD#5
HD#8
HD#7
HD#53
HD#48
HD#51
HD#50
HD#49
HD#52
A A
HD#41
HD#47
HD#46
HD#39
HD#45
HD#42
HD#44
HD#43
HD#40
HD#32
HD#29
HD#34
HD#37
HD#35
HD#33
HD#38
HD#36
HD#26
HD#30
HD#28
HD#31
HD#27
HD#19
HD#23
HD#24
HD#25
HD#16
HD#22
HD#20
HD#18
HD#21
HD#17
CPU STRAPPING RESISTORS
BPM#0 BPM#4
BPM#5
8
R41 49.9RST R42 49.9RST R44 49.9RST R43 49.9RST
VCCP
7
ITP_TDI
ITP_TRST# CPURST#
R26 150
6
VCCP VCCP
HD#9
HD#10
HD#14
HD#15
HD#11
HD#12
HD#13
ALL COMPONENTS CLOSE TO CPU
PROCHOT#BPM#1 CPU_GD HBR#0
THERMTRIP#
5
HD#0
HD#2
HD#4
HD#3
HD#1
HD#6
R27 62 R76 300 R64 49.9RST R83 49.9RSTR16 680 R66 X_62
4
Title
Micro-Star
Document Number
Last Revision Date:
3
Tuesday, October 30, 2001
2
MS-6552
INTEL mPGA478-B CPU1
Sheet of
Rev
1.0
6 35
1
Page 7
8
VCCP
A10
A12
A14
A16
A18
A20A8AA10
AA12
AA14
VCC
VSS
AD18
VCC
VSS
AD21
VCC
VSS
AD23
VCC
VSS
AD4
VCC
VSS
AD8
VCC
VSS
AE11
AA16
VCC
VSS
AE13
U7B
VCC
VCC
D D
D10 A11 A13 A15 A17 A19 A21 A24 A26
A3 A9
AA1 AA11 AA13 AA15 AA17 AA19 AA23 AA26
AA4
AA7
AA9 AB10 AB12 AB14 AB16 AB18 AB20 AB21
C C
AB24
AB3
AB6
AB8 AC11 AC13 AC15 AC17 AC19
AC2 AC22 AC25
AC5
AC7
AC9
AD1
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
AD10
VSS
AD12
VSS
AD14
VCC
VSS
AD16
VCC
VSS
AA18
AE15
VCC
VSS
AA8
AE17
VCC
VSS
AB11
AE19
VCC
VSS
AB13
AE22
VCC
VSS
AB15
AE24
VCC
VSS
AB17
AE26
7
VCC
VSS
AB19
AE7
VCC
VSS
AB7
AE9
VCC
VSS
AB9
AF1
VCC
VSS
AC10
AF10
VCC
VSS
AC12
AF12
VCC
VSS
AC14
AF14
VCC
VSS
AC16
AF16
VCC
VSS
AC18
AF18
VCC
VSS
AC8
AF20
VCC
VSS
CPU VOLTAGE BLOCK
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AF6
AF8
VSS
B10
B12
B14
B16
B18
B23
B20
B26B4B8
VCC
VSS
6
AE16
VCC
VSS
AE18
VCC
VSS
AE20
C11
VCC
VSS
AE6
C13
VCC
VSS
AE8
C15
AF11
VCC
VSS
C17C2C19
AF13
VCC
VSS
VCC
VSS
AF15
AF17
VCC
VSS
C22
AF19
AF2
AF21
AF5
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
C25C5C7C9D12
AF7
VCC
VSS
VCC
VSS
AF9
D14
B11
VCC
VSS
D16
5
B13
B15
B17
B19B7B9
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
D18
D20
D21D3D24D6D8E1E11
VCC
VSS
VCC
VSS
VCC
VSS
4
C10
C12
C14
C16
C18
C20C8D11
D13
D15
D17
D19D7D9
E10
E12
E14
E16
E18
E20E8F11
F13
F15
F17
F19
AF4
F9
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC-VID
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E13
E15
E17
E19
E23
E7E9F10
F12
F14
F16
E4
E26
F18F2F22
F25F5F8
G21G6G24
VSS
VSS
G3H1H23
VSS
VSS
VSS
H26H4J2
AE23
AF3
VCC-IOPLL
VCC-VIDPRG
VSS
VSS
VSS
VSS
J22
J25J5K21
3
AD20
VCCA
VSSA
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS
VSS
SOCKET478
AD22
Y5 Y25 Y22 Y2 W6 W3 W24 W21 V4 V26 V23 V1 U5 U25 U22 U2 T6 T3 T24 T21 R4 R26 R23 R1 P5 P25 P22 P2 N6 N3 N24 N21 M5 M25 M22 M2 L4 L26 L23 L1 K6 K3 K24
VCC_VID 23
C57 106P/1206
C53 106P/1206
2
C56 X_226P/1206
L2 4.7UH/100MA L1 4.7UH/100MA
C52 X_226P/1206
1
VCCP
B B
CPU DECOUPLING CAPACITORS
VCCP VCCP VCCP
CB32 106P/1206 CB29 106P/1206 CB47 106P/1206 CB51 106P/1206
A A
CB38 106P/1206 CB55 106P/1206 CB61 106P/1206 CB41 106P/1206 CB45 106P/1206 CB25 106P/1206 CB39 106P/1206 CB44 106P/1206
CB49 106P/1206 CB34 106P/1206 CB27 106P/1206 CB54 106P/1206 CB50 106P/1206 CB52 106P/1206 CB58 106P/1206 CB22 106P/1206
PLACE CAPS WITHIN CPU CAVITY
8
7
VCCP
CB231 106P/1206 CB232 106P/1206 CB233 106P/1206 CB234 106P/1206 CB235 106P/1206 CB236 106P/1206 CB237 106P/1206 CB230 106P/1206
PLACE CAPS WITHIN CPU CAVITY SOLDER
Title
Micro-Star
Document Number
Last Revision Date:
6
5
4
3
Tuesday, October 30, 2001
2
MS-6552
INTEL mPGA478-B CPU2
Sheet of
Rev
1.0
7 35
1
Page 8
5
HBR#06
HIT#6
HITM#6
HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31
HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4
HRS#0 HRS#1 HRS#2
HDBI#0 HDBI#1 HDBI#2 HDBI#3
R98 24.9RST R118
HL0 HL1 HL2 HL3 HL4 HL5
VCCP
HA#[3..31]6
D D
HBNR#6
HBPRI#6
HLOCK#6
HADS#6
HREQ#[0..4]6
C C
HDEFER#6
HRS#[0..2]6
B B
HL[0..10]10
A A
HTRDY#6
HDBSY#6
HDRDY#6
HADSTB#06 HADSTB#16
HDSTBN#06 HDSTBP#06 HDSTBN#16 HDSTBP#16 HDSTBN#26 HDSTBP#26 HDSTBN#36 HDSTBP#36
HDBI#[0..3]6
MCHCLK5
MCHCLK#5
HL[0..10]
HL_STB10
HL_STB#10
5
24.9RST
AD4 AD3 AE6
AE7 AE11 AD11 AC15 AC16
AD5
AG4
AH9 AD15
AC2 AC13
M26
M25
AA9
AB8 AB18 AB20 AC19 AD18 AD20 AE19 AE21 AF18 AF20
AG19 AG21 AG23
AJ19 AJ21 AJ23
G2
W3 W5
W2 W7 W6
P25 P24 N27 P23
N25 N24
T4 T5 T3
U3 R3 P7 R2 P4 R6 P5 P3 N2 N7 N3
K4 M4 M3
L3 L5
K3
J2
M5
J3
L2 H4 N5
M6
L7 V7 Y7
V3 U6
T7
R7 U5 U2
Y5 Y3 Y4
U7
V5 V4
R5 N6
J8 K8
M8
U8
845MCH-DDR
U12A
HA3# HA4# HA5# HA6# HA7# HA8# HA9# HA10# HA11# HA12# HA13# HA14# HA15# HA16# HA17# HA18# HA19# HA20# HA21# HA22# HA23# HA24# HA25# HA26# HA27# HA28# HA29# HA30# HA31#
BR0# BNR# BPRI# HLOCK#
ADS# HREQ0# HREQ1# HREQ2# HREQ3# HREQ4#
HIT# HITM# DEFER#
HTRDY# RS0# RS1# RS2#
DBSY# DRDY#
HAD_STB0# HAD_STB1#
HD_STBN0# HD_STBP0# HD_STBN1# HD_STBP1# HD_STBN2# HD_STBP2# HD_STBN3# HD_STBP3#
DBI0# DBI1# DBI2# DBI3#
BCLK BCLK#
H_RCOMP0 H_RCOMP1
HI0 HI1 HI2 HI3 HI4 HI5
HI_STB HI_STB#
VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT
HOST
HUB LINK
POWER
4
HD0# HD1# HD2# HD3# HD4# HD5# HD6# HD7# HD8#
HD9# HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38# HD39# HD40# HD41# HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63#
66IN
RSTIN#
CPURST#
H_VREF0 H_VREF1 H_VREF2 H_VREF3 H_VREF4
H_SWNG0 H_SWNG1
HI10
HI_REF
HL_RCOMP
VCC1_8 VCC1_8 VCC1_8 VCC1_8 VCC1_8
RSVD RSVD RSVD RSVD RSVD RSVD RSVD
RSVD RSVD7 RSVD8 RSVD9
NC0 NC1
4
3
HD#0
AA2
HD#1
AB5
HD#2
AA5
HD#3
AB3
HD#4
AB4
HD#5
AC5
HD#6
AA3
HD#7
AA6
HD#8
AE3
HD#9
AB7
HD#10
AD7
HD#11
AC7
HD#12
AC6
HD#13
AC3
HD#14
AC8
HD#15
AE2
HD#16
AG5
HD#17
AG2
HD#18
AE8
HD#19
AF6
HD#20
AH2
HD#21
AF3
HD#22
AG3
HD#23
AE5
HD#24
AH7
HD#25
AH3
HD#26
AF4
HD#27
AG8
HD#28
AG7
HD#29
AG6
HD#30
AF8
HD#31
AH5
HD#32
AC11
HD#33
AC12
HD#34
AE9
HD#35
AC9
HD#36
AE10
HD#37
AD9
HD#38
AG9
HD#39
AC10
HD#40
AE12
HD#41
AF10
HD#42
AG11
HD#43
AG10
HD#44
AH11
HD#45
AG12
HD#46
AE13
HD#47
AF12
HD#48
AG13
HD#49
AH13
HD#50
AC14
HD#51
AF14
HD#52
AG14
HD#53
AE14
HD#54
AG15
HD#55
AG16
HD#56
AG17
HD#57
AH15
HD#58
AC17
HD#59
AF16
HD#60
AE15
HD#61
AH17
HD#62
AD17
HD#63
AE16 P22
J27 AE17
HVREF
M7 R8 Y8 AB11 AB17
HSWNG
AA7 AD13
HL6
L28
HI6 HI7 HI8 HI9
L27 M27 N28 M24
P26 P27 L25
L29 M22 N23 N26 G9 G10 H6 J25 J23 G16 G17 H7 H27 K23 K25
AD26 AD27
HL7 HL8 HL9 HL10
HUB_MREF
R172 40.2RST
VCC1_8
HD#[0..63] 6
MCH_66 5 PCIRST#1 5,12,15,27 CPURST# 6
HL[0..10]
VCC1_8
VCC_AGP
VCC_DIMM
3
VTT1 VTT2
VTT_GND1 VTT_GND2
W22
W29 AA22 AA26 AB21 AC29 AD21 AD23 AE26 AF23
AG29
AJ25
G29
AD12 AD14 AD16 AD19 AD22
AE1
AE4 AE18 AE20 AE29
AF5 AF7
AF9 AF11 AF13 AF15 AF17 AF19 AF21 AF25
AG1 AG18 AG20 AG22
AH19 AH21 AH23
AJ11
AJ13
AJ15
AJ17
AJ27
R22 R29 U22 U26
N14 N16 P13 P15 P17 R14 R16 T15 U14 U16 T13 T17
A13 A17 A21 A25
C29 D11
D15 D19 D23 D25
F10 F14 F18 F22
G1 G4
H10 H12 H14 H16 H18 H20 H22 H24
K22 K24 K26
L23
U13 U17
AJ3 AJ5 AJ7 AJ9
U12C
A5 A9
C1 D7
F6
H8
J5 J7
K6
845MCH-DDR
VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5
VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
POWER
X1X2X3X4X5X6X7
X1X2X3X4X5X6X7
2
A3
GND
A7
GND
A11
GND
A15
GND
A19
GND
A23
GND
A27
GND
D5
GND
D9
GND
D13
GND
D17
GND
D21
GND
E1
GND
E4
GND
E26
GND
E29
GND
F8
GND
F12
GND
F16
GND
F20
GND
F24
GND
G26
GND
H9
GND
H11
GND
H13
GND
H15
GND
H17
GND
H19
GND
H21
GND
J1
GND
J4
GND
J6
GND
J22
GND
J26
GND
J29
GND
K5
GND
K7
GND
K27
GND
L1
GND
L4
GND
L6
GND
L8
GND
L22
GND
L24
GND
L26
GND
M23
GND
N1
GND
N4
GND
N8
GND
N13
GND
N15
GND
N17
GND
N22
GND
N29
GND
P6
GND
P8
GND
P14
GND
P16
GND
R1
GND
R4
GND
R13
GND
R15
GND
R17
GND
R26
GND
T6
GND
T8
GND
T14
GND
T16
GND
T22
GND
U1
GND
U4
GND
U15
GND
U29
GND
V6
GND
V8
GND
V22
GND
W1
GND
W4
GND
W8
GND
W26
GND
Y6
GND
Y22
GND
AA1
GND
AA4
GND
AA8
GND
AA29
GND
AB6
GND
AB9
GND
AB10
GND
AB12
GND
AB13
GND
AB14
GND
AB15
GND
AB16
GND
AB19
GND
AB22
GND
AC1
GND
AC4
GND
AC18
GND
AC20
GND
AC21
GND
AC23
GND
AC26
GND
AD6
GND
AD8
GND
AD10
GND
X8
X8
2
MCH REFERENCE BLOCK
VTT1
VTT_GND1
VTT2
VTT_GND2
Place 1 Cap. as Close as possible to every pin of MCH Trace width use 15 mils and 15mils space
HVREF
C93 103P
Place 1 Cap. as Close as possible to every pin of MCH
Trace width use 15 mils and 15mils space
Place 0.01uF Cap. as Close as possible to MCH Trace width use 15 mils and 15mils space
C99
CB107
226P/1206
104P
C101
CB108
106P/1206
104P
HSWNG
C68 104P
BACK
C69
C70
X_103P
X_103P
HUB_MREF
C106 R176 103P
MCH Trace Decoupling Capacitors
Micro-Star
Title
Document Number
Last Revision Date:
Tuesday, October 30, 2001
1
L5 4.7UH/1206 C102
106P/1206
L4 4.7UH/1206 C98
226P/1206
VCCP
C90
C87
103P
VCCP
C71
C88
103P
X_103P
VCC1_8
C107
C108
104P
X_104P
VCC1_8
MCH & ICH2
MS-6552
Brookdale MCH1
Sheet of
1
VCC_AGP
VCC_AGP
R130 301RST
R122 150RST103P
R100
49.9RST
R99
100RST
R178 150RST
150RST
CB148 104P CB85 104P
8 35
C72 104P
Rev
1.0
Page 9
5
MD[0..63]17
D D
C C
B B
A A
1" trace
GAD[0..31]19
GC_BE#[0..3]19
5
MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63
GAD0 GAD1 GAD2 GAD3 GAD4 GAD5 GAD6 GAD7 GAD8 GAD9 GAD10 GAD11 GAD12 GAD13 GAD14 GAD15 GAD16 GAD17 GAD18 GAD19 GAD20 GAD21 GAD22 GAD23 GAD24 GAD25 GAD26 GAD27 GAD28 GAD29 GAD30 GAD31
GC_BE#0 GC_BE#1 GC_BE#2 GC_BE#3
G28
G27
AA28 AB25 AB27 AA27 AB26
AB23 AA24 AA25 AB24 AC25 AC24 AC22 AD24
AA23
F27 C28 E28 H25
F25 B28 E27 C27 B25 C25 B27 D27 D26 E25 D24 E23 C22 E21 C24 B23 D22 B21 C21 D20 C19 D18 C20 E19 C18 E17 E13 C12 B11 C10 B13 C13 C11 D10 E10
C9 D8 E8
E11
B9 B7 C7 C6 D6 D4 B3 E6 B5 C4 E5 C3
D3 F4 F3
B2
C2
E2
G5 G3
H3
R27 R28 T25 R25 T26 T27 U27 U28 V26 V27 T23 U23 T24 U24 U25 V24 Y27 Y26
Y23
V25 V23 Y25
U12B
SDQ0 SDQ1 SDQ2 SDQ3 SDQ4 SDQ5 SDQ6 SDQ7 SDQ8 SDQ9 SDQ10 SDQ11 SDQ12 SDQ13 SDQ14 SDQ15 SDQ16 SDQ17 SDQ18 SDQ19 SDQ20 SDQ21 SDQ22 SDQ23 SDQ24 SDQ25 SDQ26 SDQ27 SDQ28 SDQ29 SDQ30 SDQ31 SDQ32 SDQ33 SDQ34 SDQ35 SDQ36 SDQ37 SDQ38 SDQ39 SDQ40 SDQ41 SDQ42 SDQ43 SDQ44 SDQ45 SDQ46 SDQ47 SDQ48 SDQ49 SDQ50 SDQ51 SDQ52 SDQ53 SDQ54 SDQ55 SDQ56 SDQ57 SDQ58 SDQ59 SDQ60 SDQ61 SDQ62 SDQ63
RCVENIN# RCVENOUT#
G_AD0 G_AD1 G_AD2 G_AD3 G_AD4 G_AD5 G_AD6 G_AD7 G_AD8 G_AD9 G_AD10 G_AD11 G_AD12 G_AD13 G_AD14 G_AD15 G_AD16 G_AD17 G_AD18 G_AD19 G_AD20 G_AD21 G_AD22 G_AD23 G_AD24 G_AD25 G_AD26 G_AD27 G_AD28 G_AD29 G_AD30 G_AD31
G_C/BE0# G_C/BE1# G_C/BE2# G_C/BE3#
845MCH-DDR
AGP
Tri-Stated during RSTIN# assertion
DDR
4
SMA10 SMA11 SMA12
SCS#0 SCS#1 SCS#2 SCS#3
SDQS0 SDQS1 SDQS2 SDQS3 SDQS4 SDQS5 SDQS6 SDQS7 SDQS8
SCK#0 SCK#1 SCK#2 SCK#3 SCK#4 SCK#5
SCKE0 SCKE1 SCKE2 SCKE3
SRAS# SCAS#
SWE#
SM_RCOMP
SD_REF0 SD_REF1
G_FRAME#
G_IRDY#
G_TRDY#
G_DEVSEL#
G_STOP#
G_PAR
G_REQ# G_GNT#
SB_STB
SB_STB#
AD_STB0
AD_STB0#
AD_STB1
AD_STB1#
PIPE#
WBF#
AGPREF
G_RCOMP
TESTIN#
4
SMA0 SMA1 SMA2 SMA3 SMA4 SMA5 SMA6 SMA7 SMA8 SMA9
SCB0 SCB1 SCB2 SCB3 SCB4 SCB5 SCB6 SCB7
SCK0 SCK1 SCK2 SCK3 SCK4 SCK5
SBS0 SBS1
SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7
ST0 ST1 ST2
RBF#
E12 F17 E16 G18 G19 E18 F19 G21 G20 F21 F13 E20 G22
E9 F7 F9 E7
C16 D16 B15 C14 B17 C17 C15 D14
F26 C26 C23 B19 D12 C8 C5 E3 E15
E14 F15 J24 G25 G6 G7 G15 G14 E24 G24 H5 F5
G23 E22 H23 F23
F11 G8 G11
G12 G13
J28 J9
J21 Y24
W27 W24 W28 W23 W25
AG24 AH25
AH28 AH27 AG28 AG27 AE28 AE27 AE24 AE25
AF27 AF26
AG25 AF24 AG26
R24 R23 AC27 AC28
AF22 AE22 AE23
AA21 AD25 H26
DDRMA0 DDRMA1 DDRMA2 DDRMA3 DDRMA4 DDRMA5 DDRMA6 DDRMA7 DDRMA8 DDRMA9 DDRMA10 DDRMA11 DDRMA12
CS#0 CS#1 CS#2 CS#3
CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7
SDQS0 SDQS1 SDQS2 SDQS3 SDQS4 SDQS5 SDQS6 SDQS7 SDQS8
DCLK0 DCLK#0 DCLK1 DCLK#1 DCLK2 DCLK#2 DCLK3 DCLK#3 DCLK4 DCLK#4 DCLK5 DCLK#5
DDRCKE0 DDRCKE1 DDRCKE2 DDRCKE3
RASA# CASA# WEA#
BS0 BS1
MRCOMP
DIMMREF
SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7
ST0 ST1 ST2
CB224 X_104P
R165 40.2RST R168 X_4.7K
DDRMA[0..12] 17
CS#[0..3] 17
CB[0..7] 17
SDQS[0..8] 17
DCLK0 16,17 DCLK#0 16,17 DCLK1 16,17 DCLK#1 16,17 DCLK2 16,17 DCLK#2 16,17 DCLK3 16,17 DCLK#3 16,17 DCLK4 16,17 DCLK#4 16,17 DCLK5 16,17 DCLK#5 16,17
DDRCKE[0..3] 16,18
RASA# 17 CASA# 17 WEA# 17
BS0 17 BS1 17
GFRAME# 19 GIRDY# 19 GTRDY# 19 GDEVSEL# 19 GSTOP# 19 GPAR 19
GREQ# 19 GGNT# 19
SBA[0..7] 19
SB_STB 19 SB_STB# 19
ST[0..2] 19
GAD_STB0 19 GAD_STB#0 19 GAD_STB1 19 GAD_STB#1 19
PIPE# 19 RBF# 19 WBF# 19
AGPREF 19
VCC1_8
3
2
1
MCH REFERENCE VOLTAGE
DDR_VTT
MRCOMP
C329 104P
R740
33RST
C239
104P
DIMMREF
X_104P
DIMMREF
C95
C97
104P
BACK
MCH DECOUPLING CAPACITOR
VCC1_8 VCC_DIMMVCCP VCC_AGP
C21
104P
X_104P/0805
X_104P/0805
CB117 105P CB116 104P
CB225 CB221
Micro-Star
Document Number
Last Revision Date:
Wednesday, October 31, 2001
CB114 104P CB115 104P CB126 104P CB118 104P CB106 104P
Title
104PC105
C104 105P
MS-6552
Brookdale MCH 2
Sheet of
1
CB89 104P CB76 104P CB101 104P CB86 104P CB78 104P CB84 104P CB81 104P
AGPREF
Rev
1.0
9 35
CB93 105P CB98 104P CB94 104P CB97 104P CB100 103P CB96 106P/1206 CB90 106P/1206
EMI
VCC5
104PC211 104PC208 104PC8
VCC_DIMM VCC5
BACK
VCCP
VCC_AGP
3
CB219 X_104P
CB222 X_104P CB220 X_104P CB227 X_104P CB223 X_104P CB226 X_104P
VCC_DIMM
2
Page 10
ICH2 PCI / HUB LINK / CPU / LAN / INTERRUPT SIGNALS
VCC1_8
D10D2E5
K19
L19P5V9
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
GND1
GND2
GND3
GND4
GND5
A1A2A10B1B2B3B9
E14
GND6
AD[0..31]20,27
C_BE#[0..3]20,27
DEVSEL#20,27
FRAME#20,27
PLOCK#20
ICH_PCLK5
PCIRST#5
CS15
DIN15
DOUT15
SHCLK15
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C_BE#0 C_BE#1 C_BE#2 C_BE#3
IRDY#20,27
TRDY#20,27
STOP#20,27
PAR20,27
SERR#20,27 PERR#20,27
PME#19,20,27
REQA# GNTA#
DOUT
DOUT
R719 X_10K
AA4 AB4
AB3 AA5 AB5
AA6
AA8 AB8
AB9
W10
AA10
AA3 AB6
AA9 AB7
AA7
W11
AA15
Y4 W5 W4
Y5
Y3 W6 W3
Y6
Y2
Y1
V2
V1
U4 W9
U3
Y9
U2
U1
T4
Y10
T3
Y8
V3 W8
V4 W1 W2
W7
Y7 Y15
M3
L2
F4
G4
H3
H4
J1
K4
K3
J4 J3
U17A
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
CBE#0 CBE#1 CBE#2 CBE#3
DEVSEL# FRAME# IRDY# TRDY# STOP# PAR PLOCK# SERR# PERR# PME#
GPIO0/REQA# GPIO16/GNTA#
PCICLK PCIRST# NC12
NC13 NC14 NC15 NC16
EE_CS EE_DIN EE_DOUT EE_SHCLK
VCC1.8
VCC3
E15
E16
E17
E18
F18
G18
H18
J18
P18
R18R5T5U5V5V6V7V8V14
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
B10C2C3C4C9D5D6D7D8D9E6E7E8E9J9
GND19
VCC3
VCC3
GND20
GND21
VCC3
VCC3
GND22
GND23
J10
VCC3
GND24
J11
J12
VCC1_8SB
V15
V16H5J5
VCCSUS1_8
VCCSUS1_8
GND25
GND26
GND27
J13
J14K9K10
A22
VCCSUS1_8
VCCSUS1_8
VCCSUS1_8
GND28
GND29
GND30
GND31
K11
K12
K13
B21
B22C1D1D3E1E2E3
GND68
GND69
GND70
GND71
GND32
GND33
GND58
GND59
K14J2K1
AA1
AA2
E4
NC5
NC6
NC8
NC9
CPUSLP#
NC10
NC11
NC17
FERR#
IGNNE#
STPCLK#
A20GATE
HL_STB HL_STB# HLCOMP
HUBREF
PIRQA#
PIRQB#
PIRQC#
PIRQD#
APICCLK
APICD0 APICD1
SERIRQ
REQ0# REQ1# REQ2# REQ3#
LAN_RSTSYNC
GND62
GND63
GND64
AB1
AB2
AB21
LAN_RXD0 LAN_RXD1 LAN_RXD2 LAN_TXD0 LAN_TXD1 LAN_TXD2
GND65
ICH2-B5
REQ4#
GNT0# GNT1# GNT2# GNT3# GNT4#
LAN_CLK
GND67 GND66
GPIO1/REQB#/REQ5#
GPIO17/GNTB#/GNT5#
GND60
GND61
AA21
AA22
A20M#
INIT#
INTR
NMI
SMI#
RCIN#
HL10 HL11
IRQ14 IRQ15
A20M#
D11 A12
FERR#
R22 A11 C12 C11 B11
SMI#
B12 C10
KB_RST#
B13
A20GATE#
C13
HL0
A4
HL0 HL1 HL2 HL3 HL4 HL5 HL6 HL7 HL8 HL9
B5 A5 B6 B7 A8 B8 A9 C8 C6 C7 C5 A6 A7 A3
B4 P1
P2 P3 N4
F21 C16 N20 P22 N19 N21
R2 R3 T1 AB10 P4 L3
M2 M1 R4 T2 R1 L4
G3 H2 G2 G1 H1 F3 F2 F1 A21 AB22
HL1 HL2 HL3 HL4 HL5 HL6 HL7 HL8 HL9 HL10
R221 40.2RST HUB_IREF
APIC_D0 APIC_D1 SERIRQ
PREQ#0 PREQ#1 PREQ#2 PREQ#3 PREQ#4 PREQ#5
PGNT#0 PGNT#1 PGNT#2 PGNT#3 PGNT#4 PGNT#5
A20M# 6 SLP# 6 FERR# 6 IGNNE# 6 HINIT# 6,15 INTR 6 NMI 6
STPCLK# 6 KB_RST# 12 A20GATE# 12
HL[0..10] 8
This resistor less than 0.5" from ICH use 15 mils trace
HL_STB 8 HL_STB# 8
VCC1_8
INTA# 19,20 INTB# 19,20 INTC# 20,27 INTD# 20
IRQ14 5 IRQ15 5
SERIRQ 12,20
PREQ#[0..5] 20,27
PGNT#[0..5] 20,27
LAN_PCLK 15 RST 15 RXD0 15 RXD1 15 RXD2 15 TXD0 15 TXD1 15 TXD2 15
ICH2 SMI# SIGNAL
SMI#
R218 33
HSMI# 6
100PC143
ICH2 STRAPPING RESISTORS
FERR#
SERIRQ
KB_RST# A20GATE#
REQA# GNTA#
APIC_D0 APIC_D1
R279 62
R256 8.2K
R219 10K R220 10K
R284 2.7K R272 X_2.7K
R270 10K R725 10K
VCCP
VCC3
VCC3
VCC5 VCC3
ICH2 REFERENCE VOLTAGE
VCC1_8
HUB_IREF
C142 R222 103P
C141 104P
C140
X_104P
R223 150RST
150RST
ICH2 DECOUPLING CAPACITORS
VCC3
VCC1_8SBVCC1_8
Place Cap. as Close as possible to ICH2 Trace width use 15 mils and 15mils space
CB171 104P
CB184
CB146
CB170
CB167
104P
104P
104P
Place one 0.1U/0.01U pair in each corner and 2 on opposite sides close to ICH2 if it fit
CB141 CB157
104P
CB142 103P
CB134
CB140
104P
104P103P
Distribute near the 1.8V power pin of the ICH2
CB158
104P
104P
Distribute near the VCC1_8SB Power pin of the ICH2
Micro-Star
Title
Document Number
Last Revision Date:
Tuesday, October 30, 2001
MS-6552
Brookdale ICH2 PCI
Sheet of
Rev
0A
10 35
Page 11
ICH2 ASIC / RTC / AC'97 / GPIO / LPC / USB / IDE SIGNALS
CB181 104P
AA13
W16
AB18
W21
AA17
AA18 AA16
AB16 AB17
W22
W14
AB15
AB14 AA14
W12 AB13 AB12 AA12
W13 AB11
W17 AB19
AA19
W18 AB20
AA20
W19
W20
U17B
THRM# SLP_S3# SLP_S5
R20
PWROK
A13
CPUPWRGD
B15
VRMPWRGD PWRBTN# RI#
R21
RSMRST#
Y16
RSM_PWROK
Y17
SUSSTAT# SUSCLK
SMBDATA SMBCLK GPIO11/SMBALERT#
U19
SMLINK0
V20
SMLINK1
T19
INTRUDER#
T20
RTCRST#
T21
VBIAS
U22
RTCX1
T22
RTCX2
D4
CLK66
M19
CLK14
P20
CLK48
V22
AC_RST#
P19
AC_SYNC
R19
AC_BITCLK
P21
AC_SDOUT
Y22
AC_SDIN0 AC_SDIN1
N22
SPKR GPIO12
GPIO13
L1
GPIO21
B14
GPIO22
A14
GPIO23 GPIO27 GPIO28
Y12
LAD0/FWH0 LAD1/FWH1 LAD2/FWH2 LAD3/FWH3 FS0
Y13
LDRQ0# LDRQ1# LFRAME#/FWH4
USBP0+
Y18
USBP0­USBP1+ USBP1­USBP2+
Y19
USBP2­USBP3+ USBP3­OC0#
Y20
OC1#
Y21
OC2# OC3#
RTC_VCC
RING#26
SPKR21
GP2315
OC#022 OC#122
VCCP VCC5_SB
CB147 104P
THRM#
PWR_GD VRM_GD RING#
RSMRST#
SMB_ALERT
INTRUDER# RTCRST# VBIAS
RTCX2
R261 33
SIO_PME#
GP23
R327 X_10K
VCC3_SB
CB193 104P
THRM#12 SLP_S3#12,24 SLP_S5#24
PWR_GD21
CPU_GD6 VRM_GD25
PWRBTN#12
RSMRST#12
SUSCLK12
SMBDATA5,12,15,16
SMBCLK5,12,15,16
SM_LNK020 SM_LNK120
ICH_665
ICH_145
ICH_485
AC_RST#15
AC_SYNC13,15
AC_BCLK13,15
AC_SDOUT13,15
AC_SDIN013,15 AC_SDIN115
EXTSMI#21
SIO_PME#12
LAD0/FWH012,15 LAD1/FWH112,15 LAD2/FWH212,15 LAD3/FWH312,15
LDRQ#12
LFRAME#/FWH412,15
USBP0+22
USBP0-22
USBP1+22
USBP1-22
USBP2+22
USBP2-22
USBP3+22
USBP3-22
CB143 104P
Distribute near the VCC3_SB power pin of the ICH
VCC3_SB
RTC_VCC
U21
T18
U18
F5G5V17
V18
VCCRTC
VCC3SUS1
VCC3SUS2
VCC3SUS4
VCC3SUS5
VCC3SUS6
VCC3SUS7
GND34
GND35
GND36
GND37
GND38
GND39
GND40
GND41
GND42
GND43
GND44
GND45
L9
L10
L11
L12
L13
L14M9M10
M11
M12
M13
M14N9N10
GND46
ICH2 DECOUPLING CAPACITOR
VCC5_SBVCC5
CB169 103P
CB179 104P
VCCP VCC5_SB
D12
D13
V19K2M20
VCPU_IO1
VCPU_IO2
GND47
GND48
GND49
GND50
GND51
GND52
N11
N12
N13
N14P9P10
CB180 104P
VCC5REF1
VCC5REF2
VCC5REF_SUS
GPIO2/PIRQE#
GPIO3/PIRQF#
GPIO4/PIRQG#
GPIO5/PIRQH#
GND53
GND54
GND55
GND56
GND57
ICH2-B5
P11
P12
P13
P14
SM5817S
PDCS1# SDCS1# PDCS3# SDCS3#
PDA0 PDA1 PDA2 SDA0 SDA1 SDA2
PDDREQ
SDDREQ PDDACK# SDDACK#
PDIOR#
SDIOR# PDIOW# SDIOW#
PIORDY SIORDY
PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8
PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15
SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15
GPIO6 GPIO7
GPIO8 GPIO18 GPIO19 GPIO20 GPIO24 GPIO25
TP0
VCC5_SB
VCC5VCC3
D14
E21 C15 E19 D15
F20 F19 E22 A16 D16 B16
G22 B18 F22 B17 G19 D17 G21 C17 G20 A17
H19 H22 J19 J22 K21 L20 M21 M22 L22 L21 K22 K20 J21 J20 H21 H20
D18 B19 D19 A20 C20 C21 D22 E20 D21 C22 D20 B20 C19 A19 C18 A18
U20 N3 N2 N1 M4 Y11 AA11 Y14 A15 D14 C14 V21 W15
CB161 104P
R257 1K
CB156 104P
PDD0 PDD1RTCX1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15
SDD0 SDD1 SDD2 SDD3 SDD4 SDD5 SDD6 SDD7 SDD8 SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15
BATLOW#
GP6 GP7
PD_CS#1 5 SD_CS#1 5 PD_CS#3 5 SD_CS#3 5
PD_A0 5 PD_A1 5 PD_A2 5 SD_A0 5 SD_A1 5 SD_A2 5
PD_DREQ 5 SD_DREQ 5 PD_DACK# 5 SD_DACK# 5 PD_IOR# 5 SD_IOR# 5 PD_IOW# 5 SD_IOW# 5 PD_IORDY 5 SD_IORDY 5
PDD[0..15] 5
SDD[0..15] 5
INTE# 20 INTF# 20,27 INTG# 20 INTH# 20 GP6 15
LAN_WAKE 26
STRCTRL 26
R331
1.5K
R340
4.7K
D21
VBAT
SM5817S
PROCHOT BLOCK
R211 4.7K
VCCP
PROCHOT#6
PD_IORDY SD_IORDY
PD_DREQ SD_DREQ
INTRUDER# RSMRST#
SPKR PWR_GD
THRM# VRM_GD SIO_PME# RING# RSMRST# PWRBTN#
D19 1N4148S
D20
SM5817S
R288 1K
BAT1
R133 4.7K R224 4.7K
R97 5.6K R225 5.6K
R280 10K R365 10K
R260 X_10K R273 8.2K
R345 10K R216 X_10K R377 4.7K R367 8.2K R366 1K R329 X_10K
RTC_VCC
R713 1K
R411 300K
C215
THRM#
Q32 2N3904S
473P
C174 15P
X_103P
473PC167
R277 20M
R274
5.6M
ICH2 STRAPPING RESISTORS
RTC_VCC
VCC3 VCC3
VCC3_SB
Micro-Star
Document Number
Last Revision Date:
Tuesday, October 30, 2001
RTC BLOCK
JBAT1 Clear CMOS
1 2 3
R410 1K
R293 10MR317 10M
X2
32.768KHZ
RTC_VCC
X_1N4148S
C315
D26
SM_LNK0 SM_LNK1 BATLOW# EXTSMI#
SLP_S3# SMB_ALERT
GP23
GP7
Title
MS-6552
Brookdale ICH2 Other
Normal1 - 2 Clear CMOS2 - 3
JBAT1 YJ103
RTCRST# VBIAS RTCX1 RTCX2
C170 15P
X4
4
VCC
2 3
GNDOUT
X_32.768Khz
RN28
8P4R-4.7K 1 2 3 4 5 6 7 8
RN32
8P4R-10K 1 2 3 4 5 6 7 8
RN31
8P4R-4.7K 1 2 3 4 5 6 7 8
Sheet of
*
1
NC
VCC3_SBVCC3
VCC3_SB
VCC3
11 35
RTCX1
Rev
0A
Page 12
CPU_TMPA
VBAT
R739 1M
R158 0
LPC SUPER I/O W83627HF SPEAKER BLOCK
U13
PCIRST#15,8,15,27
SIO_PCLK5
SERIRQ10,20
LDRQ#11
LFRAME#/FWH411,15
LAD0/FWH011,15 LAD1/FWH111,15 LAD2/FWH211,15 LAD3/FWH311,15
JYS_AX214 JYS_AX114 JYS_PB014 JYS_PB114 JYS_AX014 JYS_AX314 JYS_PB314 JYS_PB214
MID_OUT14
MID_IN14
TMP_VREF CPU_TMP
SYS_TMP
SUS_LED21
VCCP
THRM#11
SMBCLK5,11,15,16
PSON#21
SLP_S3#11,24
SIO_485
VCC3
VBAT VCC3 VCC5
VTIN_GND
-5VIN
-12VIN +12VIN VTIN_VCC
VID4 VID3 VID2 VID1 VID0
BEEP
VTIN_GND6
VID[0..4]6,25
CPU_CTRL22
CPU_FAN22
SYS_CTRL22
SYS_FAN22 PSU_FAN22
CHASISS
SIO_PME#11
SMBDATA5,11,15,16
PWRBTN#11
PWRBTIN#21
PWR_LED21
VCC5_SB
30
LRESET#
21
LCLK
23
SERIRQ
22
LDRQ#
29
LFRAME#
27
LAD0
26
LAD1
25
LAD2
24
LAD3
125
GPX2/P15/GP14
123
GPY1/GP15
128
GPSA1/P12/GP10
121
GPSA2/GP17
126
GPX1/P14/GP12
124
GPY2/P16/GP14
127
GPSB1/P13/GP11
122
GPSB2/GP16
120
MSO/IRQIN0
119
MSI/GP20
101
VREF
102
VTIN3
103
VTIN2
104
VTIN1
93
AGND
94
-5VIN
95
-12VIN
96
+12VIN
97
AVCC
98
+3.3VIN
99
VCOREB
100
VCOREA
106
VID4
107
VID3
108
VID2
109
VID1
110
VID0
116
FANPWM1
113
FANIO1
115
FANPWM2
112
FANIO2
111
FANIO3
105
OVT#
118
BEEP
76
CASEOPEN#
19
PME#
89
WDTO/GP24
91
SDA/GP22
92
SCL/GP21
67
PSOUT#
68
PSIN#
64
SUSLED/GP35
90
PLED/GP23
72
PWRCTL#/GP31
73
SUSCIN/GP30
18
CLKIN
61
VSB
74
VBAT
28
VCC3
12
VCC_1
48
VCC_2
77
VCC_3
114
VCC_4
W83627HF
SIO
CIRRX/GP34
RSMRST#/GP33
PWROK/GP32
DRVDEN0 DRVDEN1
INDEX#
MOA#
DSB# DSA#
MOB#
DIR#
STEP#
WRDATA#
WE#
TRACK0#
WP#
RDDATA#
HEAD#
DSKCHG#
PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7
SLCT
BUSY
ACK# SLIN# INIT#
ERR#
AFD#
STB#
IRRX/GP25 IRTX/GP26
SUSCLKIN
DCDA# DSRA#
SINA
RTSA#
SOUTA
CTSA# DTRA#
RIA#
DCDB# DSRB#
SINB
RTSB#
SOUTB
CTSB# DTRB#
RIB#
GA20
KBRST
KBDATA
KBCLK
MSDATA
MSCLK
KBLOCK#
VSS1
VSS2
VSS3
VSS4
PE
1 2 3 4 5 6 7 8 9 10 11 13 14 15 16 17
42 41 40 39
PD4
38
PD5
37
PD6
36
PD7
35 31
PE
32
RN11 8P4R-33
33
ACK#
34
SLIN#
43
INIT#
44
ERR# SLIN#
45 46 47
88 69 87 75
56 50 53 51 54 49 52 57
84 79 82 80 83 78 81 85
59 60 63 62 66 65 58
70 71
20 55 86 117
PD6 PD4
PD7
INIT# ERR#
RN128P4R-33 1 2
R142 33
IRRX IRTX
RTSA# SOUTA
SOUTB
R146 X_0
1 2 3 4 5 6 7 8 7 8 5 6 3 4 1 2 7 8 5 6 3 4 1 2 7 8 5 6 3 4
RSMRST#
DRVDEN0 26 DRVDEN1 26 INDEX# 26 MOT_A# 26 DRV_B# 26 DRV_A# 26 MOT_B# 26 DIR# 26 STEP# 26 WT_DT# 26 WT_EN# 26 TRACK0# 26 WP# 26 RDATA# 26 HEAD# 26 DSKCHG# 26
LP_D0 LP_D1 LP_D2 LP_D3 LP_D6 LP_D5 LP_D4 LP_D7
LP_SLCT 26 LP_PE 26 LP_BUSY 26 LP_ACK# 26 LP_INIT# 26 LP_ERR# 26 LP_SLIN# 26 LP_AFD# 26 LP_STB# 26
SUSCLK 11 DCDA# 26
DSRA# 26 SINA 26 RTSA# 26 SOUTA 26 CTSA# 26 DTRA# 26 RIA# 26
DCDB# 26 DSRB# 26 SINB 26 RTSB# 26 SOUTB 26 CTSB# 26 DTRB# 26 RIB# 26
A20GATE# 10 KB_RST# 10 KBDATA 26 KBCLK 26 MSDATA 26 MSCLK 26 KBLOCK# 21
RSMRST# 11
RN5 8P4R-33
RN6 8P4R-33
LP_D[0..7] 26
THERMAL RESISTOR BLOCK
VTIN_VCC
NOTE: LOCATE INSIDE SOCKET478
FB13 120S/0805 CB102 104P
TMP_VREF
R157 X_10KST
CPU_TMP
RT1 X_R-TD-C0603
VTIN_GND
TMP_VREF CPU_TMPA
R163 30K
VCC5
VTIN_GND
R166 10KST
RT2 R-TD-C0603
NOTE: LOCATE CLOSE STATUS PANEL
CHASISS INTRUSION HEADER
+12V
-12V
-5V
J8
1 2
D1x2
R145 28KST1 2 R150 232KST1 2 R160 120KST1 2
CHASISS
VTIN_GND
FB12 120S/0603
TMP_VREF
SYS_TMP
VTIN_GND
12
R144 10KST
VCC5
R162 10K
BEEP
R164 4.7K
2N3904S
CPU Temperature Read
CPU_TMPA6
CPU_TMPA
VTIN_GND
SUPER I/O STRAPPING RESISTOR
R214 10K
VCC3_SB
R169 4.7K
VCC5
R151 4.7K
VCC5
R175 X_4.7K
VCC5
SOUTA
L: Disable KBC H: Enable KBC
SOUTB
L: 24MHZ H: 48MHZ
RTSA#
L: CFAD=2E H: CFAD=4E
DTRA# L: PNP Default H: PNP no Default
+12VIN
-12VIN
-5VIN
12
12
R161
R149
56KST
56KST
TMP_VREF
Q28
R147 X_0
ALARM 21
1 2
3
J4 X_YJ103
PWRBTN#
SOUTA SOUTB RTSA#
DECOUPLING CAPACITOR
RESUME RESET CIRCUIT BLOCK
Stuff all for D Version bug
VCC3_SB
R408 33K R396 0
C206 105P
U20A 74LC14-3.3
1 2
(VCC3_SB)
U20F 74LC14-3.3
13 12
RSMRST#
IR HEADER
VCC5
IRRX IRTX
VCC3 VCC5
CB133 104P CB119
IR1
1
1
3
3
4
4
5
5
IR
104P
VBAT VCCP
CB104 104P
CB121 104P CB103 104P CB11 104P CB120 104P
C100 104P
VCC5_SB
CB111 104P
Title
Micro-Star
Document Number
Last Revision Date:
Tuesday, October 30, 2001
MS-6552
LPC I/O W83627HF
Sheet of
Rev
0A
12 35
Page 13
AD1881A & AD1885 CONFIG
PIN AD1881A AD1885
40
NC 42 43 44
AC_SDOUT11,15
AC_BCLK11,15 AC_SDIN011,15 AC_SYNC11,15
PRI_RST#15
12
C197 X_10P
NC NC
X_120S/0805
R390 33
AD1881A S/W Audio Components List:
U22:AD1881A CODE R390:33ohm C205,CB204,CB194,C190,CB202:104P CT40:ELS10U/16V-B C195,C201,C218:105P/0805 C202:104P C200:473P R391:10M X3:24.576MHZ C191,C192:22P C193,C194:270P
CP6 X_COPPER
FB22
VCC3
12
GND NCGND +5VR GND
C205 104P
XTALIN XTALOUT
VDD3
CB202 104P
R397 X_4.7K
VDD3
1 2 3 4
5 6 7 8
9 10 11
12
MONO_PHONE
CDLX CDGNDX
CDRX
R401
R808
R807
0
X_0
X_0
+5VR
R806
X_0
4847464544424140394338
NC
NC
AVSS2
TEST6
TEST5
TEST4
PHONE
AUXL
1 2
AUXR
VIDEOL
CP14
X_COPPER
CP15
X_COPPER
TEST1
VIDEOR
CDL
DVDD1 XTL_IN XTL_OUT DVSS1
SDATA_OUT BIT_CLK DVSS2 SDATA_IN DVDD2 SYNC RESET#
PC_BEEP
1314151617181920212223
R819 X_0/0805
TEST2
DACOUTL
DACOUTR
CDGND
CDR
MIC1
37
MONO
AVDD2
MIC2
SROUT_R SROUT_L
MONO_OUT
LOUTR
LOUTL
NC NC
VRDA VRAD
AFILT2 AFILT1
NC
VREF
AVSS1 AVDD1
LINL
LINR
24
ALC201A
C185
C184
U22
36 35
34 33
32 31
30 29
28 27 26
25
C186
1 2
105P/0805
SROUT_R 23 SROUT_L 23
1 2
VREF_OUT
+5VR
CB194 104P
105P/0805 105P/0805
CB204
104P
1 2
LIN_IN_R LIN_IN_L
12
+5VR
LINE_ROUT 14 LINE_LOUT 14
12
+
CT40
ELS10U/16V-B
R342 1K
C181
X_473P
12
C190
X_104P
LIN_IN_R 23 LIN_IN_L 23
+5VR
VREF_OUT
AD1881A AC97 CODEC
C198
1 2
X_224P
12
12
12
C193
102P
MIC_IN14
R271 2K
1 2
R376 X_01 2
C195
C194
102P
105P/0805
LINE_R
LINE_R14,23
LINE_L
LINE_L14,23
12
C201
105P/0805
C126 102P
C127 102P
R253
2.2K
12
CT42
+
X_ELS10U/16V-B
MIC_IN
C125 102P
12
X_473P
C202 1 2
X_104P
C200
J3-3 19 18 17 16 28
YCN15F-001-1
J3-2 27 26 25 24 29
YCN15F-001-1
X_105P
AUDIO CODE CRYSTAL CIRCUIT
XTALOUT
C191 22P
24.576MHZ
12
R391 1M
X3
1 2
XTALIN
12
C192 22P
DECOUPLING CAPACITOR
FB29
X_0
12
C204
CP11
X_COPPER
AUDIO CODE REGULATORS
CP7
-12VR
1 2
C213
105P
-12V
12
CB195 X_104P
FB27 X_80S/0805
X_COPPER
AUDIO CODE CD / AUX / MODEM IN HEADERS
CDRX
C187 105P/0805
1 2
CDGNDX
C188 105P/08051 2
CDLX CDL
C189 105P/08051 2
12
R358 10K
12
12
R354
R357
10K
10K
CDR
CDGND
CDR 14
4
CD_IN1
3
YJ104-B
2 1
CD IN
4
CD_IN2
3
YJ104-B
2 1
FOR LEGEND
CDL 14
MONO_PHONE
MONO_OUT
C219 105P/0805
1 2
C218 105P/08051 2
1
MDM_IN1
2
MONDEN HEADER
3 4
MODEM IN
+12VR
12
80S/0805 FB31
CB206 104P
Micro-Star
Document Number
Last Revision Date:
Tuesday, October 30, 2001
+12V
12
105P
C232
U24 YLT1087S-0.8A
3 2
VIN VOUT
ADJ
SOT223
1
Title
MS-6552
AC97 CODEC AD1885
+5VR
R412 100RST
R402 300RST
Sheet of
13 35
12
C212
105P
Rev
0A
Page 14
LINE_ROUT13
LINE_LOUT13
AD1881A S/W CODEC COMPONENTS LIST:
C210,C234:105P R414,R435,R413,R403:47K C217,C231:33P R439,R398:NC
JYS_PB012 JYS_AX012
JYS_AX112 JYS_PB112
C209
C203
VCC5
JYS_AX0
JYS_AX1 JYS_PB1
LOUTR
105P/0805
LOUTL
105P/0805
POLY SWITCH
1.1A-P FS3
CB105 104P
R156 2.2K
R154 2.2K
VCC5
R414
1 2
X_47K
R403
1 2
X_47K
CDR13
R431
4.7K
CDL13
CB99 104P
G
CP4
X_COPPER
L3 X_0/0805
C210
R439 0
R398 0
1 2
X_105P
C234
1 2
X_105P
2
5 6
-12VR
+
-
+12VR
-12VR
+
-
+12VR
8 4
8 4
U25A X_YTL072S3
U25B YTL072S
1
R413
1 2
X_47K
C217
1 2
X_33P
7
R435
1 2
X_47K
C231
1 2
X_33P
SPEAKER OUT CIRCUIT
C230
ELS47U/16V-C
C229
ELS47U/16V-C
CD PANEL PLAY WITHOUT PC POWER_ON
Q53 2N7002S
D S
DS
Q54
2N7002S
D S
Q52 2N7002S
CB95 39P
1 2 3 4 5 6 7 8
YCN15F-001-1
J3-1
Q51 2N7002S
DS
G
G
R405 1K/0805
A5VSB
G
G
DS
Q50 2N7002S
CB113 104P
9 10 11 12 13 14 15
R400
1K
R418
1K
FB28
1 2
0/0805
FB30
1 2
0/0805
SPEAKER_R
VCC5_SB
SPEAKER_L
12
C226
102P
12
C227
102P
SPEAKER_R
SPEAKER_L
GAME/MIDI CONNECTOR
R141 2.2K R196 2.2K R139 2.2K
R155 2.2K
C136 100P
C103 100P
JYS_PB3 JYS_AX2 MID_OUT JYS_AX3 JYS_PB2 MID_IN
LEG12V TREACE W=40mil
ELS47U/16V-C
JYS_PB3 12 JYS_AX2 12 MID_OUT 12 JYS_AX3 12 JYS_PB2 12 MID_IN 12
SPEAKER OUT JACK
LINE_NEXT_R
FSPKR FSPKL
LINE_NEXT_L
12
C130 102P
12
12
C128
C131
102P
102P
23 22 21 20 30
12
C129
102P
FOR MSI INTERNAL HEADER
+12V
12
R417
3.3/0805 LEG12V
CT44
MIC_IN13
LINE_R13,23
FSPKR
MIC_IN SPEAKER_R LINE_NEXT_R
LINE_R
JAUDIO1
1 3 5 6 7
9 11 13 14 15 17 18
LEGEND-FAUDIO
ALINE OUTL
ALINE OUTR GNDALO GND12V GND12V +12V(1A) MIC FLINE OUTR FLINE OUTL LINE NEXT L GNDFLO LINE-IN-R LINE-IN-L
GNDALO
CUT
GNDMIC
LINE NEXT R
CUT
FOR LEGEND
JYS_AX0 JYS_AX1 JYS_AX2 JYS_AX3
JYS_PB1JYS_PB0 JYS_PB2 JYS_PB3 JYS_PB0
MID_IN MID_OUT
RN13
7 8 5 6 3 4 1 2
8P4R-1M
RN14
8P4R-2.2K 1 2 3 4 5 6 7 8
R159 22K R205 22K
Micro-Star
Document Number
Last Revision Date:
Tuesday, October 30, 2001
J3-4
YCN15F-001-1
FSPKL
2 4
8
10 12
LINE_NEXT_LSPEAKER_L
16
LINE_L
VCC5
Title
Audio Amp TL072 & GAME
JYS_AX3 JYS_AX2 JYS_AX1 JYS_AX0
JYS_PB1 JYS_PB2 JYS_PB3 JYS_PB0
MS-6552
Sheet of
LINE_L 13,23
CN14
7
8
5
6
3
4
1
2
8P4C-103P
CN15
7
8
5
6
3
4
1
2
8P4C-103P
14 35
Rev
0A
Page 15
FWH INIT Signal Voltage Translation Block
PCIRST#15,8,12,27
SD_DET5 PD_DET5
VCC3
GP2311
J7 YJ102
LAD0/FWH011,12 LAD1/FWH111,12 LAD2/FWH211,12
J7 BIOS Update
SHORT Locked
OPEN
Unlocked
CNR_OC#122
DIN10
SHCLK10
SMBCLK5,11,12,16
AC_SYNC11,13
AC_SDOUT11,13
AC_BCLK11,13
Firware Hub (FWH)
F_GPI3 F_GPI2 SD_DET PD_DET
R421 X_4.7K
1 2
VCC3
U23
1
VPP
2
RST#
3 4 5 6 7 8
9 10 11 12 13 14 15 16 17
FGPI4
FGPI3 FGPI2
IC(VIL)
FGPI1
GNDA FGPI0 WP# TBL# ID3 ID2 ID1 ID0 FWH0 FWH1 FWH2 GND FWH3
YSKT032PLCC
VCCA
INIT#
FWH4
VCC
CLK
GND
VCC
RFU RFU RFU RFU RFU
VCC3
32 31 30
R363 8.2K R364 8.2K
29 28 27 26 25 24 23 22 21 20 19 18
FINIT#
FWH_PCLK 5
LFRAME#/FWH4 11,12
LAD3/FWH3 11,12
R722 4.7K
HINIT#6,10
*
CNR RISER
CNR1
B1
RESV1
B2
RESV2
B3
RESV3
B4
GND1
B5
RESV4
B6
RESV5
B7 CNR_TXD1 CNR_RST
CNR_RXD2 CNR_RXD0
VCC5_SB
CNR_OC#1
-12V VCC3_SB
VCC3
DIN SHCLK
VCC3
DN#
AC_SDOUT R715 33
X_10PC236
GND2
B8
LAN_TXD1
B9
LAN_RSTSYNC
B10
GND3
B11
LAN_RXD2
B12
LAN_RXD0
B13
GND4
B14
RESV6
B15
+5VDUAL
B16
USB_OC#
B17
GND5
B18
-12V
B19
+3.3VD
B20
GND6
B21
EE_DOUT
B22
EE_SHCLK
B23
GND7
B24
SMB_A0
B25
SMB_SCL
B26
PRIMARY_DN#
B27
GND8
B28
AC97_SYNC
B29
AC97_SDATA_OUT
B30
AC97_BITCLK
CNR
AC97_RESET#
AC97_SDATA_IN1 AC97_SDATA_IN0
RESV7 RESV8
GND9
RESV9
RESV10
GND10 LAN_TXD2 LAN_TXD0
GND11
LAN_CLK
LAN_RXD1
RESV11
USB+
GND12
USB­+12V
GND13
+3.3VDUAL
+5VD
GND14
EE_DIN
EE_CS
SMB_A1 SMB_A2
SMB_SDA
RESV12
GND15
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19
A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30
CNR_TXD2 CNR_TXD0
CNR_CLK CNR_RXD1
+12V
VCC5
DOUT CS
VCC3
AC_RST#
R338 10K
CNR_USBP2+ 22 CNR_USBP2- 22
DOUT 10 CS 10
SMBDATA 5,11,12,16 AC_RST# 11
AC_SDIN1 11 AC_SDIN0 11,13
R339 10K
R362
8.2K
Q41 2N3904S
FWH RESISTORS
F_GPI3
R415 10K
F_GPI2
R416 10K
PD_DET
R434 10K
SD_DET
R436 10K
C235
104P
VCC3VCC3
R361 1K
Q40 2N3904S
PRI_RST#13
NEAR ICH2
FINIT#
FWH DECOUPLING CAPACITORS
VCC3
CB201 104P
R714
X_0
JP3
1 2 3
YJ103
R437 4.7K
CB203 104P
VCC3_SB
CB191
CB190
104P
104P
GP611
AC_RST#
AC_RST#11
CNR_TXD0 CNR_TXD1 CNR_RST CNR_TXD2
CNR_RXD0 CNR_RXD1 CNR_CLK CNR_RXD2
AC_SDOUT11,13
RN33
8P4R-22 1 2 3 4 5 6 7 8
RN34
8P4R-22 1 2 3 4 5 6 7 8
5 6 U21C 7407S (VCC5_STR)
2N3904S
AC_SDOUT CNR_OC#1
TXD0 10 TXD1 10 RST 10 TXD2 10
RXD0 10 RXD1 10 LAN_PCLK 10 RXD2 10
VCC3_SB
R438 330
Q56
R444 1K
R269 X_8.2K R712 330K
R443 10K
VCC3 VCC3
2.5"<L<9"
DN#
JP3 AUDIO DOWN
1 - 2
2 - 3
Auto mode
Disabled onboard audio codec
Micro-Star
Title
Document Number
FWH & CNR
Last Revision Date:
Tuesday, October 30, 2001
MS-6552
Sheet of
Rev
0A
15 35
Page 16
5
4
3
2
1
VCC_DIMM
VDD
GND
VDD
VDD
GND
GND
145
152
DIMM2
120
148
168
VDD
VDD
VDD
D0 D1 D2 D3 D4 D5 D6 D7 D8
D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44 D45 D46 D47 D48 D49 D50 D51 D52 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63
CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7
WP
GND
GND
DIMM184
160
176
Address = A2
2 4 6 8 94 95 98 99 12 13 19 20 105 106 109 110 23 24 28 31 114 117 121 123 33 35 39 40 126 127 131 133 53 55 57 60 146 147 150 151 61 64 68 69 153 155 161 162 72 73 79 80 165 166 170 171 83 84 87 88 174 175 178 179
44 45 49 51 134 135 142 144
90
DDRMD0 DDRMD1 DDRMD2 DDRMD3 DDRMD4 DDRMD5 DDRMD6 DDRMD7 DDRMD8 DDRMD9 DDRMD10 DDRMD11 DDRMD12 DDRMD13 DDRMD14 DDRMD15 DDRMD16 DDRMD17 DDRMD18 DDRMD19 DDRMD20 DDRMD21 DDRMD22 DDRMD23 DDRMD24 DDRMD25 DDRMD26 DDRMD27 DDRMD28 DDRMD29 DDRMD30 DDRMD31 DDRMD32 DDRMD33 DDRMD34 DDRMD35 DDRMD36 DDRMD37 DDRMD38 DDRMD39 DDRMD40 DDRMD41 DDRMD42 DDRMD43 DDRMD44 DDRMD45 DDRMD46 DDRMD47 DDRMD48 DDRMD49 DDRMD50 DDRMD51 DDRMD52 DDRMD53 DDRMD54 DDRMD55 DDRMD56 DDRMD57 DDRMD58 DDRMD59 DDRMD60 DDRMD61 DDRMD62 DDRMD63
DDRCB0 DDRCB1 DDRCB2 DDRCB3 DDRCB4 DDRCB5 DDRCB6 DDRCB7
WP
R741 X_4.7K
DDRMD[0..63] 17,18
DDRCB[0..7] 17,18
VCC_DIMM
VCC_DIMM
DDRMAA[0..12]17,18
DDRCS#[0..3]17,18
DDRWEA#17,18 DDRCASA#17,18 DDRRASA#17,18
DDRCKE[0..3]9,18
DQS[0..8]17,18
SMBDATA5,11,12,15
SMBCLK5,11,12,15
15223054627796
DDRMAA0
48 43 41
130
37 32
125
29
122
27 141 118 115 103
59
52 113
157 158
71 163
97 107 119 129 149 159 169 177 140
63
65 154
21 111
16
17 137 138
76
75
14
25
36
56
67
78
86
47
91
92 181
182 183
82 184
10 101 102 173 167
5
1
9
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13
BA0 BA1 BA2
CS0 CS1 NC/CS2 NC/CS3
DQM0 DQM1 DQM2 DQM3 DQM4 DQM5 DQM6 DQM7 DQM8
WE CAS RAS
CKE0 CKE1
CK0/DNU CK0/DNU CK1 CK1 CK2/DNU CK2/DNU
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8
SDA SCL
SA0 SA1 SA2
VREF VDDID VDDSPD
NC NC NC NC NC NC/FETEN
D D
C C
B B
DDRMAA1 DDRMAA2 DDRMAA3 DDRMAA4 DDRMAA5 DDRMAA6 DDRMAA7 DDRMAA8 DDRMAA9 DDRMAA10 DDRMAA11 DDRMAA12
DDRBS0 DDRBS1
DDRCS#2
DDRCS#3
DDRWEA# DDRCASA# DDRRASA#
DDRCKE2 DDRCKE3
DCLK49,17
DCLK#49,17
DCLK39,17
DCLK#39,17
DCLK59,17
DCLK#59,17
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8
SMBDATA SMBCLK
VCC3
DIMMREF
VCC3
104
112
128
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
GND
GND
GND
GND
GND
GND
3111826344250586674818993
136
VDDQ
GND
VDDQ
GND
143
156
VDDQ
GND
164
VDDQ
GND
VDDQ
GND
172
180738467085108
VDD
VDD
VDD
VDDQ
VDDQ
GND
GND
GND
GND
GND
GND
100
116
124
132
139
DDRBS017,18 DDRBS117,18
VCC3
VCC_DIMM
VDD
GND
DIMM1
120
148
168
VDD
VDD
VDD
VDD
VDD
GND
GND
GND
GND
145
152
160
176
DIMM184
CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7
DDRMD0
2
D0
DDRMD1
4
D1
DDRMD2
6
D2
DDRMD3
8
D3
DDRMD4
94
D4
DDRMD5
95
D5
DDRMD6
98
D6
DDRMD7
99
D7
DDRMD8
12
D8
DDRMD9
13
D9
DDRMD10
19
D10
DDRMD11
20
D11
DDRMD12
105
D12
DDRMD13
106
D13
DDRMD14
109
D14
DDRMD15
110
D15
DDRMD16
23
D16
DDRMD17
24
D17
DDRMD18
28
D18
DDRMD19
31
D19
DDRMD20
114
D20
DDRMD21
117
D21
DDRMD22
121
D22
DDRMD23
123
D23
DDRMD24
33
D24
DDRMD25
35
D25
DDRMD26
39
D26
DDRMD27
40
D27
DDRMD28
126
D28
DDRMD29
127
D29
DDRMD30
131
D30
DDRMD31
133
D31
DDRMD32
53
D32
DDRMD33
55
D33
DDRMD34
57
D34
DDRMD35
60
D35
DDRMD36
146
D36
DDRMD37
147
D37
DDRMD38
150
D38
DDRMD39
151
D39
DDRMD40
61
D40
DDRMD41
64
D41
DDRMD42
68
D42
DDRMD43
69
D43
DDRMD44
153
D44
DDRMD45
155
D45
DDRMD46
161
D46
DDRMD47
162
D47
DDRMD48
72
D48
DDRMD49
73
D49
DDRMD50
79
D50
DDRMD51
80
D51
DDRMD52
165
D52
DDRMD53
166
D53
DDRMD54
170
D54
DDRMD55
171
D55
DDRMD56
83
D56
DDRMD57
84
D57
DDRMD58
87
D58
DDRMD59
88
D59
DDRMD60
174
D60
DDRMD61
175
D61
DDRMD62
178
D62
DDRMD63
179
D63
DDRCB0
44
DDRCB1
45
DDRCB2
49
DDRCB3
51
DDRCB4
134
DDRCB5
135
DDRCB6
142
DDRCB7
144
WP
90
WP
15223054627796
DDRMAA0 DDRMAA1 DDRMAA2 DDRMAA3 DDRMAA4 DDRMAA5 DDRMAA6 DDRMAA7 DDRMAA8 DDRMAA9 DDRMAA10 DDRMAA11 DDRMAA12
DDRBS0 DDRBS1
DDRWEA# DDRCASA# DDRRASA#
DDRCKE0 DDRCKE1
DCLK19,17
DCLK#19,17
DCLK09,17
DCLK#09,17
DCLK29,17
DCLK#29,17
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8
SMBDATA SMBCLK
DIMMREF
DDRCS#0 DDRCS#1
48 43 41
130
37 32
125
29
122
27 141 118 115 103
59
52 113
157 158
71 163
97 107 119 129 149 159 169 177 140
63
65 154
21 111
16
17 137 138
76
75
14
25
36
56
67
78
86
47
91
92 181
182 183
82 184
10 101 102 173 167
5
1
9
VDDQ
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13
BA0 BA1 BA2
CS0 CS1 NC/CS2 NC/CS3
DQM0 DQM1 DQM2 DQM3 DQM4 DQM5 DQM6 DQM7 DQM8
WE CAS RAS
CKE0 CKE1
CK0/DNU CK0/DNU CK1 CK1 CK2/DNU CK2/DNU
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8
SDA SCL
SA0 SA1 SA2
VREF VDDID VDDSPD
NC NC NC NC NC NC/FETEN
104
112
128
136
143
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
GND
GND
GND
GND
GND
GND
GND
GND
GND
3111826344250586674818993
156
164
172
180738467085108
VDDQ
VDDQ
VDDQ
VDDQ
GND
GND
GND
GND
VDD
VDD
VDD
GND
GND
GND
GND
100
116
124
132
139
Address = A0
VCC_DIMM VCC_DIMM
+
CT28
A A
1500UF/6.3V-P CB79 104P CB83 104P CB56 100P CB65 105P CB74 105P CB43 100P
CB109 104P CB80 104P CB31 105P CB112 105P CB57 100P CB75 100P
5
DECOUPLING CAPACITORS
VCC_DIMM
VCC3
4
CB37 X_104P C34 X_104P CB110 104P CB82 104P
CB200 104P C67 CB40
C165 104P CB199 104P
104P 104P
VCC3
VCC5
VCC5
R742 150
DIMMREF
DIMMREF
C240
R743 150
3
104P
C241 104P
place near DIMM1
Micro-Star
Document Number
Last Revision Date:
2
Tuesday, October 30, 2001
Title
MS-6552
DDR DIMM 1 & 2
Sheet of
16 35
1
Rev
0A
Page 17
5
DDR DAMPING
4
3
2
1
DDRMD0
D D
C C
B B
A A
DDRMD4 DDRMD5 DDRMD1 DDRMD6 DDRMD3 DDRMD2 DDRMD7 DDRMD8 DDRMD9 DDRMD12 DDRMD13 DDRMD14 DDRMD15 DDRMD10 DDRMD11 DDRMD20 DDRMD16 DDRMD17 DDRMD21 DDRMD18 DDRMD22 DDRMD19 DDRMD23 DDRMD24 DDRMD28 DDRMD25 DDRMD29 DDRMD26 DDRMD30 DDRMD27 DDRMD31 DDRMD36
DDRMD37 DDRMD33 DDRMD34 DDRMD38 DDRMD39 DDRMD35 DDRMD44 DDRMD40 DDRMD45 DDRMD41 DDRMD42 DDRMD46 DDRMD43 DDRMD47 DDRMD54 DDRMD50 DDRMD55 DDRMD51 DDRMD48 DDRMD49 DDRMD52 DDRMD53 DDRMD62 DDRMD58 DDRMD63 DDRMD59 DDRMD60 DDRMD61 DDRMD56 DDRMD57
DDRMD32 MD32
DDRMD[0..63]
DDR DIMM
DDRMAA0 DDRMAA1 DDRMAA2 DDRMAA3
DDRMAA4 DDRMAA5 DDRMAA6 DDRMAA7
DDRMAA8 DDRMAA9 DDRMAA10 DDRMAA11
DDRMAA12
DDRMAA[0..12]
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
R820 33
DDRMD[0..63] 16,18
R753 X_0 R754 X_0 R755 X_0 R757 X_0
R759 X_0 R761 X_0 R762 X_0 R764 X_0
R766 X_0 R767 X_0 R768 X_0 R769 X_0
R770 X_0
DDRMAA[0..12] 16,18
5
MD0 MD4 MD5 MD1 MD6 MD3 MD2 MD7 MD8 MD9 MD12 MD13 MD14 MD15 MD10 MD11 MD20 MD16 MD17 MD21 MD18 MD22 MD19 MD23 MD24 MD28 MD25 MD29 MD26 MD30 MD27 MD31 MD36
MD37 MD33 MD34 MD38 MD39 MD35 MD44 MD40 MD45 MD41 MD42 MD46 MD43 MD47 MD54 MD50 MD55 MD51 MD48 MD49 MD52 MD53 MD62 MD58 MD63 MD59 MD60 MD61 MD56 MD57
DDRMA0 DDRMA1 DDRMA2 DDRMA3
DDRMA4 DDRMA5 DDRMA6 DDRMA7
DDRMA8 DDRMA9 DDRMA10 DDRMA11
DDRMA12
RN38 8P4R-33 RN40 8P4R-33 RN41 8P4R-33 RN42 8P4R-33 RN43 8P4R-33 RN45 8P4R-33 RN47 8P4R-33 RN48 8P4R-33 RN49 8P4R-33 RN50 8P4R-33 RN51 8P4R-33 RN52 8P4R-33 RN53 8P4R-33 RN54 8P4R-33 RN55 8P4R-33 RN56 8P4R-33
MD[0..63]
DDRMA[0..12]
CHIPSET
MD[0..63] 9
DDRMA[0..12] 9
DDRCS#0 DDRCS#2 DDRCS#1 DDRCS#3
DDRCS#[0..3]
DDR DIMM
DDRCB2 DDRCB6 DDRCB3 DDRCB7 DDRCB4 DDRCB5 DDRCB0 DDRCB1 CB1
DDRWEA#16,18 DDRCASA#16,18 DDRRASA#16,18
DDRBS016,18 DDRBS116,18
4
1 2 3 4 5 6 7 8
DDRCS#[0..3] 16,18
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
DDRCB[0..7]
DDR DIMM
DQS0
R744 33
DQS1
R745 33
DQS2
R746 33
DQS3
R747 33
DQS4
R748 33
DQS5
R749 33
DQS6
R750 33
DQS7
R751 33
DQS8
R752 33
DQS[0..8]
DDR DIMM
DDRWEA# DDRCASA# DDRRASA#
DDRBS0 DDRBS1
DDR DIMM CHIPSET
RN39 8P4R-10
RN44 8P4R-33
RN46 8P4R-33
DQS[0..8] 16,18
R756 10 R758 10 R760 10 R763 X_0 R765 X_0
CS#0 CS#2 CS#1 CS#3
CB2 CB6 CB3 CB7 CB4 CB5 CB0
DDRCB[0..7] 16,18
SDQS0 SDQS1 SDQS2 SDQS3 SDQS4 SDQS5 SDQS6 SDQS7 SDQS8
WEA# CASA# RASA# BS0 BS1
CS#[0..3]
Short by trace,resistors TBD
CHIPSET
CHIPSET
CB[0..7]
CHIPSET
SDQS[0..8]
WEA# 9 CASA# 9 RASA# 9 BS0 9 BS1 9
3
CS#[0..3] 9
CB[0..7] 9
SDQS[0..8] 9
C254
X_10P C256
X_10P C258
X_10P C260
X_10P C262
X_10P C264
X_10P
VCC_DIMM
C242 104P
C244 104P
C246 104P
C248 104P
C250 104P
C252 104P
DCLK0
CLOSE TO DIMM
DCLK0 9,16
DCLK1
DCLK1 9,16
DCLK2
DCLK2 9,16 DCLK#2 9,16
DCLK3
DCLK3 9,16
DCLK4
DCLK4 9,16
DCLK5
DCLK5 9,16
C255
X_10P C257
X_10P C259
X_10P C261
X_10P C263
X_10P C265
X_10P
DCLK#0
DCLK#1
DCLK#2
DCLK#3
DCLK#4
DCLK#5
Title
Micro-Star
Document Number
Last Revision Date:
2
Tuesday, October 30, 2001
DCLK#0 9,16
DCLK#1 9,16
DCLK#3 9,16
DCLK#4 9,16
DCLK#5 9,16
MS-6552
DDR DAMPING
Sheet of
1
Rev
0A
17 35
Page 18
DDR TERMINATION
5
4
3
2
1
DDR POWER
DDR_VTT
DDR_VTT
VCC_DIMM
DDRMD3 DDRMD7 DDRMD2 DDRMD6
D D
DDRMD1 DDRMD5 DDRMD4 DDRMD0 DDRMD13 DDRMD12 DDRMD9 DDRMD8 DDRMD11 DDRMD10 DDRMD15 DDRMD14 DDRMD21 DDRMD17 DDRMD16 DDRMD20 DDRMD23 DDRMD19 DDRMD22 DDRMD18 DDRMD29 DDRMD25 DDRMD28 DDRMD24 DDRMD31 DDRMD27 DDRMD30 DDRMD26 DDRMD35
C C
DDRMD39 DDRMD38 DDRMD34 DDRMD33 DDRMD37 DDRMD36 DDRMD32 DDRMD41 DDRMD45 DDRMD40 DDRMD44 DDRMD47 DDRMD43 DDRMD46 DDRMD42 DDRMD53 DDRMD49 DDRMD48 DDRMD52 DDRMD51 DDRMD55 DDRMD50 DDRMD54 DDRMD57 DDRMD56 DDRMD61 DDRMD60 DDRMD59
B B
DDRMD63 DDRMD58 DDRMD62
DDRMD[0..63]
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
DDRMD[0..63]
16,17
RN57 8P4R-47
RN58 8P4R-47
RN60 8P4R-47
RN61 8P4R-47
RN62 8P4R-47
RN63 8P4R-47
RN64 8P4R-47
RN65 8P4R-47
RN66 8P4R-47
RN68 8P4R-47
RN70 8P4R-47
RN71 8P4R-47
RN72 8P4R-47
RN74 8P4R-47
RN75 8P4R-47
RN76 8P4R-47
DQS[0..8]
16,17
DDRWEA#16,17 DDRCASA#16,17 DDRRASA#16,17
DDR_VTT
DDRMAA12
R791 56
DDRMAA0
R792 56
DDRMAA10
R793 56
DDRMAA1
R794 56
DDRMAA2
R795 56
DDRMAA3
R796 56
DDRMAA4
R797 56
DDRMAA5
R798 56
DDRMAA6 DDRMAA7
DDRMAA8 DDRMAA9 DDRMAA11
DDRMAA[0..12]
R799 56
1 2 3 4 5 6 7 8
DDRMAA[0..12] 16,17
5
RN79 8P4R-56
A A
DDRBS016,17 DDRBS116,17
DDRCS#3 DDRCS#1 DDRCS#2 DDRCS#0
DDRCS#[0..3]
DDRCB7 DDRCB3 DDRCB6 DDRCB2
DDRCB1 DDRCB0 DDRCB5 DDRCB4
DDRCB[0..7]
DDRCKE0 DDRCKE2 DDRCKE1 DDRCKE3
DDRCKE[0..3]
DDRBS0 DDRBS1
DQS5 DQS4 DQS8 DQS3 DQS2 DQS1 DQS0 DQS7 DQS6
DDRWEA# DDRCASA# DDRRASA#
R771 56 R772 56
R814 47 R817 47 R773 47 R775 47 R776 47 R777 47 R778 47 R780 47 R781 47
RN80 8P4R-47
1 2 3 4 5 6 7 8
DDRCS#[0..3] 16,17
RN67 8P4R-47
1 2 3 4 5 6 7 8
RN69 8P4R-47
1 2 3 4 5 6 7 8
DDRCB[0..7] 16,17
RN73 8P4R-47
1 2 3 4 5 6 7 8
DDRCKE[0..3] 9,16
R788 56 R789 56 R790 56
4
R809
R810
X_0/0805
VREF2_523,24
VCC5_STR
VCC_DIMM
0/0805
R774
R779
C266 104P
10K
10
10K
U52C
+
8
9
-
LMV324
11 4
DS
G
Q62
AP9916H
C267
+
106P/1206
+
C268
1000U/6.3V-TEAPO
DDR_VTT
R784
3
R785
10K
R786
10K
R787
200
DDR_VTT
C271 106P/1206 C275 104P C279 104P C287 104P C291 104P C295 104P C299 104P C303 104P C307 X_104P C311 104P
4.7
VCC5_STR
U52D
14
LMV324
1000U/6.3V-TEAPO
12
+
13
-
11 4
DDR_VTT DDR_VTT DDR_VTT DDR_VTT
C272 X_106P/1206 C276 X_104P C280 X_104P C284 X_104P C288 104P C292 104P C296 104P C300 X_104P C304 104P C308 104P C312 104P
2
1000U/6.3V-TEAPO
C269
+
C270
+
C273 X_106P/1206 C281 104P C285 104P C289 104P C293 X_104P C297 104P C301 104P C305 X_104P C309 104P C313 X_104P
Micro-Star
Document Number
Last Revision Date:
Wednesday, October 31, 2001
DS
Q63
G
AP9916H
C274 X_106P/1206 C278 104P C282 104P C286 X_104P C290 104P C294 104P C298 104P C302 104P C306 104P C310 X_104P
C316 106P/1206 C317 104P C318 104P C319 104P C320 104P C321 104P C322 X_104P C324 104P C325 X_104P C326 104P
C314 104P
Title
MS-6552
Rev
0A
DDR TERMINATION & POWER
Sheet of
18 35
1
Page 19
8
7
6
5
4
3
2
1
AGP SIGNAL REFERENCE CIRCUIT
+
C116 X_470p
R183 X_82
R182 X_82
C110 X_470p
GIRDY# GFRAME# GTRDY# GDEVSEL#
GSTOP# GPERR# GPAR GSERR# GREQ#
R199 6.8K
GGNT#
R198 6.8K
ST1 ST2
ST0 ST1
FOR DDR STRAPS
CT30 1000U/6.3V-TEAPO CB139 104P CB131 103P CB135 104P
8 6 4 2
8 6 4 2
R184 6.8K R194 6.8K
R193 2K R811 X_2K
AGP UNIVERSAL 2X/4X SLOT(AGP VER:2.0 COMPLY)
D D
INTB#10,20
AGPCLK5
GREQ#9 GGNT# 9
ST29
RBF#9
SBA09 SBA29
C C
B B
A A
SB_STB9
SBA49 SBA69
GAD319 GAD299
GAD279 GAD259
GAD_STB19
GAD239 GAD219
GAD199 GAD179
GC_BE#29
GIRDY#9
GDEVSEL#9
GC_BE#19
GAD149 GAD129
GAD109
GAD89
GAD_STB09
GAD79 GAD59
GAD39 GAD19
AGPREF9
VREF_GC:form the chipset to the graphics controller
VCC5 = 60mils trace / 15 mils space
AGP1
B1
-OVRCNT
VCC5 VCC3
GREQ#
RBF#
SB_STB
VCC3_SB
GAD_STB1
VCC_AGP
GIRDY#
GDEVSEL# GPERR# GSERR#
GAD_STB0
AGPREF
B2 B3 B4 B5 B6 B7 B8
B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B50 B51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 B63 B64 B65 B66
5V 5V USB+ GND
-INTB CLK
-REQ
3.3V ST0 ST2
-RBF GND RESERVED SBA0
3.3V SBA2 SB_STB GND SBA4 SBA6 RSVD/KEY GND/KEY AUX3V/KEY
3.3V/KEY AD31 AD29
3.3V AD27 AD25 GND AD_STB1 AD23 VDDQ AD21 AD19 GND AD17 C/-BE2 VDDQ
-IRDY AUX3V/KEY GND/KEY RSVD/KEY
3.3V/KEY
-DEVSEL VDDQ
-PERR GND
-SERR C/-BE1 VDDQ AD14 AD12 GND AD10 AD8 VDDQ AD_STB0 AD7 GND AD5 AD3 VDDQ AD1 VREF_CG
AIMM132AGP
AGP Slot Imax VCC_AGP 8.0A
VCC3 6.0A VCC12 1.0A VCC5 2.0A
-TYPEDET
RESERVED
USB-
GND
-INTA
-RST
-GNT
3.3V ST1
RESERVED
-PIPE GND
-WBF
SBA1
3.3V
SBA3
-SB_STB GND
SBA5 SBA7
RSVD/KEY
GND/KEY
RSVD/KEY
3.3V/KEY AD30 AD28
3.3V AD26 AD24
GND
-AD_STB1 C/-BE3
VDDQ
AD22 AD20
GND AD18 AD16
VDDQ
-FRAME
RSVD/KEY
GND/KEY
RSVD/KEY
3.3V/KEY
-TRDY
-STOP
-PME GND
PAR
AD15
VDDQ
AD13 AD11
GND
AD9
C/-BE0
VDDQ
-AD_STB0 AD6
GND
AD4 AD2
VDDQ
AD0
VREF_GC
A1
12V
+12V
A2 A3 A4 A5 A6 A7
GGNT#
A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66
VCC3
PIPE# WBF#
SB_STB#
GAD_STB#1
VCC_AGP
GFRAME#
GTRDY# GSTOP#
GPAR
GAD_STB#0
VREF_GC
VREF_GC:form the graphics controller to the chipset
TYPEDET
INTA# 10,20 PCIRST#2 5,20
ST1 9ST09 PIPE# 9 WBF# 9
SBA1 9 SBA3 9
SB_STB# 9 SBA5 9
SBA7 9
GAD30 9 GAD28 9
GAD26 9 GAD24 9
GAD_STB#1 9 GC_BE#3 9
GAD22 9 GAD20 9
GAD18 9 GAD16 9
GFRAME# 9
GTRDY# 9 GSTOP# 9 PME# 10,20,27
GPAR 9 GAD15 9
GAD13 9 GAD11 9
GAD9 9 GC_BE#0 9
GAD_STB#0 9 GAD6 9
GAD4 9 GAD2 9
GAD0 9
VCC_AGP
INTA# INTB#
8
7
6
5
4
VCC_AGP
R201 1KST
R181 1KST
C111 105P
AGPREF: 10uA
AGPREF
CB122 104P
NEAR AGP SLOT
AGP TERMINATION RESISTORS
X_8P4R-6.8K RN15
RN168P4R-6.8K
7 5 3 1
7 5 3 1
VCC_AGP
PIPE# RBF# WBF#
GAD_STB0 GAD_STB1 SB_STB
GAD_STB#1 GAD_STB#0 SB_STB#
LESS 10MILS STUB TRACE LENGTH MUST BE FOLLOWING.
Place these resistors between PCI and AGP slot
AGP SLOT DECOUPLING CAPACITORS
CB130 100P CB125 104P CB136 104P CB127 104P CB138 105P
+12V
CB132 104P
CB137 104P
Micro-Star
Document Number
Last Revision Date:
3
Tuesday, October 30, 2001
X_104PC115
C114 X_105P
R180 X_6.8K R179 X_6.8K R185 X_6.8K
R213 X_6.8K R192 X_6.8K R204 X_6.8K
R195 X_6.8K R212 X_6.8K R200 X_6.8K
VCC5VCC3_SB
+
2
Title
CT39 X_470U/16V CB207 104P CB196 100P
MS-6552
AGP Slot
VREF_GC
VCC_AGP
VCC_AGP
VCC3VCC_AGP
Sheet of
+
+
1
CT31 1000U/6.3V-TEAPO CB128 104P CB123 104P CB124 104P CB129 104P CB1 100P
CT33 X_1000U/6.3V-TEAPO
Rev
0A
19 35
Page 20
8
7
6
5
4
3
2
1
PCI SLOT 1 (PCI VER: 2.2 COMPLY) PCI SLOT 2 (PCI VER: 2.2 COMPLY)
REQ#3 REQ#5PREQ#5
SIRQ
VCC3
-12V B1
B2 B3 B4 B5 B6 B7 B8 B9
B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49
B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62
PCI2
-12V TCK GND TDO +5V +5V INTB# INTD# PRSNT#1 RESERVED PRSNT#2 GND GND RESERVED GND CLK GND REQ# +5V(I/O) AD31 AD29 GND AD27 AD25 +3.3V C/BE#3 AD23 GND AD21 AD19 +3.3V AD17 C/BE#2 GND IRDY# +3.3V DEVSEL# GND LOCK# PERR# +3.3V SERR# +3.3V C/BE#1 AD14 GND AD12 AD10 GND
AD8 AD7 +3.3V AD5 AD3 GND AD1 +5V(I/O) ACK64# +5V +5V
PCISLOT
TRST#
+12V
TMS
+5V INTA# INTC#
+5V
RESERVED
+5V(I/O)
RESERVED
GND GND
RESERVED
RST#
+5V(I/O)
GNT#
GND
RESERVED
AD30
+3.3V
AD28 AD26
GND
AD24
IDSEL
+3.3 AD22 AD20
GND AD18 AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
PAR
AD15
+3.3V
AD13 AD11
GND
AD9
C/BE#0
+3.3V
AD6 AD4
GND
AD2 AD0
+5V(I/O)
REQ64#
+5V +5V
+12V
A1 A2 A3 A4
TDI
A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49
A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62
PTRST# PTMS
PTDI
VCC5
INTB# INTD#
R292
GNT#3 GNT#5 PGNT#5
VCC3
X_0 X_0
VCC3_SB
PCIRST#2
PGNT#1 10
PME# AD30
AD28 AD26
AD24
AD22 AD20
AD18 AD16
FRAME# TRDY# STOP# SM_LNK0
SM_LNK1 PAR
AD15 AD13
AD11 AD9
C_BE#0 AD6
AD4 AD2
AD0 REQ#64
PGNT#3
AD17 AD18
-12V PCI1
B1 B2 B3 B4 B5 B6 B7 B8
B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49
B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62
-12V TCK GND TDO +5V +5V INTB# INTD# PRSNT#1 RESERVED PRSNT#2 GND GND RESERVED GND CLK GND REQ# +5V(I/O) AD31 AD29 GND AD27 AD25 +3.3V C/BE#3 AD23 GND AD21 AD19 +3.3V AD17 C/BE#2 GND IRDY# +3.3V DEVSEL# GND LOCK# PERR# +3.3V SERR# +3.3V C/BE#1 AD14 GND AD12 AD10 GND
AD8 AD7 +3.3V AD5 AD3 GND AD1 +5V(I/O) ACK64# +5V +5V
PCISLOT
PTCK
D D
C C
B B
VCC5 VCC5
INTB#10,19
INTD#10
REQ#3 REQ#5
VCC3
SIRQ
PCICLK05
PREQ#010
AD3110,27 AD2910,27
AD2710,27 AD2510,27
C_BE#310,27
AD2310,27 AD2110,27
AD1910,27 AD1710,27
C_BE#210,27
IRDY#10,27
DEVSEL#10,27
PLOCK#10
PERR#10,27 SERR#10,27
C_BE#110,27
AD1410,27 AD1210,27
AD1010,27
AD810,27 AD710,27
AD510,27 AD310,27
AD110,27
ACK#64
TRST#
RESERVED
+5V(I/O)
RESERVED
RESERVED
+5V(I/O)
RESERVED
FRAME#
STOP#
SDONE
C/BE#0
+5V(I/O)
REQ64#
+12V
TMS
+5V INTA# INTC#
+5V
GND GND
RST#
GNT#
GND
AD30
+3.3V
AD28 AD26
GND
AD24
IDSEL
+3.3 AD22 AD20
GND AD18 AD16
+3.3V
GND
TRDY#
GND
+3.3V
SBO#
GND
PAR
AD15
+3.3V
AD13 AD11
GND
AD9
+3.3V
AD6 AD4
GND
AD2 AD0
+5V +5V
+12V
PTRST#
A1 A2
PTMS
A3
PTDI
A4
TDI
A5
VCC5
A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49
A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62
INTA# 10,19 INTC# 10,27
GNT#3 GNT#5 REQ#5
VCC3
VCC3_SB
PCIRST#2 5,19 PGNT#0 10 PME# 10,19,27
AD30 10,27 AD28 10,27
AD26 10,27 AD24 10,27
R267 100
AD22 10,27 AD20 10,27
AD18 10,27 AD16 10,27
FRAME# 10,27 TRDY# 10,27 STOP# 10,27 SM_LNK0 11
SM_LNK1 11 PAR 10,27
AD15 10,27 AD13 10,27
AD11 10,27 AD9 10,27
C_BE#0 10,27 AD6 10,27
AD4 10,27 AD2 10,27
AD0 10,27
REQ#64
PREQ#3
SERIRQ10,12
AD16
PTCK
INTC# INTA#
R399 X_0 R268
R347 X_0
R237 X_0
PCICLK15
PREQ#110
AD31 AD29
AD27 AD25
C_BE#3 AD23
AD21 AD19
AD17 C_BE#2
IRDY# DEVSEL# PLOCK#
PERR# SERR# C_BE#1
AD14 AD12
AD10
AD8 AD7
AD5 AD3
AD1 ACK#64
PCI SLOT 3 (PCI VER: 2.2 COMPLY)
-12V PCI3
B1
PTCK
INTD# INTB#
REQ#3
SIRQ
PCICLK25
PREQ#210
AD31 AD29
AD27 AD25
C_BE#3 AD23
AD21 AD19
AD17 C_BE#2
IRDY# DEVSEL# PLOCK#
PERR# SERR# C_BE#1
AD14 AD12
AD10
AD8 AD7
AD5 AD3
AD1 ACK#64
VCC5
VCC3
B2 B3 B4 B5 B6 B7 B8
B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49
B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62
-12V TCK GND TDO +5V +5V INTB# INTD# PRSNT#1 RESERVED PRSNT#2 GND GND RESERVED GND CLK GND REQ# +5V(I/O) AD31 AD29 GND AD27 AD25 +3.3V C/BE#3 AD23 GND AD21 AD19 +3.3V AD17 C/BE#2 GND IRDY# +3.3V DEVSEL# GND LOCK# PERR# +3.3V SERR# +3.3V C/BE#1 AD14 GND AD12 AD10 GND
AD8 AD7 +3.3V AD5 AD3 GND AD1 +5V(I/O) ACK64# +5V +5V
PCISLOT
RESERVED RESERVED
RESERVED
RESERVED
TRST#
+12V
TMS
+5V INTA# INTC#
+5V
+5V(I/O)
GND GND
RST#
+5V(I/O)
GNT#
GND
AD30
+3.3V
AD28 AD26
GND
AD24
IDSEL
+3.3 AD22 AD20
GND AD18 AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
PAR
AD15
+3.3V
AD13 AD11
GND
AD9
C/BE#0
+3.3V
AD6 AD4
GND
AD2 AD0
+5V(I/O)
REQ64#
+5V +5V
+12V
VCC5
VCC3
PTRST# PTMS
PTDI
INTC# INTA#
GNT#3 GNT#5
VCC3_SB
PCIRST#2
PGNT#2 10
PME# AD30
AD28 AD26
AD24 R373 100R346 100
AD22 AD20
AD18 AD16
FRAME# TRDY# STOP# SM_LNK0
SM_LNK1 PAR
AD15 AD13
AD11 AD9
C_BE#0 AD6
AD4 AD2
AD0 REQ#64
A1 A2 A3 A4
TDI
A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49
A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62
IDSEL = AD16 IDSEL = AD17
IDSEL = AD18 MASTER = PREQ2MASTER = PREQ1MASTER = PREQ0
INTA# INTB# INTC#
RN20 8P4R-2.7K
FRAME#
PREQ#0 PREQ#2 PREQ#1 PREQ#3 PREQ#5 PREQ#4
1 2 3 4 5 6 7 8
RN21
8P4R-2.7K 1 2 3 4 5 6 7 8
RN22
1
1
2
2
3
3
4
4
6
6
7
7
8
8
9
9510
10P8R-2.7K
5
10
IRDY# TRDY# DEVSEL#
STOP# PLOCK# PERR# SERR#
VCC5
7
VCC5
A A
PREQ#310 PREQ#510 PREQ#410,27
8
PCI PULL-UP / DOWN RESISTORS
1 2 3 4 6 7 8 9
R343 4.7K R344 4.7K
R265 4.7K R266 4.7K
R264 4.7K R352 4.7K
6
RN19
5
1 2 3 4 6 7 8
10
9510
X_10P8R-2.7K
VCC5
PGNT#2 PGNT#1 PGNT#3
PGNT#310
PGNT#0 PGNT#4
PGNT#410,27
PGNT#5
PGNT#510
REQ#64 ACK#64
PTMS PTDI
PTCK PTRST#
RN18 8P4R-8.2K
INTA#
1 2
INTD#
3 4
INTC#
5 6
INTB#
7 8
RN23
8P4R-8.2K INTF# INTE# INTG# INTH#
1 2 3 4 5 6 7 8
INTF#11,27
INTE#11 INTG#11 INTH#11
5
VCC3VCC3
VCC3
4
VCC5
+
PCI SLOT DECOUPLING CAPACITORS
-12V
CB189
104P
CT37 470U/16V CB188 104P CB162 104P CB187 100P CB173 100P
VCC3
+
CT38 1000U/6.3V-TEAPO CB198 104P CB197 104P CB174 104P CB175 100P CB176 100P
Micro-Star
Document Number
Last Revision Date:
3
Tuesday, October 30, 2001
+12V VCC3_SB
CB172 104P
Title
2
MS-6552
PCI Slot 1 & 2 & 3
Sheet of
C182
104P
20 35
1
Rev
0A
Page 21
5
4
3
2
1
YPC20
VCC3
CB66
104P
D D
VCC5_SB
TYPEDET
R350 4.7K
PSON#12
R822 X_4.7K
R823 X_4.7K Q65
R824 X_4.7K
R821 0
X_2N3904S
VCC3_SB
Q64 X_2N7002S
Lo=4X,Hi=2X
33P
VCC5_SBVCC3_SB
13 12
U21F 7407S (VCC5_SB)
-12V CB64
104P
R74 4.7K
C54
X_102P
VCC5
CB53 104P
CT12
ELS47U/16V-C
11
3.3V
12
CB26 33P
13 14 15 16 17 18 19 20
-12V GND PSON GND GND GND
-5V 5V 5V
POWER
D3
X_SM5817S
CB62 X_33P
-5V
+
VCC5 VCC5_SB
Brookdale FRONT PANEL-M
D17 1N4148S
PD_LED5
D18 1N4148S
SD_LED5
1
330
2
HDD+
3 4 5 6 7 8
9
R432 100
PIN3:YELLOW
C180 470P
F_P1
KEYLOCK
GNDK
NC NC
HDD+
SPEAKER
GNDL SLED2 PLED1 PWSW+ PWSW-
NC
MSI-JFP
LEGEND
HDD-
BUZ+
BUZ-
VCCSPK
RESET
GNDR
C C
MSI
RN77 1 3
SUS_LED
5
PLED2
7
X_8P4R-0
RN78
PLED2
7
PLED1
5 3 1
8P4R-0
R372 330
B B
VCC5
2 4 6 8
8 6 4 2
R433
PWRSW
VCC5_SB
PIN5:GREEN PIN6:+
IDE_LED
10
KBLOCK# 12
11
IDE_LED
12 13 14 15 16 17 18
SPK
CB192
104P
SPK2
FP_RST#
R341 0
S0:GREEN S1:GREEN BLINKING S3:YELLOW
VCC5
FP_RST# 5
3.3V
3.3V
GND
GND
GND POK
5VSB
5V
5V
12V
X_102P
1 2 3 4 5 6 7 8 9 10
C38
ELS47U/16V-C
+
CT16
CB59 104P
CB30 X_33P
PWR_LED12
CB70 X_33PCB68
CB15 104P
(VCC5_SB)
11 10
CB10 39P
CB28 104P
SUS_LED12
VCC3
CB67 105P/0805
VCC5
CB23 33P
U21E 7407S
+
CT6
ELS10U/16V-B
SUS_LED
CB16 X_39P
FP_RST#
R426 1K
VCC_DIMM
R395 330
R393 1K
VCC5_SB +12V
R423
4.7K
VCC3
2N3904S
R368
4.7K R369 33
VCC5VCC5
R425 X_330
Q49
PLED1
PLED2
Q46 2N3904S
C207 104P
U20B 74LC14-3.3
3 4
VCC5_SB
R394 X_330
(VCC3_SB)
VCC_DIMM
U20C 74LC14-3.3 5 6
For Legend overlay with JGL1
R723 330
PLED1 PLED2
1 2 3
JGLED1 YJ103
LEGEND DUAL +
1 2 3
-
JGL1
-
X_YJ103
S0:STEADY GREEN S1:GREEN BLINKING S3:STEADY YELLOW S4/S5:OFF
ATX CONNECTOR
GREEN
YELLOW
PWR_GD 11
LEGEND POWER SWITCH
VCC5_SB
C233 104P
PWRSW
3 2 1
PWRSW1 LPWRCON
EXTSMI#
EXTSMI#11
3
R332 4.7K
U20E 74LC14-3.3
11 10
C183
105P
A A
ALARM12
R319 2.2K
SPKR11
SPEAKER
5
R328 220 R335 220
Q37 2N3904S
D16 1N4148S C178 104P
SPK
VCC5
SPK2
BZ1
BUZZER
4
PWRSW
PWRSW23
R353 22
POWER BUTTON
VCC5_SB
PWRBTIN# 12
Micro-Star
Title
Document Number
Last Revision Date:
2
Tuesday, October 30, 2001
1
1
2
2
JGS1 YJ102
MS-6552
Front Panel & Connector
Sheet of
21 35
1
Rev
0A
Page 22
E
D
C
B
A
BACK PANEL USB CONNECTOR FOR USB PORT 0,1
RN27
7
USBP0+11
USBP0-11
4 4
USBP1-11
USBP1+11
NEAR CHIPSET LESS THAN 1 INCH NEAR USB CONNECTOR
8 6 4 2
8P4R-15
5 3 1
246
8
135
7
RN30 8P4R-15K
FB9 60S FB10 60S
FB7 60S FB8 60S
C23
C20
22P
22P
C27 22P
SVCC0 SBD0­SBD0+ GNDA SVCC0 SBD1­SBD1+ GNDA
C24 22P
LAN_USB1A 5 6 7 8 1 2 3 4
USBLAN
UP
DOWN
21 22 23 24 25 26 27 28
FRONT PANEL USB CONNECTOR FOR USB PORT 2,3
CNR_USBP2-15 CNR_USBP2+15
3 3
USBP2-11 USBP2+11 USBP3+11
USBP3-11
R716 X_0
X_0
R717
RN26
1
2
3
4
5
6
7
8
8P4R-15
NEAR CHIPSET LESS THAN 1 INCH
246
8
RN29 8P4R-15K
135
7
NEAR USB CONNECTOR
FB23 60S FB24 60S
FB26 60S FB25 60S
C224
C225
22P
22P
SVCC1
1 2
SBD2-
3 4
SBD2+ SBD3+
5 7 8 9
USB2X5-4
SBD3­SBD3+
C222
C223
22P
22P Q34
USB1
6
SBD3­SVCC1
10
SBD2+ SBD2-
POWER CIRCUIT FOR USB PORT 0,1
CPU FAN
R57 2.2K
R56 10K
DS
CPU_CTRL12
R54 510
Q6
G
2N7002S
SYSTEM FAN
R313 2.2K
PWM
R299 10K
DS
R262 510
SYS_CTRL12
G
ATX PSU FAN ON/OFF CONTROL
2N7002S
+12V
+
+12V
Q10 SI2303
CFAN
+
D2 1N4148S R23 4.7K
C28 ELS47U/16V-C
D15 1N4148S R312 4.7K
Q35 2PB710S
SFAN
C155 ELS47U/16V-C
R35 27K
3 2 1
R298 27K
3 2 1
C_FAN1 YJ103-BO
S_FAN1 YJ103-BO
CPU_FAN 12
R30 10K
SYS_FAN 12
R278 10K
2 2
FS2
C2 470P
1.1A-P
OC#011
C25 104P
VCC5_STR
POWER CIRCUIT FOR USB PORT 2, 3
1 1
VCC5_STR
C214 470P
OC#111
CNR_OC#115
R718 X_0
X_COPPER
CP3
FB6 X_80S/0603
R55 470K
R330 560K
NEAR USB CONNECTOR
FS4
1.1A-P
R380 470K
C196 104P
E
R381 560K
SVCC0
+
C15
CT2
105P
1000U/6.3V-TEAPO
X_COPPER
CP5
FB21 X_80S/0603
NEAR USB CONNECTOR
C228 105P
R36 47K
SVCC1
+
CT43
1000U/6.3V-TEAPO
R427 47K
+12V
D7 1N4148S R90 4.7K
Q18 2PB710S
PFAN
CT22
+
ELS47U/16V-C
PWM
R96 X_2.2K
R95 10K
Micro-Star
Document Number
Last Revision Date:
D
C
B
Tuesday, October 30, 2001
R87 27K
3 2 1
Title
MS-6552
USB & FAN Connectors
A
PSU_FAN 12
R88 10K
P_FAN1 YJ103-BO
Sheet of
22 35
Rev
0A
Page 23
6 CHANNEL CONTROLLER
AD1881A S/W CODEC COMPONENTS LIST:
R217:0ohm C160,R238,C163,R249,U16,C133,R382,R379:X
SROUT_R13
LIN_IN_R13
SROUT_L13
LIN_IN_L13
VCC_VID / VID_GOOD
VCC3
VCC5_SB
R812
X_220/0805
R50 220/0805
1
VR1
SC431-2.5V
3 2
C22 X_102P
1.1KST
VCC3_SB
R49 2K
R51
1V
R37 1KST
SROUT_R
LIN_IN_R
SROUT_L
LIN_IN_L
VREF2_5 18,24
R53 1KST
C173
1 2
X_105P/0805
1 2 R303 X_47K
R294 33K 1 2
C172
1 2
X_105P/0805
1 2 R311 X_4.7K
R320
1 2
33K
+12V VCC3
3
+
2
-
4 8
U4A LM358
+12V
5
+
6
-
4 8
U4B LM358
1
7
CB4 104P
R291
1 2
33K
R310
1 2
33K
D1 X_1N4148S
R33
4.99K
SROR INR
SROL INL
R726
1.5K
105P
C11
R286 X_0 R276 0
R275 X_0 R287 0
CB13 106P/1206
VCC5_SB
R48 1K
-12V
Q12 2N7002S
Q5 2N7002S
LINE_R
LINE_L
R382
R379
2.7K
2.2K
LINE_R 13,14
LINE_L 13,14
-5VR
VCC_VID 7
1.2V/0.1A
VID_GD 25
VCCP
R732
X_62
R733
X_62
R729
X_1K
Q60 X_2N3904S
VCC3_SB
R730
X_10K
X_2N3904S Q59
X_2N3904S
THERMTRIP# 6
VCC5_SB
PWRSW 21
R731
X_1K
R734 X_1KQ58
Micro-Star
Document Number
Last Revision Date:
+12V
R727
X_3.3K
R728
X_1K
U50A
4
14
2 3
D CLK
5
QQPR
VCC
6
CL
GND
X_74AS74
1
7
Title
VID & 6 CHANNEL CONTROL
MS-6552
Sheet of
DIS
Q57 X_2N7002S
DIS 25
Rev
0A
23 35Tuesday, October 30, 2001
Page 24
8
POWER TRANSLATOR
VCC5_SB
D D
C C
VCC5
R107 100
B B
VR2
SC431L
3 2
C73 X_102P
A A
D28 SM5817S
D30
1N5820S
Q68
VCC5
Q69
VCC5
8
R827 X_4.7K
X_2N3904S
STRCTRL
VCC5
VREF2_5 18,23
R105 X_1KST
R828 X_1KST
3 2
5 6
+12V
R104 X_0
R106 1KST
1
X_P3055LD
R836 2.2K
+12V
+
-
4 8
U9A LM358
+12V
+
-
4 8
U9B LM358
7
VCC5_STR & VCC3_SB
S3=0
CB239
105P/0805
VREF2_5
VCC3_SB
R831
4.7K
Q72
2N3904S
VCC5_STR
CB240
104P
R832 2.2K
VCC5_STR
5
+
6
-
11 4
AGP 4X 1.5V POWER TRANSLATOR
VCC3
DS
R813 0/0805
1
C78 104P
7
7
C327
X_102P
R173 1KST
R210 330
G
R174
220
R209
150RST
VCC3
CT46 220UF/10V
+
6
U52B
2N7002S
Q30
15N03
Q31
P3055LD
6
AP9916H
7
LMV324
Q71
VCC_AGP
VCC1_8
Q66
D S
G
R829 1KST
R826 324RST
VCC3_SB
VREF2_5
VCC5_SB
5
VCC3_SB Main Standby VCC5_STR
D27 1N5820S
D29 SM5817S
CT50
470U/16V
R825 1K
Q70
R830 4.7K
2N7002S
R835
3.09KST
5
4
Standby
Standby
0V 0VVCC_DIMM
Standby
VCC_DIMM
Q67
D S
G
AP9916H
U52A
1
LMV324
11 4
SLP_S5#
VCC3
+
R834 1K
S0Power S5S3
Main Main
VCC5_STR
3
+
2
-
1.8V/3.3V SEQUENCE CIRCUIT
VCC3
Q21 2N3906S Ic=200mA Vebo=5V Vceo=40V
R132 200
R134 470
R123 200
Q26
2N3904S
4
3
1.8V STANDBY POWER TRANSLATOR
VCC3_SB
C137 104P
VCCP VCC_AGP
CPU
69.0A NOTE40
PMCH
2.4A NOTE1 ICH2 CY28324 AD1885 FWH -SST W83627HF HIP6301 HIP6602A HIP6601A
DIMM AGP PCI USB USB HUB FAN TTL AMPLIFIER OTHER
NOTE1 --- MCH VCC_AGP
NOTE2 --- DIMM S0 STATE --- 2.0A * 3 = 6.0A ---> VCC3 S1/S3 STATE --- 200mA * 3 = 600mA ---> VCC3_SB VCC3_SB --> 600mA*3.3V/5V=396mA --> VCC5_SB
NOTE3 --- ICH2
1.8V
1.8V_LAN 36mA VCC1_8SB VCC3 VCC3+562ET VCC3_SB
VCC3_SB VCC1_8SB VCC5_SB
0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
= VCC1_5 (1.5A) VCC_AGP (0.37A)+
S0Power S3/S4/S5
300mA 45mA
410mA 230mA 25mA
= = = VCC3_SB VCC1_8SB+
REGULATORS OUTPUT DECOUPLING CAPACITORS
1000U/6.3V-TEAPO
+
VCC3
VCC1_8
VCC5
3
2
(40mils trace / 20 mils space)
R833 X_0/0805
VR3 YLT1087S-0.8A
3 2
VIN VOUT
ADJ
1
C159 104P
R252 432
R259 200
POWER CONSUMPTION
VCC1_8
VCC3_DIMM VCC3 VCC5
0
0
0
0.2A 0 0 0 0 0 0 0 0 0SC1547 0
0 0
0 0
100mA 28mA 30mA 5mA 210mA
0.6mA
CT32 CB155
100P CB87 10P
CB91 104P CB63 105P
S1
VCC5_SB
2.0A 0 0
NOTE3 NOTE3 NOTE3
0 0 0 0 0 0 0 0
NOTE2
0 0
0 0 0 0 00
N/A N/A 7mA N/A N/A N/A
+
CT20 470U/16V CB8 104P
VCC_AGP
+
CT29 X_1000U/6.3V-TEAPO
0 0 0 0 0 0 0 0 0
0 0
0 0 0 0
VCC_DIMMVCC1_8
1000U/6.3V-TEAPO
+
0 0
0 0
0 0
0 0 0
6.0A 1.0A8.0A 2.0A
0 0 0
CT4 CB77
104P CB36 105P
Title
Micro-Star
CB159 104P
Document Number
Last Revision Date:
Wednesday, October 31, 2001
2
1
VCC1_8SB
C147 CT35
C144
104P
VCC5_SB
0
0 0 0 0 0 0 0
NOTE2
?
0 0 0 0
CB18 104P CB2 104P CB19 104P
ELS47U/16V-C
+12V
0 0 0 0
0 0 0 0
0 0 0
0 0 0
100P
0 0
0 0
0 0 0 0 0
VCC5_STR VCC3_SB
MS-6552
Voltage Regulator
Sheet of
24 35
1
-12V
0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0
1000U/6.3V-TEAPO
+
CT41 CB163
104P CB5 104P
Rev
0A
Page 25
5
4
3
2
1
+12V
D D
VID[0..4]6,12
R124 10K
VCC3
VRM_GD11
DIS
C91
X_15P
R126 240K
C C
VCC5
R125 X_15K
C82
X_562P
VID4 VID3 VID2 VID1 VID0 VDC(V)
1 1 1 1 0 1.100 1 1 1 0 1 1.125 1 1 1 0 0 1.150 1 1 0 1 1 1.175 1 1 0 1 0 1.200 1 1 0 0 1 1.225 1 1 0 0 0 1.250 1 0 1 1 1 1.275
B B
1 0 1 1 0 1.300 1 0 1 0 1 1.325 1 0 1 0 0 1.350 1 0 0 1 1 1.375 1 0 0 1 0 1.400 1 0 0 0 1 1.425 1 0 0 0 0 1.450 0 1 1 1 1 1.475
CHOK4 0.8UH/15A
CB88
CB92
33P
104P
VID4 VID3 VID2 VID1 VID0
R127 0
R137 154K
R131 20K
C89 222P
R115
1.47KST
X_100PC86
R121 X_0
U11
1
VID4
2
VID3
3
VID2
4
VID1
5
VID0
19
PGOOD
6
COMP
7
FB
HIP6301
R110 0
VID4 VID3 VID2 VID1 VID0 VDC(V)
0 1 1 1 0 1.500 0 1 1 0 1 1.525 0 1 1 0 0 1.550 0 1 0 1 1 1.575 0 1 0 1 0 1.600 0 1 0 0 1 1.625 0 1 0 0 0 1.650 0 0 1 1 1 1.675 0 0 1 1 0 1.700 0 0 1 0 1 1.725 0 0 1 0 0 1.750 0 0 0 1 1 1.775 0 0 0 1 0 1.800 0 0 0 0 1 1.825 0 0 0 0 0 1.850 1 1 1 1 1 OFF
VCCP
33P
VCC
GND
PWM1
ISEN1
PWM2
ISEN2FS/DIS
PWM3
ISEN3
PWM4
ISEN4
VSEN
CT19 1500U/16V-N
+12V
VCC
20
9 15
16
R116 3K
14
R114 3K
138
11 12
R112 3K
VCC
18 17
10
CT13 X_1500U/16V-N
VCC5
R135 0
C92 105P/0805
R93
10/0805
HIP12V
105P/0805
CB9
105P/0805
CT24 1500U/16V-N
CB71
HIP12V
CB72 105P/0805
+12V
CT27 1500U/16V-N
U8A
14
VCC
3
GND
1
PWM1
HIP6602
U8B
5 9
PVCC U_G2
6
PGND
2
PWM2
HIP6602
R3
10/0805
U1
6
VCC
7
PVCC
4
GND
3
PWM
HIP6601
U_G1
BOOT1
PHASE1
L_G1
BOOT2
PHASE2
L_G2
U_G
BOOT
PHASE
C85
C83
X_475P/0805
X_475P/0805
12 11
C63
13
104P CHOK3 1.1UH/25A C62
102P
4
10
C66
8
104P C51
102P
7
1 2
C16
8
104P C19
102P
5
L_G
C40 105P/0805C84
R102 3/0805
R111 0/0805
C61 105P/0805
R73 3/0805
R84 0/0805
C39 105P/0805
R68 3/0805
R52 0/0805
DS
DS
G
DS
DS
G
DS
G
DS
Q20 15N03G
Q19 FDB6670AL
Q16 15N03G
CHOK2 1.1UH/25A
Q17 FDB6670AL
Q15 15N03
CHOK1 1.1UH/25A
Q13 FDB6670ALG
CT3
2200UF/6.3V-R
CT14 2200UF/6.3V-R
CT5 2200UF/6.3V-R
CT18
1500UF/6.3V-P
CT17 2200UF/6.3V-R
CT25 2200UF/6.3V-R
CT23
1500UF/6.3V-P
CT1 1500UF/6.3V-P
CT8 2200UF/6.3V-R
CT26 2200UF/6.3V-R
ATX12V POWER CONNECTOR
VCCP
PWM GOOD
+12V
DIS
Q27 2N7002S
DIS 23
2
C96 103P
Micro-Star
Document Number
Last Revision Date:
Tuesday, October 30, 2001
VID PULL-UP RESISTORS
A A
HIP6301V DON'T NEED PULL HIGH HIP6301 NEED PULL HIGH
VID0 VID1 VID2 VID3 VID4
1 3 5 7
R136 1K
RN8 8P4R-1K
5
2 4 6 8
680/0805
R805
+12V
R737
680/0805
VR4
ZENER-3.3V-R
VID_GD23
4
3
C94 33P
Title
VRM 9.0
JPW1
3
GND
12V
4
GND
12V
12V-POWER-CON
MS-6552
1
1
2
Sheet of
25 35
Rev
0A
Page 26
8
7
6
5
4
3
2
1
SERIAL PORT 1
D24 1N4148S
VCC5 DSRA
DCDA
D D
RXDA CTSA RIA
RTSA#12
SOUTA12
DTRA#12
U6
20
VCC
2
RIN1
3
RIN2
4
RIN3
7
RIN4
9
RIN5
16
DIN1
15
DIN2
13
DIN3
11
GND
GD75232/SSOP20
ROUT1 ROUT2 ROUT3 ROUT4 ROUT5
DOUT1 DOUT2 DOUT3
V+
V-
V+
1
C47 104PC45 104P 19 18 17 14 12
5 6 8 10
V-
RTSA TXDA DTRA
D25 1N4148S
+12V
DSRA# 12 DCDA# 12 SINA 12 CTSA# 12 RIA# 12
-12V
DSRA DCDA RXDA RTSA
TXDA CTSA DTRA RIA
DCDA RXDA RTSA TXDA DTRA
2 4 6 8
2 4 6 8
CN7B 26 27 28 29 30
YCN25F-001-1
1 3 5 7
1 3 5 7
DSRA
31 32
CTSA
33
RIA
34
CN3 8P4C-220P
CN4 8P4C-220P
RIA RIB
JMDM1 YJ105
5 4 3 2 1
SERIAL PORT 2
C75 104P
C C
B B
VCC5 DCDB
DSRB RXDB CTSB RIB
DTRB#12 RTSB#12
SOUTB12
LP_D[0..7]12
LP_BUSY12
LP_ACK#12
LP_AFD#12
LP_ERR#12
LP_STB#12
LP_SLIN#12
LP_INIT#12
LP_SLCT12
LP_PE12
U10
20
VCC
2
RIN1
3
RIN2
4
RIN3
7
RIN4
9
RIN5
16
DIN1
15
DIN2
13
DIN3
11
GND
GD75232/SSOP20
VCC5
LP_D6 LP_D3 LP_D5 LP_D4 LP_BUSY LP_PE LP_ACK# LP_D7
LP_D0 LP_AFD# LP_ERR# LP_STB# LP_D2 LP_D1 LP_SLIN# LP_INIT#
LP_SLCT
ROUT1 ROUT2 ROUT3 ROUT4 ROUT5
DOUT1 DOUT2 DOUT3
C80 104P
D6 1N4148S
1
1
2
2
3
3
4
4
6
6
7
7
8
8
9510
9510
1
1
2
2
3
3
4
4
6
6
7
7
8
8
9510
9510
R75 2.2K
V+
V-
FLOPPY CONNECTOR
A A
8
1 19 18 17 14 12
5 6 8 10
V-
7
C74 104P
V+
RN3 10P8R-2.2K
RN4 10P8R-2.2K
FDD1
1 2 3 4
7 8
9 10 11 12 13 14 15 16 17 18 19 21 22 23 24 25 26 27 28 29 30 31 32 33 34
YJ217-C-1
DTRB RTSB TXDB
LP_INIT# LP_D1 LP_SLIN# LP_D2
LP_AFD# LP_STB# LP_ERR# LP_D0
LP_D3 LP_D4 LP_D5 LP_D6
LP_D7 LP_ACK# LP_BUSY LP_PE
LP_SLCT
6
20
DCDB# 12 DSRB# 12 SINB 12 CTSB# 12 RIB# 12
1 3 5 7
1 3 5 7
1 3 5 7
1 3 5 7
INDEX#
TRACK0# WP# RDATA#
DSKCHG#
2 4 6 8
2 4 6 8
2 4 6 8
2 4 6 8
33PC55
DRVDEN0 12 DRVDEN1 12
INDEX# 12 MOT_A# 12 DRV_B# 12 DRV_A# 12 MOT_B# 12 DIR# 12 STEP# 12 WT_DT# 12 WT_EN# 12 TRACK0# 12 WP# 12 RDATA# 12 HEAD# 12 DSKCHG# 12
6
DCDB DSRB RXDB DTRB
RTSB CTSB TXDB RIB
DCDB RXDB RTSB TXDB DTRB
PARALLAL PORT
CN8 8P4C-220P
CN9
LP_STB#
8P4C-220P
LP_D0 LP_D1 LP_D2 LP_D3 LP_D4
CN6
LP_D5
8P4C-220P
LP_D6 LP_D7 LP_ACK# LP_BUSY LP_PE
CN5
LP_SLCT
8P4C-220P
2 4 6 8
2 4 6 8
35 36 37 38 39
1 2 3 4 5 6 7 8
9 10 11 12 13
1 3 5 7
1 3 5 7
CN7C
40 41 42 43
YCN25F-001-1
CN7A
14 15 16 17 18 19 20 21 22 23 24 25
YCN25F-001-1
CN11 8P4C-220P
CN12 8P4C-220P
DSRB CTSB
RIB
LP_AFD# LP_ERR# LP_INIT# LP_SLIN#
5
ESD
MODEM RING BLOCK LAN WAKEUP BLOCK
D23 X_1N4148-S-LL34 D22 X_1N4148-S-LL34
VCC5_SB
R409 330
C216 104P
X_2N3904S R374 X_10K
R375 X_10K
10K
R392
Q42
RING# 11
Q47 2N3906S Ic=200mA Vebo=5V Vceo=40V
JWOL1
1 2 3
WOL
LAN WAKEUP HEADER
VCC5_SB
R442 4.7K
PS2 KEYBOARD & MOUSE CONNECTOR
RTSB DTRB TXDB
VCC_MS
MSDATA12
MSCLK12
KBDATA12
KBCLK12
VCC_MS
135
7
RN1 8P4R-4.7K
246
8
FB3 301S/0603 FB4 301S/0603
FB2 301S/0603 FB5 301S/0603
135
7
CN1 X_8P4C-22P
246
8
U45
1
1 2 3 4 5
X_SMDA24C
8 7 6
2 3 4 5
SO8
8 7 6
R21 47K
MS_DT MS_CK
KB_DT KB_CK
C10
C9
180P
180P
For SMDA24C-7
L11
X_80S/0805
L12 X_80S/0805
L13 X_80S/0805
RTSA DTRATXDA
R22 X_47K
-12V +12V
For ST DA112S1
C12 180P
11 12
KBMS1 7 8
1 2 5 6
YMD12P-1
C6 180P
MS
KB
LP_ERR# LP_AFD#
KB_DT KB_CK
10
C1
9
33P
GNDA
4
VCC_MS
3
C3 X_104P
MINI-SO8
U46
1
1
2
2
3
3
4 5
4 5
U48
1
1
2
2
3
3
4 5
4 5
U49
1
1
2
2
3
3
4 5
4 5
Micro-Star
Document Number
Last Revision Date:
4
3
Tuesday, October 30, 2001
2
R429 10K
X_COPPER
CP1
FB1
C5 104P
X_600S/0805
8 7 6
X_DN006S
8 7 6
X_DN006S
8 7 6
X_DN006S
Title
MS-6552
IO Connector / ESD
VCC3_SB
R419 10K
Q55
2N3904S
PSPWR C4
X_104P
VCC5
8 7 6
8 7 6
8 7 6
Sheet of
LAN_WAKE 11
FS1
1.1A-P POLY SWITCH
LP_ACK# LP_BUSY
LP_PE
LP_SLIN# LP_INIT#
LP_SLCTLP_STB#
MS_DT MS_CK
26 35
1
VCC5_STR
Rev
0A
Page 27
A
REALTEK 8100(L) LAN
RXIN­RXIN+ TXD-
4 4
SPDLED ACTLED
3 3
49.9RST
R70
49.9RST
R69
C42
104P
C_BE#310,20
R285 100
TXD+ TXD-
C112 X_10P
C44
X_10P
AD22
2 2
RXIN+ RXIN- RX-
C41 X_10P
1 1
NEAR PHY
VCC3
VDD25
105P
D11 1N4148S
INTF#11,20
INTC#10,20
PCICLK35
PGNT#410,20 PREQ#410,20
C_BE#210,20
FRAME#10,20
IRDY#10,20
TRDY#10,20
DEVSEL#10,20
R202
49.9RST
C109
104P
GND
A
R171 1K R177 15K
C132 104P
R290 0 R289 X_0
LANRST
AD31 AD30 GND AD29 VDD33 AD28 AD27 AD26 AD25 AD24 VDD25 VDD33
C_BE#3
AD23
C46
X_104P
C113 X_10P
R203
49.9RST
C118 104P
TXD+
(ISOLATEB)
C134 475P/0805
GND
ISOB
8079787776757473727170696867666564636261605958575655545352
LED1NCLED2
GND
AD21
GND
AD20
AD21
AD20
CMT
TX+
RX+ RXC
AD19
RX-
AVDD
AVDD25
AD19
VDD
VDD33
VDD33
TX-
GND
ISOLATEB
VDD25
AD18
VDD25
AD18
15 16 14
11 9 10
AD17
LED0
81
INTAB
82
RSTB
83
CLK
84
GNTB
85
REQB
86
AD31
87
AD30
88
GND
89
AD29
90
VDD
91
AD28
92
AD27
93
AD26
94
AD25
95
AD24
96
VDD25
97
VDD
98
CBE3B
99
IDSEL
100
AD23
AD22
1234567891011121314151617181920212223242526272829
AD22
C_BE#2 FRAME# IRDY# TRDY# DEVSEL#
R72 X_0
U5
2
TDC
1
TD+
3
TD-
6
RD+
8
RD-
7
RDC
C43
TS6121C
104P
TXD+
AD17
C119 27P
AD16
TXD-
AD16
AVDD
AVDD25
CBE2B
FRAMEB
B
Y1
X1
PAR
X2
AVDD
CBE1B
VDD
VDD33
AVDD25
AD15
AD15
78
PME#
AD14
PMEB
AD14
GND
GND
AD13
AD13
VCTRL
VCTRL
AD12
AD12
C_BE#1 PAR SERR# PERR# STOP#
123456
C120
27P
NCNCNC
AD11
AD10
AD11
RN2
8P4R-75
AD10
AD9
PME# VCTRL
VDD25
51
AD9
30
AD8
VDD25
EECS
EEDO
VDD25
VDD25
CBE0B
AD8
C123 475P/0805
AUX
EESK EEDI
AD0 AD1
GND
AD2 AD3
VDD
AD4 AD5 AD6
VDD
AD7
GND
U14
50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31
RTL8100BL
LANGND
PME# 10,19,20
C124
C117
104P
104P
R206 5.6K AUX LEECS EESK EEDI EEDO AD0 AD1 GND AD2 AD3 VDD25 VDD33 AD4 AD5 AD6 VDD25 VDD33 AD7 C_BE#0 GND
C29 X_104P
FB11 30S/0603
21
25MHZ
R170
5.6KST
GND
GND
GND
GND
RTT2
RTT3
RXIN-
RXIN+
RTSET
IRDYB
TRDYB
DEVSELB
GND
STOPB
PERRB
SERRB
GND
TX+ TX- RX-
RX+
B
21
FB16
C121
300S/0805
105PC122
VCC3_SB
C_BE#1 10,20 PAR 10,20 SERR# 10,20 PERR# 10,20 STOP# 10,20
GND
C
VDD33
ELS10U/16V-B
C
VDD33
VCTRL
1
CS
2
SK
3
DI
4
DO
The 9346 EEPROM should be functional when powered by
3.3V
C_BE#0 10,20
AD[31..0] 10,20
VDD33
VDD33
U15
VCC
NC NC
GND
93C46S-1
。
R60 300
R71 300
Q33
8 7 6 5
2SB1197K
VDD25
C135
+EC1
104P
GNDGND
VDD33
ACTLED
RX+ TX­TX+
SPDLED
BC1 104P
GND
X_104PC18
X_104PC37
GND GND
VDD25
17 18
9 13 10 14 11 15 12 16 19 20
LAN_USB1B
AMBER+ AMBER-
GREEN+ GREEN-
USBLAN
RDN
RDP TDN TDP
D
VDD33
VDD33
DC8 104P
DC10 104P
VDD33
C138 105P
GNDGND
ENABLED
DISABLED
1 2 3
JLAN1 YJ103
DC9 104P
DC2 104P
C139 104P
DC4 104P
GND
VDD25
VDD25
DC7 104P
DE-COUPLE CAPS OF RTL8100 MUST BE
PLACED AS CLOSE TO CHIP AS POSSIBLE.
VCC3_SB
NC NC
NC NC
FB19 80S/0805
ELS10U/16V-B
PCIRST#15,8,12,15
JLAN1
21
+
EC2
LANRST
LAN SELECT
1-2
2-3
Micro-Star
Document Number
Last Revision Date:
Tuesday, October 30, 2001
D
E
DC3
DC11
104P
104P
DC1
DC5
104P
104P
Title
MS-6552
Realtek RTL8100 LAN
E
DC6 104P
Sheet of
27 35
Rev
0A
Page 28
5
4
3
2
1
Jumper Setting
D D
Jumper Description
JBAT1 1-2
CLEAR CMOS NORMAL
(Default)
CLEAR CMOS2-3
IR1 IR HEADER CD_IN1 CDROM HEADER (ATAPI) MDM_IN1 TELEPHONY HEADER (ATAPI) JP1 CNR RISER CODEC SELECT HEADER
2-3
B B
PRIMARY AUDIO CODEC ONBOARD
C C
AUTO MODE
(Default)1-2
A A
Title
Micro-Star
Document Number
Last Revision Date:
5
4
3
2
Wednesday, September 12, 2001
MS-6552
JUMPER SETTING
Sheet of
1
Rev
0A
28 35
Page 29
5
4
3
2
1
PCB OTHER COMPONENT
SIMULATION TRACE
D D
C C
7
8
9 2
BS5
9 2
BS4
6 5
3
4
7
8
6 5
3
4
9 2
BS3
9 2
BS1
7
8
6 5
3
4
7
8
6 5
3
4
BS4_X1BS3_X1BS2_X1BS1_X1
FM1
X
X
B B
X_COPPER
CP8
X_COPPER
CP9
FM2
FM3
X
X
X
X
9 2
BS6
BS8_X1
7
8
6 5
3
4
9 2
BS2
7
8
6 5
3
4
U3_X1
U4_X1
BS1_X1 BS9_X1BS8_X1BS4_X1BS2_X1
BS3_X1
J1
X
VCC5
J2
X
AGPSDR
BS9_X1
FM4
FM5
X
X
FM6
X
X
FM7
X
X
FM8
X
X
X
X
X_COPPER
CP10
A A
Title
Micro-Star
Document Number
Last Revision Date:
5
4
3
2
Wednesday, October 24, 2001
MS-6552
MANUAL
Sheet of
1
Rev
0A
29 35
Page 30
5
4
3
2
1
Pentium 4 Processor /Northwood mPGA 478
Source Synchronous Signal Group and the Associated Strobes
Signals Associated Strobe
REQ[4:0],A[16:3]#
D D
A[31:17]# D[15:0]#,DBI0# D[31:16]#,DBI1# D[47:32]#,DBI2# D[63:48]#,DBI3#
Signals InaccuracyLength Data Address Strobe Clock
2.0" to 10.0"
2.0" to 10.0"
2.0" to 10.0"
2.0" to 10.0"
Delta=(CPU_pkglen.net-CPUpkglen.strobe)+(CS_pkglen.net-CS_pkglen.strobe)* Trace : 7 mil width 13mil space
Miscellaneous Signals
C C
HL_STB/HL_STB#
Taces 5mils
20mils
15mils
20mils
* Max Length : 8" * STB and STB# Length must be equal
B B
ADSTB0# ADSTB1# DSTBP0#,DSTBN0# DSTBP1#,DSTBN1# DSTBP2#,DSTBN2# DSTBP3#,DSTBN3#
HL[0:10] HL_STB
HL_STB#
HL[0:10]
+/- 100 mil +/- 200 mil +/- 25 mil Don't need
HL[10..0]
20mils
15mils
20mils
* Max Length : 8" * Length must be matched within +/- 0."
of the Strobe Signals
Others
HL[0:10] HL[0:10]
Others
USB
* USB Trace width : 9 mils * USB Trace Spacing : 25 mils * Differential USB Signlas Trace
Spacing : 18 mils * USB Power Trace must be 40mils width
AGP
1X Timing group 2X/4X Timing group
AGPCLK PIPE# RBF# WBF# ST[2..0] GFRAME# GIRDY#
A A
GTRDY# GSTOP# GDEVSEL# GREQ# GGNT# GPAR
SET#1 GAD[15..0] GC_BE#[1..0] GAD_STB0 GAD_STB0#
SET#2 GAD[31..16] GC_BE#[3..2] GAD_STB1 GAD_STB1#
SET#3 SBA[7..0] SB_STB SB_STB#
5
SIGNALS
1X Timing group 2X/4X Timing group
SET#1
2X/4X Timing group
SET#2
2X/4X Timing group
SET#3
2X/4X Timing group
SET#1
2X/4X Timing group
SET#2
2X/4X Timing group
SET#3
Maximum Length Width Space Length
7.5"
5 mil
7.25"
5 mil
7.25"
5 mil
7.25"
5 mil
6"
5 mil
6"
5 mil
6"
5 mil
4
5 mil 20 mil 20 mil 20 mil 15 mil 15 mil 15 mil
Dismatch
X X +/- 0.125" +/- 0.125" +/- 0.125" +/- 0.25" +/- 0.25" +/- 0.25"
Relative to
GAD_STB0 GAD_STB0#
GAD_STB1 GAD_STB1#
SB_STB SB_STB#
GAD_STB0 GAD_STB0#
GAD_STB1 GAD_STB1#
SB_STB SB_STB#
Title
Micro-Star
Document Number
Last Revision Date:
3
2
Wednesday, September 12, 2001
MS-6552
Revision History - 1
Sheet of
1
Rev
0A
30 35
Page 31
5
CPUCLK MCHCLK CPUCLK# MCHCLK#
D D
0.5" MAX 2"~ 9"
L1 L2 L4 L1 L2 L4
RS RS
0"~ 0.2"
0"~ 0.2"
L3
RT
L3
4
RT
CPU MCH ITP
3
L1+L2DEVICE
X X X
* Line Width : 7.0 mil * Differential pair spacing : 7.0mil * Spacing to other traces : 28 mil * BCLK0/BCLK1 LENGTH MATCH +/- 10 mil
2
1
GND
MCH_66 ICH_66 AGP_66
ICH_PCLK FWH_PCLK
C C
B B
SIO_PCLK ISAPCLK PCICLK[4..0]
OSC
ICH_48 SIO_48
0"~ 0.5 " 4"~ 8.5"
L1 L2
0"~ 0.5 " 4"~ 8.5"
L1 L2
L1
RS
RS
RSICH_14
RS
4"~ 8.5"0"~ 0.5 "
L2L1
3"~12"0"~ 0.5 "
L2
DEVICE L1+L2
MCH ICH AGP
DEVICE L1+L2
ICH FWH SIO PCI
DEVICE
ICH
ISA BRIDGE
DEVICE L1+L2
ICH SIO
X +/- 100 mils
X-2.5"
L1+L2
X
X- 4"
X X X
Y Y
* Line Width : 5.0 mil * Spacing to other traces : 20 mil
* Line Width : 5.0 mil * Spacing to other traces : 20 mil * L1/L2 TRACE SAME AS MCH_66 TRACE LENGTH
* Line Width : 5.0 mil * Spacing to other traces : 10 mil
* Line Width : 5.0 mil * Spacing to other traces : 20 mil
CK 408
0.5" TO 6.5"
RN
2.5" TO 9"- A
CNR
* Line Width : 7.0 mil * Differential signls space : 14mils * Differential signls length mismatch +/- 7mil
A
LAN_PCLK
A A
ICH2
RST RXD[2..0] TXD[2..0]
AS SHORT AS POSSIBLE
5
Title
Micro-Star
Document Number
Last Revision Date:
4
3
2
Wednesday, September 12, 2001
CK-408 and LAN Design Guide
MS-6552
Sheet of
1
Rev
0A
31 35
Page 32
5
SDRAM Routing Guidelines
5.Feedback - RDCLKO,RDCLKIN routing rule
2 or 3 DIMM feedback layout guideline
Signal Length Width Trace Spacing
Trace L
D D
50 mils 7 mil 5 mil
RDCLKO Ball RDCLKIN BallL
4
3
2
1
SCK[5:0] layout guideline
MCH
SCK/SCK#[2:0]
A
F
SCK/SCK#[5:3]
GA
DIMM1 DIMM2
DDR-SDRAM Routing Guidelines
1.DDR bus reference plane stack-up PCB Layer Description
Layer 1 Signal Layer 2 Layer 3 Layer 4
*All the memory bus signals must be referenced to GND
2.DDR signal groups
C C
Data Command Control Clock Feedback
3.SDQ[63:0],SCB[7:0],SDQS[8:],SCK/SCK#[5:0]routing rule
Signal
SDQ[63:0] Max = 0.5" SCB[7:0] SQDS[8:0]
(Note1)
SCK/SCK#[2:0]
B B
SCK/SCK#[5:3]
(Note3)
Ground Flood
Ground
Power / Signal
SignalsGroup SDQ[63:0],SCB[7:0],SDQS[8:0] SMA[12:0],SBS[1:0],SRAS#,SCAS#,SWE# SCKE[3:0],SCS#[3:0] SCK[5:0],SCK#[5:0] RCVENOUT#,RCVENIN#
Length A Package
length
Length B Width
Length C Length D
2.0" - 5.0" 5 mil
DIMM 1 = A + B + C = X DIMM 2 = A + B + C + D =
Package length
B+C+2"<= None None 5 mil
Length F <= B+C+1"
2.0" - 6.5"
DIMM 1 = A + F = X + 1" to X + 2"
Package length
B+C+D+2"<= Length G <= B+C+D+1" 5 mil (Note4)
2.5" - 7.0"
X + D
0.3' - 0.5"
Length E
0.1" - 0.8"
Spacing (Note2)
(Note4)
Routing Layer
Top
Bottom
Bottom
Note1:Each data and strobe signal group must be length matching +/- 25 mils
SDQS[X] = +/- 25 mils SDQ[X]/SCB[X] group length
Signals Associated Strobe SDQ[7:0] SDQ[15:8] SDQ[23:16] SDQ[31:17] SDQ[39:32] SDQ[47:40] SDQ[55:48] SDQ[63:56] SCB[7:0]
Note2:Trace spacing normally = 12 mils and through between DIMM 2 pin = 7 mils, but breakout form MCH ball = 5 mils width with 7mils spacing for a max of 350mils
SDQ0 SDQ1 SDQ2 SDQ3 SDQ4 SDQ5 SDQ6 SDQ7 SDQ8
Note3:
SCK[X] length = SCK#[X] length
*
SCK/SCK#[2:0] routed to DIMM 0 are equal in length, and SCK/SCK#[5:3] routed to
*
DIMM 1 are equal in 1ength
Note4:
Between the pair differential clock 2 signal trace spacing = 7 mils* Differential Trace with 2.5V copper flood spacing = 10 mils minimum
*
Serpentine spacing = 20 mils minimum
*
Differential signals breakout form MCH = 5 mil width with 7 mil differential spacing and
*
7 mil isolation spacing from another signal for a max of 350 mils
Note5:Data group signal can NOT placed within the same RPACK's(series and parallel resistor packs) as the command or control group signal
DIMM 2 = A + G = X + D + 1" to X + D + 2"
* Package length see Table - 4
SDQ[63:0],SCB[7:0],SDQS[8:] layout guideline
MCH DIMM1 DIMM2
B C
A A
5
D EA
4
Vtt
(Note5)(Note5)
Title
Micro-Star
Document Number
Last Revision Date:
3
2
Wednesday, September 12, 2001
MS-6552
DDR Layout Guideline1
Sheet of
1
Rev
0A
Page 33
5
DDR-SDRAM Routing Guidelines
4.SCKE[3:0],SCS#[3:0] routing rule
Length F
SCS#[1:0] SCKE[1:0] (Note1)
D D
Total lenght
Max = 40 mils 2.0" - 3.5" Max = 500 mils
DIMM0 SCK/SCK#[2:0] length =
Length F
SCS#[3:2] SCKE[3:2] (Note1)
Total lenght
Max = 40 mils 2.0" - 3.5" Max = 1"
DIMM1 SCK/SCK#[5:3] length = Y"
DIMM1 SCS#/SCKE length = F + G + J = Y"- 1"
DIMM 0 Length GSignal
DIMM 1 Length GSignal
Length H Length I
(Note2)
X" X"- 1"DIMM0 SCS#/SCKE length = F + G + H =
Length J Length K
(Note2)
4
0.4" - 1.3"
0.1" - 0.8"
Width
5 mils
Width
5 mils
3
MCH DIMM1 DIMM2
(Top)
M NL
(Bottom )
2
1
Vtt
(Note2)
(Top)
(Top)
O
(Top)
P
(Note2)
Note1:
* Trace spacing normally = 12 mils and through between DIMM 2 pin or DIMM to Rtt = 7
mils, but breakout form MCH ball = 5 mils width with 7mils spacing for a max of 350mils
Trace with 2.5V copper flood spacing = 7 mils minimum
*
Isolation spacing form another group signal spacing = 20 mils minimum
*
Command signals breakout form MCH = 5 mil width with 7 mil spacing for a max of 350 mils*
Note2:Command group signal can NOT placed within the same RPACK's(series and parallel resistor packs) as the data or control group signal
MCH DIMM1 DIMM2
C C
(Top)
(Top)
F
G H
(Bottom )
G JF
(Bottom )
Note1:
* Trace spacing normally = 12 mils and through between DIMM 2 pin or DIMM to Rtt = 7
mils, but breakout form MCH ball = 5 mils width with 7mils spacing for a max of 350mils
Trace with 2.5V copper flood spacing = 7 mils minimum
*
Isolation spacing form another group signal spacing = 20 mils minimum
*
Control signals breakout form MCH = 5 mil width with 7 mil spacing for a max of 350 mils*
Note2:This purpose prevent break form DIMM0 bottom size 2.5V copper flood to MCH power plane
B B
Note3:Control group signal can NOT placed within the same parallel resistor packs as the command or data group signal
(Top)
(Top)
I
(Top) (Top)
K
(Note3)
Vtt
Vtt
5.Feedback - RCVENOUT#,RCVENIN# routing rule Signal Length Q
RCVENOUT# RCVENIN#
(Note1) Total
Length
40 mils
Length R Length S
Equal 1" 40 mils
Q + R + S = 1080 mils
MCH
(Top)
Q
RCVENOUT#
(Top)
R
(Bottom)
S
RCVENIN#
Note1:
Width
5 milS
* Trace spacing = 12 mils
Trace with 2.5V copper flood spacing = 7 mils minimum
5.SMA[12:0],SBS[1:0],SRAS#,SCAS# routing rule
SMA[12:0]
Length L
SBS[1:0] SRAS# SCAS# (Note1)
DIMM 0
Total lenght
DIMM 1
Total lenght
A A
Max = 40 mils 2.0" - 3.5" Max = 500 mils 0.3" - 0.5"
DIMM0 SCK/SCK#[2:0] length =
DIMM0 SCK/SCK#[5:3] length = Y"
Command signal length = L + M + N + O = Y" - 1"
Length MSignal
Length N Length O
Length P
0.1" - 0.8"
Width
5 mils
X" X" - 1"Command signal length = L + M + N =
*
Isolation spacing form another group signal spacing = 10 mils minimum
*
Command signals breakout form MCH = 5 mil width with 7 mil spacing for a max of 350 mils*
Title
Micro-Star
Document Number
Last Revision Date:
5
4
3
2
Wednesday, September 12, 2001
MS-6552
DDR Layout Guideline2
Sheet of
1
Rev
0A
Page 34
5
4
3
2
1
Table - 4
Signal MCH ball
SDQ0 SDQ1 SDQ2 SDQ3
D D
SDQ4 SDQ5 SDQ6 SDQ7 SDQ8 SDQ9 SDQ10 SDQ11 SDQ12 SDQ13 SDQ14 SDQ15 SDQ16 SDQ17
C C
SDQ18 SDQ19 SDQ20 SDQ21 SDQ22 SDQ23 SDQ24 SDQ25 SDQ26 SDQ27 SDQ28 SDQ29 SDQ30 SDQ31
B B
G28 F27 C28 E28 H25 G27 F25 B28 E27 C27 B25 C25 B27 D27 D26 E25 D24 E23 C22 E21 C24 B23 D22 B21 C21 D20 C19 D18 C20 E19 C18 E17
Package length(")
0.716
0.699
0.874
0.754
0.532
0.666
0.592
0.892
0.797
0.833
0.812
0.753
0.886
0.867
0.773
0.645
0.722
0.602
0.699
0.566
0.785
0.781
0.640
0.711
0.627
0.555
0.587
0.522
0.615
0.487
0.579
0.521
Signal Package length(")MCH ball
DDR Data Signals(1)
DDR Data Signals(2)
SDQ32 SDQ33 SDQ34 SDQ35 SDQ36 SDQ37 SDQ38 SDQ39 SDQ40 SDQ41 SDQ42 SDQ43 SDQ44 SDQ45 SDQ46 SDQ47 SDQ48 SDQ49 SDQ50 SDQ51 SDQ52 SDQ53 SDQ54 SDQ55 SDQ56 SDQ57 SDQ58 SDQ59 SDQ60 SDQ61 SDQ62 SDQ63
E13 C12 B11 C10 B13 C13 C11 D10 E10 C9 D8 E8 E11 B9 B7 C7 C6 D6 D4 B3 E6 B5 C4 E5 C3 D3 F4 F3 B2 C2 E2 G5
0.432
0.543
0.596
0.590
0.639
0.552
0.588
0.626
0.533
0.605
0.587
0.522
0.523
0.715
0.706
0.643
0.700
0.664
0.760
0.922
0.640
0.846
0.810
0.670
0.859
0.811
0.723
0.814
0.949
0.893
0.865
0.689
Signal Package length(")MCH ball
DDR ECC Signals
SCB0 SCB1 SCB2 SCB3 SCB4 SCB5 SCB6 SCB7
C16 D16 B15 C14 B17 C17 C15 D14
DDR Data Strobe Signals
Signal
SDQS0 SDQS1 SDQS2 SDQS3 SDQS4 SDQS5 SDQS6 SDQS7 SDQS8
MCH ball
F26 C26 C23 B19 D12 C8 C5 E3 0.821 E15
0.570
0.526
0.623
0.533
0.621
0.583
0.540
0.503
Package length(")
0.651
0.775
0.738
0.636
0.493
0.596
0.776
0.520
Signal
SCK#0 SCK1 SCK#1 SCK2 SCK#2 SCK3 SCK#3 SCK4 SCK#4 SCK5 SCK#5
DDR Clock Signals
MCH ball
Package length(") E14 F15 J24 G25 G6 0.551 G7 G15 G14 E24 G24 H5 F5
0.453SCK0
0.432
0.454
0.587
0.543
0.371
0.349
0.610
0.548
0.589
0.693
A A
Title
Micro-Star
Document Number
Last Revision Date:
5
4
3
2
Wednesday, September 12, 2001
MS-6552
DDR Layout Guideline3
Sheet of
1
Rev
0A
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