Page 1
1
Cover Sheet 1
Block Diagram
2
3 AMD 462pins SocketA CPU - Signals
(MS-6595)
Nvidia (R) Crush17/18(nForce IGP 64) + MCP2/2H Chipset
Version: 0B
AMD Althon/Duron/Morgan/Palomino Socket 462 Processor
AMD 462pins SocketA CPU - Power 4
CRUSH17/18 - Host & VID Signals 5
CRUSH17/18 - Memory-A & LDT & PLL Signals 6
CRUSH17/18 - Memory-B Signals 7
CPU:
AMD Duron/Morgan 1.2G&1.3G
AMD Althon/Palomino 1500 - 1.333G/266MHz
AMD Althon/Palomino 1600 - 1.400G/266MHz
AMD Althon/Palomino 1700 - 1.467G/266MHz
CRUSH17/18 - AGP & VIDEO Signals
MCP2 - CPU & PCI & LDT & IDE Signals
MCP2 - MAC & USB & LPC & AC'97 Signals
LPC I/O - W83627HF
AC97 Audio - ALC202A
A A
MII LAN & LPC Flash EEPROM
8
9
10
11
12
13
AMD Althon/Palomino 1800 - 1.533G/266MHz
AMD Althon/Palomino 1900 - 1.600G/266MHz
AMD Althon/Palomino 2000 - TBD
System Chipset:
Nvidia nForce IGP 64 (North Bridge)
MCP2/2H Wep (South Bridge)
On Board Chipset:
DDR System Memory
AGP 3.0 Slot, LDT Regulator & COM2 15
PCI Slots
ATA33/66/100 IDE & Video Connectors
14
16
17
BIOS -- LPC EEPROM
AC'97 Codec -- ALC202A
LPC Super I/O -- W83627HF-AW
LAN -- ICS1893 PHY
I1394 -- FW803 PHY
FAN & USB Connectors
18
Expansion Slots:
I1394 PHY & Connectors
ATX & Front Panel
ACPI (MS5) Controller
VRM 9.0 - ST6917B
GPIO
Power Delivery Map & MANUAL
Revision History 1
19
20
21
22
23
24
25
AGP 3.0 SLOT * 1
PCI2.2 SLOT * 3
PWM Controller:
ST6917B
ACPI:
MS5
1
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
COVER SHEET
(MS-6595)
1 25 Monday, July 08, 2002
0A
Page 2
1
VRM 9.2
ST6917B
2-Phase PWM
AGP 3.0
Connector
Analo g
Video
4X / 8X
462-Pin Socket Proc essor
K7 FSB
CRUSH 18
64bit DDR
Block Diagram
2 DDR
DIMM
Modules
(1+1)
Out
LDT Link
IDE Prim ary
UltraDMA 33/66/100/133
PCI CNTRL
PCI Slot 1
PCI Slot 2
PCI Slot 3
IDE Seco ndary
MCP-2
A A
USB Port 0
PCI ADDR/DATA
USB Port 1
USB Port 2
USB
LPC Bus
USB Port 3
USB Port 4
LPC SIO
USB Port 5
ALC202A
AC'97 Link
W83627HF-AW
AC'97 Codec
FW802A
1394a PHY
1394a
MII
Flash
Keyboard
Mouse
Floopy Parallel Seria l
10/100BaseT
ICS1893
MSI
Title
Size Document Number Rev
1
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
H/W Project Leader : Joey Lee
H/W Project Engineer : Richard Shih
BLOCK DIAGRAM
(MS-6595)
2 25 Monday, July 08, 2002
OA
Page 3
8
SDATA#[0..63] {5}
D D
C C
B B
DICLK#[0..3] {5}
DIVAL# {5}
DOCLK#[0..3] {5}
AIN#[2..14] {5}
A A
AICLK# {5}
CFWDRST {5}
CONNECT {5}
PROCRDY {5}
8
SDATA#0
SDATA#1
SDATA#2
SDATA#3
SDATA#4
SDATA#5
SDATA#6
SDATA#7
SDATA#8
SDATA#9
SDATA#10
SDATA#11
SDATA#12
SDATA#13
SDATA#14
SDATA#15
SDATA#16
SDATA#17
SDATA#18
SDATA#19
SDATA#20
SDATA#21
SDATA#22
SDATA#23
SDATA#24
SDATA#25
SDATA#26
SDATA#27
SDATA#28
SDATA#29
SDATA#30
SDATA#31
SDATA#32
SDATA#33
SDATA#34
SDATA#35
SDATA#36
SDATA#37
SDATA#38
SDATA#39
SDATA#40
SDATA#41
SDATA#42
SDATA#43
SDATA#44
SDATA#45
SDATA#46
SDATA#47
SDATA#48
SDATA#49
SDATA#50
SDATA#51
SDATA#52
SDATA#53
SDATA#54
SDATA#55
SDATA#56
SDATA#57
SDATA#58
SDATA#59
SDATA#60
SDATA#61
SDATA#62
SDATA#63
DICLK#0
DICLK#1
DICLK#2
DICLK#3
DOCLK#0
DOCLK#1
DOCLK#2
DOCLK#3
DOVAL#
AIN#0
AIN#1
AIN#2
AIN#3
AIN#4
AIN#5
AIN#6
AIN#7
AIN#8
AIN#9
AIN#10
AIN#11
AIN#12
AIN#13
AIN#14
FILVAL#
AG33
AG37
AG35
7
CPU SIGNAL BLOCK
U13A
AA35
SDATA0
W37
SDATA1
W35
SDATA2
Y35
SDATA3
U35
SDATA4
U33
SDATA5
S37
SDATA6
S33
SDATA7
AA33
SDATA8
AE37
SDATA9
AC33
SDATA10
AC37
SDATA11
Y37
SDATA12
AA37
SDATA13
AC35
SDATA14
S35
SDATA15
Q37
SDATA16
Q35
SDATA17
N37
SDATA18
J33
SDATA19
G33
SDATA20
G37
SDATA21
E37
SDATA22
G35
SDATA23
Q33
SDATA24
N33
SDATA25
L33
SDATA26
N35
SDATA27
L37
SDATA28
J37
SDATA29
A37
SDATA30
E35
SDATA31
E31
SDATA32
E29
SDATA33
A27
SDATA34
A25
SDATA35
E21
SDATA36
C23
SDATA37
C27
SDATA38
A23
SDATA39
A35
SDATA40
C35
SDATA41
C33
SDATA42
C31
SDATA43
A29
SDATA44
C29
SDATA45
E23
SDATA46
C25
SDATA47
E17
SDATA48
E13
SDATA49
E11
SDATA50
C15
SDATA51
E9
SDATA52
A13
SDATA53
C9
SDATA54
A9
SDATA55
C21
SDATA56
A21
SDATA57
E19
SDATA58
C19
SDATA59
C17
SDATA60
A11
SDATA61
A17
SDATA62
A15
SDATA63
W33
SDATAINCLK0
J35
SDATAINCLK1
E27
SDATAINCLK2
E15
SDATAINCLK3
AN33
SDATAINVAL
AE35
SDATAOUTCLK0
C37
SDATAOUTCLK1
A33
SDATAOUTCLK2
C11
SDATAOUTCLK3
AL31
SDTATOUTVAL
AJ29
SADDIN0
AL29
SADDIN1
SADDIN2
AJ37
SADDIN3
AL35
SADDIN4
AE33
SADDIN5
AJ35
SADDIN6
SADDIN7
AL33
SADDIN8
AN37
SADDIN9
AL37
SADDIN10
SADDIN11
AN29
SADDIN12
AN35
SADDIN13
AN31
SADDIN14
AJ33
SADDINCLK
AJ21
CLKFWDRST
AL23
CONNECT
AN23
PROCRDY
AJ31
SFILLVAL
N12-4620011-F02
**All CPU interface are 2.5V tolerant**
7
462-Pin Socket
6
A20M
FERR
INIT
INTR
IGNNE
NMI
RESET
SMI
STPCLK
PWROK
PICCLK
PICD0/BYPASSCLK
PICD1/BYPASSCLK
COREFB-
COREFB+
CLKIN
CLKIN
RSTCLK
RSTCLK
K7CLKOUT
K7CLKOUT
ANALOG
SYSVREFMODE
VREF_SYS
ZN
ZP
PLLBYPASS
PLLBYPASSCLK
PLLBYPASSCLK
PLLMON1
PLLMON2
PLLTEST
SCANCLK1
SCANCLK2
SCANINTEVAL
SCANSHIFTEN
Part 1
DBRDY
DBREQ
FLUSH
TCK
TDI
TDO
TMS
TRST
VID0
VID1
VID2
VID3
VID4
FID0
FID1
FID2
FID3
SCHECK0
SCHECK1
SCHECK2
SCHECK3
SCHECK4
SCHECK5
SCHECK6
SCHECK7
SADDOUT0
SADDOUT1
SADDOUT2
SADDOUT3
SADDOUT4
SADDOUT5
SADDOUT6
SADDOUT7
SADDOUT8
SADDOUT9
SADDOUT10
SADDOUT11
SADDOUT12
SADDOUT13
SADDOUT14
SADDOUTCLK
6
AE1
AG1
AJ3
AL1
AJ1
AN3
AG3
AN5
AC1
AE3
N1
N3
N5
AG13
AG11
AN17
AL17
AN19
AL19
AL21
AN21
AJ13
AA5
W5
AC5
AE5
AJ25
AN15
AL15
AN13
AL13
AC3
S1
S5
S3
Q5
AA1
AA3
AL3
Q1
U1
U5
Q3
U3
L1
L3
L5
L7
J7
W1
W3
Y1
Y3
U37
Y33
L35
E33
E25
A31
C13
A19
J1
J3
C7
A7
E5
A5
E7
C1
C5
C3
G1
E1
A3
G5
G3
E3
A20M#
FERR#
CPUINIT#
INTR
IGNNE#
NMI
CPURST#
SMI#
STPCLK#
R29 22
C49 X_10p
APICCLK_CPU
APICD0#
APICD1#
COREFB#
COREFB
CPUCLK_R
CPUCLK#_R
CLKOUT
CLKOUT#
VREFMODE
VREF_SYS
ZN
ZP
PLLBP#
PLBYCLK
PLBYCLK#
PLLMON1
PLLMON2
PLLTEST#
SCANCLK1
SCANCLK2
SINTVAL
SSHIFTEN
DBREQ#
FLUSH#
CPU_TCK
CPU_TDI
CPU_TMS
CPU_TRST#
VIDA0
VIDA1
VIDA2
VIDA3
VIDA4
FID0
FID1
FID2
FID3
AOUT#2
AOUT#3
AOUT#4
AOUT#5
AOUT#6
AOUT#7
AOUT#8
AOUT#9
AOUT#10
AOUT#11
AOUT#12
AOUT#13
AOUT#14
CPU_OK
5
A20M# {9}
FERR# {9}
CPUINIT# {9}
INTR {9}
IGNNE# {9}
NMI {9}
CPURST# {5,9}
SMI# {9}
STPCLK# {9}
CPU_OK {5,20,21}
APICCLK_CPU {5}
APICD0# {9}
APICD1# {9}
COREFB# {22}
COREFB {22}
VIDA[0..4] {5}
FID[0..3] {5}
AOUT#[2..14] {5}
AOCLK# {5}
5
4
3
2
CPU PULL-UP / DOWN BLOCK
NMI
INTR
SMI#
CPUINIT#
STPCLK#
A20M#
IGNNE#
CPURST#
PLLTEST#
DBREQ#
CPU_TDI
CPU_TRST#
CPU_TCK
CPU_TMS
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
R15 680
R19 680
RN12
1 2
3 4
5 6
7 8
510
RN3
680
RN6
680
VCORE
AIN#0
R101 270
AIN#1
R95 270
PLLMON1
R52 56
PLLMON2
R44 56
FLUSH#
R20 680
PLLBP#
R90 680
CPU_OK
R31 270
FERR#
R7 680
SCANCLK2
SSHIFTEN
SINTVAL
SCANCLK1
FILVAL#
DOVAL#
X_4.7u-0805(S/S) C598 R42 10K
1 2
3 4
5 6
7 8
R115 270
R109 270
RN13
270
X_4.7u-0805(S/S) C600
COREFB
COREFB#
Put in Solder
CPU SYSCLK BLOCK CPU K7CLKOUT BLOCK
VCORE
CPUCLK_R
CPUCLK#_R
CPUCLK# {5}
CPUCLK {5}
680p C89 R67 60.4RST
R68
301RST
680p C105
R69 60.4RST
CPU Clock Multiplier
FID2
1 2
FID1
FID0
FID3
CFID[3:0] => CPU Clock Multiplier
3 4
5 6
7 8
RN4
680
CLOSE SOCKET462
CPU SYSCLK REFERNCE BLOCK
VCORE
VREF_SYS
0.5 * VCORE
C64
C58
10u-0805
0.1u
CLOSE SOCKET462
4
C59
0.047u
R50
110RST
R49
110RST
CPU ZN / ZP BLOCK
ZN
ZP
CLOSE SOCKET462
match the transmission line
Push-pull compensation circuit
3
R39 40.2RST
R38 56.2RST
MSI
Title
Size Document Number Rev
Date: Sheet of
VREFMODE
VCORE VCORE VCORE
R34 X_1K
R36 270
VREFMODE=Low=No voltage scaling
CPU K7 EMI termination
PLBYCLK
PLBYCLK#
VCORE VCORE
R48 0 X_4.7u-0805(S/S) C601
VCORE
R65 100
R64 100
R57 100
R54 100
CLKOUT
R78 100
R77 100
CLKOUT#
R74 100
R73 100
* Trace lengths of CLKOUT and
CLKOUT# are between 2" and
3"
CPU APIC BLOCK
VCORE
APICD0#
APICD1#
APICCLK_CPU
MICRO-STAR INt'L CO., LTD.
AMD Socket462 CPU (Signal)
(MS-6597)
2
1
VCORE
VCORE
R11 330
R13 330
R174 X_453RST
3 25 Monday, July 08, 2002
1
VCORE
VCORE
VCC2_5
0A
Page 4
8
7
6
5
4
3
2
1
CPU VOLTAGE BLOCK
H12
H16
H20
H24M8P30R8T30V8X30Z8AB30
D D
VCC_CORE1
VCC_CORE2
VCC_CORE3
VCC_CORE4
VCC_SRAM1
VCC_SRAM2
VCC_SRAM3
VCC_SRAM4
VCC_SRAM5
VCC_SRAM6
VCC_SRAM7
VCC_SRAM8
VCC_SRAM9
VCC_SRAM11
VCC_SRAM13
VCC_SRAM14
VCC_SRAM16
VCC_SRAM17
VCC_SRAM19
VCC_SRAM20
VCC_SRAM21
VCC_SRAM22
VCC_SRAM23
VCC_SRAM24
VCC_SRAM25
VCC_SRAM26
VCC_SRAM27
VCC_SRAM28
VCC_SRAM29
VCC_SRAM30
VCC_SRAM31
KEY4
KEY6
KEY8
KEY10
KEY12
KEY14
KEY16
KEY18
VSS1
VSS2
VSS3
H14
H18
H22
H26
VCC_CORE5
VSS4
VSS5
M30P8R30T8V30X8Z30
AD30
AD8
AF10
AF28
AF30
AF32
AF6
AF8
AH30
AH8
AJ9
AK8
AL9
AM8
F30
F8
H10
H28
H30
H32
H6
H8
K30
K8
AG15
AG29
AJ7
AL7
AN7
G25
G17
G9
N7
Y7
AG7
C C
B B
VCC_CORE6
VCC_CORE7
VCC_CORE8
VCC_CORE9
VCC_CORE10
VSS6
VSS7
VSS8
VSS9
VSS10
AF14
AF18
AF22
AF26
VCC_CORE11
VCC_CORE12
VCC_CORE13
VCC_CORE14
VCC_CORE15
VSS11
VSS12
VSS13
VSS14
VSS15
AB8
AF12
AF16
AF20
AF24
AM34
AK36
AK34
AK30
AK26
VCC_CORE16
VCC_CORE17
VCC_CORE18
VCC_CORE19
VCC_CORE20
VCC_CORE21
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
AM36
AK32
AK28
AK24
AK20
AK22
AK18
AK14
AK10
AL5
VCC_CORE22
VCC_CORE23
VCC_CORE24
VCC_CORE25
VSS22
VSS23
VSS25
VSS26
AK16
AK12
AK4
AK2
AH36
AH26
AM30
AH22
AH18
AH14
VCC_CORE26
VCC_CORE27
VCC_CORE28
VCC_CORE29
VCC_CORE30
VCC_CORE31
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
AM32
AH34
AH32
AH28
AH24
AH10
AH4
AH2
AF36
AF34
AD6
AM26
AD4
AD2
AB36
AB34
AB32Z6Z4Z2X36
X34
VCC_CORE32
VCC_CORE33
VCC_CORE34
VCC_CORE35
VCC_CORE36
VCC_CORE37
VCC_CORE38
VCC_CORE39
VCC_CORE40
VCC_CORE41
VCC_CORE42
VCC_CORE43
VCC_CORE44
VCC_CORE45
VCC_CORE46
VCC_CORE47
VCC_CORE48
462-Pin Socket
Part 2
VSS33
VSS34
VSS35
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
AH20
AH16
AH12
AF4
AF2
AD36
AD34
AD32
AB6
AB4
AB2
Z36
Z34
Z32X6AM28X4X2
AM22
X32V6V4V2T36
VCC_CORE49
VCC_CORE50
VCC_CORE51
VCC_CORE52
VSS51
VSS52
VSS53
VSS54
V36
V34
V32T6T4T2R36
T34
T32R6R4R2AM18
VCC_CORE53
VCC_CORE54
VCC_CORE55
VCC_CORE56
VCC_CORE57
VCC_CORE58
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
R34
AM24
P36
P34
P32M4M6M2K36
VCC_CORE59
VCC_CORE60
VCC_CORE61
VCC_CORE62
VSS61
VSS62
VSS63
VSS64
R32P6P4P2M36
K34
VCC_CORE63
VCC_CORE64
VCC_CORE65
VCC_CORE66
VCC_CORE67
VCC_CORE68
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
M34
M32K6K4K2AM20
K32H4H2
AM14
F36
VCC_CORE69
VCC_CORE70
VCC_CORE71
VCC_CORE72
VSS71
VSS72
VSS73
VSS74
H36
H34
F26
F22
F34
F32
F28
F24
F20
VCC_CORE73
VCC_CORE74
VCC_CORE75
VCC_CORE76
VCC_CORE77
VCC_CORE78
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
F18
F14
F10F6F4F2AM16
F16
F12
D32
D28
AM10
VCC_CORE79
VCC_CORE80
VCC_CORE81
VCC_CORE82
VSS81
VSS82
VSS83
VSS84
D36
D34
D30
D24
D20
D16
D12D8D4D2B36
VCC_CORE83
VCC_CORE84
VCC_CORE85
VCC_CORE86
VCC_CORE87
VCC_CORE88
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
D26
D22
D18
D14
D10D6B34
B32
AM2
B28
VCC_CORE89
VCC_CORE90
VCC_CORE91
VCC_CORE92
VCC_CORE93
VSS91
VSS92
VSS93
VSS94
VSS95
AM12
B30
B26
B22
B24
B20
B16
VCC_CORE94
VCC_CORE95
VCC_CORE96
VSS96
VSS97
VSS98
B18
B14
B10B6B2
B12B8B4
AJ5
VCC_CORE97
VCC_CORE98
VCC_CORE99
VCC_CORE100
VCC_CORE101
BP0_CUT
BP1_CUT
BP2_CUT
BP3_CUT
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
AM4
AK6
AM6
VCCA_PLL VCORE
0 ~ 100 mA (50mA)
2.25 ~ 2.75 V
AC7
AJ23
VCC_Z
VCC_A
AA31
NC1
AC31
NC2
AE31
NC3
AG23
NC6
AG25
NC7
AG31
NC8
AG5
NC9
AJ11
NC10
AJ15
NC11
AJ17
NC12
AJ19
NC13
AJ27
NC15
AL11
NC16
AN11
NC17
AN9
NC18
G11
NC19
G13
NC20
G27
NC21
G29
NC22
G31
NC23
J31
NC24
J5
NC25
L31
NC27
N31
NC28
Q31
NC29
S31
NC30
S7
NC31
U31
NC32
U7
NC33
W31
NC34
W7
NC35
Y31
NC36
Y5
NC37
AG19
NC42
G21
NC43
AG21
NC44
G19
NC45
AN27
AL27
AN25
AL25
VSS_Z
AE7
U13B
N12-4620011-F02
C24
X_1000p
VCCA_PLL trace length from the regulator to
the PGA must less be 0.75"
Place all filters close to the PGA
Keep all power and signal trace away from
the regulator
Place a cut in GND plane around the
VCCA_PLL regulator circuit
U13C
AO1
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
N12-4620011-F02
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
YY10
AO2
AO3
AO4
YY1
YY2
YY3
YY4
YY5
YY6
YY7
YY8
YY9
For 1.5GHz CPU Fan Holes
THERMDP# {11}
THERMDN# {11}
YY24
YY23
YY22
YY21
YY20
YY19
YY18
YY17
YY16
YY15
YY14
YY13
YY12
YY11
XX1
XX2
CPU DECOUPLING CAPACITORS
VCORE VCORE VCORE VCORE VCORE VCORE VCORE
C97
39p
C98
39p
C169
39p
C31
39p
C180
39p
C127
39p
C85
39p
C176
39p
C45
A A
39p
C161
39p
C181
39p
C192
39p
C50
39p
C142
39p
C587
39p(S/S)
C586
39p(S/S)
C611
39p(S/S)
C591
39p(S/S)
C592
39p(S/S)
C593
39p(S/S)
C594
39p(S/S)
C595
39p(S/S)
C599
39p(S/S)
Put around inside plane of SocketA
on Bottom side
EMI Decoupling
C597
39p(S/S)
C602
39p(S/S)
C613
39p(S/S)
C605
39p(S/S)
C606
39p(S/S)
C607
39p(S/S)
C608
39p(S/S)
C609
39p(S/S)
C610
39p(S/S)
C614
39P(S/S)
C615
39p(S/S)
C588
39p(S/S)
C596
39p(S/S)
C620
39p(S/S)
C622
39p(S/S)
C621
39p(S/S)
VCORE
C618
56p(S/S)
C590
56p(S/S)
C604
56p(S/S)
C616
56p(S/S)
C619
56p(S/S)
C603
56p(S/S)
C617
56p(S/S)
C589
56p(S/S)
C612
56p(S/S)
VCC5 VCC3
C242 0.1u
C12 0.1u
C529 0.1u
C10 0.1u
C123
0.22u
C150
0.22u
C68
0.22u
C100
0.22u
C80
0.22u
C154
0.22u
C144
0.22u
C117
0.22u
C61
0.22u
C101
0.22u
C60
0.22u
C145
0.22u
C63
0.22u
C125
0.22u
C148
0.22u
C90
0.22u
C94
0.22u
C149
0.22u
C74
0.22u
C62
0.22u
VCC3 VCORE
VCC5 VCORE
C103
0.22u
C152
0.22u
C151
0.22u
C75
0.22u
C147
0.22u
C106
0.22u
C99
0.22u
C55
0.22u
C102
0.22u
C116
0.22u
C20 0.1u
C107 0.1u
C213 0.1u
VCC2_5
C6
0.1u
C17
0.1u
C22
0.1u
C347
0.1u
C26
0.1u
VCC5
C146
1 2
3 4
5 6
7 8
RN16
100
2.50V Reference
VR1
SC431CSK
Put inside SocketA
8
7
6
5
4
3
CPU PLL VOLTAGE BLOCK
(40mils trace / 60 mils space)
VCC_PLL
C138
39p
2
C157
0.1u
3 1
MSI
Title
Size Document Number Rev
Date: Sheet of
L6 80-0805
R91
0 39p
R97
X_0
Used when spec changed
C137
1000p
EC14
4.7u-0805
MICRO-STAR INt'L CO., LTD.
AMD Socket462 CPU (Power)
(MS-6597)
2
2.5V
Max 150 mA
Design for 100 mA
C131
C124
39p
39p
4 25 Monday, July 08, 2002
1
VCCA_PLL
0B
Page 5
8
CRUSH 18 HOST SIGNALS
D D
AIN#[2..14] {3} SDATA#[0..63] {3}
AOUT#[2..14] {3}
C C
DOCLK#[0..3] {3}
B B
Place close to C18
VCORE
A A
SLP_S3# {10,21} DLY_S3# {11}
8
AIN#[2..14]
AOUT#[2..14]
AOCLK# {3}
DOCLK#[0..3]
DIVAL# {3}
CPU_OK {3,20,21}
CPURST# {3}
PROCRDY {3}
CFWDRST {3}
CONNECT {3}
R792 45.3RST
R794 51.1RST
SS_CLKIN {10}
CPUREF_NB
R793 51.1RST
U24A
74LCX14-SOIC14
SLP_S3 DLY_S3
1 2 R506 X_8.2K R511 X_0
7
AIN#2
AC2
AF3
AG3
AC1
AE2
AD2
AF1
AH3
AF2
AE3
AH1
AH2
AG2
AF5
D1
D2
C4
C1
E3
A2
E4
A1
A3
E5
B3
C2
B2
D3
AE6
V5
T5
N6
AD3
AB5
N5
H4
AJ2
AJ3
AH5
AP9
AN9
AF4
AG5
AD4
AK2
AH6
AM6
AG6
AN8
AN3
AN4
AF6
AG4
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
AIN8
AIN9
AIN10
AIN11
AIN12
AIN13
AIN14
AINCLK
AOUT2
AOUT3
AOUT4
AOUT5
AOUT6
AOUT7
AOUT8
AOUT9
AOUT10
AOUT11
AOUT12
AOUT13
AOUT14
AOUTCLK
DICLK0
DICLK1
DICLK2
DICLK3
DOCLK0
DOCLK1
DOCLK2
DOCLK3
CPU_SDINVLD
CPU_PWRGD
CPU_RST
CPU_APIC_CLK_R
MCP_APIC_CLK_R
PROCRDY
CPU_CLKFWDRST
CPU_CONNECT
CPU_VREF
CPU_COMP
CPU_CAL_PU
CPU_CAL_PD
SSCLK_IN
BSEL0
BSEL1
HCLK
HCLK
AIN#3
AIN#4
AIN#5
AIN#6
AIN#7
AIN#8
AIN#9
AIN#10
AIN#11
AIN#12
AIN#13
AIN#14
SAICLK#
AOUT#2
AOUT#3
AOUT#4
AOUT#5
AOUT#6
AOUT#7
AOUT#8
AOUT#9
AOUT#10
AOUT#11
AOUT#12
AOUT#13
AOUT#14
AOCLK#
SDICLK#0
SDICLK#1
SDICLK#2
SDICLK#3
DOCLK#0
DOCLK#1
DOCLK#2
DOCLK#3
ACLK_CPU
ACLK_MCP
FSB_SEL0
FSB_SEL1
CCLK
CCLK#
S3 Delay Block
R501 0
7
BELONG TO CLKFWD GROUP[SADDIN] MATCH W/IN +/-10MILS OF GROUP 5/15, CLK:10/30
BELONG TO CLKFWD GROUP[SADDOUT] MATCH W/IN +/-10MILS OF GROUP 5/15, CLK:10/30
VCORE
AK5
AK4
AJ6
VTT
VTT
VTT
BELONG TO CLKFWD GROUP;MATCHED TO INDIVIDUAL CLKFWD GROUP
RESPECTIVELY.[SDATA0], [SDATA1], [SDATA2],[SDATA3] W/IN+/-10MILS OF GROUP
AJ5
AL6
AL5
AL4
AL3
AL2
AL1
AK6
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
HOST INTERFACE
NCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNC
C3L5H5M4U5W3R4V4AA6D5Y5J4M6
U24B
74LCX14-SOIC14
3 4
(3VDUAL) (3VDUAL)
C582
X_0.01u
6
AJ4
AM5
AM4
AM3
AM2
AM1
M9N9AD9
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
CRUSH18
PART 1
NC
AD5
AK3
AJ1
AE5
R5
6
P9R9T9U9V9
AE9
VTT
VTT
VTT
VTT
VTT
VDD_2P5
AM9
AL7
W9Y9AA9
VTT
VTT
VTT
VTT
VDD_3P3
VDD_3P3
AL8
C673 0.1u(S/S)
5
U26A
AB9
AC9
J12
J13
J14
SDATA#[0..63]
SDATA#0
AA3
D0
VTT
VTT
VTT
VTT
VTT
VTT
SDATA#1
V3
D1
SDATA#2
V2
D2
SDATA#3
W2
D3
SDATA#4
U3
D4
SDATA#5
U2
D5
SDATA#6
T3
D6
SDATA#7
T2
D7
SDATA#8
Y1
D8
SDATA#9
AC3
D9
SDATA#10
AA2
D10
SDATA#11
AB3
D11
SDATA#12
Y3
D12
SDATA#13
Y2
D13
SDATA#14
AB2
D14
SDATA#15
U1
D15
SDATA#16
R2
D16
SDATA#17
R3
D17
SDATA#18
P1
D18
SDATA#19
L3
D19
SDATA#20
K3
D20
SDATA#21
L1
D21
SDATA#22
K2
D22
SDATA#23
L2
D23
SDATA#24
P3
D24
SDATA#25
M3
D25
SDATA#26
N3
D26
SDATA#27
P2
D27
SDATA#28
N2
D28
SDATA#29
M2
D29
SDATA#30
J2
D30
SDATA#31
J3
D31
SDATA#32
W6
D32
SDATA#33
U4
D33
SDATA#34
T6
D34
SDATA#35
P5
D35
SDATA#36
L6
D36
SDATA#37
M5
D37
SDATA#38
R6
D38
SDATA#39
K5
D39
SDATA#40
Y4
D40
SDATA#41
AA5
D41
SDATA#42
AA4
D42
SDATA#43
Y6
D43
SDATA#44
U6
D44
SDATA#45
W5
D45
SDATA#46
L4
D46
SDATA#47
P4
D47
SDATA#48
F2
D48
SDATA#49
J5
D49
SDATA#50
G5
D50
SDATA#51
F1
D51
SDATA#52
F4
D52
SDATA#53
E2
D53
SDATA#54
G6
D54
SDATA#55
F5
D55
SDATA#56
H3
D56
SDATA#57
J6
D57
SDATA#58
H1
D58
SDATA#59
H2
D59
SDATA#60
G3
D60
SDATA#61
H6
D61
SDATA#62
G2
D62
SDATA#63
F3
CPU_FID0
CPU_FID1
CPU_FID2
CPU_FID3
CRUSH18
VCC3 VCC2_5
D63
FID0
AC5
FID1
AC6
FID2
AD6
FID3
AC4
FSB Selection
VCORE
FSB_SEL1 FSB_SEL0
R798 1.2K
R127 X_10K
B_SEL1 {10}
B_SEL0 {10}
5
B_SEL1
B_SEL0
R120 X_1.2K
R111 10K
R799 X_10K
R124 X_10K
4
FID[0..3] {3}
FSB_SEL1
FSB_SEL0
4
070702
3
2
SYSTEM DATA-IN-CLK NOISE L/C BLOCK
SAICLK#
SDICLK#0
SDICLK#1 SICLK#1
L79 10nH L80 10nH
SDICLK#2
L81 10nH
SDICLK#3 DICLK#3
SICLK#
L76 10nH L75 10nH
C849 5p
SICLK#0
L78 10nH L77 10nH
C850 5p
C648 5p
SICLK#2
L82 10nH
C649 5p
SICLK#3
L84 10nH L83 10nH
C650 5p
CLK must less DATA 1.5inchs
(Place in middle of Bus)
VID Selector Block
VIDB0
BASS0
BASS1
BASS0
BASS1
BASS3
BASS2
BASS4
VCC2_5
VIDB3
BASS3
VIDB4
BASS4
+
EC4
10u-16V
VIDA0 VIDB2
Q1
YFET-NDS7002AS
VIDA1 VIDB1
Q2
YFET-NDS7002AS
1 2
RN1
3 4
4.7K
5 6
7 8
R3 4.7K
VIDA[0..4] {3}
VIDB[0..4] {11,22}
VIDA3
Q4
YFET-NDS7002AS
VIDA4
Q8
YFET-NDS7002AS
Place close to C18
C18 Decoupling Caps
VCORE
C662
0.1u(S/S)
C664
0.1u(S/S)
C666
0.1u(S/S)
C668
0.1u(S/S)
C670
0.1u(S/S)
C855
1u-0805(S/S)
MSI
Title
Size Document Number Rev
3
Date: Sheet of
APICCLK_CPU {3}
APICCLK_MCP {9}
CPUCLK {3}
CPUCLK# {3}
C18 VREF Volatge
CPUREF_NB
MICRO-STAR INt'L CO., LTD.
Crush18 Host & VID Signals
(MS-6595)
2
DICLK#0
DICLK#1
DICLK#2
BASS2
VIDA0
VIDA1
VIDA3
VIDA2
VIDA4
R5 10K
VIDB0
VIDB1
VIDB2
VIDB3
VIDB4
R1 4.7K
C651 10p
R789 22
R790 22
C652 10p
R791 22
C655 10p
R795 22
C660 10p
Set PO_VREF to
50% of VCORE
C680
C679 R797
0.1u 1000p
H/W Project Leader : Joey Lee
H/W Project Engineer : Richard Shih
1
AICLK# {3}
DICLK#[0..3] {3}
Q3
YFET-NDS7002AS
VCORE
R796
121RST
121RST
5 25 Monday, July 08, 2002
1
VIDA2
1 2
RN7
3 4
10K
5 6
7 8
7 8
RN2
5 6
4.7K1 23 4
ACLK_CPU
ACLK_MCP
CCLK
CCLK#
VCC2_5
VCC3
0A
Page 6
8
7
6
5
4
3
2
1
CRUSH 18 MEMORY A SIGNALS
MEM_STR
D D
C C
W31
AC31
AD32
W32
B B
AA33
AB31
AD33
AE31
AH31
AG31
AE32
AD31
AF31
AH32
AB32
AF33
AC33
AG32
A A
A8
A11
A14
A17
A20
A23
A26
A29D8D11
D14
D17
D20
D23
D26
D29
E29
E30
E31
E36
F33
H36
K33
K36
N33
N36
T33
T36
W33
W36
AB33
AB36
AE33
VCCM
VCCM
GND
GND
K6
VCCM
VCCM
GND
GND
L32
AE36
VCCM
VCCM
VCCM
GND
GND
GND
L36N1N4P6P32
D6
MA_D0
E6
MA_D1
E8
MA_D2
D9
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
LDT Signals
GND
GND
GND
GND
GND
GND
F31
F36
G31G4H31
H33K1K4
VCCM
GND
MA_D3
C5
MA_D4
D7
MA_D5
F8
MA_D6
E10
MA_D7
D10
MA_D8
F11
MA_D9
F14
MA_D10
D16
MA_D11
F9
MA_D12
D12
MA_D13
F13
MA_D14
E14
MA_D15
F16
MA_D16
F17
MA_D17
E20
MA_D18
E22
MA_D19
D15
MA_D20
D18
MA_D21
E19
MA_D22
D21
MA_D23
F23
MA_D24
F24
MA_D25
D28
MA_D26
F27
MA_D27
D24
MA_D28
E23
MA_D29
F26
MA_D30
D27
MA_D31
J32
MA_D32
G33
MA_D33
K31
MA_D34
M32
MA_D35
H32
MA_D36
J31
MA_D37
J33
MA_D38
L31
MA_D39
R32
MA_D40
N31
MA_D41
V32
MA_D42
U33
MA_D43
M31
MA_D44
P31
MA_D45
V33
MA_D46
V31
MA_D47
MA_D48
Y31
MA_D49
MA_D50
MA_D51
MA_D52
Y33
MA_D53
MA_D54
MA_D55
MA_D56
MA_D57
MA_D58
MA_D59
MA_D60
MA_D61
MA_D62
MA_D63
F7
MA_DQM0
D13
MA_DQM1
F19
MA_DQM2
F25
MA_DQM3
K32
MA_DQM4
T32
MA_DQM5
MA_DQM6
MA_DQM7
E7
MA_DQS0
E11
MA_DQS1
E17
MA_DQS2
D25
MA_DQS3
L33
MA_DQS4
U31
MA_DQS5
MA_DQS6
MA_DQS7
GND
GND
GND
GND
GND
GND
GND
A9
A12
A15
A18
A21
A24
A27B1D4
8
CRUSH18
PART 2
SYSTEM MEMORY A
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
D32
D33E1E9
E12
E15
E18
E21
E24
E27
E33F6F29
F30
7
AH33
AH36A5C33
VCCM
GND
VCCM
VCCM
VCCM
MA_CLK0
MA_CLK0
MA_CLK1
MA_CLK1
MA_CLK2
MA_CLK2
MA_CKE0
LDT_RXD0
LDT_RXD1
LDT_RXD2
LDT_RXD3
LDT_RXD4
LDT_RXD5
LDT_RXD6
LDT_RXD7
LDT_RXD8
LDT_TXD0
LDT_TXD1
LDT_TXD2
LDT_TXD3
LDT_TXD4
LDT_TXD5
LDT_TXD6
LDT_TXD7
LDT_TXD8
LDT_RXCLK
LDT_RXCLK
LDT_RXD0
LDT_RXD1
LDT_RXD2
LDT_RXD3
LDT_RXD4
LDT_RXD5
LDT_RXD6
LDT_RXD7
LDT_RXD8
LDT_TXD0
LDT_TXD1
LDT_TXD2
LDT_TXD3
LDT_TXD4
LDT_TXD5
LDT_TXD6
LDT_TXD7
LDT_TXD8
LDT_TXCLK
LDT_TXCLK
LDT_RST
LDT_RSET
GND
GND
GND
P36T1T4
6
AK33
MAA0
MAA1
VCCM
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
MA_BA0
MA_BA1
MA_CS0
MA_CS1
MA_RAS
MA_CAS
MA_WE
GND
U32
GND
U36
U26B
GND
E32
E28
F28
E25
E26
D22
F22
F20
F21
D19
F32
F18
E16
F10
N32
G32
R31
T31
D30
D31
F12
E13
AA31
AA32
M33
R33
P33
F15
AR25
AL25
AN27
AR28
AT26
AR24
AR27
AM28
AP28
AT34
AN31
AP31
AL29
AL26
AT32
AP30
AT29
AN30
AN26
AN25
AP25
AM25
AM27
AP27
AR26
AP24
AT27
AN28
AR29
AT35
AP32
AR31
AL28
AL27
AR32
AR30
AT30
AN29
AT33
AR33
AR9
AT36
CRUSH18
LDT_RSET
LDT_RXD0 {9}
LDT_RXD1 {9}
LDT_RXD2 {9}
LDT_RXD3 {9}
LDT_RXD4 {9}
LDT_RXD5 {9}
LDT_RXD6 {9}
LDT_RXD7 {9}
LDT_RXD8 {9}
LDT_TXD0 {9}
LDT_TXD1 {9}
LDT_TXD2 {9}
LDT_TXD3 {9}
LDT_TXD4 {9}
LDT_TXD5 {9}
LDT_TXD6 {9}
LDT_TXD7 {9}
LDT_TXD8 {9}
LDT_RX_CLK {9}
LDT_RX_CLK# {9}
LDT_RXD#0 {9}
LDT_RXD#1 {9}
LDT_RXD#2 {9}
LDT_RXD#3 {9}
LDT_RXD#4 {9}
LDT_RXD#5 {9}
LDT_RXD#6 {9}
LDT_RXD#7 {9}
LDT_RXD#8 {9}
LDT_TXD#0 {9}
LDT_TXD#1 {9}
LDT_TXD#2 {9}
LDT_TXD#3 {9}
LDT_TXD#4 {9}
LDT_TXD#5 {9}
LDT_TXD#6 {9}
LDT_TXD#7 {9}
LDT_TXD#8 {9}
LDT_TX_CLK {9}
LDT_TX_CLK# {9}
LDT_RST# {9}
R804 49.9RST
Place close to C18
5
R480 10KST
PWOK {20}
R488
14.7KST
R481 4.75KST Q41
VCORE
R490
30.1KST
R478 12.1KST
VDD
R487
30.1KST
Decoupling capacitors
MEM_STR
4
C683
0.1u
C685
0.1u
C690
0.1u
C695
0.1u
C700
0.1u
C705
0.1u
C707
0.1u
C709
0.1u
C711
0.1u(S/S)
C715
0.1u
C717
0.1u
5VSB
R479
10K
C574
1u
C571
2.2u
C572
1u
MEM_STR
YFET-NDS7002AS
R483 4.7K
Q43
2N3904S
2N3904S
Q42
2N3904S
PLL Delay Block
+12V
R507
10K
Q40
C573
1000p
C684
0.1u
C686
0.1u
C691
0.1u
C696
0.1u
C701
0.1u
C706
0.1u
C708
0.1u
C710
0.1u
C714
0.1u
C716
0.1u
C718
0.1u
3
VCC3
C575
1000p
R414 X_0
CP13 X_COPPER
FB9 X_80-0805
C494
C488
0.1u
4.7u-0805
C585
1000p
C270
VCC3
R505
4.7K
C576
0.33u
C561
0.33u
VCC3
VDD_PLL_NB
R508 1K
Q45
2N3904S
Q39
2N3904S
3VDUAL
C492
0.1u
Pop R800 for A2
R800
X_0
C259
0.1u 4.7u-0805
CLOSE TO C18
VDD_PLL_MCP {9}
CLOSE TO MCP2
VDD_PLL_NB {8}
Q38
2N3904S
C579
1u
R411 0
VCC3
R510 56.2KST
Q37
YFET-NDS7002AS
Q44
YFET-NDS7002AS
CP8 X_COPPER
FB5 X_80-0805
C281
0.1u
R486 18.7KST
R495
10KST
R512
30.1KST
C18 Decoupling capacitors
VDDQ
C702
0.1u
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
Crush18 Memory-A & LDT & PLL Delay Signals
2
MEM_STR VDDQ
0.1u(S/S)
H/W Project Leader : Joey Lee
H/W Project Engineer : Richard Shih
(MS-6595)
C689
0.1u C693
C694
0.1u
C699
0.1u
C704
0.1u
6 25 Monday, July 08, 2002
PLL_RST {20}
0A
1
Page 7
8
7
6
5
4
3
2
1
CRUSH 18 MEMORY SIGNALS
VDD
U26D
J15
J16
J17
J18
J19
J20
J21
J22
J23
AH25
P28
R28
T28
U28
V28
W28
Y28
AA28
AB28
AC28
AH22
AH23
AR36
N28
AD28
AE28
AH24
J24
J25
M28
AJ31
AJ32
AK31
AK32
AL30
AL31
AL32
AL33
VDD
GND
U15
VDD
GND
U16
VDD
VDD
VDD
VDD
VDD
MB_CKE0
MC_CKE0
MB_CLK0
MB_CLK0
MB_CLK1
MB_CLK1
MB_CLK2
MB_CLK2
MC_CLK0
MC_CLK0
MC_CLK1
MC_CLK1
MC_CLK2
MC_CLK2
M_STR_ENABLE
GND
GND
GND
GND
GND
U17
U18
U19
U20
5
AM30
MB_A0
VDD
MB_A1
MB_A2
MB_A3
MB_A4
MB_A5
MB_A6
MB_A7
MB_A8
MB_A9
MB_A10
MB_A11
MB_A12
MB_A13
MB_BA0
MB_BA1
MB_RAS
MB_CAS
MB_WE
MC_A0
MC_A1
MC_A2
MC_A3
MC_A4
MC_A5
MC_A6
MC_A7
MC_A8
MC_A9
MC_A10
MC_A11
MC_A12
MC_A13
MC_BA0
MC_BA1
MC_RAS
MC_CAS
MC_WE
MB_CS0
MB_CS1
MC_CS0
MC_CS1
M_VERF
GND
U21
U22
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
GND
U23
GND
E34
B35
D34
A33
B32
C28
C30
B24
B26
B23
F34
C22
B18
C9
M35
G34
R35
W34
T35
C17
E35
B36
A35
B33
A32
B28
C29
C25
C26
B22
F35
B21
B19
B9
N34
G35
R34
W35
U34
B17
V35
Y35
V34
Y34
C35
C36
C14
B14
AF35
AF34
D35
D36
C13
B13
AG35
AG34
AJ33
AG33
AM31
AM32
AM33
AN32
AN33
AP33
AP34
AR34
AR35
CRUSH18
MA_RB0
MA_RB1
MA_RB2
MA_RB3
MA_RB4
MA_RB5
MA_RB6
MA_RB7
MA_RB8
MA_RB9
MA_RB10
MA_RB11
MA_RB12
MA_RB13
R826 0
R827 0
R828 0
MA_RC0
MA_RC1
MA_RC2
MA_RC3
MA_RC4
MA_RC5
MA_RC6
MA_RC7
MA_RC8
MA_RC9
MA_RC10
MA_RC11
MA_RC12
MA_RC13
R829 0
R830 0
R832 0
R834 0
R835 0
R836 0
R837 0
MCLK_B0
MCLK_B#0
MCLK_B1
MCLK_B#1
MCLK_B2
MCLK_B#2
MCLK_C0
MCLK_C#0
MCLK_C1
MCLK_C#1
MCLK_C2
MCLK_C#2
DDR_VREF_C18
PRST#1
R839 3.3K
R841 10K
VDD
4
D D
C C
B B
A A
MDQ_B[0..63] {14}
MDQM_B[0..7] {14}
MDQS_B[0..7] {14}
8
MDQ_B0
MDQ_B1
MDQ_B2
MDQ_B3
MDQ_B4
MDQ_B5
MDQ_B6
MDQ_B7
MDQ_B8
MDQ_B9
MDQ_B10
MDQ_B11
MDQ_B12
MDQ_B13
MDQ_B14
MDQ_B15
MDQ_B16
MDQ_B17
MDQ_B18
MDQ_B19
MDQ_B20
MDQ_B21
MDQ_B22
MDQ_B23
MDQ_B24
MDQ_B25
MDQ_B26
MDQ_B27
MDQ_B28
MDQ_B29
MDQ_B30
MDQ_B31
MDQ_B32
MDQ_B33
MDQ_B34
MDQ_B35
MDQ_B36
MDQ_B37
MDQ_B38
MDQ_B39
MDQ_B40
MDQ_B41
MDQ_B42
MDQ_B43
MDQ_B44
MDQ_B45
MDQ_B46
MDQ_B47
MDQ_B48
MDQ_B49
MDQ_B50
MDQ_B51
MDQ_B52
MDQ_B53
MDQ_B54
MDQ_B55
MDQ_B56
MDQ_B57
MDQ_B58
MDQ_B59
MDQ_B60
MDQ_B61
MDQ_B62
MDQ_B63
MDQM_B0
MDQM_B1
MDQM_B2
MDQM_B3
MDQM_B4
MDQM_B5
MDQM_B6
MDQM_B7
MDQS_B0
MDQS_B1
MDQS_B2
MDQS_B3
MDQS_B4
MDQS_B5
MDQS_B6
MDQS_B7
AB34
AC34
AB35
AC35
AD34
AE34
AJ35
AK35
AD35
AE35
AJ34
AK34
AL36
AM34
AN35
AP35
AL34
AL35
AM35
AP36
AA34
AH34
AM36
AA35
AH35
AN36
B4
MB_D0
C6
MB_D1
B7
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
GND
AP29
GND
AT11
GND
GND
AT14
GND
AT17
GND
AT20
VDD
GND
AT24
U14
MB_D2
B8
MB_D3
A4
MB_D4
B5
MB_D5
C7
MB_D6
C8
MB_D7
C10
MB_D8
C11
MB_D9
C16
MB_D10
B16
MB_D11
B10
MB_D12
C12
MB_D13
C15
MB_D14
B15
MB_D15
C19
MB_D16
C20
MB_D17
C24
MB_D18
C27
MB_D19
C18
MB_D20
B20
MB_D21
B25
MB_D22
B27
MB_D23
B29
MB_D24
B30
MB_D25
C34
MB_D26
B34
MB_D27
A30
MB_D28
C31
MB_D29
A34
MB_D30
A36
MB_D31
H34
MB_D32
J35
MB_D33
L34
MB_D34
N35
MB_D35
H35
MB_D36
J34
MB_D37
L35
MB_D38
M34
MB_D39
P35
MB_D40
U35
MB_D41
MB_D42
MB_D43
P34
MB_D44
T34
MB_D45
MB_D46
MB_D47
MB_D48
MB_D49
MB_D50
MB_D51
MB_D52
MB_D53
MB_D54
MB_D55
MB_D56
MB_D57
MB_D58
MB_D59
MB_D60
MB_D61
MB_D62
MB_D63
A6
MB_DQM0
B12
MB_DQM1
C23
MB_DQM2
C32
MB_DQM3
K35
MB_DQM4
MB_DQM5
MB_DQM6
MB_DQM7
B6
MB_DQS0
B11
MB_DQS1
C21
MB_DQS2
B31
MB_DQS3
K34
MB_DQS4
MB_DQS5
MB_DQS6
MB_DQS7
GND
GND
GND
GND
GND
GND
V6W1W4
Y32
Y36
AB1
7
CRUSH18
PART 4
SYSTEM MEMORY B
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
AB4
AB6
AC32
AC36
AE1
AE4
AF32
AF36
AH4
AJ36
AM8
AM11
AM14
AM17
AM20
AM23
AM26
AM29
AN34
6
GND
AP4
GND
AP26
DDR REFENCE VOLTAGE
MEM_STR
R787
121RST
DDR_VREF_C18
R788
121RST
Put near pin AJ33 of C18
30mils Trace/45mils Space
MBA_B0 {14}
MBA_B1 {14}
MRAS_B# {14}
MCAS_B# {14}
MWE_B# {14}
MCKE_B {14}
MBA_C0 {14}
MBA_C1 {14}
MRAS_C# {14}
MCAS_C# {14}
MWE_C# {14}
MCKE_C {14}
MCS_B#0 {14}
MCS_B#1 {14}
MCS_C#0 {14}
MCS_C#1 {14}
MCLK_B0 {14}
MCLK_B#0 {14}
MCLK_B1 {14}
MCLK_B#1 {14}
MCLK_B2 {14}
MCLK_B#2 {14}
MCLK_C0 {14}
MCLK_C#0 {14}
MCLK_C1 {14}
MCLK_C#1 {14}
MCLK_C2 {14}
MCLK_C#2 {14}
PCIRST#0 {9,11}
MA_B[0..13] {14}
MA_C[0..13] {14}
MA_B[0..13]
MA_C[0..13]
C719
0.1u
C720
0.1u
3
Title
Size Document Number Rev
Date: Sheet of
DDR Terminational Resisitors
MDQ_B16
R805 100
MDQ_B17
R806 100
MDQ_B18
R807 100
MDQ_B19
R808 100
MDQ_B20
R809 100
MDQ_B21
R810 100
MDQ_B22
R811 100
MDQ_B23
R812 100
MDQ_B41
R813 100
MDQ_B42
R814 100
MDQ_B45
R815 100
MDQ_B46
R816 100
MDQ_B52
R817 100
MDQ_B53
R818 100
MDQS_B2
R819 100
MDQS_B3
R820 100
MDQS_B5
R821 100
MDQM_B1
R822 100
MDQM_B2
R823 100
MDQM_B3
R824 100
MDQM_B5
R825 100
MDQ_B24
1 2
MDQ_B28
MDQ_B29
MDQ_B25
MDQ_B30
MDQ_B26
MDQ_B27
MDQ_B31
MDQ_B32
MDQ_B36
MDQ_B33
MDQ_B37
MDQS_B4
MDQ_B34
MDQM_B4
MDQ_B38
MDQ_B39
MDQ_B35
MDQ_B40
MDQ_B44
MCKE_C
MCKE_B
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
R831 100
R833 100
RN104
100
RN106
100
RN108
100
RN110
100
RN112
100
DDR Dampping Resisitors
MA_B0
7 8
MA_C0
5 6
MA_B10
3 4
MA_C10
1 2
MA_C2
7 8
MA_B2
5 6
MA_B1
3 4
MA_C1
1 2
MA_B5
7 8
MA_C5
5 6
MA_C6
3 4
MA_B6
1 2
R838 0
R840 0
MA_B4 MA_RB4
7 8
MA_C3
5 6
MA_C4
3 4
MA_B3
1 2
MA_B7
7 8
MA_C7
5 6
MA_C8
3 4
MA_B8
1 2
MA_C11
7 8
MA_B11
5 6
MA_C9
3 4
MA_B9
1 2
R842 0
R843 0
MSI
MICRO-STAR INt'L CO., LTD.
Crush18 Memory-B Signals
(MS-6595)
2
MDQ_B14
1 2
MDQ_B15
MDQ_B10
MDQ_B11
MDQ_B0
MDQ_B4
MDQ_B1
MDQS_B0
MDQ_B5
MDQ_B6
MDQM_B0
MDQ_B2
MDQ_B7
MDQ_B3
MDQ_B8
MDQ_B9
MDQS_B1
MDQ_B13
MDQ_B12
MDQ_B43
MDQ_B47
MDQ_B48
MDQ_B49
MDQ_B55
MDQM_B6
MDQ_B54
MDQS_B6
MDQ_B61
MDQ_B60
MDQ_B50
MDQM_B7
MDQ_B51
MDQ_B63
MDQ_B62
MDQ_B56
MDQ_B57
MDQ_B58
MDQS_B7
MDQ_B59
MA_RB0
MA_RC0
RN114
MA_RB10
0
MA_RC10
MA_RC2
MA_RB2
RN115
MA_RB1
0
MA_RC1
MA_RB5
MA_RC5
RN116
MA_RC6
0
MA_RB6
MA_RC12 MA_C12
MA_RC13 MA_C13
MA_RC3
RN117
MA_RC4
0
MA_RB3
MA_RB7
MA_RC7
RN118
MA_RC8
0
MA_RB8
MA_RC11
MA_RB11
RN119
MA_RC9
0
MA_RB9
MA_B12 MA_RB12
MA_B13 MA_RB13
H/W Project Leader : Joey Lee
H/W Project Engineer : Richard Shih
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
7 25 Monday, July 08, 2002
1
RN78
100
RN100
100
RN101
100
RN102
100
RN103
100
RN105
100
RN107
100
RN109
100
RN111
100
RN113
100
VTT_DDR2 VTT_DDR2
0A
Page 8
8
7
6
5
4
3
2
1
CRUSH 18 AGP & VIDEO SIGNALS
VDDQ VCC3
AN21
AN18
AN15
AN12
AT12
AT15
AT18
AT21
AT23
AH19
AH20
AH21
AH12
AH13
VDDQ
VDDQ
AGP 8X
GND
GND
P19
P20
P21
GND
P22
GND
P23
VCC3
VCC3
GND
GND
T14
AH14
VCC3
GND
T15
D D
Place close to C18
PCIRST#0 {9,11}
PIRQ#E {15,16}
C C
B B
A A
VDD_PLL_NB {6}
Y7
YCRY27H-D
20p C738
20p C741
8
R847 124RST
C732 0.01u
R853 124RST
C735 0.01u
XTAL_IN_27M
XTAL_OUT_27M
VSYNC
HSYNC
RED_A
BLUE_A
GREEN_A
RSETA
DVREFA
GND_DACA
VDD_DACA
VSYNC_B
HSYNC_B
TV_C
TV_Y
RSETB
DVREFB
GND_DACB
VDD_DACB
PCIRST#0
PIRQ#E
XTAL_IN_27M
XTAL_OUT_27M
TEST
VDD_PLL_NB
1000p C736
AA14
AA15
AA16
AA17
AA18
AA19
AA20
AA21
AA22
AA23
AB14
AB15
AB16
AB17
AB18
AB19
AB20
AB21
AB22
AB23
AC14
AC15
AC16
AC17
AC18
AC19
AC20
AC21
AC22
AC23
AR6
AT6
AT1
AT2
AT3
AT4
AR3
AR5
AT5
AP5
AN5
AN2
AP1
AR1
AP2
AP3
AN1
AR2
AP8
AP7
AN6
AP6
AM7
AR4
Y14
Y15
Y16
Y17
Y18
Y19
Y20
Y21
Y22
Y23
R14
R15
R16
R17
R18
R19
R20
R21
R22
R23
V14
V15
V16
V17
V18
V19
V20
V21
V22
V23
7
DACA_VSYNC
DACA_HSYNC
DACA_RED
DACA_BLUE
DACA_GREEN
DACA_RESET
DACA_VREF
DACA_GND
DACA_VDD
DACB_VSYNC
DACB_HSYNC
DACB_RED
DACB_BLUE
DACB_GREEN
DACB_RESET
DACB_VREF
DACB_GND
DACB_VDD
PCI_RST
INTR_OUT
XTAL_IN
XTAL_OUT
TEST
VDD_PLL
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
W14
GND
W15
GND
W16
GND
W17
GND
W18
GND
W19
VDDQ
VDDQ
GND
GND
W20
VDDQ
GND
W21
VDDQ
VDDQ
VDDQ
VDDQ
CRUSH18
PART 3
AGP 8X,
VIDEO
GND
GND
GND
GND
W22
W23
P14
P15
P16
VDDQ
VDDQ
GND
GND
P17
VDDQ
GND
P18
6
AH15
VCC3
GND
T16
AH16
T17
AH17
AH18
VCC3
VCC3
VCC3
G_FRAME
G_DEVSEL
G_SBSTBF
G_SBSTBS
G_ADSTBF0
G_ADSTBS0
G_ADSTBF1
G_ADSTBS1
G_CAL_PU
G_CAL_PD
G_GC_8XDET
GND
GND
GND
T18
T19
T20
U26C
GBE0
GBE1
GBE2
GBE3
G_IRDY
G_TRDY
G_REG
G_GNT
G_STOP
G_PAR
G_RBF
G_WBF
G_ST0
G_ST1
G_ST2
G_SBA0
G_SBA1
G_SBA2
G_SBA3
G_SBA4
G_SBA5
G_SBA6
G_SBA7
G_VREF
G_CLK
G_DBI1
G_DBI0
GND
GND
T21
T22
GD10
GD11
GD12
GD13
GD14
GD15
GD16
GD17
GD18
GD19
GD20
GD21
GD22
GD23
GD24
GD25
GD26
GD27
GD28
GD29
GD30
GD31
GND
GD0
GD1
GD2
GD3
GD4
GD5
GD6
GD7
GD8
GD9
T23
GND
CRUSH18
AN23
AM24
AL24
AL23
AM22
AN22
AM21
AL22
AM19
AL19
AN19
AM18
AL18
AN17
AL16
AN16
AR22
AR21
AP21
AP20
AR20
AP19
AR19
AP18
AR16
AP16
AR15
AP15
AR14
AP14
AP13
AR13
AL20
AM16
AP22
AR18
AR23
AP23
AM15
AT9
AR10
AL15
AL14
AL17
AP11
AL10
AP10
AR11
AL9
AM12
AL12
AL21
AN20
AR17
AP17
AN11
AM10
AL11
AN10
AL13
AM13
AN14
AN13
AN24
AR8
AR12
AP12
AR7
AN7
AT8
5
GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31
GC_BE#0
GC_BE#1
GC_BE#2
GC_BE#3
ST0
ST1
ST2
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
R856 22
R857 51.1
R858 51.1
AGP_8XDET
10p C761
GAD[0..31] {15}
GC_BE#[0..3] {15}
GFRAME# {15}
GIRDY# {15}
GTRDY# {15}
GREQ# {15}
GGNT# {15}
GSTOP# {15}
GDEVSEL# {15}
GPAR {15}
RBF# {15}
WBF# {15}
ST[0..2] {15}
SB_STB {15}
SB_STB# {15}
AD_STB0 {15}
AD_STB#0 {15}
AD_STB1 {15}
AD_STB#1 {15}
SBA[0..7] {15}
AGPVERF_NB {15}
AGPCLK {15}
DBIH {15}
DBIL {15}
VDDQ
AGP_8XDET{15}
4
VDD_DACA VDD_DACB
C721 C722
GND_DACA
1000p
L85
80-0805
C723 C726
0.1u 4.7u-0805
C724
0.1u 1000p
070702
RED_A
GREEN_A
BLUE_A
HSYNC
VSYNC
R844 X_75RST
R845 X_75RST
R848 X_75RST
R850 33
R852 33
CRT_R {17}
CRT_G {17}
CRT_B {17}
CRT_HSYNC {17}
CRT_VSYNC {17}
TV OUT Circuit
VCC3
D27
2
BAV99
3
BAV99
1
R854
C740
75
270p
VCC3
D28
2
3
1
R855
C744
75
270p
VDD
C747
0.1u
C770
0.1u
C772
0.1u
C773
0.1u
MSI
Title
Size Document Number Rev
Date: Sheet of
2
TV_Y
TV_C CHROMA
VDD VDD
C749
0.1u(S/S)
C754
0.1u(S/S)
C759
0.1u(S/S)
C748
0.1u(S/S)
C753
0.1u(S/S)
C758
0.1u(S/S)
C766
0.1u(S/S)
3
L86
GND_DACB
C737 22p
L87
1 2
1.8u-10%_0805
C742 22p
L88
1 2
1.8u-10%_0805
C725 C728
HSYNC_B
VSYNC_B
TEST
D2x3-1:6-BK-A
C745
0.1u(S/S)
MICRO-STAR INt'L CO., LTD.
80-0805
C727
0.1u
R846 1.21K
C731 22p
R849 1.21K
C734 22p
R851 10K
LUMA
C739
330p
JTV1
C743
330p
VCC3
C751
0.1u(S/S)
C756
0.1u
H/W Project Leader : Joey Lee
H/W Project Engineer : Richard Shih
Crush18 AGP & VIDEO Signals
(MS-6595)
8 25 Monday, July 08, 2002
VCC3 VCC3
0.1u 4.7u-0805
070502
VCC3
2 531
2 531
4
4
0A
1
Page 9
8
MCP2 CPU & PCI & LDT & IDE SIGNALS
AA22
AC25
AC26
AA25
AA24
AA26
AB24
AA23
AD26
AB25
AC23
AC24
AE26
AD21
AE22
AB21
AD22
AB20
AC21
AF20
AE20
AC19
AD19
AD18
AD20
AB19
AF19
AC17
AE19
G4
G2
Y24
W22
Y23
U26
U24
U25
T25
R25
E17
M3
M4
M5
M2
M1
E12
D14
B12
A13
C14
B14
C15
D15
A15
B15
A14
E14
C13
A12
E13
D12
A10
A11
E10
C10
C12
D11
E11
C11
B11
A20M# {3}
FERR# {3}
IGNNE# {3}
CPUINIT# {3}
INTR {3}
NMI {3}
SMI# {3}
AD[0..31] {16}
LDT_TX_CLK {6}
LDT_TX_CLK# {6}
PDD[0..15] {17}
CPURST# {3}
R334 49.9RST
LDT_TXD0 {6}
LDT_TXD#0 {6}
LDT_TXD1 {6}
LDT_TXD#1 {6}
LDT_TXD2 {6}
LDT_TXD#2 {6}
LDT_TXD3 {6}
LDT_TXD#3 {6}
LDT_TXD4 {6}
LDT_TXD#4 {6}
LDT_TXD5 {6}
LDT_TXD#5 {6}
LDT_TXD6 {6}
LDT_TXD#6 {6}
LDT_TXD7 {6}
LDT_TXD#7 {6}
LDT_TXD8 {6}
LDT_TXD#8 {6}
PD_A0 {17}
PD_A1 {17}
PD_A2 {17}
PD_CS#1 {17}
PD_CS#3 {17}
PD_INTR {17}
PD_DREQ {17}
PD_DACK# {17}
PD_IOR# {17}
PD_IOW# {17}
PD_IORDY {17}
8
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
PCLK0
PCLK1
PCLK2
PCLK3
PCLK4
PCLK6
LDT_RSETM
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
D D
C C
B B
A A
F3
F4
E4
H5
E3
E1
L2
L3
P4
P5
P1
P2
N1
N2
N4
N5
R5
R4
R3
T3
R1
R2
C9
E9
U16A
A20M#
FERR#
IGNNE#
INIT#
INTR
NMI
SMI#
CPURST#
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
PCI_CLK0
PCI_CLK1
PCI_CLK2
PCI_CLK3
PCI_CLK4
PCI_CLK6
LDT_RSET
LDT_RXCK
LDT_RXCK#
LDT_RXD0
LDT_RXD0#
LDT_RXD1
LDT_RXD1#
LDT_RXD2
LDT_RXD2#
LDT_RXD3
LDT_RXD3#
LDT_RXD4
LDT_RXD4#
LDT_RXD5
LDT_RXD5#
LDT_RXD6
LDT_RXD6#
LDT_RXD7
LDT_RXD7#
LDT_RXD8
LDT_RXD8#
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PDA0
PDA1
PDA2
PDCS1#
PDCS3#
PDINTR
PDDREQ
PDDACK#
PDIOR#
PDIOW#
PDIORDY
MCP-2
7
7
CPU
CPUSLP#/GPIO18
A20GATE/GPIO12
KBRDRSTIN#/GPIO25
PCI
PERR#/GPIO2
PCI_INTE#/GPIO3
PCI_REQ4#/GPIO0
PCI_GNT4#/GPIO1
LDT
IDE
APIC_CLK
APIC_DATA0
APIC_DATA1
STPCLK#
CBE#0
CBE#1
CBE#2
CBE#3
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
SERR#
PCI_INTA#
PCI_INTB#
PCI_INTC#
PCI_INTD#
PCI_REQ0#
PCI_REQ1#
PCI_REQ2#
PCI_REQ3#
PCI_GNT0#
PCI_GNT1#
PCI_GNT2#
PCI_GNT3#
PCIRST#0
PCIRST#1
PCIRST#2
PCIRST#3
PCI_CLK5
PCI_CLKFB
LDT_RST#
LDT_TXCK
LDT_TXCK#
LDT_TXD0
LDT_TXD0#
LDT_TXD1
LDT_TXD1#
LDT_TXD2
LDT_TXD2#
LDT_TXD3
LDT_TXD3#
LDT_TXD4
LDT_TXD4#
LDT_TXD5
LDT_TXD5#
LDT_TXD6
LDT_TXD6#
LDT_TXD7
LDT_TXD7#
LDT_TXD8
LDT_TXD8#
SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15
SDA0
SDA1
SDA2
SDCS1#
SDCS3#
SDINTR
SDDREQ
SDDACK#
SDIOR#
SDIOW#
SDIORDY
6
APICCLK_MCP
K2
H3
H4
J3
G1
A20GATE
A20
KBRST#
D19
C_BE#0
Y25
C_BE#1
AB23
C_BE#2
AF22
C_BE#3
AF21
AE21
AE24
AF24
AE25
AF25
AD23
PAR
AD25
AD24
AF17
AB16
AE17
AC18
V25
AD17
AF18
V26
W23
V24
AE16
AB17
V23
V22
U22
RST#0
Y26
RN70 331 2
RST#1
T23
RN70 333 4
RST#2
RN70 33
W26
RST#3
N24
RN70 335 6
PCLK_FBO
R26
PCLK_FBI
P26
AA3
W1
V2
W3
Y3
Y1
W2
V1
U2
U4
U5
W5
W4
Y4
Y5
V4
V5
T1
T2
T5
T4
SDD0
D6
SDD1
E6
SDD2
E7
SDD3
A6
SDD4
A7
SDD5
E8
SDD6
B9
SDD7
A9
SDD8
B8
SDD9
A8
SDD10
D8
SDD11
C7
SDD12
B6
SDD13
D7
SDD14
C6
SDD15
D5
A2
A3
D4
D3
B2
C3
A5
C5
A4
B5
B3
6
7 8
R439 22
APICCLK_MCP {5}
APICD0# {3}
APICD1# {3}
STPCLK# {3}
A20GATE {11}
KBRST# {11}
C_BE#[0..3] {16}
FRAME# {16}
IRDY# {16}
TRDY# {16}
DEVSEL# {16}
STOP# {16}
PAR {16}
SERR# {16}
PERR# {16}
PIRQ#A {15,16}
PIRQ#B {15,16}
PIRQ#C {16}
PIRQ#D {16}
PIRQ#E {15,16}
PREQ#0 {16}
PREQ#1 {16}
PREQ#2 {16}
PREQ#3 {16}
PREQ#4 {16}
PGNT#0 {16}
PGNT#1 {16}
PGNT#2 {16}
PGNT#3 {16}
PGNT#4 {16}
LDT_RST# {6}
LDT_RX_CLK {6}
LDT_RX_CLK# {6}
LDT_RXD0 {6}
LDT_RXD#0 {6}
LDT_RXD1 {6}
LDT_RXD#1 {6}
LDT_RXD2 {6}
LDT_RXD#2 {6}
LDT_RXD3 {6}
LDT_RXD#3 {6}
LDT_RXD4 {6}
LDT_RXD#4 {6}
LDT_RXD5 {6}
LDT_RXD#5 {6}
LDT_RXD6 {6}
LDT_RXD#6 {6}
LDT_RXD7 {6}
LDT_RXD#7 {6}
LDT_RXD8 {6}
LDT_RXD#8 {6}
SDD[0..15] {17}
SD_A0 {17}
SD_A1 {17}
SD_A2 {17}
SD_CS#1 {17}
SD_CS#3 {17}
SD_INTR {17}
SD_DREQ {17}
SD_DACK# {17}
SD_IOR# {17}
SD_IOW# {17}
SD_IORDY {17}
5
PCIRST#0 {7,8,11}
PCIRST#1 {15}
PCIRST#2 {13,16}
PCIRST#3 {21}
5
C447
0.1u
3VDUAL
3VDUAL
VDD_PLL_MCP {6}
R515 0-0805
C639
0.1u(S/S)
Put in Solder
4
MCP2 POWER & GND SIGNALS
CP11 X_COPPER
FB7 X_80-0805
C456 0.1u
VDD
C418
0.1u
VDD
C643
C642
0.1u(S/S)
0.1u(S/S)
Put in Solder
Placed these
caps closed to
possible power
pins with short,
wide direct
connections.
R516
X_0
Put in Solder
C640
0.1u(S/S)
AUXC
C637
0.1u(S/S)
5VSB
C402
VCORE
C482 0.1u
0.1u(S/S)
3VDUAL
VCC3
VBATT
VCC5
AB10 A1
4.7u-0805 C457
B22
N3
AD11
AB11
AB14
AC20
AE18
AE23
V3
K10
K11
K12
K15
K16
K17
L1
L5
L10
L17
M10
M17
R10
R17
T10
T17
U1
U10
U11
U12
U15
U16
U17
AA1
AA2
B25
E22
D16
G22
AA5
AB9
AC9
E23
D21
H24
L24
AB2
AB6
AD7
AE4
B4
B10
B16
D13
H2
N23
W25
Y22
G5
F5
F1
J22
C8
J1
K5
T22
C419
0.1u
C638
C491
0.1u
C644
0.1u(S/S)
C554
0.1u 1000p
C420 0.1u
VTT_VREF
MCP2 STRAMPING RESISTORS
A20GATE
KBRST#
APICCLK_MCP
4
R378 10K
R384 10K
R198 X_453RST
3
U16C
VDD_PLL GND
USB2_PLL
VDD_LDT
VDD_LDT
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD_USB
VDD_USB
VDD_AUXC
VDD_AUXC
VDD_AUXC
VDD_AUXC
VDD_AUXC
VDD_AUX5
VDD_AUX5
VDD_AUX3
VDD_AUX3
VDD_AUX3
VDD_AUX3
VDD_AUX3
VDD_AUX3
VDD_AUX3
VDD_AUX3
VDD_AUX3
VDD_3P3
VDD_3P3
VDD_3P3
VDD_3P3
VDD_3P3
VDD_3P3
VDD_3P3
VDD_3P3
VDD_3P3
VDD_3P3
CPU_VTT
CPU_VTT
VTT_VREF
VBATT
VDD_5
VDD_5
NC
NC
NC
MCP-2
POWER
&
GROUND
VCC3
VCC3
VCC2_5
3
2
1
MCP Decoupling Capacitors
3VDUAL
A18
GND
A26
GND
B7
GND
B13
GND
B20
GND
C4
GND
C25
GND
D10
GND
E2
GND
E5
GND
E15
GND
E18
GND
E24
GND
F22
GND
H1
GND
J5
GND
K3
GND
K13
GND
K14
GND
K22
GND
K26
GND
L4
GND
L11
GND
L12
GND
L13
GND
L14
GND
L15
GND
L16
GND
M11
GND
M12
GND
M13
GND
M14
GND
M15
GND
M16
GND
N10
GND
N11
GND
N12
GND
N13
GND
N14
GND
N15
GND
N16
GND
N17
GND
N26
GND
P3
GND
P10
GND
P11
GND
P12
GND
P13
GND
P14
GND
P15
GND
P16
GND
P17
GND
P23
GND
R11
GND
R12
GND
R13
GND
R14
GND
R15
GND
R16
GND
T11
GND
T12
GND
T13
GND
T14
GND
T15
GND
T16
GND
T24
GND
T26
GND
U3
GND
U13
GND
U14
GND
U23
GND
AA4
GND
AB1
GND
AB3
GND
AB4
GND
AB5
GND
AB18
GND
AB22
GND
AB26
GND
AC1
GND
AC11
GND
AC13
GND
AC16
GND
AC22
GND
AD10
GND
AE5
GND
AE14
GND
AF1
GND
AF23
GND
AF26
GND
MSI
Title
Size Document Number Rev
Date: Sheet of
C436
0.1u
C429
0.1u
C423
0.1u
C421
0.1u
C534
0.1u
PCLK0 PCICLK0
R438 22
PCLK1
R432 22
PCLK2
R441 22
PCLK3 PCICLK3
R442 X_22
PCLK4
R455 22
PCLK6
R458 22
(PCLK6 : T/S=5/10)
PCLK_FBO
PCLK0
PCLK1
PCLK2
PCLK3
PCLK4
PCLK6
MCP2 REFERENCE VOLTAGE BLOCK
VCORE
R318
110RST
R317
110RST
MCP2 AUXC VOLTAGE BLOCK
3VDUAL
100
1 2
3 4
5 6
C470
4.7u-0805
D23
SC431LCSK
1.25V Reference
MICRO-STAR INt'L CO., LTD.
MCP CPU & PCI & LDT & IDE Signals
(MS-6595)
2
VCC5
C203
0.1u
C559
0.1u
MCP2 PCI Clock
PCICLK1
PCICLK2
SIOPCLK
ROMPCLK
X_10p C531
X_10p C528
X_10p C515
X_10p C530
X_10p C535
X_10p C546
X_10p C548
VTT_VREF
C417
C422
0.1u
4.7u-0805
5VSB
Placed close to
MCP2 within 2".
R513
X_75-0805 RN79
CP12 X_COPPER
FB8 X_80-0805
7 8
R386
82RST
2
619RST
3 1
R387
C471
X_0.1u
9 25 Monday, July 08, 2002
C424
39p
1
VDD VCC3
C376
0.1u
C415
0.1u
C645
0.1u(S/S)
Put in Solder
PCICLK0 {16}
PCICLK1 {16}
PCICLK2 {16}
PCICLK3 {16}
SIOPCLK {11}
ROMPCLK {13}
1.4V
AUXC
AUXC trace
must > 0.2"
0A
Page 10
8
7
6
5
4
3
2
1
MCP2 MAC, USB, 1394A, LPC & AC'97 SIGNALS
SMB_ALERT
RN77
15K
RN76
15K
RN68
15K
BAT1
246
135
246
135
246
135
SMBCLK1
SMBDATA1
SMBCLK
SMBDATA
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
SERIRQ
LPC_DRQ#0
LPC_DRQ#1
PWRGD_SB
MCP_OK
ICS_MDIO
MII_MDIO
R336 1K
8
7
8
7
8
7
U16B
DDC_CL
DDC_DA
BCLK
SPDIF
MTEST
AC10
AD5
AF5
AF8
AE9
AF7
AC8
AD8
AF9
AE8
AB8
AE7
AB7
AF6
AC7
AD6
AC6
AE6
AD9
C22
D22
D23
C23
C24
D24
E25
E26
G26
G25
F26
F25
A21
B21
E21
D20
C21
C20
AF3
AD4
AD3
AC3
AE2
AF2
AE1
AD2
B17
C16
E20
A17
C18
D18
A19
D1
C1
R24
P24
P22
M22
M24
M23
L22
G24
K24
K23
N22
L23
W24
G23
Y2
M25
F2
H22
J24
C19
P25
M26
MCP-2
7
MII_COL
MII_CRS
MII_MDC
MII_MDIO
MII_RXCLK
MII_RXD0
MII_RXD1
MII_RXD2
MII_RXD3
MII_RXDV
MII_RXER/GPIO4
MII_TXCLK
MII_TXD0
MII_TXD1
MII_TXD2
MII_TXD3
MII_TXEN
EE_CLK
EEPROM
EE_SEL
USB_P0
USB_N0
USB_P1
USB_N1
USB_P2
USB_N2
USB_P3
USB_N3
USB_P4
USB_N4
USB_P5
USB_N5
USB_OC#0
USB_OC#1/GPIO6
USB_OC#2/GPIO7
USB_OC#3/GPIO8
USB_OC#4/GPIO9
USB_OC#5/GPIO10
FRWR_D0
FRWR_D1
FRWR_D2
FRWR_D3
FRWR_D4
FRWR_D5
FRWR_D6
FRWR_D7
LPC_FRAME#
LPC_DRQ0#
LPC_DRQ1#/GPIO5
SERIRQ
SMB_ALERT#/SPIO6
SMB_CLK0/SPIO0
SMB_DATA0/SPIO1
DDC_CLK0/SPIO4
DDC_DATA0/SPIO5
AC_RST#
AC'97
AC_SYNC
AC_BITCLK
FANCTL0/GPIO15
FANCTL1/GPIO16
FANRPM/GPIO14
PWRBTN#
PWRGD
PWRGD_SB
SLP_S1#/GPIO20
SLP_S3#
SLP_S5#
PME#
SIO_PME#
AGP_PME#
RI#/GPIO24
THERM#/GPIO22
EXTSMI#/GPIO21
INTRUDER#/GPIO23
SPKR
SPDIF/GPIO13
TEST
MAC
USB
1394a
LPC
SMBUS
SMB_DATA1/SPIO3
DDC
DDC_DATA1/SPIO5
MISC
MII2_PWRDN
MII2_RXCLK
MII2_TXCLK
USB_RBIAS
FRWR_SCLK
FRWR_CTL0
FRWR_CTL1
FRWR_LREQ
FRWR_LNKON
SMB_CLK1/SPIO2
DDC_CLK1/SPIO4
AC_SDIN1/GPIO11
XTAL_14M_IN
XTAL_14M_OUT
ICS_COL {13}
ICS_CRS {13}
ICS_MDC {13}
D D
C C
B B
A A
ICS_MDIO {13}
ICS_RXCLK {13}
ICS_RXD0 {13}
ICS_RXD1 {13}
ICS_RXD2 {13}
ICS_RXD3 {13}
ICS_RXDV {13}
ICS_RXER {13}
ICS_TXCLK {13}
ICS_TXD0 {13}
ICS_TXD1 {13}
ICS_TXD2 {13}
ICS_TXD3 {13}
ICS_TXEN {13}
EECK {13} EEDO {13}
EECS {13}
OC#1 {18}
OC#2 {18}
OC#3 {18}
1394D0 {19}
1394D1 {19}
1394D2 {19}
1394D3 {19}
1394D4 {19}
1394D5 {19}
1394D6 {19}
1394D7 {19}
LPC_FRAME# {11,13}
LPC_DRQ#0 {11}
SERIRQ {11}
SMBCLK {11,14,21}
SMBDATA {11,14,21}
3VDDCCL {17}
3VDDCDA {17}
AC_RST# {12}
AC_SYNC {12}
AC_BITCLK {12}
B_SEL0 {5}
B_SEL1 {5}
PWRBTN# {11}
MCP_OK {20,21}
PWRGD_SB {13,20,21}
SLP_S3# {5,21}
SLP_S5# {21}
PCI_PME# {16}
SIO_PME# {11}
AGP_PME# {15}
THERM# {11}
SPKR {20}
SPDIFO {12}
8
ICS_MDIO
ICS_TXD0
ICS_TXD1
ICS_TXD3
EECK
EECS
USB_0P
USB_0N
USB_1P
USB_1N
USB_2P
USB_2N
USB_3P
USB_3N
USB_4P
USB_4N
USB_5P
USB_5N
LPC_DRQ#0
LPC_DRQ#1
SERIRQ
SMB_ALERT
SMBCLK
SMBDATA
R335 33
R329 33
R437 33
B_SEL0
B_SEL1
MCP_OK
R423 22
PWRGD_SB
SLP_S1#
SLP_S3#
SLP_S5#
PCI_PME#
SIO_PME#
AGP_PME#
RI# {20}
THERM#
SIO_SMI#
INTRUDER#
SPKR
R509 0
R433 10K
VCC3
R430 1K
MII2_COL
MII2_CRS
MII2_MDC
MII2_MDIO
MII2_RXD0
MII2_RXD1
MII2_RXD2
MII2_RXD3
MII2_RXDV
MII2_RXER
MII2_TXD0
MII2_TXD1
MII2_TXD2
MII2_TXD3
MII2_TXEN
EE_DI
EE_DO
USB2_P0
USB2_N0
USB2_P1
USB2_N1
USB2_P2
USB2_N2
USB2_P3
USB2_N3
USB2_P4
USB2_N4
USB2_P5
USB2_N5
USB_VREF
USB2_XI
USB2_XO
FRWR_LPS
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
AC_SDIN0
AC_SDOUT
BUF_14M
BUF_24M
SUSCLK
RTC_XI
RTC_XO
SOS#1
SOS#2
SOS#3
GPIO28
GPIO29
GPIO30
GPIO31
GPIO48
GPIO49
6
AF15
AB13
AE15
AD14
AF11
AD16
AC14
AE11
AD13
AF13
AE13
AC15
AF16
AE12
AB15
AF12
AD15
AF14
AF10
AE10
A23
B23
B24
A24
D25
D26
F23
F24
H26
H25
J25
J26
A25
A22
C26
B26
AC4
AF4
AE3
AD1
AC5
AC2
A16
E16
C17
D17
B19
B18
D2
C2
R22
R23
L25
K1
E19
N25
K25
L26
H23
J23
AB12
AC12
AD12
J2
B1
K4
D9
J4
G3
MII_MDIO
EEDO
EEDI
USB0+
USB0ÂUSB1+
USB1ÂUSB2+
USB2ÂUSB3+
USB3ÂUSB4+
USB4ÂUSB5+
USB5-
USB_VREF
RBIAS
(T/S : 5/5)
USB2_XI
Y3
12M-32pf-HC49S-D
USB2_XO
1394_LREQ
1394_LNKON
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
SMBCLK1
SMBDATA1
AC_SDIN0
SDIN1
R425 10K
AC_SDOUT
CLK14
R383 22
R415 22
14M_XI
Y5
14M-32pf-HC49S-D
14M_XO
RTC_XI
Y6
+-30PPM
32.768KHz-12.5pF
RTC_XO
SOS#
R361 10K
GPIO29
GPIO31
EEDI {13}
USB0+ {18}
USB0- {18}
USB1+ {18}
USB1- {18}
USB2+ {18}
USB2- {18}
USB3+ {18}
USB3- {18}
USB4+ {18}
USB4- {18}
USB5+ {18}
USB5- {18}
R396 1KST
SMBCLK1 {16}
SMBDATA1{16}
AC_SDIN0 {12}
AC_SDOUT {12}
SIO_24 {11}
SUSCLK {11}
32pF
ATADET0 {17}
ATADET1 {17}
R385 4.7K
R457 4.7K
R460 4.7K
18p C512
18p C497
1394SCLK {19}
1394CTL0 {19}
1394CTL1 {19}
1394LPS {19}
LPC_AD[0..3] {11,13}
18p C532
18p C526
18p C511
18p C510
3VDUAL
VCC3
5
Place crystal
near MCP2,
and route 12
mils trace.
Battery
USB3ÂUSB3+
USB2ÂUSB2+
USB4+
USB4ÂUSB5+
USB5-
USB0+
USB0-
USB1+
4
MCP2 PULL-UP & DOWN RESISTORS
R376 1.2K
R338 2.7K
R339 2.7K
R261 2.7K
R260 2.7K
1 2
3 4
5 6
7 8
R368 10K
R370 8.2K
R410 X_8.2K
R389 1K
R419 270
R350 X_1.5K
R365 4.7K
D20
1N5817-S-DO-241AC
C411
0.1u
C384
0.1u
4.7u-0805
3VDUAL
VCC3
RN67
8.2K
VCC3
3VDUAL
VBAT
D21 1N4148S
R306
2.2K-0805
2 3
4
NC
VIN VOUT
U14
1
GND
S817
C383
MCP2 USB & USB2 BLOCK
USB_3N
C508
10p
7
8
6
4
2
RN74
30
8 10p
6
4
2
RN73
30
8
6
4
2
RN69
30
USB_3P
5
USB_2N
3
C509
1
10p
USB_2P
USB_4P
C505
7
USB_4N
5
USB_5P
3
1
C506
10p
USB_5N
USB_0P
C479
10p
7
USB_0N
5
USB_1N USB1-
3
C485
1
10p
USB_1P
3
070502
MSI
Title
Size Document Number Rev
Date: Sheet of
PCI_PME#
SIO_SMI#
AGP_PME#
SIO_PME#
THERM#
SPKR
SLP_S1#
SLP_S3#
SLP_S5#
INTRUDER#
AC_SDIN0
AC_SDOUT
ICS_TXD1
ICS_TXD3
ICS_TXD0
R424 8.2K
R333 4.7K
R421 8.2K
R175 10K
R327 4.7K
R379 10K
R420 1K
R427 1K
R398 1K
R395 1M
R422 10K
R428 10K
R344 10K
R342 10K
R346 10K
CMOS CLEAR JUMPER
JBAT1
1 - 2
2 - 3
JBAT1
YJ103
C379
39p
3VDUAL
PASSWORD CLEAR JUMPER
R326
X_0
1.4V
VBATT
CLK14
R320 49.9RST
R319 0
SIO_24
1394LREQ {19}
1394_LREQ
1394LNKON {19}
1394_LNKON
Short
OPEN
VCC3
R311 22
R310 22
JPWD1
Normal
CLEAR PASSWORD
R308 1K
R309 10K
X_10p C390
X_10p C389
C476
X_10p
MICRO-STAR INt'L CO., LTD.
MCP CPU & IDE & LPC & MAC & USB Signals
(MS-6595)
2
3VDUAL
VCC3
VCC3
VCC3
3VDUAL
3VDUAL
VBATT
CMOS Status
Normal
Clear CMOS
1
2
3
GPIO29
Place close
to MCP2
USB_VREF
(T/S : 5/5)
C490
0.1u
10 25 Monday, July 08, 2002
1
GPIO31
JPWD1
PIN1*2
T/S = 5/10
AC_14M {12}
SS_CLKIN {5}
3VDUAL
R405
1KST
R403
1KST
0A
Page 11
8
7
6
5
4
3
2
1
LPC SUPER I/O W83627HF
U1
PCIRST#0 {7,8,9}
SIOPCLK {9}
SERIRQ {10}
LPC_DRQ#0 {10}
THERMDP# {4}
THERMDN# {4}
5VSB
LPC_FRAME# {10,13}
LPC_AD[0..3] {10,13}
MB_ID[0..3] {13}
VCC5
R25 0
VCORE
VIDB[0..4] {5}
CPU_CTRL {18}
CPU_FAN1 {18}
SYS_CTRL1 {18}
SYS_FAN1 {18}
THERM# {10}
BEEP {20}
VBAT
SIO_PME# {10}
SMBDATA {10,14,21}
SMBCLK {10,14,21}
PWRBTN# {10}
PWBTIN {20}
PS_ON# {20,21}
DLY_S3# {5}
SIO_24 {10}
VBAT
C8
VCC3
0.1u
VCC5
VCC3
VDDQ
0.1u
C25
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
MB_ID0
MB_ID1
MB_ID2
MB_ID3
R60 10K
TMP_VREF
CPU_TMP
THERMDP#
SYS_TMP
VTIN_GND
-5VIN
-12VIN
+12VIN
VTIN_VCC
C77 0.1u
VIDB4
VIDB3
VIDB2
VIDB1
VIDB0
CPU_CTRL
CPU_FAN1
SYS_CTRL1
SYS_FAN1
R62 0
BEEP
R12 2M
R18 0
PWRBTN#
C19 0.1u
C87
0.1u
D D
070702
C C
B B
30
LRESET#
21
LCLK
23
SERIRQ
22
LDRQ#
29
LFRAME#
27
LAD0
26
LAD1
25
LAD2
24
LAD3
125
GPX2/P15/GP14
123
GPY1/GP15
128
GPSA1/P12/GP10
121
GPSA2/GP17
126
GPX1/P14/GP12
124
GPY2/P16/GP14
127
GPSB1/P13/GP11
122
GPSB2/GP16
120
MSO/IRQIN0
119
MSI/GP20
101
VREF
102
VTIN3
103
VTIN2
104
VTIN1
93
AGND
94
-5VIN
95
-12VIN
96
+12VIN
97
AVCC
98
+3.3VIN
99
VCOREB
100
VCOREA
106
VID4
107
VID3
108
VID2
109
VID1
110
VID0
116
FANPWM1
113
FANIO1
115
FANPWM2
112
FANIO2
111
FANIO3
105
OVT#
118
BEEP
76
CASEOPEN#
19
PME#
89
WDTO/GP24
91
SDA/GP22
92
SCL/GP21
67
PSOUT#
68
PSIN
64
SUSLED/GP35
90
PLED/GP23
72
PWRCTL#/GP31
73
SUSCIN/GP30
18
CLKIN
61
VSB
74
VBAT
28
VCC3
12
VCC_1
48
VCC_2
77
VCC_3
114
C46
1u
VCC_4
W83627HF
DRVDEN0
DRVDEN1
INDEX#
MOA#
MOB#
STEP#
WRDATA#
TRACK0#
RDDATA#
HEAD#
DSKCHG#
BUSY
SLIN#
IRRX/GP25
CIRRX/GP34
IRTX/GP26
SUSCLKIN
DCDA#
DSRA#
RTSA#
SOUTA
CTSA#
DTRA#
DCDB#
DSRB#
RTSB#
SOUTB
CTSB#
DTRB#
KBRST
KBDATA
KBCLK
MSDATA
MSCLK
KBLOCK#
RSMRST#/GP33
PWROK/GP32
DSB#
DSA#
DIR#
WE#
WP#
SLCT
ACK#
INIT#
ERR#
AFD#
STB#
SINA
RIA#
SINB
RIB#
GA20
VSS1
VSS2
VSS3
VSS4
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PE
FLOPPY CONNECTOR
DRVDEN0
1
DRVDEN1
2
INDEX#
3
MOA#
4
DSB#
5
DSA#
6
MOB#
7
DIR#
8
STEP#
9
WRDATA#
10
WE#
11
TRACK0#
13
WP#
14
RDDATA#
15
HEAD#
16
DSKCHG#
17
PRD0
42
PRD1
41
PRD2
40
PRD3
39
PRD4
38
PRD5
37
PRD6
36
PRD7
35
RSLCT
31
RPE
32
RBUSY
33
RACK#
34
RSLIN#
43
RINIT#
44
RERR#
45
RAFD#
46
RSTB#
47
BIOS_P#
88
69
87
75
DCDA#
56
DSRA#
50
SINA
53
RTSA#
51
SOUTA
54
CTSA#
49
DTRA#
52
RIA#
57
DCDB#
84
DSRB#
79
SINB
82
RTSB#
80
SOUTB
83
CTSB#
78
DTRB#
81
RIB#
85
Bit0 of 0xF0 of Device
A setup 0.
59
60
KBDAT#
63
KBCLK#
62
MSDAT#
66
MSCLK#
65
58
70
71
20
55
86
117
FDD1
CN-BH-D2x17-1:3-BK
1 2
4
5
6
7 8
9 10
11 12
13 14
15 16
17 18
19
20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
BIOS_P# {13}
SUSCLK {10}
DCDB# {15}
DSRB# {15}
SINB {15}
RTSB# {15}
SOUTB {15}
CTSB# {15}
DTRB# {15}
RIB# {15}
A20GATE {9}
KBRST# {9}
SERIAL PORT 1
NRTSA
1
3
5
7
1
3
5
7
26
27
28
29
30
YCN25F-001-1
180p
CN5
180p
CN6
180p
CN7
180p
2
CN2
4
180p
6
8
2
CN3
4
180p
6
8
LPT1B
NDSRA#
31
NRTSA
32
NCTSA#
33
NRIA#
34
PARALLAL PORT
STB#
PRND0
PRND1
PRND2
PRND3
PRND4
PRND5
PRND6
PRND7
ACK#
BUSY
PE
SLCT
LPT1A
1
2
3
4
5
6
7
8
9
10
11
12
13
YCN25F-001-1
AFD#
14
ERR#
15
PINIT#
16
SLIN#
17
18
19
20
21
22
23
24
25
NDSRA#
C30 0.1u
VCC5
NRIA# {20}
NRIA#
NCTSA#
NDSRA#
NSINA
NDCDA#
RTSA#
DTRA#
SOUTA
RN14
PRD7
1 2
RACK#
3 4
RBUSY
5 6
RPE
7 8
RN17
PRD3
1 2
PRD4
3 4
PRD5
5 6
PRD6
7 8
RN18
PRD1
1 2
RINIT#
3 4
PRD2
5 6
RSLIN#
7 8
RN20
RSTB#
1 2
PRD0
3 4
RAFD#
5 6
RERR#
7 8
33
RSLCT
R45 33 180p C73
20
2
3
4
7
9
16
15
13
11
PRND7
ACK#
BUSY
PE
PRND3
PRND4
PRND5
PRND6
PRND1
PINIT#
PRND2
SLIN#
STB#
PRND0
AFD#
ERR#
SLCT
U2
VCC
RIN1
RIN2
RIN3
RIN4
RIN5
DIN1
DIN2
DIN3
GND
75232S-1
ROUT1
ROUT2
ROUT3
ROUT4
ROUT5
DOUT1
DOUT2
DOUT3
VCC5
PRND6
PRND5
PRND4
PRND3
PE
BUSY
ACK#
PRND7
SLIN#
PRND2
PINIT#
PRND1
ERR#
AFD#
PRND0
STB#
SLCT
V+
V-
D3 1N4148S
C27 0.1u
1
RIA#
19
CTSA#
18
DSRA#
17
SINA
14
DCDA#
12
NRTSA
5
NDTRA
6
NSOUTA
8
D4 1N4148S
10
C51 0.1u
D6 1N4148S
C78 0.1u CN4
1
1
2
2
3
3
RN15
4
4
2.7K
6
6
7
7
8
8
9510
9510
1
1
2
2
3
3
RN19
4
4
2.7K
6
6
7
7
8
8
9510
9510
R51 2.7K
PE
BUSY
ACK#
PRND7
PRND6
PRND5
PRND4
PRND3
SLIN#
PRND2
PINIT#
PRND1
ERR#
AFD#
PRND0
STB#
SLCT
NCTSA#
NRIA#
+12V
NDCDA#
C21
NSOUTA
0.1u
NSINA
NDTRA
NDCDA#
NSINA
NSOUTA
-12V
NDTRA
C52
0.1u
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
PS2 KEYBOARD & MOUSE CONNECTOR
MSDAT#
MSCLK#
KBDAT#
KBCLK#
RN8
4.7K
1 2
3 4
5 6
7 8
L2 300 L1 X_80-0805
L3 300
L4 300
L5 300
MS_DT
MS_CK
KB_DT
KB_CK
C5
R2
0.1u
1K
JKBMS1
7
8
11
12
1
2
5
6
135
7
CN1
180p
246
YMD12P-1
8
MS
KB
CP1 X_COPPER
10
9
4
3
F1
5V_STR
1.1A-S
C3
39p
C2
C9
39p
0.1u
POLY SWITCH
COPPER
LPC I/O STRAPPING RESISTOR
VCC5
SOUTA
A A
SOUTB
SOUTB
PWRBTN#
SOUTA
RTSA# H: CFAD=4E
DTRA#
L: Disable KBC
L: 24MHZ
L: CFAD=2E
L: PNP Default
8
R4 4.7K
R14 X_4.7K
R16 4.7K
R8 4.7K
H: Enable KBC
H: 48MHZ SOUTB
H: PNP no Default
3VDUAL
7
THERMAL RESISTOR BLOCK
C36
0.1u
R61 30K
CP3 X_COPPER
FB2 X_120S/0603
CP2 X_COPPER
FB1 X_120S/0603
THERMDP# TMP_VREF
6
VTIN_VCC
VTIN_GND
VCC5
TMP_VREF
R56
10KST
CPU_TMP
DIP SMD
RT2
YT103JT2.5-1N
VTIN_GND
PLACE THERMAL
SENSOR WITHIN CPU
SOCKET
5
TMP_VREF
R63
10KST
SYS_TMP
RT1
10K-TD-C0603
VTIN_GND
NOTE: LOCATE CLOSE
STATUS PANEL
+12V
-12V
-5V
THERMDP# THERMDN#
R37 28KST
R33 232KST
R28 120KST
4
1000p C86
R58 10KST
R53 56KST
R46 56KST
3
+12VIN
VTIN_GND
-12VIN
TMP_VREF
-5VIN
CP19 X_COPPER
L9 X_600
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
LPC SUPER I/O & CONNECTORS
(MS-6595)
2
CP20 X_COPPER
CP5 X_COPPER
11 25 Monday, July 08, 2002
1
0A
Page 12
8
AC'97 AUDIO CODEC
R407 X_1K
R399 1K
C487
0.1u
SPDIFO
VCC3A
C455
X_0.1u
X_IN
0.01u C437
X_OUT
X_10p C468
AUX_L
AUX_R
CD_L
CD_GND
CD_R
D D
AC_RST# {10}
AC_SDIN0 {10}
AC_SDOUT {10}
AC_SYNC {10}
AC_BITCLK {10}
C C
SPDIFO {10}
CP14 X_COPPER
VCC3
EC37
10u-16V
FB10 X_80-0805
+
R381 10K
R382 10K
R377 47
VCC3
AC_14M {10}
SPDIF CONNECTOR
JSP1
VCC5
SPDIFO
B B
1
2
3
D1x3-BK
INTERNAL_SPEAKER
7
R401
R482 X_0
4847464544424140394338
U17
1
NC
NC
DVDD1
9
DVDD2
TEST6
4
7
2
3
11
8
5
10
6
12
DVSS1
DVSS2
XTL_IN
XTL_OUT
RESET#
SDATA_IN
SDATA_OUT
SYNC
BIT_CLK
PC_BEEP
TEST5
ALC202A
PHONE
AUXL
AUXR
1314151617181920212223
HP_ROUTA
HP_LOUTA
0
TEST4
VIDEOL
TEST1
VIDEOR
TEST2
AVSS2
DACOUTL
DACOUTR
CDL
CDGND
CDR
EC31 100u-16V
EC32 100u-16V
6
HP_OUTR
HP_OUTL
+5VR
C483
NC
NC
VRDA
VRAD
NC
VREF
ADI-ALC202A
+5VR
C446 1u-0805
36
35
34
33
32
31
30
29
28
27
25
26
4.7u-0805 C444
4.7u-0805 C445
R312
1K
4.7u-0805
VREF_OUT
AC_VREF
+5VR
C443
4.7u-0805
R362 1.5K
C432
0.01u
L52 300
C378
560p
HP_ROUTA
HP_LOUTA
R352 6.2K
R351 6.2K
R354 6.2K
R353 6.2K
4.7u-0805 C434
MIC1
+
37
LOUTR
LOUTL
MONO
AVDD2
AFILT2
AFILT1
AVDD1
AVSS1
MIC1
MIC2
LINL
LINR
24
+
+
R313
1K
EC34
10u-16V
R291 1K
C377
560p
5
C458
X_0.1u
R290 2.2K
C373 470p
R292 0 L51 300
R294 0
C375
470p
C374
470p
C466
X_0.1u
C469
1000p
LINR
LINL
MIC_PWR
MIC MIC_IN
C372
270p
SPEAKER_R
OUT_R
SPEAKER_L
OUT_L
C472
1000p
C473
1u
4
MIC_PWR
MIC
SPEAKER_R
OUTR
OUTL
SPEAKER_L
LINR
LINL
C481
1u
1
2
4
5
3
6
7
8
9
17
10
11
12
13
14
15
16
18
L_OUT_IN_MIC
HP AUDIO
CONNECTOR
LINE-IN
LINE-OUT
MIC
AUDIO1
MIC LINE-OUT LINE-IN
3
2
AUDIO CODE CRYSTAL CIRCUIT
X_OUT X_IN
C475
X_22p
R380 X_10MST
Y2
X_24.576M-16pf-HC49S-D
32pF
C474
X_22p
AUDIO CODE REGULATORS
+12V
1u-0805/25V
3 2
C533
VR2
SOT223/0.8A
YLT1087S-0.8A
VIN VOUT
VOUT2
1
C545
1u-0805
ADJ
4
R449
100RST
R453
301RST
+
EC41
10u-16V
FRONT AUDIO
MIC1
MIC_PWR
OUT_R
R502 X_0
OUT_L SPEAKER_L
R503 X_0
JAUD1
1 2
MIC GNDA
3 4
MIC_VCC VCCA
5 6
FPOUT_R RET_R
7 8
DET# KEY
9 10
FPOUT_L RET_L
X_CN-BH-D2x5-1:1-BK-S2
R499 X_0
R500 X_0
CD IN
CD_GND
CD_L
C438 1u
C439 1u
C440 1u
C_R
C_G
C_L
R357
4.7K
R356
2.7K
R331 4.7K
R337 2.7K
R343 4.7K
R355
4.7K
COPPER
CP21 X_COPPER
FB12 X_80-0805
+5VR
C542
0.1u
C578 0.1u
CD1_R CD_R
CD1_G
CD1_L
1
CP18 X_COPPER
C536
0.1u
+5VR
SPEAKER_R
JCD1
4
3
2
1
YJ104B
(Black)
2.54mm
+12V
R451
3K
CP17 X_COPPER
FB11 X_80-0805
R493
3K
+12VA
C558 0.1u
OUTR
R484 10K
OUTL
R448 10K
HP_OUTR
R492 X_10K
HP_OUTL
R450 X_10K
A A
8
EC42
100u-16V
C577 22u-1206
EC46 100u-16V
R452 100K
+12VA
+
+
C541
0.01u
7
C583
0.1u
7
5
1
9
2
3
8
U25
VP
PGND
-INV1
-INV2
SGND
SVRR
M/SS
TDA1517
OUT1
OUT2
NC
NC
NC
NC
NC
NC
NC
NC
NC
10
11
12
13
EC44 100u-16V
4
EC43 100u-16V C550 22u-1206
6
14
15
16
17
18
6
+
+
R454
47K 220p
L55 300
L54 300
R456
47K
5
C543
INT_SPKR
INT_SPKL
C544
220p
J4
1
2
3
D1x3-BK
Internal
Speaker Out
AUX_R
C441 1u
AUX_L
C442 1u
MSI
C1 0.1u
VCC3
C484 0.1u
C425 0.1u
4
3
Title
VCC5
VCC5
VCC5
Size Document Number Rev
Date: Sheet of
AUX IN
R359
4.7K
AUX1_R
AUX1_L
R530
R531
R358
4.7K
R332 4.7K
R345 4.7K
MICRO-STAR INt'L CO., LTD.
AC97 AUDIO
(MS-6595)
2
JAUX1
4
3
2
1
YJ104Y
(White)
2.54mm
12 25 Monday, July 08, 2002
1
0A
Page 13
8
7
6
5
4
3
2
1
MII PHY LAN ICS1893
U11
Y1
25MHz
32pF
+-30PPM
C392
33p
2N3904S
ICS1893AF
31
30
29
28
39
40
41
42
38
27
22
26
16
15
47
46
Q32
RXD0
RXD1
RXD2
RXD3
TXD0
TXD1
TXD2
TXD3
TXEN
MDC
RESET
MDIO
100TCSR
10TCSR
XTALIN
XTALOUT
D D
ICS_RXD0 {10}
ICS_RXD1 {10}
ICS_RXD2 {10}
ICS_RXD3 {10}
ICS_TXD0 {10}
ICS_TXD1 {10}
ICS_TXD2 {10}
ICS_TXD3 {10}
ICS_TXEN {10}
ICS_MDC {10}
PWRGD_SB {10,20,21}
ICS_MDIO {10}
VDD33
R301 12.1KST
1.58KRST_0805
C C
B B
R295
LED_CTL
ICS_RXD0
ICS_RXD1
ICS_RXD2
ICS_RXD3
ICS_TXD0
ICS_TXD1
ICS_TXD2
ICS_TXD3
ICS_TXEN
ICS_MDC
PWRGD_SB
ICS_MDIO
R323 1.5K
R296
2KST
C391
33p
3VDUAL
R304
1K
R305 4.7K
VDD33
7142024334548
VDD
VDD
VDD
VDD
VDD
GND
GND
GND
GND
GND
251117212325
ACTLED#
VDD
GND
10/100SEL
VDD
GND
GND
36
RXVD
RXER
RXCLK
TXCLK
TXCT
P0AC
P2L1
P1CL
P3TD
P4RD
9
32
35
43
COL
44
CRS
34
37
12
TXP
13
TXN
10
18
RXP
19
RXN
1
4
3
6
8
R277
15K
10/100SEL
ICS_RXDV
ICS_RXER
ICS_COL
ICS_CRS
R324 22
R325 22
TXP
TXN
TXCT
RXP
RXN
LED_CTL
LED_PWR
R271
R276
15K
15K
PHY Address = 00001
MB_ID[0..3] {11}
ICS_RXDV {10}
ICS_RXER {10}
ICS_COL {10}
ICS_CRS {10}
ICS_RXCLK {10}
ICS_TXCLK {10}
R274
15K
M/B Revision ID
MB_ID0
MB_ID1
MB_ID2
MB_ID3
VER:0A 0 0 0 0
R269
61.9RST
L50
0.12u-0805
PLACE CLOSE
TO PHY
R116 X_10K
R112 10K
R107 X_10K
R110 10K
R108 X_10K
R104 10K
R103 X_10K
R102 10K
ID3 ID2 ID1 ID0
R270
61.9RST
VCC3
VCC3
VCC3
VCC3
070702
VDD33
LPC Flash EEPROM
PCIRST#2 {9,16}
BIOS_P# {11}
LPC_AD0 {10,11}
LPC_AD1 {10,11}
LPC_AD2 {10,11}
VCC3
R390 1K
C401
0.1u
EECS {10}
EECK {10}
EEDI {10}
EEDO {10}
F_GPI3
F_GPI2
F_GPI1
F_GPI0
BIOS_P#
VDD33
C380
C412
0.1u
0.1u
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16 17
LAN EEPROM
R349
X_5.6KST
U15
1
CS
2
SK
3
DI
4
DO
X_ATL-93C46-128x8-0.5us-SOIC8
C357
C358
0.1u
0.1u
U19
NC
RESET#
GPI3
GPI2
GPI1
GPI0
RESVD
RESVD
RESVD
RESVD
RESVD
RESVD
LAD0
LAD1
LAD2
GND LAD3
SST-4M-33M-PLCC32
GPI4
MODE
INIT#
LFRAM#
RESVD
RESVD
RESVD
RESVD
GND
VDD
CLK
VDD
C363
0.1u
VDD33
8
VCC
7
NC
6
NC
5
GND
32
31
30
29
28
NC
27
NC
26
25
24
23
22
NC
21
20
19
18
VDD33
C362
0.1u
C453
0.1u
CP10 X_COPPER
FB6 X_150_100MHz
+
EC28
10u-16V
F_GPI4
MODE
VCC3
INIT#
3VDUAL
ROMPCLK {9}
LPC_FRAME# {10,11}
LPC_AD3 {10,11}
RJ45 Connector
Trace from RJ45 to Transformer must less than 1 inch.
C350
0.1u
2
1
3
6
8
7
7
T1
TDC
TD+
TD-
RD+
RDÂRDC
TS6121C
15
CMT
16
TX+
TX-
RX+
RX-
RXC
TX-
14
RX+
11
RX-
9
10
RN43
75
1 2
3 4
5 6
7 8
LANGND
6
C342
1500p-2KV/DIP
For ESD
TXCT
TXP TX+
TXN
RXP
RXN
R266
56.2RST
R273
56.2RST
PLACE
CLOSE
TO PHY
C351
100p
C361
4.7p
A A
C356
0.1u
8
LED_PWR
ACTLED#
RX-
RX+
TXÂTX+
10/100SEL
X_1000p C341
5
LAN_USB1B
17
AMBER+
AMBER-
18
9
13
10
14
11
15
12
16
19
20
RJ45+USB+LEDx2-D20-BK
GREEN+
GREEN-
RDN
RDP
TDN
TDP
NC
NC
NC
NC
VCC3
Interface MODE Selection
HIGH
Programmer mode
LOW
LPC mode
4
3
EEPROM Strapping Resistors
INIT#
R447 270
F_GPI0
R391 1K
F_GPI1
R392 1K
F_GPI2
R393 1K
C540
0.1u
C507
0.1u
Default
F_GPI3
R394 1K
F_GPI4
R434 1K
MODE
R440 1K
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
MII LAN ICS1893AF & LPC Flash EEPROM
2
VCC3
(MS-6595)
13 25 Monday, July 08, 2002
1
0A
Page 14
5
DDR DIMM1 DDR DIMM2
MA_B[0..12] {7} MA_C[0..12] {7}
D D
MBA_B0 {7}
MBA_B1 {7}
MCS_B#0 {7}
MCS_B#1 {7}
MRAS_B# {7}
MCAS_B# {7}
MWE_B# {7}
MDQS_B[0..7] {7}
C C
B B
A A
MDQM_B[0..7] {7}
DDR2_VREF
R900 X_100
MCKE_B {7}
SMBCLK {10,11,21}
SMBDATA {10,11,21}
MCLK_B1 {7}
MCLK_B#1 {7}
MCLK_B0 {7}
MCLK_B#0 {7}
MCLK_B2 {7}
MCLK_B#2 {7}
MEM_STR
R905
121RST
R906
121RST
MA_B0
MA_B1
MA_B2
MA_B3
MA_B4
MA_B5
MA_B6
MA_B7
MA_B8
MA_B9
MA_B10
MA_B11
MA_B12
MA_B13 MA_C13
MBA_B0
MBA_B1
MCS_B#0
MCS_B#1
MRAS_B#
MCAS_B#
MWE_B#
MDQS_B0
MDQS_B1
MDQS_B2
MDQS_B3
MDQS_B4
MDQS_B5
MDQS_B6
MDQS_B7
DIM1_47
MDQM_B0
MDQM_B1
MDQM_B2
MDQM_B3
MDQM_B4
MDQM_B5
MDQM_B6
MDQM_B7
SMBCLK
SMBDATA
VCC3
VCC3
MEM_STR
Put near DIMM slot
T/S : 20mils/20mils
5
U27
48
43
41
130
37
32
125
29
122
27
141
118
115
103
59
52
113
157
158
71
163
154
65
63
5
14
25
36
56
67
78
86
47
97
107
119
129
149
159
169
177
140
44
45
49
51
134
135
142
144
21
111
92
91
181
182
183
16
17
137
138
76
75
82
184
7
38
46
70
85
108
120
148
168
81
89
93
100
116
124
132
139
145
152
160
176
SIGNALS
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/NC
A13/NC
BA0
BA1
NC/BA2
CS0#
CS1#
NC/CS2#
NC/CS3#
RAS#
CAS#
WE#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
DQM0/DQS9
DQM1/DQS10
DQM2/DQS11
DQM3/DQS12
DQM4/DQS13
DQM5/DQS14
DQM6/DQS15
DQM7/DQS16
DQM8/DQS17
MECC0
MECC1
MECC2
MECC3
MECC4
MECC5
MECC6
MECC7
CKE0
CKE1
SCL
SDA
SA0
SA1
SA2
CK0/NC
CK0#/NC
CK1/CK0
CK1#/CK0#
CK2/NC
CK2#/NC
ID_VDD
SPD_VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
DIMM-D184-BK
POWER
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VREF
FETEN/NC
NC/RESET#
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
NC
NC
NC
NC
WP
ADDR.=1010001B ADDR.=1010010B
4
3
2
1
DDR Terminational Resisitors
MDQ_B0
2
MDQ_B1
4
MDQ_B2
6
MDQ_B3
8
MDQ_B4
94
MDQ_B5
95
MDQ_B6
98
MDQ_B7
99
MDQ_B8
12
MDQ_B9
13
MDQ_B10
19
MDQ_B11
20
MDQ_B12
105
MDQ_B13
106
MDQ_B14
109
MDQ_B15
110
MDQ_B16
23
MDQ_B17
24
MDQ_B18
28
MDQ_B19
31
MDQ_B20
114
MDQ_B21
117
MDQ_B22
121
MDQ_B23
123
MDQ_B24
33
MDQ_B25
35
MDQ_B26
39
MDQ_B27
40
MDQ_B28
126
MDQ_B29
127
MDQ_B30
131
MDQ_B31
133
MDQ_B32
53
MDQ_B33
55
MDQ_B34
57
MDQ_B35
60
MDQ_B36
146
MDQ_B37
147
MDQ_B38
150
MDQ_B39
151
MDQ_B40
61
MDQ_B41
64
MDQ_B42
68
MDQ_B43
69
MDQ_B44
153
MDQ_B45
155
MDQ_B46
161
MDQ_B47
162
MDQ_B48
72
MDQ_B49
73
MDQ_B50
79
MDQ_B51
80
MDQ_B52
165
MDQ_B53
166
MDQ_B54
170
MDQ_B55
171
MDQ_B56
83
MDQ_B57
84
MDQ_B58
87
MDQ_B59
88
MDQ_B60
174
MDQ_B61
175
MDQ_B62
178
MDQ_B63
179
9
101
102
173
DDR2_VREF
1
90
MA_B_13
167
10
15
22
30
54
62
77
96
104
112
128
136
143
156
164
172
180
3
11
18
26
34
42
50
58
66
74
MEM_STR
4
MDQ_B[0..63] {7}
MA_B13
MA_C13
MEM_STR
C810
0.1u
C815
0.1u
DECOUPLING CAPACITORS
C829 0.1u
C830 0.1u
C831 47p
C832 0.1u
C833 47p
C834 0.1u
C835 47p
C836 0.1u
C837 47p
C838 0.1u
C839 47p
C840 0.1u
C841 47p
C842 0.1u
C843 47p
C844 0.1u
C845 47p
C846 0.1u
MA_B13 {7}
MA_C13 {7}
MEM_STR VTT_DDR2
MBA_C0 {7}
MBA_C1 {7}
MCS_C#0 {7}
MCS_C#1 {7}
MRAS_C# {7}
MCAS_C# {7}
MWE_C# {7}
R899 X_100
MCKE_C {7}
MCLK_C1 {7}
MCLK_C#1 {7}
MCLK_C0 {7}
MCLK_C#0 {7}
MCLK_C2 {7}
MCLK_C#2 {7}
VCC3
VCC3
MEM_STR
3
MA_C0
MA_C1
MA_C2
MA_C3
MA_C4
MA_C5
MA_C6
MA_C7
MA_C8
MA_C9
MA_C10
MA_C11
MA_C12
MBA_A0
MBA_A1
MCS_C#0
MCS_C#1
MRAS_A#
MCAS_A#
MWE_A#
MDQS_B0
MDQS_B1
MDQS_B2
MDQS_B3
MDQS_B4
MDQS_B5
MDQS_B6
MDQS_B7
DIM2_47
MDQM_B0
MDQM_B1
MDQM_B2
MDQM_B3
MDQM_B4
MDQM_B5
MDQM_B6
MDQM_B7
SMBCLK
SMBDATA
48
43
41
130
37
32
125
29
122
27
141
118
115
103
59
52
113
157
158
71
163
154
65
63
5
14
25
36
56
67
78
86
47
97
107
119
129
149
159
169
177
140
44
45
49
51
134
135
142
144
21
111
92
91
181
182
183
16
17
137
138
76
75
82
184
7
38
46
70
85
108
120
148
168
81
89
93
100
116
124
132
139
145
152
160
176
U28
SIGNALS
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/NC
A13/NC
BA0
BA1
NC/BA2
CS0#
CS1#
NC/CS2#
NC/CS3#
RAS#
CAS#
WE#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
DQM0/DQS9
DQM1/DQS10
DQM2/DQS11
DQM3/DQS12
DQM4/DQS13
DQM5/DQS14
DQM6/DQS15
DQM7/DQS16
DQM8/DQS17
MECC0
MECC1
MECC2
MECC3
MECC4
MECC5
MECC6
MECC7
CKE0
CKE1
SCL
SDA
SA0
SA1
SA2
CK0/NC
CK0#/NC
CK1/CK0
CK1#/CK0#
CK2/NC
CK2#/NC
ID_VDD
SPD_VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
DIMM-D184-BK
POWER
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VREF
FETEN/NC
NC/RESET#
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
MDQ_B0
2
MDQ_B1
4
MDQ_B2
6
MDQ_B3
8
MDQ_B4
94
MDQ_B5
95
MDQ_B6
98
MDQ_B7
99
MDQ_B8
12
MDQ_B9
13
MDQ_B10
19
MDQ_B11
20
MDQ_B12
105
MDQ_B13
106
MDQ_B14
109
MDQ_B15
110
MDQ_B16
23
MDQ_B17
24
MDQ_B18
28
MDQ_B19
31
MDQ_B20
114
MDQ_B21
117
MDQ_B22
121
MDQ_B23
123
MDQ_B24
33
MDQ_B25
35
MDQ_B26
39
MDQ_B27
40
MDQ_B28
126
MDQ_B29
127
MDQ_B30
131
MDQ_B31
133
MDQ_B32
53
MDQ_B33
55
MDQ_B34
57
MDQ_B35
60
MDQ_B36
146
MDQ_B37
147
MDQ_B38
150
MDQ_B39
151
MDQ_B40
61
MDQ_B41
64
MDQ_B42
68
MDQ_B43
69
MDQ_B44
153
MDQ_B45
155
MDQ_B46
161
MDQ_B47
162
MDQ_B48
72
MDQ_B49
73
MDQ_B50
79
MDQ_B51
80
MDQ_B52
165
MDQ_B53
166
MDQ_B54
170
MDQ_B55
171
MDQ_B56
83
MDQ_B57
84
MDQ_B58
87
MDQ_B59
88
MDQ_B60
174
MDQ_B61
175
MDQ_B62
178
MDQ_B63
179
9
NC
101
NC
102
NC
173
NC
1
90
WP
167
10
15
22
30
54
62
77
96
104
112
128
136
143
156
164
172
180
3
11
18
26
34
42
50
58
66
74
DDR2_VREF
MA_C_13
2
MEM_STR
MEM_STR
C811
0.1u
C816
0.1u
MA_C3
MA_C4
MA_C5
MA_C6
MA_C7
MA_C8
MA_C9
MA_C11
MA_C12
MA_C13
MBA_C0
MBA_C1
MA_C2
MA_B2
MA_B1
MA_C1
MA_B3
MA_B4
MA_B5
MA_B6
MA_B7
MA_B8
MA_B9
MA_B11
MA_B12
MA_B13
MBA_B0
MBA_B1
VTT_DDR2 MEM_STR
Place these decoupling capacitors close to
VTT_DDR termination resistors.
One decoupling capacitor for each R-pack.
MSI
Title
Size Document Number Rev
Date: Sheet of
VTT_DDR2 VTT_DDR2
RN120
33
MRAS_C#
MRAS_B#
MWE_C#
MWE_B#
MCS_B#0
MCS_B#1
MCAS_C#
MCS_C#0
MCS_C#1
MCAS_B#
MA_B0
MA_C0
MA_B10
MA_C10
MCLK_B0
MCLK_B1
MCLK_B2
MCLK_C0
MCLK_C1
MCLK_C2
R860 33
R862 33
R864 33
R866 33
R868 33
R870 33
R859 33
R861 33
R879 33
R880 33
1 2
3 4
5 6
7 8
R881 130
R884 130
R887 130
R890 130 R889 33
R893 130
R896 130
R863 33
R865 33
R867 33
R869 33
R871 33
R872 33
R873 33
R874 33
R875 33
R876 33
R877 33
R878 33
1 2
3 4
5 6
7 8
R882 33
R883 33
R885 33
R886 33
R888 33
R891 33
R892 33
R894 33
R895 33
R897 33
R898 33
DECOUPLING CAPACITORS
VTT_DDR2
C777
0.1u
C779
47p
C781
47p
C783
47p
C786
0.1u
C789
0.1u
C792
0.1u
C795
0.1u
C798
0.1u
C801
0.1u
C804
0.1u
C807
0.1u
C812
0.1u
C817
0.1u
C820
47p
C823
47p
C826
47p
C828
0.1u
MICRO-STAR INt'L CO., LTD.
DDR DIMM 1 & 2
(MS-6595)
+
C778
0.1u
+
C780
0.1u
+
C782
0.1u
C784
47p
C787
0.1u
C790
0.1u
C793
47p
C796
0.1u
C799
0.1u
C802
0.1u
C805
0.1u
C808
0.1u
C813
0.1u
C818
0.1u
C821
47p
C824
0.1u
C827
47p
VTT_DDR2
C861 10u-0805
C862 10u-0805
070502
H/W Project Leader : Joey Lee
H/W Project Engineer : Richard Shih
14 25 Monday, July 08, 2002
1
RN121
33
MCLK_B#0
MCLK_B#1
MCLK_B#2
MCLK_C#0
MCLK_C#1
MCLK_C#2
EC48
1000u-6.3V
EC49
1000u-6.3V
EC50
1000u-6.3V
C785
0.1u
C788
0.1u
C791
0.1u
C794
0.1u
C797
0.1u
C800
0.1u
C803
0.1u
C806
0.1u
C809
0.1u
C814
0.1u
C819
0.1u
C822
0.1u
C825
0.1u
0A
Page 15
8
7
6
5
4
3
2
1
VCC5 = 60mils trace / 15 mils space
AGP 3.0 4X/8X SLOT
J5
B1
-OVRCNT
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B2
B3
B4
B5
B6
B7
B8
B9
5V
5V
USB+
GND
-INTB
CLK
-REQ
3.3V
ST0
ST2
-RBF
GND
RESERVED
SBA0
3.3V
SBA2
SB_STB
GND
SBA4
SBA6
RSVD/KEY
GND/KEY
AUX3V/KEY
3.3V/KEY
AD31
AD29
3.3V
AD27
AD25
GND
AD_STB1
AD23
VDDQ
AD21
AD19
GND
AD17
C/-BE2
VDDQ
-IRDY
AUX3V/KEY
GND/KEY
RSVD/KEY
3.3V/KEY
-DEVSEL
VDDQ
-PERR
GND
-SERR
C/-BE1
VDDQ
AD14
AD12
GND
AD10
AD8
VDDQ
AD_STB0
AD7
GND
AD5
AD3
VDDQ
AD1
VREF_CG
YSLOT124
VCC5
D D
C C
B B
PIRQ#A {9}
AGPCLK {8}
GREQ# {8}
RBF# {8}
DBIL {8}
SBA0 {8}
SBA2 {8}
SB_STB {8}
SBA4 {8}
SBA6 {8}
GAD31 {8}
GAD29 {8}
GAD27 {8}
GAD25 {8}
AD_STB1 {8}
GAD23 {8}
GAD21 {8}
GAD19 {8}
GAD17 {8}
GC_BE#2 {8}
GIRDY# {8}
GDEVSEL# {8}
GC_BE#1 {8}
GAD14 {8}
GAD12 {8}
GAD10 {8}
GAD8 {8}
AD_STB0 {8}
GAD7 {8}
GAD5 {8}
GAD3 {8}
GAD1 {8}
GREQ#
ST0 {8}
ST2 {8}
VCC3
RBF#
DBIL
SBA0
SBA2
SBSTB
R286 0
SBA4
SBA6
3VDUAL
ADSTB1
R268 0
VDDQ
GIRDY#
GDEVSEL#
GPERR#
GSERR#
ADSTB0
R287 0 R284 0
VREF_CG
-TYPEDET
RESERVED
-INTA
-GNT
RESERVED
-PIPE
-WBF
SBA1
SBA3
-SB_STB
SBA5
SBA7
RSVD/KEY
GND/KEY
RSVD/KEY
3.3V/KEY
-AD_STB1
C/-BE3
VDDQ
VDDQ
-FRAME
RSVD/KEY
GND/KEY
RSVD/KEY
3.3V/KEY
-TRDY
-STOP
-PME
VDDQ
C/-BE0
VDDQ
-AD_STB0
VDDQ
VREF_GC
USB-
GND
-RST
GND
GND
AD30
AD28
AD26
AD24
GND
AD22
AD20
GND
AD18
AD16
GND
AD15
AD13
AD11
GND
GND
A1
12V
3.3V
ST1
3.3V
3.3V
PAR
AD9
AD6
AD4
AD2
AD0
+12V
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
TYPE_DET#
G8XDET#
PIRQ#B_AGP
R275 0
GGNT#
VCC3
G_MB_8XDET#
DBIH
WBF#
SBA1
SBA3
SBSTB#
SBA5
SBA7
ADSTB#1
VDDQ
GFRAME#
GTRDY#
GSTOP#
GPAR
ADSTB#0
AGPVERF_C18
R280 0
R267 0
X_10p CB1
PCIRST#1 {9}
GGNT# {8}
ST1 {8}
DBIH {8}
WBF# {8}
SBA1 {8}
SBA3 {8}
SB_STB# {8}
SBA5 {8}
SBA7 {8}
GAD30 {8}
GAD28 {8}
GAD26 {8}
GAD24 {8}
AD_STB#1 {8}
GC_BE#3 {8}
GAD22 {8}
GAD20 {8}
GAD18 {8}
GAD16 {8}
GFRAME# {8}
GTRDY# {8}
GSTOP# {8}
AGP_PME#{10}
GPAR {8}
GAD15 {8}
GAD13 {8}
GAD11 {8}
GAD9 {8}
GC_BE#0 {8}
AD_STB#0 {8}
GAD6 {8}
GAD4 {8}
GAD2 {8}
GAD0 {8}
R330 10
+12V
C388 1u-0805
R316 10
VCC5
C387
0.1u
C381 0.1u
C382 22000p
R307
47K
C847
0.1u
AGPVERF_C18
VREF_CG
070502 070502
PIRQ#B_AGP
LDT Voltage Regulator
2
4
8
7
U12
VCC
GND
SS
Comp
IRU3037
5 6
Hdrv VC
3
Ldrv
1
FB
Q35
IPD12N03L-S-TO252
C409 X_0.1u
Q33
IPD12N03L-S-TO252
AGP SIGNAL REFERENCE CIRCUIT
5VSB VDDQ
Q48
YFET-NDS7002AS
D S
R908
3.32K
R909
1.47K
VREF_CG
2N7002: Vgs(on)= 1V
R911
1.02K
R912 0
R913 X_0
R918 0
R920 X_0
R907
G
470
G8XDET#
AGPVERF_NB {8}
PIRQ#B {9}
PIRQ#E {8,9}
C433
1u-0805
CHOCK1 1.2uH
R302 150RST
R303 1.24KST
VDDQ
D S
Q49
YFET-NDS7002ASG
AGP_8XDET
R910
1.02K
+
EC38
1000u-10V
EC39
1000u-10V
0.1u
+
EC30
1000u-6.3V
AGP_8XDET {8}
C386
0.1u
C414
39p
+
EC26
1500u-6.3V
CHOCK2 1.2uH
+
AGP_4X: Vref= 0.5*VDDQ
AGP_8X: Vref= 0.23*VDDQ
G8XDET#: HI= 4X, LOW= 8X
TYPE_DET#
G_MB_8XDET#
GPERR#
GSERR#
R914 X_0
R915 X_0
R919 0
R921 0
VDDQ
C480
0.1u
+
C416 C435
39p
1 23 45 6
EC10
470u_10V
1.4V/6A
VDD
7 8
VCC5
RN48
1K
PIRQ#A / PIRQ#E
SERIAL PORT 2
COM2 HEADER
JCOM1
DTRB
RIB
RXDB
DCDB
DSRB
TXDB
CTSB
RTSB
1 2
3 4
5 6
7 8
9
X_D2x5-1:5-WH
RXDB
VCC5
DCDB
RXDB
RIB
A A
DTRB# {11}
RTSB# {11}
SOUTB {11}
8
CTSB
DSRB
DTRB#
RTSB#
SOUTB
20
16
15
13
11
2
3
4
7
9
U20
VCC
RIN1
RIN2
RIN3
RIN4
RIN5
DIN1
DIN2
DIN3
GND
X_75232-1
ROUT1
ROUT2
ROUT3
ROUT4
ROUT5
DOUT1
DOUT2
DOUT3
7
V+
V-
1
19
18
17
14
12
5
6
8
10
D26 X_1N4148S
DCDB#
SINB
RIB#
CTSB#
DSRB#
DTRB
RTSB
TXDB
D25 X_1N4148S
C557 X_0.1u C539 X_0.1u
DCDB# {11}
SINB {11}
RIB# {11}
CTSB# {11}
DSRB# {11}
C562 X_0.1u
+12V
-12V
6
TXDB
DTRB RIB
DSRB DCDB
RTSB
CTSB
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
5
CN12
X_220p
CN11
X_220p
RIB {20}
4
AGP SLOT DECOUPLING CAPACITORS
+
EC25
1000u-6.3V
C339
0.1u
C366
0.1u
C367
0.1u
C856
0.1u
C857
0.1u
3
C858
0.1u(S/S)
C859
0.1u
C860
0.1u
Title
Size Document Number Rev
Date: Sheet of
VCC3 VDDQ 3VDUAL
C394
0.1u
C395
0.1u
MSI
AGP 1.5V SLOT,LDT Voltage Regulator & COM2
2
VCC3
C396
0.1u
C397
0.1u
C393
0.1u
C400
0.1u
MICRO-STAR INt'L CO., LTD.
(MS-6595)
C851
0.1u(S/S)
H/W Project Leader : Joey Lee
H/W Project Engineer : Richard Shih
15 25 Monday, July 08, 2002
1
0A
Page 16
8
7
6
5
4
3
2
1
PCI SLOT 1 (PCI VER: 2.2 COMPLY) PCI SLOT 2 (PCI VER: 2.2 COMPLY)
-12V
PCI1
B1
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B2
B3
B4
B5
B6
B7
B8
B9
-12V
TCK
GND
TDO
+5V
+5V
INTB#
INTD#
PRSNT#1
RESERVED
PRSNT#2
GND
GND
RESERVED
GND
CLK
GND
REQ#
+5V(I/O)
AD31
AD29
GND
AD27
AD25
+3.3V
C/BE#3
AD23
GND
AD21
AD19
+3.3V
AD17
C/BE#2
GND
IRDY#
+3.3V
DEVSEL#
GND
LOCK#
PERR#
+3.3V
SERR#
+3.3V
C/BE#1
AD14
GND
AD12
AD10
GND
AD8
AD7
+3.3V
AD5
AD3
GND
AD1
+5V(I/O)
ACK64#
+5V
+5V
YSLOT120
RESERVED
+5V(I/O)
RESERVED
RESERVED
+5V(I/O)
RESERVED
FRAME#
STOP#
SDONE
C/BE#0
+5V(I/O)
REQ64#
TCK
PCICLK0 {9}
DEVSEL# {9}
VCC5
PIRQ#B
PIRQ#D
PREQ#0 {9}
C_BE#3 {9}
C_BE#2 {9}
IRDY# {9}
PERR# {9}
SERR# {9}
C_BE#1 {9}
VCC3 VCC3
AD31 {9}
AD29 {9}
AD27 {9}
AD25 {9}
AD23 {9}
AD21 {9}
AD19 {9}
AD17 {9}
LOCK#
AD14 {9}
AD12 {9}
AD10 {9}
AD8 {9}
AD7 {9}
AD5 {9}
AD3 {9}
AD1 {9}
ACK#64
D D
C C
B B
TRST#
+12V
TMS
INTA#
INTC#
GND
GND
RST#
GNT#
GND
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL
AD22
AD20
GND
AD18
AD16
+3.3V
GND
TRDY#
GND
+3.3V
SBO#
GND
AD15
+3.3V
AD13
AD11
GND
+3.3V
GND
+3.3
PAR
+12V
A1
A2
A3
A4
TDI
A5
+5V
A6
A7
A8
+5V
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
AD9
A52
A53
A54
AD6
A55
AD4
A56
A57
AD2
A58
AD0
A59
A60
A61
+5V
A62
+5V
TRST#
TMS
TDI
PIRQ#A
PIRQ#C
VCC5
VCC3
3VDUAL
PCIRST#2 {9,13}
PGNT#0
PCI_PME# {10}
AD30 {9}
AD28 {9}
AD26 {9}
AD24 {9}
ID1
SMBCLK1 SMBCLK1
SMBDATA1
R364 22
AD22 {9}
AD20 {9}
AD18 {9}
AD16 {9}
FRAME# {9}
TRDY# {9}
STOP# {9}
PAR {9}
AD15 {9}
AD13 {9}
AD11 {9}
AD9 {9}
C_BE#0 {9}
AD6 {9}
AD4 {9}
AD2 {9}
AD0 {9}
REQ#64
AD22
SMBCLK1 {10}
SMBDATA1{10}
TCK
PIRQ#A
PIRQ#C
PCICLK1 {9}
PREQ#1 {9}
AD31
AD29
AD27
AD25
C_BE#3
AD23
AD21
AD19
AD17
C_BE#2
IRDY#
DEVSEL#
LOCK#
PERR#
SERR#
C_BE#1
AD14
AD12
AD10
AD8
AD7
AD5
AD3
AD1
ACK#64
-12V
PCI2
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B1
B2
B3
B4
B5
B6
B7
B8
B9
-12V
TCK
GND
TDO
+5V
+5V
INTB#
INTD#
PRSNT#1
RESERVED
PRSNT#2
GND
GND
RESERVED
GND
CLK
GND
REQ#
+5V(I/O)
AD31
AD29
GND
AD27
AD25
+3.3V
C/BE#3
AD23
GND
AD21
AD19
+3.3V
AD17
C/BE#2
GND
IRDY#
+3.3V
DEVSEL#
GND
LOCK#
PERR#
+3.3V
SERR#
+3.3V
C/BE#1
AD14
GND
AD12
AD10
GND
AD8
AD7
+3.3V
AD5
AD3
GND
AD1
+5V(I/O)
ACK64#
+5V
+5V
YSLOT120
TRST#
RESERVED
+5V(I/O)
RESERVED
RESERVED
+5V(I/O)
RESERVED
FRAME#
TRDY#
STOP#
SDONE
C/BE#0
+5V(I/O)
REQ64#
+12V
TMS
INTA#
INTC#
GND
GND
RST#
GNT#
GND
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL
AD22
AD20
GND
AD18
AD16
+3.3V
GND
GND
+3.3V
SBO#
GND
AD15
+3.3V
AD13
AD11
GND
+3.3V
GND
+3.3
PAR
+12V
VCC3
VCC5
ID2
TRST#
TMS
TDI
PIRQ#D
PIRQ#B
PREQ#3 {9}
3VDUAL
PCIRST#2
PGNT#1
PCI_PME#
AD30
AD28
AD26
AD24
R418 22
AD22
AD20
AD18
AD16
FRAME#
TRDY#
STOP#
SMBDATA1
PAR
AD15
AD13
AD11
AD9
C_BE#0
AD6
AD4
AD2
AD0
REQ#64
PREQ#3
AD23
A1
A2
A3
A4
TDI
A5
+5V
A6
A7
A8
+5V
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
AD9
A52
A53
A54
AD6
A55
AD4
A56
A57
AD2
A58
AD0
A59
A60
A61
+5V
A62
+5V
PCI SLOT 3 (PCI VER: 2.2 COMPLY)
-12V
PCI3
B1
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B2
B3
B4
B5
B6
B7
B8
B9
-12V
TCK
GND
TDO
+5V
+5V
INTB#
INTD#
PRSNT#1
RESERVED
PRSNT#2
GND
GND
RESERVED
GND
CLK
GND
REQ#
+5V(I/O)
AD31
AD29
GND
AD27
AD25
+3.3V
C/BE#3
AD23
GND
AD21
AD19
+3.3V
AD17
C/BE#2
GND
IRDY#
+3.3V
DEVSEL#
GND
LOCK#
PERR#
+3.3V
SERR#
+3.3V
C/BE#1
AD14
GND
AD12
AD10
GND
AD8
AD7
+3.3V
AD5
AD3
GND
AD1
+5V(I/O)
ACK64#
+5V
+5V
YSLOT120
PCICLK3 {9}
PCICLK2 {9}
PREQ#2 {9}
TCK
VCC5 VCC5
PIRQ#D
PIRQ#B
R476 X_0
AD31
AD29
AD27
AD25
C_BE#3
AD23
AD21
AD19
AD17
C_BE#2
IRDY#
DEVSEL#
LOCK#
PERR#
SERR#
C_BE#1
AD14
AD12
AD10
AD8
AD7
AD5
AD3
AD1
ACK#64
VCC3
TRST#
INTA#
INTC#
RESERVED
+5V(I/O)
RESERVED
RESERVED
RST#
+5V(I/O)
GNT#
RESERVED
+3.3V
IDSEL
+3.3V
FRAME#
TRDY#
STOP#
+3.3V
SDONE
SBO#
+3.3V
C/BE#0
+3.3V
+5V(I/O)
REQ64#
+12V
TMS
GND
GND
GND
AD30
AD28
AD26
GND
AD24
AD22
AD20
GND
AD18
AD16
GND
GND
GND
AD15
AD13
AD11
GND
GND
+3.3
PAR
+12V
A1
A2
A3
A4
TDI
A5
+5V
A6
A7
A8
+5V
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
AD9
A52
A53
A54
AD6
A55
AD4
A56
A57
AD2
A58
AD0
A59
A60
A61
+5V
A62
+5V
TRST#
TMS
TDI
PIRQ#C
PIRQ#A
VCC5
R475 X_0
R474 X_0
VCC3
PCIRST#2
PGNT#2
PCI_PME#
AD30
AD28
AD26
AD24
ID3
AD22
AD20
AD18
AD16
FRAME#
TRDY#
STOP#
R494 0
R485 X_22
SMBDATA1
PAR
AD15
AD13
AD11
AD9
C_BE#0
AD6
AD4
AD2
AD0
REQ#64
PIRQ#B
PGNT#3
3VDUAL
R373 22
SMBCLK1
AD24
AD25
IDSEL = AD22 IDSEL = AD23
PIRQ#A PIRQ#D PIRQ#C
IDSEL = AD24
MASTER = PREQ#2 MASTER = PREQ#1 MASTER = PREQ#0
IDSEL = AD25
SLAVE = PREQ#3
PIRQ#B
PCI SLOT DECOUPLING CAPACITORS PCI PULL-UP / DOWN RESISTORS
DEVSEL#
TRDY#
IRDY#
FRAME#
SERR#
PERR#
A A
LOCK#
STOP#
1 2
VCC5 VCC5 VCC3
3 4
RN54
5 6
2.7K
7 8
PREQ#4 {9}
1 2
VCC5 VCC3
3 4
RN65
5 6
2.7K
7 8
8
7
PREQ#2
PREQ#1
PREQ#3
PREQ#4
REQ#64
ACK#64
TMS
TDI
TCK
TRST#
R435 2.7K
R363 4.7K
R436 4.7K
R371 4.7K
R372 4.7K
R374 4.7K
R375 4.7K
1 2
3 4
RN72
5 6
2.7K
7 8
VCC5
PIRQ#B {9}
PIRQ#D {9}
PIRQ#A {9}
PIRQ#C {9}
PIRQ#E {8,9}
PGNT#2 {9}
PGNT#0 {9}
PGNT#1 {9}
PGNT#3 {9}
PGNT#4 {9}
6
PIRQ#B
PIRQ#D PREQ#0
PIRQ#A
PIRQ#C
PIRQ#E
PGNT#2
PGNT#0
PGNT#1
PGNT#3
PGNT#4
7 8
5 6
3 4
1 2
R293 8.2K
1 2
3 4
5 6
7 8
R417 X_2.7K
5
RN75
8.2K
RN64
X_2.7K
VCC5
+
4
VCC3 -12V
+
EC36
470u-16V
C461
1000p
C517
0.1u
C523
0.1u
C448
1000p
C451
0.1u
C462
0.1u
EC35
1000u-6.3V
C463
0.1u
C518
0.1u
C524
0.1u
C465
0.1u
C460
0.1u
C449
0.1u
3
VCC3
C450
0.1u
C428
0.1u
C500
0.1u
C525
0.1u
C499
0.1u
C501
0.1u
+
MSI
Title
Size Document Number Rev
Date: Sheet of
2
+12V 3VDUAL
+
EC33
10u-16V
C459
0.1u
C519
0.1u
C495
0.1u
EC40
10u-16V
C452
0.1u
C498
0.1u
C426
0.1u
MICRO-STAR INt'L CO., LTD.
PCI 1& 2 & 3 Slots
(MS-6595)
16 25 Monday, July 08, 2002
C522
0.1u
C464
0.1u
C427
0.1u
0A
1
Page 17
8
7
6
5
4
3
2
1
ATA 33/66/100 IDE Connectors
PRIMARY IDE BLOCK
D D
C C
HDDRST# {21}
PDD[0..7] {9}
PD_DREQ {9}
PD_IOW# {9}
PD_IOR# {9}
PD_IORDY {9}
PD_DACK# {9}
PD_INTR {9}
PD_A1 {9}
PD_A0 {9}
PD_CS#1 {9}
IDEACTP# {20}
All series resistors close
to MCP2 within 500 mils.
R300 10K
HDDRST#
R299 33
PDD7
PDD6
PDD5
PDD4
7 8
PDD3
1 2
PDD2
3 4
PDD1
5 6
PDD0
7 8
RN61 82
3 4
RN59 335 6
RN59 333 4
RN61 821 2
RN59 33
1 2
RN61 825 6
RN57 337 8
RN57 33
5 6
RN57 331 2 R348 33
R179
10K
VCC5
RN63 33 C 5 6
RN63 33 B 3 4
RN63 33 A 1 2
RN63 33 D
RN66
33
R253 5.6K
R201
10K
HDRST#P
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
P_DREQ
P_IOW#
P_IOR#
P_IORDY
P_DACK#
P_INTR
P_A1
P_A0
P_CS#1
R917
X_10K
J11
YJ220-CB-1
1
3 4
5 6
7 8
91110
13 14
17 18
19
21
23
25
27
29
31
33
35
37
R239
4.7K
VCC3
2
PD8
PD9
PD10
PD11
PD12
12
PD13
PD14
16 15
PD15
22
24
26
28
30
32
34
P_A2
36
P_CS#3
38
40 39
C268 X_4700p
X_4700p
5 6
7 8
3 4
1 2
7 8
5 6
3 4
1 2
3 4
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
RN57 33
RN62
33
RN60
33
R178
15K
PDD[8..15] {9}
ATADET0 {10}
PD_A2 {9}
PD_CS#3 {9}
SDD[0..7] {9}
SD_DREQ {9}
SD_IOW# {9}
SD_IOR# {9}
SD_IORDY {9}
SD_DACK# {9}
SD_INTR {9}
SD_A1 {9}
SD_A0 {9}
SD_CS#1 {9}
IDEACTS# {20}
All series resistors close
to MCP2 within 500 mils.
HDDRST#
SDD7
SDD6
SDD5
SDD4
SDD3
SDD2
SDD1
SDD0
5 6
3 4
1 2
VCC5
R298 10K
R297 33
7 8
3 4
5 6
1 2
7 8
5 6
3 4
1 2
RN52 827 8
RN51 33
RN51 333 4
RN52 825 6
RN51 331 2
RN52 82
RN49 335 6
RN49 337 8
RN49 33
R176
10K
SECONDARY IDE BLOCK
J8
YJ220-CW-1
1
3 4
5 6
7 8
91110
13 14
17 18
19
21
23
25
27
29
31
33
35 RN49 333 4
37
R216
R916
4.7K
X_10K
VCC3
RN58
33
RN55
33
R246 5.6K
R314
10K
HDRST#S
SD7
SD6
SD5
SD4
SD3
SD2
SD1
SD0
S_DREQ
S_IOW#
S_IOR#
S_IORDY
S_DACK#
S_INTR
S_A1
S_A0
S_CS#1
2
SD8
SD9
SD10
SD11
SD12
12
SD13
SD14
16 15
SD15
22
24
26
28
30
32
34
S_A2
36
S_CS#3
38
40 39
C244
R328 33
SDD8
1 2
SDD9
3 4
SDD10
5 6
SDD11
7 8
SDD12
7 8
SDD13
5 6
SDD14
3 4
SDD15
1 2
R180
15K
RN56
33
RN53
33
SDD[8..15] {9}
ATADET1 {10}
SD_A2 {9}
SD_CS#3 {9}
Video Connector
FS1 1.1A-S
VCC5
POLY SWITCH
3VDDCCL {10}
B B
3VDDCDA {10}
CRT_HSYNC {8}
CRT_VSYNC {8}
CRT_HSYNC
CRT_VSYNC
3VDDCCL
3VDDCDA
R248 X_0
VCC5
8 4
1
2
U9A
NC7WZ08
D10
BAV99
7
R252 33
R254 X_0
VCC5
8 4
5
6
U9B
NC7WZ08
3
CP4 X_COPPER
L7 X_80-0805
C168
0.1u
Place clamping diodes close to VGA conn.
VCC5 VCC5
D11
BAV99
R256 33
C165
L18 60
L20 60
Connect each routed GND to GND plane at one point only(one via)
C167
0.1u 39p
V_14
V_13
CN8
22p
VGA_PWR V_PWR
R121
X_47K
FOR ESD
135
246
V_3
J1
15
10
14
9
13
8
12
7
11
6
7
8
YCN15F-003-1
17
5
4
3
2
1
16
C228
10p
V_2
C233
10p
V_1
C234
10p
D13
BAV99
VCC3
L21 0.082uH
C189
22p
L24 0.082uH
C200 R233
22p
C214
22p
L12 0.082uH
BLUE "rounted GND"
D14
BAV99
VCC3
L14 0.082uH
GREEN "rounted GND"
D15
BAV99
VCC3
L19 0.082uH L26 0.082uH
RED "rounted GND"
C190
10p
C201
10p
C215
10p
R227
75RST
75RST
R236
75RST
CRT_B {8}
CRT_G {8}
CRT_R {8}
Close to VGA Conn.
R167 2.2K
A A
8
7
VCC5
D9 1N4148S
CRT_HSYNC
CRT_VSYNC
R155 2.2K
R218 X_2.2K
R211 10K
R220 X_2.2K
R213 10K
6
3VDDCDA
470p C848
3VDDCCL
470p C202
VCC3
VCC3
Function
Buffered
Non-Buffered
Buffered
Non-Buffered
Use 10K pu/pd if VSYNC/HSYNC are buffered;
use 2.2K if VSYNC/HSYNC are un-buffered.
* Default
5
LDT internal
terminations
Enable
0
0*
X X
X X
Disable
CPU Type
strapping
Intel
AMD
X HSYNC
1
1
X
X
X
1 VSYNC
0
1
0*
4
3
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
ATA33/66/100 IDE & VIDEO Connectors
(MS-6595)
2
17 25 Monday, July 08, 2002
1
0A
Page 18
E
D
C
B
A
POWER CIRCUIT FOR LAN_USB PORT 4,5
CP16 X_COPPER
5V_STR
4 4
OC#3 {10}
FS4
1.5A-MINISMDC150
OC#3
C549
0.1u
L56 X_80-0805
R467
C555
27K
470p
R461
51K
C556
1u-0805
+
EC45
1000u-10V
SVCC2
R473
1K
USB4+ {10}
FRONT PANEL USB CONNECTOR FOR USB PORT 4,5
USB2
L59 X_0
1 2
L58
CMC_90ohm_0603
L57 X_0
1 2
3 4
OC#3
5
7 8
CN-PH-D2x5-1:2-YL-P05
R462 X_0
4 3
SVCC2 SVCC2
6
10
L62 X_0
L61
CMC_90ohm_0603
1 2
L60 X_0
C564 X_0.1u
4 3
USB5- {10} USB4- {10}
USB5+ {10}
POWER CIRCUIT FOR I1394_USB PORT 0,1
FS2
1.5A-MINISMDC150
5V_STR
OC#1 {10}
C262
0.1u
3 3
POWER CIRCUIT FOR USB PORT 0,1,2,3
FS3
1.5A-MINISMDC150
5V_STR
OC#2 {10}
C311
0.1u
CP6 X_COPPER
L27 X_80-0805
R185
27K
R188
51K
CP7 X_COPPER
L38 X_80-0805
R234
27K
R232
51K
C239
470p
NEAR I1394-SB CONNECTOR
C285
C286
470p
1u-0805
NEAR USB CONNECTOR
C238
1u-0805
KBGND
+
S_GND
SVCC0
+
EC18
1000u-10V
SVCC1
EC19
1000u-10V
R214
1K
R173
1K
REAR PANEL LAN_USB CONNECTOR FOR USB PORT 2,3
L46 X_0
L47
CMC_90ohm_0603
4 3
USB3- {10}
USB3+ {10}
USB2- {10}
USB2+ {10}
1 2
L48 X_0
L43 X_0
4 3
1 2
L45 X_0
NEAR USB CONNECTOR
L44
CMC_90ohm_0603
8
7
S_GND
246
CN10
X_47p
135
S_GND
S_GND
L49 X_600
S_GND
SVCC1
SBD3ÂSBD3+
SVCC1
SBD2ÂSBD2+
CP9 X_COPPER
LAN_USB1A
5
6
7
8
UP
1
2
3
4
DOWN
RJ45+USB+LEDx2-D20-BK
21
22
23
24
25
26
27
28
S_GND
2 2
CPU FAN
R23 4.7K
R22 1K
CPU_CTRL {11}
R17 510
YFET-NDS7002AS
Q7
SYSTEM FAN
R87 4.7K
1 1
SYS_CTRL1 {11}
R80 510
YFET-NDS7002AS
E
R84 1K R94
Q13
0.01u C57
SI2303DS
0.01u C143
SI2303DS
Q10
Q15
+12V
EC5 10u-16V
C646
X_4.7u-1206/35V
+12V
EC13 100u-16V
R32 4.7K
D5 1N4148S
R43
X_0/0805
+
R100 4.7K
D8 1N4148S
X_0/0805
+
D1x3-WH-SN
D1x3-WH-SN
D
R21 27K
C_FAN1
3
2
1
R98 27K
SYSFAN1
3
2
1
R24
10K
R93
10K
CPU_FAN1 {11}
SYS_FAN1 {11}
USB1- {10}
USB1+ {10}
USB0- {10}
USB0+ {10}
C
REAR PANEL I1394_USB CONNECTOR FOR USB PORT 0,1
L39 X_0
L40
4 3
1 2
L41 X_0
L35 X_0
4 3
1 2
L37 X_0
NEAR USB CONNECTOR
B
CMC_90ohm_0603
L36
CMC_90ohm_0603
246
8
CN9
X_47p
135
7
KBGND
MSI
Title
Size Document Number Rev
Date: Sheet of
FAN & USB Connectors
SVCC0
SBD1ÂSBD1+
KBGND
SVCC0
SBD0ÂSBD0+
KBGND
MICRO-STAR INt'L CO., LTD.
(MS-6595)
I1394_USB1A
5
6
7
8
1
2
3
4
DOWN
I1394+USBx2-D20-BK
H/W Project Leader : Joey Lee
H/W Project Engineer : Richard Shih
A
UP
15
16
17
18
19
20
21
22
18 25 Monday, July 08, 2002
KBGND
0A
Page 19
8
7
6
5
4
3
2
1
I1394 PHY FW8 03
3VDUAL
R406
D D
+3.3VPHYA
C504
C521
0.1u
0.1u
1394SCLK {10}
1394LREQ {10}
1394CTL0 {10}
1394CTL1 {10}
1394LNKON {10}
C C
PVDD
CPWR
B B
C516
C538
0.1u
1394LPS {10}
1394D7 {10}
1394D6 {10}
1394D5 {10}
1394D4 {10}
1394D3 {10}
1394D2 {10}
1394D1 {10}
1394D0 {10}
0.1u
X_10p C489
C496 0.1u
C520
4.7u-0805
R402 0
1394LREQ
1394CTL0
1394CTL1
1394LPS
1394LNKON
R397 10K
1394D7
1394D6
1394D5
1394D4
1394D3
1394D2
1394D1
1394D0
R413 4.7K
R416 390K
R408 10K
R409 10K
R412 10K
12p C527
1 2
Y4
24M-16pf-HC49S-D
12p C514
30
VDDA
31
VDDA
43
VDDA
50
VDDA
51
VDDA
57
PLLVDD
63
SYSCLK
1
LREQ
3
CTL0
4
CTL1
16
LPS
18
C/LKON
13
D7
12
D6
11
D5
10
D4
9
D3
8
D2
6
D1
5
D0
23
ISO
24
CPS
20
PC0
21
PC1
22
PC2
59
XI
60
XO
61
RESET
54
R0
32
VSSA
49
VSSA
52
VSSA
53
VSSA
58
PLLVSS
FW803
CP15 X_COPPER
L53 X_80-0805
U18
FW803
X_0
TPB0-
TPB0+
TPA0-
TPA0+
TPBIAS0
TPB1-
TPB1+
TPA1-
TPA1+
TPBIAS1
TPB2-
TPB2+
TPA2-
TPA2+
TPBIAS2
VDD
VDD
VDD
VDD
VDD
CNA
PD
SM
SE R1
VSS
VSS
VSS
VSS
VSS
REAR PANEL I1394_USB CONNECTOR
L34 X_0
4 3
TPA2+
TPA2-
TRACE LENGTH
A A
8
8 INC≦H
TPB2+
TPB2-
7
1 2
CMC_90ohm_0603
L32 X_0
L31 X_0
1 2
L30
CMC_90ohm_0603
L29 X_0
6
4 3
0-0805
7
17
26
27
62
33
34
35
36
37
38
39
40
41
42
44
45
46
47
48
15
19
29
28 55
2
14
25
56
64
+12V
VCC3
R400
C486
0.01u
TPB0ÂTPB0+
TPA0ÂTPA0+
TPBIAS0
TPB1ÂTPB1+
TPA1ÂTPA1+
TPBIAS1
TPB2ÂTPB2+
TPA2ÂTPA2+
TPBIAS2
R404 220
R429 10K
R426 10K R431 2.49KST
1.5A-miniSMDM150/24
C267 0.1u L33
R193 0
C477
0.1u
PVDD
C493
0.1u
FS6
C258 X_0.1u
C567
220p
TPB0ÂTPB0+
TPA0ÂTPA0+
TPBIAS0
C553
220p
TPB1ÂTPB1+
TPA1ÂTPA1+
TPBIAS1
C547
220p
TPB2ÂTPB2+
TPA2ÂTPA2+
TPBIAS2
I1394_USB1B
9
PWR
14
TPA+
13
TPA-
12
TPB+
11
TPB-
10
GND
I1394+USBx2-D20-BK
5
CLOSE TO PHY
R465
56.2RST
R463
56.2RST
R470
56.2RST
R468
56.2RST
R443
56.2RST
R445
56.2RST
R466
56.2RST
R464
56.2RST
R471
56.2RST
R469
56.2RST
R444
56.2RST
R446
56.2RST
R496
4.99KST
R472
4.99KST
R459
4.99KST
FRONT PANEL I1394 CONNECTORS
L68 X_0
4 3
1 2
TPA0+
TPA0-
0.33u C568
0.33u C552
0.33u C537
4
TPB0+
TPB0-
TPA1+
TPB1+
TPB1-
L67
CMC_90ohm_0603
L66 X_0
L65 X_0
1 2
L64
CMC_90ohm_0603
L63 X_0
L74 X_0
1 2
L73
CMC_90ohm_0603
L72 X_0
L71 X_0
1 2
L70
CMC_90ohm_0603
L69 X_0
3
TPA0_0+
TPA0_0-
4 3
TPB0_0+
TPB0_0-
4 3
TPA1_1+
TPA1_1-
4 3
TPB1_1+
TPB1_1-
1394_PWR1
1394_PWR2
1394_GND
MSI
Title
Size Document Number Rev
Date: Sheet of
TPA0_0+
TPB0_0+
1394_PWR1 1394SCLK
TPA1_1+
TPB1_1+ TPA1Â1394_PWR2
FS5
1.5A-miniSMDM150/24
FS7
1.5A-miniSMDM150/24
MICRO-STAR INt'L CO., LTD.
2
J1394_1
1
TPA-
TPA+
3
GND
GND
5 6
TPB+ TPB-
7
+12V
+12V
GND
D2x5-1:2
J1394_2
1
TPA-
TPA+
3
GND
GND
5 6
TPB+ TPB-
7
+12V
+12V
GND
D2x5-1:2
CPWR
D24
MBRS340T3-S-CASE403-03
1 2
C569 0.1u
R497 1M
FW803(1394 PHY) & Connectors
(MS-6595)
TPA0_0-
2
1394_GND 1394_GND
4
TPB0_0Â1394_PWR1
8
1394_GND
10
TPA1_1-
2
1394_GND 1394_GND
4
TPB1_1Â1394_PWR2
8
1394_GND
10
CT14
1500u/16V
C566
0.1u
C570
0.1u
+12V
19 25 Monday, July 08, 2002
1
0A
Page 20
8
7
6
5
4
3
2
1
ATX Connector
VCC3
-12V
R55 1K
5VSB
D D
C C
PS_ON# {11,21}
VCC5
VCC5
C23
39p
-5V
C33
0.1u
C69
X_1000p
C111
0.1u
C156
0.1u
R347 330
C478 2.2u
JWR1
11
12
13
14
15
16
17
18
19
20
POWER
YPC20
C134 C126
39p
PWOK {6,21}
3.3V
-12V
GND
PSON
GND
GND
GND
-5V
5V
5V
GND
GND
GND
POK
5VSB
1
3.3V
2
3.3V
3
4
5V
5
6
5V
7
8
9
10
12V
C112
39p
C71
C15
39p
C47
39p
PWOK
0.1u
Front Panel
IDE_PWR
HDDLED
180p C431
FP_RST#
JFP1
1
3
5
7
9 10
IDE_PWR
IDE_LED
PWR_SW
-RESET
-PWR_SW
RESET
NC KEY
D2x5:10-BK
LED1
LED2
VCC3
C29
39p
VCC5
C70
0.1u
C108
39p
2
4
6
8
R388
10K
C133
39p
R477 1K
C560 0.1u
C584
X_104p
(5VSB)
U23A
X_DM7407
1 2
C92
0.1u
C122
0.1u
5VSB
+12V
5VSB
PLED1 {21}
PLED2 {21}
PWBTIN {11}
VCC3
R504
U24E
1K U24F
R498 100
R491 0
X_74LCX14-SOIC14
11 10
C580
2.2u
FP_RST#
(3VDUAL)
X_74LCX14-SOIC14
13 12
FP_RST# {21}
PLL_RST {6}
U23B
3 4
X_DM7407
(5VSB)
R489 X_10K
C581
X_100p X_1000p
U24D
X_74LCX14-SOIC14
9 8
(3VDUAL)
CPU_OK {3,5,21}
U24C
X_74LCX14-SOIC14
5 6
(3VDUAL)
Simulation
VCC5
SIM1
SIM2
MCP_OK {10,21}
J2
J3
BUZZER
3VDUAL
B B
NRIA# {11}
RIB {15}
Internal Ring Wake Up Block
D1 1N4148S
D2 X_1N4148S
R6 4.7K
C13
X_104p
R10
1K
R9
10K
Q5
2N3904S
RI# {10}
VCC5
BEEP {11}
SPKR {10}
R340 10K
R341 4.7K
R360 2.2K
2N3904S
Q36
2N3904S
R367 220 Q34
R366 220 D22 1N4148S
C467 0.1u
BUZ+
VCC5
1
2
BZ1
BUZZER
UNUSE LOGIC
IDE LED
RSMRST#
HDDLED
A A
3VDUAL
R169 75K
8
C224
1u-0805
1
NC
2
A
3 4
GND Y
3VDUAL
U5
5
VCC
TC7S14F-SSOP5P5
7
U6
1
NC
2
A
VCC
3 4
GND Y
TC7S14F-SSOP5P5
3VDUAL
5
PWRGD_SB {10,13,21}
6
IDEACTP# {17}
5
Q23
Q22 R181 330 R177 330
PNP-3906LT1-S-SOT23
4
IDEACTS# {17}
3
U23C
5 6
X_DM7407
(5VSB)
MSI
Title
Size Document Number Rev
Date: Sheet of
U23D
9 8
X_DM7407
(5VSB)
11 10
U23E
X_DM7407
(5VSB)
MICRO-STAR INt'L CO., LTD.
ATX Connector & Front Panel
(MS-6595)
2
13 12
U23F
X_DM7407
(5VSB)
20 25 Monday, July 08, 2002
1
0A
Page 21
8
ACPI (MS5)
D D
C C
B B
1000u-6.3V
EC12
PS_ON# {11,20}
SLP_S3# {5,10}
VTT_DDR2
1 2
+
C128
0.1u
R164 10K
C217 X_0.1u
SLP_S3#
VCC3
EC15 470u_10V
D
Q17
NIKO-P3055LD-TO252
S
D
Q16
NIKO-P3055LD-TO252
S
Q21
2N3904S
R152 X_0
PCIRST#3 {9}
+
G
G
3VDUAL
R153
4.7K
HDDRST# {17}
SMBDATA {10,11,14}
7
PWRGD_SB {10,13,20}
R125 0
SMBCLK {10,11,14}
SLP_S5# {10}
CPU_OK {3,5,20}
MCP_OK {10,20}
FP_RST# {20}
C164 X_0.1u
SLP_S5#
PWOK {20}
PLED1 {20}
PLED2 {20}
5VSB
FOR 3VSB OR 3VSTR
SETTING BY SEL1
VCC5
5VSB
R150 X_0
R148 0
R147 0
R141 0
VCC5
R123
330
R122 10K
R156 0
R137
330
6
5VSB
1
DGND
2
PCIRST#/GPIOA
3
HDD_RST#/GPIOA
4
SLOT_RST#/GPIOA
5
DEV_RST#/GPIOA
6
I2C_DATA
7
I2C_CLK
8
BT_DRV
9
BT_SEN
10
BT_SINK
11
AGND0
12
SEL1
SEL0
H
L
**S5O# pin function(Hi level = 5V)
same as 5VUSB(Hi level = 12V)
5VSB
SLP_S5#
SLP_S3#
PWR_OK1/GPIOC
RSM_RST#/GPIOB
CPU_PWGD/GPIOC
CHIP_PWGD/GPIOC
EXTRA_PWGD/GPIOC
VRAM_2.5_DEN
VRAM_2.5_DRV
5VSB
VRGOOD
1.2V_SEN
R136
330
VCC3
R140
4.7K
48
PLED0
PLED1
PWR_OK
FP_RST#/GPIOB
VCC
VRAMDRV2
VRAMSEN
VRAMDRV1SSAGND1
1314151617181920212223
5
5VUSB
2 MOSFET
1 MOSFET
R159
10K
3738394041424344454647
U4
5V_USB
5VSB_DRV
5V_DRV
TYPEDET#
S5O#/GPIOB/SEL0
VAGP_SEN
VAGP_DRV
AGND2
1.25VREF
9VSB
C2
C1
VCC3
1.2V_DRV
MSI-5
24
36
35
34
33
32
31
30
29
28
27
26
25
1N5817-S-DO-241AC
C39
2200P
C40
X_1000p
VREF1_25
C208 1u-0805
C207
0.1u
D16
C212 0.1u
4
5VSB
EC47 1000u-10V
+
D
G
Q9
NDS351AN-S-SOT23
S
Q6
45N02_T0252
VCC5
Low RDS ON MOSFET
Dual
FootPrint
NIKO-P3055LD-TO252TO263
5VSB
2
CHARGE PUMP
VOLTAGE OUTPUT
C209
1u/16V-0805
C54 4.7u-0805
EC2 470u_10V
VCC2_5
3
4
Q31
1
D17
1N4148S
+12V
5V_STR
9VSB
VCC3
C41 0.1u
+
EC1
470u_10V
VDDQ
+
EC21
10u-16V
3
2
1
System Decoupling Capacitors
C216
0.1u
0.1u
EC29
1000u-6.3V
C430
0.1u
C454
0.1u
Q30
NIKO-P3055LD-TO252
D
+
7 8
RN71
1K
VCC5
5V_STR
3VDUAL
+
VCC3
EC24
1000u-6.3V
3VDUAL MEM_STR
1 23 45 6
G
1 23 45 6
S
C328
X_100p
VDDQ
+
5VSB
EC23
1000u-6.3V
C335
0.1u
C349
0.1u
C326
39p
EC9
+
10u-16V
C563
0.1u
C503
0.1u
C175
0.1u C4
C410
0.1u
C7
0.1u
C399
0.1u
C565
0.1u
C32
0.1u
C502
0.1u
C398
0.1u
2.5V POWER TRANSLATOR
To DDR Clock Buffer
VCC2.5 POWER PLANE
9VSB
1
U10A
R258
100RST
3
+
2
-
R257
4 8
100RST
C344
1u-0603
NS-LM358MX-SOIC8
Discharge Residual Voltage
7 8
RN40
1K
VCC5
VCC3
+
EC22
10u-16V
VCC2_5
C16
0.1u
C343
0.1u
C331
0.1u
C120
0.1u
C162
0.1u
C513
0.1u
C332
0.1u
VREF1_25
C338
0.1u
C191
C173
0.1u
C114
10u-0805
+
1u-0603
VCC3
45N02_T0252
S
D
C82 4.7u-0805
5VSB
0.47u/0805
EC11 470u_10V
+
Q11
G
Q12
NDS351AN-S-SOT23
6
C179
SEL1
H
TRI-STATE
L
VTT_DDR2
+
+
A A
+
8
VRAM
3.3VDUAL
3.3VSB
3.3VSTR
EC16
1000u-6.3V
EC27
1000u-6.3V
EC3
10u-16V
C11
0.1u
C283
39p
C280
47p
VRAM_2.5
2.5V
2.5V
1.25V
EC6
1000u-6.3V
7
3VDUAL
1 2
+
C96
1u-0603
EC7 470u_10V
R158
1K
C196
0.1u
NIKO-P3055LD-TO252
R133 X_267RST
R145 21RST
R146 619RST
5
Q14
G
3VDUAL
C95
0.1u
3VDUAL
1 23 45 6
7 8
1 23 45 6
5VSB
5V_STR
1 23 45 6
D
MEM_STR
S
D19 1N4001-S-SM-1
4
VCC2_5
3
VCC5
R114
7 8
X_1K
RN29
1K
R118
X_1K
MSI
Title
Size Document Number Rev
Date: Sheet of
2
RN21
X_22
R129
X_4.7K Q20
X_YFET-NDS7002AS
Q18
X_2N3904S
MICRO-STAR INt'L CO., LTD.
System & DDR Regulators
(MS-6595)
7 8
RN22
X_22
Q19
X_YFET-NDS7002AS
21 25 Monday, July 08, 2002
1
0A
Page 22
8
7
6
5
4
3
2
1
C301
33p
R106 1M
COREFB {3}
COREFB# {3}
12VP
CT11
820u-25V
C186 2.2u-1206/50V
C183 0.1u
VCORE
CT9
820u-25V
D12
1N4148S
R138 7.5KST
R135 7.5KST
VIDB0
VIDB1
VIDB2
VIDB3
VIDB4
CT10
820u-25V
+12VP
2
5
4
3
1
13
14 15
18
19
20
21
22
17
7 8
R119 X_0
R126 0
R128 0
R132 X_0
CT12
820u-25V
U3
VCCDR
BOOT1
UGATE1
PHASE1
LGATE1
ISEN1
PGNDS1 PGNDS2
VID0
VID1
VID2
VID3
VID4
OSC/INH
SGND COMP
FBR
11
C295
4.7u-1206/35V
BOOT2
UGATE2
PHASE2
LGATE2
PGOOD
FBG
12
Require this connection as a copper pour.
VCC
ISEN2
PGND
VSEN
L6917BD
C279
1u-0805/25V
+12VP
C155 2.2u-1206/50V
R142
10-0805
6
24
25
26
27
16
28
23
10
9
FB
D7
1N4148S
C184 1u-0805
C159 0.1u
R117 7.5KST
R113 7.5KST
R105 X_4.7K
R139 1.43KST
CT2
2200u-6.3V
VCORE
VCORE
R143
34KST
C185
152p
CT3
2200u-6.3V
C83
10u-1206
R259 2.7_0805
R229 2.7_0805
VCC3
R144 210KST
C178
10p
CT4
2200u-6.3V
C140
10u-1206
IPB15N03L
C322 0.1u
C340 1u-0805/25V
D S
Q29
G
Q28
D S
FDB6670AL-S-TO263
G
VCC5
CT6
2200u-6.3V
C139
C67
10u-1206
10u-1206
D S
G
Q27
X_FDB6670AL-S-TO263
CT8
2200u-6.3V
2200u-6.3V
C135
10u-1206
CHOK2
0.8u-20%_35A
R203
5.1-0805
C282
332p-1206
CT7
C109
10u-1206
C119
10u-1206
VCORE
CT1
4700u-6.3V
+
CT5
4700u-6.3V
+
+12VP
D D
VCORE
C C
B B
CHOK1
0.8u-20%_35A
5.1-0805
C220
332p-1206
R165
CHOK3 1.1uH-25A
C336
C359
0.1u
33p
C257 0.1u
C274 4.7u-1206/35V
Q24
X_FDB6670AL-S-TO263
D S
D S
Q26
IPB15N03L
R172 2.7_0805
G
D S
Q25
FDB6670AL-S-TO263
G
G
R195 2.7_0805
VIDB[0..4] {5}
+12VP
VID4 VID3 VID2 VID1 VID0 VDC(V)
1 1 1 1 0 1.100
1 1 1 0 1 1.125
1 1 1 0 0 1.150
1 1 0 1 1 1.175
1 1 0 1 0 1.200
1 1 0 0 1 1.225
1 1 0 0 0 1.250
1 0 1 1 1 1.275
1 0 1 1 0 1.300
1 0 1 0 1 1.325
A A
1 0 1 0 0 1.350
1 0 0 1 1 1.375
1 0 0 1 0 1.400
1 0 0 0 1 1.425
1 0 0 0 0 1.450
0 1 1 1 1 1.475
8
VID4 VID3 VID2 VID1 VID0 VDC(V)
0 1 1 1 0 1.500
0 1 1 0 1 1.525
0 1 1 0 0 1.550
0 1 0 1 1 1.575
0 1 0 1 0 1.600
0 1 0 0 1 1.625
0 1 0 0 0 1.650
0 0 1 1 1 1.675
0 0 1 1 0 1.700
0 0 1 0 1 1.725
0 0 1 0 0 1.750
0 0 0 1 1 1.775
0 0 0 1 0 1.800
0 0 0 0 1 1.825
0 0 0 0 0 1.850
1 1 1 1 1 OFF
7
6
ATX12V POWER CONNECTOR
JPW1
C334
33p
3
12V
4
12V
D2x2
+12VP
CT13
820u-25V
C337
0.01u
5
GND
GND
1
2
4
VCORE
C84
10u-1206
C118
10u-1206
3
C66
10u-1206
C65
C141
C130
C110
10u-1206
10u-1206
10u-1206
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
VRM 9.0 - ST6917B
(MS-6595)
2
10u-1206
C88
10u-1206
22 25 Monday, July 08, 2002
1
0A
Page 23
1
MCP2
GPIO 0
GPIO 1
GPIO 2
GPIO 3
GPIO 4
GPIO 5
GPIO 6
GPIO 7
GPIO 8
GPIO 9
GPIO 10
GPIO 11
GPIO 12
GPIO 13
GPIO 14
GPIO 15
GPIO 16
GPIO 17 Reserve
GPIO 18
GPIO 19
GPIO 20
GPIO 21
GPIO 22
GPIO 23
GPIO 24 RI# (multifuntion pin)
GPIO 25
A A
GPIO 26
GPIO 27
GPIO 28
GPIO 29
GPIO 30
GPIO 31
GPIO 32
GPIO 33
GPIO 34
GPIO 35
GPIO 36~38
GPIO 48
GPIO 49
Function Type GPIO Pin
I
PCI_REQ#4 (multifunction pin)
O PCI_GNT#4 (multifunction pin)
I/O PCI_PERR# (multifunction pin)
I
PCI_IRQ#E (multifunction pin)
I
MII_RXER (multifunction pin)
I
Pull up through 8.2K ohms (LPC_DRQ#1)
I
USB_OC1# (multifunction pin)
I
USB_OC2# (multifunction pin)
I
USB_OC2# (multifunction pin)
I
USB_OC3# (multifunction pin)
I
USB_OC3# (multifunction pin)
AC_SDIN1 (multifuntion pin)
O
I
A20GATE (multifuntion pin)
I
Pull up through 10K ohms (SPDIF)
Unused
I/O
I/O
B_SEL0
I/O
B_SEL1
I/O
Unused
I SIO_PME# (multifunction pin)
O
SLP_S1# (multifunction pin)
I
Pull up through 4.7K ohms (SIO_SMI#)
I THERM# (multifuntion pin)
I
INTRUDER#
I
I
KBRST# (multifuntion pin)
O SUSCLK (multifuntion pin)
I AGP_PME# (multifuntion pin)
Primary IDE ATA66/100 detection (ATADET0)
I
I
GPIO29 (Clear password indicator , Active Low)
Secondary IDE ATA66/100 detection (ATADET1)
I
I GPIO31 (CMOS Clear , Active Low)
O
Unused
O
Unused
O
Unused
Unused I
I Pull up through 10K ohms to 3VDUAL
I
Pull up through 4.7K ohms to VCC3
I
Pull up through 4.7K ohms to VCC3
PCI Config.
DEVICE
INTA#
INTB#
PCI_REQ#0 PCI Slot 1
PCI_GNT #0
INTC#
INTD#
PCI Slot 2
INTD#
INTA#
PCI_REQ#1 AD23 PCICLK1
PCI_GNT #1
INTB#
INTC#
PCI Slot 3 PCI_REQ#2 AD24
INTC#
INTD#
PCI_GNT #2
INTA#
INTB#
IDSEL
AD22
LPC Super I/O
GPIO Pin Type Function
GPIO 10 OOMB_ID2
GPIO 11
GPIO 12
GPIO 13
GPIO 14
GPIO 15
GPIO 16
GPIO 17
GPIO 20
GPIO 21
GPIO 22
GPIO 23
GPIO 24
GPIO 25
GPIO 26
GPIO 27
GPIO 31
GPIO 32
GPIO 33
GPIO 34
GPIO 35
Unused
Unused O
Unused
O
O MB_ID0
MB_ID1
O
Unused
O
MB_ID3
O
O Unused
SMBC LK
I
SMBDAT A
I/O
O Unused
O Unused
I
BIOS Protect , Active Low
Unused
O
Floopy Driven Density Select , Active Low
O
SLP_S 3# GPIO 30
I
PS_ON#
O
O
Unused
Unused
O
PWR_FAN , High to turn O N FAN
O
Unused
O
Flash ROM
CLOCK REQ#/GNT#
PCICLK0
PCICLK2
CLK GEN PIN OUT MCP1 INT Pin
MCP/AB20 (PCI_CLK0)
MCP/AB18 (PCI_CLK1)
MCP/AB12 (PCI_CLK2)
GPIO Pin Type Function
SM_CLK0 (multifuntion pin)
SPIO 0
I/O
SPIO 1 I/O SM_DATA0 (multifuntion pin)
SPIO 2 I/O SM_CLK1 (multifuntion pin)
SPIO 3
SPIO 4
SPIO 5
SPIO 6
I/O
SM_DATA1 (multifuntion pin)
I/O
DDC_CLK (multifuntion pin)
I/O
DDC_DATA (multifuntion pin)
I
Pull up through 4.7K ohms (SMB_ALERT#)
GPI 0
GPI 1
GPI 2
GPI 3
GPI 4 I
DDR DIMM Config.
I
Pull down through 1K ohms (unused)
I
Pull down through 1K ohms (unused)
I
Pull down through 1K ohms (unused)
I
Pull down through 1K ohms (unused)
Pull down through 1K ohms (unused)
DEVICE ADDRESS CLOCK
DIMM 2
DIMM 1
1010010B
1010001B
1
MCLK_A0/MCLK_A0#
MCLK_A1/MCLK_A1#
MCLK_A2/MCLK_A2#
MCLK_B0/MCLK_B0#
MCLK_B1/MCLK_B1#
MCLK_B2/MCLK_B2#
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
General Purpose Spec
(MS-6595)
23 25 Monday, July 08, 2002
0A
Page 24
8
7
6
5
4
3
2
1
MH7
1
5
2
Power Delivery Map
D D
ATX 12V POWER Supply
3.3V 5V 5VSB1A12V
VRM
VCORE
Processor Core
6
3
7
4
8
9
MH4
1
5
2
6
3
7
4
8
9
MH9
1
5
2
6
3
7
4
8
9
MH5
1
5
2
6
3
7
4
8
9
MH6
1
5
2
6
3
7
4
8
9
MH10
1
5
2
6
3
7
4
8
9
Processor Vtt
VID REG
C C
1.5V VREG
VDDQ / 3.5A
2.5V VREG
MEM_STR / 5A
1.25V VREG
VCC2_5
1.4V VREG
VTT_DDR2 / 1.5A
VDD / 6A
Processor VID
CRUSH Core
LDT BUS
CRUSH17/18 Vtt
CRUSH17/18 AGP
CRUSH17/18 OTHER
CRUSH17/18 DDR Memory 2.5V
DDR System Memory 2.5V
DDR Vtt 1.25V
MCP2 Core
LDT BUS
Location Reference Hold
1 2
1 2
1 2
FM6
FM7
X_FM
X_FM
1 2
1 2
FM16
FM13
X_FM
X_FM
1 2
1 2
FM3
FM9
X_FM
X_FM
1 2
FM4
FM5
X_FM
X_FM
1 2
1 2
FM14
FM12
X_FM
X_FM
1 2
1 2
FM8
FM11
X_FM
X_FM
1 2
1 2
MCP2 Vtt
MCP2 I/O 3.3V
B B
1.4V SB
AUXC
3V_Dual
MCP2 Auxiliary 1.2V Core
MCP2 Resume I/O 3.3V
MCP2 RTC 3.3V(5uA)
MCP2 5V
Auto-BOM Manual Parts
PCB1
PCB
U19_X1
U26_X21
MCP2 5V Standby
BAT1_X1
+
JPWD1(1-2)
JBAT1(1-2)
LPC FWH 3.3V
HS2(Q28-Q29)
HS1(Q25-Q26)
LPC Super I/O 3.3V
FM10
X_FM
FM15
X_FM
U26_X1
CRUSH18-HeatSink
1
2
3
1
2
3
U26_X22
COM1
MH1
5
6
7
4
8
9
MH8
5
6
7
4
8
9
1 2
1 2
FM2
FM1
X_FM
X_FM
1 2
1 2
FM18
FM17
X_FM
X_FM
1 2
1 2
FM22
FM21
X_FM
X_FM
1 2
1 2
FM20
FM19
X_FM
X_FM
Mounting Holes
HEAT SINK
A A
Title
Size Document Number Rev
8
7
6
5
4
3
Date: Sheet of
HEAT SINK
MSI
MICRO-STAR INt'L CO., LTD.
POWER DELIVERY MAP & MANUAL
2
(MS-6597)
24 25 Monday, July 08, 2002
1
0B
Page 25
5
D D
C C
4
3
2
1
B B
A A
MSI
Title
Size Document Number Rev
5
4
3
2
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
REVISION HISTORY - 1
(MS-6595)
25 25 Monday, July 08, 2002
1
0A