Page 1
5
4
3
2
1
D D
MS-6725D2 uATX
Title Page
Cover Sheet 1
Block Diagram
AMD Clawhammer
Nvidia CK8 7,8,9,10,11
System Memory
DDR Terminations
AGP 8X SLOT 16
C C
VGA CONNECTOR
PCI Connectors
AC'97 Codec
AUDIO POR T
Gigabit LAN
USB Port
IDE Connectors
LPC I/O & H/W mornitor
System ROM & D_LED
B B
Dual Power & AGP Power
PWROK & USB PWR & ATX CONN.
Front Panel and FAN
S-ATA PHY
BULK / Decopuling / PULL-UP
K8 Core Power
ICS LAN PHY(10-100T BASE)
Menu Parts
2
3 History
4,5,6
12,13
14,15
17
18,19
20
21
22
23
24
25
26
27 I/O Connectors
28 DDR Power & HT Power
29
30
31
32
33
34
35
36
A A
Micro Star Restricted Secret
5
4
3
2
1
Page 2
5
D D
32
25
VCC
VDD
1
U24_1
VPP
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
RFU
CE
GND
GND1
21
20
19
18
17
15
14
13
22
28
16
26
27
3
4
5
6
7
8
9
2
VCCA
CLK
MODE
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
RESET_L
WE_L
OE_L
C C
31
29
30
10
11
12
23
24
B B
4
PCB
_
JBAT1(1-2)
1
2
JC-D2-GN-SB
3
COM1
COMPORT
JROM(1-2)
1
2
JC-D2-GN-SB
HS1
_
JBOOT(2-3)
1
2
JC-D2-GN-SB
2
HS2
_
VBAT1-1
1
HS3
_
A A
Title
Size Document Number Rev
5
4
3
Date: Sheet of
<Title>
<Doc> <RevCode>
A
2
1 1 Tuesday, December 17, 2002
1
Page 3
S-ATA X2
5
4
3
2
1
Block
Diagram
D D
ATX P.S.U
1.2V_HT
Clawhammer
Unbuffered
DDR333 SDRAM
VCC
ISL6525
MOSFET
LINK 0
16x16
IN
OUT
VCC5_SB
YLT1084
C C
B B
VGA CONNECTOR
ICS LAN
PHY(10-100T)
BCM5702(GIGABIT)
PCI Slots x4
MII_25MHZ
32b/33MHz
Nvidia
CK8(G)
Clock Generator
8X AGP Port
S-ATA PHY
EIDE (ATA/133) x2
USB 2.0 x6
USB Ports: 2 to backplane,
4 to header
AC'97 Audio
VCC3
S-ATA X2
+12V
MOSFET
EZ1117A
LM358MX
(OP + MOS)
TL431L
ISL6559
78L05
1.2V
VCC5_DUAL
VCC3_SB
VCC_18
VDD_15
VDDA_PLL
VDD_CORE
+5VR
ISL6525
LM358MX
(OP + MOS)
1.2V_DUAL
VTT_DDR_SUS
VDD_25_SUS
SWITCH
(45N02)
VDD_25
Power up:
1. VDDA_PLL after POK vaild.
LPC ROM
A A
5
LPC
LPC Super I/O
Floppy Disk Drive
Parallel & Serial Port
4
3
2. VDDA_PLL before VDD_CORE.
3. VDD_25_SUS before VDD_CORE.
4. VTT_DDR_SUS before VDD_CORE.
5. VTT_DDR_SUS before or with VDD_25_SUS.
6. VDD_CORE before 1.2V.
Power down:
1. 1.2V before VDD_CORE.
2. VDD_CORE before VDD_25_SUS.
3. VDD_25_SUS before or with VTT_DDR_SUS.
4. VDD_CORE before or with VDDA_PLL.
2
Micro Star Restricted Secret
1
Page 4
5
D D
C C
4
3
2
1
B B
A A
M icro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
GPIO Spec.
MS-6725D2
Last Revision Date:
Tuesday, December 17, 2002
Sheet
1
3 35
Rev
0A
of
Page 5
5
4
3
2
1
VREF_DDR_CLAW VDD_25_SUS
VREF_DDR_CLAW
VTT_SENSE 28
VTT_DDR_SUS
D D
VDD_25_SUS
R556 51
R3 11.3RST
R4 11.3RST
MEMZN
MEMZP
AE13
AG12
D14
C14
VTT_SENSE
MEMVREF1
MEMZN
MEMZP
10Sep02-Jerry-For A2 CPU.
MD63
MD[63..0] 15
C C
B B
MDQM[7..0] 15
10Sep02-Jerry-For B0 CPU.
-MDQS[7..0] 15
A A
5
MD62
MD61
MD60
MD59
MD58
MD57
MD56
MD55
MD54
MD53
MD52
MD51
MD50
MD49
MD48
MD47
MD46
MD45
MD44
MD43
MD42
MD41
MD40
MD39
MD38
MD37
MD36
MD35
MD34
MD33
MD32
MD31
MD30
MD29
MD28
MD27
MD26
MD25
MD24
MD23
MD22
MD21
MD20
MD19
MD18
MD17
MD16
MD15
MD14
MD13
MD12
MD11
MD10
MD9
MD8
MD7
MD6
MD5
MD4
MD3
MD2
MD1
MD0
MDQM7
MDQM6
MDQM5
MDQM4
MDQM3
MDQM2
MDQM1
MDQM0
-MDQS7
-MDQS6
-MDQS5
-MDQS4
-MDQS3
-MDQS2
-MDQS1
-MDQS0
C13
C11
AC1
AC3
AC2
AD1
AG3
AH3
AH9
AG5
AH5
AJ10
AH11
AJ11
AH15
AJ15
AG11
AJ12
AJ14
AJ16
AG1
AH7
AH13
AJ13
A16
B15
A12
B11
A17
A15
A11
A10
B9
C7
A6
A9
A5
B5
C5
A4
E2
E1
A3
B3
E3
F1
G2
G1
L3
L1
G3
J2
L2
M1
W1
W3
W2
Y1
AE1
AE3
AJ4
AE2
AF1
AJ3
AJ5
AJ6
AJ7
AJ9
R1
A13
A7
C2
H1
AA1
T1
A14
A8
D1
J1
AB1
AJ2
AJ8
MEMDATA63
MEMDATA62
MEMDATA61
MEMDATA60
MEMDATA59
MEMDATA58
MEMDATA57
MEMDATA56
MEMDATA55
MEMDATA54
MEMDATA53
MEMDATA52
MEMDATA51
MEMDATA50
MEMDATA49
MEMDATA48
MEMDATA47
MEMDATA46
MEMDATA45
MEMDATA44
MEMDATA43
MEMDATA42
MEMDATA41
MEMDATA40
MEMDATA39
MEMDATA38
MEMDATA37
MEMDATA36
MEMDATA35
MEMDATA34
MEMDATA33
MEMDATA32
MEMDATA31
MEMDATA30
MEMDATA29
MEMDATA28
MEMDATA27
MEMDATA26
MEMDATA25
MEMDATA24
MEMDATA23
MEMDATA22
MEMDATA21
MEMDATA20
MEMDATA19
MEMDATA18
MEMDATA17
MEMDATA16
MEMDATA15
MEMDATA14
MEMDATA13
MEMDATA12
MEMDATA11
MEMDATA10
MEMDATA9
MEMDATA8
MEMDATA7
MEMDATA6
MEMDATA5
MEMDATA4
MEMDATA3
MEMDATA2
MEMDATA1
MEMDATA0
MEMDQS17
MEMDQS16
MEMDQS15
MEMDQS14
MEMDQS13
MEMDQS12
MEMDQS11
MEMDQS10
MEMDQS9
MEMDQS8
MEMDQS7
MEMDQS6
MEMDQS5
MEMDQS4
MEMDQS3
MEMDQS2
MEMDQS1
MEMDQS0
U1B
RSVD_MEMADDA15
RSVD_MEMADDA14
RSVD_MEMADDB15
RSVD_MEMADDB14
MEMORY INTERFACE
VTT_A4
VTT_A1
VTT_A2
VTT_A3
VTT_B1
VTT_B2
VTT_B3
VTT_B4
MEMRESET_L
MEMCKEA
MEMCKEB
MEMCLK_H7
MEMCLK_L7
MEMCLK_H6
MEMCLK_L6
MEMCLK_H5
MEMCLK_L5
MEMCLK_H4
MEMCLK_L4
MEMCLK_H3
MEMCLK_L3
MEMCLK_H2
MEMCLK_L2
MEMCLK_H1
MEMCLK_L1
MEMCLK_H0
MEMCLK_L0
MEMCS_L7
MEMCS_L6
MEMCS_L5
MEMCS_L4
MEMCS_L3
MEMCS_L2
MEMCS_L1
MEMCS_L0
MEMRASA_L
MEMCASA_L
MEMWEA_L
MEMBANKA1
MEMBANKA0
MEMADDA13
MEMADDA12
MEMADDA11
MEMADDA10
MEMADDA9
MEMADDA8
MEMADDA7
MEMADDA6
MEMADDA5
MEMADDA4
MEMADDA3
MEMADDA2
MEMADDA1
MEMADDA0
MEMRASB_L
MEMCASB_L
MEMWEB_L
MEMBANKB1
MEMBANKB0
MEMADDB13
MEMADDB12
MEMADDB11
MEMADDB10
MEMADDB9
MEMADDB8
MEMADDB7
MEMADDB6
MEMADDB5
MEMADDB4
MEMADDB3
MEMADDB2
MEMADDB1
MEMADDB0
MEMCHECK7
MEMCHECK6
MEMCHECK5
MEMCHECK4
MEMCHECK3
MEMCHECK2
MEMCHECK1
MEMCHECK0
4
D17
A18
B17
C17
AF16
AG16
AH16
AJ17
AG10
AE8
AE7
D10
C10
E12
E11
AF8
AG8
AF10
AE10
V3
V4
K5
K4
R5
P5
P3
P4
D8
C8
E8
E7
D6
E6
C4
E5
H5
D4
G5
K3
H3
E13
C12
E10
AE6
AF3
M5
AE5
AB5
AD3
Y5
AB4
Y3
V5
T5
T3
N5
H4
F5
F4
L5
J5
E14
D12
E9
AF6
AF4
M4
AD5
AC5
AD4
AA5
AB3
Y4
W5
U5
T4
M3
N3
N1
U3
V1
N2
P1
U1
U2
VTT_DDR_SUS
MEMRESET
MEMCLK_H7
MEMCLK_L7
MEMCLK_H6
MEMCLK_L6
MEMCLK_H5
MEMCLK_L5
MEMCLK_H4
MEMCLK_L4
MEMCLK_H1
MEMCLK_L1
MEMCLK_H0
MEMCLK_L0
-MCS3
-MCS2
-MCS1
-MCS0
MAA13
MAA12
MAA11
MAA10
MAA9
MAA8
MAA7
MAA6
MAA5
MAA4
MAA3
MAA2
MAA1
MAA0
MAB13
MAB12
MAB11
MAB10
MAB9
MAB8
MAB7
MAB6
MAB5
MAB4
MAB3
MAB2
MAB1
MAB0
MCKE0
MCKE1
-MSRASA
-MSCASA
NON-POP
R5 X_0
-MCS[3..0]
R1
100RST
R2
100RST
MEMRESET_L 12,13
MCKE0 12,13,14
MCKE1 12,13,14
MEMCLK_H[7..0] 12,13,14
MEMCLK_L[7..0] 12,13,14
-MCS[3..0] 12,13,14
-MSRASA 12,14
-MSCASA 12,14
-MSWEA 12,14
MEMBANKA1 12,14
MEMBANKA0 12,14
MAA[13..0] 12,14
-MSRASB 13,14
-MSCASB 13,14
-MSWEB 13,14
MEMBAKB1 13,14
MEMBAKB0 13,14
MAB[13..0] 13,14
C1
104P
C2
C746
104P
1000P
1.2V_HT
C1372
X_100u/10V
R6 49.9RST
R7 49.9RST
L0_CADIN_H15
L0_CADIN_L15
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_L2
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H0
L0_CADIN_L0
L0_CTLIN_H1
L0_CTLIN_L1
L0_CADIN_H[0..15] 7
L0_CADIN_L[0..15] 7 L0_CADOUT_L[0..15] 7
L0_CLKIN_H1 7
L0_CLKIN_L1 7
L0_CLKIN_H0 7
L0_CLKIN_L0 7
L0_CTLIN_H0 7
L0_CTLIN_L0 7
3
VLDT0
1.2V_HT
D29
D27
D25
C28
C26
B29
B27
T25
R25
U27
U26
V25
U25
W27
W26
AA27
AA26
AB25
AA25
AC27
AC26
AD25
AC25
T27
T28
V29
U29
V27
V28
Y29
W29
AB29
AA29
AB27
AB28
AD29
AC29
AD27
AD28
Y25
W25
Y27
Y28
R27
R26
T29
R29
C811
C810
0.22u
0.22u
VLDT0_A6
VLDT0_A5
VLDT0_A4
VLDT0_A3
VLDT0_A2
VLDT0_A1
VLDT0_A0
L0_CADIN_H15
L0_CADIN_L15
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H0
L0_CADIN_L0
L0_CLKIN_H1
L0_CLKIN_L1
L0_CLKIN_H0
L0_CLKIN_L0
L0_CTLIN_H1
L0_CTLIN_L1
L0_CTLIN_H0
L0_CTLIN_L0
HYPER TRANSPORT - LINK0
2
U1A
C812
0.22u
C814
C813
0.22u
0.22u
VLDT0_B6
VLDT0_B5
VLDT0_B4
VLDT0_B3
VLDT0_B2
VLDT0_B1
VLDT0_B0
L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
C815
0.22u
C816
0.22u
C817
0.22u
C818
0.22u
VLDT0
AH29
AH27
AG28
AG26
AF29
AE28
AF25
L0_CADOUT_H15
N26
L0_CADOUT_L15
N27
L0_CADOUT_H14
L25
L0_CADOUT_L14
M25
L0_CADOUT_H13
L26
L0_CADOUT_L13
L27
L0_CADOUT_H12
J25
L0_CADOUT_L12
K25
L0_CADOUT_H11
G25
L0_CADOUT_L11
H25
L0_CADOUT_H10
G26
L0_CADOUT_L10
G27
L0_CADOUT_H9
E25
L0_CADOUT_L9
F25
L0_CADOUT_H8
E26
L0_CADOUT_L8
E27
L0_CADOUT_H7
N29
L0_CADOUT_L7
P29
L0_CADOUT_H6
M28
L0_CADOUT_L6
M27
L0_CADOUT_H5
L29
L0_CADOUT_L5
M29
L0_CADOUT_H4
K28
L0_CADOUT_L4
K27
L0_CADOUT_H3
H28
L0_CADOUT_L3
H27
L0_CADOUT_H2 L0_CADIN_H2
G29
L0_CADOUT_L2
H29
L0_CADOUT_H1
F28
L0_CADOUT_L1
F27
L0_CADOUT_H0
E29
L0_CADOUT_L0
F29
J26
J27
J29
K29
N25
P25
L0_CTLOUT_H0
P28
L0_CTLOUT_L0
P27
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
C747
4.7u/1206
L0_CADOUT_H[0..15] 7
L0_CLKOUT_H1 7
L0_CLKOUT_L1 7
L0_CLKOUT_H0 7
L0_CLKOUT_L0 7
L0_CTLOUT_H0 7
L0_CTLOUT_L0 7
M icro Star Restricted Secret
K8 DDR & HT
MS-6725D2
Last Revision Date:
Tuesday, December 17, 2002
Sheet
4 35
1
Rev
0A
of
Page 6
5
4
3
2
VCCA_PLL trace length from the VR1 to the
PGA must be 0.75".
1
Place al filters close to the PGA.
Keep all power and signal trce away from
D D
VCCA_PLL
C5
C4
39P
3300p
C6
0.22u
the VR1.
Inside CPU socket
Q1
VCCA_CTRL
C10
39P
1 23 45 6
7 8
NDS351AN-S-SOT23
D
S
G
2
YREG431LS
3 1
VDD_25
RN121
8P4R-1K
VCCA_PL
VR1
C7
1000P
1
3
5
7
9
11
13
15
17
19
21
23
X_ASP-68200-07
FB33
+
VCCA_REF
JHDT
KEY
+12V
VCC3
R9
1K
C C
VDD_PWGD_2 30,34
YFET-NDS7002AS
B B
DBREQ_L
DBRDY
TCK
TMS
TDI
TRST_L
TDO
A A
VCC5_SB
Q91
VDD_25_SUS
VDD_25
1 23 45 6
5
C9
4.7u/0805
R747
1K
PLL_CTRL
Q90
YFET-NDS7002AS
HDT Connectors
7 8
RN120
8P4R-1K
180nH/1210
C748
100u-16V
4
VCCA_PLL
C8
4.7u/0805
VDD_25_SUS
2
4
6
8
10
12
14
16
18
20
22
24
26
NC_AJ18
NC_AG17
NC_AF21
NC_AF22
NC_C19
NC_D20
NC_C18
NC_D18
NC_C21
NC_B19
NC_A19
VLDT0
R11 44.2RST
R12 44.2RST
VCCA_PLL
C11
1000P
RN122
X_8P4R-1K
RN123
8P4R-680
RN124
8P4R-680
LAYOUT: Route VDDA trace approx.
50 mils wide (use 2x25 mil traces to
exit ball field) and 500 mils long.
R1401 330
R1402 330
R1403 330
COREFB 34
COREFB_L 34
VDDIO_SENSE 28
C13 3900P
C14 3900P
VTT_DDR_SUS
R26
X_1K
R557 51
R13 169RST
R14 680
R16 680
R27
X_1K
CPU_POWERGOOD 7
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
RESET_CPU_L 7
HTSTOP_L 7
C12
1000P
VDD_25_SUS
CPUCLK0_H 7
CPUCLK0_L 7
VDD_25
VDD_25
3
VDD_25
VDD_25
L0_REF1
L0_REF0
COREFB
COREFB_L
VDDIO_SENSE
CLKIN_H
CLKIN_L
NC_AJ23
NC_AH23
DBRDY
TMS
TCK
TRST_L
TDI
NC_C18
NC_A19
NC_AE23
NC_AF23
NC_AF22
NC_AF21
AH25
AJ25
AF20
AE18
AJ27
AF27
AE26
AE12
AF12
AE11
AJ21
AH21
AJ23
AH23
AE24
AF24
C16
AG15
AH17
C15
C18
AJ28
AE23
AF23
AF22
AF21
AG2
AH1
AE21
C20
AG4
AG6
AG9
A23
A24
B23
E20
E17
B21
A21
A19
A28
C1
J3
R3
AA2
D3
B18
C6
AE9
VDDA1
VDDA2
RESET_L
PWROK
LDTSTOP_L
L0_REF1
L0_REF0
COREFB_H
COREFB_L
CORE_SENSE
VDDIOFB_H
VDDIOFB_L
VDDIO_SENSE
CLKIN_H
CLKIN_L
NC_AJ23
NC_AH23
NC_AE24
NC_AF24
VTT_A5
VTT_B5
DBRDY
NC_C15
TMS
TCK
TRST_L
TDI
NC_C18
NC_A19
KEY1
KEY0
NC_AE23
NC_AF23
NC_AF22
NC_AF21
FREE29
FREE31
FREE33
FREE35
FREE1
FREE37
FREE4
FREE38
FREE41
FREE7
FREE11
FREE12
FREE13
FREE14
FREE40
U1C
THERMTRIP_L
G_FBCLKOUT_H
G_FBCLKOUT_L
2
THERMDA
THERMDC
VID4
VID3
VID2
VID1
VID0
NC_AG18
NC_AH18
NC_AG17
NC_AJ18
DBREQ_L
NC_D20
NC_C21
NC_D18
NC_C19
NC_B19
TDO
NC_AF18
RSVD_SCL
RSVD_SDA
FREE26
FREE28
FREE30
FREE32
FREE34
FREE36
FREE10
FREE18
FREE19
FREE42
FREE24
FREE25
FREE27
A20
R1429 0
A26
R1430 0
A27
VID4
AG13
VID3
AF14
VID2
AG14
VID1
AF15
VID0
AE15
AG18
AH18
NC_AG17
AG17
NC_AJ18
AJ18
FBCLKOUT_H
AH19
AJ19
FBCLKOUT_L
DBREQ_L
AE19
NC_D20
D20
NC_C21
C21
NC_D18
D18
NC_C19
C19
NC_B19
B19
TDO
A22
AF18
D22
C22
VDD_CORE
B13
B7
C3
K1
R2
AA3
F3
C23
AG7
AE22
C24
A25
C9
M icro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
RT1 X_10K_3%
THERMTRIP_CPU_L 7
THERMDA_CPU 25
THERMDC_CPU 25
VID[4..0] 25,34
LAYOUT: Route FBC LKOUT_H/L
differentially with 20/8/5/8/20
spacing and trace width.
R15
80.6RST
R533 51
R534 51
K8 HDT & MISC
COREFB
COREFB_L
MS-6725D2
Last Revision Date:
Tuesday, December 17, 2002
Sheet
5 35
1
Rev
of
0A
Page 7
5
U1E
B2
VSS1
AH20
VSS3
AB21
VSS4
W22
VSS5
M23
VSS6
L24
VSS7
AG25
VSS8
AG27
VSS9
AA10
AE16
G20
R20
U20
W20
AA20
AC20
AE20
AG20
AJ20
D21
H21
M21
AD21
AG21
G22
N22
R22
U22
AG29
AA22
AC22
AG22
AH22
AJ22
D23
H23
AB23
AD23
AG23
G24
N24
R24
U24
W24
AA24
AC24
AG24
AJ24
C25
D26
H26
M26
AD26
AF26
AH26
C27
D28
G28
H15
AB17
AD17
G18
AA18
AC18
D19
H19
AB19
AD19
AF19
N20
D2
VSS10
AF2
VSS11
W6
VSS12
Y7
VSS13
AA8
VSS14
AB9
VSS15
VSS16
J12
VSS17
B14
VSS18
Y15
VSS19
VSS20
J18
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
F21
VSS32
VSS33
K21
VSS34
VSS35
P21
VSS36
T21
VSS37
V21
VSS38
Y21
VSS39
VSS40
VSS41
B22
VSS42
E22
VSS43
VSS44
J22
VSS45
L22
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
F23
VSS57
VSS58
K23
VSS59
P23
VSS60
T23
VSS61
V23
VSS62
Y23
VSS63
VSS64
VSS65
VSS66
E24
VSS67
VSS68
J24
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
B25
VSS78
VSS79
B26
VSS80
VSS81
VSS82
VSS83
T26
VSS84
Y26
VSS85
VSS86
VSS87
VSS88
VSS89
B28
VSS90
VSS91
VSS92
F15
VSS187
VSS188
VSS206
VSS207
B16
VSS208
VSS209
VSS210
VSS211
VSS212
F19
VSS213
VSS214
K19
VSS215
Y19
VSS216
VSS217
VSS218
VSS219
J20
VSS220
L20
VSS221
VSS222
GROUND
5
D D
C C
B B
A A
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS189
VSS190
VSS191
VSS192
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS223
VSS201
VSS202
VSS203
VSS204
VSS205
L28
R28
W28
AC28
AF28
AH28
C29
F2
H2
K2
M2
P2
T2
V2
Y2
AB2
AD2
AH2
B4
AH4
B6
G6
J6
L6
N6
R6
U6
AA6
AC6
AH6
F7
H7
K7
M7
P7
T7
V7
AB7
AD7
B8
G8
J8
L8
N8
R8
U8
W8
AC8
AH8
F9
H9
K9
M9
P9
T9
V9
Y9
AD9
B10
G10
J10
L10
N10
R10
U10
W10
AC10
AH10
F11
H11
K11
Y11
AB11
AD11
B12
G12
AA12
AC12
AH12
F13
H13
K13
Y13
AB13
AD13
AF17
G14
J14
AA14
AC14
AE14
D16
E15
K15
AB15
AD15
AH14
E16
G16
J16
AA16
AC16
AE29
AJ26
E18
F17
H17
K17
Y17
GND GND
VDD_CORE
AC15
AB14
AA15
AB16
AA17
AC17
AE17
AB18
AD18
AG19
AC19
AA19
AB20
AD20
AA21
AC21
AB22
AD22
AA23
AC23
AB24
AD24
AH24
AE25
H18
H22
H24
G13
G15
H16
G17
G19
H20
M20
G21
N21
R21
U21
W21
M22
G23
N23
R23
U23
W23
D24
M24
U1D
L7
VDD1
VDD2
VDD3
B20
VDD4
E21
VDD5
VDD6
J23
VDD7
VDD8
F26
VDD9
N7
VDD10
L9
VDD11
V10
VDD12
VDD13
K14
VDD14
Y14
VDD15
VDD16
VDD17
J15
VDD18
VDD19
VDD20
K16
VDD21
Y16
VDD22
VDD23
VDD24
J17
VDD25
VDD26
VDD27
VDD28
F18
VDD29
K18
VDD30
Y18
VDD31
VDD32
VDD33
VDD34
E19
VDD35
VDD36
VDD39
VDD38
J19
VDD37
F20
VDD40
VDD41
K20
VDD42
VDD43
P20
VDD44
T20
VDD45
V20
VDD46
Y20
VDD47
VDD48
VDD49
VDD50
J21
VDD51
L21
VDD52
VDD53
VDD54
VDD55
VDD56
VDD57
VDD58
F22
VDD59
K22
VDD60
VDD61
P22
VDD62
T22
VDD63
V22
VDD64
Y22
VDD65
VDD66
VDD67
E23
VDD68
VDD69
L23
VDD70
VDD71
VDD72
VDD73
VDD74
VDD75
VDD76
B24
VDD77
VDD78
F24
VDD79
K24
VDD80
VDD81
P24
VDD82
T24
VDD83
V24
VDD84
Y24
VDD85
VDD86
VDD87
VDD88
VDD89
K26
VDD90
P26
VDD91
V26
VDD92
POWER
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14
VDDIO15
VDDIO16
VDDIO17
VDDIO18
VDDIO19
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27
VDDIO28
VDDIO29
VDDIO30
VDDIO31
VDDIO32
VDDIO33
VDDIO34
VDDIO35
VDDIO36
VDDIO37
VDDIO38
VDDIO39
VDDIO40
VDDIO41
VDDIO42
VDDIO43
VDDIO44
VDDIO45
VDDIO46
VDDIO47
VDDIO48
VDDIO49
VDDIO50
VDDIO6
VDD96
VDD97
VDD98
VDD99
VDD100
VDD101
VDD102
VDD103
VDD104
VDD105
VDD106
VDD107
VDD108
VDD109
VDD110
VDD111
VDD112
VDD113
VDD114
VDD115
VDD116
VDD117
VDD118
VDD119
VDD120
VDD121
VDD122
VDD123
VDD124
VDD125
VDD126
VDD127
VDD128
VDD129
VDD130
VDD131
VDD132
VDD133
VDD93
VDD94
VDD95
4
VDD_25_SUS
E4
G4
J4
L4
N4
U4
W4
AA4
AC4
AE4
D5
AF5
F6
H6
K6
M6
P6
T6
V6
Y6
AB6
AD6
D7
G7
J7
AA7
AC7
AF7
F8
H8
AB8
AD8
D9
G9
AC9
AF9
F10
AD10
D11
AF11
F12
AD12
D13
AF13
F14
AD14
F16
AD16
D15
R4
N28
U28
AA28
AE27
R7
U7
W7
K8
M8
P8
T8
V8
Y8
J9
N9
R9
U9
W9
AA9
H10
K10
M10
P10
T10
Y10
AB10
G11
J11
AA11
AC11
H12
K12
Y12
AB12
J13
AA13
AC13
H14
AB26
E28
J28
4
LAYOUT: Plac e 6 EMI capsalong bottom right side of Clawhammer, 2 in middle
of HT link, and 12 along
X_6.8pF/BOT
VDD_CORE
VDD_CORE
C24
C23
C22
6.8pF
6.8pF
bottom left side of Claw-
VDD_CORE
C44
VDD_25_SUS
C47
C46
X_6.8pF/BOT
X_6.8pF/BOT
VDD_CORE
C68
C67
<nopop>
X_6.8pF
LAYOUT: Place beside processor.
VDD_25_SUS
C39
C38
0.22u
0.22u
C62
C61
4.7u/0805
C63
4.7u/0805
6.8pF
C48
X_6.8pF/BOT
<nopop>
X_6.8pF/BOT
C40
0.22u
4.7u/0805
C25
C64
GND
6.8pF
C49
C41
4.7u/0805
3
C26
6.8pF
C50
X_6.8pF/BOT
X_6.8pF/BOT
C70
<nopop>
X_6.8pF/BOT
C43
0.22u
0.22u
GND
VDD_25_SUS
C96
3
C27
C51
C71
0.22uF
C28
6.8pF
hammer.
C52
X_6.8pF/BOT
C72
<nopop>
X_6.8pF/BOT
C97
0.22uF
GND
EMI
LAYOUT: Place 1 capacitor every 1-1.5"
along VDD_CORE perimiter.
C29
6.8pF
C53
X_6.8pF/BOT
C73
<nopop>
X_6.8pF/BOT
GND
C33
C30
6.8pF
C54
6.8pF
C55
X_6.8pF/BOT
X_6.8pF/BOT
6.8pF
X_6.8pF/BOT
<nopop>
X_6.8pF/BOT
LAYOUT: Place on backside of processor.
LAYOUT: Place beside DDR slots.
VDD_25_SUS
C65
4.7u/0805
C34
C37
6.8pF
6.8pF
GND
VDD_CORE
C56
GND
C74
X_6.8pF/BOT
LAYOUT: Place 1000pF capacitors
between VR M & CPU.
VDD_25_SUS VTT_DDR_SUS
C132
X_0.22uF
<nopop>
C66
4.7u/0805
GND
2
1000P
2
1
NOTE: Populat e 270uF
caps or 100uF caps
C77
C76
C75
1000P
1000P
1000P
GND
in these footprints.
VDD_25_SUS
+
+
EC26
100u-16V
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
EC27
100u-16V
GND
Micro Star Restricted Secret
K8 POWER & GND
VDD_25_SUS
+
EC28
100u-16V
GND
MS-6725D2
Last Revision Date:
Tuesday, December 17, 2002
Sheet
1
6 35
Rev
0A
of
Page 8
5
TP_HT2_DWN0
TP_HT2_DWN1
TP_HT2_DWN2
TP_HT2_DWN3
TP_HT2_DWN*0
TP_HT2_DWN*1
TP_HT2_DWN*2
L0_CLKIN_H0 4
L0_CLKIN_L0 4
L0_CLKIN_H1 4
L0_CLKIN_L1 4
L0_CTLIN_H0 4
L0_CTLIN_L0 4
TP_HT2_DWN*3
TP_HT2_DWNCLK
-TP_HT2_DWNCLK
TP_HT2_DWNCNTL
-TP_HT2_DWNCNTL
L0_CADIN_H[0..15]
L0_CADIN_L[0..15]
L0_CADIN_H0
L0_CADIN_H1
L0_CADIN_H2
L0_CADIN_H3
L0_CADIN_H4
L0_CADIN_H5
L0_CADIN_H6
L0_CADIN_H7
L0_CADIN_H8
L0_CADIN_H9
L0_CADIN_H10
L0_CADIN_H11
L0_CADIN_H12
L0_CADIN_H13
L0_CADIN_H14
L0_CADIN_H15
L0_CADIN_L0
L0_CADIN_L1
L0_CADIN_L2
L0_CADIN_L3
L0_CADIN_L4
L0_CADIN_L5
L0_CADIN_L6
L0_CADIN_L7
L0_CADIN_L8
L0_CADIN_L9
L0_CADIN_L10
L0_CADIN_L11
L0_CADIN_L12
L0_CADIN_L13
L0_CADIN_L14
L0_CADIN_L15
L0_CLKIN_H0
L0_CLKIN_L0
L0_CLKIN_H1
L0_CLKIN_L1
L0_CTLIN_H0
L0_CTLIN_L0
VDD_CORE_EN
HT1VDD_EN
-HT1_VLD
-MEM_VLD
-CPU_VLD
5
D D
L0_CADIN_H[0..15] 4
L0_CADIN_L[0..15] 4
C C
B B
VDD_CORE_EN 34
HT1VDD_EN 28
A A
AN29
AM28
AN27
AN26
AP29
AN28
AP27
AP26
AM25
AN25
AP30
AN30
AP18
AP17
AN16
AP15
AN13
AP12
AP11
AN10
AL18
AJ16
AJ15
AL15
AJ13
AL12
AJ12
AJ10
AN18
AN17
AM16
AN15
AM13
AN12
AN11
AM10
AM18
AK16
AK15
AM15
AK13
AM12
AK12
AJ11
AP14
AN14
AJ14
AK14
AN9
AP9
A2
C2
B1
B4
B2
U84A
HT2_TXD0
HT2_TXD1
HT2_TXD2
HT2_TXD3
HT2_TXD0*
HT2_TXD1*
HT2_TXD2*
HT2_TXD3*
HT2_TXCLK0
HT2_TXCLK0*
HT2_TXCTL
HT2_TXCTL*
HT1_TXD0
HT1_TXD1
HT1_TXD2
HT1_TXD3
HT1_TXD4
HT1_TXD5
HT1_TXD6
HT1_TXD7
HT1_TXD8
HT1_TXD9
HT1_TXD10
HT1_TXD11
HT1_TXD12
HT1_TXD13
HT1_TXD14
HT1_TXD15
HT1_TXD0*
HT1_TXD1*
HT1_TXD2*
HT1_TXD3*
HT1_TXD4*
HT1_TXD5*
HT1_TXD6*
HT1_TXD7*
HT1_TXD8*
HT1_TXD9*
HT1_TXD10*
HT1_TXD11*
HT1_TXD12*
HT1_TXD13*
HT1_TXD14*
HT1_TXD15*
HT1_TXCLK0
HT1_TXCLK0*
HT1_TXCLK1
HT1_TXCLK1*
HT1_TXCTL
HT1_TXCTL*
CPUVDD_EN
HT1VDD_EN
HT1_VLD*
MEM_VLD*
CPU_VLD*
CK8G
1 OF 7
HT2_RXD0
HT2_RXD1
HT2_RXD2
HT2_RXD3
HT2_RXD0*
HT2_RXD1*
HT2_RXD2*
HT2_RXD3*
HT2_RXCLK0
HT2_RXCLK0*
HT2_RXCTL
HT2_RXCTL*
HT2_RSET
HT2_STOP*
HT2_REQ*
HT1_RXD0
HT1_RXD1
HT1_RXD2
HT1_RXD3
HT1_RXD4
HT1_RXD5
HT1_RXD6
HT1_RXD7
HT1_RXD8
HT1_RXD9
HT1_RXD10
HT1_RXD11
HT1_RXD12
HT1_RXD13
HT1_RXD14
HT1_RXD15
HT1_RXD0*
HT1_RXD1*
HT1_RXD2*
HT1_RXD3*
HT1_RXD4*
HT1_RXD5*
HT1_RXD6*
HT1_RXD7*
HT1_RXD8*
HT1_RXD9*
HT1_RXD10*
HT1_RXD11*
HT1_RXD12*
HT1_RXD13*
HT1_RXD14*
HT1_RXD15*
HT1_RXCLK0
HT1_RXCLK0*
HT1_RXCLK1
HT1_RXCLK1*
HT1_RXCTL
HT1_RXCTL*
HT1_STOP*
HT1_RSET
CPU_SLP*/GPIO
THERMTRIP*/GPIO
CPU_RST*
CPU_PWROK
CPU_CLK
CPU_CLK*
CPU_COMP
4
AK28
AK27
AL30
AK26
AJ28
AJ27
AL29
AJ26
AL26
AL27
AK29
AJ29
AM29
AK25
AJ25
L0_CADOUT_H[0..15]
L0_CADOUT_L[0..15]
AL1
AM1
AN1
AN2
AN4
AN5
AN6
AM7
AM4
AL5
AJ5
AL6
AJ7
AJ8
AK10
AM9
AL2
AM2
AP1
AP2
AP4
AP5
AP6
AN7
AM3
AL4
AK5
AK6
AK7
AK8
AK9
AL9
AN3
AP3
AM6
AM5
AN8
AP8
AK17
AL3
C3
AJ19
AL20
AK19
AN19
AM19
AP20
4
TP_HT2_UP0
TP_HT2_UP1
TP_HT2_UP2
TP_HT2_UP3
TP_HT2_UP*0
TP_HT2_UP*1
TP_HT2_UP*2
TP_HT2_UP*3
TP_HT2_UPCLK
-TP_HT2_UPCLK
TP_HT2_UPCNTL
-TP_HT2_UPCNTL
HT2_RSET
-TP_HT2_STOP
-TP_HT2_REQ
L0_CADOUT_H0
L0_CADOUT_H1
L0_CADOUT_H2
L0_CADOUT_H3
L0_CADOUT_H4
L0_CADOUT_H5
L0_CADOUT_H6
L0_CADOUT_H7
L0_CADOUT_H8
L0_CADOUT_H9
L0_CADOUT_H10
L0_CADOUT_H11
L0_CADOUT_H12
L0_CADOUT_H13
L0_CADOUT_H14
L0_CADOUT_H15
L0_CADOUT_L0
L0_CADOUT_L1
L0_CADOUT_L2
L0_CADOUT_L3
L0_CADOUT_L4
L0_CADOUT_L5
L0_CADOUT_L6
L0_CADOUT_L7
L0_CADOUT_L8
L0_CADOUT_L9
L0_CADOUT_L10
L0_CADOUT_L11
L0_CADOUT_L12
L0_CADOUT_L13
L0_CADOUT_L14
L0_CADOUT_L15
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
HTSTOP_L
HT_RSET
-TP_CPU_SLP
THERMTRIP_IO_L
RESET_CPU_L
CPU_POWERGOOD
R1405 0
R1406 0
CPU_COMP
R1268 X_51.1RST
L0_CADOUT_H[0..15] 4
L0_CADOUT_L[0..15] 4
L0_CLKOUT_H0 4
L0_CLKOUT_L0 4
L0_CLKOUT_H1 4
L0_CLKOUT_L1 4
L0_CTLOUT_H0 4
L0_CTLOUT_L0 4
HTSTOP_L 5
RESET_CPU_L 5
CPU_POWERGOOD 5
R1278 549RST
3
R1275 51.1RST
CPUCLK0_H
CPUCLK0_L
CB38
X_104P
+
3
C1251
10u/16V
VDD_CORE_PG 28,34
CPUCLK0_H 5
CPUCLK0_L 5
+12V
FB65
X_80_0805
PFAN1
1
2
D1x2-W
VDD_CORE_PG
CP17
X_COPPER
CLOSE CK8
VDD_25_SUS
1.2V_HT
2
THERMTRIP_CPU_L 5
R1274 6.2K
R1279 6.2K
2
NOTE: Diode is for possible Clawhammer
THERMTRIP_L leakage during S3
VDD_25
R1269
C1246
104P
10K
B
C1248
105p
C1250
105p
10K
10K
1K
R1266
VCC3_SB
C E
VCC3_SB
R1273
B
VCC3_SB
R1277
B
D25
1N4148S
THERMTRIP_IO_L
2N3904S
C E
2N3904S
C E
2N3904S
THERMTRIP_IO_L
A C
C1245
Q132
C1247
Q133
C1249
Q134
M icro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
C1244 X_104P
1 2
U85A
DM7407-SOIC14
104P R1271 10K
3 4
U85B
DM7407-SOIC14
104P
5 6
U85C
DM7407-SOIC14
104P
CK8 HT
VCC3
4.7K
4.7K
4.7K
MS-6725D2
1
1K
R1267
VCC3_SB
R1270
-MEM_VLD
VCC3_SB
R1272
-CPU_VLD
VCC3_SB
R1276
-HT1_VLD
Last Revision Date:
Tuesday, December 17, 2002
Sheet
7 35
1
Rev
0A
of
Page 9
5
4
3
2
1
A_SBA[7..0] 16
A_AD[31..0] 16
M33
N33
U32
U33
R33
R34
AD32
AC33
AB30
AC30
AG33
AG29
AC29
M32
N32
M34
AH29
AG31
AK34
R29
AJ33
AJ32
AH33
U30
U29
R32
R30
P32
P33
T33
T32
V33
L33
L34
T30
P34
U84B
AGP_SBA0*
AGP_SBA1*
AGP_SBA2*
AGP_SBA3*
AGP_SBA4*
AGP_SBA5*
AGP_SBA6*
AGP_SBA7*
AGP_SBSTBF
AGP_SBSTBS
AGP_ADSTBF0
AGP_ADSTBS0
AGP_ADSTBF1
AGP_ADSTBS1
AGP_CBE0
AGP_CBE1
AGP_CBE2
AGP_CBE3
AGP_ST0
AGP_ST1
AGP_ST2
AGP_RBF
AGP_WBF
AGP_FRAME
AGP_IRDY
AGP_TRDY
AGP_REQ
AGP_GNT
AGP_STOP
AGP_DEVSEL
AGP_PAR
AGP_DBI1
AGP_DBI0
AGP_CAL_VDDQ
AGP_CAL_GND
AGP_8XDE*
CK8G
D D
A_SBA0
A_SBA1
A_SBA2
A_SBA3
A_SBA4
A_SBA5
A_SBA6
A_SBA7
A_SBSTB_P 16
A_SBSTB_N 16
A_ADSTB0_P 16
A_ADSTB0_N 16
A_ADSTB1_P 16
A_ADSTB1_N 16
A_CBE0_L 16
A_CBE1_L 16
A_CBE2_L 16
A_CBE3_L 16
C C
A_RBF_L 16
A_WBF_L 16 LAN_PCLK 22
A_FRAME_L 16
A_IRDY_L 16
A_TRDY_L 16
A_REQ_L 16
A_GNT_L 16
A_STOP_L 16
A_DEVSEL_L 16
A_PAR 16
VDD_15
R1288 51.1RST
R1289 51.1RST
A_GC8XDET_L 16
B B
A_SBSTB_P
A_SBSTB_N
A_ADSTB0_P
A_ADSTB0_N
A_ADSTB1_P
A_ADSTB1_N
A_CBE0_L
A_CBE1_L
A_CBE2_L
A_CBE3_L
A_ST0 16
A_ST1
A_ST1 16
A_ST2
A_ST2 16
A_RBF_L
A_WBF_L
A_FRAME_L
A_IRDY_L
A_TRDY_L
A_REQ_L
A_GNT_L
A_STOP_L
A_DEVSEL_L
A_PAR
A_DBIH
A_DBIH 16
A_DBIL
A_DBIL 16
CAL_PD
CAL_PU
VCC3
R685 10K
PCICLK_0
PCICLK_1
PCICLK_2
PCICLK_3
PCICLK_4
PCICLK_5
PCICLK_6
PCICLK_7
A_SBA[7..0]
A_AD[31..0]
CM3 X_10p
CM4 X_10p
CM5 X_10p
CM6 X_10p
CM7 X_10p
CM8 X_10p
CM9 X_10p
CM10 X_10p
2 OF 7
AGP_AD0
AGP_AD1
AGP_AD2
AGP_AD3
AGP_AD4
AGP_AD5
AGP_AD6
AGP_AD7
AGP_AD8
AGP_AD9
AGP_AD10
AGP_AD11
AGP_AD12
AGP_AD13
AGP_AD14
AGP_AD15
AGP_AD16
AGP_AD17
AGP_AD18
AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23
AGP_AD24
AGP_AD25
AGP_AD26
AGP_AD27
AGP_AD28
AGP_AD29
AGP_AD30
AGP_AD31
AGP_PME*
AGP_CLK
APG_VREF
AA33
AA32
AB32
Y33
AB33
Y32
AC32
W33
V32
AE32
AD33
AF33
AE33
AG32
AF32
AH32
AJ30
AF31
AF29
AE30
AF30
AD30
AD29
AC31
AA29
AA30
Y29
Y31
Y30
W30
V30
U31
E26
W32
V29
A_AD0
A_AD1
A_AD2
A_AD3
A_AD4
A_AD5
A_AD6
A_AD7
A_AD8
A_AD9
A_AD10
A_AD11
A_AD12
A_AD13
A_AD14
A_AD15
A_AD16
A_AD17
A_AD18
A_AD19
A_AD20
A_AD21
A_AD22
A_AD23
A_AD24
A_AD25
A_AD26
A_AD27
A_AD28
A_AD29
A_AD30
A_AD31
-AGP_PME
CM1
X_10p
A_REFGC
CM2
104P
RM8
22
-AGP_PME 16
AGPCLK
A_REFGC 16
AGPCLK 16
A_RESET_L 16
-PCIRST1 22
-PCIRST2 18,19
RESET_IDEP_L 24,32
-PCIRST_LPC 25,26
-FRAME 18,19,22,33
-IRDY 18,19,22,33
-TRDY 18,19,22,33
-STOP 18,19,22,33
-DEVSEL 18,19,22,33
PAR 18,19,22,33
-SERR 18,19,22,33
-PERR 18,19,22,33
-PCI_PME 18,19,22,33
A_RESET_L
-PCIRST1
-PCIRST2
RESET_IDEP_L
-PCIRST_LPC
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C_-BE0
C_-BE1
C_-BE2
C_-BE3
-FRAME
-IRDY
-TRDY
-STOP
-DEVSEL
PAR
-SERR
-PERR
-PCI_PME
R1290 33
R1295 33
R1292 33
R1293 33
R1291 33
C33
D30
C31
D34
D33
C34
D32
G32
G33
H32
H34
H33
H30
G29
G30
C32
C25
E33
F28
B33
E32
B31
A32
E31
B34
E34
F33
J30
J34
K33
J29
J33
K30
K29
K32
L32
B32
F34
J32
J31
F29
F31
F30
F32
A33
F26
P29
L30
K5
H6
U84C
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_CBE0*
PCI_CBE1*
PCI_CBE2*
PCI_CBE3*
PCI_FRAME*
PCI_IRDY*
PCI_TRDY*
PCI_STOP*
PCI_DEVSEL*
PCI_PAR
PCI_SERR
PCI_PERR*
PCI_PME*
PCI_RST0*
PCI_RST1*
PCI_RST2*
PCI_RST3*
PCI_RST4*
3 OF 7
AD[31..0]
C_-BE[3..0]
PCI_CLK8/GPIO_8
PCI_CLK9/GPIO_9
PCI_CLK10/GPIO_17
PCI_REQ0*
PCI_REQ1*
PCI_REQ2*
PCI_REQ3*
PCI_REQ4*
PCI_REQ5*
PCI_GNT0*
PCI_GNT1*
PCI_GNT2*
PCI_GNT3*
PCI_GNT4*
PCI_GNT5*
PCI_INTW*
PCI_INTX*
PCI_INTY*
PCI_INTZ*
PCI_INTE*
PCI_CLK0
PCI_CLK1
PCI_CLK2
PCI_CLK3
PCI_CLK4
PCI_CLK5
PCI_CLK6
PCI_CLKFB
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME*
LPC_DRQ0*
LPC_DRQ1*
SERIRQ
PCI_CLK7
-PREQ0
C29
E29
D27
D26
A30
A31
E27
D29
E28
C26
B29
B30
M30
N29
M29
N30
P30
A29
C28
B28
B27
A27
B26
A26
B25
B15
B14
D2
H1
H2
H3
G2
F2
J3
F1
G3
E2
-PREQ0 18,33
-PREQ1
-PREQ1 18,33
-PREQ2
-PREQ2 19,33
-PREQ3
-PREQ3 19,33
-PREQ4
-PREQ4 22,33
-PREQ5
-PREQ5 33
-PGNT0
-PGNT0 18
-PGNT1
-PGNT1 18
-PGNT2
-PGNT2 19
-PGNT3
-PGNT3 19
-PGNT4
-PGNT4 22
-PIRQA
-PIRQA 18,19,33
-PIRQB
-PIRQB 16,18,19,33
-PIRQC
-PIRQC 18,19,22,33
-PIRQD
-PIRQD 18,19,33
-PIRQE
-PIRQE 16,33
PCICLK_0 A_ST0
RM1
PCICLK_1
RM2
PCICLK_2
RM3
PCICLK_3
RM4
PCICLK_4
RM5
PCICLK_6
RM7
PCI_CLKFB
PCICLK_5 LPC_PCLK
RM6
LPC_AD0
LPC_AD0 25,26
LPC_AD1
LPC_AD1 25,26
LPC_AD2
LPC_AD2 25,26
LPC_AD3
LPC_AD3 25,26
-LPC_FRAME
-LPC_REQ
LDRQ1_L
SERIRQ
PCICLK_7
RM9
22
22
22
22
22
22
22
22
PCICLK1
PCICLK2
PCICLK3
PCICLK4
LAN_PCLK
FWH_PCLK
PCICLK1 18
PCICLK2 18
PCICLK3 19
PCICLK4 19
SIO_PCLK 25
-LPC_FRAME 25,26
-LPC_REQ 33
LDRQ1_L 25,26
SERIRQ 25,33
FWH_PCLK 26
AD[31..0] 18,19,22
C_-BE[3..0] 18,19,22
CK8G
VCC3
A A
5
4
3
R1297 X_8.2K
LDRQ1_L
for SST FLASH
M icro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
2
http://www.msi.com.tw
CK8 AGP 8X /PCI
MS-6725D2
Last Revision Date:
Tuesday, December 17, 2002
Sheet
1
8 35
Rev
0A
of
Page 10
5
4
3
2
1
BUFFERED SIO
VCC3
R1298 X_10K
1 = 24 Mhz
CB46
104P
R1304
X_1.2K
R1306
X_1.2K
R1436
X_1.2K
R1438
X_1.2K
FB69
30_0805
0 = 14.318 Mhz
D D
CK8_VSYNC_A 17
CK8_HSYNC_A 17
C C
B B
A A
CK8_VSYNC_A
CK8_HSYNC_A
CK8_VSYNC_B
CK8_HSYNC_B
5
R1303
X_1.2K
R1305
X_1.2K
R1435
X_1.2K
R1437
X_1.2K
VCC3
VCC3
VCC3_SB
1 2
1 2
+
VCC3
VCC3
1 2
VCC3
CT37
10u/16V
R1299 10K
CB42
104P
VDO_DDCSDA_A 17
VDO_DDCSCL_A 17
CK8_GREEN_A 17
FB66
30_0805
FB67
30_0805
FB68
30_0805
1 2
CK8_RED_A 17
CK8_BLUE_A 17
CB47
104P
-AC_RST 20
CODEC_14 20
AC_SDOUT 20
AC_SDIN0 20
AC_SYNC 20
AC_BITCLK 20
1 2
1 2
1 2
4
VCC3_SB
R1300 X_10K
-AC_RST
AC97CLK
AC_SDOUT
AC_SDIN0
AC_SYNC
AC_BITCLK
VDO_DDCSDA_A
VDO_DDCSCL_A
CK8_RED_A
CK8_BLUE_A
CK8_GREEN_A
CB40
104P
+
CT36
10u/16V
CB44
104P
C1271
103P
C1272
18p
32K-12.5pf-CSA-309-D
SPDIF_CK8
Crystal Select
1 = 27 Mhz ( CK8G )
0 = 14.318 Mhz
R1301 10K
RM10 27
R1307
X_124RST
C1264
CB41
104P
1 2
CB43
C1269
104P
1 2
R1407
X_124RST
CB45
C1270
104P
1 2
DUAL_VDD_PLL
1 2
3
4
Y5
AC97CLK_R
CB39
X_103P
DACA_VDD
103P
+3.3V_PLL
103P
C1369
X_103P
DACB_VDD
103P
RTC_XTALIN
RTC_XTALOUT
C1273
18p
C15
C16
AJ20
AK20
AM23
AL21
AJ21
AK22
AJ22
AM22
AM21
AN23
AP23
AK24
AJ24
AJ23
AK23
AM24
AN24
AP24
AP21
AN21
AL23
AN22
B16
E16
F17
F16
E15
E17
E1
C1
A11
B11
U84D
SPDIF
AC_RESET*
AC97_CLK
AC_SDATA_OUT
AC_SDATA_IN0
AC_SDATA_IN1
AC_SYNC
AC_BITCLK
DACA_VSYNC
DACA_HSYNC
DDC_DATA0
DDC_CLK0
DACA_RED
DACA_BLUE
DACA_GREEN
DACA_RSET
DACA_VREF
DACA_GND
DACA_VDD
+3.3V_PLL
DACB_VSYNC
DACB_HSYNC
DDC_DATA1
DDC_CLK1
DACB_RED
DACB_BLUE
DACB_GREEN
DACB_RSET
DACB_VREF
DACB_GND
DACB_VDD
+3.3V_PLL_DUAL
XTALIN_RTC
XTALOUT_RTC
CK8G
4 OF 7
A20
B20
E21
F21
A21
B21
B22
C22
A23
B23
B24
C24
D20
C20
E22
F22
D21
C21
E23
F23
E24
F24
E25
F25
D18
E18
B18
C17
A18
D17
B19
C19
D24
E19
A17
R1332
909RST
R1308 27
R1309 27
R1310 27
R1311 27
R1312 27
R1313 27
R1314 27
R1315 27
R1316 27
R1317 27
R1318 27
R1319 27
XTAL_IN
XTAL_OUT
VCC3_SB
CB48
104P
1 2
C1274
22P
USB_0
USB_0*
USB_1
USB_1*
USB_2
USB_2*
USB_3
USB_3*
USB_4
USB_4*
USB_5
USB_5*
USB2_0
USB2_0*
USB2_1
USB2_1*
USB2_2
USB2_2*
USB2_3
USB2_3*
USB2_4
USB2_4*
USB2_5
USB2_5*
USB_OC0*
USB_OC1*
USB_OC2*
USB_OC3*
USB_OC4*
USB_OC5*
XTALIN
XTALOUT
+3.3V_USB_DUAL
+3.3V_USB_DUAL
USB_RBIAS
3
C1262 X_5.6p_0402
C1263 X_5.6p_0402
C1265 X_5.6p_0402
C1266 X_5.6p_0402
C1267 X_5.6p_0402
C1268 X_5.6p_0402
-OC1
-OC3
-OC5
Y6
1 2
14M-32pf-HC49S-D
2
-OC1 30
-OC3 30
-OC5 31
1 2
C1275
22P
R1324 15K
R1325 15K
R1326 15K
R1327 15K
R1328 15K
R1329 15K
R1330 15K
R1331 15K
M icro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
DATA0+_FRONT 23
DATA0-_FRONT 23
DATA1+_REAR 23
DATA1-_REAR 23
DATA2+_FRONT 23
DATA2-_FRONT 23
DATA3+_REAR 23
DATA3-_REAR 23
DATA4+_REAR 23
DATA4-_REAR 23
DATA5+_REAR 23
DATA5-_REAR 23
R1320 15K
R1321 15K
R1322 15K
R1323 15K
CK8 AC97_USB_VGA
MS-6725D2
Last Revision Date:
Sheet
1
Tuesday, December 17, 2002
9 35
of
Rev
0A
Page 11
5
4
3
2
1
5 OF 7
DDATA_P[15..0]
DDATA_S[15..0]
DDATA_M[15..0]
IDE_DATA_P0
IDE_DATA_P1
IDE_DATA_P2
IDE_DATA_P3
IDE_DATA_P4
IDE_DATA_P5
IDE_DATA_P6
IDE_DATA_P7
IDE_DATA_P8
IDE_DATA_P9
IDE_DATA_P10
IDE_DATA_P11
IDE_DATA_P12
IDE_DATA_P13
IDE_DATA_P14
IDE_DATA_P15
IDE_ADDR_P0
IDE_ADDR_P1
IDE_ADDR_P2
IDE_CS1_P*
IDE_CS3_P*
IDE_DACK_P*
IDE_IOW_P*
IDE_INTR_P
IDE_DREQ_P
IDE_IOR_P*
IDE_RDY_P
IDE_DATA_S0
IDE_DATA_S1
IDE_DATA_S2
IDE_DATA_S3
IDE_DATA_S4
IDE_DATA_S5
IDE_DATA_S6
IDE_DATA_S7
IDE_DATA_S8
IDE_DATA_S9
IDE_DATA_S10
IDE_DATA_S11
IDE_DATA_S12
IDE_DATA_S13
IDE_DATA_S14
IDE_DATA_S15
IDE_ADDR_S0
IDE_ADDR_S1
IDE_ADDR_S2
IDE_CS1_S*
IDE_CS3_S*
IDE_DACK_S*
IDE_IOW_S*
IDE_INTR_S
IDE_DREQ_S
IDE_IOR_S*
IDE_RDY_S
A20GATE/GPIO
INTRUDER*
EXT_SMI*
RI*/GPIO
SIO_PME*/GPIO
KBRDRSTIN*/GPIO
SMB_CLK0
SMB_DATA0
SMB_CLK1
SMB_DATA1
+1.2V_VBAT
SMB_ALERT*
BUF_SIO_CLK
BUF_14MHZ/GPIO
PWRGD_SB
FANRPM/GPIO
FANCTL0/GPIO
FANCTL1/GPIO
SPKR
PWRBTN*
SUSCLK
THERM*
RSTBTN*
SLP_S5*
SLP_S3*
SLP_S1*
PWRGD
TEST
V1
V5
U6
U1
U3
T3
T5
R6
R5
T6
T2
U2
V3
U5
V6
V2
Y1
Y5
AA3
AA1
AA2
W6
W2
W5
W3
Y3
Y2
AD1
AC1
AC3
AD5
AC6
AB5
AA6
AB3
AB2
AA5
AB6
AC5
AD6
AC2
AD3
AD2
AF3
AE3
AF2
AF1
AG3
AG5
AE5
AG6
AE6
AF5
AF6
F9
D11
A5
B5
E10
C6
D1
C11
A3
H5
G5
B10
B9
F11
C10
A4
B6
F7
A8
D9
C7
C8
D6
B3
E6
D5
C5
B8
DDATA_P0
DDATA_P1
DDATA_P2
DDATA_P3
DDATA_P4
DDATA_P5
DDATA_P7
DDATA_P8
DDATA_P9
DDATA_P10
DDATA_P11
DDATA_P12
DDATA_P13
DDATA_P14
DDATA_P15
DADDR_P0
DADDR_P1
DADDR_P2
DCS1P_L
DCS3P_L
DDACKP_L
DIOWP_L
IRQ14
DDRQP
DIORP_L
DRDYP
DDATA_S0
DDATA_S1
DDATA_S2
DDATA_S3
DDATA_S4
DDATA_S5
DDATA_S6
DDATA_S7
DDATA_S8
DDATA_S9
DDATA_S10
DDATA_S11
DDATA_S12
DDATA_S13
DDATA_S14
DDATA_S15
DADDR_S0
DADDR_S1
DADDR_S2
DCS1S_L
DCS3S_L
DDACKS_L
DIOWS_L
IRQ15
DDRQS
DIORS_L
DRDYS
KA20G
-INTRUDER
-EXTSMI
RI_L
SPKR
PWRBTOUT
-SIO_PME
KBRC_L
SMBCLK1
SMBDATA1
SMBCLK2
SMBDATA2
-SBM_ALLERT
SIO_24MR
THERM_L
-FP_RST
-SLP_S5
-SLP_S3
TP-SLP_S1
PWRGD_SB
CK8_PWRGD
CPU_FAN
FANCON0_IOH
FANCON1_IOH
R1361
1K
3
DADDR_P0 24
DADDR_P1 24
DADDR_P2 24
DCS1P_L 24
DCS3P_L 24
DDACKP_L 24
DIOWP_L 24
IRQ14 24,33
DDRQP 24
DIORP_L 24
DRDYP 24
DADDR_S0 24
DADDR_S1 24
DADDR_S2 24
DCS1S_L 24
DCS3S_L 24
DDACKS_L 24
DIOWS_L 24
IRQ15 24,33
DDRQS 24
DIORS_L 24
DRDYS 24
KA20G 25
R1346 X_0
RI_L 27
SPKR 31
PWRBTOUT 25
C32KHZ 25
-SIO_PME 25
KBRC_L 25
SMBCLK1 12,13,33
SMBDATA1 12,13,33
SMBCLK2 18,19,22,25,33
SMBDATA2 18,19,22,25,33
RM14
SIO_14M
22
THERM_L 25
-FP_RST 31
-SLP_S5 28,31
-SLP_S3 25,31
PWRGD_SB 35
CPU_FAN 25,31
FANCON0_IOH 31
FANCON1_IOH 31
ATX_PWR_OK 25,29,30,31
PWRGD_PS
1.2V
1.2V_DUAL
R1344 6.8K
INTRUDER_L
VBAT
SIO_14M 25
R1337 1K
R1338 1K
VCC5_SB
R1343
8.2K
B
C1280
0.47u
INTRUDER_L 25,31
2
VCC3_SB
R1334
R1335
10K
YFET-NDS7002AS
C1277
X_0.33u
B
C1278
104P
VCC3_SB
C E
Q139
2N3904S
0 = User Mode Boot Init table
1 = Safe Mode Boot Init table
THERM_L
-INTRUDER
-EXTSMI
-SIO_PME
-SBM_ALLERT
BUF_25MR
SIO_24MR
SATACLK
10K
Q135
YFET-NDS7002AS
Q136
C E
Q137
2N3904S
R1341
15K
11 10
C1279
0.1u
Q138
YFET-NDS7002AS
R1348 X_4.7K
JBOOT
1
2
3
D1x3-BK
R1353 1M
R1356 4.7K
R1357 10K
R1358 1.2K
CM11 X_10p
CM12 X_10p
CM50 X_10p
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
DM7407-SOIC14
VCC3
VBAT
VCC3_SB
M icro Star Restricted Secret
C1276
4.7K
U85E
9 8
U85D
DM7407-SOIC14
X_0.1u
VCC3_SB
R1342
PWRGD_SB
R1349
4.7K
CK8_IDE_MII_MISC
MS-6725D2
Last Revision Date:
Sheet
1
VCC3_SB
R1333
4.7K
CK8_PWRGD
CK8_PWRGD 31
SPKR
Tuesday, December 17, 2002
10 35
of
Rev
0A
DDATA_P[15..0] 24
DDATA_S[15..0] 24
DDATA_M[15..0] 32
R1411
60.4RST
R1360
60.4RST
AP31
AP32
AL32
AL31
AM31
AP33
AN32
AN34
AM33
AM34
AL33
AP34
AM32
AN33
AK31
AK33
AN31
AL34
AK32
C13
D14
AG1
4
B12
A12
B13
AE2
E14
F12
B17
E11
E13
F13
U84E
M2
M3
M5
L6
L2
K2
J2
K6
J1
K3
L3
L1
L5
M6
M1
N6
P1
P2
R3
R1
R2
N2
P5
P3
N5
P6
N3
J5
Y6
E9
E8
B7
F8
D3
C4
E3
E4
CK8G
IDE_DATA_M0
IDE_DATA_M1
IDE_DATA_M2
IDE_DATA_M3
IDE_DATA_M4
IDE_DATA_M5
IDE_DATA_M6
IDE_DATA_M7
IDE_DATA_M8
IDE_DATA_M9
IDE_DATA_M10
IDE_DATA_M11
IDE_DATA_M12
IDE_DATA_M13
IDE_DATA_M14
IDE_DATA_M15
IDE_ADDR_M0
IDE_ADDR_M1
IDE_ADDR_M2
IDE_CS1_M*
IDE_CS3_M*
IDE_DACK_M*
IDE_IOW_M*
IDE_INTR_M
IDE_DREQ_M
IDE_IOR_M*
IDE_RDY_M
SATA_CLK
BUF_25MHZ
MII_TXD0
MII_TXD1
MII_TXD2
MII_TXD3
MII_TXCLK
MII_TXEN
MII_RXD0
MII_RXD1
MII_RXD2
MII_RXD3
MII_RXCLK
MII_RXDV
MII_RXER
MII_COL
MII_MDIO
MII_CRS
MII_MDC
MII_PWRDWN
EE_SEL
EE_CLK
EE_DATAO
EE_DATAI
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPIO_7
GPIO_10
GPIO_11
GPIO_12
GPIO_13
GPIO_14
GPIO_15
GPIO_16
GPIO_18
GPIO_19
GPIO_20
IDE_COMP
DDATA_M0
D D
DADDR_M0 32
DADDR_M1 32
DADDR_M2 32
DDACKM_L 32
U86
DI
SK
VCC
CS
GND
NC NC
X_AT93C86
SATA_CLK 32
BUF_25M
DO
RM12 22
MIITXD0 35
MIITXD1 35
MIITXD2 35
MIITXD3 35
MIITXCLK 35
MIITXEN 35
MIIRXD0 35
MIIRXD1 35
MIIRXD2 35
MIIRXD3 35
MIIRXCLK 35
MIIRXDV 35
MIIRXER 35
MIIMDIO 35
MIIMDC 35
DCABLEIDP_L 24
DCABLEIDS_L 24
MII_EEDI
4
8
5
MIICOL 35
MIICRS 35
C C
BUF_25M 35
MIIRXD2
MIIRXD0
MIIRXD3
MIIRXD1
MIIRXCLK
MIITXCLK
MIIMDIO
B B
VCC3_SB
RN133 8P4R_10K
1
2
3
4
5
6
7
8
R1412 10K
R1413 10K
R1414 10K
EEPROM
MII_EEDO
R1355
MII_EECK
X_0
-MII_EECS
A A
5
3
2
1
6 7
DDATA_M1
DDATA_M2
DDATA_M3
DDATA_M4
DDATA_M5
DDATA_M6 DDATA_P6
DDATA_M7
DDATA_M8
DDATA_M9
DDATA_M10
DDATA_M11
DDATA_M12
DDATA_M13
DDATA_M14
DDATA_M15
DADDR_M0
DADDR_M1
DADDR_M2
DDRQM 32
DRDYM 32
RM11 22
BUF_25MR
MIITXD0
MIITXD1
MIITXD2
MIITXD3
MIITXCLK
MIITXEN
MIIRXD0
MIIRXD1
MIIRXD2
MIIRXD3
MIIRXCLK
MIIRXDV
MIIRXER
MIICOL
MIIMDIO
MIICRS
MIIMDC
TP_MII_PWRDWN
DCABLEIDP_L
DCABLEIDS_L
DCS1M_L
DCS3M_L
DDACKM_L
DIOWM_L
INTR_M
DDRQM
DIORM_L
DRDYM
SATACLK
-MII_EECS
MII_EECK
MII_EEDO
MII_EEDI
VCC3
DCS1M_L 32
DCS3M_L 32
DIOWM_L 32
INTR_M 32
DIORM_L 32
VCC3_SB
C1282
X_104P
Page 12
5
4
3
2
1
D D
VCC3
VCC
U84G
E30
+5V
AA4
+5V
A14
+3.3V
D12
+3.3V
E20
+3.3V
D15
+3.3V
C30
+3.3V
H29
+3.3V
H4
+3.3V
L4
+3.3V
V4
C C
VCC3_SB
VCC5_DUAL
1.2V_DUAL
B B
AD4
M31
AD31
C23
AK30
AF4
V31
F27
F15
F19
R4
E5
D8
G6
F4
F5
F6
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V_DUAL
+3.3V_DUAL
+3.3V_DUAL
+3.3V_DUAL
+3.3V_DUAL
+5V_DUAL
+5V_DUAL
+1.2V_DUAL
+1.2V_DUAL
+1.2V_DUAL
CK8G
7 OF 7
+1.5V
+1.5V
+1.5V
+1.5V
+1.5V
+1.5V
+1.5V
+1.5V
+1.2V
+1.2V
+1.2V
+1.2V
+1.2V
+1.2V
+1.2V
+1.2V
+1.2V
+1.2V
+1.2V
+1.2V
+1.2V
+1.2V_HT
+1.2V_HT
+1.2V_HT
+1.2V_HT
+1.2V_HT
+1.2V_HT
R31
U34
Y34
AA31
AC34
AF34
AG30
AJ34
AG2
AH2
AH3
AH5
AH6
AJ1
AJ2
AJ3
AJ4
AK1
AK2
AK3
AK4
AL8
AL11
AL14
AL17
AK18
AM27
VDD_15
1.2V
1.2V_HT
N18
N17
N16
N15
N14
N13
R18
R17
R16
R15
R14
R13
U18
U17
U16
U15
U14
U13
U22
U21
U20
U19
R22
R21
R20
R19
N22
N21
N20
N19
W22
W21
W20
W19
W18
W17
W16
W15
W14
W13
U84F
GND
GND
GND
6 OF 7
GND
GND
GND
P18
GND
P17
GND
P16
GND
P15
GND
P14
GND
P13
GND
GND
GND
GND
GND
GND
GND
T18
GND
T17
GND
T16
GND
T15
GND
T14
GND
T13
GND
GND
GND
GND
GND
GND
GND
V18
GND
V17
GND
V16
GND
V15
GND
V14
GND
V13
GND
V22
GND
V21
GND
V20
GND
V19
GND
GND
GND
GND
GND
T22
GND
T21
GND
T20
GND
T19
GND
GND
GND
GND
GND
P22
GND
P21
GND
P20
GND
P19
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
Y22
GND
Y21
GND
Y20
GND
Y19
GND
Y18
GND
Y17
GND
Y16
GND
Y15
GND
Y14
GND
Y13
GND
CK8G
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
AA22
AA21
AA20
AA19
AA18
AA17
AA16
AA15
AA14
AA13
AB22
AB21
AB20
AB19
AB18
AB17
AB16
AB15
AB14
AB13
A34
A24
A15
A9
A6
A1
C18
C27
D23
C9
D31
C12
D4
E12
E7
F18
F20
F14
F10
F3
H31
J4
J6
L31
M4
P31
P4
T29
U4
V34
W29
Y4
AA34
AE29
AC4
AD34
AJ31
AG34
AG4
AH30
AL24
AK21
AJ18
AJ17
AK11
AJ9
AJ6
AM30
AM26
AN20
AM20
AM17
AM14
AM11
AM8
C14
AB29
L29
1.2V
C1286
104P_X7R
VCC3
C1297
104P_X7R
VCC3_SB
C1308
X_104P_X7R/BOT
CK8 DECOUPLING
C1287
104P_X7R
C1298
104P_X7R
C1309
104P_X7R
C1288
104P_X7R
C1299
104P_X7R
C1310
104P_X7R
C1289
104P_X7R
C1300
X_104P_X7R/BOT
C1311
104P_X7R
C1290
105p
C1301
104P_X7R
C1312
104P_X7R
VCC
C1291
105p
C1302
X_104P_X7R/BOT
VDD_15
C1313
X_104P_X7R/BOT
C1292
104P_X7R
C1303
104P_X7R
VCC5_DUAL
C1293
104P_X7R
C1304
104P_X7R
C1314
X_104P_X7R/BOT
C1294
104P_X7R
1.2V_HT
C1315
104P_X7R
1.2V_DUAL
C1295
104P_X7R
C1305
104P_X7R
C1316
104P_X7R
C1306
104P_X7R
C1296
104P_X7R
C1307
104P_X7R
C1317
104P_X7R
A A
M icro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
CK8 POWER_GND
MS-6725D2
Last Revision Date:
Tuesday, December 17, 2002
Sheet
1
11 35
Rev
0A
of
Page 13
5
4
3
2
1
SYSTEM MEMORY
VDD_25_SUS
D D
738467085
108
120
148
168223054627796
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
DR_MD[63..0] 13,14,15
C C
B B
VDD_25_SUS
-MSWEA 4,14
VDD_25_SUS
A A
R77 1KST
DR_MD[63..0]
R76 4.7K
C163
R78
1000P
1KST
Place 104p Cap. near the DIMM
DDR_VREF
DR_MD0
DR_MD1
DR_MD2
DR_MD3
DR_MD4
DR_MD5
DR_MD6
DR_MD7
DR_MD8
DR_MD9
DR_MD10
DR_MD11
DR_MD12
DR_MD13
DR_MD14
DR_MD15
DR_MD16
DR_MD17
DR_MD18
DR_MD19
DR_MD20
DR_MD21
DR_MD22
DR_MD23
DR_MD24
DR_MD25
DR_MD26
DR_MD27
DR_MD28
DR_MD29
DR_MD30
DR_MD31
DR_MD32
DR_MD33
DR_MD34
DR_MD35
DR_MD36
DR_MD37
DR_MD38
DR_MD39
DR_MD40
DR_MD41
DR_MD42
DR_MD43
DR_MD44
DR_MD45
DR_MD46
DR_MD47
DR_MD48
DR_MD49
DR_MD50
DR_MD51
DR_MD52
DR_MD53
DR_MD54
DR_MD55
DR_MD56
DR_MD57
DR_MD58
DR_MD59
DR_MD60
DR_MD61
DR_MD62
DR_MD63
WP1
-MSWEA
C164
104P
2
DQ0
4
DQ1
6
DQ2
8
DQ3
94
DQ4
95
DQ5
98
DQ6
99
DQ7
12
DQ8
13
DQ9
19
DQ10
20
DQ11
105
DQ12
106
DQ13
109
DQ14
110
DQ15
23
DQ16
24
DQ17
28
DQ18
31
DQ19
114
DQ20
117
DQ21
121
DQ22
123
DQ23
33
DQ24
35
DQ25
39
DQ26
40
DQ27
126
DQ28
127
DQ29
131
DQ30
133
DQ31
53
DQ32
55
DQ33
57
DQ34
60
DQ35
146
DQ36
147
DQ37
150
DQ38
151
DQ39
61
DQ40
64
DQ41
68
DQ42
69
DQ43
153
DQ44
155
DQ45
161
DQ46
162
DQ47
72
DQ48
73
DQ49
79
DQ50
80
DQ51
165
DQ52
166
DQ53
170
DQ54
171
DQ55
83
DQ56
84
DQ57
87
DQ58
88
DQ59
174
DQ60
175
DQ61
178
DQ62
179
DQ63
90
WP(NC)
63
WE#
1
VREF
9
NC2
101
NC3
SLAVE ADDRESS = 1010000B
102
NC4
VSS0
VSS1
VSS2
VSS3
VSS4
3111826344250586674818993
104
112
128
VDD8
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
DDR DIMM
SOCKET
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
100
116
136
143
156
164
VDDQ9
VDDQ10
VDDQ11
184
PIN
VSS15
VSS16
VSS17
124
132
139
145
172
1801582
VDDQ12
VDDQ13
VSS18
VSS19
152
160
VDDID
VDDQ14
VDDQ15
A10_AP
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
NC(RESET#)
VSS20
VSS21
176
CS0#
CS1#
CS2#
CS3#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
FETEN
NC5
CKE0
CKE1
CAS#
RAS#
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
184
VDDSPD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A11
A12
A13
BA0
BA1
BA2
SCL
SDA
SA0
SA1
SA2
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
157
158
71
163
5
14
25
36
56
67
78
86
47
167
48
43
41
130
37
32
125
29
122
27
141
118
115
103
59
52
113
92
91
181
182
183
44
45
49
51
134
135
142
144
16
17
137
138
76
75
173
10
21
111
65
154
97
107
119
129
149
159
169
177
140
DDR1
DDRDIMM_184
-MCS0
-MCS1
-DR_MDQS0
-DR_MDQS1
-DR_MDQS2
-DR_MDQS3
-DR_MDQS4
-DR_MDQS5
-DR_MDQS6
-DR_MDQS7
MAA13
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
SMBCLK1
SMBDATA1
MEMCLK_H5
MEMCLK_L5
MEMCLK_H0
MEMCLK_L0
MEMCLK_H7
MEMCLK_L7
MEMRESET_L
MCKE0
MCKE1
-MSCASA
-MSRASA
DR_MDQM0
DR_MDQM1
DR_MDQM2
DR_MDQM3
DR_MDQM4
DR_MDQM5
DR_MDQM6
DR_MDQM7
-MCS0 4,14
-MCS1 4,14
-DR_MDQS0 13,14,15
-DR_MDQS1 13,14,15
-DR_MDQS2 13,14,15
-DR_MDQS3 13,14,15
-DR_MDQS4 13,14,15
-DR_MDQS5 13,14,15
-DR_MDQS6 13,14,15
-DR_MDQS7 13,14,15
MAA[14..0]
MAA[14..0] 4,14
MEMBANKA0 4,14
MEMBANKA1 4,14
SMBCLK1 10,13,33
SMBDATA1 10,13,33
MEMCLK_H5 4,14
MEMCLK_L5 4,14
MEMCLK_H0 4,14
MEMCLK_L0 4,14
MEMCLK_H7 4,14
MEMCLK_L7 4,14
MEMRESET_L 4,13
MCKE0 4,13,14
MCKE1 4,13,14
-MSCASA 4,14
-MSRASA 4,14
DR_MDQM[8..0] 13,14,15
10Sep02-Jerry-For B0 CPU.
M icro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
System Memory : DDR DIMM 1
MS-6725D2
Last Revision Date:
Tuesday, December 17, 2002
Sheet
1
12 35
Rev
0A
of
Page 14
5
4
3
2
1
SYSTEM MEMORY
VDD_25_SUS
D D
C165
104P
DR_MD0
DR_MD1
DR_MD2
DR_MD3
DR_MD4
DR_MD5
DR_MD6
DR_MD7
DR_MD8
DR_MD9
DR_MD10
DR_MD11
DR_MD12
DR_MD13
DR_MD14
DR_MD15
DR_MD16
DR_MD17
DR_MD18
DR_MD19
DR_MD20
DR_MD21
DR_MD22
DR_MD23
DR_MD24
DR_MD25
DR_MD26
DR_MD27
DR_MD28
DR_MD29
DR_MD30
DR_MD31
DR_MD32
DR_MD33
DR_MD34
DR_MD35
DR_MD36
DR_MD37
DR_MD38
DR_MD39
DR_MD40
DR_MD41
DR_MD42
DR_MD43
DR_MD44
DR_MD45
DR_MD46
DR_MD47
DR_MD48
DR_MD49
DR_MD50
DR_MD51
DR_MD52
DR_MD53
DR_MD54
DR_MD55
DR_MD56
DR_MD57
DR_MD58
DR_MD59
DR_MD60
DR_MD61
DR_MD62
DR_MD63
WP2
-MSWEB
C751
1000P
2
DQ0
4
DQ1
6
DQ2
8
DQ3
94
DQ4
95
DQ5
98
DQ6
99
DQ7
12
DQ8
13
DQ9
19
DQ10
20
DQ11
105
DQ12
106
DQ13
109
DQ14
110
DQ15
23
DQ16
24
DQ17
28
DQ18
31
DQ19
114
DQ20
117
DQ21
121
DQ22
123
DQ23
33
DQ24
35
DQ25
39
DQ26
40
DQ27
126
DQ28
127
DQ29
131
DQ30
133
DQ31
53
DQ32
55
DQ33
57
DQ34
60
DQ35
146
DQ36
147
DQ37
150
DQ38
151
DQ39
61
DQ40
64
DQ41
68
DQ42
69
DQ43
153
DQ44
155
DQ45
161
DQ46
162
DQ47
72
DQ48
73
DQ49
79
DQ50
80
DQ51
165
DQ52
166
DQ53
170
DQ54
171
DQ55
83
DQ56
84
DQ57
87
DQ58
88
DQ59
174
DQ60
175
DQ61
178
DQ62
179
DQ63
90
WP(NC)
63
WE#
1
VREF
9
NC2
101
NC3
102
NC4
DR_MD[63..0] 12,14,15
C C
B B
Place 104p and 1000p Cap.
near the DIMM
A A
DR_MD[63..0]
VDD_25_SUS
R79 4.7K
-MSWEB 4,14
DDR_VREF
VDD_25_SUS
738467085
108
120
148
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
168223054627796
VDD6
VDD7
VDD8
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
104
112
VDDQ6
VDDQ7
128
136
VDDQ8
VDDQ9
143
156
VDDQ10
184
DDR DIMM
SOCKET
SLAVE ADDRESS = 1010001B
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
3111826344250586674818993
100
116
124
132
139
164
172
1801582
VDDQ11
VDDQ12
VDDQ13
PIN
VSS17
VSS18
VSS19
145
152
160
VDDID
VDDQ14
VDDQ15
A10_AP
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
NC(RESET#)
VSS20
VSS21
176
CS0#
CS1#
CS2#
CS3#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
FETEN
NC5
CKE0
CKE1
CAS#
RAS#
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
184
VDDSPD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A11
A12
A13
BA0
BA1
BA2
SCL
SDA
SA0
SA1
SA2
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
157
158
71
163
5
14
25
36
56
67
78
86
47
167
48
43
41
130
37
32
125
29
122
27
141
118
115
103
59
52
113
92
91
181
182
183
44
45
49
51
134
135
142
144
16
17
137
138
76
75
173
10
21
111
65
154
97
107
119
129
149
159
169
177
140
DDR2
DDRDIMM_184
-MCS2
-MCS3
-DR_MDQS0
-DR_MDQS1
-DR_MDQS2
-DR_MDQS3
-DR_MDQS4
-DR_MDQS5
-DR_MDQS6
-DR_MDQS7
MAB13
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
SMBCLK1
SMBDATA1
VDD_25_SUS
MEMCLK_H4
MEMCLK_L4
MEMCLK_H1
MEMCLK_L1
MEMCLK_H6
MEMCLK_L6
MEMRESET_L
MCKE0
MCKE1
-MSCASB
-MSRASB
DR_MDQM0
DR_MDQM1
DR_MDQM2
DR_MDQM3
DR_MDQM4
DR_MDQM5
DR_MDQM6
DR_MDQM7
-MCS2 4,14
-MCS3 4,14
-DR_MDQS0 12,14,15
-DR_MDQS1 12,14,15
-DR_MDQS2 12,14,15
-DR_MDQS3 12,14,15
-DR_MDQS4 12,14,15
-DR_MDQS5 12,14,15
-DR_MDQS6 12,14,15
-DR_MDQS7 12,14,15
MAB[14..0]
SMBCLK1 10,12,33
SMBDATA1 10,12,33
MEMCLK_H4 4,14
MEMCLK_L4 4,14
MEMCLK_H1 4,14
MEMCLK_L1 4,14
MEMCLK_H6 4,14
MEMCLK_L6 4,14
MEMRESET_L 4,12
MCKE0 4,12,14
MCKE1 4,12,14
-MSCASB 4,14
-MSRASB 4,14
MAB[14..0] 4,14
MEMBAKB0 4,14
MEMBAKB1 4,14
DR_MDQM[8..0] 12,14,15
10Sep02-Jerry-For B0 CPU.
C1380
C1381
C1382
104P
104P
104P
C1383
104P
Place between DIMM socket.
M icro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
System Memory : DDR DIMM 2
MS-6725D2
Last Revision Date:
Tuesday, December 17, 2002
Sheet
1
13 35
Rev
0A
of
Page 15
5
DDR Terminations
4
3
2
1
VTT_DDR_SUS
D D
C C
B B
DR_MD5
DR_MD4
DR_MD0
DR_MD2
DR_MDQM0
-DR_MDQS0
DR_MD1
DR_MD13
-DR_MDQS1
DR_MD12
DR_MD9
DR_MD10
DR_MD15
DR_MD14
DR_MDQM1
-DR_MDQS2
DR_MD17
MAB12
DR_MD16
MAA11
MAB11
MAA12
DR_MD21
DR_MDQM2
MAB9
MAA9
DR_MD27
MAB2
MAA3
DR_MD30
-DR_MDQS3
DR_MD29
DR_MD25
DR_MD28
MEMBAKB0
DR_MD32
MEMBANKA1
MEMBAKB1
MAB10
MAB0
MAA10
MAA0
RN3 47_8P4R
7 8
5 6
3 4
1 2
RN6 47_8P4R
7 8
5 6
3 4
1 2
RN9 47_8P4R
7 8
5 6
3 4
1 2
RN12 47_8P4R
7 8
5 6
3 4
1 2
RN15 47_8P4R
7 8
5 6
3 4
1 2
RN18 47_8P4R
7 8
5 6
3 4
1 2
RN21 47_8P4R
7 8
5 6
3 4
1 2
RN24 47_8P4R
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
RN30 47_8P4R
7 8
5 6
3 4
1 2
RN33 47_8P4R
7 8
5 6
3 4
1 2
-MSRASA
-MSRASB
MEMBANKA0
DR_MD35
DR_MD39
DR_MD38
DR_MDQM4
DR_MD34
-MCS1
-MSCASA
-MCS0
DR_MD41
-MCS2
DR_MD46
DR_MD43
DR_MD42
MAB13
DR_MD48
DR_MD47
-MCS3
DR_MD53
DR_MD52
DR_MD49
MAA13
DR_MD56
DR_MD60
DR_MD51
DR_MD55
-DR_MDQS7
DR_MDQM7
DR_MD57
DR_MD61
MAB4
MAA6
MAB6
MAA5
DR_MD24
RN4 47_8P4R
RN7 47_8P4R
RN10 47_8P4R
RN13 47_8P4R
RN16 47_8P4R
RN19 47_8P4R
RN22 47_8P4R
RN25 47_8P4R
RN28 47_8P4R
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
R627 47
VTT_DDR_SUS
-DR_MDQS4
DR_MD37
DR_MD33
DR_MD36
MAB8
MAA7
DR_MD22
DR_MD18
DR_MD26
MAB3
MAA4
DR_MDQM3
DR_MD59
DR_MD63
DR_MD58
DR_MD62
MAB5
DR_MD23
MAA8
DR_MD19
DR_MD20
DR_MD11
MCKE0
MCKE1 MAB7
DR_MDQM5
-DR_MDQS5
-MSCASB
-MSWEB
MAA1
MAB1
MAA2
DR_MD31
DR_MD45
DR_MD44
DR_MD40
-MSWEA
DR_MD50
DR_MD54
-DR_MDQS6
DR_MDQM6
DR_MD8
DR_MD3
DR_MD7
DR_MD6
RN2 47_8P4R
7 8
5 6
3 4
1 2
RN5 47_8P4R
7 8
5 6
3 4
1 2
RN11 47_8P4R
7 8
5 6
3 4
1 2
RN14 47_8P4R
7 8
5 6
3 4
1 2
RN17 47_8P4R
7 8
5 6
3 4
1 2
RN20 47_8P4R
7 8
5 6
3 4
1 2
RN23 47_8P4R
7 8
5 6
3 4
1 2
RN26 47_8P4R
7 8
5 6
3 4
1 2
RN29 47_8P4R
7 8
5 6
3 4
1 2
RN127 47_8P4R
7 8
5 6
3 4
1 2
RN128 47_8P4R
7 8
5 6
3 4
1 2
VTT_DDR_SUS
VTT_DDR_SUS
-MSCASB 4,13
-MSCASA 4,12
-MSRASB 4,13
-MSRASA 4,12
MEMBAKB1 4,13
MEMBANKA1 4,12
MEMBAKB0 4,13
MEMBANKA0 4,12
-MCS2
-MCS2 4,13
-MCS3
-MCS3 4,13
MAB13
MAA13
MAB12
MAA12
MAB11
MAA11
MAB1
MAA1
MAB3
MAA3
MAB2
MAA2
MAB6
MAA6
MAB4
MAA4
MAB8
MAA8
MAB5
MAA5
MAA0
MAA10
MAB0
MAB10
-MSCASB
-MCS0
-MCS0 4,12
-MSCASA
-MCS1
-MCS1 4,12
MAA9
MAB9
MAB7
MAA7
-MSRASB
-MSRASA
-MSWEA
-MSWEA 4,12
-MSWEB
-MSWEB 4,13
MEMBAKB1
MEMBANKA1
MEMBAKB0
MEMBANKA0
MCKE1
MCKE1 4,12,13
MCKE0
MCKE0 4,12,13
CN1
X_22p_8P4C
CN2
X_22p_8P4C
CN3
X_22p_8P4C
CN4
X_22p_8P4C
CN5
X_22p_8P4C
CN6
X_22p_8P4C
CN7
X_22p_8P4C
CN8
X_22p_8P4C
CN9
X_22p_8P4C
CN10
X_22p_8P4C
CN11
X_22p_8P4C
CN12
X_22p_8P4C
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
MEMCLK_H5
MEMCLK_H4
MEMCLK_H7
MEMCLK_H6
MEMCLK_H1
MEMCLK_H0
MEMCLK_L[7..0] 4,12,13
MEMCLK_H[7..0] 4,12,13
-DR_MDQS[7..0] 12,13,15
DR_MD[63..0] 12,13,15
MAB[13..0] 4,13
MAA[13..0] 4,12
DR_MDQM[7..0] 12,13,15
R80 18P
R81 18P
R82 18P
R83 18P
R84 18P
R85 18P RN27 47_8P4R
MEMCLK_L[7..0]
MEMCLK_H[7..0]
-DR_MDQS[7..0]
DR_MD[63..0]
MAB[13..0]
MAA[13..0]
DR_MDQM[7..0]
MEMCLK_L5
MEMCLK_L4
MEMCLK_L7
MEMCLK_L6
MEMCLK_L1
MEMCLK_L0
A A
M icro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
DDR Terminations Bank 0
MS-6725D2
Last Revision Date:
Tuesday, December 17, 2002
Sheet
1
14 35
Rev
0A
of
Page 16
5
4
3
2
1
LAYOUT:
DDR Terminations
RN36 10_8P4R
MD0
1 2
MD4
3 4
MD5
5 6
MD1
RN38 10_8P4R
-MDQS0
MDQM0
MD2
MD6
RN40 10_8P4R
MD7
MD3
MD8
MD9
RN44 10_8P4R
MD12
-MDQS1
MD13
MDQM1
RN48 10_8P4R
MD14
MD15
MD10
MD11
RN46 10_8P4R
MD20
MD16
MD17
-MDQS2
MD21
MDQM2
MD18
MD22
RN50 10_8P4R
MD19
MD23
MD24
MD28
RN52 10_8P4R
MD25
MD29
-MDQS3
MDQM3
RN54 10_8P4R
MD26
MD30
MD31
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
D D
C C
B B
RN130
10_8P4R
DR_MD0
DR_MD4
DR_MD5
DR_MD1
-DR_MDQS0
DR_MDQM0
DR_MD2
DR_MD6
DR_MD7
DR_MD3
DR_MD8
DR_MD9
DR_MD12
-DR_MDQS1
DR_MD13
DR_MDQM1
DR_MD14
DR_MD15
DR_MD10
DR_MD11
DR_MD20
DR_MD16
DR_MD17
-DR_MDQS2
DR_MD21
DR_MDQM2
DR_MD18
DR_MD22
DR_MD19
DR_MD23
DR_MD24
DR_MD28
DR_MD25
DR_MD29
-DR_MDQS3
DR_MDQM3
DR_MD26
DR_MD30
DR_MD27
DR_MD31
RN39 10_8P4R
MD32
1 2
MD36
3 4
MD33
5 6
MD37
7 8
RN41 10_8P4R
-MDQS4
1 2
MD34
3 4
MDQM4
5 6
MD38
7 8
RN43 10_8P4R
MD39
1 2
MD35
3 4
MD40
5 6
MD44
7 8
RN45 10_8P4R
MD45
1 2
MD41
3 4
-MDQS5
5 6
MDQM5
7 8
RN47 10_8P4R
MD42
1 2
MD43
3 4
MD46
5 6
MD47
7 8
RN129
MD48
1 2
MD49
3 4
MD52
5 6
MD53
7 8
10_8P4R
RN49 10_8P4R
MDQM6
1 2
-MDQS6
3 4
MD54
5 6
MD50
7 8
RN51 10_8P4R
MD55
1 2
MD51
3 4
MD60
5 6
MD56
7 8
RN53 10_8P4R
MD61
1 2
MD57
3 4
MDQM7
5 6
-MDQS7
7 8
RN55 10_8P4R
MD62
1 2
MD58
3 4
MD63 MD27
5 6
MD59
7 8
DR_MD32
DR_MD36
DR_MD33
DR_MD37
-DR_MDQS4
DR_MD34
DR_MDQM4
DR_MD38
DR_MD39
DR_MD35
DR_MD40
DR_MD44
DR_MD45
DR_MD41
-DR_MDQS5
DR_MDQM5
DR_MD42
DR_MD43
DR_MD46
DR_MD47
DR_MD48
DR_MD49
DR_MD52
DR_MD53
DR_MDQM6
-DR_MDQS6
DR_MD54
DR_MD50
DR_MD55
DR_MD51
DR_MD60
DR_MD56
DR_MD61
DR_MD57
DR_MDQM7
-DR_MDQS7
DR_MD62
DR_MD58
DR_MD63
DR_MD59
Place evenly spaced around VTT fill.
VDD_25_SUS VDD_25_SUS
VTT_DDR_SUS VTT_DDR_SUS
C199
X_0.22uF
<nopop>
C201
X_0.22uF
<nopop>
C208
X_0.22uF
<nopop>
C210
X_0.22uF
<nopop>
C212
X_0.22uF
<nopop>
VDD_25_SUS VDD_25_SUS VDD_25_SUS VDD_25_SUS VDD_25_SUS
C214
104P
C219
104P
C224
104P
C229
104P
C234
104P
C239
104P
C244
104P
VTT_DDR_SUS
104P
C248
C249
VTT_DDR_SUS
104P
C265
C266
104P
104P
C250
C267
X_0.22uF
<nopop>
X_0.22uF
<nopop>
X_0.22uF
<nopop>
X_0.22uF
<nopop>
X_0.22uF
<nopop>
104P
104P
C200
C202
C209
C211
C213
C251
C268
104P
104P
C252
C269
C215
104P
C220
104P
C225
104P
C230
104P
C235
104P
C240
104P
C245
104P
104P
104P
C253
C270
LAYOUT: Locate close to Clawh ammer socket.
VTT_DDR_SUS
C205
C204
104P
104P
C254
C271
104P
104P
C255
C272
104P
104P
C256
C273
C216
104P
C221
104P
C226
104P
C231
104P
C236
104P
C241
104P
C246
104P
C203
104P
104P
X_100u/10V
C257
C274
104P
104P
X_100u/10V
104P
C258
104P
C275
4.7u/1206
C259
C276
C206
GND
C217
104P
C222
104P
C227
104P
C232
104P
C237
104P
C242
104P
C247
104P
104P
104P
VDD_25_SUS
0.22u
104P
C260
104P
C277
C261
C278
VTT_DDR_SUS
C207
X_220uF
C262
104P
104P
C279
104P
104P
C263
C280
C218
104P
C223
104P
C228
104P
C233
104P
C238
104P
C243
104P
VTT_DDR_SUS VTT_DDR_SUS VTT_DDR_SUS VTT_DDR_SUS VTT_DDR_SUS
104P
104P
C264
GND
104P
104P
C281
LAYOUT: Place alternating caps to GND and VDD_2.5_SUS
GND
in a single line along VTT island.
LAYOUT: Add 100pF and 1000pF on VTT fill near
Clawhammer and near DIMMs (both sides).
C844
4.7u/0805
VTT_DDR_SUS
1000P
C284
C845
4.7u/0805
C285
100P
C846
4.7u/0805
C286
100P
C287
C847
4.7u/0805
1000P
C288
C289
1000P
C848
4.7u/0805
100P
2
4
-MDQS[7..0]
-DR_MDQS[7..0]
DR_MD[63..0]
MD[63..0]
MDQM[7..0]
DR_MDQM[7..0]
VTT_DDR_SUS
3
-MDQS[7..0] 4
A A
5
-DR_MDQS[7..0] 12,13,14
DR_MD[63..0] 12,13,14
MD[63..0] 4
MDQM[7..0] 4
DR_MDQM[7..0] 12,13,14
C290
GND
100P
C291
GND
C849
4.7u/0805
VTT_DDR_SUS
C850
1000P
LAYOUT: Place one 1210 10uF capacitor
on each end of the VTT island.
VTT_DDR_SUS
0.22u
0.22u
C851
0.22u
C852
0.22u
C853
CT18
CT19
GND
M icro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
10u/16V/1210
GND
DDR Terminations Bank 1
MS-6725D2
Last Revision Date:
Tuesday, December 17, 2002
Sheet
1
10u/16V/1210
15 35
Rev
0A
of
Page 17
5
D D
AGP 2X/4X/8X SLOT(AGP VER:3.0 COMPLY)
VCC = 50mils trace /
15 mils space
VCC
-PIRQB 8,18,19,33
AGPCLK 8 A_RESET_L 8
A_REQ_L 8
A_ST0 8 A_ST1 8
A_ST2 8
A_RBF_L 8
A_DBIL 8
C C
A_ADSTB1_P 8
VDD_15
A_CBE2_L 8
B B
A_SBA[7..0] 8
A_AD[31..0] 8
A A
A_CBE1_L 8
A_ADSTB0_P 8 A_ADSTB0_N 8
A_SBA[7..0]
A_AD[31..0]
VCC3_SB
5
A_SBA0
A_SBA2
A_SBA4
A_SBA6
A_AD31
A_AD29
A_AD27
A_AD25
A_AD23
A_AD21
A_AD19
A_AD17
-GPERR
-GSERR
A_AD14
A_AD12
A_AD10
A_AD8
A_AD7
A_AD5
A_AD3
A_AD1
A_REFCG
VCC3
C311 103P
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B1
B2
B3
B4
B5
B6
B7
B8
B9
AGP1
-OVRCNT
5V
5V
USB+
GND
-INTB
CLK
-REQ
3.3V
ST0
ST2
-RBF
GND
RESERVED
SBA0
3.3V
SBA2
SB_STB
GND
SBA4
SBA6
RESERVED
GND
AUX3V
3.3V
AD31
AD29
3.3V
AD27
AD25
GND
AD_STB1
AD23
VDDQ
AD21
AD19
GND
AD17
C/-BE2
VDDQ
-IRDY
AUX3V
GND
RESERVED
3.3V
-DEVSEL
VDDQ
-PERR
GND
-SERR
C/-BE1
VDDQ
AD14
AD12
GND
AD10
AD8
VDDQ
AD_STB0
AD7
GND
AD5
AD3
VDDQ
AD1
VREF_CG
AGP_V3.0
R1244 0
FRAME_L
IRDY_L
DEVSEL_L
TRDY_L
12V
-TYPEDET
RESERVED
USBGND
-INTA
-RST
-GNT
3.3V
ST1
RESERVED
-PIPE
GND
-WBF
SBA1
3.3V
SBA3
-SB_STB
GND
SBA5
SBA7
RESERVED
GND
RESERVED
3.3V
AD30
AD28
3.3V
AD26
AD24
GND
-AD_STB1
C/-BE3
VDDQ
AD22
AD20
GND
AD18
AD16
VDDQ
-FRAME
RESERVED
GND
RESERVED
3.3V
-TRDY
-STOP
-PME
GND
PAR
AD15
VDDQ
AD13
AD11
GND
AD9
C/-BE0
VDDQ
-AD_STB0
AD6
GND
AD4
AD2
VDDQ
AD0
VREF_GC
8P4R-22
1 2
3 4
5 6
7 8
4
RN119
4
3
VCC3
R594
+12V
R1404 56K
VCC3
R1442 0
A_SBA1
A_SBA3
A_SBA5
A_SBA7
A_AD30
A_AD28
A_AD26
A_AD24
A_AD22
A_AD20
A_AD18
A_AD16
FRAME_L IRDY_L
TRDY_L DEVSEL_L
R1408 8.2K
A_AD15
A_AD13
A_AD11
A_AD9
A_AD6
A_AD4
A_AD2
A_AD0
R567 X_0
10K
A_TYPEDET_L
GC8X
A_GC8XDET_L 8
-PIRQE 8,33
A_GNT_L 8
A_DBIH 8
A_WBF_L 8
A_SBSTB_N 8 A_SBSTB_P 8
A_ADSTB1_N 8
A_CBE3_L 8
VDD_15
A_STOP_L 8
A_PAR 8
A_CBE0_L 8
A_REFGC 8
A_FRAME_L 8
A_IRDY_L 8
A_DEVSEL_L 8
A_TRDY_L 8
-AGP_PME 8
VCC3_SB
GC8X
AGP SLOT DECOUPLING CAPACITORS
C292 104P
C295 104P
VDD_15
C294 104P
C303 104P
C305 104P
C306 104P
C307 104P
C309 104P
C310 104P
C314 104P
3
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
V_GC
A66
2
VDD_15
R561
2.37KST
A_REFCG
R565
2.37KST
B
Q82
2N3904S
VCC
R559
1K
C E
YFET-NDS7002AS
GC8XDET
Q69
R563
1.02KST
REFCG
FOR AGP_VREF TEST.
AGP2.0 AGP3.0
R563 1.30K 1.02K 1.02K
R561 2.32K 2.32K 2.32K
R565 1.54K 2.32K 2.32K
CLOSE TO AGP SLOT.
600mv 750mv 350mv
VCC
+
C296 104P
C299 104P
2
VCC3 +12V
C293 104P
CT2
1000uF/10V
C297 104P
C302 104P
C304 104P
VCC
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
M icro Star Restricted Secret
C308 104P
AGP Slot
1
VCC3
+
VCC3
MS-6725D2
Last Revision Date:
Tuesday, December 17, 2002
Sheet
16 35
1
CT3
1000u/6.3V
of
Rev
0A
Page 18
5
VGA Connector
D D
CK8_RED_A 9
CK8_GREEN_A 9
CK8_BLUE_A 9
C C
4
VCC3
D26
X_BAV99
231
VCC3
D27
X_BAV99
231
VCC3
D28
X_BAV99
231
VCC3
VCC3
VCC
VCC
3
LM1
X_0.082uH
1 2
R1362
X_75RST
1 2
R1363
X_75RST
1 2
R1364
X_75RST
CM16
CM14
X_10p
X_22P
1 2
LM3
X_0.082uH
CM17
CM19
X_10p
1 2
X_22P
LM5
X_0.082uH
CM22
CM20
X_10p
X_22P
1 2
2
LM2
X_0.082uH
1 2
1 2
1 2
LM4
X_0.082uH
LM6
X_0.082uH
CM15
X_10p
1 2
CM18
X_10p
1 2
CM21
X_10p
1 2
1
X_104P
CK8_HSYNC_A 9
CM26
X_47p
C1332
VCC
FS8
X_1.1A-S
VGA_15
VGA_9
VGA_12
15
10
14
9
13
8
12
7
11
6
CK8_HSYNC_A
JVGA1
X_VGA-D15-BL-B-SC
17
5
4
3
2
1
16
VCC
1
2
R1372 X_0
2
VGA_B
VGA_G
VGA_R
CB49 104P
5 3
4
U87
X_NC7WZ08
R1369
X_22
C1331
X_470p
Title
Document Number
HSYNC
M icro Star Restricted Secret
VGA CONNECTOR
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
MS-6725D2
Last Revision Date:
Tuesday, December 17, 2002
Sheet
17 35
1
of
Rev
0A
R1365
2
D29
3
X_BAV99
1
VDO_DDCSCL_A 9
VDO_DDCSDA_A 9
B B
CK8_VSYNC_A 9
A A
5
VDO_DDCSCL_A
VSYNC
HSYNC
VDO_DDCSDA_A
CK8_VSYNC_A
VCC
CB50 104P
5 3
1
2
X_NC7WZ08
R1371 X_0
4
2
D30
3
X_BAV99
1
R1367 X_33
R1368 X_33
4
U88
R1370
X_22
X_2.2K
CM23
X_470p
R1366
X_2.2K
2
D31
3
X_BAV99
1
VSYNC
CM24
X_470p
2
D32
3
X_BAV99
1
CM25
X_47p
3
Page 19
IDSEL=
AD20
PCI Connectors
5
VCC3 VCC3 VCC3
VCC VCC VCC VCC
4
AD[31..0] 8,19,22
C_-BE[3..0] 8,19,22
+12V
3
AD[31..0]
C_-BE[3..0]
2
VCC3
+12V
1
D D
-PIRQD 8,19,33
-PIRQB 8,16,19,33
PCICLK1 8 PCICLK2 8
-PREQ0 8,33
C C
-IRDY 8,19,22,33
-DEVSEL 8,19,22,33
-PLOCK 19,33
-PERR 8,19,22,33
-SERR 8,19,22,33
B B
-ACK64 19 -REQ64 19
-12V
-PIRQD
-PIRQB
PCI1_PRS1
C827 103P
PCI1_PRS2 PCI2_PRS2
C829 103P
PCICLK1
-PREQ0
AD31 AD30
AD29
AD27 AD26
AD25
C_-BE3
AD23
AD21 AD20
AD19
AD17 AD16
C_-BE2
-IRDY
-DEVSEL
-PERR SMBCLK2
-SERR
C_-BE1
AD14
AD12 AD11
AD10
AD8 C_-BE0
AD7
AD5 AD4
AD3
AD1 AD0
-ACK64 -ACK64 -REQ64 -REQ64
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B1
B2
B3
B4
B5
B6
B7
B8
B9
PCI1
-12V
TCK
GND
TDO
+5V
+5V
INTB#
INTD#
PRSNT1#
RSVD2
PRSNT2#
GND
GND
RSVD5
GND
CLK
GND
REQ#
+5V
AD31
AD29
GND
AD27
AD25
+3.3V
C/BE3#
AD23
GND
AD21
AD19
+3.3V
AD17
C/BE2#
GND
IRDY#
+3.3V
DEVSEL#
GND
LOCK#
PERR#
+3.3V
SERR#
+3.3V
C/BE1#
AD14
GND
AD12
AD10
GND
AD8
AD7
+3.3V
AD5
AD3
GND
AD1
+5V
ACK64#
+5V
+5V
YSLOT120
TRST#
+12V
TMS
+5V
INTA#
INTC#
+5V
RSVD1
+5V
RSVD3
GND
GND
RSVD4
RST#
+5V
GNT#
GND
RSVD6
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL#
+3.3V
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
PAR
AD15
+3.3V
AD13
AD11
GND
AD9
C/BE0#
+3.3V
AD6
AD4
GND
AD2
AD0
+5V
REQ64#
+5V
+5V
A1
A2
A3
A4
TDI
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
-PIRQC
-PIRQA
-PCIRST2
-PGNT0
-PCI_PME
AD28
AD24
R1245 100
AD22
AD18
-FRAME
-TRDY
-STOP
SMBDATA2
PAR
AD15
AD13
AD9
AD6
AD2
-PIRQC 8,19,22,33
-PIRQA 8,19,33
-PCIRST2 8,19
-PGNT0 8
-PCI_PME 8,19,22,33
AD22 AD23
-FRAME 8,19,22,33
-TRDY 8,19,22,33
-STOP 8,19,22,33
SMBCLK2 10,19,22,25,33
SMBDATA2 10,19,22,25,33
PAR 8,19,22,33
VCC3_SB
C328
X_104P
VCC3
C300
104P
-PREQ1 8,33
IDSEL= AD22
INT#= C, D, A, B
C828
C830
-PIRQA
-PIRQC
PCI2_PRS1
103P
103P
PCICLK2
-PREQ1
AD31
AD29
AD27
AD25
C_-BE3
AD23
AD21
AD19
AD17
C_-BE2
-IRDY
-DEVSEL
-PLOCK -PLOCK
-PERR
-SERR
C_-BE1
AD14
AD12
AD10
AD8
AD7
AD5
AD3
AD1
-12V
PCI2
B1
-12V
B2
TCK
B3
GND
B4
TDO
B5
+5V
B6
+5V
B7
INTB#
B8
INTD#
B9
PRSNT1#
B10
RSVD2
B11
PRSNT2#
B12
GND
B13
GND
B14
RSVD5
B15
GND
B16
CLK
B17
GND
B18
REQ#
B19
+5V
B20
AD31
B21
AD29
B22
GND
B23
AD27
B24
AD25
B25
+3.3V
B26
C/BE3#
B27
AD23
B28
GND
B29
AD21
B30
AD19
B31
+3.3V
B32
AD17
B33
C/BE2#
B34
GND
B35
IRDY#
B36
+3.3V
B37
DEVSEL#
B38
GND
B39
LOCK#
B40
PERR#
B41
+3.3V
B42
SERR#
B43
+3.3V
B44
C/BE1#
B45
AD14
B46
GND
B47
AD12
B48
AD10
B49
GND
B52
AD8
B53
AD7
B54
+3.3V
B55
AD5
B56
AD3
B57
GND
B58
AD1
B59
+5V
B60
ACK64#
B61
+5V
B62
+5V
YSLOT120
IDSEL= AD23
INT#= D, A, B, C
TRST#
+12V
TMS
+5V
INTA#
INTC#
+5V
RSVD1
+5V
RSVD3
GND
GND
RSVD4
RST#
+5V
GNT#
GND
RSVD6
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL#
+3.3V
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
PAR
AD15
+3.3V
AD13
AD11
GND
AD9
C/BE0#
+3.3V
AD6
AD4
GND
AD2
AD0
+5V
REQ64#
+5V
+5V
A1
A2
A3
A4
TDI
A5
-PIRQD
A6
-PIRQB
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
-PCIRST2
-PGNT1
-PCI_PME
AD30
AD28
AD26
AD24
AD22
AD20
AD18
AD16
-FRAME
-TRDY
-STOP
SMBCLK2
SMBDATA2
PAR
AD15
AD13
AD11
AD9
C_-BE0
AD6
AD4
AD2
AD0
VCC3_SB VCC3_SB
-PGNT1 8
R1246 100
A A
M icro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
PCI Connector 1 & 2
MS-6725D2
Last Revision Date:
Tuesday, December 17, 2002
Sheet
1
18 35
Rev
0A
of
Page 20
5
4
3
2
1
PCI Connectors
VCC3 VCC3
VCC VCC
C831
C833
-12V
-PIRQB
-PIRQD
PCI3_PRS1
103P
PCI3_PRS2
103P
PCICLK3
-PREQ2
AD31
AD29
AD27
AD25
C_-BE3
AD23
AD21
AD19
AD17
C_-BE2
-IRDY
-DEVSEL
-PERR
-SERR
C_-BE1
AD14
AD12
AD10
AD8
AD7
AD5
AD3
AD1
-ACK64
PCI3
B1
-12V
B2
TCK
B3
GND
B4
TDO
B5
+5V
B6
+5V
B7
INTB#
B8
INTD#
B9
PRSNT1#
B10
RSVD2
B11
PRSNT2#
B12
GND
B13
GND
B14
RSVD5
B15
GND
B16
CLK
B17
GND
B18
REQ#
B19
+5V
B20
AD31
B21
AD29
B22
GND
B23
AD27
B24
AD25
B25
+3.3V
B26
C/BE3#
B27
AD23
B28
GND
B29
AD21
B30
AD19
B31
+3.3V
B32
AD17
B33
C/BE2#
B34
GND
B35
IRDY#
B36
+3.3V
B37
DEVSEL#
B38
GND
B39
LOCK#
B40
PERR#
B41
+3.3V
B42
SERR#
B43
+3.3V
B44
C/BE1#
B45
AD14
B46
GND
B47
AD12
B48
AD10
B49
GND
B52
AD8
B53
AD7
B54
+3.3V
B55
AD5
B56
AD3
B57
GND
B58
AD1
B59
+5V
B60
ACK64#
B61
+5V
B62
+5V
TRST#
+12V
TMS
+5V
INTA#
INTC#
+5V
RSVD1
+5V
RSVD3
GND
GND
RSVD4
RST#
+5V
GNT#
GND
RSVD6
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL#
+3.3V
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
PAR
AD15
+3.3V
AD13
AD11
GND
AD9
C/BE0#
+3.3V
AD6
AD4
GND
AD2
AD0
+5V
REQ64#
+5V
+5V
TDI
D D
-PIRQB 8,16,18,33
-PIRQD 8,18,33
PCICLK3 8
-PREQ2 8,33
C C
-IRDY 8,18,22,33
-DEVSEL 8,18,22,33
-PLOCK 18,33
-PERR 8,18,22,33
-SERR 8,18,22,33
B B
+12V
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
-PIRQA
-PIRQC
-PCIRST2
-PGNT2
-PCI_PME
AD30
AD28
AD26
AD24
AD22
AD20
AD18
AD16
-FRAME
-TRDY
-STOP
SMBCLK2
SMBDATA2
PAR
AD15
AD13
AD11
AD9
C_-BE0
AD6
AD4
AD2
AD0
-REQ64
-PIRQA 8,18,33
-PIRQC 8,18,22,33
VCC3_SB
-PCIRST2 8,18
-PGNT2 8
-PCI_PME 8,18,22,33
-FRAME 8,18,22,33
-TRDY 8,18,22,33
-STOP 8,18,22,33
SMBCLK2 10,18,22,25,33
SMBDATA2 10,18,22,25,33
PAR 8,18,22,33
-REQ64 18 -ACK64 18
-PIRQC 8,18,22,33
-PIRQA 8,18,33
C832
C834
PCICLK4 8
-PREQ3 8,33
AD24 AD25
-IRDY 8,18,22,33
-DEVSEL 8,18,22,33
-PERR 8,18,22,33
-SERR 8,18,22,33
-ACK64 18
-12V
-PIRQC
-PIRQA
PCI4_PRS1
103P
PCI4_PRS2
103P
PCICLK4
-PREQ3
AD31
AD29
AD27
AD25
C_-BE3
AD23
AD21
AD19
AD17
C_-BE2
-IRDY
-DEVSEL
-PLOCK -PLOCK
-PERR
-SERR
C_-BE1
AD14
AD12
AD10
AD8
AD7
AD5
AD3
AD1
-ACK64
VCC3
PCI4
B1
-12V
B2
TCK
B3
GND
B4
TDO
B5
+5V
B6
+5V
B7
INTB#
B8
INTD#
B9
PRSNT1#
B10
RSVD2
B11
PRSNT2#
B12
GND
B13
GND
B14
RSVD5
B15
GND
B16
CLK
B17
GND
B18
REQ#
B19
+5V
B20
AD31
B21
AD29
B22
GND
B23
AD27
B24
AD25
B25
+3.3V
B26
C/BE3#
B27
AD23
B28
GND
B29
AD21
B30
AD19
B31
+3.3V
B32
AD17
B33
C/BE2#
B34
GND
B35
IRDY#
B36
+3.3V
B37
DEVSEL#
B38
GND
B39
LOCK#
B40
PERR#
B41
+3.3V
B42
SERR#
B43
+3.3V
B44
C/BE1#
B45
AD14
B46
GND
B47
AD12
B48
AD10
B49
GND
B52
AD8
B53
AD7
B54
+3.3V
B55
AD5
B56
AD3
B57
GND
B58
AD1
B59
+5V
B60
ACK64#
B61
+5V
B62
+5V
TRST#
+12V
TMS
INTA#
INTC#
RSVD1
RSVD3
GND
GND
RSVD4
RST#
GNT#
GND
RSVD6
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL#
+3.3V
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
PAR
AD15
+3.3V
AD13
AD11
GND
AD9
C/BE0#
+3.3V
AD6
AD4
GND
AD2
AD0
REQ64#
+5V
+5V
+5V
+5V
+5V
+5V
+5V
VCC3
VCC
+12V VCC
A1
A2
A3
A4
TDI
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
-PIRQB
-PIRQD
VCC3_SB
-PCIRST2
-PGNT3
-PCI_PME
AD30
AD28
AD26
AD24
AD22
AD20
AD18
AD16
-FRAME
-TRDY
-STOP
SMBCLK2
SMBDATA2
PAR
AD15
AD13
AD11
AD9
C_-BE0
AD6
AD4
AD2
AD0
-REQ64
-PIRQB 8,16,18,33
-PIRQD 8,18,33
-PCIRST2 8,18
-PGNT3 8
-PCI_PME 8,18,22,33
R1248 100 R1247 100
-FRAME 8,18,22,33
-TRDY 8,18,22,33
-STOP 8,18,22,33
PAR 8,18,22,33
-REQ64 18
YSLOT120
IDSEL= AD24
YSLOT120
IDSEL= AD25
INT#= A, B, C, D INT#= B, C, D, A
AD[31..0] 8,18,22
C_-BE[3..0] 8,18,22
A A
5
-REQ64
-ACK64
AD[31..0]
C_-BE[3..0]
R175 4.7K
R176 4.7K
VCC
VCC3_SB
4
C329
X_104P
M icro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
3
2
http://www.msi.com.tw
PCI Connector 3 & 4
MS-6725D2
Last Revision Date:
Tuesday, December 17, 2002
Sheet
1
19 35
Rev
0A
of
Page 21
5
4
3
2
1
AC97 CODEC
C332
10u/16V
MIC2_IN
MIC1_IN
+5VR +12V
1 2
+
C333
104p
LINE_IN_R 21
LINE_IN_L 21
MIC2_IN 21
MIC1_IN 21
AGND
U75
YLT1087S-0.8A
3 2
1 2
+
C331
10u-35V
C354
270p
VIN VOUT
C355
270p
R-L-IN-L
R201 4.7K
Install R -> Apply "CODEC_14" clock
not Install R -> Apply "24.576 Crystal" clock
D D
C343
104p
1
2
3
4
5
6
7
8
9
10
11
12
ID0
ID1
DVDD1
XTL_IN
XTL_OUT
DVSS1
SDATA_OUT
BIT_CLK
DVSS2
SDATA_IN
DVDD2
SYNC
RESET#
NC
AGND
R766 X_1K
AGND
R190 X_1K
VCC3
CODEC_14 9
C344
X_10P
R1203 10
C C
B B
AC_SDOUT 9
AC_BITCLK 9
AC_SDIN0 9
AC_SYNC 9
-AC_RST 9
RM15 15
CM27
22p
C349
X_10p
BITCLK
+5VR
C925
104p
4847464544424140394338
NC
ID1
ID0
EAPD
AVSS3
AVSS2
AVDD3
SPDIFO
PHONE_IN
1314151617181920212223
AUX-L
AUX-R
R1205 2.2K
JS1
R1206 2.2K
JS0
CD-L
HP_OUT_R
CD-GND_REF
CD-R
MIC1
AGND
C926
104p
37
AVDD2
HP_OUT_L
MONO_OUT
LINE_OUT_R
LINE_OUT_L
LFE_OUT
CENTER_OUT
VREFOUT
NC/MIC2
LINE-IN-L
LINE-IN-R
AD1980
24
MIC2
MIC1
LINE_OUT_R 21
LINE_OUT_L 21
MONO_OUT
U18
36
35
34
AVDD4
33
AVSS4
32
31
30
AFILT2
29
AFILT1
28
27
VREF
26
AVSS1
25
AVDD1
R1204
C350
10u/16V
L-IN-R
L-IN-L
PU_MIC
C1220 103P
C362 105p/0805
C364 105p/0805
C1221 103P
47
+5VR
R_MIC2
R_MIC1
SURR_R
SURR_L
C345 104p
LFE
CENTER
AFILT2
AFILT1
VREF_OUT
VREF
C347
104p
C359 105p/0805
C360 105p/0805
R197 2.2K
R624 2.2K
R203 1K
R204 1K
R202 1K
C353
10u/16V
+5VR
SURR_R 21
SURR_L 21
LFE 21
CENTER 21
C927
105p/0805
C351
104p
FMIC1_IN 21
VOUT
ADJ
1
FB25 120S/0805
FB26 120S/0805
R198 4.7K
R199 4.7K
R200 4.7K
4
R1116
100RST
R1123
300RST
LINE_IN_R R-L-IN-R
LINE_IN_L
JCD1
CD_R C_CD_R
C368 105p/0805
CD_GND
C369 105p/0805
CD_L
C370 105p/0805
AUX_R
C373 105p/0805
AUX_L
C374 105p/0805
A A
5
4
AGND
C_CD_GND
C_CD_L
R217
4.7K
AGND
C_AUX_R
C_AUX_L AUXL
R226
4.7K
3
R218
2.7K
R224 4.7K
R225 4.7K
R227
4.7K
R206 4.7K
R212 2.7K
R215 4.7K
R219
4.7K
CD-D1x4-BK-SBTJ
CCINR
CCING
CCINL
AUX-D1x4-YL
AUXR
4
3
2
1
X_YFET-NDS7002AS
FNTA_P9 21
JAUX1
4
3
2
1
C901
105p/0805
FNTA_P9
-P9
Q92
D S
G
M icro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
2
http://www.msi.com.tw
Audio Codec
MS-6725D2
Last Revision Date:
Tuesday, December 17, 2002
Sheet
1
20 35
Rev
0A
of
Page 22
5
4
3
2
1
D D
+5VR
CM28 X_470P
FMIC1_IN 20
R232 X_2.7K
SPEAKER_L
C876
X_105p
SPEAKER_R
CM29
X_470P
LINE_IN_R 20
LINE_IN_L 20
MIC_PWR
CM30
X_470P
MIC2_IN 20
R207
X_1.5K
AUD1
14
15
16
1
2
3
4
5
6
7
8
9
10
11
12
13
17
18
R230
X_1.5K
MICP_DIV
LINE_OUT_R 20
LINE_OUT_L 20
LINE_OUT_R FMIC1_IN
LINE_OUT_L
EC1 100u-16V
+
EC2 100u-16V
+
R236
100K
C C
B B
LFE 20
CENTER 20
SURR_R 20
SURR_L 20
SURR_R
SURR_L
C1218 4.7u/0805
C1219 4.7u/0805
C1216 4.7u/0805
C1217 4.7u/0805
SPEAKER_R
SPEAKER_L
R237
100K
CM32
470P
CM31
470P
SPKR_R
MONO_R
MONO_R 31
MONO_L
MONO_L 31
SPKR_L
CM35 470P
CM36 470P
CM37 470P
CM38 470P
N54-13F0021-F02
Dell Front Audio Connector
FNTA_P10 25
FNTA_P9 20
+5VR
R216
X_2.7K
MICP
SPKR_L
SPKR_R
FNTA_P10
R749 10K
C1222 4.7u/0805
C1223 4.7u/0805
FNTA_P9
MIC2_IN
MIC1_IN 20
FNTA_P9
F_AUDIO
1
2
3
4
5
6
8
9
10
HT110_520
SPKR_L
SPKR_R
CM33 470P
CM34 470P
CM39
470P
MIC1_IN
CM40
470P
AUD2
6
GND
7
GND
5
R'
4
NC
1
GND
3
NC
2
L'
25
R
24
NC
23
NC
22
L
8
GND
9
GND
JACKx2+PHONE-D9-BK
C371
X_105p
A A
5
4
3
Reserved for special MIC-Phone
2
M icro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
Audio PORT
MS-6725D2
Last Revision Date:
Tuesday, December 17, 2002
Sheet
1
21 35
of
Rev
0A
Page 23
5
VCC
C534
1000P
VDD_PCI
D D
AD[0..31] 8,18,19
C C
C_-BE[0..3] 8,18,19
AD26
B B
R763 X_4.7K
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C_-BE0
C_-BE1
C_-BE2
C_-BE3
-FRAME 8,18,19,33
-IRDY 8,18,19,33
-TRDY 8,18,19,33
-DEVSEL 8,18,19,33
-STOP 8,18,19,33
PAR 8,18,19,33
-PERR 8,18,19,33
-SERR 8,18,19,33
-PREQ4 8,33
-PGNT4 8
R1249 X_100
-PIRQC 8,18,19,33
-PCI_PME 8,18,19,33
LAN_PCLK 8
-PCIRST1 8
-TRST
LAN2_5
K14
L13
U62
N7
AD0
M7
AD1
VDDP
P6
AD2
P5
AD3
N5
AD4
M5
AD5
P4
AD6
N4
AD7
P3
AD8
N3
AD9
N2
AD10
M1
AD11
M2
AD12
M3
AD13
L1
AD14
L2
AD15
K1
AD16
E3
AD17
D1
AD18
D2
AD19
D3
AD20
C1
AD21
B1
AD22
B2
AD23
B4
AD24
A5
AD25
B5
AD26
B6
AD27
C6
AD28
C7
AD29
A8
AD30
B8
AD31
M4
C_BE#0
L3
C_BE#1
F3
C_BE#2
C4
C_BE#3
F2
FRAME#
F1
IRDY#
G3
TRDY#
H3
DEVSEL#
H1
STOP#
J1
PAR
J2
PERR#
A2
SERR#
C3
REQ#
J3
GNT#
A4
IDSEL
H2
INTA#
A6
PME#
A3
PCICLK
C2
PCI_RST#
D12
TDI
B12
TDO
A12
TMS
C12
TCK
D11
TRST#
F4
M66EN
X_Broadcom BCM5705/4401
VCC3 VCC3_SB
VCC3_SB
P11
VDDP
VDDP
R1415
0
VDD_PCI
A11
F11
K12
L12A7B3C5E1E4G1K3L4N6P2
VDD_IO
VDD_IO
VDD_IO
VDD_IO
VDD_PCI
VDD_PCI
VDD_PCI
GND
GND
GND
GND
GND
GND
B7D4D5D6D7D8D9E2E5E6E7E8E9F5F6F7F8F9F10G4G5G6G7G8G9
BCM5702 DECOUPLING CAPACITORS
VDD_PCI
VDD_PCI
GND
GND
4
R1416
LAN1_2
X_0
E12H5H6H7H8J5J6J7J8J9J10K5K6K7K8K9K10
VDDC
VDDC
VDDC
VDDC
VDD_PCI
GND
GND
GND
GND
GND
GND
VDDC
GND
VDD_PCI
VDD_PCI
GND
GND
VDD_PCI
VDD_PCI
GND
GND
IDSEL = AD26
MASTER = -PREQ4
POPULATE FOR 4401
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
GND
GND
GND
GND
GND
GND
GND
GND
G10K2H9
VDDC
VDDC
GND
GND
M12
M13M6L6L9N1
AVDDL2
AVDDL1
LAN2_5
M14L5L10
N14P8P12
P13
P14
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
GND
GND
GND
GND
GND
GND
GNDNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNC
N12
N13H4H10J4J11K4K11L7L8
3
VDD_PLL2
VDD_PLL1
LAN2_5
A13
F14
F13
F12
H14P7J14
VDD_PLL
VDD_PLL
M11N8N9P9C8
TR_D0+
VDD_XTAL
TR_D1+
TR_D2+
TR_D3+
REG_SEN12
REG_SUP12
REG_CTL12
REG_SEN25
REG_SUP25
REG_CTL25
SPD100/LEDB
SPD10000/LEDB
LINK/LEDB
TRAFFIC/LEDB
SMB_CLK
SMB_DATA
BIASVDD
VAUX/PRSNT
EEDI
EEDO
AVDD
AVDD
AVDDL
L11
AVDDL
L14M8M9
TR_D0-
TR_D1-
TR_D2-
TR_D3-
GPIO0
GPIO1
GPIO2
EECLK
EEDATA
VESD1
VESD2
VESD3
CS#
RDAC
SCLK
DC
10Sep02-Jerry-Need 2.5V power
at power down state.
POPULATE Resistor
FOR 10-100T Base.
TR_D0+
TR_D0-
TR_D1+
TR_D1-
TR_D2+
TR_D2-
TR_D3+
TR_D3-
R1417 1K
-WP
S100
S1000
LILED
EECLK
EEDATA
RDAC
R762 X_330K
LAN_BIAS
C912 X_104P
R252 49.9RST
R253 49.9RST
R751 49.9RST
R752 49.9RST
R753 49.9RST
R754 49.9RST
R755 49.9RST
R756 49.9RST
X_BCP69 1
LAN1_2
R760 X_10K
R761 X_10K
R251 1.24KST
FB4 X_120S
R764 X_4.7K
R823
X_47K
B13
B14
C13
C14
D13
D14
E13
E14
A9
B9
B10
C10
B11
C11
H12
K13
J13
H13
G12
G13
G14
A10
C9
M10
P10
P1
G2
A1
G11
SO
H11
E10
SI
D10
E11
N11
XI
N10
XO
A14
J12
Q93
Q94
X_BCP69 1
LAN_X1
LAN_X2
LAN2_5
C1379
C920 104P
2
R1208 X_0
DEPOPULATE FOR 4401
BECOME 1.8V FOR 4401
LAN1_2
1 2
+
4
3 2
4
3 2
1 2
+
CT29
SMBCLK2 10,18,19,25,33
SMBDATA2 10,18,19,25,33
VCC3_SB
VCC3_SB
VCC
104P
C394 X_18P
X_25MHZ
32pF
+-30PPM
C396 X_18P
CT28
X_10u/16V
X2
LAN2_5
VCC3_SB
CT27
X_10u/16V
1 2
+
C911
104P
LAN1_2
C909
104P
C910
104P
X_10u/16V
VCC3_SB
LILED 35
R1207 X_0
C1224 104P
S1000
S100
TR_D0+
TR_D0TR_D1+
TR_D1TR_D2+
TR_D2TR_D3+
TR_D3-
LILED
R1209 X_0
C1225 104P
LAN2_5
R820 330
R821 330
R750 330
LAN2_5
VCC3_SB
S1000 35
VCC3_SB
D24
X_RL201
VCC3_SB
POPULATE FOR 5705
DEPOPULATE FOR 4401
TR_D0+ 35
TR_D0- 35
TR_D1+ 35
TR_D1- 35
C403 X_104P
FB37 X_120S
C406 X_104P
FB36 X_120S
C409 X_104P
FB38 X_120S
C918 X_104P
FB39 X_120S
C1096
330p
for EMI
C1097
330p
S1000
S100 LILED
1
DEPOPULATE Resistor
FOR 10-100T Base.
DEPOPULATE Capactor
FOR Gigabit.
CT1 35
LAN_USB1B
GREEN
19
ORANGE
20
CT1
CT2
P_LILED
POWER
13
TD1+
18
TD1-
12
TD2+
17
TD2-
11
TD3+
16
TD3-
10
TD4+
15
TD4-
9
14
GND
AMBER
21
22
YMD20
CT2 35
DEPOPULATE Resistor
FOR 10-100T Base.
DEPOPULATE Capactor
FOR Gigabit.
LAN_25 BECOME 3.3V FOR 4401
TR_D0+
TR_D0TR_D1+
TR_D1-
C957 X_104P
VDD_PLL2
VDD_PLL1
AVDDL2
AVDDL1
P_LILED
X_2.2u/0805 C953
C958 X_104P
X_2.2u/0805 C954
C921 X_104P
X_2.2u/0805 C955
C923 X_104P
X_2.2u/0805 C956
C1098
330p
C1099
330p
LEFT RIGHT
IRQ= -PIRQC
VDD_PCI
A A
LAN1_2
C915
X_104P/BOT
C916
X_104P/BOT
C919
X_104P
C922
X_104P
C924
104P
5
LAN2_5
C404
X_104P/BOT
C407
X_104P/BOT
C917
104P
C402
104P
C405
104P
C408
X_104P
C410
X_104P
C411
X_104P
IF USE 5702 POPULATE 24C128
IF USE 4410 POPULATE 93C46.
1
A0
2
A1
3
A2
X_AT24C128 / SOIC8
4
VCC
SCL
SDA GND
U63
WP
8
7
6
5 4
VCC3_SB
WP
R765 X_10K
EEDATA
EECLK
EEDI
EEDO
C914
104P
U20
1
CS
2
SK
3
DI
4
DO
3
16/8BIT
X_93C46
VCC
GND
8
7
NC
PU_EEPROM
6
5
R256 X_10K
VCC3_SB
2
C401
104P
M icro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
BCM5702 PCI LAN
MS-6725D2
Last Revision Date:
Tuesday, December 17, 2002
Sheet
1
22 35
of
Rev
0A
Page 24
5
4
3
2
1
D D
C C
FRONT PANEL USB CONNECTOR FOR USB PORT 0-0, 0-1 REAR PANEL USB CONNECTOR FOR USB PORT 1-0, 1-1
DATA0-_FRONT 9
DATA0+_FRONT 9
DATA2-_FRONT 9
DATA2+_FRONT 9
FB8 X_0
4 3
1 2
FB6 X_0
FB10 X_0
4 3
1 2
FB13 X_0
L6
90ohm_0805
90ohm_0805
L8
SBD1SBD1+
SBD0SBD0+
SBD1- 31
SBD1+ 31
SBD0- 31
SBD0+ 31
USB_GND 30
DATA3+_REAR 9
DATA3-_REAR 9
DATA1+_REAR 9
DATA1-_REAR 9
USB_GND
CP6 X_COPPER
FB11 X_600_0805
FB5 X_0
4 3
1 2
FB7 X_0
FB9 X_0
4 3
1 2
FB12 X_0
L5
90ohm_0805
L7
90ohm_0805
NEAR USB
CONNECTOR
CM41
X_47p
CM42
X_47p
B1_N1
B1_P1
B1_N0
B1_P0
CM43
X_47p
USBVCC2
CM44
X_47p
LAN_USB1A
5
6
7
8
1
2
3
4
YMD20
USB_GND
UP
DOWN
23
24
25
26
27
28
29
30
FRONT PANEL USB CONNECTOR FOR USB PORT 0-2 & 1-2
10
5
6
7
8
USBVCC1
CM45
X_47p
CM46
X_47p
* USB Trace width : 7.5 mils
* USB Trace Spacing : 22.5 mils
* Differential USB Signlas Trace, Spacing : 7.5 mils
* USB Power Trace must be 50mils width
DATA5+_REAR 9
DATA5-_REAR 9
DATA4-_REAR 9
DATA4+_REAR 9
B B
FB14 X_0
4 3
1 2
FB15 X_0
FB16 X_0
4 3
1 2
FB17 X_0
L9
90ohm_0805
90ohm_0805
L10
NEAR USB
CONNECTOR
B1_P2
B1_N2
B0_N2
B0_P2
CM47
X_47p
CM48
X_47p
USBVCC1
R_USB1
9
1
2
3
4
12 11
USBx2-D8-BK
USB_GND
A A
M icro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
USB Port
MS-6725D2
Last Revision Date:
Tuesday, December 17, 2002
Sheet
1
23 35
Rev
0A
of
Page 25
5
ATA 33/66/100 Connector
4
3
2
1
PRIMARY IDE CONN.
D D
RESET_IDEP_L 8,32
C C
VCC3
R282 10K
RESET_IDEP_L
-IDEACTP 31
R283 33
PDD_7
PDD_6
PDD_5
PDD_4
PDD_3
PDD_2
PDD_1
PDD_0
PDREQ_R
-PDIOW_R
-PDIOR_R
PIORDY_R
-PDDACK_R
IRQ14_R
PDA1_R
PDA0_R PDA2_R
-PDCS1_R
-IDEACTP
-P_IDE_RST
PRIMAR
<Symbol Name>
1
3 4
5 6
7 8
91110
13 14
17 18
19
21
23
25
27
29
31
33
35
37
2
PDD_8
PDD_9
PDD_10
PDD_11
PDD_12
12
PDD_13
PDD_14
16 15
PDD_15
22
24
26
28
30
32
34
36
38
40 39
P28
-PDCS3_R
R284
470
C426
473P
DCABLEIDP_L 10
R286
15K
DDATA_P[15..0] 10
DDATA_P1
DDATA_P14
DDATA_P0
DDATA_P15
DDATA_P11
DDATA_P4
DDATA_P10
DDATA_P5
DDATA_P7
DDATA_P8
DDATA_P6
DDATA_P9
DDATA_P3
DDATA_P12
DDATA_P2
DDATA_P13
RN65
7 8
5 6
3 4
1 2
8P4R-33
RN67
1 2
3 4
5 6
7 8
8P4R-33
RN69
7 8
5 6
3 4
1 2
8P4R-33
RN71
7 8
5 6
3 4
1 2
8P4R-33
PDD_1
PDD_14
PDD_0
PDD_15
PDD_11
PDD_4
PDD_10
PDD_5
PDD_7
PDD_8
PDD_6
PDD_9
PDD_3
PDD_12
PDD_2
PDD_13
DDRQP 10
IRQ14 10,33
DIOWP_L 10
DIORP_L 10
DDACKP_L 10
DRDYP 10
DADDR_P1 10
DADDR_P0 10
DADDR_P2 10
DCS1P_L 10
DCS3P_L 10
DDRQP
DRDYP
RN66
7 8
5 6
3 4
1 2
8P4R-82
RN68
7 8
5 6
3 4
1 2
8P4R-22
R285 33
RN70
7 8
5 6
3 4
1 2
8P4R-33
PDREQ_R
IRQ14_R
-PDIOW_R
-PDIOR_R
-PDDACK_R
PIORDY_R
PDA1_R
PDA0_R
PDA2_R
-PDCS1_R
-PDCS3_R
SECONDARY IDE CONN.
-S_IDE_RST
R287 10K
VCC3
-IDEACTS 31
RESET_IDEP_L
SDD_7
SDD_6
SDD_5
SDD_4 SDD_11
SDD_3 SDD_12
SDD_2
SDD_1 SDD_14
SDD_0 SDD_15
SDREQ_R
-SDIOW_R
-SDIOR_R
SIORDY_R
-SDDACK_R
IRQ15_R
SDA1_R
SDA0_R
-SDCS1_R
-IDEACTS
RESET_IDEP_L 8,32
B B
R288
SECON
<Symbol Name>
1
2
3 4
33
5 6
7 8
91110
13 14
17 18
19
21
23
25
27
29
31
33
35
37
SDD_8
SDD_9
SDD_10
12
SDD_13
16 15
22
24
26
28
30
32
34
36
38
40 39
S28
ATADET1_R
SDA2_R
-SDCS3_R
R290
470
C427
473P
DCABLEIDS_L 10
R291
15K
DDATA_S[15..0] 10
DDATA_S1 SDD_1
DDATA_S14
DDATA_S0 SDD_0
DDATA_S15
DDATA_S10 SDD_10
DDATA_S4 SDD_4
DDATA_S11 SDD_11
DDATA_S7 SDD_7
DDATA_S8 SDD_8
DDATA_S3
DDATA_S12
DDATA_S2
DDATA_S13
RN72
7 8
5 6
3 4
1 2
8P4R-33
RN74
7 8
5 6
3 4
1 2
8P4R-33
RN76
7 8
5 6
3 4
1 2
8P4R-33
RN78
7 8
5 6
3 4
1 2
8P4R-33
SDD_14
SDD_15
SDD_5 DDATA_S5
SDD_6 DDATA_S6
SDD_9 DDATA_S9
SDD_3
SDD_12
SDD_2
SDD_13
DDRQS 10
DRDYS 10
IRQ15 10,33
DIOWS_L 10
DIORS_L 10
DDACKS_L 10
DADDR_S1 10
DADDR_S0 10
DADDR_S2 10
DCS1S_L 10
DCS3S_L 10
DDRQS SDREQ_R
DRDYS SIORDY_R
RN73
7 8
5 6
3 4
1 2
8P4R-82
RN75
7 8
5 6
3 4
1 2
8P4R-22
R289 33
RN77
7 8
5 6
3 4
1 2
8P4R-33
IRQ15_R
-SDIOW_R
-SDIOR_R
-SDDACK_R
SDA1_R
SDA0_R
SDA2_R
-SDCS1_R
-SDCS3_R
DRDYP
DRDYS
A A
-IDEACTP
-IDEACTS
R292 4.7K S_FM1
R294 4.7K
R296 10K
R298 10K
5
VCC3
VCC
DDRQP
DDRQS
PDD_7
SDD_7
R293 5.6KST
R295 5.6KST
R297 10K
R299 10K
4
1 2
1 2
1 2
FM1
FM2
X_FM
X_FM
1 2
1 2
FM5
FM6
X_FM
X_FM
1 2
FM3
FM4
X_FM
X_FM
1 2
1 2
FM7
FM8
X_FM
X_FM
3
1 2
X_FM
1 2
S_FM7
X_FM
1 2
1 2
1 2
1 2
S_FM5
X_FM
S_FM12
X_FM
1 2
S_FM6
X_FM
1 2
S_FM13
X_FM
M icro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
IDE CONNECTOR
MS-6725D2
Last Revision Date:
Tuesday, December 17, 2002
Sheet
24 35
1
Rev
0A
of
S_FM3
S_FM4
X_FM
X_FM
1 2
1 2
S_FM9
X_FM
2
1 2
S_FM10
X_FM
S_FM8
X_FM
Page 26
5
4
3
2
1
LPC SUPER I/O 49M292
U21
-PCIRST_LPC 8,26
SIO_PCLK 8
SERIRQ 8,33
LDRQ1_L 8,26
-LPC_FRAME 8,26
D D
C C
THERMDA_CPU 5
THERMDC_CPU 5
B B
LPC_AD0 8,26
LPC_AD1 8,26
LPC_AD2 8,26
LPC_AD3 8,26
GPI_PCSPKDET 31
DLED1 26
DLED2 26
GPI_LOB0 31
GPI_LOB1 31
GPI_FRONT_CABLE 31
FNTA_P10 21
DLED3 26
CPU_CTRL 31
SYS_CTRL 31
DLED4 26
CPU_FAN 10,31
SYS_FAN 31
GPI_ESUPPORT_LED 31
POWER_LED 31
R314 0
-SIO_PME 10
R1251 10K
VCC3
SMBDATA2_IO
SMBCLK2_IO
1.2V
VDD_15
VCC
VDD_25
INTRUDER_L
PWRBTOUT
PWRON_L
VCC3
VID0
VID1
VID2
VID3
VID4
R313 0
THERMDA_CPU
THERMDC_CPU
VCC3
CB5
104P
VID[4..0] 5,34
VDD_CORE
THERM_L 10
INTRUDER_L 10,31
-SLP_S3 10,31
PWRBTIN 31
PWRBTOUT 10
PWRON_L 30
C32KHZ 10
SIO_14M 10
26
PCI_RESET#
29
PCI_CLK
30
LDRQ1_L
BEEP
GP25
D+
D-
SER_IRQ
25
LDRQ#
24
LFRAME#
20
LAD0
21
LAD1
22
LAD2
23
LAD3
32
J1B1/GP10/DRVDEN1
33
J1B2/GP11/P17
34
J2B1/GP12/WDT
35
J2B2/GP13/DS1
36
JX1/GP14/MTR1
37
JY1/GP15
38
JX2/GP16
39
JY2/GP17
101
MIDI_IN/GP25
102
MIDI_OUT/GP26
55
FAN_CTL1/GP33
54
FAN_CTL2/GP32
17
FAN_CTL3/GP21/P16
62
FAN_SEN1/GP35/IRTX2
61
FAN_SEN2/GP34/IRRX2
18
FAN_SEN3/GP22/P12
48
LED1/GP60
49
LED2/GP61
-PME -RI
43
IO_PME#/GP42
-IO_SMI
50
IO_SMI#/GP27/P17
104
SDA
105
SCLK
107
VID0
108
VID1
109
VID2
110
VID3
111
+12V_IN/VID4
113
HGND
118
VCCP_IN
119
+1.8V_IN
120
+1.5V_IN
116
+5V_IN
117
+2.5V_IN
-OVT
106
A0/RESET#/THERM#
115
D0+
114
D0-
121
D1+
122
D1-
41
INTRD_IN#
52
SLP_SX#
47
PB_IN#
45
PB_OUT#
46
PS_ON#
6
SUSCLK
19
CLK_14M
28
GAME_VREF
2
VCC_1
53
VCC_2
65
VCC_3
93
VCC_4
27
VCC_5
SMSC LPC47M292
DRVDEN0/GP40
RTS#1/SYSOPT
RXD2/GP52/IRRX
TXD2/GP53/IRTX
KBRST#/GP36
GP31/3V_EN#/OCS#/PWR_OK
GP30/5V_EN#
24Oct02-Jerry-Per SMSC FAE request.
Q148
Q149
R1425 22K
R1426 10K
R1432 8.2K
VCC3
VCC3
R1427
4.7K
SMBDATA2_IO
R1428
4.7K
SMBCLK2_IO
SMBDATA2 10,18,19,22,33
YFET-NDS7002AS
+12V
A A
5
SMBCLK2 10,18,19,22,33
YFET-NDS7002AS
+12V
PWRBTOUT
PWRON_L
LDRQ1_L
INDEX#
MTR#0
DS#0
DIR#
STEP#
WDATA#
WGATE#
TRACK0#
WP#
RDATA#
HEAD#
DSKCHG#
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
SLCT
BUSY
ACK#
SLCTIN#
INIT#
ERR#
ALF#
STB#
RI#1
RXD1
CTS#1
DCD#1
DSR#1
TXD1
DTR#1
RI2#/GP50
CTS#2/GP56
DCD#2/GP51
DSR#2/GP54
RTS#2/GP55
DTR2#/GP57
GA20/GP37
KBDATA
KBCLK
MSDATA
MSCLK
SC_PSNT#
SC_RST#
SC_IO
SC_CLK
VTR
VBAT
HVCC
AGND
GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
VCC3_SB
VCC5_SB
VCC3
4
PE
1
13
3
5
8
9
10
11
14
15
16
12
4
LP0
68
LP1
69
LP2
70
LP3
71
LP4
72
LP5
73
LP6
74
LP7
75
SLCT
77
PE
78
BUSY
79
-ACK
80
-SLIN
67
-INIT
66
-ERR
81
-AFD
82
-STB
83
90
84
88
91
86
85
87
89
92
95
99
94
97
96
98
100
64
63
56
57
58
59
103
RN91 8P4R-4.7K
124
125
126
128
127
44
42
112
40
7
31
51
60
76
123
LP_D0
7 8
LP_D1
5 6
LP_D2
3 4
LP_D3
1 2
LP_D4
7 8
LP_D5
5 6
LP_D6
3 4
LP_D7
1 2
7 8
RN81
5 6
8P4R-33
3 4
1 2
R825 33
R826 33
R827 33
R828 33
R308 33
R1250 10K
SINA 27
-CTSA 27
-DCDA 27
-DSRA 27
-RTSA
-RI
GP52
GP56
KA20G
KBRC_L
SOUTA 27
-RTSA 27
-DTRA 27
GP56 26
BIOS_P 26
INTRUDER_CABLE_L 31
GPI_ESUPPORT 31
KA20G 10
KBRC_L 10
1 2
3 4
5 6
7 8
R1431 4.7K
VCC3_SB
VBAT1
VCC3
24Oct02-Jerry-Per SMSC FAE request.
CB4
104P
SPEAKER BLOCK
10Sep02-Jerry-Net name error.
VCC3
R321
10K
BEEP
DRVDEN0 27
-INDEX 27
-MOT_A 27
-DRV_A 27
-DIR 27
-STEP 27
-WT_DT 27
-WT_EN 27
-TRACK0 27
-FDD_WP 27
-RDATA 27
-HEAD 27
-DSKCHG 27
8P4R-33
RN79
8P4R-33
RN80
LP_SLCT 27
LP_PE 27
LP_BUSY 27
-LP_ACK 27
-LP_SLIN 27
-LP_INIT 27
-LP_ERR 27
-LP_AFD 27
-LP_STB 27
VCC3_SB
R323
BEP
4.7K
LP_D[0..7] 27
VCC3_SB
ATX_PWR_OK 10,29,30,31
VCC3
R819
10K
ALARM_IO 31
C E
B
Q14
2N3904S
3
THERMAL SENSOR BLOCK
THERMDC_CPU
CB3
THERMDA_CPU
1000P
BIOS Configuration Mode Block
JROM
GP25
GP52
R817 4.7K
R818 4.7K
VBAT1
INTRUDER_L
YJ103
R1210 10K
1
2
3
LPC I/O DECOUPLING CAPACITORS
VCC3
CB7
104P
CB8
104P
CB9
104P
CB10
104P
R835 4.7K
VCC3
R836 10K
R837 10K
10Sep02-Jerry-Net pull up.
-OVT
KA20G
KBRC_L
2
D+
C E
B
Q110
2N3904S
D-
BIOS Function
1-2 : Normal
2-3 : Configuration Mode
REMOVED : BIOS Recovery
( From FDD )
VCC3
VCC3
CB37
1000P
SUPER I/O STRAPPING RESISTOR
R317 X_4.7K
VCC3
R318 4.7K
SIO_ADDR
H: 0x04E
L: 0x02E
(DEFAULT)
M icro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
LPC I/O & HW MONITOR
-RTSA
MS-6725D2
Last Revision Date:
Tuesday, December 17, 2002
Sheet
25 35
1
Rev
0A
of
Page 27
5
4
3
2
1
31
29
30
10
11
12
23
24
3
4
5
6
7
8
9
2
VCC3
27
VCCA
CLK
MODE
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
RESET_L
WE_L
OE_L
LPC ROM
32
25
1
U24
VCC
VDD
VPP
21
DQ7
20
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
RFU
GND
GND1
19
18
LPC_AD3
17
LPC_AD2
15
LPC_AD1
14
LPC_AD0
13
RFU
22
SIO_CE
28
CE
16
26
R327 X_10K
R328 10K
R1419 X_0
LPC_AD3 8,25
LPC_AD2 8,25
LPC_AD1 8,25
LPC_AD0 8,25
LDRQ1_L 8,25
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
8P4R_8.2K
1
3
5
7
RN84
VCC3
2
4
6
8
VCC3
R324
D D
FWH_PCLK 8
R326 1K
BIOS_P 25
NOTE: INIT and RESET have
the same function internally.
-PCIRST_LPC 8,25
-LPC_FRAME 8,25
VCC3
1K
R329 10K
R325
1K
LPC_MODE_L
INIT_ROM_L
GPI4
GPI3
GPI2
GPI1
GPI0
SIO_WP
BIOS_P
ID3
ID2
ID1
ID0
LPC ROM RESISTORS LPC ROM DECOUPLING CAPACITORS
C C
B B
SIMULATION TRACE
J3
VCC
X_PIN1*2
NOTE: GPI pins must not be left floating.
8P4R_10K
1
2
3
4
5
6
7
8
RN85
R330 10K
J4
X_PIN1*2
GPI0
GPI1
GPI2
GPI3
GPI4
VCC3
C431
CB11
104P
104P
LAYOUT: Place 0.01uF cap <1cm
VCC
D_LED
DLED1
RN88
8P4R-330
1 2
3 4
5 6
7 8
DLED1 25
DLED2 25
DLED3 25
DLED4 25
DLED2
Q18
YFET-NDS7002AS
YFET-NDS7002AS
DLED3
DLED4
Q17
2 1
4 3
5 6
NC
7 8
D_GN_RD-D-5V-CR-A
Q19
YFET-NDS7002AS
DDLED1
DDLED2
DDLED3
DDLED4
Q20
YFET-NDS7002AS
RN87
7 8
5 6
3 4
1 2
8P4R-470
VCC
Q146
GP56 25
3
YFET-NDS7002AS
R1424
10K
M icro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
2
http://www.msi.com.tw
LPC ROM & D_LED
MS-6725D2
Last Revision Date:
Tuesday, December 17, 2002
Sheet
1
26 35
Rev
0A
of
A A
5
4
Page 28
5
SERIAL PORT 1
DCDA
RXDA
CTSA
DSRA
D5
1N4148S
104P
U26
20
VCC
2
RIN1
3
RIN2
4
RIN3
7
RIN4
9
RIN5
16
DIN1
15
DIN2
13
DIN3
11
GND
75232-1
CB12
104P
C436 104P
D D
-DTRA 25
-RTSA 25
SOUTA 25
-12V +12V
CB14
ROUT1
ROUT2
ROUT3
ROUT4
ROUT5
DOUT1
DOUT2
DOUT3
+12VC VCC
1
V+
19
18
17
14
12
5
6
8
10
V-
-12VC
DTRA
RTSA
TXDA
D6
1N4148S
CB15
104P
4
FB21
X_80_0805
CP8 X_COPPER
-DCDA 25
SINA 25
-CTSA 25
-DSRA 25
+12VC -12VC
CB13
104P
DCDA
RIA
RXDA
DTRA
DSRA
TXDA
CTSA
RTSA
DCDA
RXDA RTSA
TXDA
DTRA
2
4
6
8
2
4
6
8
26
27
28
29
30
1
3
5
7
1
3
5
7
LPT1B
47 49
31
32
33
34
LPT-D25-BK-BI
DSRA
CTSA
RIA
CNM1
8P4C-220P
CNM2
8P4C-220P
3
2
1
PARALLAL PORT
VCC
C C
LP_D[0..7] 25
B B
A A
-LP_SLIN
-LP_SLIN 25
LP_D3
LP_D3 25
-LP_INIT
-LP_INIT 25
LP_D2
LP_D4
LP_D5
LP_D6
LP_D7
LP_SLCT
LP_SLCT 25
LP_PE
LP_PE 25
LP_BUSY
LP_BUSY 25
-LP_ACK
-LP_ACK 25
LP_D1
LP_D1 25
-LP_ERR
-LP_ERR 25
LP_D0
LP_D0 25
-LP_AFD
-LP_AFD 25
-LP_STB
-LP_STB 25
FLOPPY CONNECTOR
LP_VCC
D7 1N4148S
1 2
3 4
5 6
7 8
7 8
5 6
3 4
1 2
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
R332 2.2K
FDD1
1 2
3 4
7 8
9 10
11 12
13 14
15 16
17 18
19
21 22
23 24
25 26
27 28
29 30
31 32
33 34
FLOPPY
RN90
8P4R-2.2K
RN92
8P4R-2.2K
RN93
8P4R-2.2K
RN94
8P4R-2.2K
6
20
-INDEX
-TRACK0
-FDD_WP
-RDATA
-DSKCHG
LP_D2
-LP_INIT
LP_D3
-LP_SLIN
LP_D4
LP_D5
LP_D6
LP_D7
-LP_ACK
LP_BUSY
LP_PE
LP_SLCT
-LP_AFD
LP_D0
-LP_ERR
LP_D1
-LP_STB
DRVDEN0 25
-INDEX 25
-MOT_A 25
-DRV_A 25
-DIR 25
-STEP 25
-WT_DT 25
-WT_EN 25
-TRACK0 25
-FDD_WP 25
-RDATA 25
-HEAD 25
-DSKCHG 25
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
33P CM49
CNM3
8P4C-220P
CNM4
8P4C-220P
CNM5
8P4C-220P
CNM6
8P4C-220P
-LP_STB
LP_D0
LP_D1
LP_D2
LP_D3
LP_D4
LP_D5
LP_D6
LP_D7
-LP_ACK
LP_BUSY
LP_PE
LP_SLCT
CP7 X_COPPER
10Sep02-Jerry-Add pull_up.
-INDEX
-TRACK0
-FDD_WP
-RDATA
-DSKCHG
RN131 8P4R-1K
7 8
5 6
3 4
1 2
51
1
2
3
4
5
6
7
8
9
10
11
12
13
52
FB20
X_80_0805
R838 1K
LPT1A
-LP_AFD
14
-LP_ERR
15
-LP_INIT
16
-LP_SLIN
17
18
19
20
21
22
23
24
25
48
LPT-D25-BK-BI
Wake On Ring
RIA
R333 1K
RI_G
R334
1K
VCC3_SB
R1252
10K
Q21
YFET-NDS7002AS
RI_L 10
CB16
104P
CB17
104P
VCC VCC VCC VCC
CB18
104P
M icro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
I/O CONNECTOR
MS-6725D2
Last Revision Date:
Tuesday, December 17, 2002
Sheet
1
27 35
Rev
0A
of
Page 29
5
D D
Q39
B
V1.2R
V1.2R_L
VDD_2.5_SUS_PG 30
VTT_DDR_SUS_PG 30
-SLP_S5 10,31
(VDD_2.5_RUN)
X_YFET-NDS7002AS
R774 X_1K
VTT_DDR_SUS_PG 30
-VTT_DDR_SUS_PG
VDD_25_SUS
+12V
VCC5_DUAL
VDD_CORE_PG 7,34
PWRON_ATX_L 30
R360 10K
C960 X_4.7u/0805
R1418 10K
C1371
X_104P
HT1VDD_EN 7
Q24
YFET-NDS7002AS
Q31
YFET-NDS7002AS
C475
39p
R414 X_10K
C1242 X_4.7u/0805
R642 X_1K
X_YFET-NDS7002AS
HT_EN
R401 X_1K
5
Q43
C476
104P
-HT_EN
VCC5_DUAL
C C
B B
A A
Q23
YFET-NDS7002AS
VDD_2.5_SUS_CTL
VDD_25
R374
DISCHARGE PATH,
X_47K
DEFAULT
NON-STUFF
R1253 47
-V1.2R_SD
V1.2R_SD
C E
B
C E
Q41
X_2N3904S
X_2N3904S
4
Irms=Iout*(D-D^2)^(1/2)=9.5*0.5=4.75A
1000u/10V Low ESR Capacitor, it's ripple current
Assume ambit temperature lower 70 degree C, the capacitor ripple 1.45A * 1.7 =
1.45A.
2.465A.
N CAPACITOR-INPUT = Irms / Capacitor
RIPPLE-CURRENT = 4.75A / 2.465A= 1.9 pcs
U64
28
VCC
C474
104P
1
AGND
15
PG1
8
EN1
25_IL1
11
ILIM1
12
SS1
9 10
FPWM1# VSEN1
14
VIN
16
PG2/REF2OUT
21
EN2
TT_IL2
18
ILIM2/REF2
17
SS2
20
FPWM2#
13
DDR
ISL6225-TSSOP28PIN
Phigh-gate = Vin/Vout * Iout^2 * Rds(on) = (1.25V / 5V) * 5.21^2 * 0.04 = 0.27W
Plow-gate = (1-D) * Iout^2 * Rds(on) = [1- (1.25V / 5V)] * 5.21^2 * 0.019 = 0.39W
BOOT1
HDRV1
SW1
LDRV1
PGND1
ISNS1
BOOT2
HDRV2
SW2
LDRV2
PGND2
ISNS2
VSEN2
VCC5_DUAL
VCC5_DUAL
VCC5_DUAL
VCC5_DUAL
R362 1K
VDD_2.5_SUS_CTL
R365 1K
R779 64.2KST
C507 103P
R851 100K
R381 1K
VTT_DDR_SUS_PG
-SLP_S5
R773 1K
R783 61.9KST
C487 103P
R361 1K
25_SS3
EN_TT
TT_SS4
E_DDR1
Ptotal = Phigh-gate + Plow-gate = 0.66W
1inch square thermal copper required
Irms1 = Iout*(D-D^2)^(1/2)=2.5*0.48 = 1.2A
1000u/10V Low ESR Capacitor, it's ripple current 1.45A.
Assume ambit temperature lower 70 degree C, the capacitor ripple 1.45A * 1.7 = 2.465A.
N CAPACITOR-INPUT = Irms1 / Capacitor
RIPPLE-CURRENT = 1.2A / 2.465A= 0.5 pcs
U65
28
VCC
C931
104P
1
AGND
15
PG1
8
EN1
11
ILIM1
12
SS1
9 10
FPWM1# VSEN1
14
VIN
16
PG2/REF2OUT
21
EN2
12_IL2
18
ILIM2/REF2
17
SS2
20
FPWM2#
13
DDR
ISL6225-TSSOP28PIN
Phigh-gate = Vin/Vout * Iout^2 * Rds(on) = (1.2V / 5V) * 3^2 * 0.04 = 0.0864W
Plow-gate = (1-D) * Iout^2 * Rds(on) = [1- (1.2V / 5V)] * 3^2 * 0.019 = 0.13W
Ptotal = Phigh-gate + Plow-gate = 0.22W
Q99
VCC
VDD_C1V2_RUN_PG
R789 1K
VCC
R790 64.2KST
C932 103P
VCC
VDD_HT0A_RUN_PG
VCC
VDD_C1V2_RUN_PG
R396 1K
R403 1K
R793 X_1K
R794 64.2KST
C934 103P
R798 1K
VCC
EN_C1V2
C1V2_IL1
18_SS1
R852 100K
-V1.2R_SD
E_DDR2
12_SS2
10Sep02-Jerry-1. FPWM tie GND.
4
3
R1420 10
HDRV1_2V5
PHASE_2V5
LDRV1_2V5
R1421 10
PHASE_1V25
LDRV2_1V25
BO1_C1V2
6
R1422 10
HDRV1_C1V2
5
PHASE_C1V2
4
LDRV1_C1V2
2
3
ISNS_C1V2
7
BO2_1V2
23
R1423 10
HDRV2_1V2
24
PHASE_1V2
25
LDRV2_1V2
27
26
ISNS_1V2
22
19
DDR_PWR_IN
D20
1N5817-S-DO-241AC-1mA
C928 103P
22u/1206 C1384
X_1000P C965
R780 1.62KST
1N5817-S-DO-241AC-1mA
C929 103P
X_1000P C966
C930 103P
100P C967
R791 536RST
C933 103P
100P C968
6
5
4
2
3
7
23
24
25
27
26
22
19
BOOT1
HDRV1
SW1
LDRV1
PGND1
ISNS1
BOOT2
HDRV2
SW2
LDRV2
PGND2
ISNS2
VSEN2
BO1_2V5
ISNS_2V5
VSENSE_2V5
BO2_1V25
HDRV2_1V25
ISNS_1V25
VSENSE_1V25
2.Add input choke.
3.Add damping before gate pin.
4. Fix same net name issue.
3
VCC5_DUAL
CHOCK11
3.3UH
EC40 1000uF-10V
+
EC31 1000uF-10V
+
Q32 FDS4410
1
8
S
D
2
7
S
D
3
6
SG DD
4 5
Q95 FDS4410
4 5
G D
3
6
S
D
2
7
S
D
1
8
S
D
Q96 FDS6930-SO8
3
4
2
1
1N5817-S-DO-241AC-1mA
D23
1N5817-S-DO-241AC-1mA
S1G1D1
D1
G2
D2
D2
S2
R786 3.01KST
VCC
CHOCK12
3.3UH
CHIP_PWR_IN
D22
Q97
3
S1G1D1
4
2
G2
1
S2
FDS6930-SO8
Q98 FDS6930-SO8
3
S1G1D1
4
2
G2
1
S2
R796 665RST
5
6
7
8
EC43 1000uF-10V
D1
D2
D2
D1
D2
D2
2
Phigh-gate = Vin/Vout * Iout^2 * Rds(on) = (2.5V / 5V) * 9.5A^2 * 0.0135 = 0.61W
Plow-gate = (1-D) * Iout^2 * Rds(on) = (1- 2.5V / 5V) * 9.5A^2 * 0.0135 = 0.61W
1inch square thermal copper required
3.3UH
3.3UH
R777 10KST
+
R389
X_10KST
9.5A * ESR< 100mV => ESR < 10.5m ohm.
R781
5.6KST D21
R782 6.81KST
R787
17.4KST
16 // 16 = 8m ohm.
R785
X_6.81KST
+
5.21A * ESR< 50mV => ESR < 9.6m ohm.
16 // 16 = 8m ohm.
CHOCK2
PHASE_2V5
C959
1000P
DDR_PWR_IN
22u/1206 C1385
EC41 1000uF-10V
+
CHOCK1
PHASE_1V25
C961
1000P
Irms=Iout*(D-D^2)^(1/2)=5.21*0.43=2.24A
1000u/10V Low ESR Capacitor, it's ripple current 1.45A.
Assume ambit temperature lower 70 degree C, the capacitor ripple 1.45A * 1.7 = 2.465A.
N CAPACITOR-INPUT = Irms / Capacitor
RIPPLE-CURRENT = 2.24A / 2.465A= 0.9 pcs
Phigh-gate = Vin/Vout * Iout^2 * Rds(on) = (1.8V / 5V) * 2.5A^2 * 0.04 = 0.09W
Plow-gate = (1-D) * Iout^2 * Rds(on) = (1- 1.8V / 5V) * 2.5A^2 * 0.019 = 0.076W
EC29
1500u/6.3V
EC7
1500u/6.3V
VDDIO_SENSE 5
VDD_25_SUS
+
EC30
1500u/6.3V
VTT_SENSE 4
VTT_DDR_SUS
+
EC42
1500u/6.3V
Ptotal = Phigh-gate + Plow-gate = 0.166W
+
5
6
7
8
22u/1206 C1386
PHASE_C1V2
C962
1000P
CHOCK3
3.3UH
R788
6.81KST
1.2V
+
EC11
1000U/10V
2.5A * ESR< 90mV => ESR < 36m ohm.
5
6
7
8
VSENSE_C1V2
CHIP_PWR_IN
22u/1206 C1387
EC44 1000uF-10V
+
PHASE_1V2
CHOCK10 3.3UH
C963
1000P
SENSE_1V2
R792
17.4KST
R795
6.81KST
R797
17.4KST
1.2V_HT
+
CT4
1000U/10V
3A * ESR< 60mV => ESR < 20m ohm.
Irms2 = Iout*(D-D^2)^(1/2)=3*0.427 = 1.281A
1000u/10V Low ESR Capacitor, it's ripple current 1.45A.
Assume ambit temperature lower 70 degree C, the capacitor ripple 1.45A * 1.7 = 2.465A.
N CAPACITOR-INPUT = Irms2 / Capacitor
RIPPLE-CURRENT = 1.281A / 2.465A= 0.52 pcs
M icro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
2
http://www.msi.com.tw
DDR POWER & MISC1
MS-6725D2
1
Last Revision Date:
Tuesday, December 17, 2002
Sheet
28 35
1
of
Rev
0A
Page 30
5
VR4
YLT1084S-TO263-4.5A
ATX_PWR_OK 10,25,30,31
C936
104P
R847
VCC5_SB
1K
3 2
VIN VOUT
VOUT
ADJ
VCC3
3V_G1A
VCC3_SB
3V_G2A
C943
104P
R810 1K
R812 1K
VCC5_SB
C935
X_104P
D D
VCC5_SB
+12V
R804 1K
R803 1K
X_104P C942
Q104
YFET-NDS7002AS
R815
1K
Q105
YFET-NDS7002AS
ATX_PWR_OK
C C
-ATX
10Sep02-Jerry-Fix VCC3_SB
control state.
4
1
C940
R814
C944
104P
20K
5
6
4
R799
200
R801
332 X_104P
Q103
1
S1
D
2
G1
D
3
S2
D
4 5
G2 D
SI4532DY-SO8
+12V
U36B
+
7
-
NS-LM358MX-SOIC8
4 8
3
C937
100u_25V
104P
VCC5_SB
8
7
6
VCC_OK
VCC3_SB
+
CT35
100u_25V
R369 4.7K
3VSB
S3_L
R813
X_1K
VCC5_SB
R800 1K
+12V
-5V_SW_MAIN
Q101
YFET-NDS7002AS
R802 1K
VCC_OK_L
Q102
YFET-NDS7002AS
R628
4.7K
YFET-NDS7002AS
Q81
10Sep02-Jerry-Fix VCC5_SB
control state.
5V_G1_USB
C1226
4.7u/0805
3VSB
+
CT34
VCC
VDD5_DUAL_REAR
5V_G2_USB
C522
39p
VCC_OK_L
C941
R807 1K
VCC5_SB
2
+12V
-5V_SW_MAIN
YFET-NDS7002AS
YFET-NDS7002AS
1
2
3
4 5
SI4532DY-SO8
C948
104P
R806 1K
Q107
R808 1K
Q109
Q100
S1
G1
S2
G2 D
C949
104P 39p
5V_G2
D
D
D
8
7
6
5V_G1
C951
X_104P
G
C950
X_104P
G
VDD5_DUAL_REAR
C938
39p
VCC
S
D
S D
VCC5_SB
C939
104P
VCC5_SB
NIKO-P3055LD-TO252
Q106
Q108
NDS352AP SOT-23
1
VCC5_DUAL
VDD_1.5_AGP BLOCK
B B
A A
C743 104P
VR3
YREG431LS
5
3 1
R586 330
2
C744 1000P
C511 105p
VCC5_SB
R418
680RST
25_PG
R416
432RST
C512 104P
+12V
3
+
2
-
VDD_1.5_FB
C509 104P
1
U36A
NS-LM358MX-SOIC8
4 8
R420 10
4
CT23
V1.5_CL V1.5_G
1000u/6.3V
R417 10
1 23 45 6
7 8
RN104
8P4R-200
1000u/6.3V
VCC3
+
C510 105P/0805
D S
Q47
15N03G
(VDD_1.5_RUN)
VDD_15
EC12
+
C514
104P
C513 105P/0805
3
M icro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
2
http://www.msi.com.tw
HT CORE POWER & MISC2
MS-6725D2
Last Revision Date:
Tuesday, December 17, 2002
Sheet
29 35
1
Rev
0A
of
Page 31
5
5.1K
X_0.1u
R1264
-OC1 9
FS7
-OC3 9
1.5A-miniSMDC200-S
FS3
1.5A-miniSMDC200-S
VCC5_DUAL
D D
VDD5_DUAL_REAR
C C
C1243
VDD_USB_R2
VDD_USB_R1
X_0.1u C547
2.7K
R1265
FB35 80S/0805
FB22 80S/0805
R435
2.7K
C538
39p
R436
5.1K
(VDD5_DUAL_REAL)
FB23 80S/0805
C549
39p
105P/0805
C550
C539
105P/0805
C551
39p
4
USBVCC1
+
EC15
1000uF/10V
+
EC14
1000uF/10V
USBVCCF
C858
39p
USBVCC2
+
EC38
1000uF/10V
USB_GND 23
3
PWRON_L 25
PWRON_ATX_L 28
R428 33
PWRON_ATX_L
C535
103P
PLACE CAP 0.1u/39pF PAIR ON EACH PINS.
2
VCC3 VCC3
11
-12V
12
13
14
15
C521
16
39p
17
-5V
18
VCC
19
20
+12V
3
4
C536
33P
3.3V
-12V
GND
PSON
GND
GND
GND
-5V
5V
5V
POWER
JPW1
12V
12V
D2x2
3.3V
3.3V
GND
GND
GND
POK
5VSB
GND
GND
12V
1
2
3
VCC
4
5V
5
6
5V
7
8
VCC5_SB
9
+12V
10
VCC5_SB
1
2
VCC5_SB
(ATX_PSU_CONNECTOR)
VCC
R430
1K
C526
39p
VCC3
+
EC18
10u/16V
C1370
104P
ATX_PWR_OK
C531
104P
C533
104P
C541
104P
1
ATX_PWR_OK 10,25,29,31
VCC
C527
1000P
C530
104P
C542
104P
-12V -5V +12V
C543
104P
VCC3_SB
VDD_PWGD3
1 2
R1400
1K
R455 33
R456 33
BH-D2
BAT1
VDD_PWGD4
D33
1N4148S
A C
1N5817-S-DO-241AC-1mA
D34
VDD_2.5_SUS_PG 28
VTT_DDR_SUS_PG 28
VCC5_SB
B B
A A
R1398 100
R1399 300
5
5 3
1
2
4
U81
NC7WZ08
VDD_PWGD_2
Trace Width 16mils.
2 3
C1359
X_105P/0805
U93
RT9169-12CX
VIN VOUT
GND
1
SOT89
4
VDD_PWGD_2 5,34
Trace Width 16mils.
C1360
X_105P/0805
VBAT
JBAT1
D1x3-BK
R1347
100
1
2
3
CMOS CLEAR JUMPER
JBAT1 Clear CMOS
Normal
1 - 2
2 - 3
Clear CMOS
VBAT VBAT1
C1281
X_104P
3
C555
104P
25_PG
R443
886RST
R441
1KST
C556
1000P
VCC5_DUAL
3
2
2
C1227
22u/1206
+
1
-
U82A
NS-LM358MX-SOIC8
4 8
VCC3_SB
Title
Document Number
Feedback point need
to close load.
Q131 FDS4410
1
8
S
D
2
7
S
D
3
6
SG DD
4 5
R1211 0
R1212 33
M icro Star Restricted Secret
P WROK & USB PWR & ATX CONN.
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
MS-6725D2
Max Load=
250mA.
1.2V_DUAL
C947
C557
22u/1206
104P
Last Revision Date:
Tuesday, December 17, 2002
Sheet
30 35
1
of
Rev
0A
Page 32
5
R680
10K
R467
D D
POWER_LED 25
4.7K
VCC5_SB
Q84
YFET-NDS7002AS
PLED
R679
1K
PWR_LEDG
Q85
YFET-NDS7002AS
SLP_S5
VCC5_SB
R463
330
R681 1K
Q87
YFET-NDS7002AS
AUX_LED
4
R848
VCC5_SB
330
YFET-NDS7002AS
PWR_LEDG
AUX_LED
1 2
SUPER-YEL-2.1V
VCC5_SB
-SLP_S5 10,28
PWR_LED
Q111
10Sep02-Jerry-Fix
PWR_LED
3
+12V
CB19 104P
CPU FAN
VCC3
FANCON0_IOH 10
CPU_CTRL 25
R484 4.7K
D13 1N4148S
R460 10
CFAN_12V
R461 10
+
CT20
10u-35V
2
R1433 4.7K
R573 X_4.7K
R574 4.7K
CFAN_CTRL
CFAN_T
R485 10K
3
2
CFAN SFAN
1
CPUFAN1
D1x3-WH-SN
R489
4.7K
CFAN
Q57
FMMT618
CPU_FAN 10,25
CB21 104P
SYS_CTRL 25
FANCON1_IOH 10
VCC3
+12V
R486 4.7K
D14 1N4148S
R478 10
R479 10
R575 X_4.7K
R576 4.7K
R1434 4.7K
SFAN_T
SFAN_12V
+
CT7
10u-35V
1
SYSTEM FAN
SFAN_CTRL
R487
10K
3
2
SYS_FAN1
1
D1x3-WH-SN
R490
4.7K
SFAN
Q61
FMMT618
SYS_FAN 25
Intel Front Panel
VCC5_SB
R482
1K
C565
105P/0805
R772
4.7K
GPI_LOB1 25
GPI_FRONT_CABLE 25
SBD0- 23
SBD1+ 23
GPI_ESUPPORT_LED 25
GPI_ESUPPORT 25
INTRUDER_L 10,25
INTRUDER_CABLE_L 25
+5VR
PWRBTIN 25
ALARM_IO 25
VCC5_SB
3
ATX_PWR_OK 10,25,29,30
CK8_PWRGD 10
DZ4A BAT54A
DZ4B BAT54A
BUZZER
10Sep02-Jerry-Fix
Buzzer.
SPKR 10
CB24 105P/0805
R495 20K
REGULATORS
OUTPUT DECOUPLING
CAPACITORS
SPKR_G
VCC5_SB
B
VCC3_SB
R682
DIAG_LED
1K
YFET-NDS7002AS
DIA_LEDG
R492 220
R494 220
C E
Q62
2N3904S
2
CB29
104P
CB30
104P
Q59
VCC5_SB
SPK
R464
330
R493 0
A C
D15
1N4148S
1 2
YFET-NDS7002AS
330
VDD_25_SUS
VCC
-IDEACTP 24
-IDEACTS 24
STR_LED
GN-D-2.1V
Q147
R1439 56K
Q150
YFET-NDS7002AS
R1440
SPK2
-SLP_S3
SPEAKER1
BUZZER
C568
104P
D16 1N4148S
D17 1N4148S
C569 470P
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
VCC5_SB
-SLP_S3 10,25
IDE_LED
M icro Star Restricted Secret
FRONT PANNEL & FAN
MS-6725D2
Last Revision Date:
Tuesday, December 17, 2002
Sheet
31 35
1
of
Rev
0A
VCC3
R770
4.7K
PWR_LED
DIAG_LED
PC_R
+IN
MO_R
MO_L
JFP1 JFP1
1
3
5 6
7
9
HDD+
HDDRESET- PWSW+
RESET+
PWSW-
NC
JFP2
1 2
3
546
7 8
9 10
11 12
13 14
15 16
17 18
19
23 24
25 26
27 28
29 30
31 32
33 34
HEAD2X17_2MM
C897 105P/0805
C898 105P/0805
U61
1
SD
2
BYPASS
3
+IN
4
-IN
SSM2211S-SOIC8
R746 20K
PLED
SLED
USBVCCF
20
22
VOUT_B
VOUT_A
2
4
8
VCC3_SB
PWRBTIN PWRSWIDE_LED
INTRUDER_L
PC_N
MONO_R
MONO_L
8
7
-V
6
+V
5
C900
104P
PWR_LED
DIAG_LED
PWRBTIN
PWRSW-
R771
4.7K
R488
100
VCC3 VCC3
PC_R
PC_N
MONO_R 21
MONO_L 21
4
R481
330
R483 100
GPI_LOB0 25
SBD0+ 23
-OC5 9
SBD1- 23
R831 10K
0
1
1
0
5
HDD+
IDE_LED
RESET-
-FP_RST
CB22
1000P
VCC3
+12V
R743 20K
R744 20K
C899 104P
-IN
C C
-FP_RST 10
B B
S0
S1
S3
S5
A A
VCC
R1441 22K
VCC3_SB
GPI_PCSPKDET 25
VCC3_SB
PLED0SUSLED
1
0
0
SPKR
R745
20K
Page 33
5
4
3
2
1
DATA_0
DATA_1
DATA_2
DATA_3
DATA_4
DATA_5
DATA_6
DATA_7
DATA_8
DATA_9
DATA_10
DATA_11
DATA_12
DATA_13
DATA_14
DATA_15
ADDR_0
ADDR_1
ADDR_2
CS_0#
CS_1#
IOR#
IOW#
IORDY
DMARQ
ACK#
INTR
RESET#
IOCS#
PDIAG#
DDATA_M[15..0]
88I8030
VDDIO
VDDIO
AVDD
AVDD
AVSS
AVSS
CNFG_0
CNFG_1
CNFG_2
ATAIOSEL
XTLIN/OSC
G_RST#
VCC18 VCC3
9
VDD
56
VDD
41
VDD
44
4
24
29
C1233
104P
30
25
18
19
20
26
TP
21
22
17
32
TX
31
TX#
27
RX
28
RX#
45
UAO
43
UAI
33
T0
34
T1
35
T2
36
T3
37
T4
38
T5
39
T6
40
T7
23
ISET
8
GND
42
GND
57
GND
C1228 104P
C1229 104P
C1230 104P
C1234
104P
CNFG0
R1214 20K
CNFG1
R1217 X_20K
CNFG2
R1219 X_20K
R1221 20K
RESET_IDEP_L
VCC3
R1226
12.1KST
FB64 80S/0805
C432
104P
C1231 104P
C1232 104P
VCC3
VCC3
SATA_CLK 10
RESET_IDEP_L 8,24
CNFG0
CNFG1
CNFG2
R1215 X_20K
R1218 20K
R1220 20K
VCC3 VCC18
C548
104P
VCC3
VCC3
VCC3
DDATA_M[15..0] 10
U83
TQFP64
DDATA_M0
DDATA_M1
DDATA_M2
R1222
5.6K
DDATA_M3
DDATA_M4
DDATA_M5
DDATA_M6
DDATA_M7
DDATA_M8
DDATA_M9
DDATA_M10
DDATA_M11
DDATA_M12
DDATA_M13
DDATA_M14
DDATA_M15
R1223
10K
D D
R1213 10K
R1216 4.7K
VCC3
DADDR_M0 10
DADDR_M1 10
DADDR_M2 10
DDACKM_L 10
C C
RESET_IDEP_L 8,24
DADDR_M0
DADDR_M1
DADDR_M2
DCS1M_L 10
DCS3M_L 10
DIORM_L 10
DIOWM_L 10
DRDYM 10
DDRQM 10
INTR_M 10
DCS1M_L
DCS3M_L
DIORM_L
DIOWM_L
DRDYM
DDRQM
DDACKM_L
INTR_M
RESET_IDEP_L
R1224
10K R1225
20K
62
64
2
5
7
11
13
15
14
12
10
6
3
1
63
61
50
51
49
48
47
58
59
55
60
54
53
16
52
46
?
Vout=1.25(1+(Rdown/Rup))
Q54
3 2
VIN VOUT
REF.=1.25V
SOT-223
74QST3384S-QALY
(EZ1117A)
SATA1
1
GND
2
HT+
3
HT-
4
GND
5
HR-
6
HR+
7
GND
SATA
VOUT
ADJ
4
V1.8_FB
1
C553
1000P
20:5:7:5:20<5"
R437
348RST
22u/1206
R440
150RST
C946
C552
104P
B B
TP
1:0
2
5
6
7
A A
00
MASTER ONLY, MONITOR EF, FE BLOCKING DISABLED
MASTER, MONITOR EF, FE BLOCKING DISABLED
01
10
SLAVE, MONITOR EF, FE BLOCKING DISABLED
11
RESERVED
SSC DISABLE
0
SSC ENABLE
1
00
20 MHZ
01
25 MHZ 1
10
30 MHZ
11
40 MHZ
RESERVED (NORMAL OPERATION)
0
1
RESERVED
0
RESERVED (NORMAL OPERATION)
RESERVED
1
RESERVED (NORMAL OPERATION)
0
1
RESERVED
5
4
DESCRIPTION
VALUE
CNFG 2
CNFG 1
0
0
0
0
1
1
1 4:3
1
CNFG 0
0
0
1
1
0
0
1
RESERVED
0
RESERVED
1
RESERVED
0
1
RESERVED
100 MBPS
0
1
133 MBPS
150 MBPS
0
RESERVED
1
M icro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
3
2
http://www.msi.com.tw
S-ATA PHY
MS-6725D2
Last Revision Date:
Tuesday, December 17, 2002
Sheet
1
32 35
Rev
0A
of
Page 34
LAYOUT: Place on next to
Hammer.
5
BULK / Decopuling
4
3
2
1
SYSTEM
PCB OTHER COMPONENT
CPU
D D
C C
VDD_CORE
C644
X_0.22u/BOT
LAYOUT: Place on inside of processor.
C574
C575
0.22u
C593
0.22u
C1375
10u-1206
C628
X_0.22u/BOT
C576
0.22u
C1376
10u-1206
C629
X_0.22u/BOT
C594
X_0.22u/BOT
C592
X_0.22u/BOT
C1377
10u-1206
C626
X_0.22u/BOT
0.22u
C1378
10u-1206
C627
X_0.22u/BOT
C646
0.22u
C1373
10u-1206/BOT
C1374
10u-1206/BOT
LAYOUT: Place on backside of processor.
+
VCC3_SB
100u-16V
C684
104P
+12V
C662
104P
C685
104P
VDD_CORE
Bulk Decoupling
C679
C678
4.7u/1206
4.7u/1206
B B
VDD_CORE
C768
1000P
C766
1000P
1.2V_HT
C680
4.7u/1206
C35
1000P
C681
4.7u/1206
C765
1000P
C758
4.7u/1206
C767
1000P
C759
4.7u/1206
C757
4.7u/1206
C809
LAYOUT: Place close to Hammer.
LAYOUT: Place close to CK8.
1.2V 1.2V
C614
1000P
VCC3
+
+
EC19
1000u/6.3V
EC20
1000u/6.3V
1.2V_HT 1.2V_HT
1.2V_HT
C580
0.22u
C623
X_1000P/BOT
C658
104P
VCC5_SB
C647
104P
C659
104P
0.22u
C582
VCC3
1.2V_HT
C648
104P
C590
X_1000P/BOT
C661
104P
C808
1000P
PULL-UP RESISTORS
SB Pull up resistors
IRQ14 10,24
IRQ15 10,24
-LPC_REQ 8
SERIRQ 8,25
-PCI_PME 8,18,19,22
SMBCLK2 10,18,19,22,25
SMBDATA2 10,18,19,22,25
SMBCLK1 10,12,13
SMBDATA1 10,12,13
-DEVSEL 8,18,19,22
-TRDY 8,18,19,22
-IRDY 8,18,19,22
-FRAME 8,18,19,22
-SERR 8,18,19,22
-STOP 8,18,19,22
-PERR 8,18,19,22
-PIRQA 8,18,19
-PREQ4 8,22
-PIRQE 8,16
-PIRQB 8,16,18,19
-PIRQC 8,18,19,22
-PIRQD 8,18,19
-PREQ2 8,19
-PREQ1 8,18
-PREQ0 8,18
-PREQ3 8,19
IRQ14
IRQ15
-LPC_REQ
SERIRQ
-PCI_PME
IRQ14
IRQ15
PCI BUS
-DEVSEL
-TRDY
-IRDY
-FRAME
-SERR
-STOP
-PERR
-PIRQA
-PREQ4
-PIRQE
-PIRQB
-PIRQC
-PIRQD
-PREQ2
-PREQ1
-PREQ0
-PREQ3
R577 X_8.2K
R578 X_8.2K
R579 8.2K
R580 10K
R582 8.2K
R1409 10K
R1410 10K
R513 2.7K
R514 2.7K
R515 2.7K
R516 2.7K
RN99
1
1
2
2
3
3
4
4
6
6
7
7
8
8
9
9510
10P8R-8.2K
R501
8.2K
R829
8.2K
7 8
5 6
3 4
1 2
1 2
3 4
5 6
7 8
VCC3
5
10
VCC3
8P4R-8.2K
RN125
VCC
VCC
VCC3
VCC3
VCC3_SB
VCC3_SB
VDD_25_SUS
C572
X_104P
For EMI
RN126
8P4R-8.2K
GND_CP1
6 1
GND_CP2
6 1
GND_CP3
6 1
GND_CP4
6 1
X_BS1
9
2
3 874
5 10
9
2
3 874
5 10
9
2
3 874
5 10
9
2
3 874
5 10
-PREQ5
-PREQ5 8
PAR 8,18,19,22
VDD_CORE
A A
VCC
C872
1000P
VCC3
C874
1000P
5
VCC3
VCC
C871
1000P
VCC3
VCC
C660
1000P
VCC3 VCC3 VCC3
C683
1000P
VCC
VCC VCC VCC
C537
1000P
C532
1000P
CB26
1000P
4
VCC3
VCC
C636
104P
C637
104P
C638
104P
C639
104P
C640
104P
C641
104P
3
-PLOCK 18,19
2
PAR
-PLOCK
R554 8.2K
R571 8.2K
R572 8.2K
M icro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
BULK / Decopuling / PULL_UP
MS-6725D2
Last Revision Date:
Tuesday, December 17, 2002
Sheet
33 35
1
Rev
0A
of
Page 35
5
C1334
390p
VCORE_EN
VID4 5,25
VID3 5,25
VID2 5,25
VID1 5,25
VID0 5,25
R1380 0
R1381 154K
C1344 5600p
C1348 X_22p
R1389 1K
R1390 0
VDD_CORE_EN 7
VDD_PWGD_2 5,30
CHOK1 1.1u-20%
U90
28
VID4
VID3
VID2
VID1
VID0
EN
3
VID4
4
VID3
5
VID2
6
VID1
7
VID0
26
PGOOD
27
FS/DIS
9
COMP
10
FB
12
VDIFF
11 8
IDROOP OFS
ISL6559CB
VDD_CORE_EN
VDD_PWGD_2
C1335
390p
VCC
R1392 2.2K
VCC
5 3
1
2
NC7WZ08
VID4 VID3 VID2 VID1 VID0 Vout
0 1 1 1 0 1.200
0 1 1 0 1 1.225
0 1 1 0 0 1.250
0 1 0 1 1 1.275
0 1 0 1 0 1300
0 1 0 0 1 1.325
0 1 0 0 0 1.350
0 0 1 1 1 1.375
0 0 1 1 0 1.400
0 0 1 0 1 1.425
0 0 1 0 0 1.450
0 0 0 1 1 1.475
0 0 0 1 0 1.500
0 0 0 0 1 1.525
0 0 0 0 0 1.550
1 1 1 1 1 Shutdown
+12V
C1333
104P
VCC
D D
R1377
1K
VDD_CORE_PG 7,28
C C
B B
VDD_CORE_PG
R1383 10K
R1388
X_0
VDD_CORE_PG
C1352
104P
VID4 VID3 VID2 VID1 VID0 Vout
1 1 1 1 0 0.800
1 1 1 0 1 0.825
1 1 1 0 0 0.850
1 1 0 1 1 0.875
1 1 0 1 0 0.900
1 1 0 0 1 0.925
1 1 0 0 0 0.950
1 0 1 1 1 0.975
1 0 1 1 0 1.000
1 0 1 0 1 1.025
A A
1 0 1 0 0 1.050
1 0 0 1 1 1.075
1 0 0 1 0 1.100
1 0 0 0 1 1.125
1 0 0 0 0 1.150
0 1 1 1 1 1.175
5
4
EC51
EC50
820u-25V
820u-25V
R1376 0_0805
VCC+
16
VCC
20
GND
15
GND
1
GND
22
PWM1
ISEN1
PWM2
ISEN2
PWM3
ISEN3
PWM4
ISEN4
RGND
U92
VSEN
OVP
4
R1379 3K_0805
23
21
R1382 3K_0805
19
PWM3
17
18
VCC+
25
24
14
13
2
4
EC52
820u-25V
COREFB 5
COREFB_L 5
VCORE_EN
C1342
105P/0805
ISEN3
EC53
820u-25V
VDD12V
C1336
105P/0805
R1373 5.1_0805
+12V
R1385 5.1_0805 R1384 3K_0805
+12V
R1394 5.1_0805
+12V
3
U89A MOSDVR-HIP6602A-SO14
14
VCC
U_G1
C1341
105P/0805 CHOK2 0.8u-20%
3
1
5 9
C1350
105P/0805
6
2
6
7
C1357
105P/0805
4
PWM3
3
INPUT CAPACITOR SOURCE
1. NCC C94-1521641-N07
2. RUBYCON C94-1521641-R07
3. NICHICON C94-1521641-N10
4. PANASONIC
OUTPUT CAPACITOR SOURCE
1. RUBYCON C94-2220611-R07
2. NCC C94-2220611-N07
3. NICHICON C94-2220611-N10
4. PANASONIC
High Side MOSFET
Main source:
IPB15N03=>D03-15N030B-I14
Second source:
FDB6035AL=>D03-6035ALB-F01
P55N02LS=>D03-55N020B-N03
Low Side MOSFET
Main source:
FDB6670AL=>D03-6670ALB-F01
Second source:
IPB07N03L=> D03-07N031B-I14
SUB85N03-07P=>D03-85N030B-V02
BOOT1
PHASE1
GND
PWM1
L_G1
PVCC U_G2
BOOT2
PHASE2
PGND
PWM2
L_G2
U91
VCC
U_G
BOOT
PVCC
PHASE
GND
PWM
MOSDVR-INTS-HIP6601-SOIC8
L_G
3
12
11
13
4
10
8
7
1
2
8
5
R1374 2.2_0805
R1375 2.2_0805
R1378 0_0805
R1386 2.2_0805
R1387 2.2_0805
R1391 0_0805
R1393 2.2_0805
R1395 2.2_0805
R1397 0_0805
C1340 104P/50V
C1349 104P/50V
C1356 104P/50V
+
EC54
1800u/6.3V
VDD_CORE VDD_CORE VDD_CORE VDD_CORE
+
EC64
1000u/6.3V/8*15mm
2
Q140
IPB15N03L-S-TO263
1000P C1343
Q142
IPB15N03L-S-TO263
1000P C1351
+
EC55
1800u/6.3V
Q144
ISEN3
+
EC56
1800u/6.3V
+
EC65
1000u/6.3V/8*15mm
2
IPB15N03L-S-TO263
1000P C1358
D S
G
D S
Q141
FDB6670AL-S-TO263G
D S
G
D S
Q143
FDB6670AL-S-TO263G
D S
G
D S
Q145
FDB6670AL-S-TO263G
+
EC57
1800u/6.3V
C1338
C1337
104P
105P/0805
C1345
C1346
105P/0805 U89B MOSDVR-HIP6602A-SO14
104P
C1354
C1353
104P
105P/0805
+
EC58
1800u/6.3V
+
EC61
1000u/6.3V/8*15mm
C1339
10u-1206
C1347
10u-1206
C1355
10u-1206
+
EC59
1800u/6.3V
+
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
1
VDD12V
VDD_CORE
VDD12V
CHOK3 0.8u-20%
VDD12V
CHOK4 0.8u-20%
VDD_CORE
+
EC66
1800u/6.3V
EC63
1800u/6.3V
+
EC60
1800u/6.3V
EC62
1000u/6.3V/8*15mm
+
M icro Star Restricted Secret
K8 CORE POWER
MS-6725D2
Last Revision Date:
Tuesday, December 17, 2002
Sheet
34 35
1
of
Rev
0A
Page 36
5
REALTEK 8201BL MII PHY
4
3
2
1
MIITXCLK
R1038
MIIRXCLK
R1039
PWRGD_SB
22
16
15
9
10
GND shielding
18
19
13
12
2
5
11
17
21
23
25
36
R1228 12.1KST
R1229 1.54KST
R1230 2KST
R1231 330
100P C1235
RXIN+ TR_D1+
RXIN-
TXDTXD+
30 mils
C1091
C1092
104P
X_COPPER
CP16
EC49
ELS47U/16V-C
MIITXCLK 10
MIIRXCLK 10
RESET#
100TCSR
10TCRS
10_100SEL
TP_CT
TP_RXP
TP_RXN
TP_TXN
TP_TXP
GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
VDD33
2 1
+
10u-0805
GND
GND
MIITXCLK , MIIRXCLK 14 / 7 / 14
7 / 7
C1101
105p
27
26
39
40
41
42
38
37
32
31
30
29
28
34
43
44
35
47
46
1
3
4
6
8
7
14
20
24
33
45
48
U72
MDC
MDIO
TXD0
TXD1
TXD2
TXD3
TXEN
TXCLK
RXDV
RXD0
RXD1
RXD2
RXD3
RXCLK
COL
CRS
RXER
X1_IN
X2_OUT
AC/PHYAD0
CL/PHYAD1
L1/PHYAD2
TD/PHYAD3
RD/PHYAD4
VDD33_1
VDD33_2
VDD33_3
VDD33_4
VDD33_5
VDD33_6
VDD33_7
ICS1893
D D
R1041 0
BUF_25M 10
10 mils
C1095
X_20P
LILED 22
VDD33
Y4
C1094
X_20P
C C
X_25MHZ
PHY address to 00001b.
MIIMDC 10
MIIMDIO 10
MIITXD0 10
MIITXD1 10
MIITXD2 10
MIITXD3 10
MIITXEN 10
MIIRXDV 10
MIIRXD0 10
MIIRXD1 10
MIIRXD2 10
MIIRXD3 10
MIIRXER 10
VDD33
MIICOL 10
MIICRS 10
R1040 1.5K
MIIMDC
MIIMDIO
MIITXD0
MIITXD1
MIITXD2
MIITXD3
MIITXEN
MIITXCLKR
MIIRXDV
MIIRXD0
MIIRXD1
MIIRXD2
MIIRXD3
MIIRXCLKR
MIICOL
MIICRS
MIIRXER
R1239 330
R1043 5.1K
R1045 5.1K
R1047 5.1K
R1049 5.1K
LILED
LINK1
VDD33
C1100
104P
35 mils
VCC3_SB
B B
FB58
X_80S/0805
22
22
S1000
R1232 0
R1233 0
30 mils
MIITXCLKR
MIIRXCLKR
S1000 22
CT1 22
CT2 22
Place Close To PHY.
PWRGD_SB 10
VDD33
C1236
4.7P
R1227
61.9RST
FB63
120S/0805
R1234
61.9RST
R1240
56.2RST
R1241
56.2RST
24 / 8 / 8 / 8 / 24 / 8 / 8 / 8 / 24
C1237
104P
Place Close To Connetor.
R1235 0
R1236 0
R1237 0
R1238 0
TR_D1-
TR_D0TR_D0+
TR_D1+ 22
TR_D1- 22
TR_D0- 22
TR_D0+ 22
A A
M icro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
ICS LAN PHY
MS-6725D2
Last Revision Date:
Tuesday, December 17, 2002
Sheet
1
35 35
Rev
0A
of