MSI MS-6715 Schematics

1

Cover Sheet
Block Diagram
Revision History 1 - 3
Intel mPGA478B CPU - Signals

1
2

3 - 5

6

VISE (MS-6715)

Intel (R) Springdale (GMCH) + ICH5 Chipset

Version 0A
09/25/2002 Initial

Intel Northwood & Prescott mPGA478B Processor

Intel mPGA478B CPU - Power
Intel Springdale - Host Signals
Intel Springdale - Memory Signals
Intel Springdale - AGP & LDT Signals
Intel ICH5 - PCI & IDE & AC97 Signals
Intel ICH5 - Other Signals
Clock - ICS ICS952606 & FWH & Manual
LPC I/O - LPC47B387
AC97 Audio - AD1981B

A A

Broadcom BCM5702
DDR System Memory 1 & 2
DDR System Memory 3 & 4

7
8
9
10
11
12
13
14
15
16
17
18

CPU:

Intel Northwood/Prescott - 3.0G & Above

System Chipset:

Intel Springdale - GMCH (North Bridge)
Intel ICH5 (South Bridge)

On Board Chipset:

BIOS -- FWH EEPROM
AC'97 Codec -- AD1981B
LPC Super I/O -- LPC47B387
LAN -- CSR Interface
CLOCK -- ICS952606 / CY28405
H/W Monitoring -- ADM1027

AGP 4X/8X Slot & PCI Riser Card
PCI Slots 1 & 2 & 3
ATA33/66/100 IDE & Video Connectors
USB & LAN Connectors
H/W Monitor & FAN
ATX & Front Panel
AGP & MEMORY & USB Regulator Controller
VCC_DAC & VTT Regulator & VR Thermal
VRM 10 - Intersil HIP 6556B + HIP 6602B
PULL UP/ DOWN RESISTORS
GPIO

19
20
21
22
23
24
25
26
27
28
29

Main Memory:

DDR2700 * 4 (Max 4GB)

Expansion Slots:

PCI2.3 SLOT * 3
AGP4X/8X SLOT * 1

Intersil PWM:

Controller: HIP6556B
Driver: HIP6602B * 2

Regulators

System : FAN5236

1

MSI

Title

Size Document Number Rev

Date: Sheet of

MICRO-STAR INt'L CO., LTD.

H/W Project Leader : Andy Chen
H/W Project Engineer : Prudence Wang

COVER SHEET

VISE (MS-6715)

1 30Friday, September 27, 2002

0A

1

VRM 10
Intersil 6556

Intel mPAG478B Processor

Block Diagram

4-Phase PWM

FSB

64bit DDR

133/[email protected]/2.7GB/s

4 DDR
DIMM
Modules

AGP 1.5V
Connector

Analog

133/[email protected]/4.5GB/s

4X/8X w/Fast Write

[email protected]/s

Springdale

Video
Out

HCT

ICH5

Link

PCI CNTRL

PCI ADDR/DATA

33MHz@133MB/s

PCI Slot 1

PCI Slot 2

PCI Slot 3

66MHz@266MB/s

UltraDMA

IDE Primary

IDE Secondary

A A

USB Port 0

33/66/100/133

44.44MHz(W)/50MHz(R)@88.9/100MB/s

USB Port 1

USB Port 2

USB Port 3

USB Port 4

USB

240MHz@60MB/s

LPC Bus

[email protected]/s

LPC SIO

USB Port 5

SMSC
LPC47B387

USB Port 6

USB Port 7

AD1981B

AC'97 Codec

GIGA LAN
BCM5702

AC'97 Link

[email protected]/s

PCI

33MHz@133MB/s

Flash

Keyboard

Mouse

1

Floopy Parallel Serial

MSI

Title

Size Document Number Rev

Date: Sheet of

MICRO-STAR INt'L CO., LTD.

H/W Project Leader : Andy Chen
H/W Project Engineer : Prudence Wang

BLOCK DIAGRAM

VISE (MS-6715)

2 30Friday, September 27, 2002

0A

5

Revision Initial ver: 0AE0 on 07/31/2002

Schematic Initial on July 31.

Revision change list from ver: 0AE0 to ver: 0AE1 on 08/01/2002

Sheet 1: Modify some txts.
Sheet 2: Modify some txts.
Sheet 16: Move Lan connector to page 26.

D D

Sheet 25: Modify some block for customer request, detail list on below:

(1) Modify 5v USB power supplier.
(2) Modify 5V main power circuit.
(3) Modify GMCH VTT voltage supplier.
(4) Add GMCH VTT reference voltage circuit.

Sheet 26: Modify some block for customer request, detail list on below:

(1) Modify 3V standby power supplier.
(2) Change VTT_DDR to LP2995.
(3) Add lan magnetic circuit.
(4) Modify Lan connector.
(5) Add 1.5V standby voltage.

Revision change list from ver: 0AE1 to ver: 0AE2 on 08/09/2002

Sheet 8: Change VTT_FSB to capacitors termination on pin A15 and A21.
Sheet 9: Change VCC_DDR to capacitors termination on pin

C C

E35,E35,AA35,AR21 and AR15.
Sheet 27: Change some bulk caps from 2200uF to 560uF.

Revision change list from ver: 0AE2 to ver: 0AE3 on 08/13/2002

Sheet 12: Modify some block for customer request, detail list on below:

(1) Delete GP14 and GP15 on pin U21 and pin T20 on ICH5.
(2) Add CHASIS_ID2 on pin V3 on ICH5.
(3) Delete USB6+, USB6-, USB7+, and USB7-.
(4) Change FRONT_USB_DET# from pin C13 to pin D13 on ICH5.

Sheet 13: Modify some block for customer request, detail list on below:

(1) Modify clock generator library.
(2) Change PCI clock label.

(3) Add strapping resistors.
Sheet 17: Delete some caps on VCC_DDR.
Sheet 18: Delete some caps on VCC_DDR.

B B

Sheet 19: Delete some AGP termination resistors.
Sheet 20: Change PCI clock label.
Sheet 22: Modify some block for customer request, detail list on below:

(1) Delete 2 ports USB, and one USB power.

(2) Removed LAN connector to here.
Sheet 24: Modify some block for customer request, detail list on below:

(1) Change from GP14 to NC on pin 10 of F_P1.

(2) Change from NC to CHASIS_ID2 on pin 15 of F_P1.

(3) Change from GP15 to CHASIS_ID0 on pin 17 of F_P1.

(4) Change from GND to CHASIS_ID1 on pin 18 of F_P1.

(5) Pull VCC3_SB to pin C13 on ICH5.
Sheet 27: Modify some block for customer request, detail list on below:

(1) Change R473 from 1Kohm to NC.

A A

(2) Change R475 from 0 ohm to NC.

(3) Change some bulk caps from 2200uF to 560uF.
Sheet 28: Delete R89,R90,R91, and R92.

5

4

3

Revision change list from ver: 0AE3 to ver: 0AE4 on 8/14/2002

Sheet 13: Modify clock generator library.
Sheet 14: Modify some block for customer request, detail list on below:

(1) Change SERIAL PORT 2 connector to 10 pin center-keyed shrouded header.
(2) Add TI GD75232.
(3) Change label PS_ON to PS_ON#.

Sheet 15: Modify some block for customer request, detail list on below:

(1) Delete Q7,Q8,Q10,Q11,Q12,Q34.

(2) Modify this page same as reference schematic.
Sheet 17: Exchange pin 103 and pin 167 on DIMM1 and DIMM2.
Sheet 18: Exchange pin 103 and pin 167 on DIMM3 and DIMM4.
Sheet 21: Modify some block for customer request, detail list on below:

(1) Add 33 ohm series resistors on Data 15:0 on Primary IDE.

(2) Add 33 ohm series resistors on Data 15:0 on Secondary IDE.

(3) Delete U12, NC7WZ08.
Sheet 24: Modify some block for customer request, detail list on below:

(1) Delete Q31, R376, R377,and R378.

(2) Change label PS_ON to PS_ON#.

(3) Delete U12, NC7WZ08.
Sheet 25: Change Q25 from 2N3904 to 2N7002.

Revision change list from ver: 0AE4 to ver: 0AE5 on 08/16/2002

Sheet 6: Modify some block for customer request, detail list on below:

(1) All TESTHI pull up resistors change from 51ohm to 62ohm.

(2) Delete OPTIMZ label.
Sheet 7: Modify some block for customer request, detail list on below:

(1) Delete EC1 and EC2.

(2) Change L1 and L2 from 4.7uH to 10uH.
Sheet 8: Modify some block for customer request, detail list on below:

(1) Separate from VCCA_FSB and add 0.1uF cap to GND on pin A31.

(2) Change C225 from 0.22uF to 0.47uF.
Sheet 10: Modify some block for customer request, detail list on below:

(1) Add 2pins header to pin T20.

(2) Change pin D14 and C14 to OC#2 signal.

(3) Change label OC#2 to OC#3.

(4) Change label OC#3 to OC#7.

(5) Add label CI_VREF and CI_SWING to pin AF4 and AF2.

(6) Delete R65 on pin AG10.
Sheet 11: Modify some block for customer request, detail list on below:

(1) Add 0.1uF cap to pin F19.

(2) Add 0.1uF cap to pin Y5, AA4 and AB4.

(3) Add 0.1uF cap to pin F7 and F8.
Sheet 12: Modify some block for customer request, detail list on below:

(1) Change R102 from 0ohm to 10Kohm.
Sheet 13: Modify some block for customer request, detail list on below:

(1) Change R154 and R152 from 300ohm to 330ohm.

(1) Change R151 from 2Kohm to 2.2Kohm.
Sheet 15: Modify some block for customer request, detail list on below:

(1) Add 47ohm resistor to AC_SDIN0.

(2) Change R199 from 10ohm to 47ohm and add 47pF cap.

(3) Change R219 and R209 from 4.7Kohm to 100ohm.

(4) Change R202, R203, R207, R208 from 6.8Kohm to 4.7Kohm.

(5) Add divide 1Kohm pull down resistor to OUT_R and OUT_L signals.

(6) Delete C71.

4

3

2

1

Revision change list from ver: 0AE4 to ver: 0AE5 on 08/16/2002

Sheet 17: Modify some block for customer request, detail list on below:

(1) Add two 75 ohm divide resistors in DDR_VREF.
(2) Change 110ohm to 56ohm on Rterm array resistors.
(3) Add two divide 75ohm resistors pin 1.

Sheet 18: Modify some block for customer request, detail list on below:

(1) Add two 75 ohm divide resistors in DDR_VREF.
(2) Change 110ohm to 56ohm on Rterm array resistors.
(3) Add two divide 75ohm resistors pin 1.

Sheet 20: Modify some block for customer request, detail list on below:

(1) Add 2pins header for support Prochot latch.

Sheet 21: Modify some block for customer request, detail list on below:

(1) Change R299 and R295 from 4.7Kohm to 8.2Kohm.

Sheet 22: Modify some block for customer request, detail list on below:

(1) Add one usb power circuit to seperate port 0,1 and 2,3.
(2) Change R315 and R313 from 21Kohm to 470Kohm.
(3) Change R320 and R319 from 51Kohm to 560Kohm.
(4) Change C134 from 470pF to 1000pF.

Sheet 24: Modify some block for customer request, detail list on below:

(1) Change R380 from 330ohm to 68ohm.

Sheet 27: Modify some block for customer request, detail list on below:

(1) Change CT41-CT44 from 2200uF to 560uF.

Sheet 28: Modify some block for customer request, detail list on below:

(1) Change label OC#3 to OC#7.
(2) Add some divide resistors to CI_VREF and CI_SWING signals.
(3) Change R1 from 100ohm to 200ohm and add a 200ohm resistor pull to VTT voltage.
(4) Delete R14. and ITP_VCC direct connect to Vccp.
(5) Change BPM# from 51ohm to 62ohm.
(6) Change R30 from 220ohm to 200ohm.
(7) Add two 0ohm resistors to support ITP or USB_ITP port.
(6) Change R17 from 27ohm to 47ohm.

Revision change list from ver: 0AE5 to ver: 0AE6 on 08/19/2002

Sheet 25: Modify some block for customer request, detail list on below:

(1) Add 300 ohm resistor from BOOT to VCC_VID and change R423 to 10Kohms.
(2) Change R411 and R415 to 3V_SW_CTRL# signal.

Sheet 27: Modify some block for customer request, detail list on below:

(1) Add Northwood FB network and Prescott FB network to VRM controlled by BOOT.
(2) Change 110ohm to 56ohm on Rterm array resistors.
(3) Change R460,R464,R467,and R470 from 2.83Kohm to 3.3Kohm.

Sheet 28: Add teo 10Kohm pull down resistors to RSMRST# and ICH_GD signals.

Revision change list from ver: 0AE6 to ver: 0AE7 on 08/20/2002

Sheet 13: Modify some block for customer request, detail list on below:

(1) Change R495 from ICHPCLK to LANPCLK signal.
(2) Change R496 from FWHPCLK to PCICLK0 signal.

(3) Change R497 from LANPCLK to PCICLK1 signal.
Sheet 16: Delete CB89,CB90,CB88,CB114, CB117, and CB118.
Sheet 17: Change all component from 0603 to 0402.
Sheet 18: Change all component from 0603 to 0402.

MSI

Title

Size Document Number Rev

2

Date: Sheet of

MICRO-STAR INt'L CO., LTD.

H/W Project Leader : Andy Chen
H/W Project Engineer : Prudence Wang

REVISION HISTORY - 1

VISE (MS-6715)

1

3 30Friday, September 27, 2002

0A

5

Revision change list from ver: 0AE7 to ver: 0AE8 on 08/21/2002

Sheet 7: Change some caps of north side to not install.
Sheet 12: Modify some block for customer request, detail list on below:

(1) Add LPC_DRQ#1 label on pin R2 on ICH5.
(2) Change pin Y12 from INTRUDER# to HOOD_SENSE#.

Sheet 13: Modify some block for customer request, detail list on below:

D D

(1) Remove R143 and R142. Connect FWH RST# signal directly to PCIRST#.
(2) Delete R154,Q5,Q3, and R151.
(3) Change R152 from 330 ohm to 8.2K ohm.
(4) Add one resistor to SEC_PCLK signal and share with SIO_PCLK.
(5) Delete INIT# BLOCK.

Sheet 14: Modify some block for customer request, detail list on below:

(1) Change pin 44 to BRD_V1.
(2) Change pin 45 to MB_ADPT_DET#.
(3) Change pin 47 to SEC_TPM_PRES.
(4) Change pin 49 to MB_ADPT_DET#.
(5) Change pin 54 to FDD_2M.

(6) Add pin 104 to 5V_IN.
Sheet 18: Change all component from 0603 to 0402.
Sheet 20: Modify some block for customer request, detail list on below:

C C

(1) Change TAP resistors from 4.7Kohm to 2.2Kohm.

(2) Add a 2.2Kohm pull down resistor to PCIRST#1.
Sheet 24: Add Security header.
Sheet 25: Change VCC5 & VCC3 Discharge Residual Voltage same as reference schematic.

Revision change list from ver: 0AE8 to ver: 0AE9 on 08/23/2002

Sheet 16: Support BCM4401.
Sheet 20: Modify some block for customer request, detail list on below:

(1) Delete CT17.

(2) Change CT16 from intall to not install.
Sheet 23: Delete CB284 and R324.
Sheet 27: Change R456,R466,R479, and R489 from 1 ohm/1206 to 4.7ohm/0805.

Revision change list from ver: 0AE9 to ver: 0AEA on 08/26/2002

Sheet 11: Change Label from VCC3_SB to 3VSB.
Sheet 13: Modify some block for customer request, detail list on below:

B B

(1) Change Label from PCIRST# to PCIRST_ICH5#.

(2) Change all pull high resistors of clock generator from VCC3V to VCC3.
Sheet 14: Modify some block for customer request, detail list on below:

(1) Change Label from VCC3_SB to 3VSB.

(2) Change pin 45 to GP25 and add a 4.7Kohm resistor to VCC3 on GP25.

(3) Add a label SYSMAG_INT on pin 61.

(4) Change pin 44 to MB_ADPT_DET#.

(5) Change pin 49 to SEC_TPM_PRES.
Sheet 15: Modify some block for customer request, detail list on below:

(1) Delete R514, R515, C81, C86, C88, C89.

(2) Change R211 & R216 to 0 ohm.

(3) Change C82 & C84 to 4.7uF.

(4) Change R209 & R219 to 4.7K.

A A

(5) Add 0.22uF and 4.12K in series to pin1 of Front Audio Header.

(6) Add label bias circuit to pin 3 of Front Audio Header.

(7) Add X_330 ohm from OUT_L to junction of C218 & R504.
Sheet 16: Change Label from VCC3_SB to 3VSB.
Sheet 21: Change Label from VCC3_SB to 3VSB.
Sheet 22: Change Label from VCC3_SB to 3VSB.

5

4

Revision change list from ver: 0AE9 to ver: 0AEA on 08/26/2002

Sheet 23: Modify some block for customer request, detail list on below:

(1) Change H/W monitoring circuit.

(2) Change Fan circuit.
Sheet 24: Change Label from VCC3_SB to 3VSB.
Sheet 25: Change Label from VCC3_SB to 3VSB.
Sheet 26: Change Label from VCC3_SB to 3VSB.
Sheet 27: Change Label from VCC3_SB to 3VSB.
Sheet 28: Change Label from VCC3_SB to 3VSB.

Revision change list from ver: 0AEA to ver: 0AEB on 09/03/2002

Sheet 6: Change CPU Symbol - pin F6=GTLREF3, pin F20=GTLREF2, pin
AA6=GTLREF1, pin AA21=GTLREF0.

Sheet 9: Modify some block for customer request, detail list on below:

(1) Disconnect U28 pin E34 (GMCH) directly to VREF.

(2) Add a 2.2uF cap to this pin E34.
Sheet 13: Modify some block for customer request, detail list on below:

(1) Change R135 & R139 from 1K to 10K.

(2) Add pullup resistor from BSEL0 to VCC3.

(3) Add pullup resistor from BSEL1 to VCC3.
Sheet 21: Change FB16, FB18 & FB20 to be the same as FB17, FB19 & FB21.
Sheet 25: Modify some block for customer request, detail list on below:

(1) Change Q40 & Q41 to Depletion Mode JFETs.

(2) Connect R400 to -12V.

(3) Change R399 to a 39 ohm RNET and connect in parallel to VCC5.

(4) Change R405 to a 39 ohm RNET and connect in parallel to VCC3.

(5) Move R417 from Drain of Q51 to Source.

(6) Change R417 from 150 to 866 ohms.

(7) Change R425 from 150 to 634ohms.

(8) Change R426 from 150 to 499 ohms.
Sheet 28: Change R46 & R50 to 150 ohms 1%.

Revision change list from ver: 0AEB to ver: 0AEC on 09/09/2002

Sheet 7: Delete 0.1uF caps on CPU side.
Sheet 8: Change R41 from 24.9ohm to 20ohm.
Sheet 9: Modify some block for customer request, detail list on below:

(1) Disconnect U2 pin AR31 (GMCH).

(2) Disconnect U2 pin AL35 (GMCH) and add single cap to it.
Sheet 17: Delete decoupling caps between VCC_DDR and VTT_DDR.
Sheet 18: Delete decoupling caps between VCC_DDR and VTT_DDR.
Sheet 21: Change all arrary resistors from 0603 to 0402 on all IDE.
Sheet 22: Add secondary transformer to support 10M and 100M NIC.

Revision change list from ver: 0AEC to ver: 0AED on 09/12/2002

Sheet 6: Modify some block for customer request, detail list on below:

(1) Disconnect CPU1 pin AC3, IERR# signal.

(2) Add a pull down resistor to CPU1 pin AE26, OPTIMIZ signal, and not install.
Sheet 7: Change R36 from 1Kohm to 2.43Kohm.
Sheet 11: Add RN91 to support VCCSUS1_5A,B,C voltage for ICH5.
Sheet 12: Modify some block for customer request, detail list on below:

(1) Change net GPI12 to PS_DETECT.
(2) Add net FAN_CMD to pin U20.
(3) Change net GPI7 to PROC_HOT#.
(4) Change R102 to 390Kohm, not install ,and a resistor to GND.
(5) Delete net RTC_XI.

Sheet 14: Modify some block for customer request, detail list on below:

(1) Change net TRMTRIP# to SIO_TRMTRIP#.

4

(2) Delete R551, and change net 5V_IN to COMM_B_DET#.

3

2

1

Revision change list from ver: 0AEC to ver: 0AED on 09/12/2002

Sheet 14: Modify some block for customer request, detail list on below:

(1) Swap net BRD_V1 and FAN_CLAMP.
(2) Delete R551, and change net 5V_IN to COMM_B_DET#.

Sheet 15: Modify some block for customer request, detail list on below:

(1) Change R196 to 3.3Kohm.
(2) Add a 270pF cap to GND and AGND, not install.
(3) Add a 1uF caps to MONO_L and MONO_L_R.
(4) Add a 1uF caps to MONO_R and MONO_R_R.
(5) Change R501 and R555 to 130ohm.

(6) Change C218 from 4700pF to 0.01uF.
Sheet 17: Change net DDR_VREF to DDR_VREF1.
Sheet 18: Change net DDR_VREF to DDR_VREF2, and add two resistors.
Sheet 23: Modify some block for customer request, detail list on below:

(1) Modify H/W monitoring and FAN controller.

(2) Change U13 pin 22 from VCC_DDR to No Connect.
Sheet 24: Add PROCHOT# LED.
Sheet 25: Modify some block for customer request, detail list on below:

(1) Delete R394 and R401.

(2) Change C166 to 0.01uF.

(3) Change Q38 pin 5 and pin 6 to VCC5_STR.

(4) Change Q39 pin 5 and pin 6 to VCC3.

(5) Change Q38 pin 3 to PHASE_2V5.

(6) Change Q39 pin 3 to PHASE_1V5.

(7) Change DZ5 to VCC5.

(8) Change U15 pin 15 and 16 to VCC5_STR.
Sheet 26: Modify some block for customer request, detail list on below:

(1) Add VR THERMAL BLOCK.

(2) Add ICH5 VCCSUS1_5A, B, and C voltage regulatot to support this version fail

chipset.
Sheet 28: Modify some block for customer request, detail list on below:

(1) Delete R35, IERR#.

(2) Change net GPI12 to PS_DETECT.

(3) Change net GPI7 to PROC_HOT#.

(4) Add Thermtrip Translation Block.

(5) Change RN3 pin 2 to No Connect.

(6) Delete C36, C37, and R100.

(7) Delete net RTC_XI.

Revision change list from ver: 0AED to ver: 0AEE on 09/18/2002

Sheet 11: Change U3 pin A5 from PREQ#A to BRD_ID1. Delete R72.
Sheet 12: Modify some block for customer request, detail list on below:

(1) Change U3 pin G23 from BRD_ID1 to SATALED#.

(2) Change U3 pin U22 from RISER#2 to No Connect.

(3) Change U3 pin T1 from BRD_ID0 to NIC_ENABLE#.

(4) Change U3 pin V2 from SIO_PME# to PCI_PME#.

(5) Change U3 pin F21 from CH_FAN_OVRD to BRD_ID0.
Sheet 13: Change R625 and R626 to 1Kohm.
Sheet 14: Modify some block for customer request, detail list on below:

(1) Change U6 pin 29 from COMM_B_DET# to DDRC and add pull up to VCC3.

(2) Change R191 from 3VSB to VCC3.

MSI

Title

Size Document Number Rev

3

2

Date: Sheet of

MICRO-STAR INt'L CO., LTD.

H/W Project Leader : Andy Chen
H/W Project Engineer : Prudence Wang

REVISION HISTORY - 2

VISE (MS-6715)

4 30Friday, September 27, 2002

1

0A

5

4

3

2

1

Revision change list from ver: 0AED to ver: 0AEE on 09/18/2002

Sheet 14: Modify some block for customer request, detail list on below:

(3) Change U6 pin 8 from PLED to SUSLED.
(4) Change U6 pin 13 from SUSLED to PLED.
(5) Change U6 pin 14 from SIO_PME# to RI#.

D D

(6) Change U5 & U22 from 75232 to TI75185.
Sheet 19: Change U11 pin 55 from RISER#2 to No Connect. Delete R148.
Sheet 21: Modify some block for customer request, detail list on below:

(1) Add 1K pull up from IDEA_RST# to VCC5.

(2) Add 1K pull up from IDEB_RST# to VCC5.
Sheet 22: Delete U32.
Sheet 23: Change CT53 and CT54 to 25V part.
Sheet 25: Change Q51 and Q53 to FDV301N.
Sheet 26: Add U35 for support sata led on front panel.
Sheet 28: Modify some block for customer request, detail list on below:

(1) Add R36 62 ohms from TRMTRIP# to VCCP.

(2) Change R80 from TRMTRIP# to ICH_TRMTRIP#.

Revision change list from ver: 0AEE to ver: 0AEF on 09/22/2002

Sheet 14: Modify some block for customer request, detail list on below:

C C

(1) Change KBGND to GND on COM2.

(2) Delete FB3.

(5) Change U6 pin 14 from SIO_PME# to RI#.

(6) Change U5 & U22 from 75232 to TI75185.
Sheet 19: Change U11 pin 55 from RISER#2 to No Connect. Delete R148.

B B

A A

MSI

Title

Size Document Number Rev

5

4

3

2

Date: Sheet of

MICRO-STAR INt'L CO., LTD.

H/W Project Leader : Andy Chen
H/W Project Engineer : Prudence Wang

REVISION HISTORY - 3

VISE (MS-6715)

5 30Friday, September 27, 2002

1

0A

8

7

6

5

4

3

2

1

VID0

AE5

VID1#

VID0#

LINT0/INTR

D2#

D1#

B22

B21

GTLREF0
GTLREF1
GTLREF2
GTLREF3

BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#

REQ4#
REQ3#
REQ2#
REQ1#
REQ0#

TESTHI12
TESTHI11
TESTHI10

TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0

BCLK1#
BCLK0#

RS2#
RS1#
RS0#

AP1#
AP0#
BR0#

COMP1
COMP0

DP3#
DP2#
DP1#
DP0#

ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#

LINT1/NMI

D0#

PRESCOTT

CRITICAL

ITP_DBR# (28)
VCC_SENSE (27)

VSS_SENSE (27)
VID_GD (7)
VID[0..5] (23,27)

GTLREF

AA21
AA6
F20
F6

BPM#5

AB4

BPM#4

AA5

BPM#3

Y6

BPM#2

AC4

BPM#1

AB5

BPM#0

AC6

HREQ#4

H3

HREQ#3

J3

HREQ#2

J4

HREQ#1

K5

HREQ#0

J1

TESTHI12

AD25

TESTHI11

A6

TESTHI10

Y3

TESTHI9

W4

TESTHI8

U6
AB22
AA20
AC23
AC24
AC20

TESTHI2

AC21

TESTHI1

AA2

TESTHI0

AD24
AF23

AF22

HRS#2

F4

HRS#1

G5

HRS#0

F1
V5

AC1
H6

COMP1

P1

COMP0

L24
L25

K26
K25
J26

R5
L5
W23
P23
J23
F21
W22
R22
K22
E22

E5
D1

GTLREF (8,28)

C1 220p_X7R

16V

BPM#5 (28)
BPM#4 (28)
BPM#3 (28)
BPM#2 (28)
BPM#1 (28)
BPM#0 (28)

R3 62
R4 62
R5 62
R6 62
R7 62

R9 62
R624 62
R10 62

CPU_CLK# (13)
CPU_CLK (13)

HBR#0 (8,28)

R13 61.9RST
R15 61.9RST

HADSTB#1 (8)
HADSTB#0 (8)
HDSTBP#3 (8)
HDSTBP#2 (8)
HDSTBP#1 (8)
HDSTBP#0 (8)
HDSTBN#3 (8)
HDSTBN#2 (8)
HDSTBN#1 (8)
HDSTBN#0 (8)

NMI (12)
INTR (12)

HREQ#[0..4] (8)

VCCP

HRS#[0..2] (8)

CPU SIGNAL BLOCK

HA#[3..31](8)

D D

HA#31

HA#25

HA#26

HA#28

HA#30

HA#27

HA#29

CPU1A

HDBI#[0..3](8)

FERR#(12)

STPCLK#(12)

HDBI#0
HDBI#1
HDBI#2
HDBI#3

HINIT#(12)

HDBSY#(8)

HDRDY#(8)

HTRDY#(8)

HADS#(8)

HDEFER#(8)

ITP_TRST#(28)

THERMDP#(23)

THERMDN#(23)

TRMTRIP#(23,28)

SKTOCC#(14)

PROCHOT#(8,23,24)

HLOCK#(8)

HBNR#(8)

HIT#(8)

HITM#(8)

HBPRI#(8)

ITP_TDI(28)
ITP_TDO(28)
ITP_TMS(28)

ITP_TCK(28)

IGNNE#(12)

SMI#(12)

A20M#(12)

SLP#(12)

BOOT(25,27)

R627 X_0

BSEL0(8,13)
BSEL1(8,13)

OPTIMIZ

C C

B B

CPU_GD(12,28)

CPURST#(8,28)

HD#[0..63](8)

HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54

E21

DBI0#

G25

DBI1#

P26

DBI2#

V21

DBI3#

AC3

IERR#

V6

MCERR#

B6

FERR#

Y4

STPCLK#

AA3

BINIT#

W5

INIT#

AB2

RSP#

H5

DBSY#

H2

DRDY#

J6

TRDY#

G1

ADS#

G4

LOCK#

G2

BNR#

F3

HIT#

E3

HITM#

D2

BPRI#

E2

DEFER#

C1

TDI

D5

TDO

F7

TMS

E6

TRST#

D4

TCK

B3

THERMDA

C4

THERMDC

A2

THERMTRIP#

AF26

GND/SKTOCC#

C3

PROCHOT#

B2

IGNNE#

B5

SMI#

C6

A20M#

AB26

SLP#

A22

RESERVED0

A7

RESERVED1

AE21

RESERVED2

AF24

RESERVED3

AF25

RESERVED4

AD1

BOOTSELECT

AE26

OPTIMIZED/COMPAT#

AD6

BSEL0

AD5

BSEL1

AB23

PWRGOOD

AB25

RESET#

AA24

D63#

AA22

D62#

AA25

D61#

Y21

D60#

Y24

D59#

Y23

D58#

W25

D57#

Y26

D56#

W26

D55#

V24

D54#

AB1Y1W2V3U4T5W1R6V2T4U3P6U1T2R3P4P3R2T1N5N4N2M1N1M4M3L2M6L3K1L6K4K2

A35#

A34#

A33#

A32#

A31#

A30#

A29#

A28#

A27#

A26#

A25#

D53#

D52#

D51#

D50#

D49#

D48#

D47#

D46#

D45#

D44#

D43#

D42#

D41#

D40#

V22

U21

V25

U23

U24

U26

T23

T22

T25

T26

R24

R25

P24

R21

HA#23

HA#24

A24#

D39#

N25

N26

HA#22

A23#

D38#

M26

HA#21

A22#

D37#

N23

HA#20

A21#

D36#

M24

HA#19

A20#

D35#

P21

HA#18

A19#

D34#

N22

HA#17

A18#

D33#

M23

HA#16

A17#

D32#

H25

HA#15

A16#

D31#

K23

HA#14

A15#

D30#

J24

HA#13

A14#

D29#

L22

HA#12

A13#

D28#

M21

HA#11

A12#

D27#

H24

HA#10

A11#

D26#

G26

HA#9

A10#

D25#

L21

HA#8

A9#

D24#

D26

HA#7

A8#

D23#

F26

HA#6

A7#

D22#

E25

A6#

D21#

HA#5

A5#

D20#

F24

HA#4

F23

HA#3

A4#

D19#

G23

A3#

D18#

E24

D17#

H22

AE25A5A4

DBR#

D16#

D15#

D25

J21

VSS_SENSE

VCC_SENSE

D14#

D13#

D12#

D23

C26

H21

AD26

AC26

ITP_CLK1

D11#

D10#

G22

B25

VID5

AD2

AD3

ITP_CLK0

VIDPWRGD

D9#

D8#

D7#

C24

C23

B24

VID4

AE1

VID5#

D6#

D22

VID3

AE2

VID4#

D5#

C21

VID2

AE3

VID3#

D4#

A25

VID1

AE4

VID2#

D3#

A23

HD#47

HD#48

HD#45

HD#46

HD#44

HD#43

6

HD#42

HD#41

HD#40

HD#39

HD#38

HD#37

HD#52

HD#53

HD#50

HD#49

A A

8

7

HD#51

HD#36

HD#34

HD#35

HD#33

HD#32

HD#30

HD#31

HD#29

HD#28

HD#27

HD#26

HD#25

5

HD#23

HD#24

HD#21

HD#22

HD#20

HD#19

HD#18

HD#17

HD#16

HD#15

HD#14

HD#13

HD#12

HD#10

HD#11

HD#9

HD#8

HD#7

HD#6

4

HD#5

HD#4

HD#3

HD#2

HD#1

HD#0

MSI

Title

Size Document Number Rev

3

Date: Sheet of

MICRO-STAR INt'L CO., LTD.

H/W Project Leader : Andy Chen
H/W Project Engineer : Prudence Wang

Intel mPGA478B - Signals

VISE (MS-6715)

2

6 30Tuesday, October 01, 2002

0A

1

8

7

6

5

4

3

2

1

AF4

VSS

H26H4J2

AF3

VCC-VID

VCC-VIDPRG

VSS

VSS

VSS

J22

AD20

VCC-IOPLL

VSS

VSS

J25J5K21

1.2V 150mA
VCC_VID

CPU_IOPLL

AE23

VCCA

VSSA

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS

PRESCOTT

CRITICAL

AD22

Y5
Y25
Y22
Y2
W6
W3
W24
W21
V4
V26
V23
V1
U5
U25
U22
U2
T6
T3
T24
T21
R4
R26
R23
R1
P5
P25
P22
P2
N6
N3
N24
N21
M5
M25
M22
M2
L4
L26
L23
L1
K6
K3
K24

EC3
22u-1206_X5R

16V

VSSA

It must close bulk caps.

It support DC current if 100mA.

L1 10uH-0805-100mA
L2 10uH-0805-100mA

DC voltage drop should

EC4

be less than 70mV.

10u-1206_Y5V

10V

VCCP

U1

VID_GD(6,13)

AF7

AF9

VCC

VCC

VSS

VSS

D14

D16

VIDGD rising time is 150ns.VID to VIDGD deassertion time is 1ms for max.

B11

B13

B15

B17

VCC

VCC

VCC

VCC

VSS

VSS

VSS

VSS

D18

D20

D21D3D24D6D8E1E11

1

VIN

3
2

GNDENPOK

SN105125-150mA

CRITICAL

B19B7B9

VCC

VCC

VSS

VSS

VCC3

AE20

VCC

VSS

C13

AE6

C15

AE8

VCC

VSS

C17C2C19

VCC

VSS

AF11

VCC

VSS

AF13

AF15

VCC

VSS

C22

CB336 0.1u_Y5V

AF17

AF19

AF2

AF21

AF5

VCC

VCC

VCC

VCC

VCC

VCC

VSS

VSS

VSS

VSS

VSS

VSS

C25C5C7C9D12

CPU VOLTAGE BLOCK

VID Voltage is from 1.14V to 1.32V.
It is derived from 3.3V.

D D

VCCP

A10

A12

A14

A16

A18

A20A8AA10

AA12

AA14

AA16

AA18

AA8

AB11

AB13

AB15

AB17

AB19

AB7

AB9

AC10

VCC

VSS

AE24

AE7

VCC

VSS

AE9

VCC

VSS

AC12

VCC

VCC

VCC

VCC

VSS

VSS

VSS

VSS

AF1

AF10

AF12

AF14

CPU1B

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VSS

VSS

AE11

VSS

AE13

VSS

AE15

VSS

AE17

VSS

AE19

VCC

VSS

AE22

D10

VSS

A11

VSS

A13

VSS

A15

VSS

A17

VSS

A19

VSS

A21

VSS

A24

VSS

A26

VSS

A3

VSS

A9

VSS

AA1

VSS

AA11

VSS

AA13

VSS

AA15

VSS

AA17

VSS

C C

B B

AA19
AA23
AA26

AA4
AA7

AA9
AB10
AB12
AB14
AB16
AB18
AB20
AB21
AB24

AB3

AB6

AB8
AC11
AC13
AC15
AC17
AC19

AC2
AC22
AC25

AC5

AC7

AC9

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS

AD10

VSS

AD12

VSS

AD14

VSS

AD16

VSS

AD18

VSS

AD21

VSS

AD23

AD4

VSS

AD8

It should be able to source 150mA.
It drives the power logic of BSEL[1:0] and VID[5:0]. It must rout to the enable pin of PWM and CK-409.
VID to VIDGD delay time is from 1ms to 10ms. VIDGD to Vccp delay time is from 1ms to 10ms.

AC14

AC16

AC18

AC8

AD11

AD13

AD15

AD17

AD19

AD7

AD9

AE10

AE12

AE14

AE16

AE18

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AF16

AF18

AF20

AF6

AF8

B10

B12

B14

B16

B18

B23

B20

B26B4B8

C11

VCC

VSS

5

VOUT

4

C10

C12

C14

C16

C18

C20C8D11

D13

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

E13

E15

E17

E19

E23

E4

E26

R36

2.43KST

D15

D17

VCC

VCC

VSS

VSS

E7E9F10

D19D7D9

VCC

VSS

F12

VCC

VSS

VCC

VSS

F14

VCC_VID

C4
1u-0805_Y5V

E10

E12

E14

VCC

VCC

VCC

VSS

VSS

VSS

F16

F18F2F22

E16

E18

VCC

VSS

F25F5F8

E20E8F11

VCC

VCC

VSS

VSS

VCC

VSS

F13

VCC

VSS

G21G6G24

Near processorNear regulator

F15

F17

VCC

VCC

VCC

VSS

VSS

VSS

G3H1H23

C5

0.1u_Y5V

F19

F9

VCC

VCC

VSS

VSS

CPU DECOUPLING CAPACITORS

VCCP

EC36
22u-1206_X5R
EC29
22u-1206_X5R
EC28
22u-1206_X5R
EC43
22u-1206_X5R
EC38

A A

22u-1206_X5R
EC17
22u-1206_X5R

VCCP VCCP VCCP VCCP VCCP VCCP

EC35
22u-1206_X5R
EC21
22u-1206_X5R
EC8
22u-1206_X5R
EC42
22u-1206_X5R
EC39
22u-1206_X5R
EC16
22u-1206_X5R

Place these caps within socket cavity Place these caps within south side of processor

8

VCCP VCCP

EC31
X_22u-1206_X5R
EC7
X_22u-1206_X5R
EC9
X_22u-1206_X5R

EC44
22u-1206_X5R
EC24
22u-1206_X5R
EC22
22u-1206_X5R
EC14
22u-1206_X5R
EC6
22u-1206_X5R
EC13
22u-1206_X5R

Place these caps within north side of processor

7

6

EC15
X_22u-1206_X5R
EC30
X_22u-1206_X5R
EC32
X_22u-1206_X5R
EC23
X_22u-1206_X5R
EC5
X_22u-1206_X5R

5

EC49
X_22u-1206_X5R
EC38
X_22u-1206_X5R
EC25
X_22u-1206_X5R
EC37
X_22u-1206_X5R
EC46
X_22u-1206_X5R

4

EC10
X_22u-1206_X5R
EC18
X_22u-1206_X5R
EC26
X_22u-1206_X5R
EC33
X_22u-1206_X5R
EC40
X_22u-1206_X5R

EC11
X_22u-1206_X5R
EC19
X_22u-1206_X5R
EC27
X_22u-1206_X5R
EC34
X_22u-1206_X5R
EC41
X_22u-1206_X5R

3

Title

Size Document Number Rev

Date: Sheet of

820u/2.5V properly in further

Solder side

MSI

MICRO-STAR INt'L CO., LTD.

2

+

EC12
150u-2.5V

CRITICAL

+

EC20
150u-2.5V

CRITICAL

H/W Project Leader : Andy Chen
H/W Project Engineer : Prudence Wang

Intel mPGA478B - Power

VISE (MS-6715)

7 30Tuesday, October 01, 2002

1

0A

8

VCCA_FSB(28)

VCCA_DPLL(28)

HA#[3..31](6)

D D

C C

HADSTB#0(6)
HADSTB#1(6)

HBR#0(6,28)

HBPRI#(6)

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

HBNR#(6)

HLOCK#(6)

HADS#(6)

HREQ#[0..4](6)

HIT#(6)

HITM#(6)

HDEFER#(6)

HTRDY#(6)
HDBSY#(6)

HDRDY#(6)

HRS#[0..2](6)

B B

MCH_CLK(13)

MCH_CLK#(13)

PWRGDA(14)

CPURST#(6,28)

PCIRST_ICH5#(11)

PROCHOT#(6,26,28)

R37 2.49KST

BSEL0(6)
BSEL1(6)

R38 2KST
R39 2KST
R40 2.49KST
R41 20RST

HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4

HRS#0
HRS#1
HRS#2

ICH_SYNC#

SEL0
SEL1

HRCOMP

AE14

HSWING(28)

GTLREF(6,28)

220p_X7R

C6

VCCA_FSB

C224 0.1u_Y5V

VCCA_DPLL

U2A

D26

HA3#

D30

HA4#

L23

HA5#

E29

HA6#

B32

HA7#

K23

HA8#

C30

HA9#

C31

HA10#

J25

HA11#

B31

HA12#

E30

HA13#

B33

HA14#

J24

HA15#

F25

HA16#

D34

HA17#

C32

HA18#

F28

HA19#

C34

HA20#

J27

HA21#

G27

HA22#

F29

HA23#

E28

HA24#

H27

HA25#

K24

HA26#

E32

HA27#

F31

HA28#

G30

HA29#

J26

HA30#

G26

HA31#

B30

HAD_STB0#

D28

HAD_STB1#

B24

BREQ0#

B26

BPRI#

B28

BNR#

E25

HLOCK#

F27

ADS#

B29

HREQ0#

J23

HREQ1#

L22

HREQ2#

C29

HREQ3#

J21

HREQ4#

K21

HIT#

E23

HITM#

L21

DEFER#

D24

HTRDY#

E27

DBSY#

G24

DRDY#

G22

RS0#

C27

RS1#

B27

RS2#

B7

HCLKP

C7

HCLKN
PWROK

E8

CPURST#

AK4

RSTIN#

AJ8

ICH_SYNC#

L20

PROCHOT#

L13

BSEL0

L12

BSEL1

E24

HDRCOMP

C25

HDSWING

F23

HDVREF

7

B3

VCCA_DPLL

A31

B4

J6J7J8J9K6K7K8K9L6L7L9

VCC

VCCA_FSB

VCCA_FSB

VSS

VSS

VSS

VSS

VSS

C12

C14

C16

C18

C10

C8

VCC

VSS

6

VCC_AGP VTT

N11N9P10

P11

R11

T16

T17

N10

M10

M11M8M9

L10

L11

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

C20

C22

C24

C26

C28D1D11

D13

D15

D17

D9

VCC

VSS

VCC

VCC

VCC

VCC

VCC

VSS

VSS

VSS

VSS

VSS

VSS

D19

D21

D23

D25

D27

D29

T18

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VSS

VSS

VSS

VSS

VSS

VSS

VSS

D31

D33

D35

F3F5F8

E3

F1

E1

5

T19

U16

U17

U20

V16

V18

V20

W16

W19

W20

Y16

Y17

Y18

Y19

Y20

A3

A33

VCC

VCC

VSS

VSS

F24

F26

G28

NCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNC

VCC

VCC

VCC

VCC

VCC

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

G31

G35

H12

H5

H8

H9

VCC

VSS

T20

VCC

VCC

VCC

VCC

VCC

VCC

VSS

VCC

VSS

VSS

VSS

VSS

VSS

VSS

F18

F20

F22

F14

F16

F12

VCC

VSS

F10

A35B2B25

VSS

VSS

H14

H16H2H20

VSS

H18

B34C1C23

VSS

VSS

H22

4

C35

E26

M31

AF13

AF23

AJ12

AN1

AP2

AR3

AR33

R25

AR35

NC

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

H24

H26

H30

H33

J10

J12

J14

J16

J18

J20

J22

J28

J32

J35

A7A9A11

VSS

VSS

VSS

VSS

K11

K12

3

D5D6D7E6E7

A13

A16

A20

A23

A25

A27

A29

A32

C4

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

K14

K16

K18

K33

K20

K22

K25

K27

K29

L24

F7

VTT

VTT

VTT

VTT

VTT

VTT

VSS

VSS

VSS

VSS

VSS

VSS

VSS

M3M6M26

L25

L26

L35

L31

A4A5A6B5B6C5C6

VTT

VTT

VTT

VTT

VTT

VTT

VSS

VSS

VSS

VSS

VSS

VSS

M27

M28

M30

M33N1N4

2

VTT_FSB1
VTT_FSB2

A15

A21

HD0#

VTT

HD1#
HD2#
HD3#

VTT_FSB

VTT_FSB

HD4#
HD5#
HD6#
HD7#
HD8#

HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#

DINV_0#
DINV_1#
DINV_2#
DINV_3#

HD_STBP0#
HD_STBN0#

HD_STBP1#
HD_STBN1#

HD_STBP2#
HD_STBN2#

HD_STBP3#
HD_STBN3#

Intel Springdale

CRITICAL

B23
E22
B21
D20
B22
D22
B20
C21
E18
E20
B16
D16
B18
B17
E16
D18
G20
F17
E19
F19
J17
L18
G16
G18
F21
F15
E15
E21
J19
G14
E17
K17
J15
L16
J13
F13
F11
E13
K15
G12
G10
L15
E11
K13
J11
H10
G8
E9
B13
E14
B14
B12
B15
D14
C13
B11
D10
C11
E10
B10
C9
B9
D8
B8

C17
L17
L14
C15

B19
C19

L19
K19

G9
F9

D12
E12

C225 0.47u_Y5V
C226 0.47u_Y5V

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

HDBI#0
HDBI#1
HDBI#2
HDBI#3

1

{VOLTAGE}

HD#[0..63] (6)

HDBI#[0..3] (6)

HDSTBP#0 (6)
HDSTBN#0 (6)

HDSTBP#1 (6)
HDSTBN#1 (6)

HDSTBP#2 (6)
HDSTBN#2 (6)

HDSTBP#3 (6)
HDSTBN#3 (6)

A A

PWRGDA(14)

8

PWRGDA
ICH_SYNC#

VCC3

53

1

4

2

U28

X_NC7WZ08

7

ICH_GD (12)

6

PWRGDA ICH_GD

R526 0

5

4

3

MSI

Title

Size Document Number Rev

Date: Sheet of

MICRO-STAR INt'L CO., LTD.

H/W Project Leader : Andy Chen
H/W Project Engineer : Prudence Wang

Intel Springdale - CPU Signals

VISE (MS-6715)

2

8 30Friday, September 27, 2002

0A

1

8

MCS_A#0(17)
MCS_A#1(17)

D D

MCS_A#2(17)
MCS_A#3(17)

MRAS_A#(17)
MCAS_A#(17)

MWE_A#(17)

MA_A[0..12](17)

MAB_A[1..5](17)

C C

MBA_A0(17)
MBA_A1(17)

MDQM_A[0..7](17)

MDQS_A[0..7](17)

MCLK_A0(17)

MCLK_A#0(17)

MCLK_A1(17)

B B

MCLK_A#1(17)

MCLK_A2(17)

MCLK_A#2(17)

MCLK_A3(17)

MCLK_A#3(17)

MCLK_A4(17)

MCLK_A#4(17)

MCLK_A5(17)

MCLK_A#5(17)

0.01u_Y5VC12

0.01u_Y5VC15

0.01u_Y5VC16

0.01u_Y5VC18

C256 2.2u_Y5V

{VOLTAGE}

C227 0.47u_Y5V
C228 0.22u_Y5V
C229 0.1u_Y5V

8

C230 0.22u_Y5V
C231 0.1u_Y5V

A A

MDQ_A[0..63](17) MCKE_A[0..3] (17)

AA34

AC33

AB34

MA_A0

AJ34

MA_A1

AL33

MA_A2

AK29

MA_A3

AN31

MA_A4

AL30

MA_A5

AL26

MA_A6

AL28

MA_A7

AN25

MA_A8

AP26

MA_A9

AP24

MA_A10

AJ33

MA_A11

AN23

MA_A12

AN21

MAB_A1

AL34

MAB_A2

AM34

MAB_A3

AP32

MAB_A4

AP31

MAB_A5

AM26
AE33

AH34

MDQM_A0

AP12

MDQM_A1

AP16

MDQM_A2

AM24

MDQM_A3

AP30

MDQM_A4

AF31

MDQM_A5

W33

MDQM_A6
MDQM_A7

MDQS_A0

AN11

MDQS_A1

AP15

MDQS_A2

AP23

MDQS_A3

AM30

MDQS_A4

AF34

MDQS_A5
MDQS_A6
MDQS_A7

AK32
AK31

AP17
AN17

AK33
AK34

AM16

AL16

XRCOMP
XCOMPH

XCOMPL
SMVREF

XRCOMP(28)
XCOMPH(28)
XCOMPL(28)

VREF(28)

VCC_DDR_C2(28)
VCC_DDR_C3(28)

U2B

SCS_A0#

Y31

SCS_A1#

Y32

SCS_A2#

W34

SCS_A3#
SRAS_A#

Y34

SCAS_A#
SWE_A#

SMAA_A0
SMAA_A1
SMAA_A2
SMAA_A3
SMAA_A4
SMAA_A5
SMAA_A6
SMAA_A7
SMAA_A8
SMAA_A9
SMAA_A10
SMAA_A11
SMAA_A12

SMAB_A1
SMAB_A2
SMAB_A3
SMAB_A4
SMAB_A5

SBA_A0
SBA_A1

SDM_A0
SDM_A1
SDM_A2
SDM_A3
SDM_A4
SDM_A5

M34

SDM_A6

H32

SDM_A7
SDQS_A0

SDQS_A1
SDQS_A2
SDQS_A3
SDQS_A4

V34

SDQS_A5

M32

SDQS_A6

H31

SDQS_A7

SMDCLK_A0
SMDCLK_A0#

SMDCLK_A1
SMDCLK_A1#

N33

SMDCLK_A2

N34

SMDCLK_A2#
SMDCLK_A3

SMDCLK_A3#
SMDCLK_A4

SMDCLK_A4#

P31

SMDCLK_A5

P32

SMDCLK_A5#

AK9

SMXRCOMP

AN9

SMXCOMPVOH

AL9

SMXCOMPVOL

E34

SMVREF_A

VCC_DDR_C1
VCC_DDR_C2
VCC_DDR_C3
VCC_DDR_C4
VCC_DDR_C5

7

MDQ_A3

MDQ_A2

MDQ_A1

AP11

AM12

AN13

SDQ_A1

SDQ_A2

VCC_DDR

VCC_DDR

E35

AA35

R35

MDQ_A4

MDQ_A5

MDQ_A6

AM10

AL10

AL12

SDQ_A3

SDQ_A4

SDQ_A5

VCC_DDR

VCC_DDR

VCC_DDR

AR15

AR21

AL6

MDQ_A7

MDQ_A9

MDQ_A8

AP13

AP14

AM14

SDQ_A6

SDQ_A7

SDQ_A8

VCC_DDR

VCC_DDR

VCC_DDR

AM1

AM2

AL7

SDQ_A9

VCC_DDR

MDQ_A0

AP10

SDQ_A0

7

MDQ_A12

MDQ_A10

MDQ_A11

AL18

AP19

AL14

SDQ_A10

SDQ_A11

VCC_DDR

VCC_DDR

AN8

AP3

AP4

VCC_DDR

MDQ_B[0..63](18)

MDQ_A13

MDQ_A14

MDQ_A15

AN15

AP18

AM18

SDQ_A12

SDQ_A13

SDQ_A14

VCC_DDR

VCC_DDR

VCC_DDR

AP5

AP6

AP7

6

MDQ_A16

MDQ_A17

MDQ_A18

AP22

AM22

AL24

SDQ_A15

SDQ_A16

SDQ_A17

VCC_DDR

VCC_DDR

VCC_DDR

AR4

AR5

AR7

6

MDQ_A19

MDQ_A21

MDQ_A20

AN27

AP21

AL22

SDQ_A18

SDQ_A19

SDQ_A20

VCC_DDR

VCC_DDR

AR31

AJ10

MDQ_B0

MDQ_A23

MDQ_A22

AP25

AP27

SDQ_A21

SDQ_A22

SDQ_A23

SDQ_B0

SDQ_B1

SDQ_B2

AE15

AL11

MDQ_B2

MDQ_B1

MDQ_A25

MDQ_A24

MDQ_A26

AP28

AP29

AP33

SDQ_A24

SDQ_A25

SDQ_B3

SDQ_B4

AE16

AL8

AF12

MDQ_B3

MDQ_B5

MDQ_B4

MDQ_A28

MDQ_A27

AM33

AM28

SDQ_A26

SDQ_A27

SDQ_A28

SDQ_B5

SDQ_B6

SDQ_B7

AK11

AG12

MDQ_B6

MDQ_B7

MDQ_A30

MDQ_A31

MDQ_A29

AN29

AM31

AN34

SDQ_A29

SDQ_A30

SDQ_B8

SDQ_B9

AE17

AL13

AK17

MDQ_B8

MDQ_B9

MDQ_B10

MDQ_A32

MDQ_A33

AH32

AG34

SDQ_A31

SDQ_A32

SDQ_A33

SDQ_B10

SDQ_B11

SDQ_B12

AL17

AK13

MDQ_B12

MDQ_B11

5

MDQ_A35

MDQ_A36

MDQ_A34

AF32

AD32

AH31

SDQ_A34

SDQ_A35

SDQ_B13

SDQ_B14

AJ14

AJ16

AJ18

MDQ_B15

MDQ_B14

MDQ_B13

5

MDQ_A38

MDQ_A37

AG33

AE34

SDQ_A36

SDQ_A37

SDQ_A38

SDQ_B15

SDQ_B16

SDQ_B17

AE19

AE20

MDQ_B17

MDQ_B16

MDQ_A41

MDQ_A40

MDQ_A39

AD34

AC34

AB31

SDQ_A39

SDQ_A40

SDQ_B18

SDQ_B19

AG23

AK23

AL19

MDQ_B18

MDQ_B20

MDQ_B19

MDQ_A42

MDQ_A43

V32

V31

SDQ_A41

SDQ_A42

SDQ_A43

SDQ_B20

SDQ_B21

SDQ_B22

AK21

AJ24

MDQ_B22

MDQ_B21

MDQ_A45

MDQ_A46

MDQ_A44

AD31

AB32

U34

SDQ_A44

SDQ_A45

SDQ_B23

SDQ_B24

AE22

AK25

AH26

MDQ_B24

MDQ_B23

MDQ_B25

MDQ_A47

MDQ_A48

U33

T34

SDQ_A46

SDQ_A47

SDQ_A48

SDQ_B25

SDQ_B26

SDQ_B27

AG27

AF27

MDQ_B27

MDQ_B26

MDQ_A50

MDQ_A51

MDQ_A49

T32

K34

K32

SDQ_A49

SDQ_A50

SDQ_B28

SDQ_B29

AJ26

AJ27

AD25

MDQ_B30

MDQ_B28

MDQ_B29

MDQ_A53

MDQ_A52

T31

P34

SDQ_A51

SDQ_A52

SDQ_A53

SDQ_B30

SDQ_B31

SDQ_B32

AF28

AE30

MDQ_B32

MDQ_B31

4

MDQ_A55

MDQ_A56

MDQ_A54

L34

L33

J33

SDQ_A54

SDQ_A55

SDQ_B33

SDQ_B34

AC27

AC30

Y29

MDQ_B35

MDQ_B33

MDQ_B34

4

MDQ_A57

MDQ_A58

H34

E33

SDQ_A56

SDQ_A57

SDQ_A58

SDQ_B35

SDQ_B36

SDQ_B37

AE31

AB29

MDQ_B37

MDQ_B36

MDQ_A61

MDQ_A59

MDQ_A60

F33

K31

J34

SDQ_A59

SDQ_A60

SDQ_B38

SDQ_B39

AA26

AA27

AA30

MDQ_B40

MDQ_B39

MDQ_B38

MDQ_A63

MDQ_A62

G34

F34

SDQ_A61

SDQ_A62

SDQ_A63

SDQ_B40

SDQ_B41

SDQ_B42

W30

U27

MDQ_B41

MDQ_B42

MCKE_A1

MCKE_A0

AL20

AN19

SCKE_A0

SCKE_A1

SDQ_B43

SDQ_B44

SDQ_B45

T25

AA31

V29

MDQ_B43

MDQ_B44

MDQ_B45

MCKE_A2

MCKE_A3

AM20

AP20

SCKE_A2

SCKE_A3

SDQ_B46

SDQ_B47

SDQ_B48

U25

R27

P29

MDQ_B48

MDQ_B47

MDQ_B46

AC26

AB25

AC25

VCCA_DDR

VCCA_DDR

VCCA_DDR

SDQ_B49

SDQ_B50

SDQ_B51

R30

K28

L30

MDQ_B49

MDQ_B51

MDQ_B50

3

VCCA_DDR

C20 0.1u_Y5V

VCCADDR

AN4

AM3

AN5

AL35

VCC_DDR

VCC_DDR

VCC_DDR

VCCA_DDR

SDQ_B52

SDQ_B53

SDQ_B54

SDQ_B55

SDQ_B56

R31

R26

P25

L32

K30

MDQ_B53

MDQ_B56

MDQ_B55

MDQ_B52

MDQ_B54

3

AM5

AM6

AM7

VCC_DDR

VCC_DDR

VCC_DDR

SDQ_B57

SDQ_B58

SDQ_B59

H29

F32

G33

MDQ_B58

MDQ_B57

MDQ_B59

2

VCCA_DDR (28)

VCC_DDR

Its current is 5.1A.

AM8

AN2

AN6

AN7

P3P6P8

N35

VCC_DDR

VCC_DDR

SDQ_B60

SDQ_B61

N25

M25

J29

MDQ_B62

MDQ_B61

MDQ_B60

N32

VCC_DDR

VCC_DDR

SDQ_B62

SDQ_B63

G32

AK19

MDQ_B63

MCKE_B0

VSS

VSS

VSS

SCKE_B0

SCKE_B1

SCKE_B2

AF19

AG19

MCKE_B2

MCKE_B1

VSS

SCMDCLK_B0

SCMDCLK_B0#

SCMDCLK_B1

SCMDCLK_B1#

SCMDCLK_B2

SCMDCLK_B2#

SCMDCLK_B3

SCMDCLK_B3#

SCMDCLK_B4

SCMDCLK_B4#

SCMDCLK_B5

SCMDCLK_B5#

SMYRCOMP

SMYCOMPVOH
SMYCOMPVOL

SCKE_B3

Intel Springdale

AE18

CRITICAL

MCKE_B3

SCS_B0#

VSS

SCS_B1#
SCS_B2#
SCS_B3#

SRAS_B#
SCAS_B#

SWE_B#

SMAA_B0
SMAA_B1
SMAA_B2
SMAA_B3
SMAA_B4
SMAA_B5
SMAA_B6
SMAA_B7
SMAA_B8

SMAA_B9
SMAA_B10
SMAA_B11
SMAA_B12

SMAB_B1

SMAB_B2

SMAB_B3

SMAB_B4

SMAB_B5

SBA_B0
SBA_B1

SDM_B0
SDM_B1
SDM_B2
SDM_B3
SDM_B4
SDM_B5
SDM_B6
SDM_B7

SDQS_B0

SDQS_B1

SDQS_B2

SDQS_B3

SDQS_B4

SDQS_B5

SDQS_B6

SDQS_B7

SMVREF_B

U26
T29
V25
W25

W26
W31

W27
AG31

AJ31
AD27
AE24
AK27
AG25
AL25
AF21
AL23
AJ22
AF29
AL21
AJ20

AE27
AD26
AL29
AL27
AE23

Y25
AA25

AG11
AG15
AE21
AJ28
AC31
U31
M29
J31

AF15
AG13
AG21
AH27
AD29
U30
L27
J30

AG29
AG30

AF17
AG17

N27
N26

AJ30
AH29

AK15
AL15

N31
N30

AA33
R34

R33
AP9

MA_B0
MA_B1
MA_B2
MA_B3
MA_B4
MA_B5
MA_B6
MA_B7
MA_B8
MA_B9
MA_B10
MA_B11
MA_B12

MAB_B1
MAB_B2
MAB_B3
MAB_B4
MAB_B5

MDQM_B0
MDQM_B1
MDQM_B2
MDQM_B3
MDQM_B4
MDQM_B5
MDQM_B6
MDQM_B7

MDQS_B0
MDQS_B1
MDQS_B2
MDQS_B3
MDQS_B4
MDQS_B5
MDQS_B6
MDQS_B7

YRCOMP
YCOMPH

YCOMPL
VREF

MCS_B#0 (18)
MCS_B#1 (18)
MCS_B#2 (18)
MCS_B#3 (18)

MRAS_B# (18)
MCAS_B# (18)

MWE_B# (18)

MBA_B0 (18)
MBA_B1 (18)

MCLK_B0 (18)
MCLK_B#0 (18)

MCLK_B1 (18)
MCLK_B#1 (18)

MCLK_B2 (18)
MCLK_B#2 (18)

MCLK_B3 (18)
MCLK_B#3 (18)

MCLK_B4 (18)
MCLK_B#4 (18)

MCLK_B5 (18)
MCLK_B#5 (18)

0.01u_Y5VC11

0.01u_Y5VC13

0.01u_Y5VC14

0.01u_Y5VC17

MCKE_B[0..3] (18)

MSI

Title

Size Document Number Rev

Date: Sheet of

MICRO-STAR INt'L CO., LTD.

H/W Project Leader : Andy Chen
H/W Project Engineer : Prudence Wang

Intel Springdale - Memory Signals

VISE (MS-6715)

2

1

MA_B[0..12] (18)

MAB_B[1..5] (18)

MDQM_B[0..7] (18)

MDQS_B[0..7] (18)

YRCOMP (28)
YCOMPH (28)
YCOMPL (28)

9 30Friday, September 27, 2002

1

0A

8

7

6

5

4

3

2

1

VCC_AGP

VCC_AGP

VCC_AGP

VCC_AGP

VSS

VSS

VSS

AR9

AR11

AR13

VCCA_AGP

AG1

Y11

VCC_AGP

VCCA_AGP

VCCA_AGP

HI_STRF
HI_STRS

HI_RCOMP

HI_SWING

HI_VREF

CISTRF
CISTRS

CI_RCOMP

CI_SWING

CI_VREF

DREFCLK

DDCA_CLK

DDCA_DATA

VSYNC

HSYNC

BLUE#

GREEN

GREEN#

REFSET

VCC_DAC
VCC_DAC

VCCA_DAC

VSSA_DAC

EXTTS#

RESERVED
RESERVED
RESERVED
RESERVED
RESERVED

VSS

VSS

VSS

VSS

AR23

AR16

AR20

AF5

HI0

AG3

HI1

AK2

HI2

AG5

HI3

AK5

HI4

AL3

HI5

AL2

HI6

AL4

HI7

AJ2

HI8

AH2

HI9

AJ3

HI10

AH5
AH4

AD4
AE3

AE2
AK7

CI0

AH7

CI1

AD11

CI2

AF7

CI3

AD7

CI4

AC10

CI5

AF8

CI6

AG7

CI7

AE9

CI8

AH9

CI9

AG6

CI10

AJ6
AJ5

AG2
AF2

AF4

G4
F2

H3
E2

G3
H7

BLUE

G6
H6

G5
F4

RED

E4

RED#

D2
G1

G2

0.1u_Y5V 0.01u_Y5V

C2

D3

AP8
AG9

AG10
AN35
AP34
AR1

AR25

VSS

AR27

VSS

AR29

VSS

AR32

VSS

Intel Springdale

CRITICAL

VCC_AGP

C24

0.1u_Y5V

HL0
HL1
HL2
HL3
HL4
HL5
HL6
HL7GAD8
HL8
HL9
HL10

HL_COMP

R62 52.3RST

CI_RCOMP

R63 52.3RST
C232 0.1u_Y5V
C233 0.1u_Y5V

GSET

R64 137RST

CB24

VCCA_DAC

C27

0.1u_Y5V

VCC_DAC

1.7V@250mA

HL[0..10] (12)

HL_STRF (12)
HL_STRS (12)

HL_SWING (28)

0.01u_Y5VC25

HL_VREF (28)

0.01u_Y5VC26

CI_SWING (28)
CI_VREF (28)

DOT_48 (13)
3VDDCCL (21)

3VDDCDA (21)
CRT_VSYNC (21)

CRT_HSYNC (21)
CRT_B (21)

CRT_G (21)

CRT_R (21)

VCC3

CB25

+

CB26

0.01u_Y5V

L6 100nH-300mA

VCC_AGP

VCC_AGP

CT27
470u-16V

VCC_AGP_C

P26

P27

P28

P30

P33R1R4

R32T1T3

AE32

VSS

VSS

AE35

VSS

VSS

T6T8T9

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AF3

AF11

AF14

AF6

AF9

VSS

AD30

VSS

AD33

VSS

AD28

AE1

VSS

AE4

VSS

VSS

AE10

P9

VSS

VSS

AE11

AE12

VSS

VSS

VSS

VSS

AE13

VSS

VSS

AE25

VSS

VSS

AE26

GAD[0..31](19)

D D

C C

GC_BE#[0..3](19)

AD_STB0(19)

AD_STB#0(19)

AD_STB1(19)

AD_STB#1(19)

GREQ#(19)

GGNT#(19)

ST[0..2](19)

RBF#(19)

WBF#(19)

GFRAME#(19)

GIRDY#(19)
GTRDY#(19)

GDEVSEL#(19)

B B

GSTOP#(19)

GPAR(19)

MCH_66(13)

SBA[0..7](19)

SB_STB(19)

SB_STB#(19)

PIPE#(19)

VCC_AGP

A A

DBI_LO(19)

R66 43.2RST

0.01u_Y5VC28

GSWING(19)

AGP_REF(19)

0.01u_Y5VC29

GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7

GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31

GC_BE#0
GC_BE#1
GC_BE#2
GC_BE#3

ST0
ST1
ST2

RBF#
WBF#

SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7

GRCOMP
GSWING

U2C

AE6

GAD0/DVOB_HSYNC

AC11

GAD1/DVOB_VSYNC

AD5

GAD2/DVOB_D1

AE5

GAD3/DVOB_D0

AA10

GAD4/DVOB_D3

AC9

GAD5/DVOB_D2

AB11

GAD6/DVOB_D5

AB7

GAD7/DVOB_D4

AA9

GAD8/DVOB_D6

AA6

GAD9/DVOB_D9

AA5

GAD10/DVOB_D8

W10

GAD11/DVOB_D11

AA11

GAD12/DVOB_D10

W6

GAD13/DVOBC_CLKINT

W9

GAD14/DVOB_FLDSTL

V7

GAD15/MDDC_DATA

AA2

GAD16/DVOC_VSYNC

Y4

GAD17/DVOC_HSYNC

Y2

GAD18/DVOC_BLANK#

W2

GAD19/DVOC_D0

Y5

GAD20/DVOC_D1

V2

GAD21/DVOC_D2

W3

GAD22/DVOC_D3

U3

GAD23/DVOC_D4

T2

GAD24/DVOC_D7

T4

GAD25/DVOC_D6

T5

GAD26/DVOC_D9

R2

GAD27/DVOC_D8

P2

GAD28/DVOC_D11

P5

GAD29/DVOC_D10

P4

GAD30/DVOBC_INTR#

M2

GAD31/DVOC_FLDSTL

Y7

GCBE0/DVOB_D7

W5

GCBE1/DVOB_BLANK#

AA3

GCBE2

U2

GCBE3/DVOC_D5

AC6

GADSTBF0/DVOB_CLK

AC5

GADSTBS0/DVOB_CLK#

V4

GADSTBF1/DVOC_CLK

V5

GADSTBS1/DVOC_CLK#

N6

GREQ

M7

GGNT

N3

GST0

N5

GST1

N2

GST2

R10

GRBF

R9

GWBF

U6

GFRAME/MDVI_DATA

V11

GIRDY/MI2CCLK

AB5

GTRDY/MDVI_CLK

AB4

GDEVSEL/MI2CDATA

W11

GSTOP/MDDC_CLK

AB2

GPAR/ADD_DETECT

H4

GCLKIN

R6

GSBA0#/ADD_ID0

P7

GSBA1#/ADD_ID1

R3

GSBA2#/ADD_ID2

R5

GSBA3#/ADD_ID3

U9

GSBA4#/ADD_ID4

U10

GSBA5#/ADD_ID5

U5

GSBA6#/ADD_ID6

T7

GSBA7#/ADD_ID7

U11

GSBSTBF

T11

GSBSTBS

M4

DBI_HI

M5

DBI_LO

AC2

GRCOMP/DVOBC_RCOMP

AC3

GVSWING

AD2

GVREF

AF16

VSS

VSS

AF18

VSS

VSS

T10

VSS

VSS

AF20

T26

AF22

VSS

VSS

T27

AF24

VSS

VSS

T28

AF25

VSS

VSS

T30

VSS

VSS

AF30

T33

VSS

VSS

AF33

T35

VSS

VSS

AG4

U4

AG8

VSS

VSS

U18

VSS

VSS

AG14

V6

U19

U32V3V8V9V10

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AG16

AG18

AG20

AG22

AG24

VSS

VSS

VSS

VSS

AG26

VSS

VSS

AG28

V17

VSS

VSS

AG32

V19

VSS

VSS

AG35

V26

AH3

V27

VSS

VSS

AH6

V28

V30W4W17

VSS

VSS

VSS

VSS

AH12

AH10

VSS

VSS

V33

AH14

VSS

VSS

AH16

Y3

W18

W32Y6Y8Y9Y26

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AH18

AH20

AH22

AH24

VSS

VSS

AH30

VSS

VSS

VSS

VSS

AH33

Y28

Y30

Y33

Y35

Y27

AA1

AA4

AA32

AB10

AB26

AC1

AC4

AC32

AB28

VSS

VSS

AL32

AB30

VSS

VSS

AM9

AB33

VSS

VSS

AM11

VSS

VSS

AM13

VSS

VSS

AM15

VSS

VSS

AM17

AC35

VSS

VSS

AM19

AD3

VSS

VSS

AM21

AD6

VSS

VSS

AM23

AB27

AB3

AB6

AB8

AK12

VSS

VSS

AK14

VSS

VSS

AK16

VSS

VSS

AK18

VSS

VSS

AK20

VSS

VSS

AK22

VSS

VSS

AB9

AK24

VSS

VSS

AK26

VSS

VSS

VSS

VSS

AK28

VSS

VSS

AL1

Y10

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AK3

AJ9

AJ32

AJ35

AK8

AK10

VSS

VSS

AJ1

AJ4

C23 0.1u_Y5VC215 0.1u_Y5V

L1L5Y1J1J2J3K2K3K4K5J4J5L4L2L3

AD8

AD9

AD10

VSS

VSS

VSS

VCC_AGP

VCC_AGP

VCC_AGP

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AM25

AM27

AM29

AM35

AN10

AN12

AN14

AN16

VCC_AGP

VSS

VCC_AGP

VCC_AGP

VSS

VSS

AN18

AN20

VCC_AGP

VCC_AGP

VSS

VSS

AN22

AN24

AN26

VCCA_AGP_C

VCC_AGP

VCC_AGP

VCC_AGP

VSS

VSS

VSS

AN28

AN30

AN32

MSI

Title

Size Document Number Rev

8

7

6

5

4

3

Date: Sheet of

MICRO-STAR INt'L CO., LTD.

H/W Project Leader : Andy Chen
H/W Project Engineer : Prudence Wang

Intel Springdale - AGP & HLink & LAN Signals

VISE (MS-6715)

2

10 30Friday, September 27, 2002

1

0A

8

7

6

VCC3 VCC_AGP

5

1_5VSB

RN91
0

3VSB

4

SUS_A

12
34
56
78

SUS_B
SUS_C

C238 0.1u_Y5V
C239 0.1u_Y5V
C240 0.1u_Y5V

Solder

3

2

1

ICH5 Pull-Up / Down Resistors

3VSB

AC_SDIN1

B5F6G1H6K6L6M10

D D

C C

AD[0..31](16,19,20,22)

C_BE#[0..3](16,19,20)

FRAME#(16,19,20)

IRDY#(16,19,20)

TRDY#(16,19,20)

DEVSEL#(16,19,20)

STOP#(16,19,20)

PERR#(16,19,20)
SERR#(16,19,20)

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C_BE#0
C_BE#1
C_BE#2
C_BE#3

PAR(16,19,20)

LOCK#(19,20)

PCI_PME#(16,19,20)

PIRQ#A(19,20)
PIRQ#B(19,20)

B B

PIRQ#C(19,20)
PIRQ#D(19,20)
PIRQ#E(20)
PIRQ#F(20)
PIRQ#G(20)
PIRQ#H(16,20)

PREQ#[0..4](19,20,24)

PGNT#[0..4](19,20,24)

BRD_ID1(28)

PREQ#5(20)

PGNT#5(16)

PREQ#0
PREQ#1
PREQ#2
PREQ#3
PREQ#4

PGNT#0
PGNT#1
PGNT#2
PGNT#3
PGNT#4

PREQ#5

PGNT#5

ICH_PCLK(13)

A A

PCIRST_ICH5#(8,13,14,24)

8

U3A

J4

AD0

J5

AD1

G3

AD2

K4

AD3

H5

AD4

H2

AD5

J3

AD6

J2

AD7

K5

AD8

F2

AD9

M4

AD10

H4

AD11

L5

AD12

G2

AD13

K1

AD14

G5

AD15

G4

AD16

L1

AD17

B2

AD18

P5

AD19

H3

AD20

N5

AD21

C4

AD22

N4

AD23

E6

AD24

P3

AD25

D3

AD26

N2

AD27

F5

AD28

P4

AD29

F4

AD30

P2

AD31

E3

C/BE0#

J1

C/BE1#

N3

C/BE2#

M2

C/BE3#

D2

FRAME#

M3

IRDY#

E4

TRDY#

L3

DEVSEL#

E5

STOP#

F1

PAR

K2

PERR#

L4

SERR#

L2

PLOCK#

V2

PME#

B3

PIRQA#

E1

PIRQB#

A2

PIRQC#

C2

PIRQD#

D7

PIRQE#/GPI2

A6

PIRQF#/GPI3

E2

PIRQG#/GPI4

B1

PIRQH#/GPI5

D5

REQ0#

C1

REQ1#

C5

REQ2#

B6

REQ3#

C6

REQ4#/GPI40

D4

GNT0#

A3

GNT1#

B7

GNT2#

C7

GNT3#

A4

GNT4#/GPO48

A5

REQA#/GPI0

E7

REQB#REQ5#/GPI1

E8

GNTA#/GPO16

B4

GNTB#/GNT5#/GPO17

N1

PCICLK

V4

PCIRST#

Intel ICH5

CRITICAL

7

VCC3_3

VCC3_3

VCC3_3

G19

G21

VCC3_3

VCC3_3

VCC3_3

GND

A1A7A10

VCC3_3

VCC3_3

GND

GND

A15

N10P6R13

VCC3_3

VCC3_3

GND

GND

A17

A19

V19

VCC3_3

VCC3_3

GND

GND

A21

A23

W15

W17

VCC3_3

VCC3_3

GND

GND

AA5

AA7

W24

AD13

VCC3_3

VCC3_3

GND

GND

AA9

AA11

AD20

VCC3_3

VCC3_3

GND

GND

AA13

AA21

6

K10

GND

AA24

K12

K13

VCC1_5

VCC1_5

GND

GND

AB5

AB7

L19

P19

VCC1_5

VCC1_5

GND

GND

AB9

AB11

R10R6H24

VCC1_5

VCC1_5

GND

GND

AB15

AB18

J19

VCC1_5

VCC1_5

GND

GND

AC2

AC4

K19

M15

VCC1_5

VCC1_5

GND

GND

AC6

AC8

N15

N23

VCC1_5

VCC1_5

GND

GND

AC10

AC13

VCC1_5

GND

E15

F15

F14

R12W6W7

VCC1_5

VCC1_5S

VCC1_5S

VCC1_5S

VCC1_5S

GND

GND

GND

GND

GND

AC23

AD4

AD6

AD8

AD17

5

W8

VCC1_5S

VCC1_5S

GND

GND

AD21

AD12

W9

W10

VCC1_5S

VCC1_5S

GND

GND

B13

B17

W19

E22

W11

VCC1_5S

VCC1_5S

GND

GND

B19

B21

B23C3C8

B15

VCC1_5S

VCCSUS3_3

GND

GND

GND

E13

E14

E18

F16

VCCSUS3_3

VCCSUS3_3

VCCSUS3_3

GND

GND

GND

C16

C18

C20

C22D1D6

F17

F18

K15U6V6

VCCSUS3_3

VCCSUS3_3

VCCSUS3_3

VCCSUS3_3

GND

GND

GND

GND

D11

D16

F19Y5AA4

VCCSUS3_3

VCCSUS3_3

VCCSUS1_5A

GND

GND

GND

GND

D18

D20

D22

D24

4

AB4F7F8

VCCSUS1_5B

VCCSUS1_5B

VCCSUS1_5B

GND

GND

GND

GND

GND

E17

E19

E20

E21

E11

F10

F11

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8

VCCLAN3_3/VCCSUS3_3

VCCLAN3_3/VCCSUS3_3

VCCLAN3_3/VCCSUS3_3

VCCLAN1_5/VCCSUS1_5C

VCCLAN1_5/VCCSUS1_5C

PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

PDA0

PDA1

PDA2

PDCS1#
PDCS3#

PDIOR#
PDIOW#
PIORDY

PDDREQ

PDDACK#

IRQ14

SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8

SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

SDA0

SDA1

SDA2

SDCS1#
SDCS3#

SDIOR#
SDIOW#
SIORDY

SDDREQ

SDDACK#

IRQ15

AC_SDIN0
AC_SDIN1
AC_SDIN2

AC_SDOUT

AC_SYNC

AC_BIT_CLK

AC_RST#

GND

GND

GND

E23F3F9

AB16
Y13
Y14
AC14
AA14
AC15
AD14
AB14
AD15
Y15
AD16
AA15
AC16
Y16
AA16
AB17

AA19
AD19
AC19

AB19
Y18

AD18
AA17
AA18

AC17
AC18

Y17

AA22
AB23
AD23
AD24
AB21
AC21
AB20
AC20
Y19
AD22
AC22
AA20
AB22
AC24
AB24
AA23

W22
W23
W21

V22
V20

Y23
Y22
Y21

Y20
W20

Y24

E12
D12
A13

A9
B8
D8
C12

3

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

AC_SDIN1
AC_SDIN2

SDOUT

R77 33

SYNC

R78 33

PDD[0..15] (21)

ICH5 Decoupling Capacitors

PD_A0 (21)
PD_A1 (21)
PD_A2 (21)

PD_CS#1 (21)
PD_CS#3 (21)

PD_IOR# (21)
PD_IOW# (21)
PD_IORDY (21)

PD_DREQ (21)
PD_DACK# (21)

IRQ14 (21)

SDD[0..15] (21)

SD_A0 (21)
SD_A1 (21)
SD_A2 (21)

SD_CS#1 (21)
SD_CS#3 (21)

SD_IOR# (21)
SD_IOW# (21)
SD_IORDY (21)

SD_DREQ (21)
SD_DACK# (21)

IRQ15 (21)

AC_SDIN0 (15)

AC_SDOUT (15)
AC_SYNC (15)
AC_BITCLK (15)
AC_RST# (15)

MSI

Title

Size Document Number Rev

Date: Sheet of

VCC3 VCC3

3VSB 3VSB

MICRO-STAR INt'L CO., LTD.

Intel ICH5 - PCI & IDE & AC97 Signals

2

R75 10K

AC_SDIN2

R76 10K

All caps be placed less than 100mils.

CB41

0.1u_Y5V
CB43

0.1u_Y5V
CB45

0.1u_Y5V

CB47

0.1u_Y5V
CB48
1u-0805_Y5V

VCC_AGPVCC_AGP

CB53

0.1u_Y5V
CB55

0.1u_Y5V
CB57

0.1u_Y5V

VCC_AGP

CB59 0.01u_Y5V

H/W Project Leader : Andy Chen
H/W Project Engineer : Prudence Wang

VISE (MS-6715)

CB42

0.1u_Y5V
CB44

0.1u_Y5V
CB46

0.1u_Y5V

Solder

CB49

0.1u_Y5V

Solder

CB50

0.01u_Y5V

CB52

0.22u_Y5V

{VOLTAGE}

CB54

0.1u_Y5V
CB56

0.1u_Y5V
CB58

0.1u_Y5V

11 30Friday, September 27, 2002

1

0A

8

7

6

5

4

3

2

1

PROCHOT_LTCHD (24)
FAN_CMD (28)

AC7
AD7
AC9
AD9

AA8
AB8
AA10
AB10

Y11
Y9

AC5
AD5

T5

LAD0

R4

LAD1

R3

LAD2

U4

LAD3

T4
U5
R2
F23

AD2
AD1

AA2
AD3

V23
U24
R21
R23

INIT#

U23

INTR

R22

NMI

V24

SMI#

P22
T24
P23
T22

R24
P20

Y4
AC12

P24
R20

U1
AA12
AB13

W1
U2
AA3

AD10
Y12

V5
AC3

F20

AC11

32.768KHz-12.5pF-20PPM

AB12
AB3

RI#

E24

SPKR

CHASIS_ID0 (24)
CHASIS_ID1 (24)
CHASIS_ID2 (24)
PSWRD (14,28)
NIC_ENABLE# (22)
SATALED# (26)

SUS_STAT# (28)
BATTLOW# (28)
SUSCLK (14,24)
THERM# (28)
ICH_TRMTRIP# (28)

SATA_BIAS

R84 24.9RST

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

PWROK

R99 22

INTERVEN

R102 X_390K
R628 10K

Y1

RTC_XO

3

SATA_RX0 (24)
SATA_RX#0 (24)
SATA_RX1 (24)
SATA_RX#1 (24)

SATA_TX0 (24)
SATA_TX#0 (24)
SATA_TX1 (24)
SATA_TX#1 (24)

SATA_100 (13)
SATA_100# (13)

LPC_AD[0..3] (13,14,24)

LPC_FRAME# (13,14,24)
LPC_DRQ#0 (14)
LPC_DRQ#1 (24)
SERIRQ (14,24,28)

SMBCLK (13,16,17,18,23,28)
SMBDATA (13,16,17,18,23,28)

SM_LINK1 (20,28)USB4-(22)
SM_LINK0 (20,28)

A20M# (6)
FERR# (6,28)
IGNNE# (6)
HINIT# (6)
INTR (6)
NMI (6)
SMI# (6)

SLP# (6)
STPCLK# (6)
KBRST# (14,28)
A20GATE (14,28)

PWRBTN# (14)

ICH_GD (8,28)
CPU_GD (6)
VRM_GD (27)

RSTBTN# (24)
RTC_RST# (28)
RSMRST# (14,28)

SLP_S3# (14,25)
SLP_S4# (14,25)
SLP_S5# (14)

HOOD_SENSE# (14,23)
LNK_ALERT# (28)
SMB_ALERT# (28)

Support Internal VCCSUS1_5 regulator install R102.

VBAT

ICH_14 (13)

18p-NPOC38

{VOLTAGE}

R105
10M

RI# (14,28)
SPKR (15)

MSI

Title

Size Document Number Rev

Date: Sheet of

MICRO-STAR INt'L CO., LTD.

H/W Project Leader : Andy Chen
H/W Project Engineer : Prudence Wang

Intel ICH5 - Other Signals

VISE (MS-6715)

2

12 30Friday, September 27, 2002

1

0A

SIO_SMI#(14,28)

PS_DETECT(23,28)

CSA_PME#(28)

PROC_HOT#(24)

FAUD_DET#(15)

VCC_AGP VCCP

VCC5_SB

D D

5VREF(28)

C34 0.1u_Y5V

Close A8 of ICH5.

R83 300

EE_DO(16,28)

USB0+(22)

C C

USB0-(22)

USB1+(22)

USB1-(22)

USB2+(22)

USB2-(22)

USB3+(22)

USB3-(22)

LAN_RST#

EE_DO

USB4+(22)

USB5+(22)

USB5-(22)

OC#1(22)
OC#2(22)

FRONT_USB_DET#(22,28)

OC#3(22)

OC#7(28)

R98 22.6RST

USB_BIAS

B B

USB_48(13)

HL[0..10](10)

HL11(28)

HL_STRF(10)
HL_STRS(10)

A A

H_COMP(28)

H_SWING(28)

H_VREF(28)

ICH_66(13)

8

HL0
HL1
HL2
HL3
HL4
HL5
HL6
HL7
HL8
HL9
HL10

1.5V
800mV

0.01u_X7RC32 18p-NPOC41

0.01u_X7RC33

M23
M21

M20

C10
C11

B12
AA1

E10
D10

B11
B10

A12

C23
D23

A22
B22

C21
D21

A20
B20

C19
D19

A18
B18

C17
D17

A16
B16

C15
D15
D14
C14

B14
A14
D13
C13

A24
B24

F24

H20
H21

H23

N21

K21
G22

K23

N24

N22

J20

L22
J22

J24

L20
L24

C9

D9
E9

B9

Intel ICH5

CRITICAL

U3B

CB63 0.1u_Y5V

LAN_RXD0
LAN_RXD1
LAN_RXD2

LAN_TXD0
LAN_TXD1
LAN_TXD2

LAN_RST#
LAN_CLK
LAN_RSTSYNC

EE_DIN
EE_DOUT
EE_CS
EE_SHCLK

USBP0P
USBP0N

USBP1P
USBP1N

USBP2P
USBP2N

USBP3P
USBP3N

USBP4P
USBP4N

USBP5P
USBP5N

USBP6P
USBP6N

USBP7P
USBP7N

OC0#
OC1#
OC2#
OC3#

OC4#/GPI9
OC5#/GPI10
OC6#/GPI14
OC7#/GPI15

USBRBIAS
USBRBIAS#

CLK48

HI0
HI1
HI2
HI3
HI4
HI5
HI6
HI7
HI8
HI9
HI10
HI11

HI_STBF
HI_STBS
HIRCOMP
HI_VSWING
HIREF
CLK66

G6

7

GND

A8

W14

V5REF

GND

G20

G24H1H19

V5REF

GND

GND

E16

V5REF_SUS

GND

GND

GND

H22J6J21

AD11

VCCRTC

GND

GND

J23K3K11

AA6

VCCSATAPLL

GND

GND

GND

K14

VCC_AGPVBAT

AB6

C24

VCCUSBPLL

VCCSATAPLL

GND

GND

GND

GND

K20

K22

K24

L10

6

L11

GND

L12

R15

R19

V_CPU_IO

GND

GND

L13

L14

T19

V_CPU_IO

V_CPU_IO

GND

GND

GND

L15

L21

L23M1M5

A11R5U3Y2W4W5U21

NC

GPI7

GPI8

GPI12

GPI13

AGPBUSY#/GPI6

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

M11

M12

M13

M14

M22

M24

N11

N12

T20

U22R1U20

SLP_S1#/GPO19

STP_PCI#/GPO18

C3_STAT#/GPO21

STP_CPU#/GPO20

GND

GND

GND

GND

GND

N13

N14

N20P1P10

5

F22

AC1W3V3W2T1

GPIO25

GPIO27

CLKRUN#/GPIO24

CPUPERF#/GPO22

SSMUXSEL/GPO23

GND

GND

GND

GND

GND

GND

GND

P11

P12

P13

P14

P15

P21

GPIO28

GND

R11

R14

G23

F21

GPIO32

GPIO33

GND

GND

T23T3T6

GPIO34

GND

GND

U19V1V21

AB1

AB2Y1T2

SUS_STAT#

GND

GND

GND

W16

SUSCLK

BATLOW#

GND

GND

GND

W18Y3Y6Y7Y8

4

T21

SATA0RXP
SATA0RXN
SATA1RXP

THRM#

SATA1RXN

THRMTRIP#

SATA0TXP
SATA0TXN

SATA1TXP
SATA1TXN

SATARBIASP
SATARBIASN

LFRAME#

LRDQ1#/GPI41

SMBDATA

CPU_SLP#

DPRSLPVR

PWRBTN#

CPUPWRGD/GPO49

VGATE/VRMPWRGD

SYS_RESET#

RTCRST#
RSMRST#

INTERVEN

INTRUDER#

LINKALERT#

SMBALERT#/GPI11

GND

GND

GND

GND

Y10

CLK100P

CLK100N

LDRQ0#

SERIRQ

SMBCLK

SMLINK1
SMLINK0

A20M#

FERR#

IGNNE#

STPCLK#

RCIN#

A20GATE

DPSLP#

PWROK

SLP_S3#
SLP_S4#
SLP_S5#

CLK14

RTCX1

RTCX2

8

RISER#1(19)

R153 4.7K

8

FB2 80-0805-3A

CB64

0.1u_Y5V

FWH_VPP

TBL#

R144 8.2K

RISER#1
BIOS_WP#
TBL#

FWH_VPP_EN

+

VCC3

VCC3

D D

C C

PCIRST_ICH5#(11)

B B

RISER_DET#(24)

BIOS_WP#(14)

LPC_AD0(12,14,24)
LPC_AD1(12,14,24)
LPC_AD2(12,14,24)

A A

+12V

7

VCC3V

CT3
10u-16V

ALE

SMBCLK(12,16,17,18,23,28)

SMBDATA(12,16,17,18,23,28)

Firware Hub (FWH)

BIOS1

1
2
3
4

FGPI1

5
6
7
8
9

10
11
12
13
14
15
16 17

BIOS_4Mbit

CRITICAL

FWH_VPP

Q2
NDS7002AS

Q4
NDS7002AS

7

Clock Generator - CY28405

40 38

C47

0.1u_Y5V

43

34

C48

0.1u_Y5V

37

C49

0.1u_Y5V

28
10

C50

0.1u_Y5V

11
16

C51

0.1u_Y5V

17
24

C52

0.1u_Y5V

23

C53

0.1u_Y5V

48

C55

0.1u_Y5V

47
31

32

VPP
RST#
FGPI3
FGPI2
FGPI1
FGPI0
WP#
TBL#
ID3
ID2
ID1
ID0
FWH0
FWH1
FWH2
GND FWH3

VCC

FGPI4

IC(VIL)

GNDA

VCCA

GND

VCC

INIT#

FWH4

RFU
RFU
RFU
RFU
RFU

6

U4

CPU_VDD CPU0#

CPU_GND

SRC_VDD

SRC_GND

3V66_GND
PCI_VDD

PCI_GND
PCI_VDD

PCI_GND
48_VDD

48_GND

3

REF_VDD

6

REF_GND
VDD

GND
SCLK

SDATA

ICS952606 / CY28405

CRITICAL

VCC3

32
31

CLK

30
29
28
27
26
25
24
23
22
21
20
19
18

CPU0
CPU1

CPU1#

CPU2

CPU2#

SRC

SRC#

3V66_03V66_VDD
3V66_1

MODE#/3V66_2

VCH/3V66_4

FS_C/PCI_F0
FS_D/PCI_F1
FS_E/PCI_F2

PCI0
PCI1
PCI2
PCI3
PCI4
PCI5

DOT_48M
USB_48M

FS_A/REF0
FS_B/REF1

X1

X2

VTT_GD#

RST#/PWR_DN#

IREF

FWH_PCLK
COIL_CONN TBL#

INIT#

R152 8.2K

FWH Decoupling Capacitors

VCC3

CB65

0.1u_Y5V

Place Cap. as Close to every pin of FWH< 250 mil.

6

5

Trace length less than 0.5inchs

MCHCLK

39
42

41
45
44

36
35

3027
29
26
25

7
8
9
12
13
14
15
18
19

21
22

1
2

4

5
33

20
46

COIL_CONN (23)HOOD_SW_DET(23)

LPC_FRAME# (12,14,24)

LPC_AD3 (12,14,24)

CB66

0.1u_Y5V

R114 33

MCHCLK#

R115 33

CPUCLK

R110 33

CPUCLK#

R112 33

ITPCLK

R117 33

ITPCLK#

R119 33

SATA100 SATA_100

R120 33

SATA100#

R121 33 R116 49.9RST

MCH66

R122 33

AGPCLK

R123 33

ICH66

R124 33

LANPCLK

R128 33

PCICLK1

R491 33

PCICLK0

R492 33

PCICLK2

R493 33

PCICLK3

R494 33

PCICLK4

R132 33

ICHPCLK

R125 33

FWHPCLK

R127 33

SIOPCLK

R130 33
R548 33

DOT48 DOT_48

R133 33
R134 33

R135 10K
R136 33

FS_SEL0

R137 33

FS_SEL1

R138 33
R139 10K

PLL_XI

Y2
14M-32pf-HC49S-D

PLL_XO
VID_GD#

PWR_DN#

R140 1K

IREF

R503 475RST

VCC3

CB67

0.1u_Y5V

5

22p_NPOC54

22p_NPOC56

MCH_CLK
MCH_CLK#
CPU_CLK
CPU_CLK#
ITP_CLK
ITP_CLK#

SATA_100#

MCH_66
AGP_CLK
ICH_66

FWH_PCLK

USB_48USB48

VCC3

MCH_CLK (8)
MCH_CLK# (8)
CPU_CLK (6)
CPU_CLK# (6)
ITP_CLK (28)
ITP_CLK# (28)

SATA_100 (12)
SATA_100# (12)

MCH_66 (10)
AGP_CLK (19)
ICH_66 (12)

LAN_PCLK (16)
PCI_CLK1 (20)
PCI_CLK0 (20)
PCI_CLK2 (20)
PCI_CLK3 (19)
PCI_CLK4 (19)
ICH_PCLK (11)

SIO_PCLK (14)
SEC_PCLK (24)

DOT_48 (10)
USB_48 (12)

BSEL0 (6)
SIO_14 (14)
AC_14 (15)
ICH_14 (12)
BSEL1 (6)

BIOS PROTECT BLOCK

VCC3

R141 8.2K

BIOS Update Config.

HIGH

Un_protected

LOW

Protected

FWH Strapping Resistors

HOOD_SW_DET
BIOS_WP#

RISER#1

COIL_CONN
FGPI1

R145 8.2K
R146 8.2K

R147 8.2K

R149 2.7K
R150 1K

4

3

LANPCLK
PCICLK0
PCICLK1

BSEL0
BSEL1

CPU_CLK
CPU_CLK#
MCH_CLK
MCH_CLK#
ITP_CLK
ITP_CLK#

SATA_100
SATA_100#

R495 X_4.7K
R496 X_4.7K
R497 X_4.7K

R625 1K
R626 1K

R106 49.9RST
R107 49.9RST
R108 49.9RST
R109 49.9RST
R111 49.9RST
R113 49.9RST

R118 49.9RST

VCC3

2

MCH_66
ICH_66
AGP_CLK

DOT_48
USB_48

EMC HF filter capacitors, located close to PLL

1

X_10p_NPOC42
X_10p_NPOC43
X_10p_NPOC44

X_10p_NPOC45
X_10p_NPOC46

Clock Generator VTT Power Down Block

VID_GD#

2N3904S

Q1

VIDGD

R126 1K
R129 X_1K
R131 4.7K

VCC3
GD_30MS (23)
VID_GD (7)

Mounting Holes

MH1

1

5

2

6

(NPTH)

3

7

4

8

9

MH5

1

5

2

6

(NPTH)

3

7

4

8

9

JBIOS1

1
2

YJ102

Default

FM1

FM9 FM10 FM11 FM13 FM15FM12

Simulation

VCC3

VCC3

4

3

MH2

1

5

2

6

(NPTH)

3

7

4

8

9

MH6

1

5

2

6

(NPTH)

3

7

4

8

9

Optics Orientation Holes

FM4FM2 FM6FM3 FM7 FM8FM5

VCC5

SIM1

MSI

Title

Size Document Number Rev

Date: Sheet of

2

MH3

1

5

2

6

(NPTH)

3

7

4

8

9

MH7

1

5

2

6

(NPTH)

3

7

4

8

9

FM14

J1 J2

MICRO-STAR INt'L CO., LTD.

SIM2

H/W Project Leader : Andy Chen
H/W Project Engineer : Prudence Wang

CY28405 & FWH

VISE (MS-6715)

MH4

1

5

2

6

(NPTH)

3

7

4

8

9

MH8

1

5

2

6

(NPTH)

3

7

4

8

9

FM23

FM24

13 30Monday, September 30, 2002

1

0A

8

PCIRST_ICH5#(11)

SIO_PCLK(13)

SERIRQ(12,24,28)

LPC_DRQ#0(12)

LPC_FRAME#(12,13)

LPC_AD[0..3](12,13,24)

D D

RSMRST#(12)

PWBTIN#(24)

PWRBTN#(12)

PS_ON#(24)
PWRGDA(8)
GD_10MS(27)

GD_30MS#(23)

SLP_S3#(12)

SLP_S4#(12)

SIO_SMI#(12)
PCI_PME#(16,19,20)

3V_SW_AUX(26)
3V_SW_MAIN#(26)
3V_SW_CTRL#(25)

SIO_TRMTRIP#(28)

SUSLED(24)

+12VP

MB_DEV_DET#(23)

MB_POWER_ON#(23)

MB_ADPT_DET#(23)

SEC_TPM_PRES(24)

HOOD_LOCK#(23)

HOOD_UNLOCK#(23)

5V_USB_MAIN#(25)

D12
1N4148S

12VIN

C262

0.01u_Y5V

PCIRST#1(16,19,20)

PCIRST#2(19)
IDEA_RST#(21)
IDEB_RST#(21)

ATADET0(21)
ATADET1(21)

SKTOCC#(6)

SYS_FAN(23)

CPU_FAN(23)

VCC5
+12V

SLP_S5#(12)

5V_USB_AUX(25)

C C

B B

R155 4.7K

VCC3

PLED(24)

FB6 120-600mA

RI#(12)

MR#(28)

R161 13KST
R163 1.78KST

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

PWRBTN#
PS_ON#
PWRGDA
GD_10MS
GD_30MS#

SIO_TRMTRIP#

MB_DEV_DET#
MB_POWER_ON#

BRD_V1
MB_ADPT_DET#
SYSOPT
GP25
SKTOCC#
SEC_TPM_PRES
HOOD_LOCK#
HOOD_UNLOCK#
FDD_2M
COMM_B_DET#
BRD_V0

MR#

7

LPC SUPER I/O LPC47B387

U6

27

LRESET#

30

LCLK

31

SERIRQ

26

LDRQ#

25

LFRAME#

PD#

28

LPC_PD#

21

LAD0

22

LAD1

23

LAD2

24

LAD3

5

RSMRST#

1

PWRBTN_IN#/GP62

10

PWRBTN_OUT#/GP66

11

PS_ON#/GP67

4

PWRGOODA

105

PWRGD_10M/IRQ9/GP75

106

PWRGD_30M#/IRQ10/GP76

7

PDS_EN/FAN_TACH1/GP85

2

SLP_S3#/GP63

3

SLP_S5#/GP64

111

IO_SMI#/GP46

36

PME_IN#/GP13

14

IO_PME#/GP42

37

3V_SW_AUX/WOL#/GP14

38

3V_SW_MAIN#/EVENT5#/GP15

39

S3_3V_CTRL#/EVENT6#/GP16

53

THERMTRIP#/GP32

8

COLOR/GP30

13

BLINK_GR/GP31

17

GPRST1#/GP60

18

GPRST2#/GP61

33

GPRST3#/GP10

34

GPRST4#/GP11

29

DDRC/GP43

40

GP17

41

GP20/P17

42

GP21/P16

43

GP22/P12

44

RING#/GP23

45

SYSOPT/GP24

47

INTRUDER#/GP25

48

CPUOCC1#/GP26

49

CPUOCC2#/GP27

50

HDLOCK#/GP44

51

HDUNLCK#/GP45

54

WDO/GP33

104

IRQ7/GP74

35

FAN_TACH2/GP12

103

FAN_TACH3/IRQ6/GP73

110

FAN_TACH4

108

MR#

107

12VIN

AVS

5VIN

109

12VIN

100

USB_PWR#/ROFF/IRQ3/GP70

101

5V_USB_AUX/IRQ4/GP71

102 16

5V_USB_MAIN#/IRQ5/GP72 SUSCLK

52

AVSS

12

VSS6

99

VSS5

87

VSS4

57

VSS3

32

VSS2

6

VSS1

SMSC LPC47B387

DRVDEN0/GP40

DRVDEN1/IOCHCK#/GP41

RXD2/GP52/IRRX

TXD2/GP53/IRTX

INDEX#

MTR#0

DS1#/GP37

DS#0

MTR1#/GP36

DIR#

STEP#
WDATA#
WGATE#

TRACK0#

WP#

RDATA#

HEAD#

DSKCHG#

PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7

SLCT

BUSY
ACK#

SLIN#

INIT#

ERR#

AFD#
STB#

IRRX2/GP34
IRTX2/GP35

RI#1

RXD1

CTS#1

DCD#1
DSR#1

TXD1
RTS#1
DTR#1

RI2#/GP50

CTS#2/GP56
DCD#2/GP51
DSR#2/GP54

RTS#2/GP55

DTR2#/GP57

GA20/GP37

KBRST#/GP36

KBDATA

KBCLK

MSDATA

MSCLK

CLK_14M

VTR1
VTR2

VBAT

VCC3_3
VCC3_2
VCC3_1

6

DRVDEN0

60
61

INDEX#

70

MOA#

62

DSB#

59

DSA#

64

MOB#

58

DIR#

65

STEP#

66

WRDATA#

67

WE#

68

TRACK0#

71

WP#

72

RDDATA#

73

HEAD#

69

DSKCHG#

63

PRD0

83

PRD1

84

PRD2

85

PRD3

86

PRD4

88

PRD5

89

PRD6

90

PRD7

91

RSLCT

92

RPE

93

PE

BUSY

94

ACK#

95

SLIN#

82

PINIT#

81

ERR#

96

AFD#

97

RSTB#

98
55

56

RIA#

118

SINA

112

CTSA#

116

DCDA#

119

DSRA#

114

SOUTA

113

RTSA#

115

DTRA#

117

RIB#

120

SINB

123

CTSB#

127

DCDB#

122

DSRB#

125

SOUTB

124

RTSB#

126

DTRB#

128

Bit0 of 0xF0 of Device A setup 0.

79
78

KBDAT#

74

KBCLK#

75

MSDAT#

76

MSCLK#

77
20

15

CB70 1u-0805_Y5V

9
46

CB71 0.1u_Y5V

19
80
121

CB72

0.1u_Y5V

SYSMAG_INT (23)

BIOS_WP# (13)
FAN_CLAMP (23)

RIA# (21)

RIB# (21)

A20GATE (12)
KBRST# (12)

SIO_14 (13)
SUSCLK (12)

CB73

0.1u_Y5V

3VSB

VBAT

5

VCC3

CB74

0.1u_Y5V

4

3

SERIAL PORT 1

U5

VCC5

NRTSA
NDSRA#
NCTSA#
NRIA#

NDCDA#
NSOUTA
NSINA
NDTRA

MSDAT#
MSCLK#

KBCLK#

20

VCC

2

NCTSA#
NDSRA#
NSINA
NDCDA# DCDA#

RTSA#
DTRA#
SOUTA

1
3
5
7

1
3
5
7

ACK#
BUSY
PE
SLCT

AFD#
ERR#
PINIT# PRND0
SLIN#

PRD0
PRD1
PRD2
PRD3
PRD4
PRD5
PRD6
PRD7

RSTB#

RIN1

3

RIN2

4

RIN3

7

RIN4

9

RIN5

16

DIN1

15

DIN2

13

DIN3

11

GND

75232S-SSOP20

2
4
6
8

2
4
6
8

1
2
8

10

12
15
27
28

3
4
6
7

9
11
13
14

5

1 2

3 4

5 6

CN1
180p_NPO

CN2
180p_NPO

U29

RCD1
RCD2
RCD3
RCD4

RCD5
RCD6
RCD7
RCD8

RRCD1P
RRCD2P
RRCD3P
RRCD4P
RRCD5P
RRCD6P
RRCD7P
RRCD8P

RRCD9P

PAC SZ1284

CRITICAL

L1

RN12

4.7K

7 8

V+
ROUT1
ROUT2
ROUT3
ROUT4
ROUT5

DOUT1
DOUT2
DOUT3

V-

NDCDA#
NSINA NRTSA
NSOUTA
NDTRA

RRCD1N
RRCD2N
RRCD3N
RRCD4N
RRCD5N
RRCD6N
RRCD7N
RRCD8N

RRCD9N

FB4 120-600mA
FB7 120-600mA

FB8 120-600mA
FB9 120-600mA

D2 1N4148S

U5_1

C216 0.1u_Y5V C57 0.1u_Y5V

1
19

CTSA#

18

DSRA#

17

SINA

14
12

NRTSA

5

NDTRA

6

NSOUTA

8

U5_10

D3 1N4148S

10

C58 0.1u_Y5V

LPT1B

26

31

27

32

28

33

29

34

30

YCN25F-001-1

20

VCC

22

GND

PRND0

26

PRND1

25

PRND2

23

PRND3

21

PRND4

19

PRND5

18

PRND6

17

PRND7

16

STB#

24

PS2 KEYBOARD & MOUSE CONNECTOR

MS_DT
MS_CK

KB_DTKBDAT#
KB_CK

180p_NPO

NRIA# (21)
NRIB# (21)

LPT_VC

C60

0.1u_Y5V

0.1u_Y5V

CN7

+12V

-12V

NDSRA#
NCTSA#

NRIA#

D5 1N4148S

C62

135

246

VCC5

NRTSB

1

NDSRB#

3

NCTSB#

5

NRIB#

7

NDCDB#

1

NSOUTB

3

NSINB

5

NDTRB

7

VCC5

R162
1K

JKBMS1

7
8

11
12

MS

1
2
5
6

7

8

YMD12P-1

KB

2

SERIAL PORT 2

20

2

NCTSB#

3

NDSRB#

4

NSINB

7

NDCDB#

9

RTSB#

16

DTRB#

15

SOUTB

13
11

2
4
6
8

2
4
6
8

FB5 80-0805-3A

10

9
4

3

U22

VCC
RIN1
RIN2
RIN3
RIN4
RIN5

DIN1
DIN2
DIN3
GND

75232S-SSOP20

CN11
180p_NPO

CN12
180p_NPO

V+
ROUT1
ROUT2
ROUT3
ROUT4
ROUT5

DOUT1
DOUT2
DOUT3

V-

NDCDB# NDSRB#
NSINB
NSOUTB
NDTRB NRIB#

PARALLAL PORT

LPT1A

STB#

1
2

PRND1

3

PRND2

4

PRND3

5

PRND4

6

PRND5

7

PRND6

8

PRND7

9

ACK#

10

BUSY

11

PE

12

SLCT

13

YCN25F-001-1

C63

0.1u_Y5V

1
19
18
17
14
12

5
6
8
10

1 2
3 4
5
7 8
9

14
15
16
17
18
19
20
21
22
23
24
25

F1

1

U5_1
CTSB#

DSRB#
SINB
DCDB#

NRTSB
NDTRB
NSOUTB
U5_10

C217 0.1u_Y5V

COM2

6
10

COM2

AFD#
ERR#
PINIT#
SLIN#

FS1

1.1A-microSMD110

POLY SWITCH

NRTSB
NCTSB#

COMM_B_DET#

USB_STR

FLOPPY CONNECTORLPC I/O STRAPPING RESISTOR PASSWORD CLEAR

BRD_V0

R165 1K
R169 1K

BRD_V0, BRD_V1 PULLDOWN FOR INITIAL VERSION.

PWRBTN#
GD_10MS
GD_30MS#
PWRGDA

MR#

IDEA_RST#
IDEB_RST#

5V_USB_AUX
5V_USB_MAIN#

7

VBAT

VCC3
VCC3

VCC3
VCC3

VCC3
VCC3
VCC3
VCC3

VCC3

SEC_TPM_PRES

HOOD_SENSE#(12)

COMM_B_DET#

A A

HOOD_LOCK#
HOOD_UNLOCK#

MB_ADPT_DET#
MB_POWER_ON#

MB_DEV_DET#
SIO_TRMTRIP#
GP25

DDRC
SYSOPT

8

R553 10M
R172 1M

R174 4.7K
R179 2.7K R183 4.7K

R182 2.7K
R186 4.7K

R188 4.7K
R191 4.7K
R192 4.7K
R583 4.7K

R649 4.7K
R856 10K

BRD_V1SKTOCC#

6

R166 X_4.7K
R170 X_4.7KR168 10M

R177 4.7K
R180 4.7K

R185 4.7K
R189 8.2K

R190 X_8.2K

R648 1K
R650 1K

R854 1K
R855 1K

VCC3
VCC3

3VSB
3VSB
3VSB
3VSB

3VSB
VCC3

VCC5
VCC5

VCC5
VCC5

FDD1

1 2

7 8

9 10
11 12
13 14
15 16
17 18
19
21 22
23 24
25 26
27 28
29 30
31 32
33 34

5

DRVDEN0
FDD_2M

4
6

INDEX#
MOA#
DSB#
DSA#
MOB#
DIR#
STEP#

20

WRDATA#
WE#
TRACK0#
WP#
RDDATA#
HEAD#
DSKCHG#

CN-BH-D2x17-2:3.5-BK

4

INDEX#
TRACK0#
WP#
RDDATA#
DSKCHG#

FDD_2M

R173 150
R176 150
R178 150
R181 150
R184 150

R187 1K

3

VCC5

PSWD1

WORD

1
2

YJ102

PASSWORD CLEAR Function

ON
OFF CLEAR

MSI

Title

Size Document Number Rev

Date: Sheet of

MICRO-STAR INt'L CO., LTD.

LPC SUPER I/O & CONNECTORS

2

R167 330

NORMAL

H/W Project Leader : Andy Chen
H/W Project Engineer : Prudence Wang

VISE (MS-6715)

PSWRD (12)

14 30Friday, September 27, 2002

VCC3

1

0A

8

R193 1K
R194 1K
R195 X_1K
R196 3.3K

D D

C C

B B

VCC3

C65

0.1u_Y5V

AC_14(13)

AC_RST#(11)

AC_SDIN0(11)

AC_SDOUT(11)

AC_SYNC(11)

AC_BITCLK(11)

C66

0.1u_Y5V

R513 47

R199 47

X_47p_NPOC234

U19_6

AUX_L
AUX_R

R205 X_4.7K
R206 4.7K

CD_L
CD_GND
CD_R

COPPER

FB10 0-0805

7

+5VR

CB75

0.1u_Y5V

ID0#
ID1#
JS0
S_PDIF

4847464544424140394338

U7

NC

1
9

4
7

2
3

11

8
5

10

6

12

NC

DVDD1

TEST6

DVDD2

DVSS1
DVSS2

XTL_IN
XTL_OUT

RESET#
SDATA_IN
SDATA_OUT
SYNC
BIT_CLK

PC_BEEP

TEST5

AD1981A/B

PHONE

AUXL

AUXR

1314151617181920212223

JS1
VIDEO_R

TEST4

TEST1

VIDEOL

VIDEOR

AVSS2

CDL

TEST2

DACOUTL

DACOUTR

CDGND

CDR

MIC1

37

MONO

AVDD2

MIC2

LOUTR

LOUTL

VRDA
VRAD

AFILT2
AFILT1

VREF

AVDD1

AVSS1

LINL

LINR

24

ADI-AD1981B

CRITICAL

IN_R

IN_L

MIC_IN2

+5VR

+5VR

MIC_IN

OUT_R

OUT_L

6

36
35

34

NC

33

NC

32
31

30
29

28

NC

27
25

26

C76 1u-0805_Y5V

C78 1u-0805_Y5V

C80 0.1u_Y5V

R211 0
C82 4.7u-0805_Y5V

R556 0
C84 4.7u-0805_Y5V

C85 0.1u_Y5V

FB39 600-0805

FB40 600-0805

HP_ROUT
HP_LOUT

+5VR

CB76

0.1u_Y5V

U19_34

U19_33

U19_32
U19_31

U19_30
U19_29

AC_VREF

+5VR

C68

0.1u_Y5V

470p_X7R

470p_X7R

5

+5VR

0.01u_Y5VC64

C70

0.1u_Y5V

R371

R202 4.7K
R203 4.7K

R374

R207 4.7K
R208 4.7K

MICIN2

R209 4.7K

MIC_PWR2

R212 2.2K

MIC_PWR1

R217 2.2K

MICIN MIC1

R219 4.7K

JS1

R505 2.2K

MONO_R

C259 1u-0805_Y5V

MONO_L

C260 1u-0805_Y5V

C90

C92

C69
1u-0805_Y5V

CODEC AD1981A

C73

C72

270p_X7R

270p_X7R

INR

C77

470p_X7R

INL

C79

470p_X7R

MIC2

C83

270p_X7R

C87

270p_X7R

HP_RO
MONO_R_R
MONO_L_R

HP_LO

4

C74

270p_X7R

10
11
12
13
18

J3B
PHONE_JACK

1
2
4
5
3

J3C
PHONE_JACK

6
7
8
9

17

J3A
PHONE_JACK

C75

270p_X7R

LINE_IN

MIC_IN

LINE_OUT

3

2

AUDIO CODE REGULATORS

VR1
LM78L05-SOT89

+12V

CB77

0.1u_Y5V

3

OUT

GNDINGND

214

FRONT AUDIO

MIC_IN_RMIC_IN_L

MIC_IN

FAUD_DET#(12)

14
15
16

R586 4.22KST-NC255 0.22u_Y5V

MIC_BIAS
HP_R

FAUD_DET#
HP_L

+5VR

C250 4.7u-0805_Y5V

VCC3

R210 8.2K

S_PDIF HP_L

C223

470p_X7R

HP_LOUT HP_L

CT5 100u-16V

HP_ROUT

CT6 100u-16V

AUDIO1

1 2

MIC GNDA

3 4

MIC_VCC VCCA

5 6

FPOUT_R RET_R

7 8

DET# KEY

9 10

FPOUT_L RET_L

FRONT_AUDIO

MIC_PWR3

FAUD_DET#

0.01u_Y5VC218

+

+

R204
470

R213
470

R268 2.2KR554 1.5K

R504 130RST

R555 X_130RST

R201 75

R218 75

AUX IN

AUX_R AUXR

C91 1u-0805_Y5V

AUX_L

C93 1u-0805_Y5V

R530

R531

R222

4.7K

R223

4.7K

CB78

0.1u_Y5V

R220 4.7K

R221 4.7K

1

+5VR

+

CT4
10u-16V

C67 0.1u_Y5V

OUT_R
OUT_L

MIC_BIAS

OUT_L

HP_R

AUXL

AUX1

4
3
2
1

YJ104-BY

(White)

2.54mm

+5VR

CD IN

MONO_R

R227
10K

MONO_L

A A

SPKR(12)

8

R231 20K

R235
10K

MONO_RL MONO_O

Internal Speaker

7

C101

0.01u_Y5V

R239
10K

R225 20KC94 1u-0805_Y5VR224 20K

SPKR_OUTR_SPKR

R238 20KR237 100K 0.01u_Y5VC100

6

+5VR +12V

R229
13KST

VOL_CTRL

R236

3.4KST

CB79

0.1u_Y5V

5

U8

5

VI

7

VC

6

S_GND

15

P_GND

1

NC1

2

NC2

3

NC3

8

NC4

9

NC5

10

NC6

TDA7056AT(3W)

+

CT7
X_100u-25V

VCC

OUT+

OUT-

NC7
NC8

NC9
NC10
NC11
NC12

FB11 0-0805

0.1u_Y5V

AMP_VCCMONO_OUT

4

MONO_OUT+

14

MONO_OUT-

17

11
12
13
18
19
20

CD_R

C95 1u-0805_Y5V

CD_GND

C96 1u-0805_Y5V

CD_L

C97

INTL_SPK1

2
1

SIP2B

4

C98 1u-0805_Y5V

3

C_R
C_G

C_L

C219

MSI

R234

R233

4.7K

2.7K

270p_X7R

MICRO-STAR INt'L CO., LTD.

2

R232

4.7K

Title

Size Document Number Rev

Date: Sheet of

R226 4.7K
R228 2.7K

R230 4.7K

C220

C221
270p_X7R

270p_X7R

H/W Project Leader : Andy Chen
H/W Project Engineer : Prudence Wang

AC97 AUDIO - AD1981A/B

VISE (MS-6715)

CD1

CDR

4

CDG

3
2

CDL

1

YJ104-B

(Black)

2.54mm

15 30Tuesday, October 01, 2002

1

0A

8

D D

C C

B B

AD[0..31](11,19,20,22)

C_BE#[0..3](11,19,20)

FRAME#(11,19,20)

IRDY#(11,19,20)

TRDY#(11,19,20)

DEVSEL#(11,19,20)

STOP#(11,19,20)

PERR#(11,19,20)
SERR#(11,19,20)

PGNT#5(11)
PREQ#5(20)

NIC_IDSEL

PIRQ#H(11,20)

PCI_PME#(11,14,19,20)

LAN_PCLK(13)

PCIRST#1(14)

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C_BE#0
C_BE#1
C_BE#2
C_BE#3

PAR(11,19,20)

LAN_TRST#

LAN AVDD VOLTAGE BLOCK

A A

AVDD

FB14 80-0805-3A

C110

2.2u_Y5V

8

LAN2_5

U9

N7

AD0

M7

AD1

P6

AD2

P5

AD3

N5

AD4

M5

AD5

P4

AD6

N4

AD7

P3

AD8

N3

AD9

N2

AD10

M1

AD11

M2

AD12

M3

AD13

L1

AD14

L2

AD15

K1

AD16

E3

AD17

D1

AD18

D2

AD19

D3

AD20

C1

AD21

B1

AD22

B2

AD23

B4

AD24

A5

AD25

B5

AD26

B6

AD27

C6

AD28

C7

AD29

A8

AD30

B8

AD31

M4

C_BE#0

L3

C_BE#1

F3

C_BE#2

C4

C_BE#3

F2

FRAME#

F1

IRDY#

G3

TRDY#

H3

DEVSEL#

H1

STOP#

J1

PAR

J2

PERR#

A2

SERR#

C3

REQ#

J3

GNT#

A4

IDSEL

H2

INTA#

A6

PME#

A3

PCICLK

C2

PCI_RST#

D12

TDI

B12

TDO

A12

TMS

C12

TCK

D11

TRST#

F4

M66EN

Broadcom BCM5705

CRITICAL

7

VCC3LAN2_5 LAN1_2

3VSB

K14

L13

P11

A11

F11

K12

L12A7B3C5E1E4G1K3L4N6P2

VDDP

VDDP

VDDP

VDD_IO

VDD_IO

VDD_IO

VDD_IO

VDD_PCI

VDD_PCI

VDD_PCI

VDD_PCI

VDD_PCI

VDD_PCI

VDD_PCI

VDD_PCI

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

B7D4D5D6D7D8D9E2E5E6E7E8E9F5F6F7F8F9F10G4G5G6G7G8G9

CB91

0.1u_Y5V
CB116

0.01u_Y5V

VCC3

3VSB

7

6

E12H5H6H7H8J5J6J7J8J9J10K5K6K7K8K9K10

VDDC

VDDC

VDDC

VDDC

VDDC

VDDC

VDDC

VDDC

VDDC

VDDC

VDDC

VDDC

VDDC

VDDC

VDDC

GND

GND

GND

GND

G10K2H9

R561 X_300

VDDC

GND

GND

GND

M12

M13M6L6L9N1

VDD_PCI

VDD_PCI

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

LAN Decoupling Capacitors

Close chipset, and trace length is less than 20mils.

CB92

0.1u_Y5V
CB109

0.01u_Y5V
CB110

0.01u_Y5V

6

CB96

0.1u_Y5V
CB104

0.1u_Y5V
CB122

0.01u_Y5V

5

PLL_VDD3

R557 0

PLL_VDD2

AVDDL
AVDD

M14L5L10

N14P8P12

P13

P14

VDDC

VDDC

VDDC

VDDC

VDDC

VDDC

VDDC

VDDC

VDDC

GND

GND

GND

GND

GND

GNDNCNCNCNCNCNCNCNCNCNCNCNCNCNC

N12

N13H4H10J4J11K4K11L7L8

CLKRUN#

CB97

0.1u_Y5V
CB105

0.1u_Y5V

5

4

3

2

1

LAN EEPROM

LAN2_5

PAM-5
code

CB80

VDD_PLL3

VDD_XTAL

SPD100LEDB#

SPD10000LEDB#

TRAFFICLEDB

VAUX/PRSNT

M11

N8

LOW_PWR
NC1

NC2

4

0.1u_Y5V

TR_D0+

TR_D0-

TR_D1+

TR_D1-

TR_D2+

TR_D2-

TR_D3+

TR_D3-

REG_SUP25

REG_CTL25

REG_SEN25
REG_SUP12

REG_CTL12

REG_SEN12

GPIO0
GPIO1
GPIO2

LINKLEDB

SMB_CLK

SMB_DATA

EECLK

EEDATA

NC/EEDIN

NC/EEDOUT

VESD1
VESD2
VESD3

RDAC

SCLK

BIASVDD

DC

C8

B13
B14

C13
C14

D13
D14

E13
E14

B11
C11
C10

B9
B10
A9

H12
K13
J13

H13
G12

G13
G14

A10
C9

M10
P10

N9
P9

P1
G2
A1

D10
H11

CS#

E11
E10

SI

G11

SO

N11

XI

25M-18pF-30ppm-HC49S

N10

XO

A14

J12

R560 X_300
R260 X_0

R261 X_0

TR_D0+
TR_D0-

TR_D1+
TR_D1-

TR_D2+
TR_D2-

TR_D3+
TR_D3-

100_LED#
1G_LED#

TR_D0+
TR_D0-

TR_D1+
TR_D1-

TR_D2+
TR_D2-

TR_D3+
TR_D3-

CTL25

CTL12

BWP#

100_LED#
1G_LED#

TR_LED

EE_CLK
EE_DATA

VCC5

RDAC

L_XI

R255 0

VDD_BIAS

VAUX

R240 49.9RST
R241 49.9RST

R242 49.9RST
R243 49.9RST

R244 49.9RST
R245 49.9RST

R246 49.9RST
R247 49.9RST

R248 330
R249 330

TR_D0+ (22)
TR_D0- (22)

TR_D1+ (22)
TR_D1- (22)

TR_D2+ (22)
TR_D2- (22)

TR_D3+ (22)
TR_D3- (22)

R558 X_330

R559 X_470

R250 1K

100_LED# (22)
1G_LED# (22)

TR_LED (22)
SMBCLK (12,13,17,18,23,28)

SMBDATA (12,13,17,18,23,28)

R251 1K
R252 1K

EE_DI
EE_DO (12,28)

R253 1.24KST

EE_CS#
EE_SCLK

R629 X_10K
R630 X_10K

R254

Y3

330K

XOL_XO

R256 4.7RST-N
C104

0.1u_Y5V
R258 4.7KR257 4.7K

LAN2_5

3VSB
3VSB

3

3VSB
LAN2_5
LAN2_5

LAN1_2
LAN1_2

3VSB

3VSB
3VSB

3VSB
3VSB

18p_NPOC102

18p_NPOC103

LAN2_5

3VSB

A13

F14

F13

F12

H14P7J14

AVDD

AVDD

AVDDL

AVDDL

VDD_PLL2

L11

L14M8M9

LAN2_5LAN1_2 LAN1_2

CB106

0.1u_Y5V
CB115

0.01u_Y5V

EE_CS#

EE_SCLK

EE_DO(28)

EE_DI

EE_CLK
EE_DATA BWP#

LAN VOLTAGE REGULATION

If use Motorola MJD45H11

0.7inch square to dissipate the heat.

CTL25

Q14
MJD45H11-TO252

CRITICAL

Vf=650mV when
Id=650mA

{CURRENT}

SS22-S210-DO214AA

CRITICAL

DZ3

LAN2_5_DZ

CTL12

Q15
MJD45H11-TO252

CRITICAL

These transistors must away from the BCM7052 with 1.5inch.

PLL_VDD2

LAN AVDDL VOLTAGE BLOCK

AVDDL

MSI

Title

Size Document Number Rev

Date: Sheet of

2

U31

1

CS

2

SK

3

DI

4

DO

X_AT93C46

CRITICAL

U10

1

A0

2

A1

3

A2

6

SCL

5

SDA

AT24C256

CRITICAL

+

+

Voltage drop to prevent heat generate from BCP69
within 1.3V Vce. Demo board measure over
90degreeC within normal NWTEST in one client.

+

NOT INSTALL

8

VCC

7

NC
ORG
GND

VCC

VSS

WP#

CT8
10u-16V

CT9
10u-16V

If use Motorola MJD45H11

1.5inch square to dissipate the heat.

CT10
10u-16V

BCM4401
U10,Q14,Q15,DZ3
R244,R245,R246,R247
U31INSTALL

6
5

8

4
7

CB82

0.1u_Y5V

CB84

0.1u_Y5V

CB86

0.1u_Y5V

CB339

0.1u_Y5V

3VSB

CB81

0.1u_Y5V

CB83

0.01u_Y5V

88mA@ 0.564W

CB85

0.01u_Y5V

700mA@ 0.840W

CB87

0.01u_Y5V

LAN PLL VOLTAGE BLOCK

FB12 80-0805-3A

C105

C106

0.1u_Y5V

2.2u_Y5V

FB13 80-0805-3A

C107

C108

0.1u_Y5V

2.2u_Y5V

MICRO-STAR INt'L CO., LTD.

H/W Project Leader : Andy Chen
H/W Project Engineer : Prudence Wang

Broadcom BCM5702

VISE (MS-6715)

16 30Tuesday, October 01, 2002

1

3VSB

3VSB

LAN2_5

LAN1_2

LAN1_2

LAN1_2

0A

5

DDR DIMM1 DDR DIMM2

DIMM1

48
43
41

130

37
32

125

29

122

27

141
118
115
167

59
52

113
157

158

71

163
154

65
63

5
14
25
36
56
67
78
86
47

97

107
119
129
149
159
169
177
140

44
45
49
51

134
135
142
144

21

111

92
91

181
182
183

16
17

137
138

76
75

82

184

7
38
46
70
85

108
120
148
168

81
89
93

100
116
124
132
139
145
152
160
176

DIMM-D184-BK

SIGNALS

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/NC
A13/NC

BA0
BA1
NC/BA2

CS0#
CS1#
NC/CS2#
NC/CS3#

RAS#
CAS#
WE#

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8

DQM0/DQS9
DQM1/DQS10
DQM2/DQS11
DQM3/DQS12
DQM4/DQS13
DQM5/DQS14
DQM6/DQS15
DQM7/DQS16
DQM8/DQS17

MECC0
MECC1
MECC2
MECC3
MECC4
MECC5
MECC6
MECC7

CKE0
CKE1

SCL
SDA

SA0
SA1
SA2

CK0/NC
CK0#/NC
CK1/CK0
CK1#/CK0#
CK2/NC
CK2#/NC

ID_VDD
SPD_VDD

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

POWER

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

VREF

FETEN/NC

NC/RESET#

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

NC
NC
NC
NC

WP

ADDR.=1010000B ADDR.=1010001B

VCC_DDR

VCC_DDR

5

MA_A0
MA_A1
MA_A2
MA_A3
MA_A4
MA_A5
MA_A6
MA_A7
MA_A8
MA_A9
MA_A10
MA_A11
MA_A12

MBA_A0
MBA_A1

MRAS_A#
MCAS_A#
MWE_A#

MDQS_A0
MDQS_A1
MDQS_A2
MDQS_A3
MDQS_A4
MDQS_A5
MDQS_A6
MDQS_A7

MDQM_A0
MDQM_A1
MDQM_A2
MDQM_A3
MDQM_A4
MDQM_A5
MDQM_A6
MDQM_A7

SMBCLK
SMBDATA

MA_A[0..12](9)

D D

MBA_A0(9)
MBA_A1(9)

MCS_A#0(9)
MCS_A#1(9)

MRAS_A#(9)
MCAS_A#(9)

MWE_A#(9)

MDQS_A[0..7](9)

C C

MDQM_A[0..7](9)

MCKE_A0(9)
MCKE_A1(9)

SMBCLK(12,13,16,18,23,28)

SMBDATA(12,13,16,18,23,28)

B B

MCLK_A1(9)

MCLK_A#1(9)

MCLK_A0(9)

MCLK_A#0(9)

MCLK_A2(9)

MCLK_A#2(9)

A A

4

3

2

1

DDR Terminational Resisitors

DIMM2

48
43
41

130

37
32

125

29

122

27

141
118
115
167

59
52

113
157

158

71

163
154

65
63

5
14
25
36
56
67
78
86
47

97

107
119
129
149
159
169
177
140

44
45
49
51

134
135
142
144

21

111

92
91

181
182
183

16
17

137
138

76
75

82

184

7
38
46
70
85

108
120
148
168

81
89
93

100
116
124
132
139
145
152
160
176

DIMM-D184-BK

SIGNALS

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/NC
A13/NC

BA0
BA1
NC/BA2

CS0#
CS1#
NC/CS2#
NC/CS3#

RAS#
CAS#
WE#

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8

DQM0/DQS9
DQM1/DQS10
DQM2/DQS11
DQM3/DQS12
DQM4/DQS13
DQM5/DQS14
DQM6/DQS15
DQM7/DQS16
DQM8/DQS17

MECC0
MECC1
MECC2
MECC3
MECC4
MECC5
MECC6
MECC7

CKE0
CKE1

SCL
SDA

SA0
SA1
SA2

CK0/NC
CK0#/NC
CK1/CK0
CK1#/CK0#
CK2/NC
CK2#/NC

ID_VDD
SPD_VDD

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

POWER

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

VREF

FETEN/NC

NC/RESET#

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

MDQ_A0

2

MDQ_A1

4

MDQ_A2

6

MDQ_A3

8

MDQ_A4

94

MDQ_A5

95

MDQ_A6

98

MDQ_A7

99

MDQ_A8

12

MDQ_A9

13

MDQ_A10

19

MDQ_A11

20

MDQ_A12

105

MDQ_A13

106

MDQ_A14

109

MDQ_A15

110

MDQ_A16

23

MDQ_A17

24

MDQ_A18

28

MDQ_A19

31

MDQ_A20

114

MDQ_A21

117

MDQ_A22

121

MDQ_A23

123

MDQ_A24

33

MDQ_A25

35

MDQ_A26

39

MDQ_A27

40

MDQ_A28

126

MDQ_A29

127

MDQ_A30

131

MDQ_A31

133

MDQ_A32

53

MDQ_A33

55

MDQ_A34

57

MDQ_A35

60

MDQ_A36

146

MDQ_A37

147

MDQ_A38

150

MDQ_A39

151

MDQ_A40

61

MDQ_A41

64

MDQ_A42

68

MDQ_A43

69

MDQ_A44

153

MDQ_A45

155

MDQ_A46

161

MDQ_A47

162

MDQ_A48

72

MDQ_A49

73

MDQ_A50

79

MDQ_A51

80

MDQ_A52

165

MDQ_A53

166

MDQ_A54

170

MDQ_A55

171

MDQ_A56

83

MDQ_A57

84

MDQ_A58

87

MDQ_A59

88

MDQ_A60

174

MDQ_A61

175

MDQ_A62

178

MDQ_A63

179
9

NC

101

NC

102

NC

173

NC

DDR_VREF1DDR_VREF1

1
90

WP

C112

103

0.1u_Y5V-0402

10
15

22
30
54
62
77
96
104
112
128
136
143
156
164
172
180

3
11
18
26
34
42
50
58
66
74

VCC_DDR

2

MDQS_A7

1 2

MDQM_A7

3 4

MDQ_A57

5 6

MDQ_A56

7 8

MDQ_A37

1 2

MDQ_A33

3 4

MDQ_A36

5 6

MDQ_A32

7 8

MDQ_A53

1 2

MDQ_A52

3 4

MDQ_A49

5 6

MDQ_A48

7 8

MDQ_A11

1 2

MDQ_A10

3 4

MDQ_A15

5 6

MDQ_A14

7 8

MDQS_A5

R587 56-0402

MDQM_A5

R588 56-0402

MDQ_A41

R589 56-0402

MDQ_A45

R590 56-0402

MDQ_A23

R591 56-0402

MDQ_A20

R592 56-0402

MA_A1

1 2

MAB_A1

3 4

MA_A2

5 6

MAB_A2

7 8

MAB_A5

1 2

MA_A8

3 4

MA_A7

5 6
7 8

MAB_A3

1 2

MA_A3

3 4

MAB_A4

5 6

MA_A4

7 8

MBA_A1

1 2

MA_A10

3 4

MA_A0

5 6
7 8

MCS_A#3

1 2

MCS_A#1

3 4

MCS_A#2

5 6

MCAS_A#

7 8

MCKE_A0

1 2

MCKE_A2

3 4

MCKE_A3

5 6

MCKE_A1

7 8

MA_A5

R593 47-0402

MA_A6

R594 47-0402

MA_A9

R595 47-0402

MA_A11

R596 47-0402

MA_A12

R597 47-0402

MBA_A0

R598 47-0402

MRAS_A#

R599 47-0402

MWE_A#

R600 47-0402

MCS_A#0

R601 47-0402

VTT_DDR VTT_DDR VCC_DDR

CB124

0.1u_Y5V-0402
CB126

0.1u_Y5V-0402
CB129

0.1u_Y5V-0402
CB132

0.1u_Y5V-0402
CB135

0.1u_Y5V-0402
CB138

0.1u_Y5V-0402
CB143

0.1u_Y5V-0402
CB148

0.1u_Y5V-0402
CB153

0.1u_Y5V-0402
CB158

0.1u_Y5V-0402
CB163

0.1u_Y5V-0402
CB168

0.1u_Y5V-0402
CB173

0.1u_Y5V-0402

Place these decoupling capacitors close to VTT_DDR termination resistors.
One decoupling capacitor for each R-pack.

MSI

Title

Size Document Number Rev

Date: Sheet of

VCC_DDR

VCC_DDR

VCC_DDR

3

MA_A0
MAB_A1
MAB_A2
MAB_A3
MAB_A4
MAB_A5
MA_A6
MA_A7
MA_A8
MA_A9
MA_A10
MA_A11
MA_A12

MBA_A0
MBA_A1

MRAS_A#
MCAS_A#
MWE_A#

MDQS_A0
MDQS_A1
MDQS_A2
MDQS_A3
MDQS_A4
MDQS_A5
MDQS_A6
MDQS_A7

MDQM_A0
MDQM_A1
MDQM_A2
MDQM_A3
MDQM_A4
MDQM_A5
MDQM_A6
MDQM_A7

SMBCLK
SMBDATA

MDQ_A0

2

MDQ_A1

4

MDQ_A2

6

MDQ_A3

8

MDQ_A4

94

MDQ_A5

95

MDQ_A6

98

MDQ_A7

99

MDQ_A8

12

MDQ_A9

13

MDQ_A10

19

MDQ_A11

20

MDQ_A12

105

MDQ_A13

106

MDQ_A14

109

MDQ_A15

110

MDQ_A16

23

MDQ_A17

24

MDQ_A18

28

MDQ_A19

31

MDQ_A20

114

MDQ_A21

117

MDQ_A22

121

MDQ_A23

123

MDQ_A24

33

MDQ_A25

35

MDQ_A26

39

MDQ_A27

40

MDQ_A28

126

MDQ_A29

127

MDQ_A30

131

MDQ_A31

133

MDQ_A32

53

MDQ_A33

55

MDQ_A34

57

MDQ_A35

60

MDQ_A36

146

MDQ_A37

147

MDQ_A38

150

MDQ_A39

151

MDQ_A40

61

MDQ_A41

64

MDQ_A42

68

MDQ_A43

69

MDQ_A44

153

MDQ_A45

155

MDQ_A46

161

MDQ_A47

162

MDQ_A48

72

MDQ_A49

73

MDQ_A50

79

MDQ_A51

80

MDQ_A52

165

MDQ_A53

166

MDQ_A54

170

MDQ_A55

171

MDQ_A56

83

MDQ_A57

84

MDQ_A58

87

MDQ_A59

88

MDQ_A60

174

MDQ_A61

175

MDQ_A62

178

MDQ_A63

179
9

101
102
173

1
90

C111

103

0.1u_Y5V-0402

10
15

22
30
54
62
77
96
104
112
128
136
143
156
164
172
180

3
11
18
26
34
42
50
58
66
74

VCC_DDR

4

VCC_DDR

MDQ_A[0..63] (9)

R516
75RST

R517
75RST

MAB_A[1..5](9)

MCS_A#2(9)
MCS_A#3(9)

MCKE_A2(9)
MCKE_A3(9)

MCLK_A4(9)

MCLK_A#4(9)

MCLK_A3(9)

MCLK_A#3(9)

MCLK_A5(9)

MCLK_A#5(9)

VTT_DDR

MDQ_A9

1 2

VTT_DDR

MDQ_A8
MDQ_A3
MDQ_A7
MDQ_A6
MDQ_A2
MDQM_A0
MDQS_A0
MDQM_A1
MDQ_A13
MDQS_A1
MDQ_A12
MDQS_A2
MDQ_A21
MDQ_A17
MDQ_A16
MDQ_A22
MDQ_A18
MDQM_A2

MDQM_A3
MDQS_A3
MDQ_A29
MDQ_A25
MDQ_A31
MDQ_A27
MDQ_A26
MDQ_A30
MDQ_A38
MDQM_A4
MDQ_A34
MDQS_A4
MDQ_A40
MDQ_A44
MDQ_A35
MDQ_A39
MDQ_A28
MDQ_A24
MDQ_A19

MDQ_A1
MDQ_A5
MDQ_A4
MDQ_A0
MDQ_A47
MDQ_A46
MDQ_A43
MDQ_A42
MDQ_A61
MDQ_A60
MDQ_A51
MDQ_A50
MDQ_A58
MDQ_A59
MDQ_A63
MDQ_A62
MDQ_A55
MDQ_A54
MDQS_A6
MDQM_A6

3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8

RN13
56-0402

RN15
56-0402

RN17
56-0402

RN19
56-0402

RN24
47-0402

RN28
47-0402

RN30
47-0402

RN32
47-0402

RN34
47-0402

RN38
47-0402

DECOUPLING CAPACITORS

CB125

0.1u_Y5V-0402
CB127

0.1u_Y5V-0402
CB130

0.1u_Y5V-0402
CB133

0.1u_Y5V-0402
CB136

0.1u_Y5V-0402
CB139

0.1u_Y5V-0402
CB144

0.1u_Y5V-0402
CB149

0.1u_Y5V-0402
CB154

0.1u_Y5V-0402
CB159

0.1u_Y5V-0402
CB164

0.1u_Y5V-0402
CB169

0.1u_Y5V-0402
CB174

0.1u_Y5V-0402

MICRO-STAR INt'L CO., LTD.

DDR DIMM 1 & 2

VISE (MS-6715)

+

+

H/W Project Leader : Andy Chen
H/W Project Engineer : Prudence Wang

17 30Friday, September 27, 2002

1

VTT_DDR

RN14
56-0402

RN16
56-0402

RN18
56-0402

RN20
56-0402

RN23
56-0402

RN25
56-0402

RN27
56-0402

RN29
56-0402

RN31
56-0402

RN33
56-0402

RN35
56-0402

RN37
56-0402

RN39
56-0402

RN40
56-0402

RN21
56-0402

CT11
1000u-6.3V
CT51
1000u-6.3V
CB207

0.1u_Y5V-0402
CB165

0.1u_Y5V-0402
CB170

0.1u_Y5V-0402
CB175

0.1u_Y5V-0402
CB342

0.1u_Y5V-0402
CB343

0.1u_Y5V-0402

CB345

0.1u_Y5V-0402
CB346

0.1u_Y5V-0402
CB347

0.1u_Y5V-0402

0A

5

DDR DIMM3 DDR DIMM4

DIMM3

48

SIGNALS

A0

43

A1

41

A2

130

A3

37

A4

32

A5

125

A6

29

A7

122

A8

27

A9

141
118
115
167

59
52

113
157

158

71

163
154

65
63

5
14
25
36
56
67
78
86
47

97

107
119
129
149
159
169
177
140

44
45
49
51

134
135
142
144

21

111

92
91

181
182
183

16
17

137
138

76
75

82

184

7
38
46
70
85

108
120
148
168

81
89
93

100
116
124
132
139
145
152
160
176

DIMM-D184-BK

A10/AP
A11
A12/NC
A13/NC

BA0
BA1
NC/BA2

CS0#
CS1#
NC/CS2#
NC/CS3#

RAS#
CAS#
WE#

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8

DQM0/DQS9
DQM1/DQS10
DQM2/DQS11
DQM3/DQS12
DQM4/DQS13
DQM5/DQS14
DQM6/DQS15
DQM7/DQS16
DQM8/DQS17

MECC0
MECC1
MECC2
MECC3
MECC4
MECC5
MECC6
MECC7

CKE0
CKE1

SCL
SDA

SA0
SA1
SA2

CK0/NC
CK0#/NC
CK1/CK0
CK1#/CK0#
CK2/NC
CK2#/NC

ID_VDD
SPD_VDD

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

POWER

DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

VREF

FETEN/NC

NC/RESET#

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

ADDR.=1010010B ADDR.=1010011B

VCC_DDR

VCC_DDR

5

MA_B0
MA_B1
MA_B2
MA_B3
MA_B4
MA_B5
MA_B6
MA_B7
MA_B8
MA_B9

MA_B11
MA_B12

MBA_B0
MBA_B1

MRAS_B#
MCAS_B#
MWE_B#

MDQS_B0
MDQS_B1
MDQS_B2
MDQS_B3
MDQS_B4
MDQS_B5
MDQS_B6
MDQS_B7

MDQM_B0
MDQM_B1
MDQM_B2
MDQM_B3
MDQM_B4
MDQM_B5
MDQM_B6
MDQM_B7

SMBCLK
SMBDATA

MA_B[0..12](9)

D D

MBA_B0(9)
MBA_B1(9)

MCS_B#0(9)
MCS_B#1(9)

MRAS_B#(9)
MCAS_B#(9)

MWE_B#(9)

MDQS_B[0..7](9)

C C

MDQM_B[0..7](9)

MCKE_B0(9)
MCKE_B1(9)

SMBCLK(12,13,16,17,23,28)

SMBDATA(12,13,16,17,23,28)

B B

MCLK_B1(9)

MCLK_B#1(9)

MCLK_B0(9)

MCLK_B#0(9)

MCLK_B2(9)

MCLK_B#2(9)

A A

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9

4

3

2

1

DDR Terminational Resisitors

DIMM4

48
43
41

130

37
32

125

29

122

27

141
118
115
167

59
52

113
157

158

71

163
154

65
63

5
14
25
36
56
67
78
86
47

97

107
119
129
149
159
169
177
140

44
45
49
51

134
135
142
144

21

111

92
91

181
182
183

16
17

137
138

76
75

82

184

7
38
46
70
85

108
120
148
168

81
89
93

100
116
124
132
139
145
152
160
176

DIMM-D184-BK

SIGNALS

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/NC
A13/NC

BA0
BA1
NC/BA2

CS0#
CS1#
NC/CS2#
NC/CS3#

RAS#
CAS#
WE#

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8

DQM0/DQS9
DQM1/DQS10
DQM2/DQS11
DQM3/DQS12
DQM4/DQS13
DQM5/DQS14
DQM6/DQS15
DQM7/DQS16
DQM8/DQS17

MECC0
MECC1
MECC2
MECC3
MECC4
MECC5
MECC6
MECC7

CKE0
CKE1

SCL
SDA

SA0
SA1
SA2

CK0/NC
CK0#/NC
CK1/CK0
CK1#/CK0#
CK2/NC
CK2#/NC

ID_VDD
SPD_VDD

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

POWER

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

VREF

FETEN/NC

NC/RESET#

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

VCC_DDR

VCC_DDRVCC_DDR

VCC_DDR

3

MA_B0
MAB_B1
MAB_B2
MAB_B3
MAB_B4
MAB_B5
MA_B6
MA_B7
MA_B8
MA_B9
MA_B10
MA_B11
MA_B12

MBA_B0
MBA_B1

MRAS_B#
MCAS_B#
MWE_B#

MDQS_B0
MDQS_B1
MDQS_B2
MDQS_B3
MDQS_B4
MDQS_B5
MDQS_B6
MDQS_B7

MDQM_B0
MDQM_B1
MDQM_B2
MDQM_B3
MDQM_B4
MDQM_B5
MDQM_B6
MDQM_B7

SMBCLK
SMBDATA

MDQ_B0

2

MDQ_B1

4

MDQ_B2

6

MDQ_B3

8

MDQ_B4

94

MDQ_B5

95

MDQ_B6

98

MDQ_B7

99

MDQ_B8

12

MDQ_B9

13

MDQ_B10MA_B10

19

MDQ_B11

20

MDQ_B12

105

MDQ_B13

106

MDQ_B14

109

MDQ_B15

110

MDQ_B16

23

MDQ_B17

24

MDQ_B18

28

MDQ_B19

31

MDQ_B20

114

MDQ_B21

117

MDQ_B22

121

MDQ_B23

123

MDQ_B24

33

MDQ_B25

35

MDQ_B26

39

MDQ_B27

40

MDQ_B28

126

MDQ_B29

127

MDQ_B30

131

MDQ_B31

133

MDQ_B32

53

MDQ_B33

55

MDQ_B34

57

MDQ_B35

60

MDQ_B36

146

MDQ_B37

147

MDQ_B38

150

MDQ_B39

151

MDQ_B40

61

MDQ_B41

64

MDQ_B42

68

MDQ_B43

69

MDQ_B44

153

MDQ_B45

155

MDQ_B46

161

MDQ_B47

162

MDQ_B48

72

MDQ_B49

73

MDQ_B50

79

MDQ_B51

80

MDQ_B52

165

MDQ_B53

166

MDQ_B54

170

MDQ_B55

171

MDQ_B56

83

MDQ_B57

84

MDQ_B58

87

MDQ_B59

88

MDQ_B60

174

MDQ_B61

175

MDQ_B62

178

MDQ_B63

179
9

NC

101

NC

102

NC

173

NC

WP

DDR_VREF2

1
90

C113

103

0.1u_Y5V-0402

10
15

22
30
54
62
77
96
104
112
128
136
143
156
164
172
180

3
11
18
26
34
42
50
58
66
74

VCC_DDR VCC_DDR

4

MDQ_B[0..63] (9)

R646
75RST

R647
75RST

MAB_B[1..5](9)

MCS_B#2(9)
MCS_B#3(9)

MCKE_B2(9)
MCKE_B3(9)

MCLK_B4(9)

MCLK_B#4(9)

MCLK_B3(9)

MCLK_B#3(9)

MCLK_B5(9)

MCLK_B#5(9)

MDQ_B0

2

MDQ_B1

4

MDQ_B2

6

MDQ_B3

8

MDQ_B4

94

MDQ_B5

95

MDQ_B6

98

MDQ_B7

99

MDQ_B8

12

MDQ_B9

13

MDQ_B10

19

MDQ_B11

20

MDQ_B12

105

MDQ_B13

106

MDQ_B14

109

MDQ_B15

110

MDQ_B16

23

MDQ_B17

24

MDQ_B18

28

MDQ_B19

31

MDQ_B20

114

MDQ_B21

117

MDQ_B22

121

MDQ_B23

123

MDQ_B24

33

MDQ_B25

35

MDQ_B26

39

MDQ_B27

40

MDQ_B28

126

MDQ_B29

127

MDQ_B30

131

MDQ_B31

133

MDQ_B32

53

MDQ_B33

55

MDQ_B34

57

MDQ_B35

60

MDQ_B36

146

MDQ_B37

147

MDQ_B38

150

MDQ_B39

151

MDQ_B40

61

MDQ_B41

64

MDQ_B42

68

MDQ_B43

69

MDQ_B44

153

MDQ_B45

155

MDQ_B46

161

MDQ_B47

162

MDQ_B48

72

MDQ_B49

73

MDQ_B50

79

MDQ_B51

80

MDQ_B52

165

MDQ_B53

166

MDQ_B54

170

MDQ_B55

171

MDQ_B56

83

MDQ_B57

84

MDQ_B58

87

MDQ_B59

88

MDQ_B60

174

MDQ_B61

175

MDQ_B62

178

MDQ_B63

179
9

NC

101

NC

102

NC

173

NC

DDR_VREF2

1
90

WP

C114

103

0.1u_Y5V-0402

10
15

22
30
54
62
77
96
104
112
128
136
143
156
164
172
180

3
11
18
26
34
42
50
58
66
74

2

MDQ_B6

1 2

MDQ_B2

3 4

MDQM_B0

5 6

MDQS_B0

7 8

MDQ_B47

1 2

MDQ_B43

3 4

MDQ_B46

5 6

MDQ_B42

7 8

MDQM_B1

1 2

MDQ_B13

3 4

MDQS_B1

5 6

MDQ_B12

7 8

MDQ_B20

R604 56-0402

MDQ_B19

R605 56-0402

MDQ_B23

R606 56-0402

MDQM_B3

R621 56-0402

MDQ_B24

R608 56-0402

MDQ_B32

R609 56-0402

MDQ_B45

R610 56-0402

MDQ_B41

R611 56-0402

MDQM_B5

R612 56-0402

MDQS_B5

R613 56-0402

MA_B1

1 2

MAB_B2

3 4

MA_B2

5 6
7 8

MA_B7

1 2

MA_B9

3 4

MA_B11

5 6
7 8

MA_B6

1 2

MA_B5

3 4

MAB_B5

5 6
7 8

MBA_B1

1 2

MA_B10

3 4

MA_B0

5 6

MAB_B1

7 8

MCS_B#1

1 2

MCS_B#0

3 4

MCS_B#3

5 6

MCS_B#2

7 8

MCKE_B0

1 2

MCKE_B2

3 4

MCKE_B1

5 6

MCKE_B3

7 8

MCAS_B#

R614 47-0402

MRAS_B#

R615 47-0402

MWE_B#

R616 47-0402

MBA_B0

R617 47-0402

MAB_B3

R618 47-0402

MA_B3

R619 47-0402

MA_B4

R620 47-0402

MAB_B4

R607 47-0402

MA_B8

R622 47-0402

MA_B12

R623 47-0402

VTT_DDR VTT_DDR VCC_DDRVCC_DDR

CB176

0.1u_Y5V-0402
CB178

0.1u_Y5V-0402
CB181

0.1u_Y5V-0402
CB184

0.1u_Y5V-0402
CB187

0.1u_Y5V-0402
CB190

0.1u_Y5V-0402
CB195

0.1u_Y5V-0402
CB200

0.1u_Y5V-0402
CB205

0.1u_Y5V-0402
CB210

0.1u_Y5V-0402
CB215

0.1u_Y5V-0402
CB220

0.1u_Y5V-0402
CB225

0.1u_Y5V-0402

Place these decoupling capacitors close to VTT_DDR termination resistors.
One decoupling capacitor for each R-pack.

MSI

Title

Size Document Number Rev

Date: Sheet of

VTT_DDR

MDQ_B63

1 2

VTT_DDR

MDQ_B59
MDQ_B58
MDQ_B62
MDQ_B1
MDQ_B5
MDQ_B4
MDQ_B0
MDQ_B11
MDQ_B10
MDQ_B15
MDQ_B14
MDQ_B9
MDQ_B8
MDQ_B3
MDQ_B7
MDQ_B22
MDQ_B18
MDQM_B2

MDQ_B21
MDQS_B2
MDQ_B17
MDQ_B16
MDQS_B3
MDQ_B29
MDQ_B25
MDQ_B28
MDQ_B31
MDQ_B27
MDQ_B30
MDQ_B26
MDQ_B39
MDQ_B38
MDQM_B4
MDQ_B34
MDQ_B37
MDQS_B4
MDQ_B33
MDQ_B36
MDQ_B40
MDQ_B44
MDQ_B35

MDQ_B53
MDQ_B49
MDQ_B48
MDQ_B52
MDQ_B56
MDQ_B60
MDQ_B51
MDQ_B55
MDQ_B50
MDQ_B54
MDQS_B6
MDQM_B6
MDQS_B7
MDQM_B7
MDQ_B57
MDQ_B61

3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8

RN43
56-0402

RN45
56-0402

RN47
56-0402

RN52
47-0402

RN54
47-0402

RN56
47-0402

RN60
47-0402

RN64
47-0402

RN66
47-0402

DECOUPLING CAPACITORS

CB177

0.1u_Y5V-0402
CB179

0.1u_Y5V-0402
CB182

0.1u_Y5V-0402
CB185

0.1u_Y5V-0402
CB188

0.1u_Y5V-0402
CB191

0.1u_Y5V-0402
CB196

0.1u_Y5V-0402
CB201

0.1u_Y5V-0402
CB206

0.1u_Y5V-0402
CB211

0.1u_Y5V-0402
CB216

0.1u_Y5V-0402
CB221

0.1u_Y5V-0402
CB226

0.1u_Y5V-0402

MICRO-STAR INt'L CO., LTD.

DDR DIMM 3 & 4

VISE (MS-6715)

+

+

H/W Project Leader : Andy Chen
H/W Project Engineer : Prudence Wang

18 30Friday, September 27, 2002

1

VTT_DDR

RN41
56-0402

RN42
56-0402

RN46
56-0402

RN48
56-0402

RN50
56-0402

RN51
56-0402

RN53
56-0402

RN55
56-0402

RN57
56-0402

RN59
56-0402

RN61
56-0402

RN63
56-0402

RN65
56-0402

RN67
56-0402

RN68
56-0402

CT12
1000u-6.3V
CT52
1000u-6.3V

CB217

0.1u_Y5V-0402
CB222

0.1u_Y5V-0402
CB227

0.1u_Y5V-0402
CB353

0.1u_Y5V-0402

0A

8

7

6

5

4

3

2

1

AGP 1.5V 1X/2X/4X/8X SLOT(AGP VER:3.0)

VCC5 = 60mils trace / 15 mils space

AGP1

B1

-OVRCNT

VCC5

D D

C C

B B

PIRQ#B(11,20)

AGP_CLK(13)

GREQ#(10)

ST0(10)
ST2(10)

RBF#(10)

DBI_LO(10)

SBA0(10)
SBA2(10)

SB_STB(10)

SBA4(10)
SBA6(10)

GAD31(10)
GAD29(10)

GAD27(10)
GAD25(10)

AD_STB1(10)

GAD23(10)
GAD21(10)

GAD19(10)
GAD17(10)

GC_BE#2(10)

GIRDY#(10)

GDEVSEL#(10)

GC_BE#1(10)

GAD14(10)
GAD12(10)

GAD10(10)

GAD8(10)

AD_STB0(10)

GAD7(10)
GAD5(10)

GAD3(10)
GAD1(10)

GPERR#
GSERR#

AGP_REF

VCC3

VCC3_SB

VCC_AGP

C115

0.1u_Y5V

B2

5V

B3

5V

B4

USB+

B5

GND

B6

-INTB

B7

CLK

B8

-REQ

B9

3.3V

B10

ST0

B11

ST2

B12

-RBF

B13

GND

B14

RESERVED

B15

SBA0

B16

3.3V

B17

SBA2

B18

SB_STB

B19

GND

B20

SBA4

B21

SBA6

B22

RSVD/KEY

B23

GND/KEY

B24

AUX3V/KEY

B25

3.3V/KEY

B26

AD31

B27

AD29

B28

3.3V

B29

AD27

B30

AD25

B31

GND

B32

AD_STB1

B33

AD23

B34

VDDQ

B35

AD21

B36

AD19

B37

GND

B38

AD17

B39

C/-BE2

B40

VDDQ

B41

-IRDY

B42

AUX3V/KEY

B43

GND/KEY

B44

RSVD/KEY

B45

3.3V/KEY

B46

-DEVSEL

B47

VDDQ

B48

-PERR

B49

GND

B50

-SERR

B51

C/-BE1

B52

VDDQ

B53

AD14

B54

AD12

B55

GND

B56

AD10

B57

AD8

B58

VDDQ

B59

AD_STB0

B60

AD7

B61

GND

B62

AD5

B63

AD3

B64

VDDQ

B65

AD1

B66

VREF_CG

AGP Slot-D124 _1.5V

PIRQ#A / PIRQ#B

-TYPEDET

RESERVED

USB-

GND

-INTA

-RST

-GNT

RESERVED

-PIPE
GND

-WBF

SBA1
SBA3

-SB_STB
GND

SBA5
SBA7

RSVD/KEY

GND/KEY

RSVD/KEY

3.3V/KEY
AD30
AD28

AD26
AD24

GND

-AD_STB1
C/-BE3

VDDQ

AD22
AD20

GND
AD18
AD16

VDDQ

-FRAME

RSVD/KEY

GND/KEY

RSVD/KEY

3.3V/KEY

-TRDY

-STOP

-PME

GND
AD15

VDDQ

AD13
AD11

GND

C/-BE0

VDDQ

-AD_STB0
GND

VDDQ

VREF_GC

12V

3.3V
ST1

3.3V

3.3V

PAR

AD9

AD6
AD4

AD2
AD0

A1

+12V

A2

G_DET#

A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66

VCC3

VCC_AGP

AGP Slot Imax
VCCq 8.0A

VCC3 6.0A
VCC12 1.0A
VCC5 2.0A
VCC3_SB ?A

PIRQ#A (11,20)
PCIRST#2 (14)
GGNT# (10)

ST1 (10)
PIPE# (10)
WBF# (10)

SBA1 (10)
SBA3 (10)

SB_STB# (10)
SBA5 (10)

SBA7 (10)

GAD30 (10)
GAD28 (10)

GAD26 (10)
GAD24 (10)

AD_STB#1 (10)
GC_BE#3 (10)

GAD22 (10)
GAD20 (10)

GAD18 (10)
GAD16 (10)

GFRAME# (10)

GTRDY# (10)
GSTOP# (10)
PCI_PME# (11,14,16,20)

GPAR (10)
GAD15 (10)

GAD13 (10)
GAD11 (10)

GAD9 (10)
GC_BE#0 (10)

AD_STB#0 (10)
GAD6 (10)

GAD4 (10)
GAD2 (10)

GAD0 (10)

PGNT#3(11)
PGNT#4(11)

PCI_CLK3(13)
PCI_CLK4(13)

PCIRST#1(14)

PAR(11,16,20) IRDY# (11,16,20)

AD[0..31](11,16,20,22)

VCC3_SB

+12V

-12V

VCC5

0.1u_Y5V

0.1u_Y5V

PCI EXPANSION RISER (PCI VER:2.2 COMPLY)

U11

14

Put in Solder

CB234 0.1u_Y5V
CB235 0.1u_Y5V

Put in Solder

CB236 0.1u_Y5V

CB238

Put in Solder

CB241

Put in Solder

CB239

0.1u_Y5V

CB242

0.1u_Y5V

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

GNT0#

23

GNT1#

73

CLK0

69

CLK1

9

CLK2

12

RST#

40

PAR

53

AD0

113

AD1

52

AD2

111

AD3

50

AD4

110

AD5

49

AD6

108

AD7

107

AD8

46

AD9

105

AD10

44

AD11

104

AD12

43

AD13

102

AD14

41

AD15

29

AD16

89

AD17

28

AD18

87

AD19

26

AD20

25

AD22

84

AD23

22

AD24

81

AD25

20

AD26

80

AD27

19

AD28

78

AD29

17

AD30

77

AD31

62

NC

11

VCC3_SB

2

+12V

3

+12V

61

-12V

4

VCC5

7

VCC5

8

VCC5

64

VCC5

65

VCC5

76

VCC5

57

VCC5

117

VCC5

114

VCC5

13

VCC5

54

VCC5

56

VCC5

116

VCC5

15

GND

119

GND

CN-IOC-SCSI-D120-BK

FRAME#

DEVSEL#

SDONE

EXP_IDSEL0#
EXP_IDSEL1#

EXP_IDGND

SER_IRQ
PCI_DREQ#
PCI_DGNT#AD21

ISA

REQ0#
REQ1#

C/BE0#
C/BE1#
C/BE2#
C/BE3#

IRDY#
TRDY#
STOP#

LOCK#

PERR#
SERR#

INTC#

INTD#

NOGO

PME#
INTA#

INTB#

SBO#

VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

75
71

C_BE#0

47

C_BE#1

101

C_BE#2

90

C_BE#3

83
31

92
33
35
94
96
97
99
16

5
66
6
67

37
38

115
55
1

58
60
12086
118

24
36
42
88
93
82
98
48
109
18
30
100

63
72
21
32
74
27
34
79
85
91
39
45
68
95
103
106
51
59
112
70
10

CB228

0.1u_Y5V

CB231

0.1u_Y5V

Put in Solder

CB229

0.1u_Y5V

Put in Solder

CB232

0.1u_Y5V

PREQ#3 (11)
PREQ#4 (11)

C_BE#[0..3] (11,16,20)

FRAME# (11,16,20)
TRDY# (11,16,20)

STOP# (11,16,20)
DEVSEL# (11,16,20)
LOCK# (11,20)
PERR# (11,16,20)
SERR# (11,16,20)
PCI_PME# (11,14,16,20)

PIRQ#A (11,20)
PIRQ#B (11,20)
PIRQ#C (11,20)
PIRQ#D (11,20)

SDONE (20)
SBO# (20)

RISER#1 (13)

VCC3

CB230
1u-0805_Y5V

CB233
1u-0805_Y5V

Springdale Reference & Swing Voltage Circuit AGP TERMINATION RESISTORS AGP SLOT DECOUPLING CAPACITORS

GSERR#

R267 X_8.2K

4

DET#_B

Q18
2N3904S

+12V VCC_AGP

R264

8.2K

GPERR#

DET#_C

7

R265

8.2K

Q16
2N3904S

R277
100

VCC_AGP

AGPREF

R262 60.4RST

R270 33.2RST

Q17
2N3904S

6

R266

39.2RST

R272
100RST

C116

0.1u_Y5V

C117

0.1u_Y5V

GSWING (10)

LESS 10MILS STUB TRACE LENGTH MUST BE FOLLOWING.

Place these resistors between PCI and AGP slot

AGP_REF (10)

5

VCC_AGP

R263

8.2K

A A

G_DET# DET#_E

R276 300

8

VCC_AGP

3

VCC3_SB

MSI

Title

Size Document Number Rev

Date: Sheet of

VCC_AGP

+

CB243

0.1u_Y5V
CB245

0.1u_Y5V

MICRO-STAR INt'L CO., LTD.

VCC3

CT13
1000u-6.3V
CB248

0.1u_Y5V
CB250

0.1u_Y5V

H/W Project Leader : Andy Chen
H/W Project Engineer : Prudence Wang

AGP 1.5V SLOT & PCI RISER

VISE (MS-6715)

2

19 30Friday, September 27, 2002

CB244

0.1u_Y5V
CB247

0.1u_Y5V
CB249

0.1u_Y5V

0A

1

8

7

6

5

4

3

2

1

PCI SLOT 1 (PCI VER: 2.2 COMPLY) PCI SLOT 2 (PCI VER: 2.2 COMPLY)

-12V

PCI1

B1

B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49

B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62

B2
B3
B4
B5
B6
B7
B8
B9

-12V
TCK
GND
TDO
+5V
+5V
INTB#
INTD#
PRSNT#1
RESERVED
PRSNT#2
GND
GND
RESERVED
GND
CLK
GND
REQ#
+5V(I/O)
AD31
AD29
GND
AD27
AD25
+3.3V
C/BE#3
AD23
GND
AD21
AD19
+3.3V
AD17
C/BE#2
GND
IRDY#
+3.3V
DEVSEL#
GND
LOCK#
PERR#
+3.3V
SERR#
+3.3V
C/BE#1
AD14
GND
AD12
AD10
GND

AD8
AD7
+3.3V
AD5
AD3
GND
AD1
+5V(I/O)
ACK64#
+5V
+5V

YSLOT120

RESERVED

+5V(I/O)

RESERVED

RESERVED

+5V(I/O)

RESERVED

FRAME#

SDONE

C/BE#0

+5V(I/O)

REQ64#

TCK1

PCI_CLK0(13)

PREQ#0(11,24)

DEVSEL#(11,16,19)

VCC5

PIRQ#C
PIRQ#G
PRSNT1_1

PRSNT2_1

AD31(11,16,19)
AD29(11,16,19)

AD27(11,16,19)
AD25(11,16,19)

C_BE#3(11,16,19)

AD23(11,16,19)
AD21(11,16,19)

AD19(11,16,19)
AD17(11,16,19)

C_BE#2(11,16,19)

IRDY#(11,16,19)

LOCK#(11,19)
PERR#(11,16,19)

SERR#(11,16,19)

C_BE#1(11,16,19)

AD14(11,16,19)
AD12(11,16,19)

AD10(11,16,19)

AD8(11,16,19)
AD7(11,16,19)

AD5(11,16,19)
AD3(11,16,19)

AD1(11,16,19)

VCC3 VCC3

ACK#64

D D

C C

B B

TRST#

+12V

TMS

INTA#

INTC#

GND
GND

RST#

GNT#

GND

AD30

+3.3V

AD28
AD26

GND

AD24

IDSEL

+3.3
AD22
AD20

GND
AD18
AD16

+3.3V

GND

TRDY#

GND

STOP#

+3.3V
SBO#

GND

PAR

AD15

+3.3V

AD13
AD11

GND

AD9

+3.3V

AD6
AD4

GND

AD2
AD0

+12V

TRST#1

A1
A2

TMS1

A3

TDI1

A4

TDI

A5

+5V

+5V

+5V
+5V

PIRQ#A

A6

PIRQ#F

A7
A8
A9
A10

VCC3

A11
A12
A13
A14

PCIRST#1

A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25

ID1

A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49

A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62

TRST#1 (24)
TMS1 (24)

TDI1 (24)

VCC5

PCIRST#1 (14)
PGNT#0 (11)
PCI_PME# (11,14,16,19)

AD30 (11,16,19)
AD28 (11,16,19)

AD26 (11,16,19)
AD24 (11,16,19)

AD20

R280 22

AD22 (11,16,19)
AD20 (11,16,19)

AD18 (11,16,19,22)
AD16 (11,16,19)

FRAME# (11,16,19)
TRDY# (11,16,19)
STOP# (11,16,19)

SDONE
SBO#

PAR (11,16,19)
AD15 (11,16,19)

AD13 (11,16,19)
AD11 (11,16,19)

AD9 (11,16,19)

C_BE#0 (11,16,19)
AD6 (11,16,19)

AD4 (11,16,19)
AD2 (11,16,19)

AD0 (11,16,19)

REQ#64_1

PCI_CLK1(13)

PREQ#1(11)

TCK

PIRQ#F
PIRQ#A
PRSNT1_2

PRSNT2_2

AD31
AD29

AD27
AD25

C_BE#3
AD23

AD21
AD19

AD17
C_BE#2

IRDY#
DEVSEL#
LOCK#

PERR#
SERR#
C_BE#1

AD14
AD12

AD10

AD8
AD7

AD5
AD3

AD1
ACK#64

-12V

B1
B2
B3
B4
B5
B6
B7
B8

B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49

B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62

PCI2

-12V
TCK
GND
TDO
+5V
+5V
INTB#
INTD#
PRSNT#1
RESERVED
PRSNT#2
GND
GND
RESERVED
GND
CLK
GND
REQ#
+5V(I/O)
AD31
AD29
GND
AD27
AD25
+3.3V
C/BE#3
AD23
GND
AD21
AD19
+3.3V
AD17
C/BE#2
GND
IRDY#
+3.3V
DEVSEL#
GND
LOCK#
PERR#
+3.3V
SERR#
+3.3V
C/BE#1
AD14
GND
AD12
AD10
GND

AD8
AD7
+3.3V
AD5
AD3
GND
AD1
+5V(I/O)
ACK64#
+5V
+5V

YSLOT120

TRST#

+12V

TMS

INTA#

INTC#

RESERVED

+5V(I/O)

RESERVED

GND
GND

RESERVED

RST#

+5V(I/O)

GNT#

GND

RESERVED

AD30

+3.3V

AD28
AD26

GND

AD24

IDSEL

+3.3
AD22
AD20

GND
AD18
AD16

+3.3V

FRAME#

GND

TRDY#

GND

STOP#

+3.3V

SDONE

SBO#

GND

PAR

AD15

+3.3V

AD13
AD11

GND

AD9

C/BE#0

+3.3V

AD6
AD4

GND

AD2

AD0
+5V(I/O)
REQ64#

+12V

VCC3

VCC5

ID2

TRST#
TMS

TDI
PIRQ#C

PIRQ#G

PCIRST#1

PGNT#1 (11)

PCI_PME#
AD30

AD28
AD26

AD24

R278 22

AD22
AD20

AD18
AD16

FRAME#
TRDY#
STOP#
SDONE

SBO#
PAR

AD15
AD13

AD11
AD9

C_BE#0
AD6

AD4
AD2

AD0
REQ#64_2

PCI_CLK2(13)

AD25

A1
A2
A3
A4

TDI

A5

+5V

A6
A7
A8

+5V

A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49

A52
A53
A54
A55
A56
A57
A58
A59
A60
A61

+5V

A62

+5V

IDSEL = AD20 IDSEL = AD25

PCI SLOT 3 (PCI VER: 2.2 COMPLY)

-12V

PCI3

B1
B2
B3
B4
B5
B6
B7
B8

B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49

B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62

-12V
TCK
GND
TDO
+5V
+5V
INTB#
INTD#
PRSNT#1
RESERVED
PRSNT#2
GND
GND
RESERVED
GND
CLK
GND
REQ#
+5V(I/O)
AD31
AD29
GND
AD27
AD25
+3.3V
C/BE#3
AD23
GND
AD21
AD19
+3.3V
AD17
C/BE#2
GND
IRDY#
+3.3V
DEVSEL#
GND
LOCK#
PERR#
+3.3V
SERR#
+3.3V
C/BE#1
AD14
GND
AD12
AD10
GND

AD8
AD7
+3.3V
AD5
AD3
GND
AD1
+5V(I/O)
ACK64#
+5V
+5V

YSLOT120

PREQ#2(11)

TCK

VCC5VCC5

PIRQ#G
PIRQ#C
PRSNT1_3

PRSNT2_3

AD31
AD29

AD27
AD25

C_BE#3
AD23

AD21
AD19

AD17
C_BE#2

IRDY#
DEVSEL#
LOCK#

PERR#
SERR#
C_BE#1

AD14
AD12

AD10

AD8
AD7

AD5
AD3

AD1
ACK#64

VCC3

IDSEL = AD26

TRST#

+12V

TMS

INTA#
INTC#

RESERVED

+5V(I/O)

RESERVED

GND
GND

RESERVED

RST#

+5V(I/O)

GNT#

GND

RESERVED

AD30

+3.3V

AD28
AD26

GND

AD24

IDSEL

+3.3
AD22
AD20

GND
AD18
AD16

+3.3V

FRAME#

GND

TRDY#

GND

STOP#

+3.3V

SDONE

SBO#

GND

PAR

AD15

+3.3V

AD13
AD11

GND

AD9

C/BE#0

+3.3V

AD6
AD4

GND

AD2

AD0
+5V(I/O)
REQ64#

+12V

VCC3

VCC5

ID3

TRST#
TMS

TDI
PIRQ#F

PIRQ#A

VCC3_SBVCC3_SBVCC3_SB

PCIRST#1

PGNT#2 (11)

PCI_PME#
AD30

AD28
AD26

AD24

R279 22

AD22
AD20

AD18
AD16

FRAME#
TRDY#
STOP#
SDONE

SBO#
PAR

AD15
AD13

AD11
AD9

C_BE#0
AD6

AD4
AD2

AD0
REQ#64_3

AD26

A1
A2
A3
A4

TDI

A5

+5V

A6
A7
A8

+5V

A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49

A52
A53
A54
A55
A56
A57
A58
A59
A60
A61

+5V

A62

+5V

MASTER = PREQ#2MASTER = PREQ#1MASTER = PREQ#0

PIRQ#A PIRQ#C PIRQ#F

PCI SLOT DECOUPLING CAPACITORS

PCI PULL-UP / DOWN RESISTORS

DEVSEL#
TRDY#
IRDY#
FRAME#

SERR#
PERR#
LOCK#

A A

STOP#

CB280 0.1u_Y5V

VCC5

CB283 0.1u_Y5V

12

VCC5 VCC5 VCC3

VCC5

VCC3

PREQ#1(11)
PREQ#0(11)
PREQ#2(11)
PREQ#3(11)

PREQ#4(11)
PREQ#5(11,16)

34

RN73

56

2.7K

78

12
34

RN77

56

2.7K

78

8

PREQ#1
PREQ#0
PREQ#2

REQ#64_1
REQ#64_2
REQ#64_3
ACK#64

TMS
TDI
TMS1
TDI1

TCK1
TRST#1
TCK

7

R281 2.7K
R73 2.7K

R282 4.7K
R283 4.7K
R284 4.7K
R285 4.7K

R286 2.2K
R287 2.2K
R535 2.2K
R536 2.2K

R537 2.2K
R538 2.2K
R288 2.2K
R552 2.2K

12
34

RN74

56

2.7K

78

VCC5

PIRQ#B(11,19)
PIRQ#D(11,19)
PIRQ#A(11,19)
PIRQ#C(11,19)
PIRQ#F(11)
PIRQ#G(11)
PIRQ#E(11)
PIRQ#H(11,16)

SDONE(19)

SBO#(19)

6

PIRQ#A
PIRQ#C
PIRQ#F
PIRQ#G

SDONE
SBO#

PRSNT1_1
PRSNT1_2
PRSNT1_3

PRSNT2_1

PRSNT2_2
PRSNT2_3PCIRST#1

78
56
34
12
78
56
34
12

R289 X_0
R291 X_0

C243 0.01u_Y5V
C244 0.01u_Y5V
C245 0.01u_Y5V

C246 0.01u_Y5V
C247 0.01u_Y5V
C248 0.01u_Y5V

5

RN75

8.2K

RN76

8.2K

SM_LINK0 (12,28)
SM_LINK1 (12,28)

VCC5

+

CT14
470u-16V
CB253

0.1u_Y5V
CB258

0.1u_Y5V
CB263

0.1u_Y5V
CB268

0.1u_Y5V
CB270

0.1u_Y5V
CB272

0.1u_Y5V
CB274

0.1u_Y5V
CB278

0.1u_Y5V

4

VCC3

+

CT15
1000u-6.3V
CB254

0.1u_Y5V
CB259

0.1u_Y5V
CB264

0.1u_Y5V
CB269

0.1u_Y5V
CB271

0.1u_Y5V
CB273

0.1u_Y5V
CB279

0.1u_Y5V

3

-12V

CB255

0.1u_Y5V
CB265

0.1u_Y5V

MSI

Title

Size Document Number Rev

Date: Sheet of

+12V

MICRO-STAR INt'L CO., LTD.

PCI 1& 2 & 3 Slots

VISE (MS-6715)

2

VCC3_SB

CB261

0.1u_Y5V
CB266

0.1u_Y5V

H/W Project Leader : Andy Chen
H/W Project Engineer : Prudence Wang

20 30Tuesday, October 01, 2002

1

CB252

0.1u_Y5V
CB257

0.1u_Y5V
CB262

0.1u_Y5V
CB267

0.1u_Y5V

0A

8

7

6

5

4

3

2

1

ATA 33/66/100 IDE ConnectorsPRIMARY IDE BLOCK SECONDARY IDE BLOCK

IDE2

IDEA_RST#(14) IDEB_RST#(14)

PDD[0..7](11)

D D

PD_DREQ(11)

PD_IOW#(11)

PD_IOR#(11)
PD_IORDY(11)
PD_DACK#(11)

PD_CS#1(11)

IDEACTP#(24)

C C

3VDDCCL(10)

3VDDCDA(10)

B B

CRT_HSYNC(10)

CRT_VSYNC(10)

R293 33

PDD7

5 6

PDD6

1 2

PDD5

5 6

PDD4

3 4

PDD3

5 6

PDD2

1 2

PDD1

5 6

PDD0 PD15

1 2

IRQ14(11)
PD_A1(11)
PD_A0(11)

R298
20KST X_4700p_X7R

R304

R305

4.7K

4.7K

DDC_G

HDRST#P HDRST#S
PD7

RN80

PD6

RN80

PD5

RN81

PD4

RN81

PD3

RN86

PD2

RN86

PD1

RN87

PD0 SDD0

RN87
33-0402

R299

8.2K

VCC5

Q19
NDS7002AS

R308 4.7K

Q20
NDS7002AS

R310 47

R311 47

YJ220-CB-1

1

2

PD8

3 4
5 6
7 8

91110
13 14
17 18

19
21
23
25
27
29
31
33
35
37

R300

4.7K

VCC3VCC5 VCC5 VCC3

FS2 1.1A-microSMD110

POLY SWITCH

VCC5 VCC5VCC3 VCC3

R306

R307

2.2K

2.2K

VCC5

VCC3

PD9
PD10
PD11
PD12

12

PD13
PD14

1615

22
24
26
28
30
32
34
36
38
4039

D8 X_BAV99

C119

RN80
RN80
RN81
RN81
RN86
RN86
RN87
RN87
33-0402

PDD8

78

PDD9

34

PDD10

78

PDD11

12

PDD12

78

PDD13

34

PDD14

78

PDD15

34

R301
15K

FB15 80-0805-3A

D7 X_BAV99

VCC5

ATADET0 (14)
PD_A2 (11)
PD_CS#3 (11)

C120

0.1u_Y5V

C128

47p_NPO
C127
47p_NPO

PDD[8..15] (11) SDD[8..15] (11)

VGA_PWRVGAPWR

R302
X_47K

FOR ESD

5VDDCCL

V_SYNC
H_SYNC

5VDDCDA

C129
47p_NPO

SDD[0..7](11)

Video Connector

VGA1

15
10
14

9

13

8

12

7

11

6

C130
47p_NPO

YCN15F-003-1

SD_DREQ(11)

SD_IOW#(11)

SD_IOR#(11)
SD_IORDY(11)
SD_DACK#(11)

SD_CS#1(11)

IDEACTS#(24)

17

5

4

3

2

1

16

R292 33

SDD7
SDD6
SDD5 SD5
SDD4
SDD3
SDD2
SDD1

IRQ15(11)
SD_A1(11)
SD_A0(11)

CRTB CRT_BF

10p_NPO

{VOLTAGE}

CRTG CRT_GF

10p_NPO

CRTR CRT_RF

10p_NPO

RN83

1 2

RN83

5 6

RN82

1 2

RN82

7 8

RN84

3 4

RN84

7 8

RN85

3 4

RN85

7 8

33-0402

R294
20KST X_4700p_X7R

FB16 80ohm-200mA

C121

FB18 80ohm-200mA

C124

FB20 80ohm-200mA

C131

SD7
SD6

SD4
SD3
SD2
SD1
SD0

R295

8.2K

BLUE "rounted GND", use one via to GND.

GREEN "rounted GND", use one via to GND.

RED "rounted GND", use one via to GND.

IDE1

YJ220-CW-1

1
3 4
5 6
7 8
91110

13 14
17 18

19
21
23
25
27
29
31
33
35
37

R296

4.7K

2

SD8

RN83

SD9

RN83

SD10

RN82

SD11

RN82

SD12

RN84

12

SD13

RN84

SD14

RN85

1615

SD15

RN85

33-0402

22
24
26
28
30
32
34
36
38
4039

C118

FB17 80ohm-200mA

C122
22p_NPO

{VOLTAGE}

FB19 80ohm-200mA

C125
22p_NPO

{VOLTAGE}

FB21 80ohm-200mA

C132
22p_NPO

{VOLTAGE}

C123

10p_NPO

C126

10p_NPO

C133

10p_NPO

SDD8

34

SDD9

78

SDD10

34

SDD11

56

SDD12

12

SDD13

56

SDD14

12

SDD15

56

R297
15K

D6 BAV99

D9 BAV99

D10 BAV99

ATADET1 (14)
SD_A2 (11)
SD_CS#3 (11)

R303
75RST

R309
75RST

R312
75RST

VCC_AGP

CRT_B (10)

VCC_AGP

CRT_G (10)

VCC_AGP

CRT_R (10)

Internal Ring Wake Up Block

3VSB3VSB

A A

NRIA RIBNRIB

NRIA#(14) NRIB#(14)

8

D4
BAV70

R157 4.7K

RIA

R158

2.2K

7

C59

1000p_Y5V

R156
1K

RIA#

Q6
2N3904S

6

R509
1K

R510 4.7K

D11
BAV70

5

R511

2.2K

4

C222

1000p_Y5V

Q77
2N3904S

RIB# (14)RIA# (14)

MSI

Title

Size Document Number Rev

3

Date: Sheet of

MICRO-STAR INt'L CO., LTD.

H/W Project Leader : Andy Chen
H/W Project Engineer : Prudence Wang

ATA33/66/100 IDE & VIDEO Connectors

VISE (MS-6715)

2

21 30Monday, September 30, 2002

1

0A

E

D

C

B

A

POWER CIRCUIT FOR USB PORT 0,1 POWER CIRCUIT FOR USB PORT 4,5

FS4
2A-miniSMDC200

USB_STR USB_STR

4 4

OC#1(12)

0.1u_Y5V

SVCC1_FB SVCC1

FB22 80-0805-3A

R315
470K

R320
560K

C139

+

C134 R519

1000p_Y5V

NEAR USB CONNECTOR

CT18
470u-16V

R317
1K 1000p_Y5V

REAR PANEL USB CONNECTOR FOR USB PORT 0,1

FB24 0

L7
X_CMC_90ohm_0603

3 3

USB1-(12)

USB1+(12)

USB0-(12)

USB0+(12)

FB25 0

FB26 0

FB27 0

4 3

1 2

4 3

1 2

NEAR USB CONNECTOR

CRITICAL

L8
X_CMC_90ohm_0603

CRITICAL

246

8

CN8
X_47p_NPO

135

7

SVCC1
SBD1­SBD1+

SVCC1
SBD0­SBD0+

REAR PANEL USB CONNECTOR FOR USB PORT 2,3

2 2

USB3-(12)

USB3+(12)

USB2-(12)

USB2+(12)

1 1

FRONT_USB_DET#(12)

E

FB29 0

L10
X_CMC_90ohm_0603

CRITICAL

4 3

1 2

FB31 0

FB33 0

246

8

CN10
X_47p_NPO

135

7

4 3

1 2

FB35 0

NEAR USB CONNECTOR

L12
X_CMC_90ohm_0603

CRITICAL

FRONT PANEL USB CONNECTOR FOR USB PORT 4,5

USB4-(12)

USB4+(12)

1000p_Y5VC141

1000p_Y5VC142

1 2
3 4
5
7 8

SVCC3SVCC3

6
10

USB2
CN-BH-D10--K9-BK

D

SVCC2
SBD3­SBD3+

SVCC2
SBD2­SBD2+

POWER CIRCUIT FOR USB PORT 2,3

FS5

OC#2(12)

5
6
7
8
1
2
3
4

USB1
USBx2-D8-BK

LAN_USB1A

5
6
7
8
1
2
3
4

USB_RJ45

CRITICAL

USB5- (12)
USB5+ (12)

2A-miniSMDC200

0.1u_Y5V

UP

DOWN

UP

DOWN

SVCC2_FB SVCC2

FB41 80-0805-3A

R518
470K

R520
560K

C237

11

12
9

10

27
28
29
30
25
26
31
32

C

+

C236

NEAR USB CONNECTOR

NIC_ENABLE#(12)

TR_D0+(16)
TR_D0-(16)

TR_D1+(16)
TR_D1-(16)

TR_D2+(16)
TR_D2-(16)

TR_D3+(16)
TR_D3-(16)

AD18(11,16,19,20)

CT46
470u-16V

NC7SZ125-SOT23-5

FS3

USB_STR

1K

2A-miniSMDC200

OC#3(12)

C138

0.1u_Y5V

LAN MAGNETICS

LAN2_5

C173 0.01u_Y5V

TR_D0+
TR_D0-

C174 0.01u_Y5V

TR_D1+ TRD1+
TR_D1-

C175 0.01u_Y5V

TR_D2+
TR_D2-

C178 0.01u_Y5V

TR_D3+
TR_D3-

U17

1

TCT1

MCT1

2

TD1+
TD1­TCT2
TD2+
TD2­TCT3
TD3+
TD3­TCT4
TD4+
TD4- MX4-

H5007

MX1+

MX1-

MCT2

MX2+

MX2-

MCT3

MX3+

MX3-

MCT4

MX4+

3
4
5
6
7
8

9
10
11
12 13

24
23
22
21
20
19
18
17
16
15
14

LAN CONNECTOR

LAN2_5

LAN_USB1B

YELLOW+

22

YELLOW-

21
16

15
17
11

9
10
12
14
13
19
20
18

24
23

USB_RJ45

CRITICAL

LAN IDSEL BLOCK

MICRO-STAR INt'L CO., LTD.

VCC3

R651

4.7K

CRITICAL

PWR

0.01u_Y5VC180

0.01u_Y5VC181

0.01u_Y5VC182

0.01u_Y5VC183

NIC_IDESEL

MSI

Title

Size Document Number Rev

Date: Sheet of

TRD3+
TRD3-

TRD2+
TRD2-

TRD1+
TRD1-

TRD0+
TRD0-

R652
1K

B

R447 330

These caps is improved EMI.

3VSB

TR_LED(16)

100_LED#(16)

1G_LED#(16)

VCC3

5

214

3

U34

SVCC3

R313
470K

R319
560K

NOT INSTALL
Transformer

MCT1
TRD0+
TRD0­MCT2

TRD1­MCT3
TRD2+
TRD2­MCT4
TRD3+
TRD3-

TRD3+
TRCT3
TRD3­TRD2+
TRCT2
TRD2­TRD1+
TRCT1
TRD1­TRD0+
TRCT0
TRD0-

G+/O­G-/O+

R498 75
R499 75
R500 75
R501 75

H/W Project Leader : Andy Chen
H/W Project Engineer : Prudence Wang

USB & LAN Connectors

VISE (MS-6715)

BCM4401
C175,C178
R500,R501
H1267

1500p-2KV_DIP

A

R314
1K

22 30Tuesday, October 01, 2002

MCT_G

C176

0A

8

SMBDATA(12,13,16,17,18,28)

SMBCLK(12,13,16,17,18,28)

VID0(6)
VID1(6)
VID2(6)

D D

VID3(6)

SYSMAG_INT(14)

3VSB

VCC3

SYS_FAN
SYSMAG_INT
CPU_FAN TACH1

R326 8.2K

VCC3

THERMDP# THERMDN#
THERMD1P# THERMD1N#

Place close to U13

7

R324 X_0

C144 0.1u_Y5V
R322 22

R325 X_0
R327 X_0

R329 10K

SYSMAG_INT

X_1000p_Y5VC251
X_1000p_Y5VC252

6

H/W MONITOR - ADM1027

U13

1

SDA

2

SCL

3

11
12

4
5
6
7
8
9

ADM1027

GND
VCC
VID0
VID1
VID2
VID3
TACH3

TACH1
TACH2

TACH4/PROCHOT#

PWM3/ADDRESS_EN#

+12V

U6_6

TACH3 THERMDP#

PWM1/XTO

VCCP

2.5V

VID4

24
23
22
21

12V

20

5V

19

THERMD1P#

18

D1+

THERMD1N#

17

D1-

16

D2+

THERMDN#

1510

D2-PWM2/SMBALERT#

14

CH_PWMTACH2

13

TACH1
TACH3

THERMD1P#
THERMD1N#

Use Thru-Hole part. Place close to ATX1

5

R323 4.02KST

R330 4.02KST
R332 10K

R333 10K

VCC3
VCCP

+12V
VCC5

VID4 (6)

THERMDP# (6)
THERMDN# (6)
PROCHOT# (6,26,28)

VCC3

Q82
2N3904S

4

CPU FAN

3

R562 0

-12V

R369 15K R371 15K

VCC3

2

CPU_FAN_SINK
CPU_FAN_PWR
CPU_FAN_HDR3CPU_PWM

R372 X_0
R373 10K

CPUFAN1
D1x3-WH-SN

1
2
3

Q30_B

VCC3

Q30
2N2907AS-SOT23

1

CPU_FAN (14)

SYSTEM FAN

VCC3

R363
10K

Q87
2N3904S

SYS_FAN (14)

+12V

+12V

CT53 10u-25V

+

CH_FAN_SINK
CH_FAN_HDR3

R362 15KR365 15K

R367 10K

SYSFAN1
D1x3-WH-SN

1

+12V

2
3

Q28_B

Q28_C Q87_B

Q28
2N2907AS-SOT23

R364 10K

CH_PWM

C C

FAN_CLAMP(14)

CH_PWM CPUFAN6

CPU_PWM

B B

FAN_CLAMP

A A

FAN_CMD(28)

8.06KST

3.09KST

R355 4.7K

R568 51

VCC3

R577

R579

8

R339 10K Q21

R341 51

VCC5

R571
X_0

R343 100K

R572
13KST

Q88_B

Q88_E

R354 1K
R359 56.2KST

AVG2_FDBK

12

PWM_AVG2

13

-12V

+12V

+

-

-12V

R334 100K

R335
13KST

Q21_BFAN_CLAMP

CPU_CLAMP_E

R342 X_0
R344 12.1KST

10u-0805_Y5V
Q88

2N3904S
R639 300

14

U14D
NS-LM324-SOIC14

11 4

FAN_CLAMP

EC48

R574 4.7K

7

PS_AVG

EC47
10u-0805_Y5V

2N3904S
R340 300

CPU_AVG
CPUFAN2

R348

15.8KST

VCC3

VCC3

+12V

5

+

6

-

-12V

R584 30.1KST

-12V

R585 X_0

VCC5

PWM_AVG2

R358 6.49KST

R578 10K Q85

Q84_B

U14_2

0.01u_Y5VC150

7

U14B
NS-LM324-SOIC14

11 4

0.01u_Y5VC151

Q85_BFAN_CMD_PS_R

Q84
2N3904S

6

3
2

-12V

CPUFAN4

VCC3

+

-

1

U14A
NS-LM324-SOIC14

11 4

R337 0

CH_AVG
CFAN2

2N3904S

PWM_AVG2 PS_FAN_CMD

R347 1K
C147

0.01u_Y5V
R575 20K

R351 20K

10

9

R353 6.49KST

CPUFAN5

CPU_FAN_PWR_R
CPU_FAN_SINK

+12V

+

-

U14C
NS-LM324-SOIC14

11 4

-12V

0.01u_Y5VC253

R566 X_0
R637 X_0

PS_DETECT(12)

CPU_FAN_SINK

VCC5

8

5

PS_SINK

VCC3

R567
0

CH_FAN_SINK

R573 1K

Q22
FDD6035AL-T0252

CRITICAL

R576 0
CT54 10u-25V
R638 X_0

J4

1
2
3
4

HF08040

R569 X_0

CPU_FAN_PWR

+

Q83

FDD6035AL-T0252

CRITICAL

CFAN5CFAN4

MBAY1

1 2
3 4
5
7 8
9

PIN2*5

MB_ADPT_DET# (14)

6

MB_DEV_DET# (14)
MB_POWER_ON# (14)

HOOKS1

1
2
3

D1X3-90D

HOOD_SW_DET (13)
HOOD_SENSE# (12)

Hood Lock Circuit

HOOD_LOCK#(14)

HOOKL1

1 2
5 6

CON6-D3

4

HOOD_UNLOCK# (14)

COIL_CONN (13)

+12V

PWM OVER VOLTAGE PROTECT CIRCUIT

Block function to force VCC_CORE volatge drop to zero within 0.5s after Thermaltrip active.

VCC3 VCC3

Optional delay cirucit T=RC > TRMTRIP# ready to VCCP voltage level

R350 47K

VCC3

TRMTRIP#(6,28)

GD_30MS#(14)

4

3

C148 1u-0805_Y5V

R352 1K

R360 1K

TRIP#_B

Q25
2N3904S

VCC3

R356
1K

30MS#_B

Title

Size Document Number Rev

Date: Sheet of

Q26
2N3904S

MSI

H/W MONITORING & FAN & THERMAL TRIP

2

R345
1K

OVP_B

Q24
2N3904S

GD_30MS_A

R357
X_1K

MICRO-STAR INt'L CO., LTD.

VISE (MS-6715)

R346
1K

OVP_C

Q23
2N3906LT1-SOT23

OVP_TRIG (27)

To PWM control OVP input

GD_30MS (13)

H/W Project Leader : Andy Chen
H/W Project Engineer : Prudence Wang

23 30Monday, September 30, 2002

1

0A

Multi Bay Circuit Hood Sense Circuit

8

7

6

5

4

3

2

1

Front Panel

ATX Connector

ATX1

VCC3

D D

PS_ON#(14)

VCC5_SB

C C

-12V

CB287

0.1u_Y5V

R376 4.7K

VCC5

CB290

0.1u_Y5V

11
12
13
14
15
16
17
18
19
20

POWER

YPC20

3.3V

-12V
GND
PSON
GND
GND
GND

-5V
5V
5V

3.3V

3.3V

GND

GND

GND

POK

5VSB

1
2
3
4

5V

5
6

5V

7
8
9
10

12V

CB285

0.1u_Y5V

VCC5

CB291

0.1u_Y5V

VCC3

CB286

0.1u_Y5V

VCC5_SB
+12V

CB292

0.1u_Y5V

HDDLED

IDEACTP#(21)

RSTBTN#(12)

CHASIS_ID2(12)
CHASIS_ID0(12)

CHASIS_ID0
CHASIS_ID1
CHASIS_ID2

(21)

R386 330

2N3906LT1-SOT23

R379 330

VCC5

R382 0

VCC5

R527 10K
R528 10K
R529 10K

IDE LED

Q66_B Q67_B

Q34

180p_NPOC160

X_2.2u_Y5V

Q35
2N3906LT1-SOT23

IDE_PWR
HDDLED

F_VCC

C163

VCC3

R387 330

SERIAL ATA CONNECTOR BLOCK

SATA1

1

GND

SATA_TX0(12) SATA_TX1(12)

SATA_RX#0(12) SATA_RX#1(12)

SATA_RX0(12)

PROT1

1
2

YJ102

B B

2

HT+

3

HT-

4

GND

5

HR-

6

HR+

7

GND

SATA

PROCHOT_LTCHD (12)

SATA_TX#1(12)SATA_TX#0(12)

SATA_RX1(12)

Prochot Latch Button

SATA2

1

GND

2

HT+

3

HT-

4

GND

5

HR-

6

HR+

7

GND

SATA

PCIRST_ICH5#(11)

VCC3

3VSB

VCC3

SEC_PCLK(13)

LPC_FRAME#(12,13)

LPC_AD3(12,13,14)
LPC_AD0(12,13,14)

LPC_DRQ#1(12)

CB337 X_0.01u_Y5V
CB338 X_0.01u_Y5V

SECURITY1

1 2

PCICLK GND

3 4

LPC_FRAME# KEY

5 6

PCIRST# SUSCLK

7 8

LPC_AD3 LPC_AD2

9 10

VCC3 LPC_AD1

11 12

LPC_AD0 GND

13 14

LPC_DRQ1 SEC_TPM_PRES

15 16

VCC3_SB SERIRQ

17 18

GND GND

19 20

VCC3 VBAT

SECURITY HEADER-N

SCLK

SIRQ

R549 0

R550 0

PCA LEDs Block

PROCHOT LED

VCC3 VCC3

R388
1K

LED1
GREEN LED

LED_PS_ON_C

Q37
NDS7002AS

5

7

R641
300

PROC_HOT

Q90
2N3904S

LED4
RED LED-NN

3VSB

PS_ON#

6

R640

8.2K

PROC_HOT#(12)

Q89
2N3904S

A A

PROCHOT#(6,26,28)

8

R642 4.7K

HOT_B

PWRSW

R389
300

LED2
GREEN LED

C164

0.01u_Y5V

4

AUXILIARY POWER LEDPower Button Press LEDPS_ON DIAGNOSTIC LED

F_P1

1
3
5
7
9

11
13
15
17

GP24 :CHASIS_ID0
GP25 :CHASIS_ID1 DARK
GP27 :CHASIS_ID2
GP24-27: Default is High

IDE_LED+
IDE_LED­GND
RESET#
+5V
NC
GND
CHA_ID2
CHA_ID0

PIN2X9-17

IDEACTS# (21)

PWR_LED+

PWR_LED-

PWR_BTN#

GND
GND

CHA_ID1

KEY

P_LED

P_LED

(Yellow)

PWRSW
R541

R380 68

R381 0

VCC5

S0

Green

DARK BRIGHTS_LED

HDDLED

S1STATE

Yellow Yellow

BRIGHT

SCSI LED

Q36
2N3906LT1-SOT23

PLED (14)
SUSLED (14)

CHASIS_ID1 (12)

S4/S5

S3

DARK

R392 330

2
4
6
8
10

NC

12
14
16

+5V

18

Power Button BlockSECURITY HEADER BLOCK

3VSB

R374

4.7K

C157
X_0.1u_Y5V

SUSCLK (12)
LPC_AD2 (12,13,14)
LPC_AD1 (12,13,14)
SEC_TPM_PRES (14)

SERIRQ (12,14,28)
VBAT

PWRSW

R375 22

Riser Detect Block

VCC3

R539

1K

R540

3.3K
Q78

2N3904S

VCC33VSBVCC5_SB 3VSB

216

VCC3

573

MICRO-STAR INt'L CO., LTD.

ATX Connector & Front Panel

VISE (MS-6715)

2

R390
300

LED_AUXLED_PBLED_PS_ON_A

LED3
GREEN LED

TRST#1(20)

PGNT#0(11)

TMS1(20)

MSI

Title

Size Document Number Rev

3

Date: Sheet of

VCC5

R391
20K

SCSI1

SCSIQ69_B

8
4

U30A
NC7WZ125-MAB08A

8
4

U30B
NC7WZ125-MAB08A

H/W Project Leader : Andy Chen
H/W Project Engineer : Prudence Wang

PWBTIN# (14)

RISER_DET# (13)

TDI1 (20)

PREQ#0 (11,20)

24 30Tuesday, October 01, 2002

1

1
2

YJ102

0A

5

U15

VCC5_STR

CB293

D D

SLP_S4#(12)

VCC5_STR

SLP_S3#(12)

C C

R395 56.2KST
C166 0.01u_Y5V

R397 1K

CB294 0.1u_Y5V

R402 56.2KST
C168 0.01u_Y5V

R404 1K

R407 1K

0.1u_Y5V

VCC5_STR

28

VCC

1

AGND

15

PG1

8

ILIM1
SS1

FPWM1#

ILIM2
SS2

FPWM2#

DDR

EN1

11

ILIM1

12

SS1

9 10

FPWM1# VSEN1

14

VIN

16

PG2/REF2OUT

21

EN2

18

ILIM2/REF2

17

SS2

20

FPWM2#

13

DDR

FAN5236-TSSOP

CRITICAL

BOOT1

HDRV1

SW1

LDRV1

PGND1

ISNS1

BOOT2

HDRV2

SW2

LDRV2

PGND2

ISNS2

VSEN2

4

BO1

DZ4 1N5817

6
5
4
2
3
7

23
24
25
27
26
22

19

C165 0.01u_Y5V

HDRV1

PHASE_2V5

LDRV1

1SNS1

R396 2.15KST

BO2

DZ5 1N5817

C167 0.01u_Y5V

HDRV2

PHASE_1V5

LDRV2

1SNS2

Phigh-gate = Vin/Vout * Iout * Rds(on) = (1.5V / 5V) * 5.9A * 0.017 = 0.045W

Plow-gate = (1-D) * Iout2 * Rds(on) = (1- 1.5V / 5V) * 5.9A * 0.017 = 0.07W
Ptotal = Phigh-gate + Plow-gate = 0.115W
1inch square thermal copper required

VCC3VCC5_STR

R406 1.69KST

VCC5_STR

Q38

5
6

D1

4

FDS6984S-SO8-N

CRITICAL

VCC5

Q39

5
6

D1

4

FDS6984S-SO8-N

CRITICAL

3

Phigh-gate = Vin/Vout * Iout * Rds(on) = (2.5V / 5V) * 7A * 0.017 = 0.06W
Plow-gate = (1-D) * Iout2 * Rds(on) = (1- 2.5V / 5V) * 7A * 0.017 = 0.06W
Ptotal = Phigh-gate + Plow-gate = 0.12W
1inch square thermal copper required

Continuous current 7A,

PHASE_2V5

VSENSE_2V5

PHASE_1V5

SENSE_1V5

CHOCK1 3.3uH

CRITICAL

CHOCK2 3.3uH

CRITICAL

3

S1G1D1

7

D2

8

D2

12

S2G2

3

S1G1D1

7

D2

8

D2

12

S2G2

peak up to 10A.

VCC_DDR

R393
10KST

R398

5.6KST

Continuous current

5.9A, peak up to 8A.

VCC_AGP

R403

2.2KST

R408

3.3KST

2

1

VCC5 & VCC3 Discharge Residual Voltage

-12V

R400 4.7K

RN89
39

MMBFJ108-N

Q40_G

Q40

123456

VCC5

78

Q40_D

VCC3

123456

Q41_D

78

RN90
39

Q41
MMBFJ108-N

5V Dual power switching 5V USB Power Supplier

Trace Width is 180mils.

R409 1.5K

+12V

3V_SW_CTRL#(14) 5V_USB_MAIN#(14)

R411 2.2K

R415 2.2K

3V_MAIN#

Q45

2N3904S

R413 1K CB296

3V_AUX

VCC5_SB

VCC5

VCC5_SB

Q47
2N3906LT1-SOT23

Q43

1

S1

2

G1

3

S2

4 5

G2 D

FDS4501H-SO8

CRITICAL

0.1u_Y5V

8

D
D
D

+

7

CT49
100u-25V

6

It contain USB @ 1 port and DDR, 9A.

Trace Width is 360mils.
Add copper for Thermal issue.

VCC5_STR

VCC5

R410 1.5K

+12V

R412 2.2K

5V_USB_AUX(14)

R416 2.2K

5V_MAIN#

R414 1K

5V_AUX

VCC5_SB

Q46

2N3904S

5V_G13V_GA

VCC5_SB

5V_G23V_GB

CB297

0.1u_Y5V

Q48
2N3906LT1-SOT23

Q44

1

S1

D

2

G1

D

3

S2

D

4 5

G2 D

FDS4501H-SO8

CRITICAL

8

+

7

CT50
100u-25V

6

It contain USB, 3A@2ports + PS/2.

Trace Width is 120mils.

USB_STR

B B

TBD

CPU_VTT
GMCH_VTT

Reserved for GMCH VCCP volatge step up.

REF_1V25

R420 X_1K

VCC3

R421 X_0

VCCP

C169

0.1u_Y5V

A A

+12V_OP

U16A
NS-LM358MX-SOIC8

CRITICAL

3

+

2

-

4 8

VTT_FB

R427 1K

VTT

5

1

VTT_R

X_2N3904S

TBD

5

+

6

-

U16B
NS-LM358MX-SOIC8

4 8

CRITICAL

-12V

VTT_M2

VCC3

VTT_DZ

R422 1K

VTT_M3

VTT_M1

DZ6

DS

Q50
P3056LS

CRITICAL

G

+

VCC3

CT22
100u-25V

Q54
NDS352AP

Power deplete cirucit when VCCP trun it off

R429 X_1.5K

R430 X_2.2K

1.6A@600mA

VRM_GD (27)

VTT

CB299

0.1u_Y5V

VCC_VID

R545

VCC5_SB

300

BOOT(6)

BOOT CPU
LOW
HIGH Prescott

Bootstrip pin are input rather then output on Intel Prescott processor, either it's
internal weak pull-up but still need to identify it can be sufficient driving
capability for out side ciruit. And the bootstrip pin power by core voltage so the
outside cirucit need to adjust the turn off voltage.

3

R423 10K

Voltage

Northwood 1.45V

1.225V

{CURRENT}

SS22-S210-DO214AA

CRITICAL R419

VTT_CTL

7

R428 X_2.2KQ55

Q56

X_2N3904S

4

R418 1K

BOOT_B

2N3904S

Q52

VCC5_SB

1K

C170

0.1u_Y5V

Title

Size Document Number Rev

2

Date: Sheet of

Change R417 connected from Q51
source to drain to eliminate a floating
connection when Q51 turn it off.

Q49
2N3906LT1-SOT23

1K

R424

MSI

CPU_PSC_HI

CPU_NW_HI

C171

0.1u_Y5V

3VSB

Q53
FDV301N-SOT23

R425
634RST

MICRO-STAR INt'L CO., LTD.

H/W Project Leader : Andy Chen
H/W Project Engineer : Prudence Wang

AGP & MEMORY & USB Regulator Controller

VISE (MS-6715)

1

3VSB

Q51
FDV301N-SOT23

R417
866RST

REF_1V25

R426
499RST

25 30Monday, September 30, 2002

0A

GMCH VTT Generator Intel reference GMCH VTT power cirucit

5

4

3

2

1

3.3V Standby Power Supplier3.3V Dual Power Supplier

Q57

D D

3V_SW_MAIN#(14)

3V_SW_AUX(14)

C C

3V_SW_MAIN#(14)

B B

R432 2.2K

R436 2.2K

R450 2.2K

R431 1.5K

+12V

3VSB_DUAL_SWA

R435 1K

3VSB_DUAL_SWB

3VSB

QON_C

QON

2N3904S

R445

1.5K

R449 2.2K

Q62
2N3904S

Q58

3V_G1A

3VSB

3V_G2A

Q59
2N3906LT1-SOT23

VTT_C

VTT_B

1
2
3
4 5

R446

1.5K
R448 1K

Q61
2N3904S

S1

D

G1

D

S2

D

G2 D

FDS4501H-SO8

CRITICAL

VTT_OP_B

8
7
6

+

CT23
100u-25V

+12V+12V+12V

Q60
2N3906LT1-SOT23

VCC3_SBVCC3

+12V_OP

VR2
AMS1084CM-TO263-5A

3 2

VIN VOUT

CB300

X_0.1u_Y5V

1inch thermal copper required, maximum current need to supply three of Microsoft
Foxfire add-on cards within LDO case temperature under 80degreeC.

VCC_DDR

VCC3

CT25
10u-16V

CB301

0.1u_Y5V

CB21 2.2u_Y5V

+

C179

0.1u_Y5V

AMS
CRITICAL

10

11
12

2 5

4

VOUT

1

ADJ

C172

X_0.1u_Y5V

VR3

NC:1,3,4,6

9,13,16

AVIN

PVIN
PVIN

GND VSENSE

LP2995-LLP16-N

CRITICAL

VREFVDDQ

VTT
VTT

3VSB_ADJ

Maximum 1.2A sustain load

+

R433

CB302

200RST

0.1u_Y5V

R434
332RST

78

14
15

+

CT26
1000u-6.3V

+

CT24
22u-10V

ALE

CT45
1000u-6.3V

3VSBVCC5_SB

VCC3

0.1u_Y5V

VTT_DDR

ICH5 VCCSUS1_5 VOLTAGE

VR4
AME8800LEFT-SOT89-300mA-N

CRITICAL

CB340

0.1u_Y5V

2

VIN

4

VIN

3VSB

GMCH VCC_DAC Voltage SupplierVTT_DDR VOLTAGE SUPPLIERGMCH_VTT ON/OFF CIRCUIT

U18

1 2

VIN VOUT

3

VOUT

6

5

NC

8

NC

LM317L-SO8

CRITICAL

VOUT
VOUT

ADJ

7

4

C184

VOUT

GND

1

DAC_ADJ

3

R451
100RST

R452
28RST

1_5VSB

CB341

0.1u_Y5V

1.7V@250mA

CB304

0.1u_Y5V

VCC_DAC

VR THERMAL BLOCK

R631 7.5K

VCC5VCC5 VCC5

SATALED#(12)

2N3904S

PROCHOT# (8,23,24)

5

+

6

-

U33B

NS-LM358MX-SOIC8

CRITICAL

7

4 8

3

R632

R633

1KST

RT1

6.8KST

CRITICAL

1KST

THERMP
THERMN

R636
499RST

C261

0.1u_Y5V

5

A A

U33A
NS-LM358MX-SOIC8

CRITICAL

3

+

2

-

4 8

THERMO

1

R635 130RST Q86
R634 680

THERM_B

VCC5

4

VCC3

R853
1K

2

R654 330

2N3906LT1-SOT23

Q92_B

Q92

MSI

Title

VCC3_SB & VCC_DAC & VTT Regulator Controller

Size Document Number Rev

Date: Sheet of

SATA LED BLOCK

HDDLED (24)

MICRO-STAR INt'L CO., LTD.

H/W Project Leader : Andy Chen
H/W Project Engineer : Prudence Wang

VISE (MS-6715)

1

26 30Monday, September 30, 2002

0A

8

7

6

5

4

3

2

1

+12VP_FET

CT28

820u-25V

U19A

+12VP

12VP1

14

C188

0.1u_Y5V

3

1

12VP1

5 9

C194
1u-0805_Y5V

6

2

R471

4.7-0805

12VP2

14

C205

0.1u_Y5V

3

1

VCC

BOOT1

PHASE1

GND

PWM1

HIP6602B

CRITICAL

U19B

PVCC U_G2

BOOT2

PHASE2

PGND

PWM2

HIP6602B

CRITICAL

U21A

VCC

BOOT1

PHASE1

GND

PWM1

HIP6602B

CRITICAL

U_G1

L_G1

L_G2

U_G1

L_G1

VID5

D D

VID2
VID1
VID0

VID4
VID3

VID[0..5](6)

VRM_GD(12,25)

VCC5

R459 0
C196 0.1u_Y5V

R461 470KST

R462 X_??

R458 1K

VCC3

C C

R465 150KST

OVP_TRIG(23)

VDIFF

R530 0
R531 X_0
C198 1u-0805_Y5V

R468 2KST

+12VP

R482

5.6KST

COP

C200 5600p-X7R

FB

R472 2KST
R473 X_470KST

VCCP

C203
X_??

VSS_SENSE(6)

VCC_SENSE(6)

R469 15KST

R475 X_2KST

CONNECT TO BULK CAPACITOR

B B

R581 1K
R582 1K

VID0
VID1
VID2
VID3
VID4
VID5

VRMPG

VCCP

DIS
OFS
FS
OVP
REF
DAC

COMP

VDIFF

12
34
56
78

U20

7
6
5
4
3
8

2

27

9

28

1

11
10

13

12
14

Intersil 6556BCB

CRITICAL

R476 100

R478 0

R480 0

R481 100

RN88
10K

VID0
VID1
VID2
VID3
VID4
VID12.5

PGOOD
EN
OFS
FS
OVP
REF
DAC

COMP

FB
VDIFF

VCC3

26

VCC

17

GND

22

PWM1

23

ISEN1

21

PWM2

20

ISEN2

18

PWM3

19

ISEN3

25

PWM4

24

ISEN4

15

VSEN

16

RGND

VCORE_SENSE-

C207
X_0.1u_Y5V

VCORE_SENSE+

VCC5

CB321
1u-0805_Y5V

PWM1

ISEN1

PWM2
ISEN2

PWM3
ISEN3

PWM4

ISEN4

R453 4.7-0805

+12VP

R460 3.3KST

R464 3.3KST

R467 3.3KST

R470 3.3KST

R483 1K

Q73

2N3904S

A A

Q31_G

Q74

2N3904S

BOOT(6)

8

R544 10K

R485 1K

Q36_G

R487 4.7K

VCC5_SB +12VP

Q80

2N3904S

3VSB

R541

4.7K

Q79

2N3904S

7

GD_10MS (14)

R542

4.7K

FB

R543
20K

Q81
NDS7002AS

VDIFF

U21B

12VP2

5 9

PVCC U_G2

PGND

PWM2

HIP6602B

CRITICAL

JPW1

12V

12V

D2x2

GND

GND

BOOT2

PHASE2

L_G2

1

2

C212
1u-0805_Y5V

6

2

+12VP

CB311

0.01u_Y5V

6

3

4

5

U_G1 UG1

12

BOOT1

11

C189

0.1u_Y5V

PHASE1

13

L_G1

4

U_G2
BOOT2

10

C195

0.1u_Y5V

PHASE2

8

L_G2

7

U_G3

12

BOOT3

11

C204

0.1u_Y5V

PHASE3

13

L_G3

4

U_G4

BOOT4

10

C211

0.1u_Y5V

PHASE4

8

L_G4

7

4

R454

3.3-0805

FDB6670-T0252-N

CRITICAL

LG1

R456

4.7-0805

CT30

820u-25V

UG2

R457

3.3-0805

FDB6670-T0252-N

CRITICAL

LG2

R466

4.7-0805

CT31

820u-25V

UG3

R474

3.3-0805

FDB6670-T0252-N

CRITICAL

LG3

R479

4.7-0805

CT34

820u-25V

UG4

R486

3.3-0805

FDB6670-T0252-N

CRITICAL

LG4

R489

4.7-0805

Decide package on placement stage

Q64

FDB6670-T0252-N

CRITICAL

+12VP_FET

Q67

FDB6670-T0252-N

CRITICAL

+12VP_FET

C201 X_4.7u-1206_Y5V
C202 1u-0805_Y5V

Q70

FDB6670-T0252-N

CRITICAL

+12VP_FET

Q75

FDB6670-T0252-N

CRITICAL

3

C185 X_4.7u-1206_Y5V
C186 1u-0805_Y5V

Q63
FDD6035AL-T0252

CRITICAL

Q65

C192 X_4.7u-1206_Y5V
C193 1u-0805_Y5V

Q66
FDD6035AL-T0252-N

CRITICAL

Q68

Q69
FDD6035AL-T0252-N

CRITICAL

Q71

C209 X_4.7u-1206_Y5V
C210 1u-0805_Y5V

Q72
FDD6035AL-T0252-N

CRITICAL

Q76

COIL1 1.1uH-25A

4.7u-1206_Y5V

COIL2 0.86uH-18A

R455
1-1206_0.5W

R617

C191

0.01u_Y5V

Decide package on placement stage

COIL3 0.86uH-18A

R463
1-1206_0.5W

R618

C199

0.01u_Y5V

Decide package on placement stage

COIL4 0.86uH-18A

R477
1-1206_0.5W

R619

C208

0.01u_Y5V

Decide package on placement stage

COIL5 0.86uH-18A

R488
1-1206_0.5W

R620

C214

0.01u_Y5V

MSI

Title

Size Document Number Rev

Date: Sheet of

2

+12VP

CB306

VCCP

VCCP

VCCP

VCCP

0.8375~1.6V / 90A

MICRO-STAR INt'L CO., LTD.

VCCP

H/W Project Leader : Andy Chen
H/W Project Engineer : Prudence Wang

VRM 10 - Intersil 6556A

VISE (MS-6715)

27 30Tuesday, October 01, 2002

1

CT32
560u-4V-N
CT35
X_560u-4V-N
CT36
560u-4V-N
CT37
560u-4V-N
CT38
560u-4V-N
CT39
560u-4V-N
CT40
560u-4V-N
CT41
560u-4V-N
CT42
560u-4V-N
CT43
560u-4V-N
CT44
560u-4V-N

0A

8

7

6

5

4

3

2

1

CPU GTL REFERNCE VOLTAGE BLOCK

VCCP

R1

D D

GTLREF(6,8)

0.63*Vccp

C2

0.1u_Y5V

200RST

R2
169RST

Close CPU

VTT

R532
200RST

Close GMCH

HSWING(8)

CPU ITP BLOCK

ALL COMPONENTS CLOSE TO ITP

JTAG1

ITP_TDI(6)

ITP_TRST#(6)

ITP_TCK(6)

ITP_TDO(6)
ITP_CLK(13)

BPM#5(6)
BPM#4(6)
BPM#3(6)
BPM#2(6)
BPM#1(6)

C C

BPM#0(6)

ITP_DBR#(6)

VCCP

R533 0 R534 X_0

ITP_TDO
ITP_TCK

ITP_DBR#

CB1 0.1u_Y5V

ITP_TMS(6)
ITP_TCK(6)

1 2
3
5
7

9
11
13
15
17
19
21
23
25
27

ITP_DBR#
ITP_TDO

ITP 39ohm

TDI TMS
TRST#
TCK

BCLK#

TDO
BCLK

RESET#

FBO
BPM#5
BPM#4
BPM#3
BPM#2
BPM#1
BPM#0
DBR#
VCC

JTAG

CRITICAL

R11 X_150
R12 0

R17 75
R16 39
R18 27

R16 R18

47ohm
47ohmUSB_ITP

27ohm

GND
GND

GND
GND
GND

GND
DBA#
VTAP

VCC

4

NC

UTCK ITP_TCKCTCK

6

NC

8
10

R8 150

12
14

ITP_RST#

16
18
20
22
24
26

CB2 0.1u_Y5V

28

VCC3
MR# (14)

VCCP
VCCP

ITP_TMS (6)

ITP_CLK# (13)
CPURST# (8)

VCCP

VREF(9)

XCOMPL(9)

XCOMPH(9)

VCCA_FSB(8)

VCCA_DPLL(8)

VCCP

R42

C7

301RST0.01u_X7R

1/4*Vccp

C10

R45

0.01u_X7R

100RST

{VOLTAGE}

I=30mA

C8

0.1u_Y5V

I=35mA
ESR is 0.1mohm to GMCH

CT2
100u-10V

ALU

R46 150RST
R50 150RST
C19 2.2u_Y5V

{VOLTAGE}

R48 30.1KST
R52 10KST

CB22 2.2u_Y5V
R56 10KST
R60 30.1KST

L5 1uH-1206-1A

VCCA_DDR(9)

0.1u_Y5V

L3 0.82uH-30mA R43 1RST

+

CT1
22u-16V

ALE

+

C9

0.1u_Y5V

VCC_DDR VCC_DDR

VCC_DDR_C3(9)

VCC_DDR_C2(9)

VCC_DDR

VCC_DDR

FSB

DPLL

XRCOMP(9)

YRCOMP(9)

YCOMPL(9)

YCOMPH(9)

C257

R44 1RSTL4 100nH-300mA

+

{Prority}

CT48
22u-16V

VCC_AGP

VCC_AGP

CB20 2.2u_Y5V
R47 42.2RST
R51 42.2RST

R55 42.2RST
R59 42.2RST

R49 30.1KST
R53 10KST

CB23 2.2u_Y5V
R57 10KST
R61 30.1KST

VCC_AGP

ICH5 STRAPPING RESISTORS

ALL COMPONENTS CLOSE TO ICH5

Trace length is less than 3inchs to ICH5.

FERR#(12)

ICH_TRMTRIP#(12)

TRMTRIP#(6,23)

H_COMP(12)

HL11(12)

PS_DETECT(12)

SMBCLK(12,13,16,17,18,23)

SMB_ALERT#(12)

SM_LINK0(12,20)
SM_LINK1(12,20)

SUS_STAT#(12)

BATTLOW#(12)

SMBDATA(12,13,16,17,18,23)

LNK_ALERT#(12)

SIO_SMI#(12)

CSA_PME#(12)

FRONT_USB_DET#(12)

FAN_CMD(12,23)

RI#(12)

OC#7(12)

SERIRQ(12,14,24)
KBRST#(12)

A20GATE(12)

THERM#(12)

PSWRD(12)

EE_DO(12,16)

R79 62
R80 62

R655 62

R81 52.3RST

Impedance is equal 60ohm.

R82 61.9RST

R502 10K
R490 10K
R85 8.2K
R512 10K

R506 10K
R507 10K
R508 10K

R86 4.7K

R87 8.2K
R88 X_10K

VCCP

VCC_AGP

12

3VSB

34

RN1

56

10K

78
12

RN2

34

10K

56
78

12

RN3

34

10K

56
78

VCC3

BRD_ID1(11)

REQA# :BRD_ID1

RSMRST#(12)

ICH_GD(12)

DZ1 1N5817

5VREF(12)

MICRO-STAR INt'L CO., LTD.

2

BAT1VBAT_DZ

R104 1K

HL_SWING (10)
H_SWING (12)

800mV

HL_VREF (10)
H_VREF (12)

350mV

CI_SWING (10)

800mV

CI_VREF (10)

350mV

BAT1R101 1KDZ2 1N5817

RTC_RST# (12)

MSI

Title

CPU & GMCH & ICH5 PULL UP / DOWN RESISTORS

Size Document Number Rev

3

Date: Sheet of

CPU STRAPPING RESISTORS

B B

ITP_TRST#(6)

PROCHOT#(8,23,24)

CPURST#(6)

A A

VCCP

CPURST#(8)

TRMTRIP#(6)

8

ALL COMPONENTS CLOSE TO CPU

BPM#4(6)
BPM#5(6)
BPM#2(6)
BPM#3(6)
BPM#1(6)
BPM#0(6)

ITP_TDI(6)

CPU_GD(6)

HBR#0(6,8)

R23 62
R26 62
R28 62
R31 62
R33 62
R34 62

R24 150
R29 680

R25 120
R27 300
R30 200RST
R32 62

THERMTRIP TRANSLATION

R643 X_15K

R644 15K

Q91_B

Q91
2N3904S

R645 X_0

7

VCCP

VCCP

VCCP

SIO_TRMTRIP# (14)

ICH_TRMTRIP# (12)

6

VCC_AGP

VCC_AGP

VBAT

Close AD11 of ICH5.

R67 226RST R68 0
R69 147RST

R71 113RST

R521 226RST
R522 147RST

R523 113RST

D1 1N4148S

R103 180K

C39
1u-0805_Y5V

{VOLTAGE}

5

C30 0.1u_Y5V

R70 0
C31 0.1u_Y5V

BATTERY 5VREF Sequencing Circuit

3VSB

RST_SW

C40

0.01u_Y5V

CMOS1
SWITCH 4P

CRITICAL
1 2
3 4

RST_G

4

R95 X_10K
R96 1K

R546 10K
R547 10K

R97 1K
C35 1u-0805_Y5V

{VOLTAGE}

H/W Project Leader : Andy Chen
H/W Project Engineer : Prudence Wang

VISE (MS-6715)

VCC3

VCC5VCC3

28 30Friday, September 27, 2002

1

0A

1

ICH5

GPIO 0
GPIO 1
GPIO 2
GPIO 3
GPIO 4
GPIO 5
GPIO 6
GPIO 7
GPIO 8
GPIO 9
GPIO 10
GPIO 11
GPIO 12
GPIO 13
GPIO 14
GPIO 15
GPIO 16
GPIO 18
GPIO 19
GPIO 20
GPIO 21
GPIO 22
GPIO 24 RI# (multifuntion pin)
GPIO 25
GPIO 26 O SUSCLK (multifunction pin)

A A

GPIO 27 I AGP_PME# (multifunction pin)
GPIO 28
GPIO 29
GPIO 30
GPIO 31
GPIO 32 EE_SEL (multifunction pin)
GPIO 33 EE_CLK (multifunction pin)
GPIO 34
GPIO 35
GPIO 36
GPIO 37
GPIO 38
GPIO 39
GPIO 40
GPIO 41
GPIO 42
GPIO 43
GPIO 44
GPIO 45
GPIO 46
GPIO 47
GPIO 48
GPIO 49

FunctionTypeGPIO Pin

I

PCI_REQ#4 (multifunction pin)

O PCI_GNT#4 (multifunction pin)

I/O PCI_PERR# (multifunction pin)

I

PCI_IRQ#E (multifunction pin)

O

PWM_GPIO4 (multifunction pin)
Unused (multifunction pin)

O
I

USB_OC2# (multifunction pin)

I

USB_OC2# (multifunction pin)

I

USB_OC2# (multifunction pin)

I

USB_OC3# (multifunction pin)

I

USB_OC3# (multifunction pin)

I

AC_SDIN1 (multifuntion pin)

I

A20GATE (multifuntion pin)

I

Unused (multifunction pin)

I AUD_DET# (multifunction pin)

Unused (multifunction pin)

O

Unused (multifunction pin)

O

Unused (multifunction pin)

O
I SIO_PME# (multifunction pin)

Unused (multifunction pin)

O
I

SIO_SMI# (multifunction pin)
I THERM# (multifuntion pin)
I
I

KBRST# (multifuntion pin)

O Unused (multifunction pin)
O Unused (multifunction pin)
O Unused (multifunction pin)
O Unused (multifunction pin)
O
O

EE_DO (multifuntion pin)

O
I EE_DI (multifuntion pin)

SOS# (multifuntion pin)

I

SOS# (multifuntion pin)

I

SOS# (multifuntion pin)

I
O Unused (multifunction pin)

I/O

SMBCLK (multifuntion pin)

I/O SMBDATA (multifuntion pin)
I/O SMBCLK1 (multifuntion pin)
I/O SMBDATA1 (multifuntion pin)

DDC_CLK (multifuntion pin)

I/O

DDC_DATA (multifuntion pin)

I/O

Unused (multifunction pin)

O

CH_FAN_OVRD (multifunction pin)

O

LPC_CS# (multifunction pin)

O

FAN_CLAMP (multifunction pin)

O

PCI Config.

DEVICE

INTA#
INTB#

PCI_REQ#0PCI Slot 1

PCI_GNT#0
INTC#
INTD#

PCI Slot 2

INTD#
INTA#

PCI_REQ#1 AD23 PCICLK1

PCI_GNT#1
INTB#
INTC#

PCI Slot 3 PCI_REQ#2 AD24

INTC#
INTD#

PCI_GNT#2
INTA#
INTB#

IDSEL

AD22

LPC Super I/O

GPIO Pin

Type

GPIO 10
GPIO 11
GPIO 12
GPIO 13
GPIO 14
GPIO 15

I/O

GPIO 17

I/O

I/OGPIO 20
GPIO 21
GPIO 22

I/O

I/O
GPIO 23
GPIO 24
GPIO 25

I/O

I/O
GPIO 26
GPIO 27
GPIO 30

GPIO 32

I/O
GPIO 33 I/O
GPIO 34
GPIO 35

I/O
GPIO 36
GPIO 37
GPIO 40
GPIO 41

I/O
GPIO 42
GPIO 43

Function

I

VERSION_ID0
VERSION_ID1

I
I

CPU_FAN
PCI_PME#

I
I

CHASSIS_ID0
CHASSIS_ID1

I

UnusedGPIO 16
Unused
ATADET0
ATADET1
Unused
BOARD_ID0

I

SIO_ADDR
Unused
CPUOCC#

I
I

BOARD_ID1
PLED

O

SUSLED

OGPIO 31

TRMTRIP#
FDD_DET I/O

O

BIOS Protect
Unused
MOB#

O

DSB#

O

DRVDEN0

O GD_10MS

Unused
SIO_PME#

O
I

HM_INIT#

GPIO Pin

GPIO 44

GPIO 50
GPIO 51
GPIO 52
GPIO 53
GPIO 54 Unused
GPIO 55
GPIO 56
GPIO 57
GPIO 60
GPIO 61
GPIO 62

GPIO 64
GPIO 65
GPIO 66
GPIO 67
GPIO 70
GPIO 71
GPIO 72
GPIO 73
GPIO 74
GPIO 75
GPIO 76
GPIO 85
GPIO 86

Flash ROM

Function

GPI 0 Pull down through 1K ohms (unused)
GPI 1

GPI 3

TypeGPIO Pin

I
I

Pull down through 1K ohms (unused)

I

Pull down through 1K ohms (unused)GPI 2
Pull down through 1K ohms (unused)

I

Pull down through 1K ohms (unused)GPI 4

I

1

CLOCKREQ#/GNT#

PCICLK0

PCICLK2

Function

Type

I/O

Unused

I/OGPIO 45

Unused

O

SIO_SMI#GPIO 46

I/O

Unused

I/O

Unused

I/O

Unused

I/O

Unused
I/O
I/O

Unused

Unused

I/O

Unused

I/O
I/O

Unused
I/O

Unused

I

PWBTIN#

I

DLY_S3#GPIO 63

SLP_S5#

I
I USB_SENS

PWRBTN#O

PS_ON

O

Unused

I

RISER#1

I

RISER#2

PHY_DIS

I

PHY Disable

I/O
O

GD_30MS

O

Unused

I/O
I/O

Unused

CLK GEN PIN OUTMCP1 INT Pin

MCP/AB20 (PCI_CLK0)

MCP/AB18 (PCI_CLK1)

MCP/AB12 (PCI_CLK2)

DDR DIMM Config.

DEVICE

DIMM 2

DIMM 1

PCI RESET DEVICE

Signals
PCIRST#1
PCIRST#0
PCIRST#2
HDDRST#

BIOS Protect Config.

BIOS Un_Protected
BIOS Protected

MSI

Title

Size Document Number Rev

Date: Sheet of

CLOCKADDRESS

1010010B

MCLK_A0/MCLK_A0#
MCLK_A1/MCLK_A1#
MCLK_A2/MCLK_A2#

1010001B

MCLK_B0/MCLK_B0#
MCLK_B1/MCLK_B1#
MCLK_B2/MCLK_B2#

Target
Northbridge
FWH, Super I/O,AGP slot
PCI slot 1-3, PCI Riser
Primary, Scondary IDE

1
0

MICRO-STAR INt'L CO., LTD.

H/W Project Leader : Andy Chen
H/W Project Engineer : Prudence Wang

General Purpose Spec

VISE (MS-6715)

29 30Friday, September 27, 2002

0A