MiTAC 8666 Service Manual

SERVICE MANUAL FOR

8666

86668666

8666

86668666

8666

86668666

BY: Star Meng

Repair Technology Research Department /EDVD

Apr.2005 / R01

Contents

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1. Hardware Engineering Specification ………………………………………………………………………

1.1 Introduction ………………………………………………………………………………………………………………..

1.2 System Hardware Parts …………………………………………………………………………………………………...

1.3 Other Functions ……………………………………………………………………………………………………………

1.4 Power Management ……………………………………………………………………………………………………….

1.5 Appendix 1 : VIA VT8235CE GPIO Definitions ………………………………………………………………………..

1.6 Appendix 2 : W83L950D KBC Pins Definitions …………………………………………………………………………

1.7 Appendix 3 : 8666 External Specification ………………………………………………………………………………..

2. System View and Disassembly ……………………………………………………………………………..

2.1 System View ……………………………………………………………………………………………………………….

2.2 Tools Introduction …………………………………………………………………………………………………………

2.3 System Disassembly ……………………………………………………………………………………………………….

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3. Definition & Location of Connectors / Switches …………………………………………………………..

3.1 Mother Board ……………………………………………………………………………………………………………...

3.2 Daughter Board ……………………………………………………………………………………………………………

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4. Definition & Location of Major Components ……………………………………………………………..

4.1 Mother Board ……………………………………………………………………………………………………………...

5. Pin Description of Major Components ….…………………………………………………………………

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5.1 Intel Pentium M Processor CPU …………………………………………………………………………………………

5.2 PN800 North Bridge ………………………………………………………………………………………………………

5.3 VT8235CE South Bridge ….……………………………………………………………………………………………...

6. System Block Diagram ……………………………………………………………………………………..

7. Maintenance Diagnostics …………………………………………………………………………………..

7.1 Introduction ……………………………………………………………………………………………………………….

7.2 Error Codes ……………………………………………………………………………………………………………….

7.3 Debug Tool …………………………………………………………………………………………………………………

8. Trouble Shooting ……………………………………………………………………………………………

8.1 No Power …………………………………………………………………………………………………………………..

8.2 No Display …………………………………………………………………………………………………………………

8.3 LCD No Display or Picture Abnormal …………………………………………………………………………………..

8.4 External Monitor No Display or Color Abnormal ………………………………………………………………………

8.5 TV Test Error ……………………………………………………………………………………………………………..

8.6 Memory Test Error ……………………………………………………………………………………………………….

8.7 Keyboard (K/B) Touch-Pad (T/P) Test Error …………………………………………………………………………..

8.8 Hard Drive Test Error ……………………………………………………………………………………………………

8.9 CD-ROM Drive Test Error ………………………………………………………………………………………………

8.10 USB Port Test Error …………………………………………………………………………………………………….

8.11 PC Card Socket Test Error ……………………………………………………………………………………………..

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8.12 Mini-PCI Socket Test Error …………………………………………………………………………………………...

8.13 Audio Test Error …………………………………………………………………………………………………………

8.14 LAN Test Error ………….……………………………………………………………………………………………….

9. Spare Parts List ……………………………………………………………………………… ……………..

10. System Exploded Views ……………………………………………………………………………………

11. Circuit Diagram ……………………………………………………………………………………………

12. Reference Material ………………………………………………………………………………………..

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1. Hardware Engineering Specification

1.1 Introduction

1.1.1 General Description

This document describes the brief introduction for MiTAC 8666 portable notebook computer system

1.1.2 System Overview

The MiTAC 8666 model is designed for Intel Mobile Pentium-M Processor Banias 1.3G ~ 1.5GHz or Dothan 1.3G ~

2.1GHz with 400MHz, and Dothan 1.6G ~ 2.1GHz with 533MHz FSB with Micro-FCPGA package.

This system is based on PCI architecture and is fully compatible with IBM PC/AT specification, which has standard hardware peripheral interface. The power management complies with Advanced Configuration and Power Interface (ACPI) 2.0. It also provides easy configuration through CMOS setup, which is built in system BIOS software and can be pop-up by pressing F2 key at system start up or warm reset. System also provides icon LEDs to display system status, such as Wireless Lan indicator, Power indicator, Battery status indicator, ODD, HDD, Num Lock, Caps Lock, Scroll Lock, It also equipped with LAN, 56K Fax MODEM, 4 USB ports, S-Video and audio line out, external microphone function.

The memory subsystem supports two expansion DDR SDRAM slot with unbuffered PC3200 DDR400 SDRAM.

The VIA PN800 Mobile North Bridge integrates a high performance CPU interface for Intel Pentium 4 / Pentium-M

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processor, a full featured AGP port controller, Integrated Graphics with 2D/ 3D/ Video Controllers, a advanced high- performance DDR400 SDRAM controller, and high bandwidth Ultra V-Link host controller connecting with VIA VT8235CE South Bridge.

The VIA VT8235CE integrates Universal Serial Bus 2.0 Host Controllers Interface (UHCI), the Audio Controller with AC97 interface, the Ethernet includes a 32-bit PCI controller, the IDE Master/Slave controllers, and Inter-operable with VIA Host-to-V-Link Host Controller.

The VIA VT6103L is a Fast Ethernet 10 / 100 1-port PHY / Transceiver with MII interface, and meet all applicable IEEE 802.3, 10Base-T and 100Base-Tx standards.

The ENE CB1410 CardBus controller functions as a single slot PCI to Cardbus bridge. The CB1410 compliant with PCI Local Bus Specification Rev2.2, PC99 System Design Guide, and PC Card Standard 8.0.

The W83L950D is a high performance microcontroller on-chip supporting functions optimized for embedded control. These include ROM, RAM, four types of timers, a serial communication interface, optional I²C bus interface, host interface, A/D converter, D/A converter, I/O ports, and other functions needed in control system configurations, so that compact, high performance systems can be implemented easily.

A full set of software drivers and utilities are available to allow advanced operating systems such as Windows ME, Windows 2000 and Windows XP to take full advantage of the hardware capabilities. Features such as bus mastering IDE, Plug and Play, Advanced Power Management (APM) with application restart, software-controlled power shutdown.

Following chapters will have more detail description for each individual sub-systems and functions.

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1.2 System Hardware Parts

CPU Core logic

VGA Control System BIOS

Memory

Video Memory Clock Generator LVDS TV

Mobile Pentium-M Processor 1.3G ~ 1.9GHz

VIA PN800 + VIA VT8235CE chipset

North Bridge Integrated

SST49LF040

DDR RAM : DDR333 Nanya NT512D64S8HBAFM-6K DDR400 Micron, MT8VDDT3264HD

Share memory

ICS 950902

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VIA VT1634AL

VIA VT1623M

LAN PHY PCMCIA

Audio System

Modem

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VIA VT6103L

ENE CB1410

AC97 CODEC: Advance Logic, Inc, ALC655 Power Amplifier: TI TPA0212

AC97 Link: MDC (Mobile Daughter Card)!

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1.2.1 Intel Banias Processors in Micro-FCPGA Package

Intel Banias Processors with 593 pins Micro-FCBGA package.

It has the Intel NetBurst micro-architecture which features include hyper-pipelined technology, a rapid execution engine, a 400MHz system, an execution trace cache, advanced dynamic execution, advanced transfer cache, enhanced floating point and multi-media unit, and Streaming SIMD Extensions 2 (SSE2).

The Streaming SIMD Extensions 2 (SSE2) enable break-through levels of performance in multimedia applications including 3-D graphics, video decoding/encoding, and speech recognition.

Use Source-Synchronous Transfer (SST) of address and data to improve performance by transferring data four times per bus clock.

Support Enhanced Intel SpeedStep technology, which enables real-time dynamic switching of the voltage and frequency between two performance modes.

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1.2.2 Clock Generator

The ICS950902 is a single chip clock solution for desktop designs using the VIA P4X/P4M/KT/KN266/333 style chipsets with PC133 or DDR memory. The ICS950902 is part of a whole new line of ICS clock generators and buffers called TCH™ (Timing Control Hub). This part incorporates ICS's newest clock technology which offers more robust features and functionality. Employing the use of a serially programmable I2C interface, this device can adjust the output clocks by configuring the frequency setting, the output divider ratios, selecting the ideal spread percentage, the

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output skew, the output strength, and enabling/disabling each individual output clock. M/N control can configure output frequency with resolution up to 0.1MHz increment.

 Recommended Application:

VIA P4X/P4M/KT/KN266/333 style chipsets.

 Output Features:

• 1 - Pair of differential CPU clocks @ 3.3V (CK408)/ 1 - Pair of differential open drain CPU clocks (K7)

• 1 - Pair of differential push pull CPU_CS clocks @ 2.5V

• 3 - AGP @ 3.3V

• 7 - PCI @ 3.3V (1 - Free running)

• 1 - 48MHz @ 3.3V fixed

• 1 - 24_48MHz @ 3.3V (Default 48MHz I2C select only)

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• 2 - REF @ 3.3V, 14.318MHz

• 12 - SDRAM (6 pair - DDR) selectable

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 Features/Benefits:

• Programmable output frequency.

• Programmable output divider ratios.

• Programmable output rise/fall time.

• Programmable output skew.

• Programmable spread percentage for EMI control.

• DDR output buffer supports up to 200MHz.

• Watchdog timer technology to reset system if system malfunctions.

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• Programmable watch dog safe frequency.

• Support I2C Index read/write and block read/write operations.

• Uses external 14.318MHz crystal.

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1.2.3 PN800 Mobile North Bridge

 Defines Highly Integrated Solutions for Full Featured Value PC Mobile Designs

• High Performance UMA North Bridge: Integrated Pentium 4 North Bridge with 800 MHz FSB support and

UniChrome Pro 3D / 2D Graphics & Video Controllers in a single chip

• Advanced 64-bit memory controller supporting DDR400 / 333 / 266 SDRAM

• Combines with VIA VT8235-CE / VT8237 South Bridge for integrated 10/100 LAN, Audio, ATA133 IDE,

LPC, USB 2.0 and Serial ATA (VT8237)

• 1.5V Core and Pentium 4 AGTL+ I/O

• 37.5 x 37.5mm HSBGA (Ball Grid Array with Heat Spreader) package with 829 balls and 1mm ball pitch

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• Pin compatible with PM800, PM880, PN880, PT800A and PT880 Pentium 4 North Bridges

 High Performance CPU Interface

• Supports Intel 800 / 533 / 400 MHz FSB Pentium 4 and Pentium M processors

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• Supports Intel Hyper-Threading Technology

• Supports DBI (Dynamic Bus Inversion) and Data, Address, Response Parity

• Twelve outstanding transactions (twelve level In-Order Queue (IOQ) )

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• Built-in Phase Lock Loop circuitry for optimal skew control within and between clocking regions

 Full Featured Accelerated Graphics Port (AGP) Controller

• AGP v3.0 compliant 8x / 4x transfer modes with Fast Write support

• 1.5V AGP I/O interface

• Pipelined split-transaction long-burst transfers up to 2.1 GB/sec

• Supports Side Band Addressing (SBA) mode

• Supports Flush / Fence commands

• Supports DBI (Dynamic Bus Inversion)

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• Asynchronous AGP and CPU interface

• Thirty-two level request queue for read and write

• One-hundred-twenty-eight level (quadwords) of read data FIFO

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• Sixty-four level (quadwords) of write data FIFO

• Graphics Address Relocation Table (GART)

• One level TLB structure

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• Sixteen entry fully associative page table

• LRU replacement scheme

 Advanced High-Performance DDR400 SDRAM Controller

• Supports DDR400 / 333 / 266 memory types with 2.5V SSTL-2 DRAM interface

• Supports mixed 64 / 128 / 256 / 512 / 1024Mb DDR SDRAMs in x8 and x16 configurations

• Supports CL 2 / 2.5 for DDR266 / 333 and CL 2.5 / 3 for DDR400

• Supports 4 unbuffered double-sided DIMMs and up to 8 GBytes of physical memory

• Two sets of memory data, address and control signals each of which drives up to 2 DIMMs

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• Programmable timing / drive for memory address, data and control signals independently for each signal set

• DRAM interface pseudo-synchronous with host CPU for optimal memory performance

• Concurrent CPU, AGP / integrated graphics controller and V-Link access for minimum memory access

latency

• Bank interleave and up to 16-bank page interleave (i.e., 16 pages open simultaneously) based on LRU to

effectively reduce memory access latency

• Seamless DRAM command scheduling for maximum DRAM bus utilization (e.g., precharge other banks

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while accessing the current bank)

• CPU Read-Around-Write capability for non-stalled operation

• Speculative DRAM read before snoop result to reduce PCI master memory read latency

• Supports Burst Read and Write operations with burst length of 4 or 8

• Twelve cache lines (96 quadwords) of integrated CPU-to-DRAM write buffers and twelve separate cache

lines of CPU-to-DRAM read prefetch buffers

• Optional dynamic Clock Enable (CKE) control for DRAM power reduction during normal system state (S0)

• Supports self-refresh and CAS-before-RAS DRAM refresh with staggered RAS timing

 High Bandwidth 1 GB / Sec 16-Bit “Ultra V-Link” Host Controller

• Supports 66 MHz, 4x and 8x transfer modes, Ultra V-Link Host interface with 1 GB/sec total bandwidth

• Full duplex transfers with separate command / strobe for 4x and 8x modes

• Request / Data split transaction

• Transaction assurance for V-Link Host-to-Client access eliminates V-Link Host-Client Retry cycles

• Intelligent V-Link transaction protocol to eliminate data wait-states and throttle transfer latency to avoid data

overflow

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• Highly efficient V-Link arbitration with minimum overhead

 Advanced System Power Management Support

• ACPI 2.0 and PCI Bus Power Management 1.1 compliant

• Supports Suspend-to-DRAM (STR) and DRAM self-refresh

• Supports dynamic Clock Enable (CKE) control for DRAM power reduction during normal system state (S0)

• Supports SMI, SMM, and STPCLK mechanisms

• Supports Enhanced Intel Speedstep™ Technology

• Low-leakage I/O pads

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 Integrated Graphics with 2D / 3D / Video Controllers

• Optimized Unified Memory Architecture (UMA)

• Supports 16 / 32 / 64 MB Frame Buffer sizes

• 200 MHz Graphics Engine Clock

• Two independent 128-bit data paths between North Bridge and graphics core to improve video performance,

one for frame buffer access and one for texture / command access

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• PCI v2.2 compliant (for control and configuration)

• AGP v3.0 compliant (for control and data transfer)

 2D Acceleration

• 128-bit 2D graphics engine

• Hardware 2D rotation

• Supports ROP3, 256 operations

• Supports 8bpp, 15/16bpp and 32bpp color depth modes

• BitBLT (Bit BLock Transfer) functions including alpha BLTs

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• True-color hardware cursor (64x64x32bpp) with 256-level blending effect

• Color expansion, source Color Key and destination Color Key

• Bresenham line drawing / style line function

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• Transparency mode

• Window clipping

• Text function

 3D Acceleration

• 3D Graphics Proces sor

– 128-bit 3D graphics engine – Dual pixel rendering pipes – Dual texture units – Floating-point setup engine – Internal full 32-bit ARGB format for high rendering quality – 8K Texture Cache

• Capability

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– Supports ROP2 – Supports various texture formats including 16/32bpp ARGB, 8bpp Palletized (ARGB), YUV 422/420 and

compressed texture (DXTC) – Texture sizes up to 2048x2048 – Microsoft DirectX texture compression – High quality texture filter for Nearest, Linear, Bi-linear, Tri-linear, and Anisotropic modes – Flat and Gouraud shading – Vertex Fog and Fog Table – Z-Bias, LOD-Bias, Polygon offset, Edge Anti-aliasing and Alpha Blending – Bump mapping and cubic mapping

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– Hardware back-face culling – Specular lighting

• Performance

– Two textures per pass – Triangle rate up to 4.5 million triangles per second – Pixel rate up to 200 million pixels per second for 2 textures each – Texel bilinear fill rate up to 400 million texels per second – High quality dithering

 Video Acceleration

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• High Quality Video Process or

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– RGB555, RGB565, RGB8888 and YUV422 video playback formats – High quality 5-tap horizontal and 5-tap vertical scaler (up or down) for both horizontal and vertical scaling

(linear interpolation for horizontal and vertical p-scaling and filtering for horizontal and vertical down-

scaling) – Independent graphics and video gamma tables – 2 sets of Color and Chroma Key support – Color enhancement for contrast, hue, saturation and brightness – YUV-to-RGB color space conversion – Display rotation in clockwise and counter-clockwise directions

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– Bob, Weave, Median-filter and Adaptive de-interlacing modes – 3:2 / 2:2 pull-down detection – De-blocking mode support – Combining of many special effects such as filter, scaling up or down, sub-picture blending, de-interlacing

and deblocking to one pass process – Tear-free double / triple buffer flipping – Input video vertical blanking or line interrupt – Video gamma correction

• Video Overlay

– Simultaneous graphics and TV video playback overlay – Supports video window overlays – Supports both YUV and RGB format Chroma Key – Supports 16 operations for Color and Chroma Key – Hardware sub-picture blending

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• MPEG Video Playback

– MPEG-2 hardware VLD (Various Length Decode), iDCT, and motion compensation for full speed DVD

and MPEG-2 playback at full D1 resolution – MPEG-4 ASP (Advanced Simple Profile) Level 5 with GMC (Global Motion Compensation) L0/L1 and ¼

pixel MC support for high video quality and performance – High quality DVD and streaming video playback

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– DVD playback auto-flipping – DVD sub-picture playback overlay

• Video Capture Capability

– 8-bit capture port following ITU-R BT656, VIP 1.1 and VIP 2.0 standards supporting 16 / 32-bit RGB and

YUV422 video capture formats – Video capture and playback tear free auto flipping – Multiplexed on Digital Video Port 0 (DVP0 selectable as Capture-In or TV-Out) – External Hsync / Vsync support

 Advanced Graphics Power Management Support

• Built-in reference voltage generator and monitor sense circuits

• Automatic panel power sequencing and VESA DPMS (Display Power Management Signaling) CRT power-

down

• External I/O signal controls enabling of graphics accelerator into standby / suspend-off state

• Dynamic clock gating for inactive functions to achieve maximum power savings

• I2C Serial Bus and DDC / E-DDC Monitor Communications for Plug-and-Play configuration

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 Extensive Display Support for External Video Output

• CRT Display Interface

• Digital Video Port with Support for TV Out or Video Capture In

• Digital Video Port with Support for TV Out or External DVI Transmitter

• 24-Bit / Dual-12-Bit FPD Interface to External LVDS Transmitter

• Two Display En gines

– Provides two independent display engines, each of which can display completely different information at

different resolutions, pixel depths, and refresh rates (supports different images on different displays

simultaneously) – CRT, FPD, DVI monitor and TV refresh rates are independently programmable for optimum image quality – Improved display flexibility with simultaneous FPD / CRT, FPD / TV, FPD / DVI and other combined

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• CRT Display

– CRT display interface with 24-bit true-color RAMDAC up to 350 MHz pixel rate with gamma correction

capability

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– Supports CRT resolutions up to 1920 x 1440

• TV-Out Interface

– 12-bit interface to external TV encoder for ATSC, NTSC or PAL TV display – Selectable to use either Digital Video Port 0 (DVP0) or Digital Video Port 1 (GDVP1)

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– Supports 3.3V signaling on DVP0 and 1.5V signaling on GDVP1

• 12-Bit DVI Transmitter Interface

– Option of AGP-multiplexed digital video port 1 (GDVP1) when that port is not being used for TV out – Supports external DVI transmitter for a driving a DVI monitor – Double-data-rate data transfer with clock rates up to 165 MHz – Built-in digital phase adjuster to fine-tune signal timing between clock and data bus

• 24-Bit Flat Panel Display (FPD) Interface

– Multiplexed with external AGP port pins – Supports 18/24-bit FPD interface with external LVDS transmitter chip using single or double-data rate

data transfer – Supports panel resolutions up to 1600x1200

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• Dual 12-Bit Flat Panel Display (FPD) Interface

– Alternate operating mode of FPD interface with external LVDS transmitters – Single or separate sets of clock and sync signals – Supports panel resolutions up to 1600x1200

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 Full Software Support

• Microsoft DirectX 7.0, 8.0 and 9.0 compatible

• Microsoft DirectX Texture Compression (DXTC / S3TC)

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• Supports OpenGL

• Drivers for major operating systems and APIs: Windows 9x/ME, Windows 2000, Windows XP,

Direct3DDirectDraw, DirectShow, and OpenGL ICD for Windows 9x/ME and XP

• Windows NT 4.0 Standard VGA driver

 DuoView+™ Dual Image Capability

• WinXP, WinME and Win98 multi-monitor, extended desktop support

• Independent resolution, refresh rate and color depth for secondary desktop

1.2.4 VT8235CE Highly Integrated South Bridge

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The VT8235 Version CE South Bridge is a high integration, high performance, power-efficient, and high compatibility device that supports Intel and non-Intel based processor to V-Link bus bridge functionality to make a complete Microsoft PC2001-compliant PCI/LPC system. The VT8235 Version CE includes standard intelligent peripheral controllers:

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a) IEEE 802.3 compliant 10 / 100 Mbps PCI bus master Ethernet MAC with standard MII interface to external

PHYceiver.

b) Master mode enhanced IDE controller with dual channel DMA engine and interlaced dual channel commands.

Dedicated FIFO coupled with scatter and gather master mode operation allows high performance transfers between PCI and IDE devices. In addition to standard PIO and DMA mode operation, the VT8235 Version CE also supports

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the UltraDMA-133, 100, 66, and 33 standards to allow reliable data transfer at rates up to 133 MB/sec. The IDE controller is SFF-8038i v1.0 and Microsoft Windows-family compliant.

c) Universal Serial Bus controller that is USB v2.0 / 1.1 and Universal HCI v2.0 / 1.1 compliant. The VT8235

Version CE includes three root hubs with six function ports with integrated physical layer transceivers. The USB controller allows hot plug and play and isochronous peripherals to be inserted into the system with universal driver support. The controller also implements legacy keyboard and mouse support so that legacy software can run transparently in a non-USB-aware operating system environment.

d) Keyboard controller with PS2 mouse support.

e) Real Time Clock with 256 byte extended CMOS. In addition to the standard ISA RTC functionality, the integrated

RTC also includes the date alarm, century field, and other enhancements for compatibility with the ACPI standard.

f) Notebook-class power management functionality compliant with ACPI and legacy APM requirements. Multiple

sleep states (power-on suspend, suspend-to-DRAM, and suspend-to-Disk) are supported with hardware automatic wake-up. Additional functionality includes event monitoring, CPU clock throttling and stop (Intel processor protocol), PCI bus clock stop control, modular power, clock and leakage control, hardware-based and software- based event handling, general purpose I/O, chip select and external SMI.

g) Full System Management Bus (SMBus) interface.

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h) Integrated bus-mastering dual full-duplex direct-sound AC97-link-compatible sound system.

i) Plug and Play controller that allows complete steerability of all PCI interrupts and internal interrupts / DMA

channels to any interrupt channel. One additional steerable interrupt channel is provided to allow plug and play and reconfigurability of onboard peripherals for Windows family compliance.

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The VT8235 Version CE also enhances the functionality of the standard ISA peripherals. The integrated interrupt controller supports both edge and level triggered interrupts channel by channel. The integrated DMA controller supports type F DMA in addition to standard ISA DMA modes. Compliant with the PCI-2.2 specification, the VT8235 Version CE supports delayed transactions and remote power management so that slower ISA peripherals do not block the traffic of the PCI bus. Special circuitry is built in to allow concurrent operation without causing dead lock even in a PCI-to-PCI bridge environment. The chip also includes eight levels (doublewords) of line buffers from the PCI bus to the ISA bus to further enhance overall system performance.

1.2.5 CardBus: CB1410

Features:

3.3V operation with 5V tolerant

LFBGA 144-ball package

• Compliant with

– PCI Local Bus Specification, Revision 2.2 – PCI Bus Power Management Interface Specification, Revision 1.1

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– PCI Mobile Design Guide, Version 1.1 – Advanced Configuration and Power Interface Specification, Revision 1.0 – PC 99 System Design Guide – PC Card Standard 8.0

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• Interrupt Configuration

– Supports parallel PCI interrupts – Supports parallel IRQ and parallel PCI interrupts – Supports serialized IRQ and parallel PCI interrupts – Supports serialized IRQ and PCI interrupts

• Power Management Control Logic

– Supports CLKRUN# protocol – Supports SUSPEND# – Supports PCI PME# from D3, D2, D1 and D0 – Supports PCI PME# from D3Cold – Supports D3STATE# (CB1410 only)

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• Power Switch Interface

– CB1410 supports parallel 4 wire power switch interface.

• Misc Control Logic

– Supports serial EEPROM interface – Supports socket activity LED – Supports 5 GPIOs and GPE# – Supports SPKROUT, CAUDIO and RIOUT# – Supports PCI LOCK#

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1.2.6 AC’97 Audio System: Advance Logic, Inc, ALC65

The ALC655 is a 16-bit, full duplex AC'97 2.3 compatible six channels audio CODEC designed for PC multimedia systems,including host/soft audio and AMR/CNR based designs. The ALC655 incorporates proprietary converter technology to meet performance requirements on PC99/2001 systems. The ALC655 CODEC provides three pairs of stereo outputs with 5-Bitvolume controls, a mono output, and multiple stereo and mono inputs, along with flexible mixing, gain and mute functions to provide a complete integrated audio solution for PCs. The digital interface circuitry of the ALC655 CODEC operates from a 3.3V power supply for use in notebook and PC applications. The ALC655 integrates 50mW/20ohm headset audio amplifiers at Front-Out and Surr-Out, built-in 14.318M 24.576MHz PLL and PCBEEP generator, those can save BOM costs. The ALC655 also supports the S/PDIF input and output function, which can offer easy connection of PCs to consumer electronic products, such as AC3 decoder/speaker and mini disk devices. ALC655 supports host/soft audio from Intel ICHx chipsets as well as audio controller based VIA/SIS/ALI/AMD/nVIDIA/ATI chipset. Bundled Windows series drivers (WinXP/ME/2000/98/NT), EAX/

Direct Sound 3D/ I3DL2/ A3D compatible sound effect utilities (supporting Karaoke, 26-kind of environment sound emulation,10-band equalizer), HRTF 3D positional audio and Sensaura™ 3D (optional) provide an excellent entertainment package and game experience for PC users. Besides, ALC655 includes Realtek’s impedance sensing techniques that makes device load on outputs and inputs can be detected.

• Meets performance requirements for audio on PC99/2001 systems

• Meets Microsoft WHQL/WLP 2.0 audio requirements

• 16-bit Stereo full-duplex CODEC with 48KHz sampling rate

• Compliant with AC’97 2.3 specifications

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– 14.318MHz- 24.576MHz PLL to save crystal – 12.288MHz BITCLK input can be consumed – Integrated PCBEEP generator to save buzzer – Interrupt capability

• Three analog line-level stereo inputs with 5-bit volume control: LINE_IN, CD, AUX

• High quality differential CD input

• Two analog line-level mono input: PCBEEP,PHONE-IN

• Two software selectable MIC inputs applications (software selectable)

• Boost preamplifier for MIC input 50mW/20 amplifier

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• External Amplifier Power Down (EAPD) capability

• Power management and enhanced power saving features

• Stereo MIC record for AEC/BF application

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• Supports Power Off CD function

• Adjustable VREFOUT control Supports double sampling rate (96KHz) of DVD audio playback

• Support 48KHz of S/PDIF output is compliant with AC’97 rev2.3 specification

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• Power support: Digital: 3.3V; Analog: 3.3V/5V

1.2.7 MDC: PCTEL Modem Daughter Card PCT2303W (ASKEY V1456VQL-P1)

The PCT2303W chipset is designed to meet the demand of this emerging worldwide AMR/MDC market. The combination of PC-TEL’s well proven PCT2303W chipset and the HSP56TM MR software modem driver allows systems manufactures to implement modem functions in PCs at a lower bill of materials (BOM) while maintaining higher system performance.

PC-TEL has streamlined the traditional modem into the Host Signal Processing (HSP) solution. Operating with the Pentium class processors, HSP becomes part of the host computer’s system software. It requires less power to operate and less physical space than standard modem solutions. PC-TEL’s HSP modem is an easily integrated, cost-effective communications solution that is flexible enough to carry you into the future.

MiTac Secret

The PCT2303W chip set is an integrated direct access arrangement (DAA) and Codec that provides a programmable line interface to meet international telephone line requirements. The PCT2303W chip set is available in two 16-pin small outline packages (AC’97 interface on PCT303A and phone-line interface on PCT303W). The chip set eliminates the need for an AFE, an isolation transformer, relays, opto-isolators, and 2-to 4-wire hybrid. The PCT2303W chip set dramatically reduces the number of discrete components and cost required to achieve compliance with international regulatory requirements. The PCT2303W complies with AC’97 Interface specification Rev. 2.1.

The chip set is fully programmable to meet world-wide telephone line interface requirements including those described by CTR21, NET4, JATE, FCC, and various country-specific PTT specifications. The programmable parameters of the PCT2303W chip set include AC termination, DC termination, ringer impedance, and ringer

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8666 N/B Maintenance

threshold. The PCT2303W chip set has been designed to meet stringent world-wide requirements for out-of-band energy, billing-tone immunity, lightning surges, and safety requirements.

Features:

Virtual com port with a DTE throughout up to 460.8Kbps.

G3 Fax compatible

Auto dial and auto answer

Ring detection

 Codec/DAA Features

• AC97 2.1 compliant

• 86dB dynamic range TX/RX paths

• 2-4-wire hybrid

• Integrated ring detector

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• High voltage isolation of 4000V

• Support for “Caller ID”

• Compliant with FCC Part68, CTR21, Net4 and JATE

+ 173 hidden pages

MiTAC 8666 Service Manual

Specifications and Main Features

Frequently Asked Questions

User Manual