The Intel® Desktop Board D845EBT may contain design defects or errors known as errata that may cause the product to deviate from published specifications. Current
characterized errata are documented in the Intel
®
Desktop Board D845EBT Specification Update.
Order Number: A92200-001
Revision History
Revision Revision History Date
-001 First release of the Intel Desktop Board D845EBT Technical Product
Specification.
This product specification applies to only the standard Intel Desktop Board D845EBT with BIOS
identifier BT84510A.86A.
Changes to this specification will be published in the Intel Desktop Board D845EBT Specification
Update before being incorporated into a revision of this document.
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. EXCEPT AS
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WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE
OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR
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Intel may make changes to specifications, product descriptions, and plans at any time, without notice.
The Intel Desktop Board D845EBT may contain design defects or errors known as errata that may cause the product to
deviate from published specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications before placing your product order.
Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be
obtained from:
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P.O. Box 5937
Denver, CO 80217-9808
or call in North America 1-800-548-4725, Europe 44-0-1793-431-155, France 44-0-1793-421-777,
Germany 44-0-1793-421-333, other Countries 708-296-9333.
Intel, Pentium, Celeron, and LANDesk are registered trademarks of Intel Corporation or its subsidiaries in the United States
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†
Other names and brands may be claimed as the property of others.
Copyright 2002, Intel Corporation. All rights reserved.
May 2002
Preface
This Technical Product Specification (TPS) specifies the Intel Desktop Board D845EBT layout,
components, connectors, power and environmental requirements, and BIOS. The TPS describes
the standard product and available manufacturing options.
Intended Audience
The TPS is intended to provide detailed, technical information about the Desktop Board D845EBT
and its components to the vendors, system integrators, and other engineers and technicians who
need this level of information. It is specifically not intended for general audiences.
What This Document Contains
Chapter Description
1 A description of the hardware used on the Desktop Board D845EBT
2 A map of the resources of the Desktop Board D845EBT
3 The features supported by the BIOS Setup program
4 The contents of the BIOS Setup program’s menus and submenus
5 A description of the BIOS error messages, beep codes, and POST codes
Typographical Conventions
This section contains information about the conventions used in this specification. Not all of these
symbols and abbreviations appear in all specifications of this type.
Notes, Cautions, and Warnings
NOTE
✏
Notes call attention to important information.
CAUTION
Cautions are included to help you avoid damaging hardware or losing data.
WARNING
Warnings indicate conditions, which if not observed, can cause personal injury.
# Used after a signal name to identify an active-low signal (such as USBP0#)
(NxnX) When used in the description of a component, N indicates component type, xn are the relative
coordinates of its location on the Desktop Board D845EBT, and X is the instance of the
particular part at that general location. For example, J5J1 is a connector, located at 5J. It is
the first connector in the 5J area.
GB Gigabyte (1,073,741,824 bytes)
GB/sec Gigabytes per second
KB Kilobyte (1024 bytes)
Kbit Kilobit (1024 bits)
kbits/sec 1000 bits per second
MB Megabyte (1,048,576 bytes)
MB/sec Megabytes per second
Mbit Megabit (1,048,576 bits)
Mbits/sec Megabits per second
xxh An address or data value ending with a lowercase h indicates a hexadecimal value.
x.x V Volts. Voltages are DC unless otherwise specified.
†
This symbol is used to indicate third-party brands and names that are the property of their
respective owners.
• Support for single-sided or double-sided DIMMs (DDR 200 and DDR 266)
• Support for up to 2 GB of system memory
NOTE: The Desktop Board D845EBT has been designed to support DIMMs based
on 512 Mbit technology for a maximum onboard capacity of up to 2 GB, but
this technology has not been validated on this board. Please refer to the
following Intel web site:
Five PCI bus add-in card connectors (SMBus routed to PCI bus connector 1)
SMSC LPC47M102 LPC Bus I/O controller
®
Intel
82562ET 10/100 Mbits/sec Platform LAN Connect (PLC) device
continued
12
Table 1. Feature Summary (continued)
Hardware Monitor
Subsystem
BIOS
Instantly Available
PC Technology
• Hardware management ASIC
• Voltage sense to detect out of range power supply voltages
• Thermal sense to detect out of range thermal values
• Two fan sense inputs used to monitor fan activity
• Fan speed control
• Intel/AMI BIOS (resident in the 4 Mbit FWH)
• Support for Advanced Configuration and Power Interface (ACPI), Plug and Play,
and SMBIOS
• Support for PCI Local Bus Specification Revision 2.2
• Suspend to RAM support
• Wake on PCI, CNR, RS-232, front panel, PS/2 devices, and USB ports
For information about Refer to
The Desktop Board D845EBT’s compliance level with ACPI,
Plug and Play, and SMBIOS.
Product Description
Section 1.4, page 17
1.1.2 Manufacturing Options
Table 2 describes the manufacturing options for the Desktop Board D845EBT. Not every
manufacturing option is available in all marketing channels. Please contact your Intel
representative to determine which manufacturing options are available to you.
Table 2. Manufacturing Options
Audio
CNR
For information about Refer to
Available configurations for the Desktop Board D845EBT Section 1.2, page 16
The Desktop Board D845EBT includes either of the following audio subsystems for
AC ’97 processing:
• 6-channel audio subsystem using the Analog Devices AD1980 codec
• 2-channel audio subsystem using the Analog Devices AD1981A codec
Communication and Networking Riser (CNR) connector.
Figure 1 shows the location of the major components on the Desktop Board D845EBT.
CA
B
D
V
U
T
S
R
Q
P
A Audio codec L Diskette drive connector
B Intel 82562ET PLC device M 4 Mbit Firmware Hub (FWH)
C AGP connector N Intel 82801DB I/O Controller Hub (ICH4)
D Back panel connectors O Speaker
E +12 V power connector (ATX12V) P Front panel connector
F Intel 82845E Memory Controller Hub (MCH) Q RAID connectors
G µPGA478 processor socket R RAID controller
H DIMM sockets S Battery
I I/O controller T PCI bus add-in card connectors
J Power connector U IEEE 1394a-2000 controller
K IDE connectors V CNR connector (optional)
N
O
L
J
KM
OM14388
E
F
G
H
I
14
Figure 1. Desktop Board D845EBT Components
Product Description
1.1.4 Block Diagram
Figure 2 is a block diagram of the major functional areas of the Desktop Board D845EBT. See
Figure 4 on page 24 for USB port routing.
The Desktop Board D845EBT supports drivers for all of the onboard hardware and subsystems
under the following operating systems:
†
• Microsoft Windows
• Windows ME
• Windows 2000
• Windows XP
For information about Refer to
Supported drivers Section 1.2, page 16
98 SE
NOTES
✏
• Third party vendors may offer other drivers.
• IEEE 1394a-2000 support has been tested with Windows 2000 and Windows XP drivers and is
not currently supported by any other operating system.
• USB 2.0 support has been tested with Windows 2000 and Windows XP drivers and is not
currently supported by any other operating system.
16
1.4 Design Specifications
Table 3 lists the specifications applicable to the Desktop Board D845EBT.
Table 3. Specifications
Reference
Name
1394
AC ’97 Audio Codec ’97 Revision 2.2,
ACPI Advanced Configuration
AGP Accelerated Graphics Port
AMI BIOS AMIBIOS Desktop Core 8.0 AMIBIOS 8.0,
ATA/
ATAPI-5
ATX ATX Specification Version 2.03,
ATX12V ATX/ATX12V Power
BIS Boot Integrity Services
CNR
Specification
Title
IEEE Std 1394-1995,
IEEE Standard for a High
Performance Serial Bus
IEEE Std 1394a-2000,
IEEE Standard for a High
Performance Serial Bus –
Amendment 1
and Power Interface
Specification
Interface Specification
Information Technology-AT
Attachment with Packet
Interface - 5
(ATA/ATAPI-5)
Supply Design Guide
(BIS) Application
Programming Interface
(API)
Communication and
Network Riser (CNR)
Specification
Version, Revision Date,
and Ownership
November 8, 2001
Institute of Electrical and
Electronic Engineers.
June 29, 2000
Institute of Electrical and
Electronic Engineers.
September 2000,
Intel Corporation.
Version 2.0,
July 27, 2000,
Compaq Computer
Corporation,
Intel Corporation,
Microsoft Corporation,
Phoenix Technologies
Limited, and
Toshiba Corporation.
Revision 2.0,
May 4, 1998,
Intel Corporation.
2001,
American Megatrends, Inc.
Revision 3,
February 29, 2000,
Contact: T13 Chair,
Seagate Technology.
December 1998,
Intel Corporation.
Version 1.2,
August 2000,
Intel Corporation.
Version 1.0,
August 4, 1999,
Intel Corporation.
Revision 1.2,
November 8, 2001,
Intel Corporation.
Version 2.1,
September 20, 1999,
Intel Corporation.
Version 2.3.1,
March 16, 1999,
American Megatrends
Incorporated,
Award Software International
Incorporated,
Compaq Computer Corporation,
Dell Computer Corporation,
Hewlett-Packard Company,
Intel Corporation,
International Business Machines
Corporation,
Phoenix Technologies Limited,
and SystemSoft Corporation.
Revision 1.1,
March 1996,
Intel Corporation.
Revision 2.0,
April 27, 2000,
Compaq Computer Corporation,
Hewlett-Packard Company,
Lucent Technologies Inc.,
Intel Corporation,
Microsoft Corporation,
NEC Corporation, and
Koninklijke Philips Electronics
N.V.
Version 2.0,
December 18, 1998,
Intel Corporation.
Use of unsupported processors can damage the Desktop Board D845EBT, the processor, and the
power supply. See Intel’s World Wide Web site for the most up-to-date list of supported
processors for the Desktop Board D845EBT.
The Desktop Board D845EBT supports:
• A Pentium 4 processor in a µPGA478 socket with a system bus of 400/533 MHz
• A Celeron processor in a µPGA478 socket with a system bus of 400 MHz
The list of supported processors for the Desktop Board D845EBT is available from Intel’s World
Wide Web site. All supported onboard memory can be cached. See the processor’s data sheet for
cachability limits.
NOTE
✏
Do not use a standard ATX power supply. The Desktop Board D845EBT will not boot with a
standard ATX power supply. Use only ATX12V-compliant power supplies with the Desktop Board
D845EBT. ATX12V power supplies have an additional power lead that provides required
supplemental power for the processor. Connect the 20-pin and 4-pin leads of ATX12V power
supplies to the corresponding connectors on the Desktop Board D845EBT or it will not boot.
For information about Refer to
Supported processors Section 1.2, page 16
Processor usage Section 1.2, page 16
Power supply connectors Section 2.8.2.2, page 59
20
Product Description
1.6 System Memory
The Desktop Board D845EBT has two DIMM sockets and supports the following memory
features:
• 2.5 V (only) 184-pin DDR SDRAM DIMMs with gold-plated contacts
• Unbuffered, unregistered single-sided or double-sided DIMMs
• Maximum total system memory: 2 GB
• Minimum total system memory: 64 MB
• 200/266 MHz DDR SDRAM DIMMs only
• Serial Presence Detect
• Suspend to RAM
• Non-ECC and ECC DIMMs
NOTES
✏
• Remove the AGP video card before installing or upgrading memory to avoid interference with
the memory retention mechanism.
• The Desktop Board D845EBT has been designed to support DIMMs based on 512 Mbit
technology for a maximum onboard capacity of up to 2 GB, but this technology has not been
validated on this desktop board. Please refer to the following Intel web sites for the latest lists
of tested memory.
http://developer.intel.com/design/motherbd/bt/bt_mem.htm
• To be fully compliant with all applicable DDR SDRAM memory specifications, the Desktop
Board D845EBT should be populated with DIMMs that support the Serial Presence Detect
(SPD) data structure. This allows the BIOS to read the SPD data and program the chipset to
accurately configure memory settings for optimum performance. If non-SPD memory is
installed, the BIOS will attempt to correctly configure the memory settings, but performance
and reliability may be impacted or the DIMMs may not function under the determined
frequency.
• For ECC functionality, all installed DIMMs must be ECC.
Note: In the second column, “DS” refers to double-sided memory modules (containing two rows of DDR SDRAM) and “SS”
refers to single-sided memory modules (containing one row of DDR SDRAM).
Configuration
DDR SDRAM
Density
DDR SDRAM Organization
Front-side/Back-side
Number of DDR
SDRAM Devices
22
Product Description
1.7 Intel® 845E Chipset
The Intel 845E chipset consists of the following devices:
• Intel 82845E Memory Controller Hub (MCH) with Accelerated Hub Architecture (AHA) bus
• Intel 82801DB I/O Controller Hub (ICH4) with AHA bus
• Firmware Hub (FWH)
The MCH is a centralized controller for the system bus, the memory bus, the AGP bus, and the
Accelerated Hub Architecture interface. The ICH4 is a centralized controller for the Desktop
Board D845EBT’s I/O paths. The FWH provides the nonvolatile storage of the BIOS. The
component combination provides the chipset interfaces as shown in Figure 3.
AGP is a high-performance interface for graphics-intensive applications, such as 3D applications.
While based on the PCI Local Bus Specification, Rev. 2.2, AGP is independent of the PCI bus and
is intended for exclusive use with graphical display devices. AGP overcomes certain limitations of
the PCI bus related to handling large amounts of graphics data with the following features:
• Pipelined memory read and write operations that hide memory access latency
• Demultiplexing of address and data on the bus for nearly 100 percent efficiency
NOTES
✏
• The AGP connector is keyed for 1.5 V Switching Voltage Level (SVL) AGP cards only; the
connector is not mechanically compatible with legacy 3.3 V AGP cards. Do not attempt to
install a legacy 3.3 V AGP card.
• Install memory in the DIMM sockets prior to installing the AGP video card to avoid
interference with the memory retention mechanism.
For information about Refer to
The location of the AGP connector Figure 1, page 14
The signal names of the AGP connector Table 36, page 65
Obtaining the Accelerated Graphics Port Interface Specification Section 1.4, page 17
1.7.2 USB
The Desktop Board D845EBT supports up to six USB 2.0 ports, fully supports UHCI and EHCI,
and uses UHCI- and EHCI-compatible drivers. For more than six USB devices, an external hub
can be connected to any of the ports.
The ICH4 provides the USB controller for all ports, as shown in Figure 4. The port arrangement is
as follows:
• Two ports are implemented with stacked back panel connectors, adjacent to the PS/2
connectors
• Two ports are implemented with stacked back panel connectors, adjacent to the audio
connectors
• Two ports are routed to the front panel USB connector
Back panel USB connectors
adjacent to the PS/2 ports
Back panel USB connectors
adjacent to the audio connectors
Front panel USB connectors
OM14260
82801DB
I/O Controller Hub
(ICH4)
USB
USB
USB
USB ports (2)
USB ports (2)
USB ports (2)
24
Figure 4. USB Port Configuration
Product Description
NOTES
✏
• Computer systems that have an unshielded cable attached to a USB port may not meet FCC
Class B requirements, even if no device is attached to the cable. Use shielded cable that meets
the requirements for full-speed devices.
• USB 2.0 support has been tested with Windows 2000 and Windows XP drivers and is not
currently supported by any other operating system.
For information about Refer to
The location of the USB connectors on the back panel Figure 10, page 54
The signal names of the back panel USB connectors Table 18, page 55
The location of the front panel USB connector Figure 13, page 69
The signal names of the front panel USB connector Table 44, page 70
The front panel, EHCI, UHCI, and USB specifications Section 1.4, page 17
1.7.3 IDE Support
1.7.3.1 IDE Interfaces
The ICH4’s IDE controller has two independent bus-mastering IDE interfaces that can be
independently enabled. The IDE interfaces support the following modes:
• Programmed I/O (PIO): processor controls data transfer.
• 8237-style DMA: DMA offloads the processor, supporting transfer rates of up to 16 MB/sec.
• Ultra DMA: DMA protocol on IDE bus supporting host and target throttling and transfer rates
of up to 33 MB/sec.
• ATA-66: DMA protocol on IDE bus supporting host and target throttling and transfer rates of
up to 66 MB/sec. ATA-66 protocol is similar to Ultra DMA and is device driver compatible.
• ATA-100: DMA protocol on IDE bus allows host and target throttling. The ICH4’s ATA-100
logic can achieve read transfer rates up to 100 MB/sec and write transfer rates up to 88 MB/sec.
✏ NOTE
ATA-66 and ATA-100 are faster timings and require a specialized cable to reduce reflections,
noise, and inductive coupling.
The IDE interfaces also support ATAPI devices (such as CD-ROM drives) and ATA devices using
the transfer modes listed in Section 4.4.4.1 on page 104.
The BIOS supports Logical Block Addressing (LBA) and Extended Cylinder Head Sector (ECHS)
translation modes. The drive reports the transfer rate and translation mode to the BIOS.
The Desktop Board D845EBT supports Laser Servo (LS-120) diskette technology through the IDE
interfaces. The BIOS supports booting from an LS-120 drive.
The BIOS will always recognize an LS-120 drive as an ATAPI floppy drive. To ensure correct
operation, do not configure the drive as a hard disk drive.
For information about Refer to
The location of the IDE connectors Figure 12, page 62
The signal names of the IDE connectors Table 39, page 67
IDE RAID support Section 1.8, page 27
1.7.3.2 SCSI Hard Drive Activity LED Connector
The SCSI hard drive activity LED connector is a 1 x 2-pin connector that allows an add-in
SCSI controller to use the same LED as the onboard IDE controller. For proper operation, this
connector should be wired to the LED output of the add-in SCSI controller. The LED indicates
when data is being read from, or written to, both the add-in SCSI controller and the IDE controller.
For information about Refer to
The location of the SCSI hard drive activity LED connector Figure 12, page 62
The signal names of the SCSI hard drive activity LED connector Table 40, page 67
1.7.4 Real-Time Clock, CMOS SRAM, and Battery
A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When the computer
is not plugged into a wall socket, the battery has an estimated life of three years. When the
computer is plugged in, the standby current from the power supply extends the life of the battery.
The clock is accurate to ± 13 minutes/year at 25 ºC with 3.3 VSB applied.
✏ NOTE
If the battery and AC power fail, custom defaults, if previously saved, will be loaded into CMOS
RAM at power-on.
1.7.5 4 Mbit Firmware Hub (FWH)
The FWH provides the following:
• System BIOS program
• Logic that enables protection for storing and updating of platform information
26
Product Description
1.8 IDE RAID Controller
The Promise Technology PDC20267 is a PCI bus-mastering ATA controller of a redundant array
of independent disks (RAID). The controller supports:
• Up to four UDMA 100/66/33 drives or EIDE drives
• RAID 0 (striping)
• RAID 1 (mirroring)
• RAID 0+1 (striping, then mirroring)
• 100 MB/sec data transfer with CRC error checking
• A bootable array
• Hot swapping of failed mirrored drives
For information about Refer to
The location of the IDE RAID connectors Figure 12, page 62
The signal names of the IDE RAID connectors Table 41, page 68
BIOS Setup program’s Boot menu Table 79, page 113
1.9 I/O Controller
The SMSC LPC47M102 I/O controller provides the following features:
• Two serial ports
• One parallel port with Extended Capabilities Port (ECP) and Enhanced Parallel Port
(EPP) support
• Serial IRQ interface compatible with serialized IRQ support for PCI systems
• PS/2-style mouse and keyboard interfaces
• Interface for one 1.44 MB or 2.88 MB diskette drive
• Intelligent power management, including a programmable wake-up event interface
• PCI power management support
The BIOS Setup program provides configuration options for the I/O controller.
For information about Refer to
SMSC LPC47M102 I/O controller http://www.smsc.com
1.9.1 Serial Ports
The Desktop Board D845EBT has two serial port connectors. Serial port A is located on the back
panel. Serial port B is accessible using a connector located near the main power connector. The
serial ports support data transfers at speeds up to 115.2 kbits/sec with BIOS support.
For information about Refer to
The location of the serial port A connector Figure 10, page 54
The signal names of the serial port A connector Table 19, page 55
The location of the serial port B connector Figure 13, page 69
The signal names of the serial port B connector Table 43, page 70
The 25-pin D-Sub parallel port connector is located on the back panel. Use the BIOS Setup
program to set the parallel port mode.
For information about Refer to
The location of the parallel port connector Figure 10, page 54
The signal names of the parallel port connector
Table 20, page 56
Setting the parallel port’s mode Table 68, page 101
1.9.3 Diskette Drive Controller
The I/O controller supports one diskette drive. Use the BIOS Setup program to configure the
diskette drive interface.
For information about Refer to
The location of the diskette drive connector Figure 12, page 62
The signal names of the diskette drive connector Table 38, page 66
The supported diskette drive capacities and sizes Table 71, page 106
1.9.4 Keyboard and Mouse Interface
The PS/2 keyboard and mouse connectors are located on the back panel.
NOTE
✏
The keyboard is supported in the bottom PS/2 connector and the mouse is supported in the top
PS/2 connector. Power to the computer should be turned off before a keyboard or mouse is
connected or disconnected.
For information about Refer to
The location of the keyboard and mouse connectors Figure 10, page 54
The signal names of the keyboard and mouse connectors Table 16, page 55
28
Product Description
1.10 IEEE 1394a-2000 Controller
The Agere Systems FW323 PCI bus-based controller provides IEEE 1394a-2000 OHCI link and
PHY core functionality. The controller supports:
• IEEE 1394a-2000-compliant or IEEE 1394-1995-compliant peripheral devices
• Isochronous and asynchronous data transfer
• Data transfer up to 400 Mbits/sec
• Peripheral hot swapping
• Plug and play
The Desktop Board D845EBT has one back panel and two front panel IEEE 1394a-2000
connectors.
NOTE
✏
IEEE 1394a-2000 support has been tested with Windows 2000 and Windows XP drivers and is not
currently supported by any other operating system.
For information about Refer to
The location of the back panel IEEE 1394a-2000 connector Figure 10, page 54
The signal names of the back panel IEEE 1394a-2000 connector Table 17, page 55
The location of the front panel IEEE 1394a-2000 connectors Figure 13, page 69
The signal names of the front panel IEEE 1394a-2000 connectors Table 45, page 71
Obtaining IEEE standards:
• 1394-1995, IEEE Standard for a High Performance Serial Bus
• 1394a-2000, IEEE Standard for a High Performance Serial Bus – Amendment 1
Table 3, page 17
1.11 Audio Subsystem
The Desktop Board D845EBT includes one of the following:
• 6-channel audio subsystem based on the Analog Devices AD1980 codec (described on
page 30)
• 2-channel audio subsystem based on the Analog Devices AD1981A codec (described on
page 31)
Both audio subsystems feature:
• Split digital/analog architecture for improved S/N (signal-to-noise) ratio:> 90 dB
• Power management support for ACPI 2.0 (driver dependent)
• Microphone input that supports either of the following:
A single dynamic, condenser, or electret microphone
Dual microphones for use with voice recognition software
The subsystem includes the following connectors:
• Front panel analog audio connector that can be used as a connector for routing the following
signals to the front panel or used as a jumper block for routing the signals to the back panel
(see page 73 for more information). The connector/jumper block includes pins for:
Front left/right out
Mic in
• Back panel analog audio connectors:
Front left/right out
Center/Low Frequency Effects (LFE) out
Rear left/right out
Line in
Mic in
• Back panel digital line out (S/PDIF) connector
• ATAPI-style CD-ROM connector
Figure 6 is a block diagram of the 6-channel audio subsystem.
Front Left/Right Out
Center/LFE Out
82801DB
I/O Controller Hub
(ICH4)
AC ’97
Link
AD1980
Audio Codec
Rear Left/Right Out
Line In
Mic In
CD-ROM
S/PDIF Out
OM14465
Figure 5. 6-Channel Audio Subsystem Block Diagram
For information about Refer to
The front panel audio connector Section 2.8.3, page 69
The back panel audio connectors Section 2.8.1, page 54
30
1.11.2 2-Channel Audio Subsystem (Optional)
The audio subsystem includes the following:
• Intel 82801DB I/O Controller Hub (ICH4)
• Analog Devices AD1981A audio codec
• Microphone input that supports a single dynamic, condenser, or electret microphone
The subsystem has the following connectors:
• Front panel audio connector, including pins for:
Line out
Mic in
• Back panel audio connectors:
Line out
Line in
Mic in
• ATAPI-style CD-ROM connector
Figure 6 is a block diagram of the 2-channel audio subsystem.
Product Description
Line In
82801DB
I/O Controller Hub
(ICH4)
AC ’97
Link
AD1981A
Audio Codec
Line Out
Mic In
CD-ROM
OM14379
Figure 6. 2-Channel Audio Subsystem Block Diagram
For information about Refer to
Upgrading the onboard audio subsystem using a CNR audio card Section 1.13, page 35
The front panel audio connector Section 2.8.3, page 69
The back panel audio connectors Section 2.8.1, page 54
A 2 x 5-pin connector provides mic in and line out signals for front panel audio connectors.
For information about Refer to
The location of the connector Section 2.8.3, page 69
The signal names of the front panel audio connector Table 42, page 70
Obtaining the Front Panel I/O Connectivity Design GuideSection 1.4, page 17
NOTE
✏
The front panel audio connector is alternately used as a jumper block for routing audio signals.
Refer to Section 2.9.1 on page 73 for more information.
1.11.3.2 ATAPI-Style CD-ROM Connector
A 1 x 4-pin connector connects an internal ATAPI CD-ROM drive to the audio mixer.
For information about Refer to
The location of the ATAPI-style CD-ROM connector Figure 12, page 62
The signal names of the ATAPI-style CD-ROM connector Table 37, page 66
1.11.4 Audio Subsystem Software
Audio software and drivers are available from Intel’s World Wide Web site.
For information about Refer to
Obtaining audio software and drivers Section 1.2, page 16
32
Product Description
1.12 LAN Subsystem
The network interface controller subsystem consists of the ICH4 with integrated LAN Media
Access Controller (MAC) and a physical layer interface device. Features of the LAN subsystem
include:
• PCI bus master interface
• CSMA/CD protocol engine
• Serial CSMA/CD unit interface that supports the 82562ET (10/100 Mbits/sec Ethernet)
• PCI power management
Supports ACPI technology
Supports LAN wake capabilities
1.12.1 Intel® 82562ET Platform LAN Connect Device
The Intel 82562ET component provides an interface to the back panel RJ-45 connector with
integrated LEDs.
The Intel 82562ET provides the following functions:
• Basic 10/100 Ethernet LAN connectivity
• Supports RJ-45 connector with status indicator LEDs on the back panel
• Full device driver compatibility
• ACPI support
• Programmable transit threshold
• Configuration EEPROM that contains the MAC address
1.12.2 RJ-45 LAN Connector with Integrated LEDs
Two LEDs are built into the RJ-45 LAN connector. Table 5 describes the LED states when the
Desktop Board D845EBT is powered up and the LAN subsystem is operating.
Table 5. LAN Connector LED States
LED Color LED State Condition
Off 10 Mbits/sec data rate is selected. Green
On 100 Mbits/sec data rate is selected.
Yellow
Off LAN link is not established.
On (steady state) LAN link is established.
On (brighter and pulsing) The computer is communicating with another computer on
LAN software and drivers are available from Intel’s World Wide Web site.
For information about Refer to
Obtaining LAN software and drivers Section 1.2, page 16
1.13 CNR (Optional)
The Communication and Networking Riser (CNR) supports:
• AC ’97 interface: Supports audio and/or modem functions on the CNR card.
• SMBus interface: Provides Plug-and-Play functionality for the CNR card.
The CNR connector includes power signals required for power management and for CNR card
operation.
NOTE
✏
The Desktop Board D845EBT does not support USB and LAN functionality on CNR cards.
Figure 7 shows the signal interface between the ICH4 and the CNR.
Intel 82801DB
AC ’97 Interface
I/O Controller Hub
(ICH4)
SMBus
Figure 7. ICH4 and CNR Signal Interface
For information about Refer to
CNR specification Section 1.4, page 17
Communication and
Networking Riser
(Up to two AC ’97 codecs)
CNR Connector
OM14466
34
Product Description
The onboard two-channel audio subsystem can be upgraded to four- or six-channel audio using a
CNR audio upgrade card in a slave configuration. CNR audio upgrade cards are available in
multiple configurations from several different vendors supporting analog or S/PDIF digital
connections.
NOTES
✏
• For an audio multi-channel upgrade, you must install a audio CNR card that is compatible
with the onboard codec.
• If you install an audio CNR card that does not provide a multi-channel upgrade, the integrated
audio codec on the Desktop Board D845EBT will be disabled.
• Check with your CNR vendor to ensure that the CNR card has been tested with ICH4-based
systems.
The hardware management features enable the Desktop Board D845EBT to be compatible with the
Wired for Management (WfM) specification. The Desktop Board D845EBT has the following
hardware management features:
• Fan monitoring and control (through the I/O controller or the hardware monitoring and fan
control ASIC)
The features of the hardware monitoring and fan control ASIC (Analog Devices ADM1027,
National Semiconductor LM85CIMQ, Standard Microsystems SMSC EMC6D101, or equivalent)
include:
• Internal ambient temperature sensor
• Two remote thermal diode sensors for direct monitoring of processor temperature and ambient
temperature sensing
• Power supply monitoring of five voltages (+5 V, +12 V, +3.3 V Standby, +1.5 V, and +VCCP)
to detect levels above or below acceptable values
• Thermally monitored closed-loop fan control, for all three fans, that can adjust the fan speed or
switch the fans on or off as needed
• SMBus interface
For information about Refer to
The location of the fan connectors and sensors for thermal monitoring Figure 8, page 37
The Analog Devices ADM1027 http://www.analogdevices.com
The National Semiconductor LM85CIMQ http://www.national.com/
The Standard Microsystems SMSC EMC6D101 http://www.smsc.com
36
1.14.1.2 Thermal Monitoring
Figure 8 shows the location of the sensors and fan connectors.
Product Description
A
B
C
D
F
A Thermal diode, located on processor die
B Ambient temperature sensor, internal to
hardware monitoring ASIC
C Remote ambient temperature sensor
D Processor fan
E Rear chassis fan
F Front chassis fan
E
Figure 8. Thermal Monitoring
1.14.2 Fan Monitoring
Fan monitoring can be implemented using Intel® Active Monitor, Intel® LANDesk® Client
Manager, or third-party software.
For information about Refer to
The functions of the fan connectors Section 1.15.2.2, page 43
The Desktop Board supports a chassis security feature that detects if the chassis cover has been
removed. For the chassis intrusion circuit to function, the chassis’ power supply must be
connected to AC power. The security feature uses a mechanical switch on the chassis that attaches
to the chassis intrusion connector. The mechanical switch is open for normal computer operation.
NOTE
✏
Chassis intrusion detection may be implemented using Intel LANDesk Client Manager or
third-party software.
1.15 Power Management
Power management is implemented at several levels, including:
• Software support through Advanced Configuration and Power Interface (ACPI)
• Hardware support:
Power connector
Fan connectors
LAN wake capabilities
Instantly Available PC technology
Resume on Ring
Wake from USB
Wake from PS/2 devices
Power Management Event (PME#) wake-up support
38
Product Description
1.15.1 ACPI
ACPI gives the operating system direct control over the power management and Plug and Play
functions of a computer. The use of ACPI with the Desktop Board D845EBT requires an
operating system that provides full ACPI support. ACPI features include:
• Plug and Play (including bus and device enumeration)
• Power management control of individual devices, add-in boards (some add-in boards may
require an ACPI-aware driver), video displays, and hard disk drives
• Methods for achieving less than 15-watt system operation in the power-on/standby
sleeping state
• A Soft-off feature that enables the operating system to power-off the computer
• Support for multiple wake-up events (see Table 8 on page 41)
• Support for a front panel power and sleep mode switch
Table 6 lists the system states based on how long the power switch is pressed, depending on how
ACPI is configured with an ACPI-aware operating system.
Table 6. Effects of Pressing the Power Switch
If the system is in this state…
Off
(ACPI G2/G5 – Soft off)
On
(ACPI G0 – working state)
On
(ACPI G0 – working state)
Sleep
(ACPI G1 – sleeping state)
Sleep
(ACPI G1 – sleeping state)
…and the power switch is
pressed for
Less than four seconds Power-on
Less than four seconds Soft-off/Standby
More than four seconds Fail safe power-off
Less than four seconds Wake-up
More than four seconds Power-off
…the system enters this state
(ACPI G0 – working state)
(ACPI G1 – sleeping state)
(ACPI G2/G5 – Soft off)
(ACPI G0 – working state)
(ACPI G2/G5 – Soft off)
For information about Refer to
The Desktop Board D845EBT's compliance level with ACPI Section 1.4, page 17
Under ACPI, the operating system directs all system and device power state transitions. The
operating system puts devices in and out of low-power states based on user preferences and
knowledge of how devices are being used by applications. Devices that are not being used can be
turned off. The operating system uses information from applications and user settings to put the
system as a whole into a low-power state.
Table 7 lists the power states supported by the Desktop Board D845EBT along with the associated
system power targets. See the ACPI specification for a complete description of the various system
and power states.
Table 7. Power States and Targeted System Power
Global States Sleeping States
G0 – working
state
G1 – sleeping
state
G1 – sleeping
state
G1 – sleeping
state
G2/S5 S5 – Soft off.
G3 –
mechanical off
AC power is
disconnected
from the
computer.
Notes:
1. Total system power is dependent on the system configuration, including add-in boards and peripherals powered
by the system chassis’ power supply.
2. Dependent on the standby power consumption of wake-up devices used in the system.
S0 – working C0 – working D0 – working
S1 – Processor
stopped
S3 – Suspend to
RAM. Context
saved to RAM.
S4 – Suspend to
disk. Context
saved to disk.
Context not saved.
Cold boot is
required.
No power to the
system.
Processor
States
C1 – stop
grant
No power D3 – no power
No power D3 – no power
No power D3 – no power
No power D3 – no power for
Device States
state.
D1, D2, D3 –
device
specification
specific.
except for
wake-up logic.
except for
wake-up logic.
except for
wake-up logic.
wake-up logic,
except when
provided by
battery or external
source.
Targeted System
(Note 1)
Power
Full power > 30 W
5 W < power < 52.5 W
Power < 5 W
Power < 5 W
Power < 5 W
No power to the system.
Service can be performed
safely.
(Note 2)
(Note 2)
(Note 2)
40
Product Description
1.15.1.2 Wake-up Devices and Events
Table 8 lists the devices or specific events that can wake the computer from specific states.
Table 8. Wake-up Devices and Events
These devices/events can wake up the computer… …from this state
CNR S1, S3, S4, S5
LAN S1, S3, S4, S5
Modem (back panel Serial Port A) S1, S3
PME# S1, S3, S4, S5
Power switch S1, S3, S4, S5
PS/2 devices S1, S3
RTC alarm S1, S3, S4, S5
USB S1, S3
Note: For LAN and PME#, S5 is disabled by default in the BIOS Setup program. Setting this option to Power On will
enable a wake-up event from LAN in the S5 state.
(Note)
(Note)
NOTE
✏
The use of these wake-up events from an ACPI state requires an operating system that provides full
ACPI support. In addition, software, drivers, and peripherals must fully support ACPI wake
events.
Ensure that the power supply provides adequate +5 V standby current if LAN wake capabilities
and Instantly Available PC technology features are used. Failure to do so can damage the power
supply. The total amount of standby current required depends on the wake devices supported and
manufacturing options. Refer to Section 2.11.3 on page 79 for additional information.
The Desktop Board D845EBT provides power management hardware features, including:
• Power connector
• Fan connectors
• LAN wake capabilities
• Instantly Available PC technology
• Resume on Ring
• Wake from USB
• Wake from PS/2 keyboard
• PME# wake-up support
LAN wake capabilities and Instantly Available PC technology require power from the +5 V
standby line. The sections discussing these features describe the incremental standby power
requirements for each.
Resume on Ring enables telephony devices to access the computer when it is in a power-managed
state. The method used depends on the type of telephony device (external or internal).
NOTE
✏
The use of Resume on Ring and Wake from USB technologies from an ACPI state requires an
operating system that provides full ACPI support.
1.15.2.1 Power Connector
ATX12V-compliant power supplies can turn off the system power through system control. When
an ACPI-enabled system receives the correct command, the power supply removes all non-standby
voltages.
When resuming from an AC power failure, the computer returns to the power state it was in before
power was interrupted (on or off). The computer’s response can be set using the Last Power State
feature in the BIOS Setup program’s Boot menu.
For information about Refer to
The power connector locations Figure 11, page 59
The power connector signal names Table 28 and Table 31, page 60
The BIOS Setup program’s Boot menu Table 79, page 113
The ATX specification Section 1.4, page 17
42
1.15.2.2 Fan Connectors
Table 9 summarizes the fan connector function/operation.
CAUTION
The processor fan must be connected to the processor fan connector, not to a chassis fan
connector. Connecting the processor fan to a chassis fan connector may result in onboard
component damage that will halt fan operation.
Table 9. Fan Connector Function/Operation
Connector Description
Processor fan • +12 V DC connection for a processor fan or active fan heatsink.
• Fan is on in the S0 or S1 state.
Fan is off when the system is off or in the S3, S4, or S5 state.
• Wired to a fan tachometer input of the hardware monitoring and fan control ASIC.
• Closed-loop fan control that can adjust the fan speed or switch the fans on or off
as needed.
Front chassis fan • +12 V DC connection for a system or chassis fan.
• Fan is on in the S0 or S1 state.
Fan is off when the system is off or in the S3, S4, or S5 state.
• Wired to a fan tachometer input of the hardware monitoring and fan control ASIC.
• Closed-loop fan control that can adjust the fan speed or switch the fans on or off
as needed.
Rear chassis fan • +12 V DC connection for a system or chassis fan.
• Fan is on in the S0 or S1 state.
Fan is off when the system is off or in the S3, S4, or S5 state.
• Wired to a fan tachometer input of the hardware monitoring and fan control ASIC.
• Closed-loop fan control that can adjust the fan speed or switch the fans on or off
as needed.
For information about Refer to
The location of the fan connectors Figure 11, page 59
The signal names of the fan connectors Pages 60 and 61
The location of the fan connectors and sensors for thermal monitoring Figure 8, page 37
For LAN wake capabilities, the +5 V standby line for the power supply must be capable of
providing adequate +5 V standby current. Failure to provide adequate standby current when
implementing LAN wake capabilities can damage the power supply. Refer to Section 2.11.3 on
page 79 for additional information.
LAN wake capabilities enable remote wake-up of the computer through a network. The LAN
subsystem PCI bus network adapter monitors network traffic at the Media Independent Interface.
†
Upon detecting a Magic Packet
frame, the LAN subsystem asserts a wake-up signal that powers
up the computer. Depending on the LAN implementation, the Desktop Board D845EBT supports
LAN wake capabilities with ACPI in the following ways:
• PCI bus PME# signal for PCI 2.2 compliant LAN designs
• Onboard LAN subsystem
1.15.2.4 Instantly Available PC Technology
CAUTION
For Instantly Available PC technology, the +5 V standby line for the power supply must be
capable of providing adequate +5 V standby current. Failure to provide adequate standby current
when implementing Instantly Available PC technology can damage the power supply. Refer to
Section 2.11.3 on page 79 for additional information.
Instantly Available PC technology enables the Desktop Board D845EBT to enter the ACPI S3
(Suspend-to-RAM) sleep-state. While in the S3 sleep-state, the computer will appear to be off (the
power supply is off, and the front panel LED is amber if dual colored, or off if single colored.)
When signaled by a wake-up device or event, the system quickly returns to its last known wake
state. Table 8 on page 41 lists the devices and events that can wake the computer from the
S3 state.
The Desktop Board D845EBT supports the PCI Bus Power Management Interface Specification.
For information on the version of this specification, see Section 1.4. Add-in boards that also
support this specification can participate in power management and can be used to wake the
computer.
The use of Instantly Available PC technology requires operating system support and PCI 2.2
compliant add-in cards and drivers.
44
Product Description
1.15.2.5 +5 V Standby Power Indicator LED
The standby power indicator LED shows that power is still present even when the computer
appears to be off. Figure 9 shows the location of the standby power indicator LED.
CAUTION
If AC power has been switched off and the standby power indicator is still lit, disconnect the power
cord before installing or removing any devices connected to the Desktop Board D845EBT. Failure
to do so could damage the Desktop Board D845EBT and any attached devices.
CR3H1
OM14390
Figure 9. Location of the Standby Power Indicator LED
Sections 2.2 - 2.6 contain several standalone tables. Table 10 describes the system memory map,
Table 11 shows the fixed I/O map, Table 12 lists the DMA channels, Table 13 defines the PCI
configuration space map, and Table 14 describes the interrupts. The remaining sections in this
chapter are introduced by text found with their respective section headings.
2.2 Memory Map
Table 10. System Memory Map
Address Range (decimal) Address Range (hex) Size Description
1024 K - 2097152 K 100000 - 7FFFFFFF 2047 MB Extended memory
960 K - 1024 K F0000 - FFFFF 64 KB Runtime BIOS
896 K - 960 K E0000 - EFFFF 64 KB Reserved
800 K - 896 K C8000 - DFFFF 96 KB Available high DOS memory (open
to the PCI bus)
640 K - 800 K A0000 - C7FFF 160 KB Video memory and BIOS
639 K - 640 K 9FC00 - 9FFFF 1 KB Extended BIOS data (movable by
memory manager software)
512 K - 639 K 80000 - 9FBFF 127 KB Extended conventional memory
0 K - 512 K 00000 - 7FFFF 512 KB Conventional memory
The interrupts can be routed through either the Programmable Interrupt Controller (PIC) or the
Advanced Programmable Interrupt Controller (APIC) portion of the ICH4 component. The PIC is
supported in Windows 98 SE and Windows ME, and uses the first 16 interrupts. The APIC is
supported in Windows 2000 and Windows XP, and supports a total of 24 interrupts.
Table 14. Interrupts
IRQ System Resource
NMI I/O channel check
0 Reserved, interval timer
1 Reserved, keyboard buffer full
2 Reserved, cascade interrupt from slave PIC
3 COM2
4 COM1
5 LPT2 (Plug and Play option)/User available
6 Diskette drive
7 LPT1
8 Real-time clock
9 Reserved for ICH4 system management bus
10 User available
11 User available
12 Onboard mouse port (if present, else user available)
13 Reserved, math coprocessor
14 Primary IDE (if present, else user available)
15 Secondary IDE (if present, else user available)
(Note 2)
16
17
18
19
20
21
22
23
Notes:
1. Default, but can be changed to another IRQ.
2. Available in APIC mode only.
USB UHCI controller 1 (through PIRQA)
(Note 2)
AC ’97 audio/modem/User available (through PIRQB)
(Note 2)
ICH4 USB controller 3 (through PIRQC)
(Note 2)
ICH4 USB controller 2 (through PIRQD)
(Note 2)
ICH4 LAN (through PIRQE)
(Note 2)
User available (through PIRQF)
(Note 2)
User available (through PIRQG)
(Note 2)
ICH4 USB 2.0 EHCI controller/User available (through PIRQH)
(Note 1)
(Note 1)
(Note 1)
50
Technical Reference
2.7 PCI Interrupt Routing Map
This section describes interrupt sharing and how the interrupt signals are connected between the
PCI bus connectors and onboard PCI devices. The PCI specification specifies how interrupts can
be shared between devices attached to the PCI bus. In most cases, the small amount of latency
added by interrupt sharing does not affect the operation or throughput of the devices. In some
special cases where maximum performance is needed from a device, a PCI device should not share
an interrupt with other PCI devices. Use the following information to avoid sharing an interrupt
with a PCI add-in card.
PCI devices are categorized as follows to specify their interrupt grouping:
• INTA: By default, all add-in cards that require only one interrupt are in this category. For
almost all cards that require more than one interrupt, the first interrupt on the card is also
classified as INTA.
• INTB: Generally, the second interrupt on add-in cards that require two or more interrupts is
classified as INTB. (This is not an absolute requirement.)
• INTC and INTD: Generally, a third interrupt on add-in cards is classified as INTC and a
fourth interrupt is classified as INTD.
The ICH4 has eight programmable interrupt request (PIRQ) input signals. All PCI interrupt
sources either onboard or from a PCI add-in card connect to one of these PIRQ signals. Some PCI
interrupt sources are electrically tied together on the Desktop Board D845EBT and therefore share
the same interrupt. Table 15 shows an example of how the PIRQ signals are routed.
For example, using Table 15 as a reference, assume an add-in card using INTA is plugged into PCI
bus connector 3. In PCI bus connector 3, INTA is connected to PIRQC, which is already
connected to the ICH4 USB. The add-in card in PCI bus connector 3 now shares an interrupt with
the onboard interrupt source.
In PIC mode, the ICH4 can connect each PIRQ line internally to one of the IRQ signals (3, 4, 5, 6,
7, 9, 10, 11, 12, 14, and 15). Typically, a device that does not share a PIRQ line will have a
unique interrupt. However, in certain interrupt-constrained situations, it is possible for two or
more of the PIRQ lines to be connected to the same IRQ signal. Refer to Table 14 for the
allocation of PIRQ lines to IRQ signals in APIC mode.
52
Technical Reference
2.8 Connectors
CAUTION
On the Desktop Board D845EBT, only the following connectors have overcurrent protection:
• Back panel USB, IEEE 1394a-2000, and PS/2
• Front panel USB and IEEE 1394a-2000
The other internal connectors of the Desktop Board D845EBT are not overcurrent protected and
should connect only to devices inside the computer’s chassis, such as fans and internal
peripherals. Do not use these connectors to power devices external to the computer’s chassis. A
fault in the load presented by the external devices could cause damage to the computer, the
interconnecting cable, and the external devices themselves.
The connectors are described on the following pages and are divided into these groups:
• Back panel I/O connectors (see page 54)
PS/2 keyboard and mouse
IEEE 1394a-2000
USB
Parallel port
Serial port A
S/PDIF (optional)
Audio
LAN
• Internal I/O connectors (see page 58)
ATAPI-style CD-ROM
Fans
Power
Add-in boards (PCI and AGP)
IDE
Diskette drive
SCSI LED
IDE RAID
CNR (optional)
• External I/O connectors (see page 69)
Front panel audio
Front panel IEEE 1394a-2000
Front panel USB
Serial port B
Front panel (power/sleep/message-waiting LED, power switch, hard drive activity LED,
and reset switch)
Auxiliary front panel power/sleep/message-waiting LED
Figure 10 shows the location of the back panel connectors. The back panel connectors are
color-coded in compliance with PC 99 recommendations. The figure legend below lists the
colors used.
A
C
D
BE
Item Description Color
A PS/2 mouse port Green Table 16
B PS/2 keyboard port Purple Table 16
C IEEE 1394a-2000 port Black Table 17
D USB ports Black Table 18
E Serial port A Teal Table 19
F Parallel port Burgundy Table 20
G S/PDIF (optional) Orange Table 21
H Audio rear left/right out (for 6-channel audio only) Black Table 22
I Audio center/LFE out (for 6-channel audio only) Black Table 23
J Audio line in Light blue Table 24
K Audio line out (for 2-channel audio);
Front left/right out (for 6-channel audio)
L Mic in Pink Table 26
M LAN Black Table 27
N USB ports Black Table 18
F
H
G
I
M
K
L
J
N
OM14403
For more
information see:
Lime green Table 25
Figure 10. Back Panel Connectors
NOTE
✏
The back panel audio line out connector is designed for headphones or amplified speakers only.
Poor audio quality occurs if passive (non-amplified) speakers are connected to this output.
The internal I/O connectors are divided into the following functional groups:
• Power and hardware control (see page 59)
Fans (three)
ATX12V
Main power
Chassis intrusion
• Add-in boards and peripheral interfaces (see page 62)
PCI bus
AGP
IDE (two)
IDE RAID (two)
Diskette drive
SCSI LED
ATAPI-style CD-ROM
CNR (optional)
2.8.2.1 Expansion Slots
The Desktop Board D845EBT has the following expansion slots:
• AGP connector: The AGP connector is keyed for 1.5 V AGP cards only. Do not install a
legacy 3.3 V AGP card. The AGP connector is not mechanically compatible with legacy
3.3 V AGP cards.
• Five PCI rev 2.2 compliant local bus slots: The SMBus is routed to PCI bus connector 1 only
(ATX expansion slot 6). PCI add-in cards with SMBus support can access sensor data and
other information residing on the Desktop Board D845EBT.
• CNR (optional).
NOTE
✏
This document references back-panel slot numbering with respect to processor location on the
Desktop Board D845EBT. The AGP slot is not numbered. PCI slots are identified as PCI slot #x,
starting with the slot closest to the processor. The ATX specification identifies expansion slot
locations with respect to the far edge of a full-sized ATX chassis. The ATX specification and the
Desktop Board D845EBT’s silkscreen are opposite and could cause confusion. The ATX
numbering convention is made without respect to slot type (PCI vs. AGP), but refers to an actual
slot location on a chassis. Figure 12 on page 62 illustrates the Desktop Board D845EBT’s PCI
slot numbering.
58
2.8.2.2 Power and Hardware Control Connectors
Figure 11 shows the location of the power and hardware control connectors.
A
2
4
3
1
1
20
1
10
Technical Reference
B
1
1
C
11
1
D
F
Item Description
E
For more
information see:
OM14392
A +12 V power connector (ATX12V) Table 28
B Rear chassis fan Table 29
C Processor fan Table 30
D Main power Table 31
E Chassis intrusion Table 32
F Front chassis fan Table 33
Figure 11. Power and Hardware Control Connectors
CAUTION
The processor fan must be connected to the processor fan connector, not to a chassis fan
connector. Connecting the processor fan to a chassis fan connector may result in onboard
component damage that will halt fan operation.
NOTE
✏
Do not use a standard ATX power supply. The Desktop Board D845EBT will not boot with a
standard ATX power supply. Use only ATX12V-compliant power supplies with the Desktop Board
D845EBT. ATX12V power supplies have an additional power lead that provides required
supplemental power for the Intel Pentium 4 processor. The Desktop Board D845EBT will not boot
if the ATX12V power supply is not connected to both the 4-pin and 20-pin power connectors.
For information about Refer to
The power connector Section 1.15.2.1, page 42
The functions of the fan connectors Section 1.15.2.2, page 43
2.8.2.3 Add-in Board and Peripheral Interface Connectors
Figure 12 shows the location of the add-in board and peripheral connectors for the Desktop Board
D845EBT. Note the following considerations for the PCI bus connectors:
• All of the PCI bus connectors are bus master capable.
• PCI bus connector 1 has SMBus signals routed to it. This enables PCI bus add-in boards with
SMBus support to access sensor data on the Desktop Board D845EBT. The specific SMBus
signals are as follows:
The SMBus clock line is connected to pin A40
The SMBus data line is connected to pin A41
AEDB
39
40
39
40
C
1
4
1
2
1
2
FGH
1
LMN
2
1
2
1
2
1
40
39
40
39
34
33
I
JK
OM14393
Item Description
For more
information
see: Item Description
For more
information
see:
A CNR (optional) Table 34 H AGP Table 36
B PCI bus connector 5 Table 35 I Secondary IDE (white) Table 39
C ATAPI-style CD-ROM Table 37 J Primary IDE (black) Table 39
D PCI bus connector 4 Table 35 K Diskette drive Table 38
E PCI bus connector 3 Table 35 L SCSI LED Table 40
F PCI bus connector 2 Table 35 M Secondary IDE RAID (blue) Table 41
G PCI bus connector 1 Table 35 N Primary IDE RAID (blue) Table 41
62
Figure 12. D845EBT Add-in Board and Peripheral Interface Connectors
Signal names in brackets ([ ]) are for the secondary IDE RAID connector.
68
2.8.3 External I/O Connectors
Figure 13 shows the locations of the external I/O connectors.
A
1
2
10
9
2
1
7
10
2
1
7
10
1
2
7
10
9
8
2
1
1
Technical Reference
1
2
8
9
DEF
C
B
OM14404
Item Description For more information see:
A Front panel audio Table 42
B Serial port B
Table 43
C Auxiliary front panel power/sleep/message-waiting LED Table 49
D Front panel USB (black) Table 44
E Front panel Table 46
F Front panel IEEE 1394a-2000 (white) Table 45
Signal names in brackets ([]) are for the second IEEE 1394a-2000 connector.
2.8.3.1 Front Panel Connector
This section describes the functions of the front panel connector. Table 46 lists the signal names
of the front panel connector.
Table 46. Front Panel Connector
Pin Signal In/Out Description Pin Signal In/Out Description
Hard Drive Activity LED Power LED
1 HD_PWR Out Hard disk LED pull-up
(330 Ω) to +5 V
3 HAD# Out Hard disk active LED 4 HDR_BLNK_
Reset Switch On/Off Switch
5 Ground Ground 6 FPBUT_IN In Power switch
7 FP_RESET# In Reset switch 8 Ground Ground
Power Not Connected
9 +5 V Out Power 10 N/C Not connected
2 HDR_BLNK_
GRN
YEL
Out Front panel green
LED
Out Front panel yellow
LED
2.8.3.1.1 Hard Drive Activity LED Connector
Pins 1 and 3 can be connected to an LED to provide a visual indicator that data is being read from
or written to a hard drive. For the LED to function properly, an IDE drive must be connected to
the onboard IDE interface. The LED will also show activity for devices connected to the SCSI
hard drive activity LED connector.
For information about Refer to
The SCSI hard drive activity LED connector Section 1.7.3.2, page 26
Pins 5 and 7 can be connected to a momentary SPST type switch that is normally open. When the
switch is closed, the Desktop Board D845EBT resets and runs the POST.
2.8.3.1.3 Power/Sleep/Message Waiting LED Connector
Pins 2 and 4 can be connected to a one- or two-color LED. Table 47 shows the possible states for
a one-color LED. Table 48 shows the possible states for a two-color LED.
Table 47. States for a One-Color Power LED
LED State Description
Off Power off/sleeping
Steady Green Running
Blinking Green Running/message waiting
Table 48. States for a Two-Color Power LED
LED State Description
Off Power off
Steady Green Running
Blinking Green Running/message waiting
Steady Yellow Sleeping
Blinking Yellow Sleeping/message waiting
✏ NOTE
To use the message waiting function, ACPI must be enabled in the operating system and a
message-capturing application must be invoked.
2.8.3.1.4 Power Switch Connector
Pins 6 and 8 can be connected to a front panel momentary-contact power switch. The switch must
pull the SW_ON# pin to ground for at least 50 ms to signal the power supply to switch on or off.
(The time requirement is due to internal debounce circuitry on the Desktop Board D845EBT.) At
least two seconds must pass before the power supply will recognize another on/off signal.
2.8.3.2 Auxiliary Front Panel Power/Sleep/Message-Waiting LED Connector
Pins 1 and 3 of this connector duplicate the signals on pins 2 and 4 of the front panel connector.
Table 49. Auxiliary Front Panel Power/Sleep/Message-Waiting LED Connector
Pin Signal Name In/Out Description
1 HDR_BLNK_GRN Out Front panel green LED
2 Not connected
3 HDR_BLNK_YEL Out Front panel yellow LED
72
Technical Reference
2.9 Jumper Blocks
CAUTION
Do not move any jumpers with the power on. Always turn off the power and unplug the power
cord from the computer before changing a jumper setting. Otherwise, the Desktop Board
D845EBT could be damaged.
Figure 14 shows the location of the jumper blocks on the Desktop Board D845EBT.
1
3
5
A
7
9
B
Item Description Reference Designator
A Front panel audio connector/jumper block J9B1
B BIOS Setup configuration jumper block J6H2
13
Figure 14. Location of the Jumper Blocks
2.9.1 Front Panel Audio Connector/Jumper Block
This connector has two functions:
• With jumpers installed, the audio line out signals are routed to the back panel audio line out
connector.
• With jumpers removed, the connector provides audio line out and mic in signals for front panel
audio connectors.
Table 50 describes the two configurations of this connector/jumper block.
Do not place jumpers on this block in any configuration other than the one described in Table 50.
Other jumper configurations are not supported and could damage the Desktop Board D845EBT.
Table 50. Front Panel Audio Connector/Jumper Block
Jumper Setting Configuration
1
34
5
7
9
2
6
10
1
34
5
7
9
2
6
10
5 and 6
9 and 10
No jumpers
installed
Front out signals if 6-channel audio (line out signals if 2-channel audio)
are routed to the back panel line out connector. The back panel audio line
out connector is shown in Figure 10 on page 54.
Mic in and front out signals if 6-channel audio (line out signals if 2-channel
audio) are available for connection to front panel audio connectors. Table
42 on page 70 lists the names of the signals available on this connector
when no jumpers are installed.
NOTE
✏
When the jumpers are removed and this connector is used for front panel audio, the back panel
audio line out and mic in connectors are disabled.
2.9.2 BIOS Setup Configuration Jumper Block
The 3-pin jumper block determines the BIOS Setup program’s mode. Table 51 describes the
jumper settings for the three modes: normal, configure, and recovery. When the jumper is set to
configuration mode and the computer is powered-up, the BIOS compares the processor version and
the microcode version in the BIOS and reports if the two match.
How to access the BIOS Setup program Section 4.1, page 95
The maintenance menu of the BIOS Setup program Section 4, page 95
BIOS recovery Section 3.7, page 91
The BIOS uses current configuration information and
13
passwords for booting.
After the POST runs, Setup runs automatically. The
13
maintenance menu is displayed.
The BIOS attempts to recover the BIOS configuration. A
13
recovery diskette is required.
74
Technical Reference
2.10 Mechanical Considerations
2.10.1 D845EBT Form Factor
The Desktop Board D845EBT is designed to fit into an ATX-form-factor chassis. Figure 15
illustrates the mechanical form factor for the Desktop Board D845EBT. Dimensions are given in
inches [millimeters]. The outer dimensions are 12.00 inches by 8.20 inches [304.80 millimeters by
208.28 millimeters]. Location of the I/O connectors and mounting holes are in compliance with
the ATX specification (see Section 1.4).
The back panel I/O shield for Desktop Board D845EBT must meet specific dimension and material
requirements. Systems based on the Desktop Board D845EBT need the back panel I/O shield to
pass certification testing. Figure 16 and Figure 17 show the critical dimensions of the two types of
I/O shields for the Desktop Board D845EBT. Figure 16 shows the I/O shield for the Desktop
Board D845EBT with the 6-channel audio subsystem. Figure 17 shows the I/O shield for the
Desktop Board D845EBT with the 2-channel audio subsystem. Dimensions are given in inches to
a tolerance of ±0.02 inches.
The figures also indicate the position of each cutout. Additional design considerations for I/O
shields relative to chassis requirements are described in the ATX specification. See Section 1.4 for
information about the ATX specification.
NOTE
✏
The I/O shield drawings in this document are for reference only. An I/O shield compliant with the
ATX chassis specification 2.03 is available from Intel.
22.45
[0.88]
7.01
[0.28]
0.00
11.81
[0.47]
14.40
[0.567]
0.00
11.35
[0.45]
1.00
[0.04]
[ 0.79±0.00]
30.37
20.00±0.1 TYP
52.80
45.89
[1.81]
[1.195]
162.300 Ref
[6.390]
[2.08]
85.46
[3.365]
110.58
[4.354]
[4.95]
125.67
143.12
[5.635]
1.596±0.127
[0.0629±0.0050]
8X R0.5 MIN
13.19
[0.519]
0.69
[0.027]
11.81
[0.47]
14.40
[0.567]
48.00
Ref
[1.89]
76
Pictorial
View
OM14396
Figure 16. I/O Shield Dimensions (for Boards with the 6-Channel Audio Subsystem)
22.45
[0.88]
7.01
[0.28]
0.00
11.81
[0.47]
14.40
[0.567]
20.00±0.13 TYP
[ 0.79±0.00]
1.00
[0.04]
162.300 Ref
[6.390]
Technical Reference
1.60±0.13
[0.063±0.005]
8X R0.5 MIN
13.19
[0.519]
0.69
[0.027]
11.81
[0.47]
14.40
[0.567]
48.00
Ref
[1.89]
0.00
11.35
[0.45]
30.37
[1.195]
45.89
[1.81]
52.80
[2.08]
[4.95]
125.67
143.12
[5.635]
Pictorial
Pictorial
View
View
OM14397
Figure 17. I/O Shield Dimensions (for Boards with the 2-Channel Audio Subsystem)
Table 52 lists voltage and current measurements for a computer that contains the Desktop Board
D845EBT and the following:
• 2.40 GHz Intel Pentium 4 processor with a 512 KB cache
• 32 MB AGP card
• 1024 MB DDR SDRAM
• 3.5-inch diskette drive
• 4.3 GB IDE hard disk drive
• 16X IDE DVD/40X CD-ROM drive
This information is provided only as a guide for calculating approximate power usage with
additional resources added.
Values for the Windows XP desktop mode are measured at
32-bit colors, 85 Hz refresh rate, and
screen resolution of 1024 by 768 pixels. AC watts are measured with the computer connected to a
typical 300 W power supply, at nominal input voltage and frequency, with a true RMS wattmeter
at the line input.
NOTE
✏
Actual system power consumption depends upon system configuration. The power supply should
comply with the recommendations found in the ATX/ATX12V Power Supply Design Guide,
Version 1.1 (see Section 1.4 on page 17 for specification information).
Table 52. Power Usage
DC Current at:
Mode AC Power
ACPI S0 69.6 W 5.3 A 0.17 A 1.3 A 0.02 A 0.41 A
ACPI S1 55.3 W 3.64 A 0.17 A 1.2 A 0.02 A 0.28 A
ACPI S3 2.7 W 0 A 0 A 0 A 0 A 0.35 A
ACPI S5 2.4 W 0 A 0 A 0 A 0 A 0.32 A
+3.3 V +5 V +12 V -12 V +5 VSB
2.11.2 Add-in Board Considerations
The Desktop Board D845EBT is designed to provide 2 A (average) of +5 V current for each add-in
board. The total +5 V current draw for add-in boards for a fully loaded Desktop Board D845EBT
(all five expansion slots filled) must not exceed 10 A.
78
Technical Reference
2.11.3 Standby Current Requirements
CAUTION
If the standby current necessary to support multiple wake events from the PCI and/or USB buses
exceeds power supply capacity, the Desktop Board D845EBT may lose register settings stored in
memory, etc. Calculate the standby current requirements using the steps described below.
Power supplies used with the Desktop Board D845EBT must be able to provide enough standby
current to support the Instantly Available PC (ACPI S3 sleep state) configuration as outlined in
Table 53 below.
Values are determined by specifications such as PCI 2.2. Actual measured values may vary.
To estimate the amount of standby current required for a particular system configuration, standby
current requirements of all installed components must be added to determine the total standby
current requirement. Refer to the descriptions in Table 53 and review the following steps.
1. Note the total Desktop Board D845EBT standby current requirement.
2. Add to that the total PS/2 port standby current requirement if a wake-enabled device is
connected.
3. Add, from the PCI 2.2 slots (wake enabled) row, the total number of wake-enabled devices
installed (PCI and AGP) and multiply by the standby current requirement.
4. Add, from the PCI 2.2 slots (nonwake enabled) row, the total number of wake-enabled devices
installed (PCI and AGP) and multiply by the standby current requirement.
5. Add all additional wake-enabled devices’ and nonwake-enabled devices’ standby current
requirements as applicable.
6. Add all the required current totals from steps 1 through 5 to determine the total estimated
standby current power supply requirement.
Table 53. Standby Current Requirements
Instantly Available PC Current
Support (Estimated for
Integrated Board Components)
• IBM PS/2 Port Specification (Sept 1991) states:
275 mA for keyboard
70 mA for the mouse (nonwake-enabled device)
PCI/AGP requirements are calculated by totaling the following:
One wake-enabled device @ 375 mA, plus
Five nonwake-enabled devices @ 20 mA each, plus
USB requirements are calculated as:
One wake-enabled device @ 500 mA
USB hub @ 100 mA
Three USB nonwake-enabled devices connected @ 2.5 mA each
• Both USB ports are capable of providing up to 500 mA during normal G0/S0 operation. Only
one USB port will support up to 500 mA of stand-by-current (wake-enabled device) during
G1/S3 suspended operation. The other port may provide up to 7.5 mA (three nonwake-enabled
devices) during G1/S3 suspended operation.
2.11.4 Fan Connector Current Capability
Table 54 lists the current capability of the fan connectors on the Desktop Board D845EBT.
Table 54. Fan Connector Current Capability
Fan Connector Maximum Available Current
Processor fan 0.80 A
Front chassis fan 0.30 A
Rear chassis fan 0.30 A
CAUTION
The processor fan must be connected to the processor fan connector, not to a chassis fan
connector. Connecting the processor fan to a chassis fan connector may result in onboard
component damage that will halt fan operation.
80
Technical Reference
2.11.5 Power Supply Considerations
CAUTION
The +5 V standby line for the power supply must be capable of providing adequate +5 V standby
current. Failure to do so can damage the power supply. The total amount of standby current
required depends on the wake devices supported and manufacturing options. Refer to
Section 2.11.3 on page 78 for additional information.
System integrators should refer to the power usage values listed in Table 52 when selecting a
power supply for use with the Desktop Board D845EBT.
Measurements account only for current sourced by the Desktop Board D845EBT while running in
idle modes of the started operating systems.
Additional power required will depend on configurations chosen by the integrator.
The power supply must comply with the following recommendations found in the indicated
sections of the ATX form factor specification.
• The potential relation between 3.3 VDC and +5 VDC power rails (Section 4.2)
• The current capability of the +5 VSB line (Section 4.2.1.2)
1. Ensure that the ambient temperature does not exceed the Desktop Board D845EBT’s maximum
operating temperature. Failure to do so could cause components to exceed their maximum
case temperature and malfunction. For information about the maximum operating
temperature, see the environmental specifications in Section 2.14.
2. Ensure that proper airflow is maintained in the processor voltage regulator circuit. Failure to
do so may result in damage to the voltage regulator circuit. The processor voltage regulator
area (item A in Figure 18) can reach a temperature of up to 85
Figure 18 shows the locations of the localized high temperature zones.
o
C in an open chassis.
D
A Processor voltage regulator area
B Processor
C Intel 82845E MCH
D Intel 82801DB ICH4
Figure 18. Localized High Temperature Zones
C
OM14398
A
B
82
Technical Reference
Table 55 provides maximum case temperatures for components on the Desktop Board D845EBT
that are sensitive to thermal changes. The operating temperature, current load, or operating
frequency could affect case temperatures. Maximum case temperatures are important when
considering proper airflow to cool the Desktop Board D845EBT.
Table 55. Thermal Considerations for Components
Component Maximum Case Temperature
Intel Pentium 4 processor For processor case temperature, see processor datasheets and
The Mean Time Between Failures (MTBF) prediction is calculated using component and
subassembly random failure rates. The calculation is based on the Bellcore Reliability Prediction
Procedure, TR-NWT-000332, Issue 4, September 1991. The MTBF prediction is used to estimate
repair rates and spare parts requirements.
The MTBF data is calculated from predicted data at 55 ºC. The MTBF calculation for the Desktop
Board D845EBT is 81,440.9842 hours.
The Desktop Board D845EBT has the following product certification markings:
• UL joint US/Canada Recognized Component mark: Consists of lower case c followed by a
stylized backward UR and followed by a small US. Includes adjacent UL file number for
desktop boards: E210882 (component side).
Intel
• FCC Declaration of Conformity logo mark for Class B equipment; to include Intel name and
D845EBT model designation (solder side).
• CE mark: Declaring compliance to European Union (EU) EMC directive (89/336/EEC) and
Low Voltage directive (73/23/EEC) (component side). The CE mark should also be on the
shipping container.
• Australian Communications Authority (ACA) C-Tick mark: consists of a stylized C overlaid
with a check (tick) mark (component side), followed by Intel supplier code number, N-232.
The C-tick mark should also be on the shipping container.
• Korean EMC certification logo mark: consists of MIC lettering within a stylized elliptical
outline.
• Printed wiring board manufacturer’s recognition mark: consists of a unique UL recognized
manufacturer’s logo, along with a flammability rating (94V-0) (solder side).
• PB part number: Intel bare circuit board part number (solder side). Also includes SKU
number starting with AA followed by additional alphanumeric characters. For the Desktop
Board D845EBT, the PB number is A89899-003.
• Battery “+ Side Up” marking: located on the component side of the Desktop Board D845EBT
in close proximity to the battery holder.
The Desktop Board uses an Intel/AMI BIOS that is stored in the Firmware Hub (FWH) and can be
updated using a disk-based program. The FWH contains the BIOS Setup program, POST, the PCI
auto-configuration utility, and Plug and Play support.
The BIOS displays a message during POST identifying the type of BIOS and a revision code. The
initial production BIOS is identified as BT84510A.86A.
When the Desktop Board’s jumper is set to configuration mode and the computer is powered-up,
the BIOS compares the CPU version and the microcode version in the BIOS and reports if the two
match.
For information about Refer to
The Desktop Board’s compliance level with Plug and Play Section 1.4, page 17
The Firmware Hub (FWH) includes a 4 Mbit (512 KB) symmetrical flash memory device.
Internally, the device is grouped into eight 64-KB blocks that are individually erasable, lockable,
and unlockable.
3.3 Resource Configuration
3.3.1 PCI Autoconfiguration
The BIOS can automatically configure PCI devices. PCI devices may be onboard or add-in cards.
Autoconfiguration lets a user insert or remove PCI cards without having to configure the system.
When a user turns on the system after adding a PCI card, the BIOS automatically configures
interrupts, the I/O space, and other system resources. Any interrupts set to Available in Setup are
considered to be available for use by the add-in card. Autoconfiguration information is stored in
ESCD format.
For information about the versions of PCI and Plug and Play supported by the BIOS, see
Section 1.4.
3.3.2 PCI IDE Support
If you select Auto in the BIOS Setup program, the BIOS automatically sets up the two
PCI IDE connectors with independent I/O channel support. The IDE interface supports hard drives
up to ATA-66/100 and recognizes any ATAPI compliant devices, including CD-ROM drives, tape
drives, and Ultra DMA drives (see Section 1.4 for the supported version of ATAPI). The BIOS
determines the capabilities of each drive and configures them to optimize capacity and
performance. To take advantage of the high capacities typically available today, hard drives are
automatically configured for Logical Block Addressing (LBA) and to PIO Mode 3 or 4, depending
on the capability of the drive. You can override the auto-configuration options by specifying
manual configuration in the BIOS Setup program.
To use ATA-66/100 features the following items are required:
• An ATA-66/100 peripheral device
• An ATA-66/100 compatible cable
• ATA-66/100 operating system device drivers
NOTES
✏
• ATA-66/100 compatible cables are backward compatible with drives using slower IDE transfer
protocols. If an ATA-66/100 disk drive and a disk drive using any other IDE transfer protocol
are attached to the same cable, the maximum transfer rate between the drives is reduced to
that of the slowest device.
• Do not connect an ATA device as a slave on the same IDE cable as an ATAPI master device.
For example, do not connect an ATA hard drive as a slave to an ATAPI CD-ROM drive.
88
Overview of BIOS Features
3.4 System Management BIOS (SMBIOS)
SMBIOS is a Desktop Management Interface (DMI) compliant method for managing computers in
a managed network.
The main component of SMBIOS is the Management Information Format (MIF) database, which
contains information about the computing system and its components. Using SMBIOS, a system
administrator can obtain the system types, capabilities, operational status, and installation dates for
system components. The MIF database defines the data and provides the method for accessing this
information. The BIOS enables applications such as third-party management software to use
SMBIOS. The BIOS stores and reports the following SMBIOS information:
• BIOS data, such as the BIOS revision level
• Fixed-system data, such as peripherals, serial numbers, and asset tags
• Resource data, such as memory size, cache size, and processor speed
• Dynamic data, such as event detection and error logging
Non-Plug and Play operating systems, such as Windows NT, require an additional interface for
obtaining the SMBIOS information. The BIOS supports an SMBIOS table interface for such
operating systems. Using this support, an SMBIOS service-level application running on a
non-Plug and Play operating system can obtain the SMBIOS information.
For information about Refer to
The compliance level of the Desktop Board D845EBT with SMBIOS Section 1.4, page 17
3.5 Legacy USB Support
Legacy USB support enables USB devices such as keyboards, mice, and hubs to be used even
when the operating system’s USB drivers are not yet available. Legacy USB support is used to
access the BIOS Setup program, and to install an operating system that supports USB. By default,
Legacy USB support is set to Enabled.
Legacy USB support operates as follows:
1. When you apply power to the computer, legacy support is disabled.
2. POST begins.
3. Legacy USB support is enabled by the BIOS allowing you to use a USB keyboard to enter and
configure the BIOS Setup program and the maintenance menu.
4. POST completes.
5. The operating system loads. While the operating system is loading, USB keyboards and mice
are recognized and may be used to configure the operating system. (Keyboards and mice are
not recognized during this period if Legacy USB support was set to Disabled in the BIOS
Setup program.)
6. After the operating system loads the USB drivers, all legacy and non-legacy USB devices are
recognized by the operating system, and Legacy USB support from the BIOS is no longer
used.
To install an operating system that supports USB, verify that Legacy USB support in the BIOS
Setup program is set to Enabled and follow the operating system’s installation instructions.
The BIOS can be updated using either of the following utilities, which are available on the Intel
World Wide Web site:
®
• Intel
• Intel
Both utilities support the following BIOS maintenance functions:
• Verifying that the updated BIOS matches the target system to prevent accidentally installing
• Updating both the BIOS boot block and the main BIOS. This process is fault tolerant to
• Updating the BIOS boot block separately.
• Changing the language section of the BIOS.
• Updating replaceable BIOS modules, such as the video BIOS module.
• Inserting a custom splash screen.
Express BIOS Update utility, which enables automated updating while in the Windows
environment. Using this utility, the BIOS can be updated from a file on a hard disk, a 1.44 MB
diskette, or a CD-ROM, or from the file location on the Web.
®
Flash Memory Update Utility, which requires creation of a boot diskette and manual
rebooting of the system. Using this utility, the BIOS can be updated from a file on a 1.44 MB
diskette (from a legacy diskette drive or an LS-120 diskette drive) or a CD-ROM.
an incompatible BIOS.
prevent boot block corruption.
NOTE
✏
Review the instructions distributed with the upgrade utility before attempting a BIOS update.
For information about Refer to
The Intel World Wide Web site Section 1.2, page 16
3.6.1 Language Support
The BIOS Setup program and help messages are supported in six languages: US English, German,
Italian, French, Spanish, and Japanese. Only two languages (US English and another language)
can be loaded on the board at one time.
The default language for the BIOS Setup program and help messages is US English. Another
language can be selected by using the program’s Main menu (page 97).
3.6.2 Custom Splash Screen
During POST, an Intel® splash screen is displayed by default. This splash screen can be replaced
with a custom splash screen. A utility is available from Intel to assist with creating a custom
splash screen. The custom splash screen can be programmed into the flash memory using the
BIOS upgrade utility. Information about this capability is available on the Intel Support World
Wide Web site.
For information about Refer to
The Intel World Wide Web site Section 1.2, page 16
90
Overview of BIOS Features
3.7 Recovering BIOS Data
Some types of failure can destroy the BIOS. For example, the data can be lost if a power outage
occurs while the BIOS is being updated in flash memory. The BIOS can be recovered from a
1.44 MB diskette or CD-ROM using the BIOS recovery mode. When recovering the BIOS, be
aware of the following:
• Because of the small amount of code available in the non-erasable boot block area, there is no
video support. You can only monitor this procedure by listening to the speaker or looking at
the diskette drive LED.
• The recovery process may take several minutes; larger BIOS flash memory devices require
more time.
• Two beeps and the end of activity in the diskette drive indicate successful BIOS recovery.
• A series of continuous beeps indicates a failed BIOS recovery.
To create a BIOS recovery diskette, a bootable diskette must be created and the BIOS update files
copied to it. BIOS upgrades and the Intel Flash Memory Update Utility are available from Intel
Customer Support through the Intel World Wide Web site.
NOTE
✏
Even if the computer is configured to boot from an LS-120 diskette (in the Setup program’s
Removable Devices submenu), the BIOS recovery diskette must be a standard 1.44 MB diskette not
a 120 MB diskette.
For information about Refer to
The BIOS recovery mode jumper settings Section 2.9.1, page 73
The Boot menu in the BIOS Setup program Section 4.3, page 97
Contacting Intel customer support Section 1.2, page 16
3.8 Boot Options
In the BIOS Setup program, the user can choose to boot from a diskette drive, hard drives,
CD-ROM, or the network. The default setting is for the diskette drive to be the first boot device,
the hard drive second, and the ATAPI CD-ROM third. The fourth device is disabled.
3.8.1 CD-ROM Boot
Booting from CD-ROM is supported in compliance to the El Torito bootable CD-ROM format
specification. Under the Boot menu in the BIOS Setup program, ATAPI CD-ROM is listed as a
boot device. Boot devices are defined in priority order. Accordingly, if there is not a bootable CD
in the CD-ROM drive, the system will attempt to boot from the next defined drive.
The network can be selected as a boot device. This selection allows booting from the onboard
LAN or from a network add-in card with a remote boot ROM installed.
Pressing the <F12> key during POST automatically forces booting from the LAN. To use this key
during POST, the User Access Level in the BIOS Setup program’s Security menu must be set to
Full.
For information about Refer to
The BIOS Setup program’s Security menu Table 76, page 111
3.8.3 Booting Without Attached Devices
For use in embedded applications, the BIOS has been designed so that after passing the POST, the
operating system loader is invoked even if the following devices are not present:
• Video adapter
• Keyboard
• Mouse
3.9 Changing the Default Boot Device During POST
Pressing the <F10> key during POST causes a boot device menu to be displayed. To use this key
during POST, the User Access Level in the BIOS Setup program’s Security menu must be set to
Full.
For information about Refer to
The BIOS Setup program’s Security menu Table 76, page 111
The menu displayed after pressing the <F10> key lists the available boot devices (as set in the
BIOS Setup program’s Boot Device Priority submenu). Table 59 lists the boot device menu
options.
Table 59. Boot Device Menu Options
Boot Device Menu Function Keys Description
<↑> or <↓> Selects a default boot device
<Enter> Exits the menu, saves changes, and boots from the selected
device
<Esc> Exits the menu without making changes
92
Overview of BIOS Features
3.10 Fast Booting Systems with Intel® Rapid BIOS Boot
These factors affect system boot speed:
• Selecting and configuring peripherals properly
• Using an optimized BIOS, such as the Intel Rapid BIOS
3.10.1 Peripheral Selection and Configuration
The following techniques help improve system boot speed:
• Choose a hard drive with parameters such as “power-up to data ready” less than eight seconds,
that minimize hard drive startup delays.
• Select a CD-ROM drive with a fast initialization rate. This rate can influence POST
execution time.
• Eliminate unnecessary add-in adapter features, such as logo displays, screen repaints, or mode
changes in POST. These features may add time to the boot process.
• Try different monitors. Some monitors initialize and communicate with the BIOS more
quickly, which enables the system to boot more quickly.
3.10.2 Intel Rapid BIOS Boot
Use of the following BIOS Setup program settings reduces the POST execution time.
In the Boot menu:
• Set the hard disk drive as the first boot device. As a result, the POST does not first seek a
diskette drive, which saves about one second from the POST execution time.
• Disable Quiet Boot, which eliminates display of the logo splash screen. This could save
several seconds of painting complex graphic images and changing video modes.
• Enabled Intel Rapid BIOS Boot. This feature bypasses memory count and the search for a
diskette drive.
In the Peripheral Configuration submenu, disable the LAN device if it will not be used. This can
reduce up to four seconds of option ROM boot time.
NOTE
✏
It is possible to optimize the boot process to the point where the system boots so quickly that the
Intel logo screen (or a custom logo splash screen) will not be seen. Monitors and hard disk drives
with minimum initialization times can also contribute to a boot time that might be so fast that
necessary logo screens and POST messages cannot be seen.
This boot time may be so fast that some drives might be not be initialized at all. If this condition
should occur, it is possible to introduce a programmable delay ranging from three to 30 seconds
(using the Hard Disk Pre-Delay feature of the Advanced menu in the IDE Configuration Submenu
of the BIOS Setup program).
For information about Refer to
IDE Configuration Submenu in the BIOS Setup program Section 4.4.4, page 103
The BIOS includes security features that restrict access to the BIOS Setup program and who can
boot the computer. A supervisor password and a user password can be set for the BIOS Setup
program and for booting the computer, with the following restrictions:
• The supervisor password gives unrestricted access to view and change all the Setup options in
the BIOS Setup program. This is the supervisor mode.
• The user password gives access to view and change Setup options in the BIOS Setup program
based on the setting of the User Access Level option in the BIOS Setup program’s Security
menu. This is the user mode.
• If only the supervisor password is set, pressing the <Enter> key at the BIOS Setup program’s
password prompt allows the user access to Setup based on the setting of the User Access Level
option in the BIOS Setup program’s Security menu.
• If both the supervisor and user passwords are set, users can enter either the supervisor
password or the user password to access Setup. Users have access to Setup respective to
which password is entered.
• Setting the user password restricts who can boot the computer. The password prompt will be
displayed before the computer is booted. If only the supervisor password is set, the computer
boots without asking for a password. If both passwords are set, the user can enter either
password to boot the computer.
Table 60 shows the effects of setting the supervisor password and user password. This table is for
reference only and is not displayed on the screen.
Table 60. Supervisor and User Password Functions
Password Set
Neither Can change all
Supervisor
only
User only N/A Can change all
Supervisor
and user set
Note: If no password is set, any user can change all Setup options.
Supervisor
Mode
options
Can change all
options
Can change all
options
(Note)
User Mode Setup Options
Can change all
options
Can change a
limited number
of options
options
Can change a
limited number
of options
(Note)
None None None
Supervisor Password Supervisor None
Enter Password
Clear User Password
Supervisor Password
Enter Password
Password to
Enter Setup
User User
Supervisor or
user
Password
During Boot
Supervisor or
user
For information about Refer to
Setting user and supervisor passwords Section 4.5, page 111
NOTE
✏
For enhanced security, use different passwords for the supervisor and user passwords.
4.8 Exit Menu .................................................................................................................116
4.1 Introduction
The BIOS Setup program can be used to view and change the BIOS settings for the computer. The
BIOS Setup program is accessed by pressing the <F2> key after the Power-On Self-Test (POST)
memory test begins and before the operating system boot begins. The menu bar is shown below.
Maintenance Main Advanced Security Power Boot Exit
Table 61 lists the BIOS Setup program menu features.
Table 61. BIOS Setup Program Menu Bar
Maintenance Main Advanced Security Power Boot Exit
Clears
passwords and
BIS credentials
and enables
extended
configuration
mode
Allocates
resources for
hardware
components
Configures
advanced
features
available
through the
chipset
Saves or
discards
changes to
Setup
program
options
NOTE
✏
In this chapter, all examples of the BIOS Setup program menu bar include the maintenance menu;
however, the maintenance menu is displayed only when the Desktop Board is in configuration
mode. Section 2.9 on page 73 tells how to put the Desktop Board in configuration mode.
Table 62 lists the function keys available for menu screens.
Table 62. BIOS Setup Program Function Keys
BIOS Setup Program Function Key Description
<←> or <→> Selects a different menu screen (Moves the cursor left or right)
<↑> or <↓> Selects an item (Moves the cursor up or down)
<Tab> Selects a field (Not implemented)
<Enter> Executes command or selects the submenu
<F9> Load the default configuration values for the current menu
<F10> Save the current values and exits the BIOS Setup program
<Esc> Exits the menu
4.2 Maintenance Menu
To access this menu, select Maintenance on the menu bar at the top of the screen.
Maintenance
The menu shown in Table 63 is for clearing Setup passwords and enabling extended configuration
mode. Setup only displays this menu in configuration mode. See Section 2.9.2 on page 74 for
configuration mode setting information.
Main Advanced Security Power Boot Exit
Table 63. Maintenance Menu
Feature Options Description
Clear All Passwords • Ok (default)
• Cancel
Clear BIS Credentials • Ok (default)
• Cancel
CPU Stepping
Signature
CPU Microcode
Update Revision
No options Displays CPU’s Stepping Signature.
No options Displays CPU’s Microcode Update Revision.
Clears the user and supervisor passwords.
Clears the Wired for Management Boot Integrity Service (BIS)
credentials.
96
BIOS Setup Program
4.3 Main Menu
To access this menu, select Main on the menu bar at the top of the screen.
Maintenance
Main
Table 64 describes the Main menu. This menu reports processor and memory information and is
for configuring the system date and system time.
Table 64. Main Menu
Feature Options Description
BIOS Version No options Displays the version of the BIOS.
Processor Type No options Displays processor type.
Processor Speed No options Displays processor speed.
System Bus Speed No options Displays the system bus speed.
System Memory
Speed
Cache RAM No options Displays the size of second-level cache.
Total Memory No options Displays the total amount of RAM.
Memory Bank 0
Memory Bank 1
ECC Memory
(Note)
Language • English (default)
System Time Hour, minute, and
System Date Day of week
Note: This feature only appears if ECC memory is present.
No options Displays the system memory speed.
No options Displays the amount and type of RAM in the memory
• Enabled (default)
• Disabled
• (other language
loaded on the board)
second
Month/day/year
Advanced Security Power Boot Exit
banks.
Enables or disables ECC memory.
Selects the current default language used by the BIOS.
To access this submenu, select Advanced on the menu bar and then Boot Configuration.
Maintenance Main
Advanced
PCI Configuration
Boot Configuration
Peripheral Configuration
IDE Configuration
Diskette Configuration
Event Log Configuration
Video Configuration
USB Configuration
Chipset Configuration
The submenu represented by Table 67 is for setting Plug and Play options and the power-on state
of the Numlock key.
Table 67. Boot Configuration Submenu
Feature Options Description
Plug & Play O/S • No (default)
• Yes
Numlock • Off
• On (default)
Security Power Boot Exit
Specifies if manual configuration is desired.
No lets the BIOS configure all devices. This setting is
appropriate when using a Plug and Play operating system.
Yes lets the operating system configure Plug and Play
devices not required to boot the system. This option is
available for use during lab testing.
Specifies the power-on state of the Numlock feature on the
numeric keypad of the keyboard.
100
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