Harman Kardon AVR-2550 Service manual

AVR 2550 Audio/VideoReceiver
AVR 2550
Service Manual
Power for the Digital Revolution
®
Technical Specifications
Audio Section
Stereo Mode Continuous Average Power (FTC)
50 Watts per channel, 20Hz–20kHz, @ < 0.07% THD, both channels driven into 8 ohms
Five-Channel Surround Modes Power Per Individual Channel
Front L&R channels: 40 Watts per channel, @ < 0.07% THD, 20Hz–20kHz into 8 ohms
Center channel: 40 Watts, @ < 0.07% THD, 20Hz–20kHz into 8 ohms
Surround channels: 40 Watts per channel, @ < 0.07% THD, 20Hz–20kHz into 8 ohms
Input Sensitivity/Impedance
Linear (High Level) 200mV/47kohms
Signal-to-Noise Ratio (IHF-A) 95dB
Surround System Adjacent Channel Separation
Analog Decoding 40dB (Pro Logic, etc.) Dolby Digital (AC-3) 55dB DTS 55dB
Frequency Response
@ 1W (+0dB, –3dB) 10Hz–100kHz
High Instantaneous Current Capability (HCC) ±25 Amps
Transient Intermodulation Distortion (TIM) Unmeasurable
Rise Time 16 µsec
Slew Rate 40V/µsec
FM Tuner Section
Frequency Range 87.5–108MHz Usable Sensitivity IHF 1.3 µV/13.2dBf Signal-to-Noise Ratio Mono/Stereo: 70/65dB (DIN) Distortion Mono/Stereo: 0.15/0.3% Stereo Separation 35dB @ 1kHz Selectivity ±300kHz: 65dB Image Rejection 80dB IF Rejection 90dB
AM Tuner Section
Frequency Range 522–1620kHz Signal-to-Noise Ratio 45dB Usable Sensitivity Loop: 500µV Distortion 1kHz, 50% Mod: 0.8% Selectivity ±9kHz: 30dB
Video Section
Video Format PAL/NTSC Input Level/Impedance 1Vp-p/75 ohms Output Level/Impedance 1Vp-p/75 ohms Video Frequency Response 10Hz–8MHz (–3dB)
General
Power Requirement AC 220-240V/50Hz Power Consumption 72W idle, 580W maximum
(2 channels driven)
Dimensions (Max)
Width 440mm Height 166mm Depth 365mm Weight 10.6 kg
Depth measurement includes knobs, buttons and terminal connections. Height measurement includes feet and chassis. All features and specifications are subject to change without notice.
Harman Kardon is a registered trademark, and Power for the digital revolution is a trademark, of Harman International Industries, Inc.
*Manufactured under license from Dolby Laboratories. “Dolby”, “Pro Logic”, and the Double-D symbol are trademarks of Dolby Laboratories, Inc. Confidential Unpublished Works. ©1992–1999 Dolby Laboratories, Inc. All rights reserved.
“DTS” and “DTS Digital Surround” are registered trademarks of
Digital Theater Systems, Inc.
††
UltraStereo is a trademark of UltraStereo Corp.
VMAx is a trademark of Harman International Industries, Inc., and is an implementation of Cooper Bauck Transaural Stereo under patent license.
Logic 7 is a registered trademark of Lexicon, Inc.
Crystal is a registered trademark of Cirrus Logic Corp.
48 TROUBLESHOOTING GUIDE
TROUBLESHOOTING
SYMPTOM CAUSE SOLUTION
Unit does not function when Main • No AC Power • Make certain AC power cord is plugged into a live outlet Power Switch is pushed • Check to see whether outlet is switch-controlled
Display lights, but no sound • Intermittent input connections • Make certain that all input and speaker connections are secure or picture
Mute is on • Press Mute button
• Volume control is down • Turn up volume control
Unit turns on, but front-panel • Display brightness is turned off • Follow the instructions in the Display Brightness section display does not light up on page 30 so that the display is set to VFD FULL
No sound from any speaker; • Amplifier is in protection mode • Check speaker wire connections for shorts at receiver and light around power switch is red due to possible short speaker ends
• Amplifier is in protection mode • Contact your local Harman Kardon service center, which you can due to internal problems locate by visiting our Web site at www.harmankardon.com
No sound from surround or • Incorrect surround mode • Select a mode other than Stereo or Dolby 3 Stereo center speakers • Input is monaural • There is no surround information from mono sources
• Incorrect configuration • Check speaker mode configuratioin
• Stereo or Mono program material • The surround decoder may not create center- or rear-channel
information from nonencoded programs
Unit does not respond to • Weak batteries in remote • Change remote batteries remote commands • Wrong device selected • Press the AVR selector
• Remote sensor is obscured • Make certain front-panel sensor is visible to remote
or connect remote sensor
Intermittent buzzing in tuner • Local interference • Move unit or antenna away from computers, fluorescent
lights, motors or other electrical appliances
Letters flash in the channel indicator • Digital audio feed paused • Resume play for DVD display and digital audio stops • Check that Digital Input is selected
AMPLIFIER SECTION BIAS ADJUSTMENT
Measurement condition
. No input signal or volume position is minimum.
Standard value.
. Ideal current = 48mA ( ± 5%) . Ideal DC Voltage = 21.12mV ( ± 5%)
CUP11517X (MAIN PCB)
CN63
CN62
VR62
VR64
CN64
VR61
CN61
VR63
DC VOLTMETER..............Connect to CN61, CN62, CN63, CN64, CN65
NO. Channel Adjust for
1 Front Left 21.12mV (±5%)
2 Front Right 21.12mV (±5%)
3 Center
4 Surround Left
5 Surround Right
21.12mV (±5%)
21.12mV (±5%)
21.12mV (±5%)
CN65
VR65
Adjustment
VR61
VR62
VR63
VR64
VR65
TRANSISTOR, REGULATOR IC BLOCK DIAGRAM
TO-92M
1. Emitter
2. Collector
3. Base
1. Emitter
2. Collector
3. Base
KTC2874B KRA107M
2SA1360O KTD600KG
KTD1302T KTC3200GR KTA1271Y
KTA1268GR KTC3198Y
KSC2785Y KRC107M
2SC3423O
1. Emitter
2. Collector
3. Base
TO-126
TO-92
123
123
123
1. Base
2. Collector
3. Emitter
KSA614Y
TO-220
123
1. INPUT
2. GND
3. OUTPUT
MC7815C MC7805C
TO-220
123
1. GND
2. INPUT
3. OUTPUT
MCNJM7905 MC7915C
TO-220
123
1. Base
2. Collector
3. Emitter
2SB1647 2SD2560
KTA1024Y KSC2316Y
1. Emitter
2. Collector
3. Base
TO-3P
TO-92L
123
123
TC9482F (ELECTRONIC VOLUME/INPUT) : IC31
NC VSS VDD TEST
2
1
28 27
L-OUTA
L-INA
L-A-GNDA
L-OUTB
L-INB
L-A-GNDB
L-OUTC
L-INC
L-A-GNDC
CS1
GND
10
11
12
13
3
4
5
6
7
8
9
1dB
VR
latch
8dB
VR
latch
1dB
VR
latch
8dB
VR
latch
1dB
VR
latch
8dB
VR
latch
Shift register (32BIT)
Level shift circuit
3 to 7
decoder
4 to 13
decoder
Same as L-ch
Circuit
Strobe generate
circuit
3
4
5
6
7
8
9
10
11
12
13
L-OUTA
L-INA
L-A-GNDA
L-OUTB
L-INB
L-A-GNDB
L-OUTC
L-INC
L-A-GNDC
CS1
GND
CK
14
14
CK
TC9215AF
TC9215AF (TONE CONTROL : IC80)
BLOCK DIAGRAM
GND 1
OFF 2
3S
10
S
4
11
S
5
12
S
6
20
S
7
21
V
8
ss
16 V
15
S
S
14
S
13
S
12
S
11
10
S
9
S
DD
40
41
42
34
32
31
30
LEVEL SHIFTER
2
1
2
3
4
1
5
6
2
7
8
3
1
2
3
4
1
5
6
2
7
8
3
1
3
4
5 6
7
8 9
10
14 28
11
12 13
27
26
25 24
23 22
21 20
19 18
17 16
15
LATCH CIRCUIT
SHIFT REGISTER
LEVEL SHIFTER
LATCH CIRCUIT
L-S R-S
Vss GND VDD
L-S
L-S
L-S
L-COM
L-S
L-S
L-COM
L-S
L-S
L-COM
ST
R-S
R-S
R-S
R-COM
R-S
R-S
R-COM
R-S
R-S
R-COM
DATA
CK
LEVEL SHIFTER
2
1
2
3
1
4
5
6
2
7
8
3
1
2
3
1
4
5
6
2
7
8
3
1
3
4
5 6
7
8 9
10
14 28
11
12 13
27
26
25 24
23 22
21 20
19 18
17 16
15
LATCH CIRCUIT
SHIFT REGISTER
LEVEL SHIFTER
LATCH CIRCUIT
L-S R-S
Vss GND VDD
L-S
L-S
L-COM
L-S
L-S
L-S
L-COM
L-S
L-S
L-COM
ST
R-S
R-S
R-COM
R-S
R-S
R-S
R-COM
R-S
R-S
R-COM
DATA
CK
TC9164AF (FUNCTION/INPUT) : IC22
BLOCK DIAGRAM
TC9163AF (FUNCTION/INPUT) : IC20
BLOCK DIAGRAM
LEVEL SHIFTER
2
1
2
1
3
4
2
5
6
3
7
4
1
2
1
3
4
2
5
6
3
7
4
1
3
4
5
6
7
8
9
10
14 28
11
12
13
27
26
25
24
23
22
21
20
19
18
17
16
15
LATCH CIRCUIT
SHIFT REGISTER
LEVEL SHIFTER
LATCH CIRCUIT
L-S R-S
Vss GND VDD
L-S
L-COM
L-S
L-S
L-COM
L-S
L-S
L-COM
L-S
L-COM
ST
R-S
R-COM
R-S
R-S
R-COM
R-S
R-S
R-COM
R-S
R-COM
DATA
CK
LEVEL SHIFTER
2
1
2
1
3
4
2
5
6
3
7
4
1
2
1
3
4
2
5
6
3
7
4
1
3
4
5
6
7
8
9
10
14 28
11
12
13
27
26
25
24
23
22
21
20
19
18
17
16
15
LATCH CIRCUIT
SHIFT REGISTER
LEVEL SHIFTER
LATCH CIRCUIT
L-S R-S
Vss GND VDD
L-S
L-COM
L-S
L-S
L-COM
L-S
L-S
L-COM
L-S
L-COM
ST
R-S
R-COM
R-S
R-S
R-COM
R-S
R-S
R-COM
R-S
R-COM
DATA
CK
TC9162AF (FUNCTION/INPUT : IC30)
BLOCK DIAGRAM
TC9162AF (FUNCTION/INPUT : IC30)
BLOCK DIAGRAM
No. 5606-3/13
Top view
PIN ASSIGNMENT (TOP VIEW)
Pin Pin No. Function I/O Handling when unused
V
FL
1, 13 Driver block power supply connection. (Both pins must be connected.)
V
DD
60 Logic block power supply connection. Provide a voltage between 4.5 and 5.5 V.
V
SS
57 Power supply connection. Connect to the ground.
OSCI 59
Oscillator connection. An oscillator circuit is formed by connecting an external resistor
I GND
OSCO 58
and capacitor to these pins.
O OPEN
Display off control input.
BLK 61
BLK = Low (V
SS
) ... Display off. (S1 to S43 and G1 to G11 at VFLlevel.)
I GND
BLK = High (V
DD
) ... Display on.
Note that serial data can be transferred while the display is turned off.
CL 63
DI 64 I GND
CE 62
G1 to G11 2 to 12 Digit outputs. These pins are P-channel open drain outputs with pull-down resistors. O OPEN
S1 to S43 56 to 14
Segment outputs for displaying the display data transferred by serial data input. These pins
O OPEN
are P-channel open drain outputs with pull-down resistors.
Serial data transfer inputs. These pins must be connected to the system microcontroller. CL: Synchronization clock DI: Transfer data CE: Chip enable
BLOCK DIAGRAM
VFD DRIVER IC PIN FUNCTION (LC75725E) : IC74
PIN No. Pin Name I/O Function
1,12,23 +VD1 - Digital Power supply. Normally +2.5v
2,13,24 DGND - Digital Ground
3 AUD3 O SPDIF transmitter output/Digital audio output(N.C)
4 WR I Host write strobe pin(connected to GND with an external resistor)
5 RD I Host parallel output enable pin(pulled up with an external resistor)
6 CS_DA I SPI Serial data input pin
7 CS_CK I Serial control clock input pin
8 EMAD7 I/O
9 EMAD6 I/O
10 EMAD5 I/O
11 EMAD4 I/O Serial data IN/OUTPUT pins(pulled up with an external resistor)
14 EMAD3 I/O
15 EMAD2 I/O
16 EMAD1 I/O
17 EMAD0 I/O
18 CS_CE I Host parallel chip select pin
19 SCDIO(AK_DOUT) O Serial control port data ouput pin
20 INTREQ O Control port interrupt request output pin
21 EXTMEM I/O External Memory Chip Selector(pulled up with an external resistor)
22 SDATAN1(SDI) I PCM audio data input number 1 pin
25 SCLKN1(BICK) I PCM audio input bit clock pin
26 LRCLKN1(LRCK) I PCM audio input sample rate clock pin
27 CMPDAT(SDI) I PCM audio data input number 2 pin
28 CMPCLK(BICK) I PCM audio input bit clock pin
29 CREQ(LRCK) I PCM audio input sample rate clock pin
30 CLKIN(XIN) I Master clock input(used external clock)
31 CLKSEL(GND) I DSP clock mode select pin: connect the GND
32 FILT1 Connects to an external filter for the on-chip phase-locked loop
33 FILT1 Connects to an external filter for the on-chip phase-locked loop
34 +2.5V - Analog Power supply for clock generator . Normally +2.5V
35 AGND - Analog ground supply for clock generator PLL.
36 RESET(CS_RST) I Master reset input pin
37 DBDATA - Reserved pin and should be pulled up with an external resistor.
38 DBCLK - Reserved pin and should be pulled up with an external resistor.
39 AUD2(SDO2) O PCM multi-format digital-audio data ouput2 pin
40 AUD1(SDO1) O PCM multi-format digital-audio data ouput1 pin
41 AUD0(SDO0) O PCM multi-format digital-audio data ouput0 pin
42 LRCLK I Audio output sample rate clock pin
43 SCLK(BICK) I Audio ouput bit clock pin
44 MCLK I Audio master clock output pin
AUDIO DSP (CS493263 - CLG : IC79)
PIN ASSIGNMENT.(CS493263)
(TOP VIEW)
BlOCK DIAGRAM(CS493263)
VD1
DGND1
AUDATA3, XMT958 WR,DS,EMWR,GPIO10 RD,R/W,EMOE,GPIO11
A1,SCDIN
A0,SCCLK
DATA7,EMAD7,GPIO7
DATA6,EMAD6,GPIO6 DATA5,EMAD5,GPIO5 DATA4,EMAD4,GPIO4
VD2
DGND2
DATA3,EMAD3,GPIO3 DATA2,EMAD2,GPIO2
DATA1,EMAD1,GPIO1 DATA0,EMAD0,GPIO0
CS
SCDIO,SCDOUT,PSEL,GPIO9
ABOOT,INTREQ
EXTMEM,GPIO8
SDATAN1
7 8 9 10 11 12 13 14 15 16 17
6 5 4 3 2 1 44 43 42 41 40
CS493XXX-CLG
44-pin PLCC
Top View
18 19 20 21 22 23 24 25 26 27 28
MCLK SCLK
LRCLK AUDATA0
AUDATA1 AUDATA2
DC
39 38 37 36 35 34 33 32 31 30 29
DD RESET AGND
VA
FILT1 FILT2
CLKSEL CLKIN
CMPREQ,LRCLKN2 CMPCLK,SCLKN2
CMPDAT,SCLKN2,RCV958 LRCLKN1
SCLKN1,STCCLK2 DGND3
VD3
DATA7:0,
EMAD7:0,
GPIO7:0
Controller
RAM Input
PLL
CMPDAT SDATAN2
CMPCLK SCLKN2
CMPREQ LRCLKN2
SCLKN1 STCCLK2
LRCLKN1 SDATAN1
CLKIN
CLKSEL
RESET
Compressed
Data Input
Interface
Digital
Audio
Input
Interface
Clock Manager
Framer
Shifter
Input
Buffer
Buffer
CS
RD,
R/W,
EMWR,
EMOE,
GPIO10
GPIO11
DSP Processing
RAM
Program
Memory
ROM
Program
Memory
WR,
DR,
SCDIO,
SCDOUT,
PSEL,
GPIO9
Parallel or Serial Host Interface
24-Bit
RAM Data
Memory
ROM
Data
Memory
STC
A0,
SCCLK
Output
A1,
SCDIN
RAM
Buffer
A800T
INTERQ
EXTMEM.
GPIO8
Output
Formatter
DD DC
MCLK
SCLK
LRCLK
AUDA
XMT95
FILTD FILTS VA AGND DGND(3:1) VD(3:1)
CM2054C
Ise Electronics Corporation
:Grid Assignment
G10 G9 G8 G7 G6 G5 G4 G3 G2 G1
S16
S18
S22
S15
S21
S15
Sheet 4/5
Scale 3:1 Unit : mm
S16
S10
S3
S7
S14
S1
S17
S3
S5
S1
S7
S4
S6
S2
S14
S12
S16
S13
S10
S15
S11
S4
S3 S9
S7 S13
S13
S11 S8
S5
S2
G3-G10 G2 G1
S12
S9
S6
S4
S19
S10
S1
S12S6
Sheet 5/5
CM2054C
S1 S2 S3 S4 S5 S6 S7 S8
S9 S10 S11 S12 S13 S14 S15 S16 S17 S18 S19 S20 S21 S22 S23 S24
LFE
SBL
S10
S12 S13 SBR S15 S16
S18 S19
S21 S22
NIGHT
:Anode & Grid Assignment
G1 S1
S3 S4 SL S6 S7
S9
SR
R
C
L
G2 G3 G4 G5 G6 G7 G8 G9 G10 S1
S2 S3 S4 S5 S6 S7
S10 S11 S12 S13 S14 S15 S16
PRESET
SLEEP MULTI
S1 S2 S3 S4 S5 S6 S7 S8
S9 S10 S11 S12 S13 S14 S15 S16
dB
ST MEM KHz MHz
LOGIC 7
C M
S10 S11 S12 S13 S14 S15 S16
TUNED
VMAx
S1 S2 S3 S4 S5 S6 S7 S8 S9
N F
S1 S2 S3 S4 S5 S6 S7 S8
S9 S10 S11 S12 S13 S14 S15 S16
TA
AUTO
DSP
S1 S2 S3 S4 S5 S6 S7 S8
S9 S10 S11 S12 S13 S14 S15 S16
RDS OSD
S1 S2 S3 S4 S5 S6 S7 S8
S9 S10 S11 S12 S13 S14 S15 S16 S17
ANALOG
3
ST
S1 S2 S3 S4 S5 S6 S7 S8
S9 S10 S11 S12 S13 S14 S15 S16
COAX
1 2 3
Ise Electronics Corporation
S1 S2 S3 S4 S5 S6 S7 S8
S9 S10 S11 S12 S13 S14 S15 S16
OPT
1 2 3
S1 S2 S3 S4 S5 S6 S7 S8
S9 S10 S11 S12 S13 S14 S15 S16
DTS
D
HDCD
MP3 PCM PL D
PIN ASSIGNMENT
Pin No.
Assignment F2 NP NL S24 S23 S22 S21 S20 S19 S18 S17 S16 S15 S14 S13 S12 S11 S10 S9 S8 S7 S6 S5 S4 S3 S2
Pin No.
Assignment NL NL NL NL G10 G9 G8 G7 G6 G5 G4 G3 G2 G1 NL NP F1
F1,F2:Filament G1-G10:Grid S1-S24:Anode NP:No Pin NL:No Lead
NL
(F2)
S1
12345678910111213141516171819
NL
(F1)
202122232425262728293031323334353637383940414243444546
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