Fairchild Semiconductor CD4046BCN, CD4046BCMX, CD4046BCM, CD4046BCCW Datasheet

October 1987
Revised January 1999

CD4046BC Micropower Phase-Locked Loop

© 1999 Fairchild Semiconductor Corporation DS005968.prf www.fairchildsemi.com

CD4046BC
Micropower Phase-Locke d Loop

General Description

The CD4046BC microp ower phase-lo cked loop (PLL) con­sists of a low power, linear, voltage-controlled oscillator
(VCO), a source follower, a zener diode, and t wo phase
comparators. The two phase compara tors have a comm on
signal input and a common comparator input. The signal
input can be directly coup led for a large voltage signal, or
capacitively coupled to the self- biasing a mplif ier at t he si g­nal input for a small voltage signal.

Phase comparator I, an exclusive OR gate, provides a digi­tal error signal (phase comp. I Out) and maintains 90°
phase shifts at the VCO ce nter frequency. Between signal
input and comparator input (both at 50% duty cycle), it may
lock onto the signal input fr eq uen cies t hat are close to har­monics of the VCO center frequency.

Phase comparator II is an ed ge-controlled digi tal memory
network. It provides a di gital error signal (phas e comp. II
Out) and lock-in signal (phase pulses) to indica te a locked
condition and maintains a 0° phase shift between signal
input and comparator input.

The linear voltage-con trolled oscillator (VCO) produces an
output signal (VCO Out) whose frequency is determined by
the voltage at the VCO

IN

input, and the capacitor and resis-

tors connected to pin C1

A

, C1B, R1 and R2.

The source follower output of the VCO

IN

(demodulator Out)

is used with an external resistor of 10 kΩ or more.

The INHIBIT input, when high, disables the VCO and
source follower to minimize standby power consumption .
The zener diode is provided for power supply regul ation, if
necessary.

Features

■ Wide supply voltage range: 3.0V to 18V

■ Low dynamic power consu mption: 70 µW (typ.) at f

o

=

10 kHz, V

DD

= 5V

■ VCO frequency: 1.3 MHz (typ.) at V

DD

= 10V

■ Low frequency dr ift: 0.06%/°C at V

DD

= 10V with tem-

perature

■ High VCO linearity: 1% (typ.)

Applications

• FM demodulator and modulator

• Frequency synthesis and multiplication

• Frequency discrimination

• Data synchronization and conditioning

• Voltage-to-frequency conversion

• Tone decoding

• FSK modulation

• Motor speed control

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Pin Assignments for SOIC and DIP

Top View

Order Number Package Number Package Description

CD4046BCM M16A 16-Lead Small Outline integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
CD4046BCN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

www.fairchildsemi.com 2

CD4046BC

Block Diagram

FIGURE 1.

3 www.fairchildsemi.com

CD4046BC

Absolute Maximum Ratings(Note 1)

(Note 2)

Recommended Operating
Conditions

(Note 2)

Note 1: “Absolute Maximum Rat ings” are tho se values beyond which the
safety of the device cannot be guaranteed. They are not meant to imply
that the devices should be op erated at these lim its. The table of “Recom­mended Operating Conditions” and “Electrical Characteristics” provides
conditions for actual device o peration.

Note 2: V

SS

= 0V unless otherw is e s pecified.

DC Electrical Characteristics (Note 2)

Note 3: Capacitance is guaranteed by periodic testing.
Note 4: I

OH

and IOL are tested one output at a ti m e.

DC Supply Voltage (VDD) −0.5 to +18 V

DC

Input Voltage (VIN) −0.5 to VDD +0.5 V

DC

Storage Temperature Range (TS) −65°C to +150°C
Power Dissipation (P

D

)
Dual-In-Line 700 mW
Small Outline 500 mW

Lead Temperature (T

L

)
(Soldering , 10 seconds) 260°C

DC Supply Voltage (V

DD

) 3 to 15 V

DC

Input Voltage (VIN) 0 to VDD V

DC

Operating Temperature Range (TA) −40°C to +85°C

Symbol Parameter Conditions

−40°C +25°C +85°C

Units

Min Max Min Typ Max Min Max

I

DD

Quiescent Device Current Pin 5 = V

DD,

Pin 14 = V

DD,

Pin 3, 9 = V

SS

VDD = 5V 20 0.005 20 150 µA
VDD = 10V 40 0.01 40 300 µA
VDD = 15V 80 0.015 80 600 µA
Pin 5 = VDD, Pin 14 = Open,
Pin 3, 9 = V

SS

VDD = 5V 70 5 55 205 µA
VDD = 10V 530 20 410 710 µA
VDD = 15V 1500 50 1200 1800 µA

V

OL

LOW Level Output Voltage VDD = 5V 0.05 0 0.05 0.05 V

VDD = 10V 0.05 0 0.05 0.05 V
VDD = 15V 0.05 0 0.05 0.05 V

V

OH

HIGH Level Output Voltage VDD = 5V 4.95 4.95 5 4.95 V

VDD = 10V 9.95 9.95 10 9.95 V
VDD = 15V 14.95 14.95 15 14.95 V

V

IL

LOW Level Input Voltage VDD = 5V, VO = 0.5V or 4.5V 1.5 2.25 1.5 1.5 V
Comparator and Signal In VDD = 10V, VO = 1V or 9V 3.0 4.5 3.0 3.0 V

VDD = 15V, VO = 1.5V or 13.5V 4.0 6.25 4.0 4.0 V

V

IH

HIGH Level Input Voltage VDD = 5V, VO = 0.5V or 4.5V 3.5 3.5 2.75 3.5 V
Comparator and Signal In VDD = 10V, VO = 1V or 9V 7.0 7.0 5.5 7.0 V

VDD = 15V, VO = 1.5V or 13.5V 11.0 11.0 8.25 11.0 V

I

OL

LOW Level Output Current VDD = 5V, VO = 0.4V 0.52 0.44 0.88 0.36 mA
(Note 4) VDD = 10V, VO = 0.5V 1.3 1.1 2.25 0.9 mA

VDD = 15V, VO = 1.5V 3.6 3.0 8.8 2.4 mA

I

OH

HIGH Level Output Current VDD = 5V, VO = 4.6V −0.52 −0.44 −0.88 −0.36 mA
(Note 4) VDD = 10V, VO = 9.5V −1.3 −1.1 −2.25 −0.9 mA

VDD = 15V, VO = 13.5V −3.6 −3.0 −8.8 −2.4 mA

I

IN

Input Current All Inputs Except Signal Input

VDD = 15V, VIN = 0V −0.3 −10−5−0.3 −1.0 µA
VDD = 15V, VIN = 15V 0.3 10−50.3 1.0 µA

C

IN

Input Capacitance Any Input (Note 3) 7.5 pF

P

T

Total Power Dissipation fo = 10 kHz, R1 = 1 MΩ,

R2 = ∞, ςΧΟΙΝ = ς∆∆/2
VDD = 5V 0.07 mW
VDD = 10V 0.6 mW
VDD = 15V 2.4 mW

www.fairchildsemi.com 4

CD4046BC

AC Electrical Charac teristics (Note 5)

TA = 25°C, CL = 50 pF

Symbol Parameter Conditions Min Typ Max Units

VCO SECTION

I

DD

Operating Current fo = 10 kHz, R1 = 1 MΩ,

R2 = ∞, ςΧΟΙΝ = ς∆∆/2
VDD = 5V 20 µA
VDD = 10V 90 µA
VDD = 15V 200 µA

f

MAX

Maximum Operating Frequency C1 = 50 pF, R1 = 10 kΩ,

R2 = ∞, ςΧΟΙΝ = ς

∆∆

VDD = 5V 0.4 0.8 MHz
VDD = 10V 0.6 1.2 MHz
VDD = 15V 1.0 1.6 MHz

Linearity VCOIN = 2.5V ±0.3V,

R1 ≥ 10 kΩ, VDD = 5V 1 %
VCOIN = 5V ±2.5V,
R1 ≥ 400 kΩ, VDD = 10V 1 %
VCOIN = 7.5V ±5V,
R1 ≥ 1 MΩ, VDD = 15V 1 %

Temperature-Frequency Stability %/°C∝1/φ. ς

∆∆

No Frequency Offset, f

MIN

= 0R2 = ∞

VDD = 5V 0.12–0.24 %/°C

VDD = 10V 0.04–0.08 %/°C
VDD = 15V 0.015–0.03 %/°C

Frequency Offset, f

MIN

≠ 0 VDD = 5V 0.06–0.12 %/°C

VDD = 10V 0.05–0.1 %/°C
VDD = 15V 0.03–0.06 %/°C

VCO

IN

Input Resistance VDD = 5V 10

6

MΩ

VDD = 10V 10

6

MΩ

VDD = 15V 10

6

MΩ

VCO Output Duty Cycle VDD = 5V 50 %

VDD = 10V 50 %
VDD = 15V 50 %

t

THL

VCO Output Transition Time VDD = 5V 90 200 ns

t

THL

VDD = 10V 50 100 ns
VDD = 15V 45 80 ns

PHASE COMPARATORS SECTION

R

IN

Input Resistance

Signal Input VDD = 5V 1 3 MΩ

VDD = 10V 0.2 0.7 MΩ
VDD = 15V 0.1 0.3 MΩ

Comparator Input VDD = 5V 10

6

MΩ

VDD = 10V 10

6

MΩ

VDD = 15V 10

6

MΩ

AC-Coupled Signal Input Voltage
Sensitivity

C

SERIES

= 1000 pF
f = 50 kHz
VDD = 5V 200 400 mV
VDD = 10V 400 800 mV
VDD = 15V 700 1400 mV

5 www.fairchildsemi.com

CD4046BC

AC Electrical Characteristics (Continued)

Note 5: AC Parameters are guaranteed by DC correlated testin g.

Phase Comparator State Diagrams

FIGURE 2.

Symbol Parameter Conditions Min Typ Max Units

DEMODULATOR OUTPUT

VCOIN−
V

DEM

Offset Voltage RS ≥ 10 kΩ, VDD = 5V 1.50 2.2 V

RS ≥ 10 kΩ, VDD = 10V 1.50 2.2 V
RS ≥ 50 kΩ, VDD = 15V 1.50 2.2 V

Linearity RS ≥ 50 kΩ

VCOIN = 2.5V ±0.3V, VDD = 5V 0.1 %
VCOIN = 5V ±2.5V, VDD = 10V 0.6 %
VCOIN = 7.5V ±5V, VDD = 15V 0.8 %

ZENER DIODE

V

Z

Zener Diode Voltage IZ = 50 µA 6.3 7.0 7.7 V

R

Z

Zener Dynamic Resistance IZ = 1 mA 100 Ω