Denon AVR-4208, AVC-A11SR Service Manual

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SERVICE MANUAL

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For U.S.A., Canada, Europe,
Asia, China, Hong Kong,
Korea & Taiwan R.O.C. model

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Hi-Fi Component

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MODEL

TEL [phone] QQ 376315150 892498299

MODEL

AV SURROUND RECEIVER / AMPLIFIER

TEL

13942296513

AVR-4802
AVC-A11SR

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For AVR-4802 For AVC-A11SR



 Some illustrations using in this service manual are slightly different from the actual set.

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14-14, AKASAKA 4-CHOME, MINATO-KU, TOKYO 107-8011 JAPAN

Telephone: [phone]

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X0120 1174 NC 0108

SAFETY PRECAUTIONS

The following check should be performed for the continued protection of the customer and service technician.

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LEAKAGE CURRENT CHECK

Before returning the unit to the customer, make sure you make either (1) a leakage current check or (2) a line to chassis
resistance check. If the leakage current exceeds 0.5 milliamps, or if the resistance from chassis to either side of the
power cord is less than 460 kohms, the unit is defective.

SPECIFICATIONS

Audio Section

Power amplifier:

Rated output: Stereo (2 ch driven)
(All properties shown are only for the 125 W + 125 W (8 Ω/ohms, 20 Hz ~ 20 kHz with 0.05 % T.H.D.)
power amplifer stage.) 150 W + 150 W (6 Ω/ohms, 20 Hz ~ 20 kHz with 0.05 % T.H.D.)
Dynamic power: 170 W × 2 ch (8 Ω/ohms)

Output terminals: Front/Center: 6 ~ 16 Ω/ohms

Analog:

Input sensitivity/input impedance: 200 mV/47 kΩ/kohms
Frequency response: 10 Hz ~ 100 kHz: +0, −3 dB (DIRECT mode)
S/N: 105 dB (DIRECT mode)
Distortion: 0.005 % (20 Hz ~ 20 kHz) (DIRECT mode)
Rated output/maximum output: 1.2 V/8 V

Digital:

D/A output: Rated output  2 V (at 0 dB playback)

Digital input: Format  Digital audio interface

Phono equalizer (PHONO input

Input sensitivity: 2.5 mV
RIAA deviation: ±1 dB (20 Hz to 20 kHz)
Signal-to-noise ratio: 74 dB (A weighting, with 5 mV input)
Rated output/Maximum output: 150 mV/8V
Distortion factor: 0.03 % (1 kHz, 3 V)

13942296513

Video Section

Standard video jacks

Input/output level and impedance: 1 Vp-p, 75 Ω/ohms
Frequency response: 5 Hz ~ 10 MHz  +0, −3 dB

S-video jacks

Input/output level and impedance: Y (brightness) signal  1 Vp-p, 75 Ω/ohms

Frequency response: 5 Hz ~ 10 MHz  +0, −3 dB

Color component video terminal:

Input/output level and impedance: Y (brightness) signal  1 Vp-p, 75 Ω/ohms

Frequency response: DC ~ 50 MHz  +0, −3 dB

Tuner Section

Receiving range: 87.5 MHz ~ 107.9 MHz 520 kHz ~ 1710 kHz
Usable sensitivity: 1.0 µV (11.2 dBf) 18 µV
50 dB Quieting sensitivity: MONO 1.6 µV (15.3 dBf)

Signal to Noise Ratio (IHF-A): MONO 77 dB 50 dB

Total Harmonic Distortion (at 1 kHz): MONO 0.15 %

General

Power supply: AC 120 V, 60 Hz (U.S.A., Canada & Taiwan R.O.C. model)

Power consumption: 10.5 A (U.S.A., & Canada model)

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

 REC OUT):

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270 W × 2 ch (4 Ω/ohms)
350 W × 2 ch (2 Ω/ohms)

Surround: A or B 6 ~ 16 Ω/ohms

Total harmonic distortion  0.005 % (1 kHz, at 0 dB)
S/N ratio  110 dB
Dynamic range  108 dB

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C (color) signal  0.286 Vp-p, 75 Ω/ohms

P

B/CB (blue) signal  0.7 Vp-p, 75 Ω/ohms

P

R/CR (red) signal  0.7 Vp-p, 75 Ω/ohms

[FM] (note: µV at 75 Ω/ohms, 0 dBf = 1 × 10

STEREO 23 µV (38.5 dBf)

STEREO 72 dB

STEREO 0.3 %

AC 230 V, 50 Hz (Europe & Asia model)
AC 220 V, 50 Hz (China model)

A + B 8 ~ 16 Ω/ohms

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Maximum external dimensions: 434 (W) × 179 (H) × 485 (D) mm (17-3/32″ × 7-3/64″ × 19-3/32″)
Mass: 20.5 kg (45 lbs 3.1 oz)

Remote Control Unit (RC-8000): AVR Model only

Batteries: LR6/AA Type (four batteries)
External dimensions: 96 (W) × 38 (H) × 168.5 (D) mm (3-25/32″ × 1-1/2″ × 6-41/64″)
Mass: 242 g (Approx. 8.5 oz) (not including batteries)

Remote Control Unit (RC-899): AVC Model only

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Batteries: R6P/AA Type (three batteries)

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External dimensions: 61 (W) × 230 (H) × 34 (D) mm (2-13/32″ × 9-1/16″ × 1-11/32″)
Mass: 150 g (Approx. 5.3 oz) (not including batteries)

* For purposes of improvement, specifications and design are subject to change without notice.

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CAUTION IN SERVICING

When you have replaced the 1U-3291 Unit, or changed the CPU, DSP, or their peripheral parts, be sure to perform “RESET”
by pressing S803 on the DSP Unit Ass’y in the state of Standby or Power-on.

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WIRE ARRANGEMENT

If wire bundles are untied or moved to perform adjustment or parts replacement etc.,be sure to rearrange them neatly as they
were originally bundled or placed afterward.
Otherwise, incorrect arrangement can be a cause of noise generation.

Wire arrangement viewed from the top

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AVR-4802/AVC-A11SR

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AVR-4802/AVC-A11SR

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Wire arrangement viewed from the bottom

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DISASSEMBLY

(Follow the procedure below in reverse order when reassembling)

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Top Cover

(1) Remove 9 screws 1 on both sides and on the top.

(2) Remove 4 screws

Cover by sliding to the arrow direction.

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on the rear and detach the Top

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Top Cover

AVR-4802/AVC-A11SR

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Front Panel

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13942296513

(1) Remove 11 screws 3 and detach the Bottom Cover.

(2) Remove the screw

(3) Disconnect FFC wire from its connector, and detach

the Front Panel in the arrow direction.

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, 7 screws 5.

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Front Panel

FFC Wire

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P.W.B.s on Front Panel

(1) FLD P.W.B.

Remove 6 screws

(2) Tact SW P.W.B.

Remove 10 screws
and nut.

(3) Master VR P.W.B.

Remove the screw 8 after taking off the master volume
knob and nut.

(4) Power SW P.W.B.

Remove 2 screws

(5) Remo-con. P.W.B.

Remove the screw
knob and nut.

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after taking off the select knob

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after taking off the input selector

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Power SW
P.W.B.

Remo-con. P.W.B.

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Master Volume Knob

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FLD P.W.B.Input Selector Knob

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Tact SW P.W.B.

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Master Volume
P.W.B.

Select Knob

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S. Video P.W.B. / C. Video P.W.B. / Comp

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Video P.W.B. / Audio P.W.B. Block

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(1) Disconnect the FFC from its connector.

(2) Remove 6 screws 11, 3 screws 12, 53 screws 13, 2

screws 14, and detach the Back Panel.

(3) Remove 16 screws 15 of the wires connecting to the

C. Video P.W.B.

(4) Remove 2 screws 16.

Back Panel

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FFC Wire

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C.Video P.W.B. (Top view)

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Front

Rear

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AVR-4802/AVC-A11SR

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P.W.B. Block

Remove P.W.B.s in the following order.

1. Connect L P.W.B.

2. Comp. Video P.W.B.

3. S Video P.W.B./C Video & Reg. P.W.B./OSD P.W.B.

4. Audio In P.W.B.

5. DSP P.W.B.

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CONNECT R P.W.B.

COMP. VIDEO P.W.B.

S VIDEO P.W.B.

PHONO P.W.B.

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AUDIO IN P.W.B.

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OSD P.W.B.

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C VIDEO & REG. P.W.B.

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CONNECT L P.W.B.

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Power AMP L/R P.W.B.

13942296513

(1) Remove 8 screws 17 fastening to the chassis.

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DSP P.W.B.

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232C P.W.B.

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Front Chassis, H/P P.W.B.

(1) Remove 8 screws 18.

(2) Detach the Front Chassis by pulling upward to release

4 hooks.

(3) Remove 2 screws 19 and snap plate, then detach the

H/P P.W.B.

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Hook

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Front Chassis

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Snap Plate

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H/P P.W.B.

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IC512

1

SN74LV4040APW

INPUT

SELECTOR (9) (3)

(11)

(2)MCLK

(10)

(7)

(26)BCLK

IC104

(13)

(25)LRCLK

SN74HC

(10)

(27)SDATA

151APW

CKOUT(13) FRONTch

(5) (5)DIN2 BCK(14)

LRCK(15)

DATAD(16)

XIN(22)

12.287MHz
IC113

(2)MCLK

SG-8002

(7) (26)BCLK

(13) (25)LRCLK

(3) (10) (27)SDATA

IC112 CENTERch

SN74LV4040APW

(2) (13) (4) (15)

(7) (18) (8) (19)

SUBWOOFERch

RFS0 RFS1 RCLK0 RCLK1

TFS0 TFS1 TCLK0 TCLK1

MCLK(17)

TCLK0(8)

(4)RCLK0

AIN SCLK(18)

TCLK1(19)

(15)RCLK1

LRCK(19) (2)MCLK

SDATA(21) TFS0(7) (2)RFS0 (26)BCLK

TFS1(18)

(13)RFS1

(25)LRCLK
(27)SDATA

(5)DR0A

DT0A(11)

(5)DR0A

DT0A(11)

DT0B(12)

(6)DR0B

DT0B(12)

SURROUNDch

DT1A(22)

(16)DR1A

DT1A(22)

DT1B(23)

(17)DR1B

DT1B(23)

(2)MCLK
(26)BCLK
(25)LRCLK
(27)SDATA

SURROUND BACKch

DIR

IC111

LC89055W

A/D CONVERTER

AD1854K

IC114

AK5353VS

IC107

74LVX157MTC

2nd DSP1st DSP

A/D SELECTOR

IC502

ADSP-21065L

IC501

ADSP-21065L

IC511

D/A CONVERTER

IC305

AD1854K

IC307

IC301

AD1854K

IC303

AD1854K

SYNC

SN74LV86APW

SN74LV00APW

IC523

256fs

64fs

fs

DATA

DATA

256fs

64fs

fs

FRONT

CENTER/SW

SURROUNDSURROUND BACK

fs

64fs

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DOLBY DIGITAL Decode
DTS-ES Decode
AL24 Processing

THX Filter Processing
EX/ES Matrices Processing
Sound Simulation
Bus-Management Processing

* fs is a sampling frequency of input digital signal.

e.g.: sampling frequency 48 kHz → fs=48 kHz

* 64fs and 256fs are 64 or 256 times the sampling frequency

respectively.
e.g.:sampling frequency 48 kHz

64fs:48kHz x 64 = 3.072MHz
256fs:48kHz x 256 = 12.288MHz

* The sampling frequency for analog input is fixed to 48kHz internally.

* (No.) indicates the pin number of individual IC.

* The arrow indicates the direction of signal flow. As the input terminal

pointed by the arrowhead and the output terminal by the opposite.

CLOCK FLOW & WAVE FORM IN DIGITAL BLOCK

Clock Flow Wave Form

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AVR-4802/AVC-A11SR

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CH1: IC104 (5)

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CH1: DATA

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CH2: fs

CH3: 64fs

CH1: 64fs

CH2: fs

CH3: 256fs

CH4:

FRONT DATA

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LEVEL DIAGRAMS (1/2)

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AVR-4802/AVC-A11SR

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LEVEL DIAGRAMS (2/2)

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AVR-4802/AVC-A11SR

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ADJUSTMENT

Audio Section

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Idling Current (1U-3356-1, 2)

Required measurement equipment : DC Voltmeter

Preparation

(1) Avoid direct blow from an air conditioner or an electric fan, and adjust the unit at normal room tempereture 15 °C ~ 30 °C

(59 °F ~ 86 °F).

(2) Presetting

 POWER (Power source switch) → OFF
 SPEAKER (Speaker terminal) → No load (Do not connect speaker, dummy resistor, etc.)

Adjustment

(1) Remove top cover and set VR101, VR301, VR401 on 1U-3356-1 (Power Amp L unit), VR102, VR202, VR302, VR402 on

1U-3356-2 (Power Amp. R Unit) at fully counterclockwise (

(2) Connect DC Voltmeter to test points (FRONT-Lch: TP101, FRONT-Rch: TP102, CENTER ch: TP202, SURROUND-Lch:

TP301, SURROUND-Rch: TP302, SURROUND BACK-Lch: TP401, SURROUND BACK-Rch: TP402).

(3) Connect power cord to AC Line, and turn power switch "ON".

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) position.

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(4) Presetting. MASTER VOLUME : "---" counterclockwise (

MODE : 5CH/7CH STEREO
FUNCTION : CD

(5) Within 2 minutes after the power on, turn VR101 clockwise (

(6) After 10 minutes from the preset above, turn VR101 to set the voltage to 2 mV ±0.5 mV DC.
(7) Adjust the Variable Resistors of other channels in the same way.

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1U-3356-1

TP101

VR101

TP301

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min.)

) to adjust the TEST POINT voltage to 2 mV ±0.5 mV DC.

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1U-3356-2

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TP102

VR102

TP202

VR202

TP302

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DC Voltmeter

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VR301

Power Trans

TP401

VR401

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TP402

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SEMICONDUCTORS



 IC’s



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LH28F800BVE-BTL90 (IC504, 507)

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AVR-4802/AVC-A11SR

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AVR-4802

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1

A15

2

A14

3

A13

4

A12

5

A11

6

A10

7

A9

8

A8

9

NC

10

NC

11

WE

12

RESET

13

NC

14

NC

RDY/BSY

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N74AHCT573PW (IC516, 520)
N74LV573ANS (IC517, 521)

TEL

GND

15
16

A18

17

A17

18

A7

19

A6

20

A5

21

A4

22

A3

23

A2

24

A1

1

OE

2

D0

3

D1

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D2

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D4

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D5

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D6

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D7

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20

Vcc

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Q0

Q1

18
17

Q2

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Q3
Q4

15

Q5

14

13

Q6
Q7

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11

LE

48
47
46
45
44
43
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41
40
39
38
37
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35
34
33
32
31
30
29
28
27
26
25

A16
BYTE

SS

V
DQ15/A-1
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4

DD

V
DQ11
DQ3
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
OE

SS

V
CE
A0

LE

OE

Symbol Function

A0~A18 Address input

DQ0~DQ14 Data in/output

DQ15/A-1 Data in/output/Address input

CE Chip enable input

OE Output enable input

BYTE Word/byte select input

WE Write enable input

RDY/BSY Ready/busy output

RESET Hardware reset input

N.C. No connection

VDD Power

Vss GND

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Q0 Q1

D1 D2

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L

1819

D0

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1

D3 D4 D5 D6

5678

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17

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L

Q3 Q4

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1516

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Q5 Q6 Q7

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D

8

L

Q

121314

2

9

9

16MB SDRAM TSOP-8 H/W (IC505, 506, 508, 509)

A4

w

w

A3
A2
A1
A0

CE
I/O 1
I/O 2
I/O 3
I/O 4

V

DD

GND

I/O 5
I/O 6
I/O 7
I/O 8

WE
A15
A14
A13
A12

N.C.

w

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

.

xia

A5

44

A6

43

A7

42

OE

41

UB

40

LB

39

I/O 1 6

38

I/O 1 5

37

I/O 1 4

36

I/O 1 3

35

GND

34

V

33
32
31
30
29
28
27
26
25
24
23

DD

I/O 1 2
I/O 1 1
I/O 1 0
I/O 9
N.U.
A8
A9
A10
A11
N.C.

o

y

Symbol Function

A0~A15 Address input

I/O1~I/O16 Data in/output

CE Chip enable input

WE Write enable input

OE Output buffer control input

LB, UB Data byte control input

VDD Power terminal (3.3V)

GND GND

N.C. No connection

N.U. Unusable (input)

u

1

6

3

.

c

o

m

13

13

ADSP-21065L (IC501, 502)

AVR-4802/AVC-A11SR

Q

Q

3

7

6

3

1

5

1

1

5

0

TEL [phone] QQ 376315150 892498299

52

53

ADSP-21065L Terminal Function

Q

Q

1

Pin

Pin Name

No.

106 GND

107 DATA15

108 DATA16

109 DATA17

110 VDD

111 DATA18

112 DATA19

7

3

113 DATA20

114 GND

115 NC

116 DATA21

117 DATA22

118 DATA23

119 GND

120 VDD

121 DATA24

122 DATA25

123 DATA26

124 VDD

125 GND

126 DATA27

127 DATA28

128 DATA29

129 GND

130 VDD

131 VDD

132 DATA30

133 DATA31

134 FLAG7

135 GND

136 FLAG6

137 FLAG5

138 FLAG4

139 GND

6

3

140 VDD

Pin
No.

1 VDD

2 RFS0

3 GND

4 RCLK0

5 DR0A

6 DR0B

7 TFS0

TEL

8 TCLK0

9 VDD

10 GND

11 DT0A

12 DT0B

13 RFS1

14 GND

15 RCLK1

16 DR1A

17 DR1B

18 TFS1

19 TCLK1

20 VDD

21 VDD

22 DT1A

23 DT1B

24

25 GND

26

27 BR1

28 BR2

29 VDD

30 CLKIN

31 XTAL

32 VDD

33 GND

34 SDCLK1

w

w

35 GND

Pin

Pin Name

13942296513

PWM_EVENT1

PWM_EVENT0

w

.

Pin Name

No.

36 VDD

37 SDCLK0

38 DMAR1

39 DMAR2

40 HBR

41 GND

42 RAS

43 CAS

44 SDWE

45 VDD

46 DQM

47 SDCKE

48 SDA10

49 GND

50 DMAG1

51 DMAG2

52 HBG

53 BMSTR

54 VDD

55 CS

56 SBTS

57 GND

58 WR

59 RD

60 GND

61 VDD

62 GND

63 REDY

64 SW

65 CPA

66 VDD

67 VDD

68 GND

69 ACK

xia

70 MS0

Pin
No.

71 MS1

72 GND

73 GND

74 MS2

75 MS3

76 FLAG11

77 VDD

78 FLAG10

79 FLAG9

80 FLAG8

81 GND

82 DATA0

83 DATA1

84 DATA2

85 VDD

86 DATA3

87 DATA4

88 DATA5

89 GND

90 DATA6

91 DATA7

92 DATA8

93 VDD

94 GND

95 VDD

96 DATA9

97 DATA10

98 DATA11

99 GND

100 DATA12

101 DATA13

102 NC

103 NC

104 DATA14

o

y

105 VDD

Pin Name

u

6

8

3

.

9

157208

156

105

104

Pin
No.

141 VDD

142 NC

143 ID1

144 ID0

145 EMU

146 TDO

147 TRST

1

5

1

148 TDI

149 TMS

150 GND

151 TCK

152 BSEL

153 BMS

154 GND

155 GND

156 VDD

157 RESET

158 VDD

159 GND

160 ADDR23

161 ADDR22

162 ADDR21

163 VDD

164 ADDR20

165 ADDR19

166 ADDR18

167 GND

168 GND

169 ADDR17

170 ADDR16

171 ADDR15

172 VDD

173 ADDR14

174 ADDR13

c

175 ADDR12

2

Pin Name

5

o

4

0

m

9

8

9

2

8

Pin

Pin Name

No.

176 VDD

177 GND

178 ADDR11

179 ADDR10

180 ADDR9

181 GND

182 VDD

2

183 ADDR8

184 ADDR7

185 ADDR6

186 GND

187 GND

188 ADDR5

189 ADDR4

190 ADDR3

191 VDD

192 VDD

193 ADDR2

194 ADDR1

195 ADDR0

196 GND

197 FLAG0

198 FLAG1

199 FLAG2

200 VDD

201 FLAG3

202 NC

203 NC

204 GND

205 IRQ0

206 IRQ1

207 IRQ2

208 NC

4

9

8

9

2

9

9

TEL [phone] QQ 376315150 892498299

9

14

75

76

100

1

25

26

50

51

AVR-4802/AVC-A11SR

TMP95FY64F (IC801)

Q

TMP95FY64F Terminal Function

Pin.

No.

TEL [phone] QQ 376315150 892498299

1 VREFL VREFL

2 AVss AVss

3 AVcc AVcc

4 DAOUT0 DAOUT0 No connection

5 DAOUT1 DAOUT1 O C

6 _NMI _NMI I

7 P53/_BUSRQ ASIC RESET O N

8 P54/_BUSAK WP1 O C

9 P55/_WAIT WP2 O C

10 P56/INT0 B.DOWN I

11 P57/SCLK2/_CTS2 ROM_RES1 O C

12 P80/TxD0 MISO O C MAIN-SUB µcom comm. control terminal (Data out)

13 P81/RxD0 MOSI I

14 P82/SCLK0/_CTS0 CLK I/O C MAIN-SUB µcom comm. control terminal (I2C clock in/out)

15 P83/TxD1 DIR MOSI O C

16 P84/RxD1 DIR MISO I

17 P85/SCLK1/_CTS1 DIR CLK O C

18 P86/TxD2 TxD O C

19 P87/RxD2 RxD I

20 P60/_CS0 D.EXP OE O C

21 P61/_CS1 D.EXP CLK O C

22 P62/_CS2 D.EXP DATA O C

23 P63/_CS3 D.EXP STB O C

24 CLK CLK O C

25 Vcc Vcc

26 Vss I/O1

27 X1 Xin I

28 X2 Xout O

29 _EA _EA

30 _RESET RESET I

31 P70/TI0/INT1 DSP ACK1 I

32 P71/TO1 _DSP1 RESET O C

33 P72/TO3/INT2 AC-3 RF DET. I

34 P73/TI4/INT3 DAC-192 O C

35 P74/TO5 _DSP2 RESET O C

36 P75/TO7/INT4 _REQ O C

37 P90/TI8/INT5 _ACK I

38 P91/TI9/INT6 CSI I

39 P92/TO8 EMP I

40 P93/TO9 DEEPM O C

41 P94/TIA/INT7 _CS I

42 P95/TIB/INT8 ERR I

43 P96/TOA/TOB DIR RESET O C

44 Vcc Vcc

45 P00/D0 DIT_RESET C

46 P01/D1 DIT CLK C

47 P02/D2 DIT uDATA C

48 P03/D3 DIT ST C

49 P04/D4 DIT_CS C

50 P05/D5 DIT R/W C

51 P06/D6 DH/RESET C

Q

Name

T

E

w

L

w

3

Symbol I/O Type Det Op Res Ini Function

1

w

7







E↓





3

9












E↑&L

E↓&L

E↓



E↑
E↑&L



6



Od L L No connection



Eu H H ASIC control terminal (L: Reset)



Od Memory write protect for DSP1



Od Memory write protect for DSP2

&L Eu Z



Od Memory reset for DSP1



Lv



4



Lv







Lv Eu L







&L Eu

Lv

Lv



&L Od









.




Z L DIR control terminal (LC89055Q), control data output



Z L DIR control terminal (LC89055Q), control clock output

2

Z L Data send output to external (common with 1394 data comm.)



Z L Port Expander control out for DIGITAL input switching (TC4094B)

Z L Port Expander control out for DIGITAL input switching (TC4094B)

Z L Port Expander control out for DIGITAL input switching (TC4094B)

Z L Port Expander control out for DIGITAL input switching (TC4094B)

Eu



Od L L DSP1 reset output terminal (L: Reset)

Od L L DSP2 reset output terminal (L: Reset)

Eu H L MAIN-SUB µcom comm. control terminal (L: Comm. request from SUB)





Ed L L



Z L DIR control input terminal (LC89055Q), L: Reset

Z L DIT control terminal

Z L DIT control terminal

Z L DIT control terminal

Z L DIT control terminal

Z L DIT control terminal

Z L DIT control terminal

Z L DHIVA board reset (fixed to L)

6

i

1

5

a

3

A/D ref. GND

A/D GND

AD +5V

Not used (fixed to H)



Power down detect (L: Detected)

MAIN-SUB µcom comm. control terminal (Data in)

DIR control input terminal (LC89055Q), control data input

2

9

Data receive input from external (common with 1394 data comm.)

+5V

GND

X'tal connection

X'tal connection

Fixed to +5V



Reset input

DSP1 host interface comm. respond input (L: OK)

AC-3 RF signal detect input (L: AC-3 RF signal input)

Sets D/A to 192k

MAIN-SUB µcom comm. control terminal (L: Ack. return from MAIN)

DIR control input terminal (LC89055Q), L: PCM

H: EMP ON



DIR control input terminal (LC89055Q), L→H: Cannel status change

DIR control input terminal (LC89055Q), H: ERR

+5V

x

1

5

3

o

1

y

5

u

0

1

Q

Q

6

Pin.

No.

52 P07/D7 DMUTE C

53 P10/D8 I/O1 I/O C

54 P11/D9 I/O2 I/O C

55 P12/D10 I/O3 I/O C

56 P13/D11 I/O4 I/O C

57 P14/D12 I/O5 I/O C

58 P15/D13 I/O6 I/O C

59 P16/D14 I/O7 I/O C

60 P17/D15 I/O8 I/O C

61 AM8/_16 Fixed to +5V

62 Vss Vss

63 Vcc Vcc

64 P27/A23 _DSP REQUEST1 O C

65 P26/A22 WRITE1 O C

66 P25/A21 _DSP REQUEST2 O C

67 P24/A20 WRITE2 O C

68 P23/A19 DSP ACK2 I

69 P22/A18 BUSY2 I

70 P21/A17 FLAG 3A I

71 P20/A16 BUSY1 I

72 P37/A15 SEL CK O C

73 P36/A14 DIR CE O C

74 P35/A13 FLAG 3B I

75 P34/A12 DAC-RESET2 O C

76 P33/A11 DIGITAL POWER O C

77 P32/A10 DIR AUTO O C

78 P31/A9 BPSYNC O C

79 P30/_B00T/A8 _B00T I

80 P47/A7 _DEMOD RESET O C

81 P46/A6 DEMOD ON O C

82 P45/A5 FGAIN O C

83 P44/A4 A/D RESET O N

7

3

84 P43/A3 DAC-RESET1 O C

85 P42/A2 DAC-DIF. DAC differential use: H

86 P41/A1 DIG. (AC3) MUTE O C

87 P40/A0 ERR MUTE_ O C

88 P50/_RD DH IN O C

89 P51/_WR DH OUT O C

90 P52/_HWR ROM_RES2 O C

91 Vss Vss

92 PA0/AN0 96K DET I

93 PA1/AN1 DHERR I

94 PA2/AN2 I

95 PA3/AN3/_ADTRG Not used (Pull down)

96 PA4/AN4 I

97 PA5/AN5 I

98 PA6/AN6 I

99 PA7/AN7 MODE-0-SUB I

100 VREFH VREFH

Note: Pin No. : Terminal number of microcomputer.

3

Name Symbol I/O Type Det Op Res Ini Function



2




5

1





o

1

9

5

“I” = Input port
“O” = Output port

“C” = CMOS output
“N” = NMOS open drain output
“P” = PMOS open drain output

“Iu” = Inner microcomputer pull up
“Id” = Inner microcomputer pull down
“Eu” = External microcomputer pull up
“Ed” = External microcomputer pull down

“H” = Outputs High Level at reset

c

“L” = Outputs Low Level at reset
“Z” = Becomes High impedance mode at reset

8

3

6

Port Name : The name entered in the data sheet of microcomputer.
Symbol : Symbolized interface function.
I/O : Input or out of part.

Type : Composition of port in case of output port.

Op : Pull up/Pull down selection information.

Det : Indicates judging state of input port. Level detection is “LV”; Edge detection is “Ed”; Detection by both shifting is “E&L”; Serial data

Res : State at reset.

detection is “S” (Serial data output is also “S”).

.

Ini : Initial output state.
Function : Function and logical level explanation of signals to be interface.

4















E↑&L


Lv



Lv



Lv






Lv










Lv Eu Z









0















Lv



Lv



Lv



Lv



Lv



Lv



Lv

m

Z L Digital input MUTE control output (same control as SELCK)

9

Z L DSP comm. terminal (ADSP21061L:D16)

Z L DSP comm. terminal (ADSP21061L:D17)

Z L DSP comm. terminal (ADSP21061L:D18)

Z L DSP comm. terminal (ADSP21061L:D19)

Z L DSP comm. terminal (ADSP21061L:D20)

Z L DSP comm. terminal (ADSP21061L:D21)

Z L DSP comm. terminal (ADSP21061L:D22)

Z L DSP comm. terminal (ADSP21061L:D23)

GND

+5V

ZL

Z L DSP1 comm. control terminal (H: DATA WRITE)

ZL

Z L DSP2 comm. control terminal (H: DATA WRITE)





Z L ADC/DIR data/clock switching control terminal (L: ADC)

Z L DIR control terminal (LC89055Q), control chip enable output



Od L H DAC control terminal (L: Power down,↑: Reset, H: Normal)

Z L DIGITAL power ON/OFF switching

Od Z L

ZL

Od L L Demodulator reset output (L: Reset)

Od L L Demodulator osc. control output (H: Osc.)

Z L IV AMP GAIN switching control output (L: Sub-woofer on)

Eu H H A/D control terminal (L: Reset)

8

Od L H DAC control terminal (L: Power down,↑: Reset, H: Normal)

Od Z L Digital mute control output (L: AC-3 or DTS decode possible)

Od L L Pop noise preventive mute control output

Z L For 1394 (fixed to L)

Z L For 1394 (fixed to L)

Od Memory reset for DSP2










DSP1 (ADSP21061L-A:IRQ 1_) host interface interrupt req. output, L: REQ

DSP2 (ADSP21061L-A:IRQ 1_) host interface interrupt req. output, L: REQ

DSP2 host interface comm. respond input (L: OK)

DSP busy check flag (ADSP21061L-B:FLAG 2B) input, L: Normal

Special flag for ROM update (ADSP21061L-A:FLAG 3A)

DSP busy check flag (ADSP21061L-A:FLAG 2A) input, L: Normal

Special flag for ROM update (ADSP21061L-A:FLAG 3B)






Single Chip/Single Boot switching input (H & Reset: Single Chip Mode)

2

9

GND

96k signal detect input, H: 96k

DHIVA board error input (fixed to L)

Not used (Pull down)

Not used (Pull down)

Not used (Pull down)

Not used (Pull down)

FLASH ROM rewrite mode input

AD ref. +5V

8

4

9

2

8

2

9

9

9

TEL [phone] QQ 376315150 892498299

9

15

75

76

100

1

25

26

50

51

AVR-4802/AVC-A11SR

TMP95FY64F (IC802)

Q

Q

3

7

6

TMP95FY64F Terminal Function

Pin.
No.

TEL [phone] QQ 376315150 892498299

1 VREFL VREFL

2 AVss AVss

3 AVcc AVcc

4 DAOUT0 DAOUT0 O

5 DAOUT1 DAOUT1 O

6 _NMI _NMI I

7 P53/_BUSRQ ACK O C

8 P54/_BUSAK REQ I

9 P55/_WAIT PLFL DATA O C

10 P56/INT0 PROTECT I

11 P57/SCLK2/_CTS2 PLFL CLK O C

12 P80/TxD0 PLL STB O C

13 P81/RxD0 ERROR LED O C

14 P82/SCLK0/_CTS0

15 P83/TxD1 MOSI O C

16 P84/RxD1 MISO I

17 P85/SCLK1/_CTS1 CLK I/O (C)

18 P86/TxD2 TxD O C

19 P87/RxD2 RxD I

20 P60/_CS0 FUNC/TONE CLK O C

21 P61/_CS1 FUNC/TONE DATA O C

22 P62/_CS2 ST/MONO O C

23 P63/_CS3 STANDBY O C

24 CLK CLK O C

25 Vcc Vcc

26 Vss Vss

27 X1 X1 I

28 X2 X2 O

29 _EA _EA I

30 _RESET _RESET I

31 P70/TI0/INT1 VIDEO POWER O C

32 P71/TO1 DIGITAL POWER O C

33 P72/TO3/INT2 (VKK POWER) O

34 P73/TI4/INT3 SEL A (M) I

35 P74/TO5 SEL B (M) I

36 P75/TO7/INT4 (FAN CONTROL) O C

37 P90/TI8/INT5 B.DOWN I

38 P91/TI9/INT6 STEREO I

39 P92/TO8 TUNED I

40 P93/TO9 S MONI.DET I

41 P94/TIA/INT7 REMOCON I

42 P95/TIB/INT8 S SIG.DET I

43 P96/TOA/TOB SYNC.DET I

44 Vcc Vcc

45 P00/D0 POWER O C

46 P01/D1 V.EXP OE O C

47 P02/D2 V.EXP CLK O C

48 P03/D3 V.EXP DATA O C

49 P04/D4 V.EXP STB O C

50 P05/D5 SP.EXP OE O C

51 P06/D6 SP.EXP CLK O C

52 P07/D7 SP.EXP DATA O C

Name Symbol I/O Type Det Op Res Ini Function









T

E

w

MULTI ROOM POWER

L

w

1

w





Lv Eu Z





E↑&L Ed Z





OC

3











Lv




9

4



Lv












Lv Iu L







Lv Eu Z



Lv Eu Z




E↓&L Eu Z



Lv Eu Z



Lv Eu Z



Lv Eu Z

E↑

&L Ed Z



Lv Eu Z



Lv Eu Z











.







Z

Z L PLL & FL control terminal (LC72131 & LC7511NE)

Z L PLL & FL control terminal (LC72131 & LC7511NE)

Z L PLL control terminal (LC72131)

Ed Z H Not used

Z L Power amp control terminal for MULTI ROOM (H: ON)

Z L MAIN-SUB µcom comm. control terminal



Z

Z

Z L Data transfer terminal to external

2



Z

Z L Clock output for Function switching/Tone IC control

Z L Data output for Function switching/Tone IC control

Z L Stereo/Mono control signal (L: Stereo receive)

Ed Z H Standby LED drive output (H: Light)

Z L Video power ON/OFF switching (H: ON)

Z L Digital power ON/OFF switching (H: ON)

Z L Not used (-VKK power ON/OFF switching)

Z L Not used (Fan control for power Tr)

Z H Power relay control output (H: ON)

Z L Port expander control output for video circuit (TC4094B)

Z L Port expander control output for video circuit (TC4094B)

Z L Port expander control output for video circuit (TC4094B)

Z L Port expander control output for video circuit (TC4094B)

Z L Port expander control output for speaker output (TC4094B)

Z L Port expander control output for speaker output (TC4094B)

Z L Port expander control output for speaker output (TC4094B)

6

i

1

5

a

3

A/D ref. GND

A/D GND

AD +5V

No connection

No connection

Not used (fixed to H)



MAIN-SUB µcom comm. control terminal



MAIN-SUB µcom comm. control terminal



Protection detect input (H: Detected)



MAIN-SUB µcom comm. control terminal



MAIN-SUB µcom comm. control terminal

2

9



Data receive terminal from external

No connection

+5V

GND

X'tal connection

X'tal connection

Fixed to +5V



Reset input



Master VR turn detect input (Rotary encoder)



Master VR turn detect input (Rotary encoder)



Power down detect (L: Detected)



Stereo detect (L: Received)



Tune detect (L: Tuned)



S Monitor connection detect input (L: Connected)



Remote control signal input



S signal detect input (H: Signal input)



Sync. detect input (H: External sync.)

+5V

x

5

1

3

o

1

y

5

u

0

1

Q

Q

6

Pin.

No.

53 P10/D8 SP.EXP STB O C

54 P11/D9 A.EXP OE O C

55 P12/D10 A.EXP CLK O C

56 P13/D11 A.EXP DATA O C

57 P14/D12 A.EXP STB O C

58 P15/D13 MAIN/SUB O C

59 P16/D14 RESET2 O C

60 P17/D15 E.VOL STBB O C

61 AM8/_16 AM8/_16

62 Vss Vss

63 Vcc Vcc

64 P27/A23 STB EXP OE O C

65 P26/A22 STB EXP CLK O C

66 P25/A21 STB EXP DATA O C

67 P24/A20 STB EXP STB O C

68 P23/A19 LED CLK O C

69 P22/A18 LED DATA O C

70 P21/A17 LED LE O C

71 P20/A16 LED OE O C

72 P37/A15 SEL H (T) I

73 P36/A14 SEL G (T) I

74 P35/A13 SEL F (B) I

75 P34/A12 SEL E (B) I

76 P33/A11 SEL D (I) I

77 P32/A10 SEL C (I) I

78 P31/A9 H/P DET I

79 P30/_BOOT/A8 _BOOT I

80 P47/A7 E.VOL CLK O C

81 P46/A6 E.VOL DATA O C

82 P45/A5 E.VOL STBA O C

83 P44/A4 E.VOL MULTI STB O C

7

3

84 P43/A3 O C

85 P42/A2 OSD RST O C

86 P41/A1 OSD STB O C

87 P40/A0 OSD DATA O C

88 P50/_RD OSD CLK O C

89 P51/_WR FL CE O C

90 P52/_HWR FL RST O C

91 Vss Vss

92 PA0/AN0 KEY1 I

93 PA1/AN1 KEY2 I

94 PA2/AN2 KEY3 I

95 PA3/AN3/_ADTRG KEY4 I

96 PA4/AN4 SBL LEVEL I

97 PA5/AN5 SBR LEVEL I

98 PA6/AN6 MODE I

99 PA7/AN7 MODE0 I

100 VREFH VREFH

Note: Pin No. : Terminal number of microcomputer.

3

Name Symbol I/O Type Det Op Res Ini Function

2





5

1





o

1

9

5

“I” = Input port
“O” = Output port

“C” = CMOS output
“N” = NMOS open drain output
“P” = PMOS open drain output

“Iu” = Inner microcomputer pull up
“Id” = Inner microcomputer pull down
“Eu” = External microcomputer pull up
“Ed” = External microcomputer pull down

c

“H” = Outputs High Level at reset
“L” = Outputs Low Level at reset
“Z” = Becomes High impedance mode at reset

8

3

6

Port Name : The name entered in the data sheet of microcomputer.
Symbol : Symbolized interface function.
I/O : Input or out of part.

Type : Composition of port in case of output port.

Op : Pull up/Pull down selection information.

Det : Indicates judging state of input port. Level detection is “LV”; Edge detection is “Ed”; Detection by both shifting is “E&L”; Serial data

Res : State at reset.

Ini : Initial output state.
Function : Function and logical level explanation of signals to be interface.

detection is “S” (Serial data output is also “S”).

.



4









I











Eu Z L LED driver control output (M66313)





Lv Eu Z



Lv Eu Z



Lv Eu Z



Lv Eu Z



Lv Eu Z



Lv Eu Z



Lv Eu Z



Lv Eu Z






0











Lv Eu Z



Lv Eu Z



Lv Eu Z



Lv Eu Z



Lv Eu Z



Lv Eu Z



Lv Eu Z



Lv Eu Z

m

Z L Port expander control output for speaker output (TC4094B)

9

Z L Port expander control output for audio mute and relay control (TC4094B)

Z L Port expander control output for audio mute and relay control (TC4094B)

Z L Port expander control output for audio mute and relay control (TC4094B)

Z L Port expander control output for audio mute and relay control (TC4094B)

Z L RS232C/MAIN-SUB µcom input switching

Z L SUB µcom reset output

Z L E VR control output (TC9459)

Fixed to +5V

GND

+5V

Z H Port expander control output for audio circuit IC strobe (TC4094B)

Z L Port expander control output for audio circuit IC strobe (TC4094B)

Z L Port expander control output for audio circuit IC strobe (TC4094B)

Z H Port expander control output for audio circuit IC strobe (TC4094B)

Z L LED driver control output (M66313)

Z L LED driver control output (M66313)

Z H LED driver control output (M66313)



Treble VR turn detect input (Rotary encoder)



Treble VR turn detect input (Rotary encoder)



Bass VR turn detect input (Rotary encoder)



Bass VR turn detect input (Rotary encoder)



Input selector turn detect input (Rotary encoder)



Input selector turn detect input (Rotary encoder)



H/P detect input (H: Detected)



Single Chip/Single Boot switching input (H & Reset: Single Chip Mode)

Z L E VR control output (TC9459)

Z L E VR control output (TC9459)

Z L E VR control output (TC9459)

Z L E VR control output for MULTI ROOM (TC9459)

9

8

Z L No connection

Z H OSD control terminal (M35015)

Z H OSD control terminal (M35015)

Z L OSD control terminal (M35015)

Z H OSD control terminal (M35015)

Z H FL control terminal (LC75711NE)

Z H FL control terminal (LC75711NE)

GND



Button input 1



Button input 2



Button input 3



Button input 4



SBL channel signal level detect, set to A/D input



SBR channel signal level detect, set to A/D input



Destination switching input



FLASH ROM rewrite mode input

AD ref. +5V

2

8

4

9

2

8

2

9

9

9

9

TEL [phone] QQ 376315150 892498299

16

LC89055W-RA8 (IC111)

AVR-4802/AVC-A11SR

7

Q

Q

TEL [phone] QQ 376315150 892498299

TEL

w

3

LC89055W-RA8 Terminal Function

Pin

No.

1 DISEL I Data input terminal (select input pin of DIN0, DIN1)
2 DOUT O Input bi-phase data through output terminal
3 DIN0 I Amp built-in coaxial/optical input correspond data input terminal
4 DIN1 I Amp built-in coaxial/optical input correspond data input terminal
5 DIN2 I Optical input correspond data input terminal
6 DGND Digital GND
7 DVDD Digital power supply
8 R I VCO gain control input terminal

9 VIN I VCO free-run frequency setting input terminal
10 LPF O PLL loop filter setting terminal
11 AVDD Analog power supply
12 AGND Analog GND
13 CKOUT O Clock output terminal (256fs, 384fs, 512fs, X′tal osc., VCO free-run osc.)
14 BCK O 64fs clock output terminal
15 LRCK O fs clock output terminal (L: Rch, H: Lch, I2S: Reverse)
16 DATAO O Data output terminal
17 XSTATE O Input data detecting result output terminal
18 DGND Digital GND
19 DVDD Digital power supply
20 XMCK O X′tal osc. clock output terminal (24.576MHz or 12.288MHz)
21 XOUT O X′tal osc. connection output terminal
22 XIN I X′tal osc. connection output terminal
23 EMPHA O Emphasis information output terminal of channel status
24 AUDIO O Bit1 output terminal of channel status
25 CSFLAG O Top 40bit revise flag output terminal of channel status
26 F0/P0/C0 O Input fs cal. sig. out / data type out / input word inf. output terminal
27 F1/P1/C1 O Input fs cal. sig. out / data type out / input word inf. output terminal
28 F2/P2/C2 O Input fs cal. sig. out / data type out / input word inf. output terminal
29 VF/P3/C3 O Validity flag out / data type out / input word inf. output terminal
30 DVDD Digital power supply
31 DGND Digital GND
32 AUTO O Non PCM burst data transfer detect sig. output terminal
33 BPSYNC O Non PCM burst data preamble Pa, Pb, Pc, Pd sync sig. output terminal
34 ERROR O PLL lock error, data error flag output terminal
35 DO O CPU I/F read data output terminal
36 DI I CPU I/F write data input terminal
37 CE I CPU I/F chip enable input terminal
38 CL I CPU I/F clock input terminal
39 XSEL I Frequency select input pin of XIN X′tal osc. (24.576MHz or 12.288MHz)
40 MODE0 I Mode setting input terminal
41 MODE1 I Mode setting input terminal
42 DGND Digital GND
43 DVDD Digital power supply
44 DOSEL0 I Data output format select input terminal
45 DOSEL1 I Data output format select input terminal

w

46 CKSEL0 I Output clock select input terminal
47 CKSEL1 I Output clock select input terminal
48 XMODE I Reset input terminal

* For latch-up countermeasure, set digital (DVDD) and analog (AVDD) power on/off in the same timing.

Pin Name

13942296513

w

6

.

xia

3

I/O

1

5

o

1

y

5

u

0

Q

Q

1

3

6

7

3

8

Function

3

6

.

9

1

1

5

c

2

5

o

4

0

m

9

8

9

8

2

4

2

9

8

9

2

9

9

TEL [phone] QQ 376315150 892498299

9

17

1

2

3

4

5

6

7

8

16

15

14

13

9

10

11

12

20

19

18

17

V

DD1

VERT*

HOR*

OSCIN

OSCOUT

P3

P2

P1

P0

Vss

OSC1

OSC2

CS

SCK

SIN

AC

V

DD2

CVIDEO

LECHA

CVIN

3

4

5

20

6

11

7

1

2

19 18

17

16

8

9

10

12

13

14
15

CS

SCK

SIN

V

DD1

AC

V

SS

V

DD2

OSCI

OSC2

VERT*

HOR*

INPUT

CONTROL

CIRCUIT

DATA

CONTROL

CIRCUIT

ADDRESS

CONTROL

CIRCUIT

INDICATION

OSCILLATOR

TIMING

GENERATOR

INDICATION

CONTROL
REGISTER

INDICATION RAM

INDICATION CHARACTER ROM

BLINKING CIRCUIT

SYNC SIGNAL

SWITCHING CIRCUIT

H COUNTER

INDICATION LOCATION

DETECTION CIRCUIT

READ OUT ADDRESS

CONTROL CIRCUIT

INDICATION

CONTROL CIRCUIT

SHIFT REGISTER

SYNC SIGNAL DIS-

CRIMINATING CIRCUIT

OSC CIRCUIT

FOR SYNC SIGNAL

GENERATION

TIMING

GENERATOR

NTSC

VIDEO OUTPUT

CIRCUIT

OSCIN

OSCOUT

CVIDEO

LECHA

CVIN

P0
P1
P2
P3

M35015-210SP (IC416)

AVR-4802/AVC-A11SR

Q

Q

3

7

6

3

1

5

1

5

0

TEL [phone] QQ 376315150 892498299

M35015-210SP Terminal Function

Pin No. Symbol Name I/O Function

1 OSC1 Osc. circuit ext. I External terminal for indication oscillator circuit. Standard OSC. freq. is approx. 7MHz.

2 OSC2 terminal. O With this OSC. freq., decides horizontal indicatin and character width.

Chip select terminal and turns to “L” when transfer serial data.
Hysteresis input. Pull up resistor is built-in.
Takes in serial data of SIN at SCK rise when CS terminal is in “L”.
Hysteresis input. Pull up rersist is built-in.
Serial input of register for indication control and data, and address for indication data
memory. Hysteresis input. Pull up rersistor is built-in.
Resets internal circuit of IC at “L” mode.
Hysteresi input. Pull up resistor is built-in.



Power supply terminal of analog system. Connect to +5V.

Output terminal of combined video signal. Outputs 2Vp-p combined signal. Character

O

output, etc. Overlap CVIN signal and outputs at superimpose.
Input terminal deciding character output level in combined video signal. color of character

I

is white.
Input terminal of external combined video signal.

I

Character output etc. overlap this external combined video signal.



Ground terminal. Connect to GND.

General output or character background signal BL NK1* output is switchable.
Polarity can be selected at ROM mask.
General output or character background signal CO1* output is switchable.
Polarity can be selected at ROM mask.
General output or character background signal BLNK2* output is switchable.
Polarity can be selected at ROM mask.
General output or character background signal CO2* output is switchable.
Polarity can be selected at ROM mask.

Inputs horizontal sync signal.

I

Hysteresis input.

I Input vertical sync signal. Hysteresis input. Polarity can be selected at ROM mask.

o

y

u



Power supply terminal of digital system. Connect to +5V.

Q

Q

1

6

TEL

w

3 CS Chip select input I

13942296513

4 SCK Serial clock input I

5 SIN Serial data input I

6 AC Auto-clear input I

DD2

7V

8CVIDEO

9 LECHA

10 CVIN

11 Vss Ground

12 P0 Output port p0 O

13 P1 Output port P1 O

14 P2 Output port P2 O

15 P3 Output port P3 O

16 OSCOUT O Terminal for external use of sync signal OSC. circuit. Use the freq.: 14.32MHz at NTSC

17 OSCIN I system, 17.73MHz at PAL. system, 14.30MHz at MPAL system.

18 HOR*

19 VERT*

w

w

DD1

20 V

Power supply

Combined
video output
Character level
input
Combined video
input

Ext. terminal
for sync sig.
OSC. Circuit

Horizontal sync
signal
Vertical sync

.

signal
Power supply

xia

6

7

3

3

8

3

.

9

1

2

5

1

5

c

o

4

0

m

9

8

9

2

8

4

2

9

8

9

2

9

9

TEL [phone] QQ 376315150 892498299

9

18

LC75721E (IC102)

AVR-4802/AVC-A11SR

7

Q

Q

TEL [phone] QQ 376315150 892498299

3

49

DI
CL
CE

RES

DD

V

OSCI

OSCO

Vss

TEST

FL

V

G1
G2
G3
G4
G5
G6

64

AD1854 (IC301, 303, 305, 307)

6

G7 G8G9

G10

G11

48 33

AM 1

AM 2

AM 3

AM 4

AM 5

3

AA8/G12

AA7/G13

AM 6

AM 7

AA6/G14

AM 8

AA5/G15

AM 9

1

AA4/G16

AA3

AM 10

AM 11

AA2

AM 12

AA1

AM 13

5

AM35

AM34

AM 14

AM 15

AM33

161

AM 16

1

32

17

AM 17
AM 18
AM 19
AM 20
AM 21
AM 22
AM 23
AM 24
AM 25
AM 26
AM 27
AM 28
AM 29
AM 30
AM 31
AM 32

5

Terminal Function

0

Symbol Function

VDD Power terminal +5V
Vss Power terminal GND
VFL Power terminal FL drive

DI DI: Data
CL CL: Clock
CE CE: Chip enable
OSCI
OSCO
RES System reset terminal
AM1 ~ AM35
AA1 ~ AA3
AA4/G16
AA5/G15
AA6/G14
AA7/G13
AA8/G12
G1 ~ G11 Grid output terminal
TEST LSI test terminal

4

2

9

8

Serial data transfer terminal

External CR connecting terminal

Anode output terminal

Anode/Grid output terminal

9

8

2

9

9

TEL [phone] QQ 376315150 892498299

TEL

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w

13942296513

DGND

MCLK

CLATCH

CCLK

CDATA

384/256

X2MCLK

ZEROR

DEEMP

96/48

AGND

OUTR+

OUTR

FILTR

1

2

3

4

5

6

7

8

9

10

11

12

-

13

14

w

.

28

27

26

25

24

23

22

21

20

19

18

17

16

15

xia

DVDD

SDATA

BCLK

L/RCLK

PD/RST

MUTE

ZEROL

IDPM0

IDPM1

FILTB

AVDD

OUTL+

OUTL

AGND

-

Terminal Function

Q

Q

No.

11,15 AGND I Analog Ground

o

y

Name Function

1 DGND I Digital Ground

2 MCLK I Master Clock Input

3 CLATCH I Latch input for control data

4 CCLK I Control clock input for control data

5 CDATA I Serial control input

6 384/256 I Selects the master clock mode

7 X2MCLK I Selects internal clock doubler (LO) or internal clock=MCLK (HI)

8 ZEROR O Right Channel Zero Flag Output

9 DEEMP I De-Emphasis

10 96/48 I Selects 48kHz (LO) or 96kHz Sample Frequency Control

12 OUTR+ O Right Channel Positive line level analog output

13 OUTR- O Right Channel Negative line level analog output

14 FILTR O Voltage Reference Filter Capacitor Connection

16 OUTL- O Left Channel Negative line level analog output

17 OUTL+ O Left Channel Positive line level analog output

18 AVDD I Analog Power supply

19 FILTB O Filter Capacitor connection

20 IDPM1 I Input serial data port mode control one

21 IDPM0 I Input serial data port mode control zero

22 ZEROL O Left Channel Zero Flag output

23 MUTE I Mute. Assert HI to mute both stereo analog output

24 PD/RST I Power-Down/Reset

25 L/R CLK I Left/Right clock input for input data

26 BCLK I Bit clock input for input data

27 SDATA I Serial input

28 DVDD I Digital Power Supply

u

1

I/O

6

3

6

7

3

3

.

1

5

c

1

0

5

o

m

8

9

2

4

9

8

2

9

9

19

A

AVR-4802/AVC-A11SR

NJM2229S (IC417)

1

5

0

1

6

16

14

13

TC9274N-011 (IC114, 115)

Q

BU2090F (IC103)

Q

1Vss

2DATA

3CLOCK

4LCK

5Q0

6Q1

7Q2

8Q3

9Q4

7

3

12-bit SHIFT RESISTER

12-bit STRAGE RESISTER

OUTPUT BUFFER (OPEN DRAIN)

CONTROL CIRCUIT

C9274N-017 (IC113)

6

3

DD

18

V

1

17

OE

16

Q11

15

Q10

14

Q9

13

Q8

12

Q7

11

Q6

10

Q5

5

TEL [phone] QQ 376315150 892498299

21

23

22

21

20

Q

Q

DD

V

16

1

STB

DATA

CK

GND

27

26

25

24

23

22

21

20

19

18

17

16

15

42

NC

R-OUT

NC

R-IN

R-LD1

R-LD2

R-A-GND

NC

CS2

NC

NC

STB

DATA

GND

7

13 bit latch circuit

6

13 bit latch circuit

V

3

Enable

GND

Level shift

1

DD

V

7

8

3

Code
detect
circuit

42

TC9459N (IC119, 302, 304, 306, 308)

TEL

1

2

3

4

5

6

7

8

9

10

11

12

13

14

S1S2S3S4S5S6S7S8S9

1

41

V

DD

42

V

SS

1

234

S1S2S3S4S5S6S7S8S9

35

36

383940

37

18 bit Latch Circuit (Rch)

(Lch) Same as Rch

89

56

7

34

33

10 11

13942296513

NC

L-O U T

L-LD1

L-LD2

L-A-GN D

L-IN

CS1

GND

2

3

Ω

/

50k

TEP

91S

NC

4

VR

5

6

7

8

9

NC

10

11

12

NC

13

14

CK

28

27

26

25

24

23

22

21

20

19

18

17

16

15

C9184AP (IC401, 403)

16

DD

V

15

BASS+

14

BASS

13

COM

12

TREBLE

11

TREBLE+

10

STB

9

DATA

xia

TREBLE−

TREBLE+

w

w

Vss

BASS+
BASS−

COM

GND

CK

1

2

3

4

5

6

7

8

w

.

S10

S11

S12

29

32

3031

12 13 14

S10

S11

S12

SS

V

1

L-ch7 to 91decoder

L-ch latch circuit

Shift register (24Bit)

Level shift circuit

BASS+

−

BASS

−

TREBLE

o

TREBLE+

S13

S13

COM

S14

28

15

S14

−

−

S15

S16

S17

26

24

25

27

16

17 18 19

S15

S16

S17

DD

V

28

Same

R-ch7 to 91decoder

R-ch latch circuit

2

Ladder resister

3

4

5

y

6

Ladder resister

S18

S18

as L-ch

Vss

1

u

L e v e l S h ift + S h ift R e g is te r C irc u it

Analog switch

Analog switch

15

7

8

Sync Sepa

Sync Det

8

S1S2S3S4S5S6S7S8S9

41

42

SS

1

234

S1S2S3S4S5S6S7S8S9

9

1211

383940

56

21

37

2

4

36

Phase

Det

35

34

18 bit Latch Circuit (Rch)

(Lch) Same as Rch

89

7

PQ15RW11 (IC202)

0

5

1

5

1

3

6

1

Vin

4

3

2

1

MC74HC4053N (IC415)

Analog switch

c

Analog switch

16

15

14

13

12

11
10

9

Ladder resister

o

Ladder resister

Vcc
Y
X1

X
X0

C
A
B

V

CK

Y1
Y0
Z1

Z

Z0

EE

9

20 bit Shift register circuit

DATA

1

2

3

4

5

6

7

8

STB

10

.

4

32

33

10 11

9

S10

S11

12 13 14

S10

S11

8

Vsync Sepa

32fH
VCO

23

S12

S13

29

3031

S12

S13

2

9

S p e c if ic IC

3

GND

9

8

1

28

15

S14

S14

4

S15

27

16

S15

2

S16

26

25

17 18 19

S16

8

9

10

1/32

S17

S17

24

2

4

9

S18

S18

2

Vo

Vadj

Truth Table

Control Inputs
Select
Enable C B A
L L L L Z0 Y0 X0
L L L H Z0 Y0 X1
L L H L Z0 Y1 X0
L L H H Z0 Y1 X1
L H L L Z1 Y0 X0
L H L H Z1 Y0 X1
L H H L Z1 Y1 X0
L H H H Z1 Y1 X1
H X X X None

BASS+

15

14

−

BASS

COM

13

−

12

TREBLE

O N S w i t c h e s

X = D o n 't C a re

m

11

TREBLE+

L e v e l S h ift + S h ift R e g is te r C irc u it

9

9

5

16

23

22

21

20

9

TEL [phone] QQ 376315150 892498299

STB

DAT

CK

GND

20

AVR-4802/AVC-A11SR

µPD4721GS-GJG (IC501)

5.5 k

5.5 k

6

Ω

300

Ω

300

Ω

Ω

TST

16

TTL

15

DIF

14

13

PDN

SCLK

12

MCLK

11

10

LR C K

9

SDTO

20

19

18

17

16

15

14

13

12

11

C4+

GND

3

C4-

Vss

STBY

V

CHA

D

OUT

1

D

OUT

2

IN

R

1

R

IN

2

1

1

DD

V

C1+

2

7

Q

Q

TEL [phone] QQ 376315150 892498299

3

Vcc

3

C1-

4

C5+

5

6

C5-

IN

1

D

7

IN

2

D

8

OUT

1

R

9

OUT

2

R

10

AK5353 (IC114)

AINR

1

AINL

2

VREF

3

VCO M

4

5

AGN D

6

VA

7

VD

8

DGND

SN74LV541APW (IC518, 522, 803) SN74AHCT541PW (IC514)

1

G1

5

1

5

A1

2

0

3

A2

4

A3

5

A4

6

A5

7

A6

8

A7

9

A8

10

GND

Terminal Function

No. Name I/O Function

1 AINR I Rch analog input pin
2 AINL I Lch analog input pin
3 VREF O Ref. V out pin
4 VCOM O Common V out pin
5 AGND  Analog GND pin
6VA  Analog power pin, +2.7~+5.5
7VD  Digital power pin, +2.7~+5.5V
8 DGND  Digital GND pin

9 SDTO O Serial data out pin, 2’s complement, MSB first out, at power down: L
10 LRCK I L/Rch clock pin
11 MCLK I Master clock input pin
12 SCLK I Serial data clock input pin, A/D data out at SCLK falling edge
13 PDN I Power down pin, L: Power down mode
14 DIF I Serial interface format pin (L: Firward, H: I2S)
15 TTL I Digital input level select pin, L: CMOS level, H: TTL level
16 TST I Test pin (internal pull-down)

20

Vcc

19

G2

Y1

18

Y2

17

Y3

16

Y4

15

Y5

14

Y6

13

Y7

12

Y8

11

8

9

2

G1

4

A1

A2

A3

A4

A5

A6

A7

A8

GND

1

2

3

4

5

6

7

8

9

10

9

8

20

Vcc

2

19

G2

Y1

18

17

Y2

16

Y3

Y4

15

14

Y5

13

Y6

12

Y7

11

Y8

9

9

TEL [phone] QQ 376315150 892498299

BA4510F (IC115)
TK15420MTL (IC601~603, 606, 701~706, 713)

TEL

BA15218F (IC116, 118, 309~313)
NJM2068MD (IC101, 104~112, 117, 120, 201~204,
301, 302, 304, 306, 308, 402, 404, 471, 506~509)
NJM4556AD (IC502)
NJM5532MD (IC301, 303, 305, 307)

SN74AHC1G04DBV (IC109)

BA033T (IC526, 527)
KIA7806API (IC203)
KIA7812API (IC701)
KIA7820API (IC704, 709, 710)
KIA7805API (IC309, 310, 702, 705)
KIA7815API (IC707)

KIA7905PI (IC703, 706)
KIA7915PI (IC708)

w

13942296513

54

TOP VIEW

13

w

w

.

xia

Q

CXA1511M (IC502)

IN

1

C1

2

3

C2

GND

4

Output
GND
Input

o

y

u

Output
Input
GND

Q

Vcc

8

OUT

7

NC

6

fo

5

1

1

3

6

7

3

H ead
Am p

1

IN

BA08ST (IC205)

6

+



ABLC

ABLC

2

C1 C2 GND fo NC OUTVcc

FRONT

VIEW

1

45

23

3

.

5

A O UTPUT

A INPU T

A +INPUT

Lim iter
Am p

1. CTL

2. Vcc

3. GND

4. OUT

5. N.C.

c

2

9

8

0

5

1

2

D e te c to r &
C om parator

3

V

8

B O UTPUT

7

B INPU T

6

B +INPUT

5

4

3

1

1

1

2

3

V

4

BPF
BEF

HG-8002JA33MHZPCCX
(X'tal Oscillator)
(IC510)

4

o

m

4

Integrator

5

2

9

6

8

H ysteresis
C om parator

9

9

2

8

7

1. OE or ST

2. GND

3. OUT

4. V

DD

21

AVR-4802/AVC-A11SR

74VHC123AMTCX (IC106)

Q

Q

2Rext/Cext

1A

1B

1CLR

1Q

2Q

2Cex1

GND

1

3

2

3

4

5

5

6

7

8

7

CLR
QQ

QQ

6

CLR

Vcc

16

3

1Rex/Cext

15

1Cext

14

13

1Q

2Q

12

2CLR

11

2B

10

9

2A

74LVX157MTC (IC107)

LECT

1A

1B

1Y

2A

2B

2Y

GND

1

SEL

2

3

4

5

5

6

7

8

TEL [phone] QQ 376315150 892498299

SE

SN74LV14APW
(IC110, 124)

16

Vcc

15

ST

14

4A

13

4B

12

4Y

11

3A

10

3B

9

3Y

SN74LV00APW
(IC108, 511, 513)

SN74LV4040APW (IC112, 512)

QL

1

5

1

QF

QE

QG

Outputs

QD

QC

QB

GND

1

5

2

3

4

5

6

7

8

QF

QE

QG

QD

QC

QB

0

QL

CLR

QA

BU4094BCF (IC418~420, 501)

1

STROBE

2

DATA

3

CLOCK

4

Q1

5

Q2

6

Q3

7

Q4

8

V

SS

SN74LV02APW
(IC515, 519)

CLK

Vcc

16

QK

15

QK

14

QJ

QJ

13

QH

QH

QI

Outputs

QI

12

CLR

11

10

CLK

Output

9

QA

16

VDD

15

OE

14

Q5

13

Q6

12

Q7

Q8

11

10

Q'

S

Q

S

9

BU4051BCF (IC604, 605, 709~712)

8

9

2

Channel

IN/OUT

Common
OUT/IN

INHIBIT

X

X

X

X

X

V

EE

Vss

4

1

4

6

2

3

7

4

5

5

6

7

8

9

6

OUT/IN

7

5

INH

V

EE

4

C

8

2

1

0

3

A

B

16

15

14

13

12

11

10

9

DD

V

2

X

2

X

1

X

0

X

3

A

B

C

BU4066BCF (IC607, 608, 707, 708, 714)

1

IN 1

2

OUT 1

3

OUT 2

4

IN 2

CONTROL 3

V

5

6

SS

7

CONTROL 2

SN74LV125APW
(IC805)

IN

IN

OUT

IN

14

V

DD

C

OUT

13

CONTROL 1

12

CONTROL 4

OUT

C

11

IN 4

C

10

OUT 4

IN

9

OUT

OUT 3

8

IN 3

C

SN74LV126APW
(IC806)

Channel

9

IN/OUT

9

TEL [phone] QQ 376315150 892498299

1A

1Y

2A

TEL

2Y

3A

3Y

GND

1

2

3

13942296513

4

5

6

7

Vcc

14

13

6A

6Y

12

5A

11

10

5Y

9

4A

8

4Y

GND

1

1A

1B

2

1Y

3

2A

4

2B

5

2Y

6

7

Vcc

14

4B

13

4A

12

4Y

11

3B

10

9

3A

3Y

8

SN74LV08APW (IC125)
SN74LVU04APW (IC101)
SN74HC151APW (IC102~104)
SN74HC153APW (IC105)
SN74LV86APW (IC523)

IC PROTECTOR OPTICAL

ICP-N15T (IC204)

INPUT
GP1F37R1 (IC116, 118, 119, 120, 121)

1

9

2

GND

4

3

IC

1A

1Y

4

2C

2A

2Y

OUT

V

DD

2

3

4

5

6

7

9

8

2

9

14

Vcc

13

4C

12

4A

9

11

4Y

10

3C

9

3A

8

3Y

1

3

1

GND

IC

2

1A

1Y

3

1

5

4

2C

2A

5

6

2Y

7

5

0

14

Vcc

13

4C

12

4A

8

11

4Y

10

3C

9

3A

8

3Y

SG-8002DCPT (12.287MHz)
(IC113)

OE

1

2

4

1

Vss

2

1

1Y

1A

2

1B

3

Q

Q

2Y

4

2A

5

6

2B

7

GND

1

2

3

4

5

6

7

14

13

12

11

10

3

9

8

14

Vcc

13

4Y

4B

12

6

7

4A

11

3Y

10

3B

9

8

3A

OUTPUT
GP1F38T2 (IC122, 123)

w

w

w

.

xia

1. Vcc

2

3

2. GND

3. Vout

6

o

y

u

1

1

1

3

3

2

.

c

o

1

2

m

LED

3

DRIVE

IC

1. Vin

2. Vcc

3. GND

2

1

3

22

Q

TRANSISTORS

2SC4495

7

Q

3

6

3

2SA1546 (L)
2SC4001 (M/L)

1

5

1

5

0

MN1715
MP1715

8

9

2

AVR-4802/AVC-A11SR

2SA970 (BL)
2SC3200BL

4

9

KTA1268
KTC2874B

8

2

9

9

E
C
B

TEL [phone] QQ 376315150 892498299

TEL

DTC114ES
DTC143ES
DTC144ES

B
C

13942296513

E

DTA114TK
DTC114EK
DTC143EK
DTC323TK
KRA102S
KRA104S
KRC102S
KRC104S

B
C
E

2

3

1

1: GND/Emitter
2: Output/Collector
3: Input/Base

Q

PNP Type

DTA114TK

KRA102S

KRA104S

Q

R1

B

7

3

E
C
B

R1 R2

10kohm

10kohm

47kohm 47kohm

6

3

R2

10kohm

C

5

1

E

1

NPN Type

0

5

DTC114EK

DTC143EK

DTC323TK
KRC102S
KRC104S

B

8

R1 R2

10kohm

4.7kohm 4.7kohm

2.2kohm
10kohm 10kohm
47kohm 47kohm

R1

9

2

4

R2

10kohm

9

C

E

8

2

B
C
E

9

TEL [phone] QQ 376315150 892498299

9

w

w

2SA1020

B
C
E

2SA1037K (S/R)
2SA1505Y
2SC2412K (S)
2SD601A
KTC2875B

w

.

KTB778
KTD998

C

B

E

xia

o

BCE

y

2SA933S (S)
2SC1740S (S)

u

1

KTA1659 (A)
KTC4370

6

3

.

BCE

B
C
E

c

o

m

23

DIODES (LED Included)

AVR-4802/AVC-A11SR

Q

TEL [phone] QQ 376315150 892498299

1SS270A

Q

Navy Blue

KDS181 KDS184 KDS226

7

3

3

21

6

1SR35-400A

1

3

Green

Orange

21

3

5

1

5

S4VB20F

0

3

21

8

FCH20A15

9

HZS3A-1
HZS9A-1
HZS20-1
HZS36-1

2

4

2

8

9

3

123

2
1

Lake Blue (HZS series)
Black (MTZJ series)

9

9

TEL [phone] QQ 376315150 892498299

TEL

UDZ3.0B

13942296513

UDZ6.8B
UDZS5.6B
UDZS9.1B

Black

2

OTHERS



GP1U271X (Remote Control Sensor)
(IC101)

1

1

2

SEL1210S (Red)
SEL1410E (Green)

(Cathode)

Head
Amp

Q

Short

Q

Limiter
Amp

7

3

Long

(Anode)

BPF

6

1

3

Detector &
Comparator

0

5

1

5

SF0R1A42
(Thyristor)

Integrator

9

8

C
A
G

Hysteresis
Comparator

4

2

A

G

C

(Cathode)
(Anode)
(Gate)

9

8

2

9

9

w

w

V

OUT

Vcc

w

GND

.

xia

o

y

u

1

6

3

.

c

o

m

GND

Vcc

Vout

24

FL DISPLAY

AVR-4802/AVC-A11SR

Q

CM1690C (FL101)

Q

3

1

7

TUNED

RDS

CH

6

STEREO

AUTO

3

REC

MULTI

1

PHONO

VCR

5

TUNER

CD

1

−

−

1

2 −3

5

AUX

V.AUX

0

DVDMDVDP

TAPE

TV

1

−

−

2

TEL [phone] QQ 376315150 892498299

G16

TUNED

RDS

CH

Pin Assignment

PIN NO.

CONNECTION

PIN NO.

CONNECTION

TEL

PIN NO.

CONNECTION

G15

STEREO

AUTO

13942296513

G13

REC

MULTI

G14 G11 G8

12345

F1 F1 S1 S2 S3
21 22

S19 S20 S21 S22 S23 S24 S25 S26 S27 S28 S29 S30 S31 S32 S33 S34 S35 S36 S37 S38

41 42 43 44 45

G16 G15 G14 G13 G12 G11 G10 G9 G8 G7 G6 G5 G4 G3 G2 G1 F2 F2

G12

VCR

G10

CD

−

1

PHONO

23 24 25

G9

TUNER

−

2 −3

6

S4

26

46

G7

AUX

V.AUX

78910111213141516171819

S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 S15

27 28 29 30 31 32 33 34

47 48 49 50 51 52 53 54 55 56 57

G5 G2 G1

Q

G4

VDP

TAPE

3

7

G6

DVD

MD

Q

8

DBS

PRO LOGIC
DIGITAL

DIGITAL ANALOG

G3

DBS

TV

−

2

−

1

DIGITAL ANALOG

1

3

6

9

58

F2F1

PRO LOGIC
DIGITAL

1

5

4

2

35 36 37 38 39 40

8

0

5

8

9

S14

S38

S13

S1

S6

S11

S16

S21

S26

S31

4

2

9

F1,F2 : Filament
G1~G16 : Grid

S1~S38 : Anode

2

S9

S10

S15

S11

S12

G2~G16

S2

S3

S8

S7

S13

S12

S17

S18

S23

S22

S27

S28

S33

S32

S16 S17

8

9

58

G1

S4

S9

S14

S19

S24

S29

S34

2

9

S1

S6

S7

S5

S4

S5

S10

S15

S20

S25

S30

S35

20

S18

9

9

S2

S3

TEL [phone] QQ 376315150 892498299

9

Anode & Grid Assignment

G1

S36
S37
S38

w

w

S1
S2
S3
S4
S5
S6
S7
S8
S9

S1
S2
S3
S4
S5
S6
S7

S9

G1 G2 G3 G4 G5 G6 G7 G8 G9 G10 G11 G12 G13 G14 G15 G16

/

−2

S38

DBS

w

.

G2~G16

S1
S2

S3
S4
S5
S6
S7
S8
S9

TV−1VDP

TAPE

xia

S10
S11
S12
S13
S14

S15
S16
S17

S18

/(DVD)

/(MD)

MD

o

G2~G16

G1
S10
S11

S12

S13
S14

S15

DIGITAL

PRO LOGIC

AUXDVD

V.AUX

y

u

S10
S11
S12
S13
S14
S15
S16
S17
S18

1

S19
S20

S21
S22
S23
S24
S25

S26

S27

TUNER

−2

−3

6

CD

−1

3

G1

.

G2~G16

S19
S20
S21
S22
S23
S24

S25
S26
S27

PHONO

VCR

c

REC

MULTI

o

S28
S29
S30
S31
S32
S33
S34
S35

m

G1

STEREO

AUTO

G2~G16

S28
S29
S30
S31

S32
S33

S34
S35

TUNED

RDS

CH

25

PRINTED WIRING BOARDS

1

AVR-4802/AVC-A11SR

2

3

4

5

76

8

Q

1U-3350 DSP UNIT Ass'y

Q

3

7

6

3

1 11

4

5 8

TEL [phone] QQ 376315150 892498299

T

E

L

1

3

9

4

2

2

9

15

1

6

1

8

9

48

1

12

13

BE

C

C

E

B

5

BE

C

C

B E

5

1

16

16

1

9

8

37

36

24

8

9

1

1 7 1 9 1 8

8

14

1

7

1

1

16

1

3

8

9

16

1

7

8

14

5

4

5

8

14

7

1

1

52

53

0

157208

156

50

1

105

104

50

8

1

91 4

9

1 8

2

4

9

8

2

9

9

A

26

1132

25

26

14

TEL [phone] QQ 376315150 892498299

B

8

75

0

51

16

5

4

1

9

9

2

8

9

4

2

9

8

C

Q

1

1

25

50

3

1

50

7

25

10

50

26

26

6

25

26

1

20

11

5

1

3

7

1

8

14

4

5

1

1

30

31 50

30

1

8

76100

5

14

558

4

1

8

1

4

1

3

58

4

1

15 28

E

C

B

14

15 28

1

1

14

1

8

7

157208

156

Q

1

52

53

105

104

w

w

w

.

1

9

1

x

E

C

B

20

20

20

14

BE

C

C

B E

1

2

BE

C

C

B E

22

23

58

4

1

58

4

1

58

4

1

E

E

C

C

B

B

BE

C

15 28

E

C

B

14

15 28

E

C

B

1

1

BE

C

E

C

BE

B

C

11

10

1

1

11

11

10

1

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28

AVR-4802/AVC-A11SR

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COMPONENT SIDE

30