The STOD13AS is a dual DC-DC converter for
AMOLED display panels. It integrates a step-up
and an inverting DC-DC converter making it
particularly suitable for battery operated products,
in which the major concern is overall system
efficiency. It works in pulse skipping mode during
low load conditions and PWM-MODE at 1.5 MHz
frequency for medium/high load conditions. The
high frequency allows the value and size of
external components to be reduced. The Enable
pin allows the device to be turned off, therefore
reducing the current consumption to less than 1
µA. The negative output voltage can be
programmed by an MCU through a dedicated pin
which implements single-wire protocol. Soft-start
with controlled inrush current limit, thermal
shutdown, and short-circuit protection are
integrated functions of the device.
Order codePositive voltageNegative voltagePackagePackaging
STOD13ASTPUR4.6V-2.4V to -6.4VDFN12L (3 x 3mm)3000 parts per reel
1. A 250 mA load can be provided with inductor saturation current as a minimum of 0.9 A.
2. At -6.4 V, a 250 mA load can be provided with inductor saturation current as a minimum of 1.5 A. See
CoilCraft
Murata
CoilCraft
Murata
Murata
Taiyo YudeN
Murata
Taiyo YudeN
Murata
Taiyo YudeN
Murata
Taiyo YudeN
LPS4012-472ML
LQH3NPN4R7MM0
LPS4012-472ML
LQH3NPN4R7MM0
GRM219R61A106KE44
LMK212BJ106KD-T
GRM219R61A106KE44
LMK212BJ106KD-T
GRM219R61A106KE44
LMK212BJ106KD-T
GRM185R60J105KE26
JMK107BJ105KK-T
4.7µH
4.7µH
2 x 10µF0805
10µF
2 x 10µF
1µF
4.0 x 4.0 x 1.2
3.0 x 3.0 x 1.5
4.0 x 4.0 x 1.2
3.0 x 3.0 x 1.5
0805
0805
0805
0805
0603
0603
±20%, I = 1.7A, R = 0.175Ω
±20%, I = 1.25A, R = 0.13Ω
±20%, I = 1.7A, R = 0.175Ω
±20%, I = 1.25A, R = 0.13Ω
±10%, X5R, 10V
±10%, X5R, 10V
±10%, X5R, 10V
±10%, X5R, 10V
±10%, X5R, 10V
±10%, X5R, 10V
±10%, X5R, 6.3V
±10%, X5R, 6.3V
Section 7.1.1
.
Note:All the above components refer to the typical application performance characteristics.
Operation of the device is not limited to the choice of these external components. Inductor
values ranging from 3.3 µH to 6.8 µH can be used together with the STOD13AS.
4/25Doc ID 022733 Rev 1
Page 5
STOD13ASSchematic
UVLO
LOGIC CONTROL
OTP
S-WIRE
RING
KILLER
VREF
OSC
STEP-UP
CONTROL
FAST
DISCHARGE
DMD
INVERTING
CONTROL
FAST
DISCHARGE
DMD
s
s
s
s
V
INA
EN
S
WIRE
V
REF
AGND
PGND
#
#
VREF
S-WIRE
control
N1
s
V
INP
V
MID
V
O2
L
X1
L
X2
P1A
P1B
P2
N2
FD
SSD
SCP
OLP
VO2
LX
CURRENT
SENSE
VINP
Figure 2.Block schematic
AM10458v1
Doc ID 022733 Rev 15/25
Page 6
Pin configurationSTOD13AS
2 Pin configuration
Figure 3.Pin configuration (top view)
Table 3.Pin description
Pin namePin n°Description
Lx
1
1Boost converter switching node
PGND 2Power ground pin
V
MID
FD4
3Boost converter output voltage
Fast discharge control pin. When pulled LOW, the fast discharge after
shutdown is active. When pulled HIGH, the fast discharge is OFF
AGND 5Signal ground pin. This pin must be connected to the power ground layer
V
S
REF
WIRE
6
7Negative voltage setting pin
EN 8
V
O2
Lx
2
V
IN A
V
12Power input supply voltage
IN P
9Inverting converter output voltage
10Inverting converter switching node
11Analogic input supply voltage
Exposed
pad
Voltage reference output. 1 µF bypass capacitor must be connected
between this pin and AGND
Enable control pin. High = converter on; Low = converter in shutdown
mode
Internally connected to AGND. Exposed pad must be connected to
ground layers in the PCB layout in order to guarantee proper operation of
the device
Note:Absolute maximum ratings are those values beyond which damage to the device may occur.
Functional operation under these condition is not implied.
The Lx1 and Lx2 have high slew rate and they can be over the absolute maximum rating
during operation due to the parasitic inductance in the PCB and scope probe. An absolute
maximum rating of Lx1 and Lx2 is related to voltage supplied by an external source so the
internally generated Lx1 and Lx2 voltage during normal operation doesn't damage the
chipset.
Table 5.Thermal data
SymbolParameterValueUnit
R
thJA
R
thJC
1. The package is mounted on a 4-layer (2S2P) JEDEC board as per JESD51-7.
Thermal resistance junction-ambient33°C/W
Thermal resistance junction-case (FR-4 PCB)
(1)
2.12°C/W
Doc ID 022733 Rev 17/25
Page 8
Electrical characteristicsSTOD13AS
4 Electrical characteristics
TJ = 25 °C, V
C
= 2 x 10 µF, C
O2
INA
= V
= 3.7 V, I
INP
= 1 µF, L1 = L2 = 4.7 µH, V
REF
MID,O2
= 30 mA, C
= 2 x 10 µF, C
IN
= 2 V, V
EN
= 4.6 V, V
MID
MID
= 10 µF,
= -4.9 V unless
O2
otherwise specified.
Table 6.Electrical characteristics
SymbolParameterTest conditionsMin.Typ.Max.Unit
General section
V
INA, VINP
UVLO_HUnder voltage lockout HIGHV
UVLO_LUnder voltage lockout LOWV
I_
I
Q_SH
V
EN
V
EN
I
EN
V
FD
V
FD
I
FD
fsSwitching frequencyPWM mode1.351.51.65MHz
D1
D2
V
REF
I
REF
Supply input voltage2.53.74.5V
rising2.222.25V
INA
falling1.92.18V
INA
VI
Input currentNo load condition1.72.1mA
= VSW = GND
V
Shutdown current
HEnable high threshold
EN
T
= -40°C to +85°C
J
=2.5V to 4.5V,
V
INA
= -40°C to +85°C
T
J
1.2V
LEnable low threshold0.4
Enable input current
HFast discharge high threshold
V
EN=VINA
= -40°C to +85°C
T
J
V
INA
= -40°C to +85°C
T
J
=4.5V;
=2.5V to 4.5V,
1.2V
LFast discharge low threshold0.4
=4.5V;
=10 to 30mA,
=4.6V, VO2=-4.9V
=30 to 150mA,
=4.6V, VO2=-4.9V
=150 to 250mA,
=4.6V, VO2=-4.9V
78
85
82
=10µA1.2081.2201.232V
100µA
MAX
MAX
V
Fast discharge input current
FD=VINA
= -40°C to +85°C
T
J
Step-up maximum duty cycleNo load87%
Inverting maximum duty cycle No load87%
I
MID,O2
V
MID
I
Total system efficiency
Reference voltageI
Reference current capability
MID,O2
V
MID
I
MID,O2
V
MID
REF
@ 98.5% of no load
reference voltage
1µA
1µA
50µA
%
Step-up converter section
Positive output voltage4.6V
V
V
MID
Positive output voltage total
variation
INA=VINP
I
MID
load T
=2.9V to 4.5V;
=5mA to 250mA, IO2 no
= -40°C to +85°C
J
8/25Doc ID 022733 Rev 1
-0.80.8%
Page 9
STOD13ASElectrical characteristics
Table 6.Electrical characteristics (continued)
SymbolParameterTest conditionsMin.Typ.Max.Unit
=3.4V to 2.9V,
V
ΔV
ΔV
MID LT
MID T
Line transient
Load transient response
Undershoot/overshoot
TDMA Noise
I
MID MAX
I-L
1MAX
Static variation between low
and high V
IN
Maximum output currentV
Step-up inductor peak current
Step-up converter section
level
INA,P
=100mA; TR=TF=10µs
I
MID
I
=3 to 30mA and I
MID
to 3mA, T
=10 to 100mA and
I
MID
I
=100 to 10mA,
MID
=150µs
T
R=TF
R=TF
=150µs
MID
=30
-10mV
±20mV
±25mV
±20
I
=10 to 50mA; IO2 no load
MID
(1)
=2.9V to 4.5V250mA
INA,P
10% below nominal
V
MID
value
1.081.32A
4
mV
P-channel static drain-source
P1
R
R
DSON
DSON
ON resistance
N-channel static drain-source
N1
ON resistance
Inverting converter section
Negative output voltage range
V
O2
Negative output voltage-4.9V
Negative output voltage total
variation
ΔV
ΔV
O2 LT
O2 T
Line transient
Load transient response
Undershoot/overshoot
TDMA Noise
I
O2 MAX
I-L
2MAX
Static variation between low
and high V
IN
Maximum output currentV
Inverting peak current
level
V
INA=VINP
I
SW-P1
V
INA=VINP
I
SW-N1
=3.7V,
=100mA
=3.7V,
=100mA
1.02.0Ω
0.41.0Ω
41 different values set by
S
pin
WIRE
Section 6.1.2
(see
V
INA=VINP
I
O2
load T
V
INA,P
I
O2
I
O2
3mA, T
I
O2
I
O2
T
R=TF
=2.9V to 4.5V;
=5mA to 250mA, I
= -40°C to +85°C
J
=3.4V to 2.9V,
=100mA, TR=TF=10µs
=3 to 30mA and IO2=30 to
R=TF
=10 to 100mA and
=100 to 10mA,
=150µs
)
=150µs
MID
no
-6.4-2.4V
-1.71.7%
+10mV
±20mV
±25mV
±20
IO2=10 to 50mA; I
(1)
=2.9V to 4.5V-250mA
INA,P
below 10% of nominal
V
O2
value
MID
no load
5
-1.6-1.3A
mV
R
DSON
P-channel static drain-source
P2
ON resistance
V
INA=VINP
I
SW-P2
=3.7V,
=100mA
0.420.8Ω
Doc ID 022733 Rev 19/25
Page 10
Electrical characteristicsSTOD13AS
Table 6.Electrical characteristics (continued)
SymbolParameterTest conditionsMin.Typ.Max.Unit
R
DSON
N-channel static drain-source
N2
ON resistance
V
INA=VINP
I
SW-N2
=3.7V,
=100mA
0.430.8Ω
Thermal shutdown
OTPOvertemperature protection140°C
OTP
HYST
Overtemperature protection
hysteresis
15°C
Discharge resistor
R
DIS
Resistor valueNo load, EN=SW=FD=Low400Ω
No load, EN=SW=FD=Low,
T
DIS
Discharge time
V
MID-VO2
at 10% of nominal
10ms
value
1. V
= 4.2 to 3.7 V, 3.7 to 3.2 V, 3.4 to 2.9 V, f = 200 Hz; t
●Protocol: to digitally communicate over a single cable with single-wire components
●Single-wire's 3 components:
1.an external MCU
2. wiring and associated connectors
3. the STOD13AS device with a dedicated single-wire pin.
6.1.1 S
●Fully digital signal
●No handshake needed
●Protection against glitches and spikes though an internal low pass filter acting on falling
●Uses a single wire (plus analog ground) to accomplish both communication and power
●Simplify design with an interface protocol that supplies control and signaling over a
6.1.2 S
●Single-wire protocol uses conventional CMOS/TTL logic levels (maximum 0.6 V for
●Both master (MCU) and slave (STOD13AS) are configured to permit bit sequential data
●Data is bit-sequential with a START bit and a STOP bit
●Signal is transferred in real time
●System clock is not required; each single-wire pulse is self-clocked by the oscillator
WIRE
features and benefits
WIRE
edges
control transmission
single-wire connection to set the output voltages.
protocol
WIRE
logic “zero” and a minimum 1.2 V for logic “one”) with operation specified over a supply
voltage range of 2.5 V to 4.5 V
to flow only in one direction at a time; master initiates and controls the device
integrated in the master and is asserted valid within a frequency range of 250 kHz
(maximum).
6.1.3 S
basic operations
WIRE
●The negative output voltage levels are selectable within a wide range (steps of 100 mV)
●The device can be enabled / disabled via S
Doc ID 022733 Rev 113/25
in combination with the Enable pin.
WIRE
Page 14
Detailed descriptionSTOD13AS
6.2 Negative output voltage levels
Table 7.Negative output voltage levels
PulseV
O2
PulseV
O2
PulseV
O2
PulseV
1 -6.411-5.421-4.431 -3.4
2 -6.312-5.322-4.332 -3.3
3 -6.213-5.223-4.233 -3.2
4 -6.114-5.124-4.134 -3.1
5 -6.015-5.025-4.035 -3.0
6-5.916
(1)
-4.926-3.936-2.9
7 -5.817-4.827-3.837 -2.8
8 -5.718-4.728-3.738 -2.7
9 -5.619-4.629-3.639 -2.6
10-5.520-4.530-3.540-2.5
41-2.4
1. Default value.
6.3 Enable, S
WIRE
and FD
O2
Table 8.Enable and S
operation table
WIRE
EnableS
LowLowDevice off
LowHighNegative output set by S
HighLowDefault negative output voltage
HighHighDefault negative output voltage
1. The Enable pin must be set to AGND while using the S
Table 9.Fast discharge operation table
FD pinAction
LowFast discharge active after IC shutdown
HighNo fast discharge function
WIRE
WIRE
(1)
Action
WIRE
function.
14/25Doc ID 022733 Rev 1
Page 15
STOD13ASApplication information
7 Application information
7.1 External passive components
7.1.1 Inductor selection
Magnetic shielded low ESR power inductors must be chosen as the key passive
components for switching converters.
For the step-up converter an inductance between 4.7 µH and 6.8 µH is recommended.
For the inverting stage the suggested inductance ranges from 3.3 µH to 4.7 µH.
It is very important to select the right inductor according to the maximum current the
inductor can handle to avoid saturation. The step-up and the inverting peak current can be
calculated as follows:
Equation 1
IV
×
I
−
=
BOOSTPEAK
OUTMID
VIN1
×η
+
MIN
MID
−×
×××
)VINV(VIN
MINMIDMIN
1LfsV2
Equation 2
x-
x-
)2(
IVOVIN
)2(
MIN
MIN
IVOVIN
=
I
I
-
-
INVERTINGPEAK
INVERTINGPEAK
=
x
x
η
η
2
VIN
2
VIN
where
V
: step-up output voltage, fixed at 4.6 V;
MID
V
: inverting output voltage including sign (minimum value is the absolute maximum
O2
value);
I
: output current for both DC-DC converters;
O
V
: input voltage of the STOD13AS;
IN
f
: switching frequency. Use the minimum value of 1.35 MHz for the worst case;
s
η1: efficiency of step-up converter. Typical value is 0.70;
η2: efficiency of inverting converter. Typical value is 0.60.
The negative output voltage can be set via S
WIRE
current, at the maximum load condition, increases. A proper inductor, with a saturation
current as a minimum of 1 A, is preferred.
7.1.2 Input and output capacitor selection
x
x
2
VOVIN
2
VOVIN
OUTMINMIN
OUTMINMIN
+
+
x
x
MINMIN
MINMIN
xx-
xx-
2)2(2
LfsVINVO
2)2(2
MINMIN
MINMIN
LfsVINVO
at -6.4 V. Accordingly, the inductor peak
It is recommended to use X5R or X7R low ESR ceramic capacitors as input and output
capacitors in order to filter any disturbance present in the input line and to obtain stable
operation for the two switching converters. A minimum real capacitance value of 6 µF must
be guaranteed for C
variation and DC polarization, a 10 µF, 10 V ±10% capacitor as C
±10% as C
, can be used to achieve the required 6 µF.
O2
and CO2 in all conditions. Considering tolerance, temperature
MID
Doc ID 022733 Rev 115/25
and 2 x 10 µF, 10 V
MID
Page 16
Application informationSTOD13AS
7.2 Recommended PCB layout
The STOD13AS is a high frequency power switching device and therefore requires a proper
PCB layout in order to obtain the necessary stability and optimize line/load regulation and
output voltage ripple.
Analog input (V
at the C
pad only. The input capacitor must be as close as possible to the IC.
IN
) and power input (V
INA
) must be kept separated and connected together
INP
In order to minimize the ground noise, a common ground node for power ground and a
different one for analog ground must be used. In the recommended layout, the AGND node
is placed close to C
ground while the PGND node is centered at CIN ground. They are
REF
connected by a separated layer routing on the bottom through vias.
The exposed pad is connected to AGND through vias.
Figure 12. Top layer and silk-screen (top view, not to scale)
Figure 13. Bottom layer and silk-screen (top view, not to scale)
16/25Doc ID 022733 Rev 1
Page 17
STOD13ASDetailed description
8 Detailed description
8.1 General description
The STOD13AS is a high efficiency dual DC-DC converter which integrates a step-up and
inverting power stage suitable for supplying AMOLED panels. Thanks to the high level of
integration it needs only 6 external components to operate and it achieves very high
efficiency using a synchronous rectification technique for each of the two DC-DC converters.
The controller uses an average current mode technique in order to obtain good stability and
precise voltage regulation in all possible conditions of input voltage, output voltage, and
output current. In addition, the peak inductor current is monitored in order to avoid saturation
of the coils.
The STOD13AS implements a power saving technique in order to maintain high efficiency at
very light load and it switches to PWM operation as the load increases in order to guarantee
the best dynamic performance and low noise operation.
The STOD13AS avoids battery leakage thanks to the true-shutdown feature and it is self
protected from overtemperature. Undervoltage lockout and soft-start guarantee proper
operation during startup.
8.1.1 Multiple operation modes
Both the step-up and the inverting stage of the STOD13AS operate in three different modes:
pulse skipping (PSM), discontinuous conduction mode (DCM) and continuous conduction
mode (CCM). It switches automatically between the three modes according to input voltage,
output current, and output voltage conditions.
8.1.2 Pulse skipping operation
The STOD13AS works in pulse skipping mode when the load current is below some tens of
mA. The load current level at which this way of operation occurs depends on input voltage
only for the step-up converter and on input voltage and negative output voltage (VO2) for the
inverting converter.
8.1.3 Discontinuous conduction mode
When the load increases above a few mA, the STOD13AS enters DCM operation. In order
to obtain this type of operation the controller must avoid the inductor current going negative.
The discontinuous mode detector (DMD) blocks sense the voltage across the synchronous
rectifiers (P1B for the step-up and N2 for the inverting) and turn off the switches when the
voltage crosses a defined threshold which, in turn, represents a certain current in the
inductor. This current can vary according to the slope of the inductor current which depends
on input voltage, inductance value, and output voltage.
8.1.4 Continuous conduction mode
At medium/high output loads, the STOD13AS enters full CCM at constant switching
frequency mode for each of the two DC-DC converters.
Doc ID 022733 Rev 117/25
Page 18
Detailed descriptionSTOD13AS
8.1.5 Enable pin
The device operates when the EN pin is set high. If the EN pin is set low, the device stops
switching, and all the internal blocks are turned off. In this condition the current drawn from
V
INP/VINA
is below 1 µA in the whole temperature range. In addition, the internal switches
are in an OFF state so the load is electrically disconnected from the input, this avoids
unwanted current leakage from the input to the load.
8.1.6 Soft-start and inrush current limiting
After the EN pin is pulled high, or after a suitable voltage is applied to V
device initiates the start-up phase.
As a first step, the C
capacitor is charged and the P1B switch implements a current
MID
limiting technique in order to keep the charge current below 400 mA. This avoids the battery
overloading during startup.
After V
reaches the V
MID
voltage level, the P1B switch is fully turned on and the soft-start
INP
procedure for the step-up is started. After around 2 ms the soft-start for the inverting is
started. The positive and negative voltages are under regulation at around 13 ms after the
EN pin is asserted high.
8.1.7 Undervoltage lockout
The undervoltage lockout function avoids improper operation of the STOD13AS when the
input voltage is not high enough. When the input voltage is below the UVLO threshold the
device is in shutdown mode. The hysteresis of 50 mV avoids unstable operation when the
input voltage is close to the UVLO threshold.
8.1.8 Overtemperature protection
An internal temperature sensor continuously monitors the IC junction temperature. If the IC
temperature exceeds 140 °C, typical, the device stops operating. As soon as the
temperature falls below 125 °C, typical, normal operation is restored.
8.1.9 Short-circuit protection during soft-start (SSD)
INP
, V
INA
and EN, the
During device soft-start on the positive output, an internal comparator checks if the panel is
damaged. In this case, soft-start is stopped and the device is parked in power-off. To reset
the normal functionality (assuming that the anomalous load condition is removed), it is
necessary to restart the converter through an enable transient.
If the panel is not damaged it is possible to proceed with the soft-start of the negative output
and both reach their final value, therefore ensuringnormal output voltages and functionality.
8.1.10 Overload protection (OLP)
The output current is internally limited. An overload condition, as a short-circuit between the
two outputs or between each output and GND, produces the device power-off. To reset the
18/25Doc ID 022733 Rev 1
Page 19
STOD13ASDetailed description
normal functionality (assuming that the short condition is removed), it is necessary to restart
the converter through an enable transient.
8.1.11 Short-circuit protection (SCP)
When short-circuit occurs, the device is able to detect the voltage difference between VIN
and V
. Overshoots are limited, decreasing the inductor current. After that, the output
OUT
stages of the device are turned off. This status is maintained, avoiding current flowing to the
load. A new ENABLE transition is needed to restart the device. During startup the shortcircuit protection is active.
8.1.12 Fast discharge
When ENABLE turns from high to low level, the device goes into shutdown mode LX1 and
LX2 stop switching. If the FD pin is low, a resistor of about 400 Ω is connected between
V
and VO2 to discharge quickly C
MID
differential output voltage (V
MID-VO2
voltages are discharged to 0 V, the switches turn off and the outputs are high impedance.
When the FD pin is high, the fast discharge after shutdown is off.
and CO2 capacitors, lowering in about 10 ms the
MID
) below 10% of nominal value. When the output
Doc ID 022733 Rev 119/25
Page 20
Package mechanical dataSTOD13AS
9 Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
specifications, grade definitions and product status are available at:
is an ST trademark.
®
packages, depending on their level of environmental compliance. ECOPACK
www.st.com
. ECOPACK
20/25Doc ID 022733 Rev 1
Page 21
STOD13ASPackage mechanical data
Table 10.DFN12L (3 x 3) mechanical data
mm.inch.
Dim.
Min.Typ.Max.Min.Typ.Typ.
A0.510.550.600.0200.0220.024
A100.020.0500.0010.002
A30.200.008
b0.180.250.300.0070.0100.012
D2.8533.150.1120.1180.124
D21.872.022.120.0740.0800.083
E2.8533.150.1120.1180.124
E21.061.211.310.0420.0480.052
e0.450.018
L0.300.400.500.0120.0160.020
Figure 14. DFN12L (3 x 3) drawing
8085116-A
Doc ID 022733 Rev 121/25
Page 22
Package mechanical dataSTOD13AS
Tape & reel QFNxx/DFNxx (3x3) mechanical data
mm.inch
DIM.
MIN.TYPMAX.MIN.TYP.MAX.
A33012.992
C12.813.20.5040.519
D20.20.795
N991013.8983.976
T14.40.567
Ao3.30.130
Bo3.30.130
Ko1.10.043
Po40.157
P80.315
22/25Doc ID 022733 Rev 1
Page 23
STOD13ASPackage mechanical data
Figure 15. DFN12L (3 x 3 mm) footprint recommended data
Doc ID 022733 Rev 123/25
Page 24
Revision historySTOD13AS
10 Revision history
Table 11.Document revision history
DateRevisionChanges
27-Jan-20121Initial release.
24/25Doc ID 022733 Rev 1
Page 25
STOD13AS
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