This Power MOSFET is the latestdevelopmentof
STMicroelectronics unique ”Single Feature
”
Size
strip-based process. The resulting
transistor shows extremely high packing density
forlowon-resistance,ruggedavalanche
characteristics and less critical alignment steps
thereforearemarkablemanufacturing
reproducibility.
APPLICATIONS
■ DC MOTOR CONTROL (DISK DRIVES, etc.)
■ DC-DC& DC-AC CONVERTERS
■ SYNCHRONOUSRECTIFICATION
■ POWERMANAGEMENT IN
BATTERY-OPERATEDAND PORTABLE
EQUIPMENT
2
3
2
1
SOT-223
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
V
V
DGR
V
I
D
I
D
I
DM
P
dv/dt (
T
(•) Pulse width limited by safe operating area(*) Limited by package(1)ISD≤ 10A, di/dt ≤ 300A/µs, VDD≤ V
August 1998
Drain-s ou r ce Voltage (VGS=0)30V
DS
Drain- gat e Volt ag e (RGS=20kΩ)
Gate-source Vol tage± 20V
GS
30V
(*)Drain Cur r en t (continu ous) at Tc=25oC4A
(*)Drain Cur r en t (continu ous) at Tc=100oC2.5A
(•)Dr ain Curren t ( p ulsed)16A
Tot al Di s sipa t ion at Tc=25oC2.5W
tot
Derat ing Factor0.02W/
1) Peak Diode Recovery volta ge slope6V/ns
Storage Temperature-65 to 150
stg
T
Max. Oper ating Jun ct io n T e m pe r ature150
j
(BR)DSS
,Tj≤T
o
C
o
C
o
C
jMAX
1/8
Page 2
STN4NE03
THERMAL DATA
R
thj-pcb
R
thj- amb
T
AVALANCHE CHARACTERISTICS
SymbolPara met e rMax Valu eUni t
I
AR
E
Ther mal Resist ance Junctio n- PC BoardMax
Ther mal Resist ance Junctio n- ambientMax
(Sur f a ce M ounted)
Maximum Lead Tempera t ure For Soldering P urpose
l
Avalanch e C urr e nt , Repetit i v e o r Not-Re petitiv e
(pulse w idth limited by T
Single Pulse Avalanche Energy
AS
(starting T
=25oC, ID=IAR,VDD=25V)
j
max, δ <1%)
j
50
60
260
4A
20mJ
o
C/W
o
C/W
o
C
ELECTRICAL CHARACTERISTICS (T
=25oC unlessotherwisespecified)
case
OFF
SymbolParameterTest Condition sMin.Typ.Max.Unit
V
(BR)DSS
Drain-sou rc e
=250µAVGS=0
I
D
30V
Breakdown Voltage
I
I
DSS
GSS
Zer o Gat e Voltage
Drain Current (V
GS
Gat e-body Le aka ge
Current (V
DS
=0)
=0)
=MaxRating
V
DS
V
=MaxRatingTc=125
DS
o
C
= ± 20 V
V
GS
1
10
± 100nA
ON (∗)
SymbolParameterTest Condition sMin.Typ.Max.Unit
V
GS(th )
Gate Threshold
V
DS=VGSID
=250µA
234V
Voltage
R
DS(on)
Stati c Drain-so urce On
VGS=10V ID= 2 A0.0450. 0 6Ω
Resistance
I
D(on)
On Stat e Drain Current VDS>I
D(on)xRDS(on)max
4A
VGS=10V
DYNAMIC
SymbolParameterTest Condition sMin.Typ.Max.Unit
g
(∗)Forward
fs
Tr anscond uctanc e
C
C
C
Input Ca paci t ance
iss
Out put C apa c itanc e
oss
Reverse Trans fer
rss
Capa cit an c e
VDS>I
D(on)xRDS(on)maxID
=2A13.0S
VDS=25V f=1MHz VGS= 0 V760
150
50
1000
200
80
µA
µA
pF
pF
pF
2/8
Page 3
STN4NE03
ELECTRICAL CHARACTERISTICS (continued)
SWITCHINGON
SymbolParameterTest Condition sMin.Typ.Max.Unit
t
d(on)
t
r
Turn-on Time
Rise Time
VDD=5VID=5A
=4.7 ΩVGS=10V
R
G
10
60
(see test circuit, figure 3)
Q
Q
Q
Total Gate Charge
g
Gat e-Sou r ce Cha rge
gs
Gate-Drain Charge
gd
VDD=24VID=10A VGS=10V22
7
7
SWITCHINGOFF
SymbolParameterTest Condition sMin.Typ.Max.Unit
t
r(Voff)
t
t
Of f - voltag e Rise Time
Fall Time
f
Cross-over Time
c
VDD=24V ID=10A
=4.7 ΩVGS=10V
R
G
(see test circuit, figure 5)
8
15
25
SOURCE DRAIN DIODE
SymbolParameterTest Condition sMin.Typ.Max.Unit
I
SD
I
SDM
V
SD
t
Q
I
RRM
(∗) Pulsed: Pulse duration =300 µs, duty cycle1.5 %
(•) Pulse widthlimited by safe operating area
Source-drain Curre nt
(•)
Source-drain Curre nt
(pulsed)
(∗)Fo rward On Vo lt ageISD=4A VGS=01.5V
Reverse Rec overy
rr
Time
Reverse Rec overy
rr
= 10 Adi/dt = 100 A/µs
I
SD
=24VTj=150oC
V
DD
(see test circuit, figure 5)
40
0.06
Charge
Reverse Rec overy
3.0
Current
15
90
30nC
15
25
40
4
16
ns
ns
nC
nC
ns
ns
ns
A
A
ns
µC
A
Safe Operating AreaThermalImpedance
3/8
Page 4
STN4NE03
OutputCharacteristics
Transconductance
TransferCharacteristics
StaticDrain-sourceOn Resistance
GateCharge vs Gate-sourceVoltage
4/8
CapacitanceVariations
Page 5
STN4NE03
Normalized GateThresholdVoltagevs
Temperature
Source-drainDiode Forward Characteristics
Normalized On Resistancevs Temperature
5/8
Page 6
STN4NE03
Fig. 1: UnclampedInductiveLoad Test Circuit
Fig. 3: Switching Times Test CircuitsFor
ResistiveLoad
Fig. 2: UnclampedInductive Waveform
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode RecoveryTimes
6/8
Page 7
SOT-223 MECHANICAL DATA
STN4NE03
DIM.
mmmils
MIN.TYP.MAX.MIN.TYP.MAX.
a2.272.32.3389.490.691.7
b4.574.64.63179.9181.1182.3
c0.20.40.67.915.723.6
d0.630.650.6724.825.626.4
e11.51.61.759.16366.9
e40.3212.6
f2.933.1114.2118.1122.1
g0.670.70.7326.427.628.7
l16.777.3263.8275.6287.4
l23.53.53.7137.8137.8145.7
L6.36.56.7248255.9263.8
L
l2
e1
a
b
d
c
e4
f
C
l1
B
C
E
g
P008B
7/8
Page 8
STN4NE03
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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication orotherwise under any patent or patent rights ofSTMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes andreplaces all information previously supplied. STMicroelectronics products
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