LA-5754P NAWE6 AMD Danube
A
B
C
D
E
http://hobi-elektronika.net
1 1
Compal Confidential
2 2
NAWE6 Schematics Document
AMD Danube
Champlain Processor with RS880M/SB820/Park VGA
2010-02-24
3 3
LA5754 REV: 0.2
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2010/03/12
2008/10/06 2010/03/12
2008/10/06 2010/03/12
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
Cover Page
Cover Page
Cover Page
NAWE6 LA-5754P
NAWE6 LA-5754P
NAWE6 LA-5754P
E
0.2
0.2
0.2
of
of
of
147Monday, March 01, 2010
147Monday, March 01, 2010
147Monday, March 01, 2010
A
Compal Confidential
Model Name : AMD Danube + Park
1 1
VRAM 512MB
64M16 x 4
ATI M93-S3
Park - S3
uFCBGA-631
Page 13,14,15,16,17
LVDS
page 27
2 2
page 18
DDR3
B
PCI-Express x 16
ZZZ1
ZZZ1
LA5754P
LA5754P
DAZ@
DAZ@
DA80000IP00
DA80000IP00
Danube
AMD S1G4 Processor
uPGA-638 Package
Champlain
Hyper Transport Link
16 x 16
Gen2
ATI RS880M
uFCBGA-528
page 10,11,12,13
C
page 4,5,6,7
ZZZ2
POWER BD:
LS-5758P
@
DA40000TD00
POWER BTN
NOVO BTN
POWER MANAGE BTN
Memory BUS(DDR3)
Dual Channel
1.5V DDRIII 800~1333MHz
page 37
D
CAP SENSOR BD:
ZZZ3
ZZZ3
LS5756P
LS5756P
@
@
DA40000T300
DA40000T300
4 layer
VOLUME UP
VOLUME DOWN
MUTE
AUDIO ENHANCE
BUTTON & LED
204pin DDRIII-SO-DIMM X2
BANK 0, 1, 2, 3
Thermal Sensor
ADM1032
page 37 page 27 page 37 page 28
page 6 page 19
Clock Generator
ICS9LPRS488
page 8,9
E
CARD READER BD:
ZZZ4
ZZZ4
LS5753P
LS5753P
@
@
DA40000Q210
DA40000Q210
page 28
RTS5159
HP JACK
MIC JACK
page 28
CRT
page 25
A link Express2
Gen1
HDMI Conn.
page 26
ATI SB820M
New Card
WLAN
page 28
GPP3
3 3
LED
page 36
3G/WWAN
MINI Card
page 28
GPP2
SIM
Card
page28
MINI Card
USB(WWAN)
WLAN
page 28
LID SW / IO BD
page 32
Power On/Off CKT.
page 32
DC/DC Interface CKT.
4 4
page 38
Fan Control
page 31
LAN(GbE)
Atheros
AR8151/8152
page 29
GPP0GPP1
RJ45
page 30
Touch Pad
page 35
ENE KB926
uFCBGA-605
page 20,21,22,23,24
LPC BUS
page 34
Int.KBD
page 35
BIOS
page 34
USB
PORT
(LEFT)
USB port 0
3.3V 48MHz
3.3V 24.576MHz/48M hz
HD Audio
Audio Codec
Realtec ALC259
Analog
MIC_Int
USB
conn
(Right)
CMOS
Camera
USB port 5USB port 12 USB port 11
USB
SATA HDD
Conn.
page 32
port 0
page33
2Channel
Speaker
page33 page33
Bluetooth
Conn
<Option>
USB port 6
S-ATA
CDROM
Conn.
port 1
page 32
Gen2
ESATA &
USB
Combine CON
Mini
card
(WL)X1
3G/GPS
WWAN
<Option>
USB port 10
USB port 4
page28
Card Reader /
Audio Jack SB CONN
RTS5159-GR
MS/MS
pro/SD/SD
pro/mmc/XD
New Card
USB port 7
USB port 2
HP X 1+
MIC_Ext X1
page38
Power Circuit
page 39,40,41,42,43,
44,45,46,47,48,49
A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
Block Diagrams
Block Diagrams
Block Diagrams
NAWE6 LA-5754P
NAWE6 LA-5754P
NAWE6 LA-5754P
E
0.2
0.2
0.2
of
of
of
247Monday, March 01, 2010
247Monday, March 01, 2010
247Monday, March 01, 2010
A
B
C
D
E
http://hobi-elektronika.net
Voltage Rails
Power Plane Description
VIN
1 1
B+
+CPU_CORE_0
+CPU_CORE_1 Core voltage for CPU (0.7-1.2V)
+CPU_CORE_NB Voltage for On-die Nor thbridge of CPU(0.8-1 .1V)
+0.75VS +0.75VS LDO powe r rail for DDR3 VTT
+1.1VS
Adapter power supply (19V)
AC or battery power r ail for power cir cuit.
Core voltage for CPU (0.7-1.2V)
1.1V switched powe r rail for NB VDDC & VGA
S1 S3 S5
N/A N/A N/A
ON OFF
ON OFF OFF
ON OFF OFF
ON
ON OFF OFF
ON
N/AN/AN/A
OFF
OFF
+VGA_CORE
+1.5VS
+1.5V
+1.8VS 1.8V switched power rail
+2.5VS
+3VALW
+3V_LAN 3.3V power rail for LAN ON ON ON
+3VS
+5VALW
2 2
+5VS
+VSB VSB always on power rail ON ON*
+RTCVCC RTC power
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
0.95-1.2V switched power rail
1.5V power rail for PCIE Card
1.5V power r ail for CPU VDDIO a nd DDR
2.5V for CP U_VDDA
3.3V always on power rail
3.3V switched power rail
5V always on power rail
5V switched power rail
ON
ON
ON
ON
ON
ON
ON
ON
ON
OFFOFFON
OFF OFF
ON
OFF
OFF
OFF
OFF
OFF
ON ON*
OFF
OFF
ON*
ON
OFFON
OFF
ONON
STATE
SIGNAL
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SLP_S1# SLP_S3#
SLP_S4# SLP_S5# +VALW +V +VS Clock
HIGH HIGH HIGH HIGH
LOW
LOW
HIGH
LOW
LOWLOWLOW
LOW LOW LOW LOW
HIGHHIGHHIGH
HIGH
HIGH
ON
ON
ON
OFF
OFF
ON ON
ON
OFF
OFF
OFF
LOW
OFF
OFF
OFF
ON
ON
ON
ON
ON
External PCI Devices
Device IDSEL# REQ#/GNT# Interrupts
3 3
EC SM Bus1 address
Device
Smart Battery
Address
0001 011X b
HEX
16H
EC SM Bus2 address
Device
EMC1402-1 (CPU)
EMC1412-A (GPU)
EMC1403-2 (DDR,WWAN)
Address
100_1100b
111_1100b
100_1101b
HEX
4CH
7CH
4DH
SB820
SM Bus 0 address
Device
Clock Generator
(SILEGO SLG8SP626)
DDR DIMM1
DDR DIMM2
4 4
Address
1101 001Xb
1001 000Xb
1001 010Xb
HEX
D2
90
94
SB820
SM Bus 1 address
Device Address
BOM Config
UMA only SKU: UMA@
DIS ONLY (Park S3): DIS@
EXT CLK Mode:EXT@
INT CLK mode:INT@
LAN GIGA: 8151@
LAN 100: 8152@
CMOS@
BT@
3G@
S@
H@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2010/03/12
2008/10/06 2010/03/12
2008/10/06 2010/03/12
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
Notes List
Notes List
Notes List
NAWE6 LA-5754P
NAWE6 LA-5754P
NAWE6 LA-5754P
E
0.2
0.2
0.2
of
of
of
347Monday, March 01, 2010
347Monday, March 01, 2010
347Monday, March 01, 2010
A
1 1
B
C
D
E
+1.1VS
250 mil
2
C1
H_CADIP[0..15][10]
H_CADIP[0..15]
H_CADIN[0..15]
H_CADOP[0..15]
H_CADON[0..15]
H_CADOP[0..15] [10]
H_CADON[0..15] [10]H_CADIN[0..15][10]
C1
10U_0805_10V4Z
10U_0805_10V4Z
1
2
C2
C2
10U_0805_10V4Z
10U_0805_10V4Z
1
VLDT CAP.
1
C3
C3
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
2
C4
C4
0.22U_0603_16V4Z
0.22U_0603_16V4Z
1
C5
C5
180P_0402_50V8J
180P_0402_50V8J
2
1
C6
C6
180P_0402_50V8J
180P_0402_50V8J
2
Near CPU Socket
+1.1VS
2 2
H_CADIP0
H_CADIN0
H_CADIP1
H_CADIN1
H_CADIP2
H_CADIN2
H_CADIP3
H_CADIN3
H_CADIP4
H_CADIN4
H_CADIP5
H_CADIN5
H_CADIP6
H_CADIN6
H_CADIP7
H_CADIN7
H_CADIP8
H_CADIN8
H_CADIP9
H_CADIN9
H_CADIP10
H_CADIN10
H_CADIP11
H_CADIN11
H_CADIP12
H_CADIN12
3 3
H_CLKIP0[10]
H_CLKIN0[10]
H_CLKIP1[10]
H_CLKIN1[10]
H_CTLIP0[10]
H_CTLIP1[10] H_CTLOP1 [10]
H_CTLIN1[10]
H_CADIP13
H_CADIN13
H_CADIP14
H_CADIN14
H_CADIP15
H_CADIN15
JCPU1A
JCPU1A
TBD
D1
VLDT_A0
D2
VLDT_A1
D3
VLDT_A2
D4
VLDT_A3
E3
L0_CADIN_H0
E2
L0_CADIN_L0
E1
L0_CADIN_H1
F1
L0_CADIN_L1
G3
L0_CADIN_H2
G2
L0_CADIN_L2
G1
L0_CADIN_H3
H1
L0_CADIN_L3
J1
L0_CADIN_H4
K1
L0_CADIN_L4
L3
L0_CADIN_H5
L2
L0_CADIN_L5
L1
L0_CADIN_H6
M1
L0_CADIN_L6
N3
L0_CADIN_H7
N2
L0_CADIN_L7
E5
L0_CADIN_H8
F5
L0_CADIN_L8
F3
L0_CADIN_H9
F4
L0_CADIN_L9
G5
L0_CADIN_H10
H5
L0_CADIN_L10
H3
L0_CADIN_H11
H4
L0_CADIN_L11
K3
L0_CADIN_H12
K4
L0_CADIN_L12
L5
L0_CADIN_H13
M5
L0_CADIN_L13
M3
L0_CADIN_H14
M4
L0_CADIN_L14
N5
L0_CADIN_H15
P5
L0_CADIN_L15
J3
L0_CLKIN_H0
J2
L0_CLKIN_L0
J5
L0_CLKIN_H1
K5
L0_CLKIN_L1
N1
L0_CTLIN_H0
P1
L0_CTLIN_L0
P3
L0_CTLIN_H1
P4
L0_CTLIN_L1
FOX_PZ6382A-284S-41F_Champlian
FOX_PZ6382A-284S-41F_Champlian
ME@
ME@
HT LINK
HT LINK
VLDT_B0
VLDT_B1
VLDT_B2
VLDT_B3
L0_CADOUT_H0
L0_CADOUT_L0
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H15
L0_CADOUT_L15
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
AE2
AE3
AE4
AE5
AD1
AC1
AC2
AC3
AB1
AA1
AA2
AA3
W2
W3
V1
U1
U2
U3
T1
R1
AD4
AD3
AD5
AC5
AB4
AB3
AB5
AA5
Y5
W5
V4
V3
V5
U5
T4
T3
Y1
W1
Y4
Y3
R2
R3
T5
R5
+1.1VS
H_CADOP0
H_CADON0
H_CADOP1
H_CADON1
H_CADOP2
H_CADON2
H_CADOP3
H_CADON3
H_CADOP4
H_CADON4
H_CADOP5
H_CADON5
H_CADOP6
H_CADON6
H_CADOP7
H_CADON7
H_CADOP8
H_CADON8
H_CADOP9
H_CADON9
H_CADOP10
H_CADON10
H_CADOP11
H_CADON11
H_CADOP12
H_CADON12
H_CADOP13
H_CADON13
H_CADOP14
H_CADON14
H_CADOP15
H_CADON15
C7
C7
12
10U_0805_10V4Z
10U_0805_10V4Z
H_CLKOP0 [10]
H_CLKON0 [10]
H_CLKOP1 [10]
H_CLKON1 [10]
H_CTLOP0 [10]
H_CTLON0 [10]H_CTLIN0[10]
H_CTLON1 [10]
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2010/03/12
2008/10/06 2010/03/12
2008/10/06 2010/03/12
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
AMD CPU S1G4 HT I/F
AMD CPU S1G4 HT I/F
AMD CPU S1G4 HT I/F
NAWE6 LA-5754P
NAWE6 LA-5754P
NAWE6 LA-5754P
E
0.2
0.2
0.2
of
of
of
447Monday, March 01, 2010
447Monday, March 01, 2010
447Monday, March 01, 2010
A
B
C
D
E
Processor DDR3 Memory Interface
JCPU1C
DDRB_SDQ[63..0][9]
1 1
2 2
0_0402_5%
0_0402_5%
10U_0805_10V4Z
10U_0805_10V4Z
3 3
4 4
+1.5V
R1
R1
1K_0402_1%
1K_0402_1%
1 2
R2
R2
1K_0402_1%
1K_0402_1%
1 2
+1.5V
R368
R368
1 2
2
C588
C588
1
@
@
DDRA_SMA[15..0][8] DDRB_SMA[15..0] [9]
MEM_VREF
1
1
2
MEM_MA_RST#[8 ]
DDRA_ODT0[8]
DDRA_ODT1[8]
DDRA_SCS0#[8]
DDRA_SCS1#[8] DDRB_SCS0# [9]
DDRA_CKE0[8]
DDRA_CKE1[8]
DDRA_CLK0[8]
DDRA_CLK0#[8]
DDRA_CLK1[8]
DDRA_CLK1#[8]
DDRA_SBS0#[8]
DDRA_SBS1#[8]
DDRA_SBS2#[8]
DDRA_SRAS#[8]
DDRA_SCAS#[8]
DDRA_SWE#[8]
C9
0.01U_0402_25V7KC90.01U_0402_25V7K
C8
C8
2
1000P_0402_50V7K
1000P_0402_50V7K
JCPU1B
Place them
close to CPU
within 1"
R4 39.2_0402_1%R4 39.2_0402_1%
1 2
1 2
R5 39.2_0402_1%R5 39.2_0402_1%
DDRA_SCS0#
DDRA_SCS1# DDRB_SCS0#
DDRA_CKE0
DDRA_CKE1
DDRA_CLK0
DDRA_CLK0#
DDRA_CLK1
DDRA_CLK1#
MEM_MA_RST#
DDRA_ODT0
DDRA_ODT1
DDRA_SMA0
DDRA_SMA1
DDRA_SMA2
DDRA_SMA3
DDRA_SMA4
DDRA_SMA5
DDRA_SMA6
DDRA_SMA7
DDRA_SMA8
DDRA_SMA9
DDRA_SMA10
DDRA_SMA11
DDRA_SMA12
DDRA_SMA13
DDRA_SMA14
DDRA_SMA15
DDRA_SBS0#
DDRA_SBS1#
DDRA_SBS2#
DDRA_SRAS#
DDRA_SCAS#
DDRA_SWE#
MEMZP
MEMZN
JCPU1B
1.5A
D10
VDDR1
C10
VDDR2
B10
VDDR3
AD10
VDDR4
AF10
MEMZP
AE10
MEMZN
H16
MA_RESET_L
T19
MA0_ODT0
V22
MA0_ODT1
U21
MA1_ODT0
V19
MA1_ODT1
T20
MA0_CS_L0
U19
MA0_CS_L1
U20
MA1_CS_L0
V20
MA1_CS_L1
J22
MA_CKE0
J20
MA_CKE1
N19
MA_CLK_H5
N20
MA_CLK_L5
E16
MA_CLK_H1
F16
MA_CLK_L1
Y16
MA_CLK_H7
AA16
MA_CLK_L7
P19
MA_CLK_H4
P20
MA_CLK_L4
N21
MA_ADD0
M20
MA_ADD1
N22
MA_ADD2
M19
MA_ADD3
M22
MA_ADD4
L20
MA_ADD5
M24
MA_ADD6
L21
MA_ADD7
L19
MA_ADD8
K22
MA_ADD9
R21
MA_ADD10
L22
MA_ADD11
K20
MA_ADD12
V24
MA_ADD13
K24
MA_ADD14
K19
MA_ADD15
R20
MA_BANK0
R23
MA_BANK1
J21
MA_BANK2
R19
MA_RAS_L
T22
MA_CAS_L
T24
MA_WE_L
FOX_PZ6382A-284S-41F_Champlian
FOX_PZ6382A-284S-41F_Champlian
ME@
ME@
MEM:CMD/CTRL/CLK
MEM:CMD/CTRL/CLK
VDDR_SENSE
MEMVREF
MB_RESET_L
MB0_ODT0
MB0_ODT1
MB1_ODT0
MB0_CS_L0
MB0_CS_L1
MB1_CS_L0
MB_CKE0
MB_CKE1
MB_CLK_H5
MB_CLK_L5
MB_CLK_H1
MB_CLK_L1
MB_CLK_H7
MB_CLK_L7
MB_CLK_H4
MB_CLK_L4
MB_ADD0
MB_ADD1
MB_ADD2
MB_ADD3
MB_ADD4
MB_ADD5
MB_ADD6
MB_ADD7
MB_ADD8
MB_ADD9
MB_ADD10
MB_ADD11
MB_ADD12
MB_ADD13
MB_ADD14
MB_ADD15
MB_BANK0
MB_BANK1
MB_BANK2
MB_RAS_L
MB_CAS_L
MB_WE_L
VDDR5
VDDR6
VDDR7
VDDR8
VDDR9
W10
AC10
AB10
AA10
A10
Y10
W17
B18
W26
W23
Y26
V26
W25
U22
J25
H26
P22
R22
A17
A18
AF18
AF17
R26
R25
P24
N24
P26
N23
N26
L23
N25
L24
M26
K26
T26
L26
L25
W24
J23
J24
R24
U26
J26
U25
U24
U23
+CPU_VDDR+CPU_VDDR
FOR DDR3 1066, VDDR is 0.9V
FOR DDR3 1333, VDDR it should be 1.05V
VTT_SENSE
MEM_VREF
MEM_MB_RST#
DDRB_ODT0
DDRB_ODT1
DDRB_SCS1#
DDRB_CKE0
DDRB_CKE1
DDRB_CLK0
DDRB_CLK0#
DDRB_CLK1
DDRB_CLK1#
DDRB_SMA0
DDRB_SMA1
DDRB_SMA2
DDRB_SMA3
DDRB_SMA4
DDRB_SMA5
DDRB_SMA6
DDRB_SMA7
DDRB_SMA8
DDRB_SMA9
DDRB_SMA10
DDRB_SMA11
DDRB_SMA12
DDRB_SMA13
DDRB_SMA14
DDRB_SMA15
DDRB_SBS0#
DDRB_SBS1#
DDRB_SBS2#
DDRB_SRAS#
DDRB_SCAS#
DDRB_SWE#
T1PAD T1PAD
MEM_MB_RST# [9]
DDRB_ODT0 [9]
DDRB_ODT1 [9]
DDRB_SCS1# [9]
DDRB_CKE0 [9]
DDRB_CKE1 [9]
DDRB_CLK0 [9]
DDRB_CLK0# [9]
DDRB_CLK1 [9]
DDRB_CLK1# [9]
DDRB_SBS0# [9]
DDRB_SBS1# [9]
DDRB_SBS2# [9]
DDRB_SRAS# [9]
DDRB_SCAS# [9]
DDRB_SWE# [9]
DDRB_SDM[7..0][9] DDRA_SDM[7..0] [8]
DDRB_SDQS0[9]
DDRB_SDQS0#[9]
DDRB_SDQS1[9]
DDRB_SDQS1#[9]
DDRB_SDQS2[9]
DDRB_SDQS2#[9]
DDRB_SDQS3[9]
DDRB_SDQS3#[9]
DDRB_SDQS4[9]
DDRB_SDQS4#[9]
DDRB_SDQS5[9]
DDRB_SDQS5#[9]
DDRB_SDQS6[9]
DDRB_SDQS6#[9]
DDRB_SDQS7[9]
DDRB_SDQS7#[9]
DDRB_SDQ0
DDRB_SDQ1
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ4
DDRB_SDQ5
DDRB_SDQ6
DDRB_SDQ7
DDRB_SDQ8
DDRB_SDQ9
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDQ14
DDRB_SDQ15
DDRB_SDQ16
DDRB_SDQ17
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ20
DDRB_SDQ21
DDRB_SDQ22
DDRB_SDQ23
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDQ26
DDRB_SDQ27
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQ30
DDRB_SDQ31
DDRB_SDQ32
DDRB_SDQ33
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ36
DDRB_SDQ37
DDRB_SDQ38
DDRB_SDQ39
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQ46
DDRB_SDQ47
DDRB_SDQ48
DDRB_SDQ49
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ52
DDRB_SDQ53
DDRB_SDQ54
DDRB_SDQ55
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDQ58
DDRB_SDQ59
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQ62
DDRB_SDQ63
DDRB_SDM0
DDRB_SDM1
DDRB_SDM2
DDRB_SDM3
DDRB_SDM4
DDRB_SDM5
DDRB_SDM6
DDRB_SDM7
DDRB_SDQS0
DDRB_SDQS0#
DDRB_SDQS1
DDRB_SDQS1#
DDRB_SDQS2
DDRB_SDQS2#
DDRB_SDQS3
DDRB_SDQS3#
DDRB_SDQS4
DDRB_SDQS4#
DDRB_SDQS5
DDRB_SDQS5#
DDRB_SDQS6
DDRB_SDQS6#
DDRB_SDQS7
DDRB_SDQS7#
JCPU1C
MEM:DATA
C11
MB_DATA0
A11
MB_DATA1
A14
MB_DATA2
B14
MB_DATA3
G11
MB_DATA4
E11
MB_DATA5
D12
MB_DATA6
A13
MB_DATA7
A15
MB_DATA8
A16
MB_DATA9
A19
MB_DATA10
A20
MB_DATA11
C14
MB_DATA12
D14
MB_DATA13
C18
MB_DATA14
D18
MB_DATA15
D20
MB_DATA16
A21
MB_DATA17
D24
MB_DATA18
C25
MB_DATA19
B20
MB_DATA20
C20
MB_DATA21
B24
MB_DATA22
C24
MB_DATA23
E23
MB_DATA24
E24
MB_DATA25
G25
MB_DATA26
G26
MB_DATA27
C26
MB_DATA28
D26
MB_DATA29
G23
MB_DATA30
G24
MB_DATA31
AA24
MB_DATA32
AA23
MB_DATA33
AD24
MB_DATA34
AE24
MB_DATA35
AA26
MB_DATA36
AA25
MB_DATA37
AD26
MB_DATA38
AE25
MB_DATA39
AC22
MB_DATA40
AD22
MB_DATA41
AE20
MB_DATA42
AF20
MB_DATA43
AF24
MB_DATA44
AF23
MB_DATA45
AC20
MB_DATA46
AD20
MB_DATA47
AD18
MB_DATA48
AE18
MB_DATA49
AC14
MB_DATA50
AD14
MB_DATA51
AF19
MB_DATA52
AC18
MB_DATA53
AF16
MB_DATA54
AF15
MB_DATA55
AF13
MB_DATA56
AC12
MB_DATA57
AB11
MB_DATA58
Y11
MB_DATA59
AE14
MB_DATA60
AF14
MB_DATA61
AF11
MB_DATA62
AD11
MB_DATA63
A12
MB_DM0
B16
MB_DM1
A22
MB_DM2
E25
MB_DM3
AB26
MB_DM4
AE22
MB_DM5
AC16
MB_DM6
AD12
MB_DM7
C12
MB_DQS_H0
B12
MB_DQS_L0
D16
MB_DQS_H1
C16
MB_DQS_L1
A24
MB_DQS_H2
A23
MB_DQS_L2
F26
MB_DQS_H3
E26
MB_DQS_L3
AC25
MB_DQS_H4
AC26
MB_DQS_L4
AF21
MB_DQS_H5
AF22
MB_DQS_L5
AE16
MB_DQS_H6
AD16
MB_DQS_L6
AF12
MB_DQS_H7
AE12
MB_DQS_L7
FOX_PZ6382A-284S-41F_Champlian
FOX_PZ6382A-284S-41F_Champlian
ME@
ME@
MEM:DATA
MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63
MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7
MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7
G12
F12
H14
G14
H11
H12
C13
E13
H15
E15
E17
H17
E14
F14
C17
G17
G18
C19
D22
E20
E18
F18
B22
C23
F20
F22
H24
J19
E21
E22
H20
H22
Y24
AB24
AB22
AA21
W22
W21
Y22
AA22
Y20
AA20
AA18
AB18
AB21
AD21
AD19
Y18
AD17
W16
W14
Y14
Y17
AB17
AB15
AD15
AB13
AD13
Y12
W11
AB14
AA14
AB12
AA12
E12
C15
E19
F24
AC24
Y19
AB16
Y13
G13
H13
G16
G15
C22
C21
G22
G21
AD23
AC23
AB19
AB20
Y15
W15
W12
W13
DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQ2
DDRA_SDQ3
DDRA_SDQ4
DDRA_SDQ5
DDRA_SDQ6
DDRA_SDQ7
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDQ14
DDRA_SDQ15
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ20
DDRA_SDQ21
DDRA_SDQ22
DDRA_SDQ23
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDQ26
DDRA_SDQ27
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQ30
DDRA_SDQ31
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDQ58
DDRA_SDQ59
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQ62
DDRA_SDQ63
DDRA_SDM0
DDRA_SDM1
DDRA_SDM2
DDRA_SDM3
DDRA_SDM4
DDRA_SDM5
DDRA_SDM6
DDRA_SDM7
DDRA_SDQS0
DDRA_SDQS0#
DDRA_SDQS1
DDRA_SDQS1#
DDRA_SDQS2
DDRA_SDQS2#
DDRA_SDQS3
DDRA_SDQS3#
DDRA_SDQS4
DDRA_SDQS4#
DDRA_SDQS5
DDRA_SDQS5#
DDRA_SDQS6
DDRA_SDQS6#
DDRA_SDQS7
DDRA_SDQS7#
DDRA_SDQ[63..0] [8]
DDRA_SDQS0 [8]
DDRA_SDQS0# [8]
DDRA_SDQS1 [8]
DDRA_SDQS1# [8]
DDRA_SDQS2 [8]
DDRA_SDQS2# [8]
DDRA_SDQS3 [8]
DDRA_SDQS3# [8]
DDRA_SDQS4 [8]
DDRA_SDQS4# [8]
DDRA_SDQS5 [8]
DDRA_SDQS5# [8]
DDRA_SDQS6 [8]
DDRA_SDQS6# [8]
DDRA_SDQS7 [8]
DDRA_SDQS7# [8]
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2010/03/12
2008/10/06 2010/03/12
2008/10/06 2010/03/12
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
AMD CPU S1G4 DDRII I/F
AMD CPU S1G4 DDRII I/F
AMD CPU S1G4 DDRII I/F
NAWE6 LA-5754P
NAWE6 LA-5754P
NAWE6 LA-5754P
547Monday, March 01, 2010
547Monday, March 01, 2010
547Monday, March 01, 2010
E
0.2
0.2
0.2
of
of
of
A
B
C
D
E
Champlain: C1E
C1E: LDT_REQ# no connect
CLMC: LDT_REQ# connect to NB
LDT_RES# / MEMHOT#
no support in S1g4
1K_0402_5%
1K_0402_5%
JCPU1D
JCPU1D
F8
VDDA1
F9
VDDA2
A9
CLKIN_H
A8
CLKIN_L
B7
RESET_L
A7
PWROK
F10
LDTSTOP_L
C6
LDTREQ_L
AF4
SIC
AF5
SID
AE6
ALERT_L
R6
HT_REF0
P6
HT_REF1
F6
VDD0_FB_H
E6
VDD0_FB_L
Y6
VDD1_FB_H
AB6
VDD1_FB_L
G10
DBRDY
AA9
TMS
AC9
TCK
AD9
TRST_L
AF9
TDI
AD7
TEST23
H10
TEST18
G9
TEST19
E9
TEST25_H
E8
TEST25_L
AB8
TEST21
AF7
TEST20
AE7
TEST24
AE8
TEST22
AC8
TEST12
AF8
TEST27
C2
TEST9
AA6
TEST6
A3
RSVD1
A5
RSVD2
B3
RSVD3
B5
RSVD4
C1
RSVD5
FOX_PZ6382A-284S-41F_Champlian
FOX_PZ6382A-284S-41F_Champlian
ME@
ME@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
CPU_DBREQ#
CPU_TCK
CPU_TDI
CPU_TMS
CPU_TRST#
CPU_DBRDY
CPU_TDO
C
THERMTRIP_L
PROCHOT_L
VDDIO_FB_H
VDDIO_FB_L
VDDNB_FB_H
VDDNB_FB_L
M11
VSS
W18
RSVD11
MEMHOT_L
THERMDC
THERMDA
DBREQ_L
TEST28_H
TEST28_L
TEST17
TEST16
TEST15
TEST14
TEST10
TEST29_H
TEST29_L
RSVD10
RSVD9
RSVD8
RSVD7
RSVD6
CPU_SVC
A6
SVC
CPU_SVD
A4
SVD
AF6
AC7
AA8
THERMDC_CPU
W7
THERMDA_CPU
W8
VDDIO_FB_H
W9
VDDIO_FB_L
Y9
CPU_VDDNB_FB_H
H6
CPU_VDDNB_FB_L
G6
CPU_DBREQ#
E10
CPU_TDO
AE9
TDO
J7
H8
CPU_TEST17
D7
CPU_TEST16
E7
CPU_TEST15
F7
CPU_TEST14
C7
C3
TEST7
K8
C4
TEST8
CPU_TEST29_H_FBCLKOUT_P
C9
CPU_TEST29_L_FBCLKOUT_N
C8
H18
H19
AA7
D5
C5
+1.5V
R39300_0402_5%
R39300_0402_5%
R38220_0402_5%
R38220_0402_5%
R36220_0402_5%
R36220_0402_5%
R37220_0402_5%
R37220_0402_5%
12
12
12
12
@
@
@
@
@
@
@
@
2008/10/06 2010/03/12
2008/10/06 2010/03/12
2008/10/06 2010/03/12
CPU_SVC [47]
CPU_SVD [47]
CPU_THERMTRIP#_R
H_PROCHOT#
T3PAD T3PAD
R40300_0402_5% R40300_0402_5%
1 2
HDT_RST#
+1.5V
Compal Secret Data
Compal Secret Data
Compal Secret Data
CPU_VDDNB_FB_H [47]
CPU_VDDNB_FB_L [47]
R25 80.6_0402_1%R25 80.6_0402_1%
JP17
JP17
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
ACES_87212-12G0
ACES_87212-12G0
ME@
ME@
Deciphered Date
Deciphered Date
Deciphered Date
PROCHOT:
Input: For HTC Function
Output: Over Temperature Condition
T14PAD T14PAD
T16PAD T16PAD
T5PAD T5PAD
T6PAD T6PAD
T7PAD T7PAD
T8PAD T8PAD
GND
GND
12
13
14
+1.5V
D
CPU_THERMTRIP#_R
1 2
R11 300_0402_5%R11 300_0402_5%
H_PROCHOT#
HDT_RST#
VB
U2
U2
4
1 2
@
@
+1.1VS
EC_SMB_CK2
8
EC_SMB_DA2
7
6
5
SB_SID
EC_SMB_DA2
SB_SIC
EC_SMB_CK2
+2.5VDDA
3300P_0402_50V7K
3300P_0402_50V7K
1
C124.7U_0805_10V4Z C124.7U_0805_10V4Z
2
+1.5V
+1.5V
1 2
R12 1K_0402_5%R12 1K_0402_5%
1 2
R14 1K_0402_5%R14 1K_0402_5%
R15 44.2_0402_1%R15 44.2_0402_1%
R16 44.2_0402_1%R16 44.2_0402_1%
SB_SID [21]
SB_SIC [21]
B
1
1
C13
C13
2
2
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
1 2
1 2
CPU_VDD0_FB_H[47]
CPU_VDD0_FB_L[47]
CPU_VDD1_FB_H[47]
CPU_VDD1_FB_L[47]
EC_SMB_CK2 [14,31,34]
EC_SMB_DA2 [14,31,34]
VDDA=0.25A
C14
C14
0.22U_0603_16V4Z
0.22U_0603_16V4Z
LDT_RST#
H_PWRGD
LDT_STOP#
T2 PADT2 PAD
CPU_SIC
CPU_SID
CPU_DBRDY
CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI
CPU_TEST21
CPU_TEST20
CPU_TEST24
CPU_TEST22
CPU_TEST12
CPU_TEST27
1 2
R24 0_0402_5%R24 0_0402_5%
T0 SB
TO EC
T0 SB
TO EC
CPU_HTREF0
CPU_HTREF1
CPU_TEST23
CPU_TEST18
CPU_TEST19
CPU_TEST25H
CPU_TEST25L
L1
+2.5VS
1 1
CLK_CPU_BCLK[19]
CLK_CPU_BCLK#[19]
+1.5VS
R17
R17
300_0402_5%
300_0402_5%
1 2
LDT_RST#[20]
2 2
H_PWRGD[20]
3 3
LDT_RST#
1
C17
C17
0.01U_0402_25V4Z
0.01U_0402_25V4Z
@
@
2
+1.5VS
+3VS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C21 3300P_0402_50V7KC21 3300P_0402_50V7K
LDT_STOP#[11,20]
R21
R21
300_0402_5%
300_0402_5%
1 2
H_PWRGD
1
C19
C19
0.01U_0402_25V4Z
0.01U_0402_25V4Z
@
@
2
1
C20
C20
2
1 2
TI
TMP411ADGKR MSOP 8P
SA00002DE10
Address: 100 1100
THERMDA_CPU
THERMDC_CPU
CPU internal thermal sensor
1 2
R41
R41
@
@
+3VS
20K_0402_5%
20K_0402_5%
4 4
CPU_SID
CPU_SIC
C22 0.1U_0402_16V4Z@C22 0.1U_0402_16V4Z@
R42
@R42
@
12
34.8K_0402_1%
34.8K_0402_1%
G
G
2
13
D
S
D
S
Q2 FDV301N_NL_SOT23-3
Q2 FDV301N_NL_SOT23-3
@
@
G
G
2
13
D
S
D
S
Q3 FDV301N_NL_SOT23-3
Q3 FDV301N_NL_SOT23-3
@
@
A
12
EC_SMB_DA
EC_SMB_CK
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
1
+
+
C11
C11
150U_B_6.3VM_R40M
150U_B_6.3VM_R40M
2
1 2
C16
C16
1 2
C15 3900P_0402_50V7KC15 3900P_0402_50V7K
+1.5VS
1 2
LDT_STOP#
1
C18
C18
0.01U_0402_25V4Z
0.01U_0402_25V4Z
2
U1
U1
1
VDD
2
D+
3
D-
THERM#4GND
EMC1402-1-ACZL-TR-MSOP-8P
EMC1402-1-ACZL-TR-MSOP-8P
EMC1402-1
(SA00001Z700)
Address 100_1100b
S IC EMC1402-1-AC ZL-TR MSOP 8P SENSOR
VB
FDV301N, the Vgs is:
min = 0.65V
Typ = 0.85V
Max = 1.5V
2.09V for Gate
1 2
R44 0_0402_5%
R44 0_0402_5%
1 2
R45 0_0402_5%
R45 0_0402_5%
1 2
R46 0_0402_5%
R46 0_0402_5%
1 2
R47 0_0402_5%
R47 0_0402_5%
1 2
3900P_0402_50V7K
3900P_0402_50V7K
12
R10
R10
169_0402_1%
169_0402_1%
R18
R18
300_0402_5%
300_0402_5%
@
@
SCLK
SDATA
ALERT#
@
@
@
@
@
@
@
@
L1
+1.5V
12
R6
R6
10K_0402_5%
R7
R7
MMBT3904_NL_SOT23-3
MMBT3904_NL_SOT23-3
CPU_SVC
CPU_SVD
CPU_TEST25H
CPU_TEST25L
CPU_TEST27
CPU_TEST12
CPU_TEST18
CPU_TEST19
CPU_TEST20
CPU_TEST21
CPU_TEST22
CPU_TEST24
CPU_TEST23
R43
R43
+3VS
Y
10K_0402_5%
B
B
2
1 2
Q1
Q1
E
E
3 1
R22 510_0402_5%R22 510_0402_5%
R23 510_0402_5%@R23 510_0402_5%@
R26 510_0402_5%@R26 510_0402_5%@
R27 510_0402_5%R27 510_0402_5%
R28 1K_0402_5%R28 1K_0402_5%
1 2
C
C
R8 0_0402_5%R8 0_0402_5%
1 2
R9 0_0402_5%@R9 0_0402_5%@
1 2
R13 0_0402_5%R13 0_0402_5%
1 2
R71 0_0402_5%@R71 0_0402_5%@
1 2
R19 1K_0402_5%R19 1K_0402_5%
1 2
R20 1K_0402_5%R20 1K_0402_5%
1 2
1 2
1 2
1 2
1 2
H_THERMTRIP# [21]
MAINPWON [39,40,42]
H_PROCHOT_R# [20]
EC_PROCHOT# [34]
+1.5V
+1.5V
+1.5V
+1.5V
For SCAN connect use
1 2
R29 1K_0402_5%R29 1K_0402_5%
1 2
R30 1K_0402_5%R30 1K_0402_5%
1 2
R31 1K_0402_5%R31 1K_0402_5%
1 2
R32 1K_0402_5%R32 1K_0402_5%
1 2
R33 1K_0402_5%R33 1K_0402_5%
1 2
R34 1K_0402_5%R34 1K_0402_5%
1 2
R35 1K_0402_5%R35 1K_0402_5%
1 2
R265 1K_0402_5%R265 1K_0402_5%
0_0402_5%@
0_0402_5%@
5
2
P
B
1
A
G
NC7SZ08P5X_NL_SC70-5
NC7SZ08P5X_NL_SC70-5
3
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
LDT_RST#
SB_PWRGD [11,21,34]
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
AMD CPU S1G4 CTRL
AMD CPU S1G4 CTRL
AMD CPU S1G4 CTRL
NAWE6 LA-5754P
NAWE6 LA-5754P
NAWE6 LA-5754P
E
647Tuesday, March 02, 2010
647Tuesday, March 02, 2010
647Tuesday, March 02, 2010
0.2
0.2
0.2
of
of
of
A
VDD(+CPU_CORE) decoupling.
+CPU_CORE
1
+
+
C23
1 1
C23
330U_X_2VM_R6M
330U_X_2VM_R6M
2
1
+
C24
@+C24
@
330U_X_2VM_R6M
330U_X_2VM_R6M
2
Near CPU Socket
+CPU_CORE
1
C28
C28
22U_0805_6.3V6M
22U_0805_6.3V6M
2
+CPU_CORE
1
C36
C36
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
2 2
1
C29
C29
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C37
C37
0.01U_0402_25V4Z
0.01U_0402_25V4Z
2
1
C30
C30
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C38
C38
180P_0402_50V8J
180P_0402_50V8J
2
1
C35
C35
22U_0805_6.3V6M
22U_0805_6.3V6M
2
Under CPU Socket
VDDIO decoupling.
+1.5V
1
C44
C44
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C45
C45
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C46
C46
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
Under CPU Socket
1
C47
C47
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
+
+
C25
C25
330U_X_2VM_R6M
330U_X_2VM_R6M
2
B
+CPU_CORE
1
C31
C31
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C48
C48
180P_0402_50V8J
180P_0402_50V8J
2
1
+
+
C26
C26
330U_X_2VM_R6M
330U_X_2VM_R6M
2
+CPU_CORE
1
C50
C50
180P_0402_50V8J
180P_0402_50V8J
2
1
C32
C32
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C39
C39
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
C
1
+
+
C27
C27
330U_X_2VM_R6M
330U_X_2VM_R6M
2
1
2
1
2
C33
C33
22U_0805_6.3V6M
22U_0805_6.3V6M
C40
C40
0.01U_0402_25V4Z
0.01U_0402_25V4Z
1
C34
C34
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C41
C41
180P_0402_50V8J
180P_0402_50V8J
2
+CPU_CORE
+CPU_CORE_NB
+1.5V
4A
G4
H2
J11
J13
J15
K6
K10
K12
K14
L11
L13
L15
M2
M6
M8
M10
N7
N9
N11
K16
M16
P16
T16
V16
H25
J17
K18
K21
K23
K25
L17
M18
M21
M23
M25
N17
Athlon 64 S1
Processor Socket
+CPU_CORE_NB decoupling.
+CPU_CORE_NB
1
C42
C42
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C43
C43
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C49
C49
22U_0805_6.3V6M
22U_0805_6.3V6M
2
JCPU1E
JCPU1E
VDD0_1
VDD0_2
J9
VDD0_3
VDD0_4
VDD0_5
VDD0_6
VDD0_7
VDD0_8
VDD0_9
VDD0_10
L4
VDD0_11
L7
VDD0_12
L9
VDD0_13
VDD0_14
VDD0_15
VDD0_16
VDD0_17
VDD0_18
VDD0_19
VDD0_20
VDD0_21
VDD0_22
VDD0_23
VDDNB_1
VDDNB_2
VDDNB_3
VDDNB_4
VDDNB_5
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
FOX_PZ6382A-284S-41F_Champlian
FOX_PZ6382A-284S-41F_Champlian
ME@
ME@
VDD1_1
VDD1_2
VDD1_3
VDD1_4
VDD1_5
VDD1_6
VDD1_7
VDD1_8
VDD1_9
VDD1_10
VDD1_11
VDD1_12
VDD1_13
VDD1_14
VDD1_15
VDD1_16
VDD1_17
VDD1_18
VDD1_19
VDD1_20
VDD1_21
VDD1_22
VDD1_23
VDD1_24
VDD1_25
VDD1_26
VDDIO27
VDDIO26
VDDIO25
VDDIO24
VDDIO23
VDDIO22
VDDIO21
VDDIO20
VDDIO19
VDDIO18
VDDIO17
VDDIO16
VDDIO15
VDDIO14
VDDIO13
D
JCPU1F
JCPU1F
AA4
VSS1
AA11
VSS2
AA13
VSS3
AA15
VSS4
AA17
VSS5
AA19
VSS6
AB2
VSS7
AB7
VSS8
AB9
VSS9
AB23
VSS10
AB25
VSS11
AC11
VSS12
AC13
VSS13
AC15
VSS14
AC17
VSS15
AC19
VSS16
AC21
VSS17
AD6
VSS18
AD8
VSS19
AD25
VSS20
AE11
VSS21
AE13
VSS22
AE15
VSS23
AE17
VSS24
AE19
VSS25
AE21
VSS26
AE23
VSS27
B4
VSS28
B6
VSS29
B8
VSS30
B9
VSS31
B11
VSS32
B13
VSS33
B15
VSS34
B17
VSS35
B19
VSS36
B21
VSS37
B23
VSS38
B25
VSS39
D6
VSS40
D8
VSS41
D9
VSS42
D11
VSS43
D13
VSS44
D15
VSS45
D17
VSS46
D19
VSS47
D21
VSS48
D23
VSS49
D25
VSS50
E4
VSS51
F2
VSS52
F11
VSS53
F13
VSS54
F15
VSS55
F17
VSS56
F19
VSS57
F21
VSS58
F23
VSS59
F25
VSS60
H7
VSS61
H9
VSS62
H21
VSS63
H23
VSS64
J4
VSS65
FOX_PZ6382A-284S-41F_Champlian
FOX_PZ6382A-284S-41F_Champlian
Athlon 64 S1
ME@
ME@
Processor Socket
P8
P10
R4
R7
R9
R11
T2
T6
T8
T10
T12
T14
U7
U9
U11
U13
U15
V6
V8
V10
V12
V14
W4
Y2
AC4
AD2
Y25
V25
V23
V21
V18
U17
T25
T23
T21
T18
R17
P25
P23
P21
P18
36A
TBD
+CPU_CORE
+1.5V
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
E
J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
AC6
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6
3 3
4 4
+1.5V
1
C51
C51
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
+1.5V +1.5V
1
C64
C64
0.01U_0402_25V4Z
0.01U_0402_25V4Z
2
+1.5V
1
2
Between CPU Socket and DIMM
C71
C71
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1
C52
C52
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C65
C65
0.01U_0402_25V4Z
0.01U_0402_25V4Z
2
1
C72
C72
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
1
C53
C53
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
180PF Qt'y follow the distance between
CPU socket and DIMM0. <2.5inch>
2
C66
C66
0.1U_0402_16V7K
0.1U_0402_16V7K
1
1
C73
C73
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
1
C54
C54
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
2
C67
C67
0.1U_0402_16V7K
0.1U_0402_16V7K
1
1
C74
C74
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
1
C354
C354
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C68
C68
180P_0402_50V8J
180P_0402_50V8J
2
1
+
+
C75
C75
330U_X_2VM_R6M
330U_X_2VM_R6M
2
1
C355
C355
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C69
C69
180P_0402_50V8J
180P_0402_50V8J
2
VDDR decoupling.
+CPU_VDDR
1
C57
C57
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
+CPU_VDDR
1
C76
C76
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
1
C58
C58
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
1
C59
C59
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
Near CPU Socket Right side.
1
C77
C77
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
1
C78
C78
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
+CPU_VDDR
Near Power Supply
1
+
+
C56
C56
150U_B_6.3VM_R40M
150U_B_6.3VM_R40M
2
1
C60
C60
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C79
C79
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C55
C55
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C61
C61
1000P_0402_50V7K
1000P_0402_50V7K
2
1
C80
C80
1000P_0402_50V7K
1000P_0402_50V7K
2
1
C62
C62
1000P_0402_50V7K
1000P_0402_50V7K
2
1
C81
C81
1000P_0402_50V7K
1000P_0402_50V7K
2
1
C63
C63
180P_0402_50V8J
180P_0402_50V8J
2
1
C82
C82
180P_0402_50V8J
180P_0402_50V8J
2
1
C70
C70
180P_0402_50V8J
180P_0402_50V8J
2
1
C83
C83
180P_0402_50V8J
180P_0402_50V8J
2
Near CPU Socket Left side.
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2010/03/12
2008/10/06 2010/03/12
2008/10/06 2010/03/12
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
AMD CPU S1G4 PWR & GND
AMD CPU S1G4 PWR & GND
AMD CPU S1G4 PWR & GND
NAWE6 LA-5754P
NAWE6 LA-5754P
NAWE6 LA-5754P
E
of
of
of
747Monday, March 01, 2010
747Monday, March 01, 2010
747Monday, March 01, 2010
0.2
0.2
0.2
A
B
C
D
E
DQ4
DQ5
VSS3
DQ6
DQ7
DM1
DM2
CK1
CK1#
BA1
NC2
DM4
DM6
SDA
SCL
VTT2
+1.5V
2
DDRA_SDQ4
4
DDRA_SDQ5
6
8
DDRA_SDQS0#
10
DDRA_SDQS0
12
14
DDRA_SDQ6
16
DDRA_SDQ7
18
20
DDRA_SDQ12
22
DDRA_SDQ13
24
26
DDRA_SDM1
28
MEM_MA_RST#
30
32
DDRA_SDQ14
34
DDRA_SDQ15
36
38
DDRA_SDQ20
40
DDRA_SDQ21
42
44
DDRA_SDM2
46
48
DDRA_SDQ22
50
DDRA_SDQ23
52
54
DDRA_SDQ28
56
DDRA_SDQ29
58
60
DDRA_SDQS3#
62
DDRA_SDQS3
64
66
DDRA_SDQ30
68
DDRA_SDQ31
70
72
DDRA_CKE1
74
76
DDRA_SMA15
78
A15
A14
A11
A7
A6
A4
A2
A0
S0#
G2
B
DDRA_SMA14
80
82
DDRA_SMA11
84
DDRA_SMA7
86
88
DDRA_SMA6
90
DDRA_SMA4
92
94
DDRA_SMA2
96
DDRA_SMA0
98
100
DDRA_CLK1
102
DDRA_CLK1#
104
106
DDRA_SBS1#
108
DDRA_SRAS#
110
112
DDRA_SCS0#
114
116
118
DDRA_ODT1
120
122
124
126
128
DDRA_SDQ36
130
DDRA_SDQ37
132
134
DDRA_SDM4
136
138
DDRA_SDQ38
140
DDRA_SDQ39
142
144
DDRA_SDQ44
146
DDRA_SDQ45
148
150
DDRA_SDQS5#
152
DDRA_SDQS5
154
156
DDRA_SDQ46
158
DDRA_SDQ47
160
162
DDRA_SDQ52
164
DDRA_SDQ53
166
168
DDRA_SDM6
170
172
DDRA_SDQ54
174
DDRA_SDQ55
176
178
DDRA_SDQ60
180
DDRA_SDQ61
182
184
DDRA_SDQS7#
186
DDRA_SDQS7
188
190
DDRA_SDQ62
192
DDRA_SDQ63
194
196
198
200
202
204
206
T10PAD T10PAD
+0.75VS
DDRA_SDQS0# [5]
DDRA_SDQS0 [5]
MEM_MA_RST# [5]
DDRA_SDQS3# [5]
DDRA_SDQS3 [5]
DDRA_CKE1 [5]
DDRA_CLK1 [5]
DDRA_CLK1# [5]
DDRA_SBS1# [5]
DDRA_SRAS# [5]
DDRA_SCS0# [5]
DDRA_ODT1 [5]
+VREF_CA
1
C89
C89
1000P_0402_50V7K
1000P_0402_50V7K
2
DDRA_SDQS5# [5]
DDRA_SDQS5 [5]
DDRA_SDQS7# [5]
DDRA_SDQS7 [5]
SB_SMDAT0 [9,19,21,28]
SB_SMCLK0 [9,19,21,28]
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DDRA_SDQ[0..63]
DDRA_SDM[0..7]
DDRA_SMA[0..15]
2008/10/06 2010/03/12
2008/10/06 2010/03/12
2008/10/06 2010/03/12
C
+VREF_DQ
1
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDRA_SDQ[0..63] [5]
DDRA_SDM[0..7] [5]
DDRA_SMA[0..15] [5]
+VREF_DQ
0.01U_0402_25V7K
0.01U_0402_25V7K
2
C85
C85
C84
C84
@
@
1
+1.5V
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
C87
C87
1
1
+0.75VS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
C830
C830
1
1
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
1
C10
C10
2
1000P_0402_50V7K
1000P_0402_50V7K
C840
C840
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C835
C835
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
2
1
+1.5V
R48
R48
1K_0402_1%
1K_0402_1%
1 2
R49
R49
1K_0402_1%
1K_0402_1%
1 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C88
C88
1
C961
C961
2
2
C839
C839
1
D
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C836
C836
1
1
C235
C235
@
@
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C833
C833
1
+1.5V+VREF_CA
R310
R310
1K_0402_1%
1K_0402_1%
C838
C838
2
C837
C837
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 2
R315
R315
1K_0402_1%
1K_0402_1%
1 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C834
C834
2
C832
C832
1
+VREF_CA
0.01U_0402_25V7K
0.01U_0402_25V7K
2
C485
C485
1
2
C831
C831
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
1000P_0402_50V7K
1000P_0402_50V7K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
Place near DIMM1
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
DDRII SO-DIMM 1
DDRII SO-DIMM 1
DDRII SO-DIMM 1
NAWE6 LA-5754P
NAWE6 LA-5754P
NAWE6 LA-5754P
E
of
of
of
847Monday, March 01, 2010
847Monday, March 01, 2010
847Monday, March 01, 2010
0.2
0.2
0.2
+VREF_DQ
DDRA_SDQ0
DDRA_SDQ1
DDRA_SDM0
DDRA_SDQ2
1 1
DDRA_SDQS1#[5]
DDRA_SDQS1[5]
DDRA_SDQS2#[5]
DDRA_SDQS2[5]
DDRA_CKE0[5]
2 2
3 3
4 4
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
DDRA_SBS2#[5]
DDRA_CLK0[5]
DDRA_CLK0#[5]
DDRA_SBS0#[5]
DDRA_SWE#[5]
DDRA_SCAS#[5] DDRA_ODT0 [5]
DDRA_SCS1#[5]
DDRA_SDQS4#[5]
DDRA_SDQS4[5]
DDRA_SDQS6#[5]
DDRA_SDQS6[5]
+3VS
1
C90
C90
C91
C91
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
DDRA_SDQ3
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQS1#
DDRA_SDQS1
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQS2#
DDRA_SDQS2
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDM3
DDRA_SDQ26
DDRA_SDQ27
DDRA_CKE0
DDRA_SBS2#
DDRA_SMA12
DDRA_SMA9
DDRA_SMA8
DDRA_SMA5
DDRA_SMA3
DDRA_SMA1
DDRA_CLK0
DDRA_CLK0#
DDRA_SMA10
DDRA_SBS0#
DDRA_SWE#
DDRA_SCAS# DDRA_ODT0
DDRA_SMA13
DDRA_SCS1#
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQS4#
DDRA_SDQS4
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDM5
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQS6#
DDRA_SDQS6
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDM7
DDRA_SDQ58
DDRA_SDQ59
R50 10K_0402_5%
R50 10K_0402_5%
+3VS
1
2
1 2
R51
+1.5V
JDIMM1
JDIMM1
VREF_DQ1VSS1
3
VSS2
5
DQ0
7
DQ1
9
12
R51
10K_0402_5%
10K_0402_5%
VSS4
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
25
VSS9
27
DQS#1
DQS129RESET#
VSS1131VSS12
33
DQ10
35
DQ11
VSS1337VSS14
39
DQ16
41
DQ17
VSS1543VSS16
45
DQS#2
47
DQS2
49
VSS18
51
DQ18
53
DQ19
55
VSS20
57
DQ24
59
DQ25
VSS2261DQS#3
63
DM3
VSS2365VSS24
67
DQ26
69
DQ27
VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
83
A12/BC#
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
99
VDD9
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
SA1
203
VTT1
205
G1
FOX_AS0A626-U4RN-7F
FOX_AS0A626-U4RN-7F
ME@
ME@
DQS#0
DQS0
VSS6
VSS8
DQ12
DQ13
VSS10
DQ14
DQ15
DQ20
DQ21
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS3
DQ30
DQ31
CKE1
VDD2
VDD4
VDD6
VDD8
VDD10
VDD12
RAS#
VDD14
ODT0
VDD16
ODT1
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
DIMM_A Rervse H:4mm
<Address: 00>
A
A
B
C
D
E
DQ4
DQ5
VSS3
DQ6
DQ7
DM1
DM2
CK1
CK1#
BA1
NC2
DM4
DM6
SDA
SCL
VTT2
+1.5V+1.5V
2
DDRB_SDQ4
4
DDRB_SDQ5
6
8
DDRB_SDQS0#
10
DDRB_SDQS0
12
14
DDRB_SDQ6
16
DDRB_SDQ7
18
20
DDRB_SDQ12
22
DDRB_SDQ13
24
26
DDRB_SDM1
28
MEM_MB_RST#
30
32
DDRB_SDQ14
34
DDRB_SDQ15
36
38
DDRB_SDQ20
40
DDRB_SDQ21
42
44
DDRB_SDM2
46
48
DDRB_SDQ22
50
DDRB_SDQ23
52
54
DDRB_SDQ28
56
DDRB_SDQ29
58
60
DDRB_SDQS3#
62
DDRB_SDQS3
64
66
DDRB_SDQ30
68
DDRB_SDQ31
70
72
DDRB_CKE1
74
76
DDRB_SMA15
78
A15
A14
A11
A7
A6
A4
A2
A0
S0#
G2
DDRB_SMA14
80
82
DDRB_SMA11
84
DDRB_SMA7
86
88
DDRB_SMA6
90
DDRB_SMA4
92
94
DDRB_SMA2
96
DDRB_SMA0
98
100
DDRB_CLK1
102
DDRB_CLK1#
104
106
DDRB_SBS1#
108
DDRB_SRAS#
110
112
DDRB_SCS0#
114
DDRB_ODT0DDRB_SCAS#
116
118
DDRB_ODT1
120
122
124
126
128
DDRB_SDQ36
130
DDRB_SDQ37
132
134
DDRB_SDM4
136
138
DDRB_SDQ38
140
DDRB_SDQ39
142
144
DDRB_SDQ44
146
DDRB_SDQ45
148
150
DDRB_SDQS5#
152
DDRB_SDQS5
154
156
DDRB_SDQ46
158
DDRB_SDQ47
160
162
DDRB_SDQ52
164
DDRB_SDQ53
166
168
DDRB_SDM6
170
172
DDRB_SDQ54
174
DDRB_SDQ55
176
178
DDRB_SDQ60
180
DDRB_SDQ61
182
184
DDRB_SDQS7#
186
DDRB_SDQS7
188
190
DDRB_SDQ62
192
DDRB_SDQ63
194
196
198
200
202
204
206
T11PAD T11PAD
+0.75VS
DDRB_SDQS0# [5]
DDRB_SDQS0 [5]
MEM_MB_RST# [5]
DDRB_SDQS3# [5]
DDRB_SDQS3 [5]
DDRB_CKE1 [5]
DDRB_CLK1 [5]
DDRB_CLK1# [5]
DDRB_SBS1# [5]
DDRB_SRAS# [5]
DDRB_SCS0# [5]
DDRB_ODT0 [5]
DDRB_ODT1 [5]
1
C94
C94
1000P_0402_50V7K
1000P_0402_50V7K
2
DDRB_SDQS5# [5]
DDRB_SDQS5 [5]
DDRB_SDQS7# [5]
DDRB_SDQS7 [5]
SB_SMDAT0 [8,19,21,28]
SB_SMCLK0 [8,19,21,28]
+VREF_CA
DDRB_SDQ[0..63]
DDRB_SDM[0..7]
DDRB_SMA[0..15]
+VREF_DQ
+1.5V
2
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+0.75VS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C92
C92
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C846
C846
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C843
C843
1
DDRB_SDQ[0..63] [5]
DDRB_SDM[0..7] [5]
DDRB_SMA[0..15] [5]
+VREF_DQ
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C93
C93
2
2
C847
C847
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C841
C841
1
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1
2
1000P_0402_50V7K
1000P_0402_50V7K
2
C851
C851
1
1
C925
C925
2
+VREF_CA
C852
C852
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C848
C848
1
1
C486
C486
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
C854
C854
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.5V
1
+
+
C86
C86
330U_X_2VM_R6M@
330U_X_2VM_R6M@
2
+VREF_CA
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C487
C487
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C849
C849
1
Place near DIMM2
1
C844
C844
2
1000P_0402_50V7K
1000P_0402_50V7K
2
C842
C842
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C850
C850
1
2
C845
C845
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C853
C853
1
+VREF_DQ
DDRB_SDQ0
DDRB_SDQ1
DDRB_SDM0
DDRB_SDQ2
+3VS
DDRB_SDQ3
DDRB_SDQ8
DDRB_SDQ9
DDRB_SDQS1#
DDRB_SDQS1
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ16
DDRB_SDQ17
DDRB_SDQS2#
DDRB_SDQS2
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDM3
DDRB_SDQ26
DDRB_SDQ27
DDRB_CKE0
DDRB_SBS2#
DDRB_SMA12
DDRB_SMA9
DDRB_SMA8
DDRB_SMA5
DDRB_SMA3
DDRB_SMA1
DDRB_CLK0
DDRB_CLK0#
DDRB_SMA10
DDRB_SBS0#
DDRB_SWE#
DDRB_SMA13
DDRB_SCS1#
DDRB_SDQ32
DDRB_SDQ33
DDRB_SDQS4#
DDRB_SDQS4
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDM5
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ48
DDRB_SDQ49
DDRB_SDQS6#
DDRB_SDQS6
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDM7
DDRB_SDQ58
DDRB_SDQ59
R52 10K_0402_5%
R52 10K_0402_5%
1 2
12
R53
R53
10K_0402_5%
10K_0402_5%
1 1
DDRB_SDQS1#[5 ]
DDRB_SDQS1[5]
DDRB_SDQS2#[5 ]
DDRB_SDQS2[5]
DDRB_CKE0[5]
2 2
3 3
4 4
DDRB_SBS2#[5]
DDRB_CLK0[5]
DDRB_CLK0#[5]
DDRB_SBS0#[5]
DDRB_SWE#[5]
DDRB_SCAS#[5]
DDRB_SCS1#[5]
DDRB_SDQS4#[5 ]
DDRB_SDQS4[5]
DDRB_SDQS6#[5 ]
DDRB_SDQS6[5]
JDIMM2
JDIMM2
VREF_DQ1VSS1
3
VSS2
5
DQ0
7
DQ1
9
VSS4
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
25
VSS9
27
DQS#1
DQS129RESET#
VSS1131VSS12
33
DQ10
35
DQ11
VSS1337VSS14
39
DQ16
41
DQ17
VSS1543VSS16
45
DQS#2
47
DQS2
49
VSS18
51
DQ18
53
DQ19
55
VSS20
57
DQ24
59
DQ25
VSS2261DQS#3
63
DM3
VSS2365VSS24
67
DQ26
69
DQ27
VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
83
A12/BC#
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
99
VDD9
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
SA1
203
VTT1
205
G1
FOX_AS0A626-U8RN-7F
FOX_AS0A626-U8RN-7F
ME@
ME@
DQS#0
DQS0
VSS6
VSS8
DQ12
DQ13
VSS10
DQ14
DQ15
DQ20
DQ21
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS3
DQ30
DQ31
CKE1
VDD2
VDD4
VDD6
VDD8
VDD10
VDD12
RAS#
VDD14
ODT0
VDD16
ODT1
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
DIMM_B Reverse H:8mm
<Address: 01>
A
B
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2008/10/06 2010/03/12
2008/10/06 2010/03/12
2008/10/06 2010/03/12
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
DDRII SO-DIMM 2
DDRII SO-DIMM 2
DDRII SO-DIMM 2
NAWE6 LA-5754P
NAWE6 LA-5754P
NAWE6 LA-5754P
E
0.2
0.2
0.2
of
of
of
947Monday, March 01, 2010
947Monday, March 01, 2010
947Monday, March 01, 2010
A
B
C
D
E
PCIE_GTX_C_MRX_P[0..15][13]
PCIE_GTX_C_MRX_N[0..15][13]
1 1
PCIE_GTX_C_MRX_P[0..15]
PCIE_GTX_C_MRX_N[0..15]
http://hobi-elektronika.net
PCIE_MTX_C_GRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15] [13]
PCIE_MTX_C_GRX_N[0..15] [13]
UMA HDMI
PCIE_MTX_GRX_P0
PCIE_MTX_GRX_N0
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_N3
U3B
PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_P4
PCIE_PTX_C_IRX_P1[28]
PCIE_PTX_C_IRX_N1[28]
PCIE_PTX_C_IRX_P2[29]
PCIE_PTX_C_IRX_N2[29]
PCIE_PTX_C_IRX_P3[28]
PCIE_PTX_C_IRX_N3[28]
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_P15
PCIE_GTX_C_MRX_N15
SB_RX0P[20]
SB_RX0N[20]
SB_RX1P[20]
SB_RX1N[20]
SB_RX2P[20]
SB_RX2N[20]
SB_RX3P[20]
SB_RX3N[20]
2 2
3 3
U3B
D4
GFX_RX0P
C4
GFX_RX0N
A3
GFX_RX1P
B3
GFX_RX1N
C2
GFX_RX2P
C1
GFX_RX2N
E5
GFX_RX3P
F5
GFX_RX3N
G5
GFX_RX4P
G6
GFX_RX4N
H5
GFX_RX5P
H6
GFX_RX5N
J6
GFX_RX6P
J5
GFX_RX6N
J7
GFX_RX7P
J8
GFX_RX7N
L5
GFX_RX8P
L6
GFX_RX8N
M8
GFX_RX9P
L8
GFX_RX9N
P7
GFX_RX10P
M7
GFX_RX10N
P5
GFX_RX11P
M5
GFX_RX11N
R8
GFX_RX12P
P8
GFX_RX12N
R6
GFX_RX13P
R5
GFX_RX13N
P4
GFX_RX14P
P3
GFX_RX14N
T4
GFX_RX15P
T3
GFX_RX15N
AE3
GPP_RX0P
AD4
GPP_RX0N
AE2
GPP_RX1P
AD3
GPP_RX1N
AD1
GPP_RX2P
AD2
GPP_RX2N
V5
GPP_RX3P
W6
GPP_RX3N
U5
GPP_RX4P
U6
GPP_RX4N
U8
GPP_RX5P
U7
GPP_RX5N
AA8
SB_RX0P
Y8
SB_RX0N
AA7
SB_RX1P
Y7
SB_RX1N
AA5
SB_RX2P
AA6
SB_RX2N
W5
SB_RX3P
Y5
SB_RX3N
RS880M_FCBGA528
RS880M_FCBGA528
PART 2 OF 6
PART 2 OF 6
PCIE I/F GPP
PCIE I/F GPP
PCIE I/F SB
PCIE I/F SB
PCE_CALRP(PCE_BCALRP)
PCE_CALRN(PCE_BCALRN)
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
PCIE I/F GFX
PCIE I/F GFX
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_TX4P
GPP_TX4N
GPP_TX5P
GPP_TX5N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
PCIE_MTX_GRX_P0 PCIE_MTX_C_GRX_P0
A5
B5
PCIE_MTX_GRX_P1
A4
PCIE_MTX_GRX_N1 PCIE_MTX_C_GRX_N1
B4
PCIE_MTX_GRX_P2
C3
PCIE_MTX_GRX_N2
B2
PCIE_MTX_GRX_P3
D1
PCIE_MTX_GRX_N3
D2
PCIE_MTX_GRX_P4
E2
PCIE_MTX_GRX_N4
E1
PCIE_MTX_GRX_P5
F4
PCIE_MTX_GRX_N5 PCIE_MTX_C_GRX_N5
F3
PCIE_MTX_GRX_P6
F1
PCIE_MTX_GRX_N6
F2
PCIE_MTX_GRX_P7
H4
PCIE_MTX_GRX_N7 PCIE_MTX_C_GRX_N7
H3
PCIE_MTX_GRX_P8
H1
PCIE_MTX_GRX_N8 PCIE_MTX_C_GRX_N8
H2
PCIE_MTX_GRX_P9
J2
PCIE_MTX_GRX_N9
J1
PCIE_MTX_GRX_P10 PCIE_MTX_C_GRX_P10
K4
PCIE_MTX_GRX_N10
K3
PCIE_MTX_GRX_P11
K1
PCIE_MTX_GRX_N11
K2
PCIE_MTX_GRX_P12
M4
PCIE_MTX_GRX_N12
M3
PCIE_MTX_GRX_P13
M1
PCIE_MTX_GRX_N13 PCIE_MTX_C_GRX_N13
M2
PCIE_MTX_GRX_P14
N2
PCIE_MTX_GRX_N14
N1
PCIE_MTX_GRX_P15
P1
PCIE_MTX_GRX_N15 PCIE_MTX_C_GRX_N15
P2
AC1
AC2
PCIE_ITX_PRX_P1
AB4
PCIE_ITX_PRX_N1
AB3
PCIE_ITX_PRX_P2
AA2
PCIE_ITX_PRX_N2
AA1
PCIE_ITX_PRX_P3
Y1
PCIE_ITX_PRX_N3
Y2
Y4
Y3
V1
V2
SB_TX0P_C
AD7
SB_TX0N_C
AE7
SB_TX1P_C
AE6
SB_TX1N_C
AD6
SB_TX2P_C
AB6
SB_TX2N_C
AC6
SB_TX3P_C
AD5
SB_TX3N_C
AE5
AC8
AB8
C489 0.1U_0402_16V7KUMA@C489 0.1U_0402_16V7KUMA@
1 2
C490 0.1U_0402_16V7KUMA@C490 0.1U_0402_16V7KUMA@
1 2
C500 0.1U_0402_16V7KUMA@C500 0.1U_0402_16V7KUMA@
1 2
C498 0.1U_0402_16V7KUMA@C498 0.1U_0402_16V7KUMA@
1 2
Cap close NB
C96 0.1U_0402_16V7KDIS@C96 0.1U_0402_16V7KDIS@
1 2
C98 0.1U_0402_16V7KDIS@C98 0.1U_0402_16V7KDIS@
1 2
C100 0.1U_0402_16V7KDIS@C100 0.1U_0402_16V7KDIS@
1 2
C102 0.1U_0402_16V7KDIS@C102 0.1U_0402_16V7KDIS@
1 2
C104 0.1U_0402_16V7KDIS@C104 0.1U_0402_16V7KDIS@
1 2
C106 0.1U_0402_16V7KDIS@C106 0.1U_0402_16V7KDIS@
1 2
C108 0.1U_0402_16V7KDIS@C108 0.1U_0402_16V7KDIS@
1 2
C110 0.1U_0402_16V7KDIS@C110 0.1U_0402_16V7KDIS@
1 2
C112 0.1U_0402_16V7KDIS@C112 0.1U_0402_16V7KDIS@
1 2
C114 0.1U_0402_16V7KDIS@C114 0.1U_0402_16V7KDIS@
1 2
C116 0.1U_0402_16V7KDIS@C116 0.1U_0402_16V7KDIS@
1 2
C118 0.1U_0402_16V7KDIS@C118 0.1U_0402_16V7KDIS@
1 2
C120 0.1U_0402_16V7KDIS@C120 0.1U_0402_16V7KDIS@
1 2
C122 0.1U_0402_16V7KDIS@C122 0.1U_0402_16V7KDIS@
1 2
C124 0.1U_0402_16V7KDIS@C124 0.1U_0402_16V7KDIS@
1 2
C126 0.1U_0402_16V7KDIS@C126 0.1U_0402_16V7KDIS@
1 2
C201 0.1U_0402_16V7KC201 0.1U_0402_16V7K
1 2
C200 0.1U_0402_16V7KC200 0.1U_0402_16V7K
1 2
C482 0.1U_0402_16V7KC482 0.1U_0402_16V7K
1 2
C481 0.1U_0402_16V7KC481 0.1U_0402_16V7K
1 2
C484 0.1U_0402_16V7K3G@C484 0.1U_0402_16V7K3G@
1 2
C483 0.1U_0402_16V7K3G@C483 0.1U_0402_16V7K3G@
1 2
C133 0.1U_0402_16V7KC133 0.1U_0402_16V7K
1 2
C134 0.1U_0402_16V7KC134 0.1U_0402_16V7K
1 2
C135 0.1U_0402_16V7KC135 0.1U_0402_16V7K
1 2
C136 0.1U_0402_16V7KC136 0.1U_0402_16V7K
1 2
C137 0.1U_0402_16V7KC137 0.1U_0402_16V7K
1 2
C138 0.1U_0402_16V7KC138 0.1U_0402_16V7K
1 2
C139 0.1U_0402_16V7KC139 0.1U_0402_16V7K
1 2
C140 0.1U_0402_16V7KC140 0.1U_0402_16V7K
1 2
1 2
1 2
R59 1.27K_0402_1%R59 1.27K_0402_1%
R58 2K_0402_1%R58 2K_0402_1%
RS880 A11(SA000032710)
C488 0.1U_0402_16V7KUMA@C488 0.1U_0402_16V7KUMA@
1 2
C491 0.1U_0402_16V7KUMA@C491 0.1U_0402_16V7KUMA@
1 2
C497 0.1U_0402_16V7KUMA@C497 0.1U_0402_16V7KUMA@
1 2
C499 0.1U_0402_16V7KUMA@C499 0.1U_0402_16V7KUMA@
1 2
C95 0.1U_0402_16V7KDIS@C95 0.1U_0402_16V7KDIS@
1 2
C97 0.1U_0402_16V7KDIS@C97 0.1U_0402_16V7KDIS@
1 2
C99 0.1U_0402_16V7KDIS@C99 0.1U_0402_16V7KDIS@
1 2
C101 0.1U_0402_16V7KDIS@C101 0.1U_0402_16V7KDIS@
1 2
C103 0.1U_0402_16V7KDIS@C103 0.1U_0402_16V7KDIS@
1 2
C105 0.1U_0402_16V7KDIS@C105 0.1U_0402_16V7KDIS@
1 2
C107 0.1U_0402_16V7KDIS@C107 0.1U_0402_16V7KDIS@
1 2
C109 0.1U_0402_16V7KDIS@C109 0.1U_0402_16V7KDIS@
1 2
C111 0.1U_0402_16V7KDIS@C111 0.1U_0402_16V7KDIS@
1 2
C113 0.1U_0402_16V7KDIS@C113 0.1U_0402_16V7KDIS@
1 2
C115 0.1U_0402_16V7KDIS@C115 0.1U_0402_16V7KDIS@
1 2
C117 0.1U_0402_16V7KDIS@C117 0.1U_0402_16V7KDIS@
1 2
C119 0.1U_0402_16V7KDIS@C119 0.1U_0402_16V7KDIS@
1 2
C121 0.1U_0402_16V7KDIS@C121 0.1U_0402_16V7KDIS@
1 2
C123 0.1U_0402_16V7KDIS@C123 0.1U_0402_16V7KDIS@
1 2
C125 0.1U_0402_16V7KDIS@C125 0.1U_0402_16V7KDIS@
1 2
+1.1VS
UMA_HDMI_P0 [26]
UMA_HDMI_N0 [26]
UMA_HDMI_P1 [26]
UMA_HDMI_N1 [26]
UMA_HDMI_P2 [26]
UMA_HDMI_N2 [26]
UMA_HDMI_P3 [26]
UMA_HDMI_N3 [26]
PCIE_MTX_C_GRX_N0PCIE_MTX_GRX_N0
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_P15
PCIE_ITX_C_PRX_P1 [28]
PCIE_ITX_C_PRX_N1 [28]
PCIE_ITX_C_PRX_P2 [29]
PCIE_ITX_C_PRX_N2 [29]
PCIE_ITX_C_PRX_P3 [28]
PCIE_ITX_C_PRX_N3 [28]
SB_TX0P [20]
SB_TX0N [20]
SB_TX1P [20]
SB_TX1N [20]
SB_TX2P [20]
SB_TX2N [20]
SB_TX3P [20] H_CLKIN0 [4]
SB_TX3N [20]
WLAN
GLAN
WWAN
H_CLKOP0[4]
H_CLKON0[4]
H_CLKOP1[4]
H_CLKON1[4]
H_CTLOP0[4]
H_CTLON0[4]
H_CTLON1[4]
301_0402_1%
301_0402_1%
Place within 1" layout 1:2 Place within 1" layout 1:2
H_CADOP[0..15][4]
H_CADON[0..15][4] H_CADIN[0..15] [4]
H_CADOP0
H_CADON0
H_CADOP1
H_CADON1
H_CADOP2
H_CADON2
H_CADOP3
H_CADON3
H_CADOP4
H_CADON4
H_CADOP5
H_CADON5
H_CADOP6
H_CADON6
H_CADOP7
H_CADON7
H_CADOP8
H_CADON8
H_CADOP9
H_CADON9
H_CADOP10
H_CADON10
H_CADOP11
H_CADON11
H_CADOP12
H_CADON12
H_CADOP13
H_CADON13
H_CADOP14
H_CADON14
H_CADOP15
H_CADON15
H_CTLOP0
H_CTLON0
H_CTLOP1
H_CTLON1
HT_RXCALP
R60
R60
1 2
HT_RXCALN
H_CADON[0..15]
U3A
U3A
Y25
HT_RXCAD0P
Y24
HT_RXCAD0N
V22
HT_RXCAD1P
V23
HT_RXCAD1N
V25
HT_RXCAD2P
V24
HT_RXCAD2N
U24
HT_RXCAD3P
U25
HT_RXCAD3N
T25
HT_RXCAD4P
T24
HT_RXCAD4N
P22
HT_RXCAD5P
P23
HT_RXCAD5N
P25
HT_RXCAD6P
P24
HT_RXCAD6N
N24
HT_RXCAD7P
N25
HT_RXCAD7N
AC24
HT_RXCAD8P
AC25
HT_RXCAD8N
AB25
HT_RXCAD9P
AB24
HT_RXCAD9N
AA24
HT_RXCAD10P
AA25
HT_RXCAD10N
Y22
HT_RXCAD11P
Y23
HT_RXCAD11N
W21
HT_RXCAD12P
W20
HT_RXCAD12N
V21
HT_RXCAD13P
V20
HT_RXCAD13N
U20
HT_RXCAD14P
U21
HT_RXCAD14N
U19
HT_RXCAD15P
U18
HT_RXCAD15N
T22
HT_RXCLK0P
T23
HT_RXCLK0N
AB23
HT_RXCLK1P
AA22
HT_RXCLK1N
M22
HT_RXCTL0P
M23
HT_RXCTL0N
R21
HT_RXCTL1P
R20
HT_RXCTL1N
C23
HT_RXCALP
A24
HT_RXCALN
RS880M_FCBGA528
RS880M_FCBGA528
PART 1 OF 6
PART 1 OF 6
HYPER TRANSPORT CPU I/F
HYPER TRANSPORT CPU I/F
H_CADIP[0..15]H_CADOP[0..15]
H_CADIN[0..15]
HT_TXCAD0P
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD15P
HT_TXCAD15N
HT_TXCLK0P
HT_TXCLK0N
HT_TXCLK1P
HT_TXCLK1N
HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N
HT_TXCALP
HT_TXCALN
H_CADIP[0..15] [4]
D24
D25
E24
E25
F24
F25
F23
F22
H23
H22
J25
J24
K24
K25
K23
K22
F21
G21
G20
H21
H_CADIP10
J20
H_CADIN10
J21
H_CADIP11
J18
H_CADIN11
K17
H_CADIP12
L19
H_CADIN12
J19
H_CADIP13
M19
H_CADIN13
L18
H_CADIP14
M21
H_CADIN14
P21
H_CADIP15
P18
H_CADIN15
M18
H24
H25
L21
L20
H_CTLIP0
M24
H_CTLIN0
M25
H_CTLIP1
P19
H_CTLIN1
R18
HT_TXCALP
B24
HT_TXCALN
B25
H_CADIP0
H_CADIN0
H_CADIP1
H_CADIN1
H_CADIP2
H_CADIN2
H_CADIP3
H_CADIN3
H_CADIP4
H_CADIN4
H_CADIP5
H_CADIN5
H_CADIP6
H_CADIN6
H_CADIP7
H_CADIN7
H_CADIP8
H_CADIN8
H_CADIP9
H_CADIN9
H_CLKIP0 [4]
H_CLKIP1 [4]
H_CLKIN1 [4]
H_CTLIP0 [4]
H_CTLIN0 [4]
H_CTLIP1 [4]H_CTLOP1[4]
H_CTLIN1 [4]
R61
R61
1 2
301_0402_1%
301_0402_1%
RS880 A11(SA000032710)
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2010/03/12
2008/10/06 2010/03/12
2008/10/06 2010/03/12
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
RS880-HT/PCIE
RS880-HT/PCIE
RS880-HT/PCIE
NAWE6 LA-5754P
NAWE6 LA-5754P
NAWE6 LA-5754P
E
0.2
0.2
0.2
of
of
of
10 47Monday, March 01, 2010
10 47Monday, March 01, 2010
10 47Monday, March 01, 2010
A
B
C
D
E
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R417
+1.1VS
FBMA-L11-160808-221LMT 0603
FBMA-L11-160808-221LMT 0603
1 1
FBMA-L11-160808-221LMT 0603
FBMA-L11-160808-221LMT 0603
+1.8VS
FBMA-L11-160808-221LMT 0603
FBMA-L11-160808-221LMT 0603
2 2
3 3
+1.8VS
FBMA-L11-160808-221LMT 0603
FBMA-L11-160808-221LMT 0603
+3VS
R77 4.7K_0402_5%R77 4.7K_0402_5%
R78 4.7K_0402_5%R78 4.7K_0402_5%
R79 4.7K_0402_5%@R79 4.7K_0402_5%@
R80 4.7K_0402_5%@R80 4.7K_0402_5%@
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
CLK_NB_14.318M[19]
NB_DISP_CLKP[20]
NB_DISP_CLKN[20]
1 2
1 2
1 2
1 2
L2
L2
1 2
L5
L5
1 2
L7
L7
1 2
L9
L9
1 2
EMI
CLK_NB_14.318M
C141
C141
C146
C146
C150
C150
C154
C154
@ R86
@
1 2
100_0402_5%
100_0402_5%
+NB_PLLVDD
1
1
C142
C142
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
2
+NB_HTPVDD+1.8VS
1
1
C147
C147
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
2
+VDDA18HTPLL
1
1
C151
C151
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
2
+VDDA18PCIEPLL
1
1
C155
C155
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
2
R536 0_0402_5%EXT@R536 0_0402_5%EXT@
1 2
R456 0_0402_5%INT @R456 0_0402_5%IN T@
1 2
R439 0_0402_5%INT @R439 0_0402_5%IN T@
1 2
GMCH_LCD_CLK
GMCH_LCD_DATA
GMCH_CRT_CLK
GMCH_CRT_DATA
R86
100P_0402_25V8K
100P_0402_25V8K
+1.1VS
GMCH_HDMI_DATA[26]
C158
@C158
@
1 2
GMCH_HDMI_CLK[26]
EXT@
EXT@
1 2
R69
R69
4.7K_0402_5%
4.7K_0402_5%
+1.8VS
FBMA-L11-160808-221LMT 0603
FBMA-L11-160808-221LMT 0603
+1.8VS
1 2
FBMA-L11-160808-221LMT 0603
FBMA-L11-160808-221LMT 0603
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
UMA@
UMA@
1 2
R87 140_0402_1%
R87 140_0402_1%
UMA@
UMA@
1 2
R88 150_0402_1%
R88 150_0402_1%
UMA@
UMA@
1 2
R89 150_0402_1%
R89 150_0402_1%
GMCH_CRT_R
GMCH_CRT_G
GMCH_CRT_B
PLT_RST#[12,13,20,28,29,34]
NB_PWRGD[21]
+1.8VS
R68 300_0402_5%R68 300_0402_5%
EXT@
EXT@
1 2
R70
R70
4.7K_0402_5%
4.7K_0402_5%
CLK_NBGFX
USE INT CLK GEN. PD 4.7k PD.
GMCH_HDMI_DATA
+3VS
1 2
FBMA-L11-160808-221LMT 0603
FBMA-L11-160808-221LMT 0603
L4
L4
1 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
L6
L6
NB_REFCLK_P
NB_REFCLK_N
1
C148
C148
2
12
CLK_NBGFX[19]
CLK_NBGFX#[19]
CLK_SBLINK_BCLK[19]
CLK_SBLINK_BCLK#[19]
GMCH_LCD_CLK[27]
GMCH_LCD_DATA[27]
R641 0_0402_5%UMA@R641 0_0402_5%UMA@
1 2
R640 0_0402_5%UMA@R640 0_0402_5%UMA@
1 2
+AVDDQ
GMCH_CRT_HSYNC[12,25]
GMCH_CRT_VSYNC[12,25]
GMCH_CRT_CLK[25]
GMCH_CRT_DATA[25]
1 2
1 2
POWER_SEL[45]
GMCH_CRT_R[25]
GMCH_CRT_G[25]
GMCH_CRT_B[25]
L3
L3
C145
C145
C679
C679
22U_0805_6.3V6M
22U_0805_6.3V6M
+AVDDDI
1
2
4mA
1
C149
C149
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
1 2
R65 715_0402_1%R65 715_0402_1%
+NB_PLLVDD
+NB_HTPVDD
+VDDA18HTPLL
+VDDA18PCIEPLL
R66 0_0402_5%R66 0_0402_5%
R67 0_0402_5%R67 0_0402_5%
CLK_NBHT[19]
CLK_NBHT#[19]
INT@
INT@
INT@
INT@
R504 4.7K_0402_5%
R504 4.7K_0402_5%
R506 4.7K_0402_5%
R506 4.7K_0402_5%
C144
C144
1
1
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
20mA
GMCH_CRT_R
GMCH_CRT_G
GMCH_CRT_B
GMCH_CRT_HSYNC
GMCH_CRT_VSYNC
GMCH_CRT_CLK
GMCH_CRT_DATA
DAC_RSET
+NB_PLLVDD
+NB_HTPVDD
NB_RESET#
NB_PWRGD_R
NB_LDTSTOP#
NB_ALLOW_LDTSTOP
CLK_NBHT
CLK_NBHT#
CLK_NBGFX
CLK_NBGFX#
12
12
CLK_SBLINK_BCLK
CLK_SBLINK_BCLK#
GMCH_LCD_CLK
GMCH_LCD_DATA
GMCH_HDMI_CLK_R1GMCH_HDMI_CLK
GMCH_HDMI_DATA_R1
POWER_SEL
R82
R82
1 2
2K_0402_5%
2K_0402_5%
R85
R85
1 2
150_0402_1%
150_0402_1%
C143
C143
1
2
20mA
120mA
+AVDD1
125mA
U3C
U3C
F12
AVDD1(NC)
E12
AVDD2(NC)
F14
AVDDDI(NC)
G15
AVSSDI(NC)
H15
AVDDQ(NC)
H14
AVSSQ(NC)
E17
C_Pr(DFT_GPIO5 )
F17
Y(DFT_GPIO2)
F15
COMP_Pb(DFT_GPIO4)
G18
RED(DFT_GPIO0)
G17
REDb(NC)
E18
GREEN(DFT_GPIO1)
F18
GREENb(NC)
E19
BLUE(DFT_GPIO3)
F19
BLUEb(NC)
A11
DAC_HSYNC(PWM_GPIO4)
B11
DAC_VSYNC(PWM_GPIO6)
F8
DAC_SCL(PCE_RCALRN)
E8
DAC_SDA(PCE_TCALRN)
10mil
G14
DAC_RSET(PWM_GPIO1)
65mA
A12
PLLVDD(NC)
D14
20mA
PLLVDD18(NC)
B12
PLLVSS(NC)
H17
VDDA18HTPLL
D7
VDDA18PCIEPLL1
E7
VDDA18PCIEPLL2
D8
SYSRESETb
A10
POWERGOOD
C10
LDTSTOPb
C12
ALLOW_LDTSTOP
C25
HT_REFCLKP
C24
HT_REFCLKN
E11
REFCLK_P/OSCIN(OSCIN)
F11
REFCLK_N(PWM_GPIO3)
T2
GFX_REFCL KP
T1
GFX_REFCL KN
U1
GPP_REFCLKP
U2
GPP_REFCLKN
V4
GPPSB_REFCLKP(SB_REFCLKP)
V3
GPPSB_REFCLKN(SB_REFCLKN)
B9
I2C_CLK
A9
I2C_DATA
B8
DDC_DATA0/AUX0N(NC)
A8
DDC_CLK0/AUX0P(NC)
B7
DDC_CLK1/AUX1P(NC)
A7
DDC_DATA1/AUX1N(NC)
B10
STRP_DATA
G11
RSVD
C8
AUX_CAL(NC)
RS880M_FCBGA528
RS880M_FCBGA528
RS880 A11(SA000032710)
LDT_STOP#[6,2 0]
R417
300_0402_5%
300_0402_5%
PART 3 OF 6
PART 3 OF 6
TXOUT_U1P(PCIE_RESET_GPIO3)
TXOUT_U1N(PCIE_RESET_GPIO2)
TXOUT_U3P(PCIE_RESET_GPIO5)
CRT/TVOUT
CRT/TVOUT
TXCLK_UP(PCIE_RESET_GPIO4)
TXCLK_UN(PCIE_RESET_GPIO1)
LVTM
LVTM
PM
PM
CLOCKs PLL PWR
CLOCKs PLL PWR
MIS.
MIS.
1 2
@
@
LVDS_DIGON(P CE_TCALRP)
LVDS_ENA_BL(PWM_GPIO2)
C684
C684
2
1 2
TXOUT_L2N(DBG_GPIO0)
TXOUT_L3N(DBG_GPIO2)
TXCLK_LP(DBG_GPIO1)
TXCLK_LN(DBG_GPIO3)
LVDS_BLON(PCE_RCALRP)
SUS_STAT#(PWM_GPIO5)
B
1
A
1 2
R64 0_0402_5%@R64 0_0402_5%@
TXOUT_L0P(NC)
TXOUT_L0N(NC)
TXOUT_L1P(NC)
TXOUT_L1N(NC)
TXOUT_L2P(NC)
TXOUT_L3P(NC)
TXOUT_U0P(NC)
TXOUT_U0N(NC)
TXOUT_U2P(NC)
TXOUT_U2N(NC)
TXOUT_U3N(NC)
VDDLTP18(NC)
VSSLTP18(NC)
VDDLT18_1(NC)
VDDLT18_2(NC)
VDDLT33_1(NC)
VDDLT33_2(NC)
VSSLT1(VSS)
VSSLT2(VSS)
VSSLT3(VSS)
VSSLT4(VSS)
VSSLT5(VSS)
VSSLT6(VSS)
VSSLT7(VSS)
TMDS_HPD(NC)
HPD(NC)
THERMALDIODE_P
THERMALDIODE_N
TESTMODE
+1.8VS+1.8VS +1.8VS
5
P
G
3
NC7SZ08P5X_NL_SC70-5
NC7SZ08P5X_NL_SC70-5
4
Y
U8
U8
A22
B22
A21
B21
B20
A20
A19
B19
B18
A18
A17
B17
D20
D21
D18
D19
B16
A16
D16
D17
15mA
A13
B13
300mA
A15
B15
A14
B14
C14
D15
C16
C18
C20
E20
C22
E9
F7
G12
R73
4.7K_0402_5%
4.7K_0402_5%
D9
D10
D12
AE8
AD8
D13
1 2
@R73
@
1 2
1 2
R84
R84
1.8K_0402_5%
1.8K_0402_5%
R63
R63
2.2K_0402_5%
2.2K_0402_5%
NB_LDTSTOP#
AMD suggest
+VDDLTP18
+VDDLT18
12
12
R74
@R74
@
4.7K_0402_5%
4.7K_0402_5%
UMA@
UMA@
1 2
R642 0_0402_5%
R642 0_0402_5%
R81 0_0402_5%R81 0_0402_5%
GMCH_TXOU T0+ [27]
GMCH_TXOU T0- [27]
GMCH_TXOU T1+ [27]
GMCH_TXOU T1- [27]
GMCH_TXOU T2+ [27]
GMCH_TXOU T2- [27]
GMCH_TXCLK+ [27]
GMCH_TXCLK- [27]
R76 0_0402_5%UM A@R76 0_0402_5%UM A@
1 2
VGA_ENBKL[14]
HDMI_DET [14,26]
SUS_STAT# [21]
SUS_STAT_R# [12]
NB_PWRGD
SB_PWRGD[6,21,34]
+VDDLTP18
1U_0402_6.3V4Z
1U_0402_6.3V4Z
+VDDLT18
0.1U_0402_16V4Z
0.1U_0402_16V4Z
ENBKL
DIS@
DIS@
1 2
R102
R102
0_0402_5%
0_0402_5%
To SB
Strap pin
C152
C152
C156
C156
1 2
4.7K_0402_5%
4.7K_0402_5%
1
2
1
2
R75
R75
2
1
1
C153
C153
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2
1
C157
C157
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
GMCH_ENVDD [27]
GMCH_INVT _PWM [27]
ENBKL [34]
+1.8VS
U4
U4
5
NC7SZ08P5X_NL_SC70-5
NC7SZ08P5X_NL_SC70-5
P
B
NB_PWRGD_R
4
Y
A
G
@
@
3
L8
L8
1 2
FBMA-L11-160808-221LMT 0603
FBMA-L11-160808-221LMT 0603
L10
L10
1 2
BLM18AG601SN1D_2P
BLM18AG601SN1D_2P
+1.8VS
+1.8VS
+1.8VS
12
R90
R90
1K_0402_5%
1K_0402_5%
ALLOW_LDTSTOP[20]
4 4
A
R91 0_0402_5%R91 0_0402_5%
1 2
NB_ALLOW_LDTSTOP
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2010/03/12
2008/10/06 2010/03/12
2008/10/06 2010/03/12
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
RS880 VEDIO/CLK GEN
RS880 VEDIO/CLK GEN
RS880 VEDIO/CLK GEN
NAWE6 LA-5754P
NAWE6 LA-5754P
NAWE6 LA-5754P
11 47Monday, March 01, 2010
11 47Monday, March 01, 2010
11 47Monday, March 01, 2010
E
0.2
0.2
0.2
of
of
of
A
1U_0402_6.3V4Z
1
1
C159
C159
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
C161
C161
C170
C170
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C176
C176
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C185
C185
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.8VS
C197
C197
1U_0402_6.3V4Z
1
C167
C167
2
1
2
1
C178
C178
C177
C177
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
C186
C186
C190
C190
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
+VDDHTRX
0.1U_0402_16V4Z
12
C165
C165
4.7U_0805_10V4Z
4.7U_0805_10V4Z
12
C164
C164
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
C174
C174
1
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1
C179
C179
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
0.1U_0402_16V4Z
1
C166
C166
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C169
C169
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C175
C175
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C192
C192
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
L11
1.3A
+1.1VS
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
1 1
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
L14
+1.1VS
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
2 2
L14
+1.8VS
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
L11
L13
L13
10U_0603_6.3V6M
10U_0603_6.3V6M
12
C261
C261
L15
L15
12
4.7U_0805_10V4Z
4.7U_0805_10V4Z
@
@
C181
C181
+VDDHT
+VDDHTTX
1
2
+VDDA18PCIE
1
2
B
600mA
U3E
U3E
J17
700mA
680mA
700mA
10mA
5mA
VDDHT_1
K16
VDDHT_2
L16
VDDHT_3
M16
VDDHT_4
P16
VDDHT_5
R16
VDDHT_6
T16
VDDHT_7
H18
VDDHTRX_1
G19
VDDHTRX_2
F20
VDDHTRX_3
E21
VDDHTRX_4
D22
VDDHTRX_5
B23
VDDHTRX_6
A23
VDDHTRX_7
AE25
VDDHTTX_1
AD24
VDDHTTX_2
AC23
VDDHTTX_3
AB22
VDDHTTX_4
AA21
VDDHTTX_5
Y20
VDDHTTX_6
W19
VDDHTTX_7
V18
VDDHTTX_8
U17
VDDHTTX_9
T17
VDDHTTX_10
R17
VDDHTTX_11
P17
VDDHTTX_12
M17
VDDHTTX_13
J10
VDDA18PCIE_1
P10
VDDA18PCIE_2
K10
VDDA18PCIE_3
M10
VDDA18PCIE_4
L10
VDDA18PCIE_5
W9
VDDA18PCIE_6
H9
VDDA18PCIE_7
T10
VDDA18PCIE_8
R10
VDDA18PCIE_9
Y9
VDDA18PCIE_10
AA9
VDDA18PCIE_11
AB9
VDDA18PCIE_12
AD9
VDDA18PCIE_13
AE9
VDDA18PCIE_14
U10
VDDA18PCIE_15
F9
VDD18_1
G9
VDD18_2
AE11
VDD18_MEM1(NC)
AD11
VDD18_MEM2(NC)
RS880M_FCBGA528
RS880M_FCBGA528
PART 5/6
PART 5/6
VDDPCIE_1
VDDPCIE_2
VDDPCIE_3
VDDPCIE_4
VDDPCIE_5
VDDPCIE_6
VDDPCIE_7
VDDPCIE_8
VDDPCIE_9
VDDPCIE_10
VDDPCIE_11
VDDPCIE_12
VDDPCIE_13
VDDPCIE_14
VDDPCIE_15
VDDPCIE_16
VDDPCIE_17
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
POWER
POWER
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDD_MEM1(NC)
VDD_MEM2(NC)
VDD_MEM3(NC)
VDD_MEM4(NC)
VDD_MEM5(NC)
VDD_MEM6(NC)
VDD33_1(NC)
VDD33_2(NC)
RS880 A11(SA000032710)
A6
B6
C6
D6
E6
F6
G7
H8
J9
K9
M9
L9
P9
R9
T9
V9
U9
K12
J14
U16
J11
K15
M12
L14
L11
M13
M15
N12
N14
P11
P13
P14
R12
R15
T11
T15
U12
T14
J16
AE10
AA11
Y11
AD10
AB10
AC10
H11
H12
C
2.5A
23mA
60mA
0.1U_0402_16V4Z
0.1U_0402_16V4Z
L28
L28
1 2
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
L12
L12
1 2
FBMA-L11-201209-221LMA30T_0805
+VDDA11PCIE
FBMA-L11-201209-221LMA30T_0805
C160 10U_0805_10V4ZC160 10U_0805_10V4Z
1 2
C162 10U_0805_10V4ZC162 10U_0805_10V4Z
1 2
C163 4.7U_0805_10V4ZC163 4.7U_0805_10V4Z
1 2
C168 1U_0402_6.3V4ZC168 1U_0402_6.3V4Z
1 2
C171 1U_0402_6.3V4ZC171 1U_0402_6.3V4Z
1 2
1 2
C172 0.1U_0402_16V4ZC172 0.1U_0402_16V4Z
1 2
C173 0.1U_0402_16V4ZC173 0.1U_0402_16V4Z
NB core voltage of 1.25V is required
in order to support 590 MHz e ngine speed For ACF
POWER_SEL
1
C1910.1U_0402_16V4Z C1910.1U_0402_16V4Z
2
C198
C198
LOW 1.1V
1
1
C1820.1U_0402_16V4Z C1820.1U_0402_16V4Z
C1870.1U_0402_16V4Z C1870.1U_0402_16V4Z
2
2
1
C199
C199
2
UMA DIS
0.95VHIGH
1
1
C1930.1U_0402_16V4Z C1930.1U_0402_16V4Z
C1940.1U_0402_16V4Z C1940.1U_0402_16V4Z
2
2
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
12A
0.95V
1.25V
1
1
1
1
C1830.1U_0402_16V4Z C1830.1U_0402_16V4Z
C1800.1U_0402_16V4Z C1800.1U_0402_16V4Z
C1880.1U_0402_16V4Z C1880.1U_0402_16V4Z
C1950.1U_0402_16V4Z C1950.1U_0402_16V4Z
2
2
2
2
+3VS
1
C18410U_0805_10V4Z C18410U_0805_10V4Z
2
+NB_CORE
1
C19610U_0805_10V4Z C19610U_0805_10V4Z
2
+1.1VS
1
+
2
D
U3F
U3F
A25
VSSAHT1
D23
VSSAHT2
E22
VSSAHT3
G22
VSSAHT4
G24
VSSAHT5
G25
VSSAHT6
H19
VSSAHT7
J22
VSSAHT8
L17
VSSAHT9
L22
VSSAHT10
L24
VSSAHT11
L25
VSSAHT12
M20
VSSAHT13
N22
VSSAHT14
P20
VSSAHT15
R19
VSSAHT16
R22
VSSAHT17
R24
VSSAHT18
R25
VSSAHT19
H20
VSSAHT20
U22
VSSAHT21
V19
VSSAHT22
W22
VSSAHT23
W24
VSSAHT24
W25
VSSAHT25
Y21
VSSAHT26
AD25
VSSAHT27
L12
VSS11
M14
VSS12
N13
VSS13
P12
VSS14
P15
VSS15
C189 330U_D2E_2.5VM+C189 330U_D2E_2.5VM
R11
VSS16
R14
VSS17
T12
VSS18
U14
VSS19
U11
VSS20
U15
VSS21
V12
VSS22
W11
VSS23
W15
VSS24
AC12
VSS25
AA14
VSS26
Y18
VSS27
AB11
VSS28
AB15
VSS29
AB17
VSS30
AB19
VSS31
AE20
VSS32
AB21
VSS33
K11
VSS34
RS880M_FCBGA528
RS880M_FCBGA528
PART 6/6
PART 6/6
VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
GROUND
GROUND
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
A2
B1
D3
D5
E4
G1
G2
G4
H7
J4
R7
L1
L2
L4
L7
M6
N4
P6
R1
R2
R4
V7
U4
V8
V6
W1
W2
W4
W7
W8
Y6
AA4
AB5
AB1
AB7
AC3
AC4
AE1
AE4
AB2
AE14
D11
G8
E14
E15
J15
J12
K14
M11
L15
E
RS880 A11(SA000032710)
U3D
3 3
Side port and Strap setting
Debug Mode
GMCH_CRT_VSYNC[11,25]
12
R92 3K_0402_5%R92 3K_0402_5%
12
R93 3K_0402_5%@R93 3K_0402_5%@
+3VS
Load EEPROM Strap
D1
@D1
@
CH751H-40PT_SOD323-2
CH751H-40PT_SOD323-2
SUS_STAT_R#[11] PLT_RST# [11,13,20,28,29,34]
4 4
Enable Side Port Memory
GMCH_CRT_HSYNC[11,25]
A
2 1
R264 3K_0402_5%@R264 3K_0402_5%@
12
12
R94 3K_0402_5%R94 3K_0402_5%
@
@
12
R95 3K_0402_5%
R95 3K_0402_5%
+3VS
DFT_GPIO5:STRAP_DEBUG_BUS_GPIO_ENABLEb
Enables the Test Debug Bus using GPIO. (VSYNC)
1 : Disable
0 : Enable
DFT_GPIO1: LOAD_EEPROM_ST RAPS
Selects Loading of STRAPS from EPROM
1 : Bypass the loading of EEPROM straps and use Hardware Default Values
0 : I2C Master can load strap values from EEPROM if connected, or use
default values if not connected
Enable Side Port Memory
RS880: HSYNC#
0: Enable
1 : Disable
B
Register Readback of strap:
NB_CLKCFG:CLK_TOP_SPARE_D[1]
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2010/03/12
2008/10/06 2010/03/12
2008/10/06 2010/03/12
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
U3D
PAR 4 OF 6
MEM_A0(NC)
MEM_A1(NC)
MEM_A2(NC)
MEM_A3(NC)
MEM_A4(NC)
MEM_A5(NC)
MEM_A6(NC)
MEM_A7(NC)
MEM_A8(NC)
MEM_A9(NC)
MEM_A10(NC)
MEM_A11(NC)
MEM_A12(NC)
MEM_A13(NC)
MEM_BA0(NC)
MEM_BA1(NC)
MEM_BA2(NC)
MEM_RASb(NC)
MEM_CASb(NC)
MEM_WEb(NC)
MEM_CSb(NC)
MEM_CKE(NC)
MEM_ODT(NC)
MEM_CKP(NC)
MEM_CKN(NC)
MEM_COMPP(NC)
MEM_COMPN(NC)
PAR 4 OF 6
MEM_DQ0/DVO_VSYNC(NC)
MEM_DQ1/DVO_HSYNC(NC)
MEM_DQ10/DVO_D6(NC)
MEM_DQ11/DVO_D7(NC)
MEM_DQ13/DVO_D9(NC)
MEM_DQ14/DVO_D10(NC)
MEM_DQ15/DVO_D11(NC)
MEM_DQS0P/DVO_IDCKP(NC)
MEM_DQS0N/DVO_IDCKN(NC)
SBD_MEM/DVO_I/F
SBD_MEM/DVO_I/F
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
AB12
AE16
V11
AE15
AA12
AB16
AB14
AD14
AD13
AD15
AC16
AE13
AC14
Y14
AD16
AE17
AD17
W12
Y12
AD18
AB13
AB18
V14
V15
W14
AE12
AD12
RS880M_FCBGA528
RS880M_FCBGA528
RS880 A11(SA000032710)
AA18
AA20
MEM_DQ2/DVO_DE(NC)
MEM_DQ3/DVO_D0(NC)
MEM_DQ4(NC)
MEM_DQ5/DVO_D1(NC)
MEM_DQ6/DVO_D2(NC)
MEM_DQ7/DVO_D4(NC)
MEM_DQ8/DVO_D3(NC)
MEM_DQ9/DVO_D5(NC)
MEM_DQ12(NC)
MEM_DQS1P(NC)
MEM_DQS1N(NC)
MEM_DM0(NC)
MEM_DM1/DVO_D8(NC)
IOPLLVDD18(NC)
IOPLLVDD(NC)
IOPLLVSS(NC)
MEM_VREF(NC)
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
RS880 PWR/GND
RS880 PWR/GND
RS880 PWR/GND
AA19
Y19
V17
AA17
AA15
Y15
AC20
AD19
AE22
AC18
AB20
AD22
AC22
AD21
Y17
W18
AD20
AE21
W17
AE19
AE23
AE24
AD23
AE18
NAWE6 LA-5754P
NAWE6 LA-5754P
NAWE6 LA-5754P
15mA
26mA
E
+1.8VS
+1.1VS
12 47Monday, March 01, 2010
12 47Monday, March 01, 2010
12 47Monday, March 01, 2010
0.2
0.2
0.2
of
of
of
5
4
3
2
1
PCIE LANE REVERSAL
U6A
U6A
PCIE_MTX_C_GRX_P15
D D
C C
B B
CLK_PEG_VGA[19]
CLK_PEG_VGA#[19]
A A
PCIE_MTX_C_GRX_N15
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N0
R108 10K_0402_5%DIS@R 108 10K_0402_5%DIS@
PLT_RST#[11,12,20,28,29,34]
T26 PADT26 PAD
T25 PADT25 PAD
12
5
AF30
AE31
AE29
AD28
AD30
AC31
AC29
AB28
AB30
AA31
AA29
Y28
Y30
W31
W29
V28
V30
U31
U29
T28
T30
R31
R29
P28
P30
N31
N29
M28
M30
L31
L29
K30
AK30
AK32
N10
AL27
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
PCIE_RX4P
PCIE_RX4N
PCIE_RX5P
PCIE_RX5N
PCIE_RX6P
PCIE_RX6N
PCIE_RX7P
PCIE_RX7N
PCIE_RX8P
PCIE_RX8N
PCIE_RX9P
PCIE_RX9N
PCIE_RX10P
PCIE_RX10N
PCIE_RX11P
PCIE_RX11N
PCIE_RX12P
PCIE_RX12N
PCIE_RX13P
PCIE_RX13N
PCIE_RX14P
PCIE_RX14N
PCIE_RX15P
PCIE_RX15N
CLOCK
CLOCK
PCIE_REFCLKP
PCIE_REFCLKN
PWRGOOD
PERSTB
Park-S3
Park-S3
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCI EXPRESS INTERFACE
PCI EXPRESS INTERFACE
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
CALIBRATION
CALIBRATION
PCIE_CALRP
PCIE_CALRN
DIS@
DIS@
4
AH30
AG31
AG29
AF28
AF27
AF26
AD27
AD26
AC25
AB25
Y23
Y24
AB27
AB26
Y27
Y26
W24
W23
V27
U26
U24
U23
T26
T27
T24
T23
P27
P26
P24
P23
M27
N26
Y22
AA22
PCIE_MTX_C_GRX_P[0..15][10]
PCIE_MTX_C_GRX_N[0..15][10]
PCIE_GTX_MRX_P15
PCIE_GTX_MRX_P14
PCIE_GTX_MRX_N14
PCIE_GTX_MRX_P13
PCIE_GTX_MRX_P12
PCIE_GTX_MRX_P11
PCIE_GTX_MRX_P10
PCIE_GTX_MRX_P9
PCIE_GTX_MRX_P8
PCIE_GTX_MRX_P7
PCIE_GTX_MRX_P6
PCIE_GTX_MRX_N6
PCIE_GTX_MRX_P5
PCIE_GTX_MRX_P4
PCIE_GTX_MRX_P3
PCIE_GTX_MRX_P2
PCIE_GTX_MRX_N2
PCIE_GTX_MRX_P1
PCIE_GTX_MRX_P0
PCIE_GTX_MRX_N0
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.
C269 0.1U_0402_10V7K DIS@C 269 0.1U_0402_10V7K DIS@
1 2
1 2
C270 0.1U_0402_10V7K
C270 0.1U_0402_10V7K
C267 0.1U_0402_10V7K DIS@C 267 0.1U_0402_10V7K DIS@
1 2
1 2
C268 0.1U_0402_10V7K
C268 0.1U_0402_10V7K
C265 0.1U_0402_10V7K DIS@C 265 0.1U_0402_10V7K DIS@
1 2
1 2
C266 0.1U_0402_10V7K
C266 0.1U_0402_10V7K
C494 0.1U_0402_10V7K DIS@C 494 0.1U_0402_10V7K DIS@
1 2
1 2
C264 0.1U_0402_10V7K
C264 0.1U_0402_10V7K
C262 0.1U_0402_10V7K DIS@C 262 0.1U_0402_10V7K DIS@
1 2
1 2
C263 0.1U_0402_10V7K
C263 0.1U_0402_10V7K
C259 0.1U_0402_10V7K DIS@C 259 0.1U_0402_10V7K DIS@
1 2
1 2
C260 0.1U_0402_10V7K
C260 0.1U_0402_10V7K
C257 0.1U_0402_10V7K DIS@C 257 0.1U_0402_10V7K DIS@
1 2
1 2
C258 0.1U_0402_10V7K
C258 0.1U_0402_10V7K
C255 0.1U_0402_10V7K DIS@C 255 0.1U_0402_10V7K DIS@
1 2
1 2
C256 0.1U_0402_10V7K
C256 0.1U_0402_10V7K
C253 0.1U_0402_10V7K DIS@C 253 0.1U_0402_10V7K DIS@
1 2
1 2
C254 0.1U_0402_10V7K
C254 0.1U_0402_10V7K
C251 0.1U_0402_10V7K DIS@C 251 0.1U_0402_10V7K DIS@
1 2
1 2
C252 0.1U_0402_10V7K
C252 0.1U_0402_10V7K
C249 0.1U_0402_10V7K DIS@C 249 0.1U_0402_10V7K DIS@
1 2
1 2
C250 0.1U_0402_10V7K
C250 0.1U_0402_10V7K
C247 0.1U_0402_10V7K DIS@C 247 0.1U_0402_10V7K DIS@
1 2
1 2
C248 0.1U_0402_10V7K
C248 0.1U_0402_10V7K
C245 0.1U_0402_10V7K DIS@C 245 0.1U_0402_10V7K DIS@
1 2
1 2
C246 0.1U_0402_10V7K
C246 0.1U_0402_10V7K
C243 0.1U_0402_10V7K DIS@C 243 0.1U_0402_10V7K DIS@
1 2
1 2
C244 0.1U_0402_10V7K
C244 0.1U_0402_10V7K
C241 0.1U_0402_10V7K DIS@C 241 0.1U_0402_10V7K DIS@
1 2
1 2
C242 0.1U_0402_10V7K
C242 0.1U_0402_10V7K
C239 0.1U_0402_10V7K DIS@C 239 0.1U_0402_10V7K DIS@
1 2
1 2
C240 0.1U_0402_10V7K
C240 0.1U_0402_10V7K
1 2
1 2
R1071.27K_0402_1% DIS@ R1071.27K_0402_1% DIS@
R1092K_0402_5% DIS@ R1092K_0402_5% DIS@
PCIE_MTX_C_GRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
PCIE_GTX_C_MRX_P15
PCIE_GTX_C_MRX_N1 5PCIE_GTX_MRX_N15
DIS@
DIS@
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_N1 4
DIS@
DIS@
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_N1 3PCIE_GTX_MRX_N13
DIS@
DIS@
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_N1 2PCIE_GTX_MRX_N12
DIS@
DIS@
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N1 1PCIE_GTX_MRX_N11
DIS@
DIS@
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_N1 0PCIE_GTX_MRX_N10
DIS@
DIS@
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_N9PCIE_GTX_MRX_N9
DIS@
DIS@
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_N8PCIE_GTX_MRX_N8
DIS@
DIS@
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_N7PCIE_GTX_MRX_N7
DIS@
DIS@
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_N6
DIS@
DIS@
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_N5PCIE_GTX_MRX_N5
DIS@
DIS@
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_N4PCIE_GTX_MRX_N4
DIS@
DIS@
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_N3PCIE_GTX_MRX_N3
DIS@
DIS@
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_N2
DIS@
DIS@
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_N1PCIE_GTX_MRX_N1
DIS@
DIS@
PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_N0
DIS@
DIS@
+VGA_PCIE
Compal Secret Data
Compal Secret Data
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
3
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
PCIE_GTX_C_MRX_P[0..1 5]
PCIE_GTX_C_MRX_N[0..15]
U6F
U6F
LVDS CONTROL
LVDS CONTROL
LVTMDP
LVTMDP
Park-S3
Park-S3
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
PCIE_GTX_C_MRX_ P[0..15] [10]
PCIE_GTX_C_MRX_N[0..15] [10]
AB11
VARY_BL
AB12
DIGON
TXCLK_UP_DPF3P
TXCLK_UN_DPF3N
TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N
TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N
TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N
TXOUT_U3P
TXOUT_U3N
TXCLK_LP_DPE3P
TXCLK_LN_DPE3N
TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N
TXOUT_L1P_DPE1P
TXOUT_L1N_DPE1N
TXOUT_L2P_DPE0P
TXOUT_L2N_DPE0N
TXOUT_L3P
TXOUT_L3N
DIS@
DIS@
AH20
AJ19
AL21
AK20
AH22
AJ21
AL23
AK22
AK24
AJ23
AL15
AK14
AH16
AJ15
AL17
AK16
AH18
AJ17
AL19
AK18
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
PARK-S3 PCIE/LVDS
PARK-S3 PCIE/LVDS
PARK-S3 PCIE/LVDS
NAWE6 LA-5754P
NAWE6 LA-5754P
NAWE6 LA-5754P
R103
R103
@
@
1 2
10K_0402_5%
10K_0402_5%
@
@
1 2
R104
R104
10K_0402_5%
10K_0402_5%
1
VGA_PNL_PWM [27]
VGA_ENVDD [27]
VGA_TXCLK+ [27]
VGA_TXCLK- [27]
VGA_TXOUT0+ [27]
VGA_TXOUT0- [27]
VGA_TXOUT1+ [27]
VGA_TXOUT1- [27]
VGA_TXOUT2+ [27]
VGA_TXOUT2- [27]
of
of
of
13 47Tuesday, March 02, 2010
13 47Tuesday, March 02, 2010
13 47Tuesday, March 02, 2010
0.2
0.2
0.2
5
L17
L17
+1.8VSG
D D
+VGA_PCIE
+1.8VSG
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
C C
+3VSG
27M_NSSC[19]
+3VSG
B B
+1.8VSG +DPLL_PVDD
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
DIS@
DIS@
A A
C307
C307
DIS@
DIS@
18P_0402_50V8J
18P_0402_50V8J
12
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
DIS@
DIS@
L16
L16
12
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
DIS@
DIS@
L18
L18
12
DIS@
DIS@
@
@
R149
R149
1 2
10K_0402_5%
10K_0402_5%
@
@
R135
R135
1 2
10K_0402_5%
10K_0402_5%
R137
10K_0402_5%
10K_0402_5%
L24
L24
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V4Z
1U_0402_6.3V4Z
12
1
C298
C298
DIS@
DIS@
2
DIS@
DIS@
Y1
2 1
27MHZ_16PF_X5H027000FG1H
27MHZ_16PF_X5H027000FG1H
18P_0402_50V8J
18P_0402_50V8J
DIS@
DIS@
1
C271
C271
2
10U_0603_6.3V6M
10U_0603_6.3V6M
DIS@
DIS@
1
C277
C277
2
10U_0603_6.3V6M
10U_0603_6.3V6M
DIS@
DIS@
1
C279
C279
2
10U_0603_6.3V6M
10U_0603_6.3V6M
GPIO24_TRSTB
GPIO27_TMS
GPIO26_TCK
TEST_EN
@R 137
@
12
R141
R141
10K_0402_5%
10K_0402_5%
DIS@
DIS@
1
C299
C299
DIS@
DIS@
2
R1521M_0603_5%
R1521M_0603_5%
DIS@Y1
DIS@
C306
C306
DIS@
DIS@
5
DIS@
DIS@
1
C272
C272
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
DIS@
DIS@
1
C274
C274
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
DIS@
DIS@
1
C280
C280
C281
C281
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1 2
1
C300
C300
DIS@
DIS@
0.1U_0402_10V6K
0.1U_0402_10V6K
2
27MCLKXTALOUT
DIS@
DIS@
1
C275
C275
2
+DPC_VDD10
DIS@
DIS@
1
C278
C278
2
+DPC_PVDD
DIS@
DIS@
1
2
0.1U_0402_10V6K
0.1U_0402_10V6K
+3VSG
ACIN[34,39]
+1.8VSG
+DPC_VDD18
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
1 2
130mA
VRAM_ID2[15]
VRAM_ID1[15]
VRAM_ID0[15]
200mA
+DPC_PVDD
+DPC_VDD18
+DPC_VDD10
20mA
VGA_LCD_CLK[27]
VGA_LCD_DAT[27]
@
@
R125
R125
1 2
10K_0402_5%
10K_0402_5%
D4RB751V_SOD323@D4RB751V_SOD323
21
@
VGA_ENBKL[11]
GPU_VID0[44]
GPU_VID1[44]
TEST_EN[15]
DIS@
DIS@
R146
R146
499_0402_1%
499_0402_1%
R272
R272
249_0402_1%
249_0402_1%
DIS@
DIS@
XTALIN
Voltage Swing: 1.8 V
HDMI_DET[11,26]
0.60 V level
12
1
C297
C297
2
+DPLL_VDDC
GPU_GPIO8
GPU_GPIO9
GPU_GPIO11
GPU_GPIO12
GPU_GPIO13
THM_ALERT#
R134 10K_0402_5%
R134 10K_0402_5%
1 2
GPIO24_TRSTB
GPIO25_TDI
GPIO26_TCK
GPIO27_TMS
GPIO28_TDO
TEST_EN
+VREFG_GPU
DIS@
DIS@
0.1U_0402_10V6K
0.1U_0402_10V6K
+DPLL_PVDD
Suggest connect to GND by AMD
GPU_THERMAL_D+
GPU_THERMAL_D-
VRAM_ID2
VRAM_ID1
VRAM_ID0
VGA_LCD_CLK
VGA_LCD_DAT
GPU_GPIO0
GPU_GPIO1
GPU_GPIO2
GPU_GPIO3
GPU_GPIO4
GPU_VID0
T12T12
@
@
GPU_VID1
120mA
300mA
27MCLK
XTALOUT
DIS@
DIS@
R620_0402_5%
R620_0402_5%
1 2
R1050_0402_5%
R1050_0402_5%
1 2
DIS@
DIS@
+TSVDD
20mA
AC10
AF24
AB13
AD10
AC14
AC16
AF14
AE14
AD14
AM28
AK28
AC22
AB22
AD17
AC17
AE9
N9
AE8
AD9
AD7
AC8
AC7
AB9
AB8
AB7
AB4
AB2
Y8
Y7
W6
V6
AC6
AC5
AA5
AA6
U1
W1
U3
Y6
AA1
R1
R3
U6
U10
T10
U8
U7
T9
T8
T7
P10
P4
P2
N6
N5
N3
Y9
N1
M4
R6
W10
M2
P8
P7
N8
N7
K4
W8
W9
W7
T4
T2
R5
4
U6B
U6B
M93-S3/M92-S2
M93-S3/M92-S2
DVCNTL_0/ DVPDATA_18
L9
DVCNTL_1 / NC
DVCNTL_2 / TESTEN#2
DVDATA_12 / DVPDATA_16
DVDATA_11 / DVPDATA_20
DVDATA_10 / DVPDATA_22
DVDATA_9 / DVPDAT A_12
DVDATA_8 / DVPDAT A_14
DVDATA_7 / DVPCNTL_0
DVDATA_6 / DVPDAT A_8
DVDATA_5 / DVPDAT A_6
DVDATA_4 DVPDATA_4
DVDATA_3 / DVPDAT A_19
DVDATA_2 / DVPDAT A_21
DVDATA_1 / DVPDAT A_2
DVDATA_0 / DVPDAT A_0
DVO
DVO
M93-S3/M92-S2
M93-S3/M92-S2
DPC_PVDD / DVPDATA_11
DPC_PVSS / GND
DPC_VDD18#1/DVPDAT10
DPC_VDD18#2/DVPDAT23
DPC_VDD10#1/DVPDAT15
DPC_VDD10#2/DVPDAT17
DPC_VSSR#1 / DVPCLK
DPC_VSSR#2 / DVPDAT5
DPC_VSSR#3 / GND
DPC_VSSR#4 / GND
DPC_VSSR#5/ DVPCNTL_ MV0
SCL
I2C
I2C
SDA
GENERAL PURPOSE I/O
GENERAL PURPOSE I/O
GPIO_0
GPIO_1
GPIO_2
GPIO_3_SMBDATA
GPIO_4_SMBCLK
GPIO_5_AC_BATT
GPIO_6
GPIO_7_BLON
GPIO_8_ROMSO
GPIO_9_ROMSI
GPIO_10_ROMSCK
GPIO_11
GPIO_12
GPIO_13
GPIO_14_HPD2
GPIO_15_PWRCNTL_0
GPIO_16_SSIN
GPIO_17_THERMAL_INT
GPIO_18_HPD3
GPIO_19_CTF
GPIO_20_PWRCNTL_1
GPIO_21_BB_EN
GPIO_22_ROMCSB
GPIO_23_CLKREQB
L6
JTAG_TRSTB
L5
JTAG_TDI
L3
JTAG_TCK
L1
JTAG_TMS
JTAG_TDO
TESTEN
GENERICA
GENERICB
GENERICC
GENERICD
GENERICE_HPD4
HPD1
VREFG
PLL/CLOCK
PLL/CLOCK
DPLL_PVDD
DPLL_PVSS
DPLL_VDDC
XTALIN
XTALOUT
NC#2/XO_IN
NC#1/XO_IN2
THERMAL
THERMAL
DPLUS
DMINUS
TS_FDO
TSVDD
TSVSS
Park-S3
Park-S3
DIS@
DIS@
4
TXCAP_DPA3P
TXCAM_DPA3N
TX0P_DPA2P
DPA
DPA
TX0M_DPA2N
TX1P_DPA1P
TX1M_DPA1N
TX2P_DPA0P
TX2M_DPA0N
TXCBP_DPB3P
TXCBM_DPB3N
TX3P_DPB2P
TX3M_DPB2N
DPB
DPB
TX4P_DPB1P
TX4M_DPB1N
TX5P_DPB0P
TX5M_DPB0N
M92-S2/M93-S3
M92-S2/M93-S3
DVPDATA_3/TXCC P_DPC3P
DVPCNTL_2/TXCCM_DPC3N
DVPDATA_7 / TX0P_DPC2P
DVPDATA_1 / TX0M_DPC2N
DVPCNTL_MV1 / TX1P_DPC1P
DVPDATA_9 / TX1M_DPC1N
DVPDATA_13 / TX2P_DPC0P
DVPCNTL_1 / TX2M_DPC0N
VDDR4 / DPCD_CALR
DPC
DPC
DAC1
DAC1
HSYNC
VSYNC
RSET
AVDD
AVSSQ
VDD1DI
VSS1DI
M92-S2/M93-S3
M92-S2/M93-S3
R2 / NC
R2B / NC
G2 / NC
G2B / NC
B2 / NC
B2B / NC
C / NC
DAC2
DAC2
Y / NC
COMP / NC
H2SYNC
V2SYNC
VDD2DI / NC
VSS2DI / NC
A2VDD / NC
A2VDDQ / NC
A2VSSQ
R2SET / NC
M92-S2/M93-S3M92-S2/M93-S3
M92-S2/M93-S3M92-S2/M93-S3
DDC1CLK
DDC1DATA
AUX1P
DDC/AUX
DDC/AUX
AUX1N
DDC2CLK
DDC2DATA
AUX2P
AUX2N
DDCCLK_AUX5P
DDCDATA_AUX5N
DDC6CLK
DDC6DATA
NC/DDCCLK_AUX3P
NC/DDCDATA_AUX3N
AF2
AF4
AG3
AG5
AH3
AH1
AK3
AK1
AK5
AM3
AK6
AM5
AJ7
AH6
AK8
AL7
V4
U5
W3
V2
Y4
W5
AA3
Y2
AA12
AM26
R
AK26
RB
AL25
G
AJ25
GB
AH24
B
AG25
BB
AH26
AJ27
AD22
70mA
AG24
AE22
45mA
AE23
AD23
AM12
AK12
AL11
AJ11
AK10
AL9
AH12
AM10
AJ9
AL13
AJ13
50mA
AD19
AC19
130mA
AE20
1.5mA
AE17
AE19
AG13
AE6
AE5
AD2
AD4
AC11
AC13
AD13
AD11
AE16
AD16
AC1
AC3
AD20
AC20
TX_PWRS_ENB GPIO0
GPIO1TX_DEEMPH_EN
VGA_HDMI_TXC+ [26]
VGA_HDMI_TXC- [26]
VGA_HDMI_TXD0+ [26]
VGA_HDMI_TXD0- [26]
VGA_HDMI_TXD1+ [26]
VGA_HDMI_TXD1- [26]
VGA_HDMI_TXD2+ [26]
VGA_HDMI_TXD2- [26]
12
R124
R124
150_0402_1%
150_0402_1%
DIS@
DIS@
VGA_CRT_R
VGA_CRT_G
VGA_CRT_B
VGA_CRT_HSYNC
VGA_CRT_VSYNC
R126
DIS@R126
DIS@
1 2
499_0402_1%
499_0402_1%
+AVDD
+VDD1DI
VGA_CRT_HSYNC2
VGA_CRT_VSYNC2
+VDD2DI
+A2VDD
+A2VDDQ
R150
DIS@R150
DIS@
1 2
715_0402_1%
715_0402_1%
VGA_CRT_CLK
VGA_CRT_DATA
VGA_HDMI_SCLK [26]
VGA_HDMI_SDATA [26]
+1.8VSG
3
Transmitter Power Saving Enable
0: 50% Tx output swing for mobile mode
1: full Tx output swing (Default setting for Desktop)
PCI Express Transmitter De-emphasis Enable
0: Tx de-emphasis diabled for mobile mode
1: Tx de-emphasis enabled (Defailt setting for desktop)
GPU_GPIO0
GPU_GPIO1
GPU_GPIO2
GPU_GPIO8
GPU_GPIO9
GPU_GPIO11
GPU_GPIO12
GPU_GPIO13
VGA_CRT_HSYNC
VGA_CRT_VSYNC
VGA_CRT_VSYNC2
VGA_CRT_HSYNC2
VGA_CRT_R [25]
VGA_CRT_G [ 25]
VGA_CRT_B [25]
VGA_CRT_HSYNC [25]
VGA_CRT_VSYNC [25]
+1.8VSG
+1.8VSG
+1.8VSG
VGA_CRT_CLK [25]
VGA_CRT_DATA [25]
L26
L26
BLM18AG121SN1D_0603
BLM18AG121SN1D_0603
12
DIS@
DIS@
DIS@
DIS@
3
STRAPS
R111 10K_0402_5%@R111 10K_0402_5%@
R112 10K_0402_5%DIS@R112 10K_0402_5%DIS@
R113 10K_0402_5%@R113 10K_0402_5%@
R114 10K_0402_5%@R114 10K_0402_5%@
R115 10K_0402_5%@R115 10K_0402_5%@
R117 10K_0402_5%DIS@R117 10K_0402_5%DIS@
R118 10K_0402_5%@R118 10K_0402_5%@
R119 10K_0402_5%@R119 10K_0402_5%@
R120 10K_0402_5%DIS@R120 10K_0402_5%DIS@
R121 10K_0402_5%DIS@R121 10K_0402_5%DIS@
R122 10K_0402_5%@R122 10K_0402_5%@
R123 10K_0402_5%@R123 10K_0402_5%@
L20
L20
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
DIS@
DIS@
L22
L22
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
DIS@
DIS@
L23
L23
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
DIS@
DIS@
+TSVDD
C308
10U_0603_6.3V6M
C308
10U_0603_6.3V6M
C309
1U_0402_6.3V4Z
C309
1U_0402_6.3V4Z
1
2
1
1
2
2
DIS@
DIS@
DIS@
DIS@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.
12
12
12
C310
0.1U_0402_16V4Z
C310
0.1U_0402_16V4Z
C283
C283
C288
C288
C294
C294
DIS@
DIS@
1
2
DIS@
DIS@
1
2
DIS@
DIS@
1
2
12
12
12
12
12
12
12
12
VB
12
12
12
12
DIS@
DIS@
1
C284
C284
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
10U_0603_6.3V6M
10U_0603_6.3V6M
DIS@
DIS@
1
C289
C289
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
10U_0603_6.3V6M
10U_0603_6.3V6M
DIS@
DIS@
1
C295
C295
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
10U_0603_6.3V6M
10U_0603_6.3V6M
L25
L25
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
DIS@
DIS@
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONF LICT DURING RESET
+3VSG
VIP_DEVICE_STRAP_ENA V2SYNC IGNORE VIP DEVICE STRAPS
+3VSG
+AVDD
DIS@
DIS@
1
C285
C285
2
0.1U_0402_10V6K
0.1U_0402_10V6K
+1.8VSG
+VDD1DI
DIS@
DIS@
1
C290
C290
2
0.1U_0402_10V6K
0.1U_0402_10V6K
+VDD2DI
DIS@
DIS@
1
C296
C296
2
0.1U_0402_10V6K
0.1U_0402_10V6K
12
VGA_SMB_CK2_R
VGA_SMB_DA2_R
DIS@
DIS@
DIS@
DIS@
1
1
C302
C302
C303
C303
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
Compal Secret Dat a
Compal Secret Dat a
Compal Secret Dat a
2
CONFIGURATION STRAPS
STRAPS
BIF_GEN2_EN_A
BIOS_ROM_EN
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONF LICT DURING RESET
PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED,
THEY MUST NOT CONF LICT DURING RESET
L19
L19
DIS@
DIS@
DIS@
DIS@
+3VSG
R143
R143
DIS@
DIS@
+DPLL_VDDC+VGA_PCIE
0.1U_0402_10V6K
0.1U_0402_10V6K
12
L21
L21
12
12
12
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
2
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
10K_0402_5%
10K_0402_5%
DIS@
DIS@
1
C305
C305
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
Deciphered Date
Deciphered Date
Deciphered Date
1
DESCRIPTION OF DEFAULT SETTINGSPIN
GPIO0 PCIE FULL TX OUTPUT SWINGTX_PWRS_ENB
GPIO1TX_DEEMPH_EN PCIE TR ANSMITTER DE-EMPHASIS ENABLED
GPIO2
GPIO8
GPIO9 VGA ENABLEDBIF_VGA DIS
GPIO21
GPIO_22_ROMCSB
GPIO[13:11]ROMIDCFG(2:0)
H2SYNC
GENERICC
HSYNCAUD[1]
VSYNCAUD[0]
PCIE GNE2 ENABLED
ENABLE EXTERNAL BIOS ROM
SERIAL ROM TYPE OR MEMORY APERTURE SIZE SEL ECT
AUD[1] AUD[0]
0 0 No audio function
0 1 Audio for DisplayPort and HDMI if dongle is detected
1 0 Audio for DisplayPort only
1 1 Audio for both DisplayPort and HDMI
AMD RESERVED CONFIGURATION STRAPS
H2SYNC
+A2VDD
DIS@
DIS@
DIS@
1
C282
C282
2
DIS@
DIS@
1
C291
C291
2
R144
R144
10K_0402_5%
10K_0402_5%
DIS@
DIS@
DIS@
DIS@
DIS@
1
1
C287
C287
C286
C286
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_10V6K
0.1U_0402_10V6K
+A2VDDQ
DIS@
DIS@
DIS@
DIS@
1
1
C292
C292
C293
C293
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_10V6K
0.1U_0402_10V6K
+3VSG
2
61
5
Q7A
Q7A
4
Q7B
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
+3VSG
2
C301
C301
@
@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
GPU_THERMAL_D+ VGA_SMB_DA2_R
@C304
@
2200P_0402_50V7K
2200P_0402_50V7K
1
1 2
C304
GPU_THERMAL_D-
R643
@R643
@
1 2
4.7K_0402_5%
4.7K_0402_5%
VB
1111_100xb EMC1412-A (SA00003YA0L)
DIS@
DIS@
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
GENERICC
GPIO21_BB_EN
3
+3VSG
DIS@Q7B
DIS@
R129 10K_0402_5%@R 129 10K_0402_5%@
1 2
R127 10K_0402_5%@R 127 10K_0402_5%@
1 2
R130 10K_0402_5%@R 130 10K_0402_5%@
1 2
R151 10K_0402_5%@R 151 10K_0402_5%@
1 2
R131 10K_0402_5%@R 131 10K_0402_5%@
1 2
R132 10K_0402_5%@R 132 10K_0402_5%@
1 2
R133 10K_0402_5%@R 133 10K_0402_5%@
1 2
R136 10K_0402_5%@R 136 10K_0402_5%@
1 2
R138 4.7K_0402_5%DIS@R138 4.7K_0402_5%DIS@
R139 4.7K_0402_5%DIS@R139 4.7K_0402_5%DIS@
R140 10K_0402_5%DIS@R140 10K_0402_5%DIS@
R142 10K_0402_5%DIS@R142 10K_0402_5%DIS@
EC_SMB_CK2 [6,31,34]
EC_SMB_DA2 [6,31,34]
12
12
12
12
VGA_CRT_R
VGA_CRT_G
VGA_CRT_B
GPU_GPIO3
GPU_GPIO4
GPU_VID0
GPU_VID1
GPIO24_TRSTB
GPIO25_TDI
GPIO26_TCK
GPIO28_TDO
VGA_LCD_DAT
VGA_LCD_CLK
VGA_CRT_CLK
VGA_CRT_DATA
VGA Thermal Sensor
ADM1032
U7
1
VDD
2
D+
3
D-
THERM#4GND
EMC1402-2-ACZL-TR MSOP 8P
EMC1402-2-ACZL-TR MSOP 8P
Address 1111_100xb
S IC EMC1412-A-ACZL-TR MSOP 8P SENSOR
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
Closed to GPU
@U7
@
SCLK
SDATA
ALERT#
VGA_SMB_CK2_R
8
7
6
THM_ALERT#
5
R155
4.7K_0402_5%
4.7K_0402_5%
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
PARK-S3 Main Generic/MSIC
PARK-S3 Main Generic/MSIC
PARK-S3 Main Generic/MSIC
NAWE6 LA-5754P
NAWE6 LA-5754P
NAWE6 LA-5754P
1
RECOMMENDED SETTINGS
0= DO NOT INSTALL RESISTOR
1 = INSTALL 10K RESISTOR
X = DESIGN DEPENDANT
NA = NOT APPLICABLE
RECOMMENDED SETTINGS
0
1
0
0
0
0
0
001
0
0
0
11
12
12
12
R148
R148
R147
R147
R145
R145
150_0402_1%
150_0402_1%
150_0402_1%
150_0402_1%
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
@R155
@
12
+3VSG+3VSG
14 47Tuesday, March 02, 2010
14 47Tuesday, March 02, 2010
14 47Tuesday, March 02, 2010
of
of
of
150_0402_1%
150_0402_1%
0.2
0.2
0.2
5
R165
R165
DIS@
DIS@
R166
R166
DIS@
DIS@
+1.5VSG
12
12
M_DA[63..0]
M_MA[13. .0]
M_DQM[7 ..0]
M_DQS[7..0]
M_DQS#[7..0]
MVREFSA
1
C312
C312
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
DIS@
DIS@
TEST_EN[14]
R170 0_0402_5%DIS@R170 0_0402_5%DIS@
1 2
R174
R174
1 2
1 2
R175
R175
+1.5VSG
51.1_0402_1%DIS@
51.1_0402_1%DIS@
51.1_0402_1%DIS@
51.1_0402_1%DIS@
M_DA[63..0][18]
M_MA[13. .0][18]
M_DQM[7 ..0][18]
M_DQS[7..0][18]
D D
C C
+1.5VSG
12
R163
R163
B B
DIS@
DIS@
40.2_0402_1%
40.2_0402_1%
12
R164
R164
DIS@
DIS@
100_0402_1%
100_0402_1%
A A
M_DQS#[7..0][18]
40.2_0402_1%
40.2_0402_1%
100_0402_1%
100_0402_1%
MVREFD A
1
C311
C311
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DIS@
DIS@
2
5
4
M_DA0
M_DA1
M_DA2
M_DA3
M_DA4
M_DA5
M_DA6
M_DA7
M_DA8
M_DA9
M_DA10
M_DA11
M_DA12
M_DA13
M_DA14
M_DA15
M_DA16
M_DA17
M_DA18
M_DA19
M_DA20
M_DA21
M_DA22
M_DA23
M_DA24
M_DA25
M_DA26
M_DA27
M_DA28
M_DA29
M_DA30
M_DA31
M_DA32
M_DA33
M_DA34
M_DA35
M_DA36
M_DA37
M_DA38
M_DA39
M_DA40
M_DA41
M_DA42
M_DA43
M_DA44
M_DA45
M_DA46
M_DA47
M_DA48
M_DA49
M_DA50
M_DA51
M_DA52
M_DA53
M_DA54
M_DA55
M_DA56
M_DA57
M_DA58
M_DA59
M_DA60
M_DA61
M_DA62
M_DA63
MVREFD A
MVREFSA
1 2
R171 150_0402_1%DIS@R171 150_0402_1%DIS@
1 2
R172 240_0402_1%DIS@R172 240_0402_1%DIS@
1 2
C314
DIS@C314
DIS@
1 2
1 2
C315
C315
4
3
U6C
U6C
K27
DQA_0
J29
DQA_1
H30
DQA_2
H32
DQA_3
G29
DQA_4
F28
DQA_5
F32
DQA_6
F30
DQA_7
C30
DQA_8
F27
DQA_9
A28
DQA_10
C28
DQA_11
E27
DQA_12
G26
DQA_13
D26
DQA_14
F25
DQA_15
A25
DQA_16
C25
DQA_17
E25
DQA_18
D24
DQA_19
E23
DQA_20
F23
DQA_21
D22
DQA_22
F21
DQA_23
E21
DQA_24
D20
DQA_25
F19
DQA_26
A19
DQA_27
D18
DQA_28
F17
DQA_29
A17
DQA_30
C17
DQA_31
E17
DQA_32
D16
DQA_33
F15
DQA_34
A15
DQA_35
D14
DQA_36
F13
DQA_37
A13
DQA_38
C13
DQA_39
E11
DQA_40
A11
DQA_41
C11
DQA_42
F11
DQA_43
A9
DQA_44
C9
DQA_45
F9
DQA_46
D8
DQA_47
E7
DQA_48
A7
DQA_49
C7
DQA_50
F7
DQA_51
A5
DQA_52
E5
DQA_53
C3
DQA_54
E1
DQA_55
G7
DQA_56
G6
DQA_57
G1
DQA_58
G3
DQA_59
J6
DQA_60
J1
DQA_61
J3
DQA_62
J5
DQA_63
K26
MVREFD A
J26
R168240_0402_1% DIS@ R168240_0402_1% DIS@
DRAM_RST
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4ZDIS@
0.1U_0402_16V4ZDIS@
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.
MVREFSA
J25
MEM_CALRN0
K7
NC/TESTEN#2
J8
MEM_CALRP1/DPC_CALR
K25
MEM_CAL RP0
L10
DRAM_RST
K8
CLKTESTA
L7
CLKTESTB
Park-S3
Park-S3
DIS@
DIS@
Issued Date
Issued Date
Issued Date
MAA_13/BA2
MAA_14/BA0
MAA_15/BA1
MEMORY INTERFACE
MEMORY INTERFACE
WDQSA_0
WDQSA_1
WDQSA_2
WDQSA_3
WDQSA_4
WDQSA_5
WDQSA_6
WDQSA_7
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8
MAA_9
MAA_10
MAA_11
MAA_12
DQMA_0
DQMA_1
DQMA_2
DQMA_3
DQMA_4
DQMA_5
DQMA_6
DQMA_7
RDQSA_0
RDQSA_1
RDQSA_2
RDQSA_3
RDQSA_4
RDQSA_5
RDQSA_6
RDQSA_7
ODTA0
ODTA1
CLKA0
CLKA0B
CLKA1
CLKA1B
RASA0B
RASA1B
CASA0B
CASA1B
CSA0B_0
CSA0B_1
CSA1B_0
CSA1B_1
CKEA0
CKEA1
WEA0B
WEA1B
PX_EN
RSVD#2
RSVD#3
3
K17
J20
H23
G23
G24
H24
J19
K19
J14
K14
J11
J13
H11
G11
J16
L15
E32
E30
A21
C21
E13
D12
E3
F4
H28
C27
A23
E19
E15
D10
D6
G5
H27
A27
C23
C19
C15
E9
C5
H4
L18
K16
H26
H25
G9
H9
G22
G17
G19
G16
H22
J22
G13
K13
K20
J17
G25
H10
AB16
G14
G20
Compal Secret Data
Compal Secret Data
Compal Secret Data
M_MA0
M_MA1
M_MA2
M_MA3
M_MA4
M_MA5
M_MA6
M_MA7
M_MA8
M_MA9
M_MA10
M_MA11
M_MA12
M_BA2
M_BA0
M_BA1
M_DQM0
M_DQM1
M_DQM2
M_DQM3
M_DQM4
M_DQM5
M_DQM6
M_DQM7
M_DQS0
M_DQS1
M_DQS2
M_DQS3
M_DQS4
M_DQS5
M_DQS6
M_DQS7
M_DQS# 0
M_DQS# 1
M_DQS# 2
M_DQS# 3
M_DQS# 4
M_DQS# 5
M_DQS# 6
M_DQS# 7
M_ODT 0
M_ODT 1
M_CLK0
M_CLK# 0
M_CLK1
M_CLK# 1
M_RAS#0
M_RAS#1
M_CAS#0
M_CAS#1
M_CS#0
M_CS#1
M_CKE0
M_CKE1
M_WE# 0
M_WE# 1
M_MA13
Deciphered Date
Deciphered Date
Deciphered Date
+1.8VSG
M_BA2 [18]
M_BA0 [18]
M_BA1 [18]
M_ODT0 [18]
M_ODT1 [18]
M_CLK0 [18]
M_CLK#0 [18]
M_CLK1 [18]
M_CLK#1 [18]
M_RAS#0 [18]
M_RAS#1 [18]
M_CAS#0 [18]
M_CAS#1 [18]
M_CS#0 [18]
M_CS#1 [18]
M_CKE0 [18]
M_CKE1 [18]
M_WE#0 [18]
M_WE#1 [18]
2
R157 10K_0402_5%H@R157 10K_0402_5%H@
1 2
R158 10K_0402_5%S@R158 10K_0402_5%S@
1 2
R159 10K_0402_5%S@R159 10K_0402_5%S@
1 2
R160 10K_0402_5%H@R160 10K_0402_5%H@
1 2
R161 10K_0402_5%@R161 10K_0402_5%@
1 2
R162 10K_0402_5%DIS@R162 10K_0402_5%DIS@
1 2
VB
Vendor VRAM_ID0 VRAM_ID1 VRAM_ID2
Hynix H5TQ1G63BFR-12C
Samsung K4W1G1646E-HC12
R169
51.1_0402_1%
DRAM_RST
2
51.1_0402_1%
12
R273
R273
10K_0402_5%
10K_0402_5%
DIS@
DIS@
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
Date: Sheet
1
VRAM_ID0
VRAM_ID1
VRAM_ID2
1
00
+VGA_CORE
12
R167
R167
2.2K_0402_5%
2.2K_0402_5%
@
DIS@R169
DIS@
1 2
1
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
PARK-S3 MEM Interface
PARK-S3 MEM Interface
PARK-S3 MEM Interface
NAWE6 LA-5754P
NAWE6 LA-5754P
NAWE6 LA-5754P
@
C313
C313
68P_0402_50V8J
68P_0402_50V8J
DIS@
DIS@
1
VRAM_ID0 [14 ]
VRAM_ID1 [14 ]
VRAM_ID2 [14 ]
1
DRAM_RST# [18]
15 47Tuesday, March 02, 2010
15 47Tuesday, March 02, 2010
15 47Tuesday, March 02, 2010
00
0.2
0.2
0.2
of
of
of
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