Compal LA-5511P NCQD0, Aspire 5940, Aspire 5940G, Aspire 5942, Aspire 5942G Schematic

A

B

C

D

E

1 1

Compal Confidential

2 2

NCQD0 M/B Schematics Document

Intel Arrandale/Clarksfield Processor with DDRIII + Ibex Peak-M

3 3

2009-08-10

REV:1.0

4 4

A

B

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/08/10 2010/08/10

2009/08/10 2010/08/10

2009/08/10 2010/08/10

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511

401762

401762

401762

160Tuesday, August 18, 2009

160Tuesday, August 18, 2009

160Tuesday, August 18, 2009

of

of

E

of

C

C

C

A

B

C

D

E

Compal Confidential

Model Name : NCQD0
File Name : LA5511P

1 1

ATI
M96/M92XT

page
23,24,25,26,27,28,29

HDMI(DIS)

HDMI Conn.

page 32

2 2

HDMI SW
& Level shift

page 32

CRT(DIS)

CRT SW.

PCI-Express x 8 (ABD PCIE1 2.5GT/S CKD PCIE1/2 2.5/5GT/S)

port 5

CardReader

JMB380

page 33

3 3

Conn.

5 in 1 socket1394

NEW CARD

page 36

RTC CKT.

page 36

PEG(DIS)

LVDS(DIS)

page 31

port 3

Sub-board
LS-5511P

Switch/B

page 39

LS-5512P

MEADIA/B

page39

LS-5513P

USB/B

page 37

CRT Conn.

Fan Control

100MHz

page 31

port 2,4 port 1

MINI Card x2

WLAN, TV

page 33

LS-5011P

Cap Sensor/B

page 39

LS-5014P

Volumn/B

page 39

LS-5015P

FP/B

page39

page 43

PCI-E 2.0x16 5GT/s PER LANE

133MHz

LVDS Conn.

page 30

LVDS SW

page 30

LVDS(UMA)

CRT(UMA)

HDMI(UMA)

100MHz

LAN(GbE)

BCM57780

page 34

RJ45

page 35

Touch Pad

Intel

Auburndale / Clarksfield
(UMA/DIS) (DIS)

Processor

rPGA988A

page 4,5,6,7,8,9

DMI x4FDI x8

(UMA)

100MHz

2.7GT/s

100MHz
1GB/s x4

Intel

Ibex Peak-M

PCH

page 13,14,15,16,17
18,19,20,21

LPC BUS

33MHz

ENE KB926

page 38

page 39

Daul CH NAND interface

Int.KBD

page 39

Memory BUS(DDRIII)

Dual Channel

1.5V DDRIII 800/1066/1333

6.4G/8.5G/10.6G
100M/133M/166M(CFD)

USB conn x2

USB port 0,1
USB port 8 HS USB

Bluetooth
Conn

USB Port 2 (eSATA)

USBx14

HD Audio

3.3V 48MHz

3.3V 24MHz

SATA x 6 (GEN1 1.5GT/S ,GEN2 3GT/S)

SPI

port 0

SPI ROM x2

page 13

SATA HDD
Conn.

page 33

Braidwoood

page 22

204pin DDRIII-SO-DIMM X2

BANK 0, 1, 2, 3

CMOS Camera

page 36page 37 page 30

100MHz

port 1

SATA ODD
Conn.

page 33

USB port 3USB port 10

eSATA
Conn.

page 37

Clock Generator

IDT: 9LRS3199AKLFT
SILEGO: SLG8SP587

133/120/100/96/14.318MHZ to PCH
48MHZ to CardReader

page 10,11

HDA Codec

ALC669X

page 41

port 4

Audio AMP

TPA6017

page 42

Int. Speaker

page 41

page 12

Phone Jack x 3
+SubWoofer

page 42

Power On/Off CKT.

page 40

DC/DC Interface CKT.

4 4

page 44,45

LS-5514P

Card Reader/B

page 33

LS-5515P

TP BTN/B

page 39

EC I/O Buffer

page 39

BIOS ROM

page 39

PCH XDP

page 21

CPU XDP

133MHz

page 5

Power Circuit DC/DC

page 46~58

A

LS-5516P

PWR SAVING/B

page 39

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/08/10 2010/08/10

2009/08/10 2010/08/10

2009/08/10 2010/08/10

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511

401762

401762

401762

C

C

C

of

of

of

260Tuesday, August 18, 2009

260Tuesday, August 18, 2009

260Tuesday, August 18, 2009

E

A

Voltage Rails

Power Plane Description

VIN
B+
+CPU_CORE

1 1

2 2

+0.75VS 0.75V switched power rail for DDR terminator
+1.05VS
+1.1VS_VTT 1.1V switched power rail (1.05 for AUB CPU) ON OFF OFF
+1.5V ON ON OFF
+1.5VS
+1.8VS 1.8V switched power rail
+3VALW 3.3V always on power rail
+3V
+3V_LAN
+3VS
+5VALW
+5VS
+5V 5V power rail for PCH
+VSB VSB always on power rail ON ON*
+RTCVCC RTC power
+5VSDGPU
+1.5VSDGPU
+1.8VSDGPU

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

Adapter power supply (19V)
AC or battery power rail for power circuit.
Core voltage for CPU

1.05V switched power rail for PCH

1.5V power rail for DDRIII

1.5V switched power rail

3.3V power rail for PCH

3.3V power rail for LAN

3.3V switched power rail
5V always on power rail
5V switched power rail

5V power rail for GPU

1.5V power rail for VRAM

1.8V switched power rail for GPU

External PCI Devices

Device IDSEL# REQ#/GNT# Interrupts

B

S1

S3 S5

N/A N/A N/A

ON
ON
ON OFF OFF

ON OFF OFF
ON
ON
ON ON
ON ON
ON
ON

ON ON ON
ON
ON

N/AN/AN/A
OFF

ON

OFF

OFF

OFF

OFF
ON ON*

ON
ON*
OFF

OFF
ON ON*
OFF

OFFON

ONON

DGPU
(UMA)

OFF
OFF
OFF

DGPU
(DIS)

ON
ON
ON

C

SIGNAL

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SLP_S1# SLP_S3#

HIGH HIGH HIGH HIGH

LOW

LOW

LOW LOW LOW LOW

SLP_S4# SLP_S5# +VALW +V +VS Clock

LOW

HIGH

LOWLOWLOW

Board ID / SKU ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0
1
2
3
4
5
6
7NC

100K +/- 5%Ra/Rc/Re

Rb / Rd / Rf V min

0

8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%

AD_BID

0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

BOARD ID Table

Board ID

0

*

1
2
3
4
5
6

PCB Revision

0.1

D

ON

ON

HIGHHIGHHIGH

HIGH

HIGH

V typ

AD_BID

ON

ON

ON

ON

OFF

ON

OFF

ON

V

0 V 0 V

0.503 V

0.819 V

1.185 V 1.264 V

2.200 V

3.300 V

BTO Option Table

BTO Item BOM Structure

DGPU VGA@

M96
Broadway

ON ON

ON

OFF

OFF

OFF

AD_BID

0.538 V

0.875 V

2.341 V

3.300 V

E

LOW

OFF

OFF

OFF

max

UMA@UMA
UMAO@UMA Only
DIS@DIS Only

NV@Braidwood
M96@
MAD@

7

EC SM Bus1 address

3 3

Device

Smart Battery

Address Address

0001 011X b

EC SM Bus2 address

Device

Ibex SM Bus address

Device

Clock Generator
(9LRS3199AKLFT, SLG8SP587)

DDR DIMM0
DDR DIMM2
ISL90727

ISL90728

4 4

A

Address

1101 0010b

1001 000Xb
1001 010Xb
0101 1100b

0111 1100b

B

USB Port Table

USB 2.0 USB 1.1 Port

UHCI0

UHCI1

EHCI1

UHCI2

UHCI3

UHCI4

EHCI2

UHCI5

UHCI6

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

4 External
USB Port

0

USB Conn.

1

USB/B

2

eSATA USB

3

CMOS Camera

4

Mini Card 1

5

Mini Card 2

6

7

8

USB Conn.

BOM Config
Switchable Graphics (M96)SKU: UMA@/SG@/VGA@
UMA only SKU: UMA@/UMAO@
DIS ONLY (M96): DIS@/VGA@

9

10

Blue Tooth

11

Finger Print

12

NewCard

13

Compal Secret Data

Compal Secret Data

2009/08/10 2010/08/10

2009/08/10 2010/08/10

2009/08/10 2010/08/10

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Switchable
Graphics

SG@

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511

401762

401762

401762

360Tuesday, August 18, 2009

360Tuesday, August 18, 2009

360Tuesday, August 18, 2009

of

of

E

of

C

C

C

5

JCPU1A

JCPU1A

DMI_PTX_HRX_N0
DMI_PTX_HRX_N1
DMI_PTX_HRX_N2
DMI_PTX_HRX_N3

DMI_PTX_HRX_P0
DMI_PTX_HRX_P1
DMI_PTX_HRX_P2

H_FDI_INT15

DMI_PTX_HRX_P3
DMI_HTX_PRX_N0

DMI_HTX_PRX_N1
DMI_HTX_PRX_N2
DMI_HTX_PRX_N3

DMI_HTX_PRX_P0
DMI_HTX_PRX_P1
DMI_HTX_PRX_P2
DMI_HTX_PRX_P3

H_FDI_TXN0
H_FDI_TXN1
H_FDI_TXN2
H_FDI_TXN3
H_FDI_TXN4
H_FDI_TXN5
H_FDI_TXN6
H_FDI_TXN7

H_FDI_TXP0
H_FDI_TXP1
H_FDI_TXP2
H_FDI_TXP3
H_FDI_TXP4
H_FDI_TXP5
H_FDI_TXP6
H_FDI_TXP7

D D

C C

H_FDI_FSYNC015
H_FDI_FSYNC115

H_FDI_LSYNC015
H_FDI_LSYNC115

B B

A24

DMI_RX#[0]

C23

DMI_RX#[1]

B22

DMI_RX#[2]

A21

DMI_RX#[3]

B24

DMI_RX[0]

D23

DMI_RX[1]

B23

DMI_RX[2]

A22

DMI_RX[3]

D24

DMI_TX#[0]

G24

DMI_TX#[1]

F23

DMI_TX#[2]

H23

DMI_TX#[3]

D25

DMI_TX[0]

F24

DMI_TX[1]

E23

DMI_TX[2]

G23

DMI_TX[3]

E22

FDI_TX#[0]

D21

FDI_TX#[1]

D19

FDI_TX#[2]

D18

FDI_TX#[3]

G21

FDI_TX#[4]

E19

FDI_TX#[5]

F21

FDI_TX#[6]

G18

FDI_TX#[7]

D22

FDI_TX[0]

C21

FDI_TX[1]

D20

FDI_TX[2]

C18

FDI_TX[3]

G22

FDI_TX[4]

E20

FDI_TX[5]

F20

FDI_TX[6]

G19

FDI_TX[7]

F17

FDI_FSYNC[0]

E17

FDI_FSYNC[1]

C17

FDI_INT

F18

FDI_LSYNC[0]

D17

FDI_LSYNC[1]

IC,AUB_CFD_rPGA,R1P0

IC,AUB_CFD_rPGA,R1P0
CONN@

CONN@

DMI Intel(R) FDI

DMI Intel(R) FDI

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RBIAS
PEG_RX#[0]

PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]

PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]

PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]

PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]

PCI EXPRESS -- GRAPHICS

PCI EXPRESS -- GRAPHICS

PEG_TX#[15]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

4

PEG_IRCOMP

B26
A26
B27

EXP_RBIAS

A25

PEG_GTX_C_HRX_N0

K35

PEG_GTX_C_HRX_N1

J34

PEG_GTX_C_HRX_N2

J33

PEG_GTX_C_HRX_N3

G35

PEG_GTX_C_HRX_N4

G32

PEG_GTX_C_HRX_N5

F34

PEG_GTX_C_HRX_N6

F31

PEG_GTX_C_HRX_N7

D35

PEG_GTX_C_HRX_N8

E33

PEG_GTX_C_HRX_N9

C33

PEG_GTX_C_HRX_N10

D32

PEG_GTX_C_HRX_N11

B32

PEG_GTX_C_HRX_N12

C31

PEG_GTX_C_HRX_N13

B28

PEG_GTX_C_HRX_N14

B30

PEG_GTX_C_HRX_N15

A31

PEG_GTX_C_HRX_P0

J35

PEG_GTX_C_HRX_P1

H34

PEG_GTX_C_HRX_P2

H33

PEG_GTX_C_HRX_P3

F35

PEG_GTX_C_HRX_P4

G33

PEG_GTX_C_HRX_P5

E34

PEG_GTX_C_HRX_P6

F32

PEG_GTX_C_HRX_P7

D34

PEG_GTX_C_HRX_P8

F33

PEG_GTX_C_HRX_P9

B33

PEG_GTX_C_HRX_P10

D31

PEG_GTX_C_HRX_P11

A32

PEG_GTX_C_HRX_P12

C30

PEG_GTX_C_HRX_P13

A28

PEG_GTX_C_HRX_P14

B29

PEG_GTX_C_HRX_P15

A30

PEG_HTX_GRX_N0

L33

PEG_HTX_GRX_N1

M35

PEG_HTX_GRX_N2

M33

PEG_HTX_GRX_N3

M30

PEG_HTX_GRX_N4

L31

PEG_HTX_GRX_N5

K32

PEG_HTX_GRX_N6

M29

PEG_HTX_GRX_N7

J31

PEG_HTX_GRX_N8

K29

PEG_HTX_GRX_N9

H30

PEG_HTX_GRX_N10

H29

PEG_HTX_GRX_N11

F29

PEG_HTX_GRX_N12

E28

PEG_HTX_GRX_N13

D29

PEG_HTX_GRX_N14

D27

PEG_HTX_GRX_N15

C26

PEG_HTX_GRX_P0

L34

PEG_HTX_GRX_P1

M34

PEG_HTX_GRX_P2

M32

PEG_HTX_GRX_P3

L30

PEG_HTX_GRX_P4

M31

PEG_HTX_GRX_P5

K31

PEG_HTX_GRX_P6

M28

PEG_HTX_GRX_P7

H31

PEG_HTX_GRX_P8

K28

PEG_HTX_GRX_P9

G30

PEG_HTX_GRX_P10

G29

PEG_HTX_GRX_P11

F28

PEG_HTX_GRX_P12

E27

PEG_HTX_GRX_P13

D28

PEG_HTX_GRX_P14

C27

PEG_HTX_GRX_P15

C25

R659

R659

1 2

R669

R669

1 2

C722 0.1U_0402_16V7KVGA@C722 0.1U_0402_16V7KVGA@
C724 0.1U_0402_16V7KVGA@C724 0.1U_0402_16V7KVGA@
C718 0.1U_0402_16V7KVGA@C718 0.1U_0402_16V7KVGA@
C720 0.1U_0402_16V7KVGA@C720 0.1U_0402_16V7KVGA@
C693 0.1U_0402_16V7KVGA@C693 0.1U_0402_16V7KVGA@
C716 0.1U_0402_16V7KVGA@C716 0.1U_0402_16V7KVGA@
C691 0.1U_0402_16V7KVGA@C691 0.1U_0402_16V7KVGA@
C698 0.1U_0402_16V7KVGA@C698 0.1U_0402_16V7KVGA@
C689 0.1U_0402_16V7KVGA@C689 0.1U_0402_16V7KVGA@
C707 0.1U_0402_16V7KVGA@C707 0.1U_0402_16V7KVGA@
C687 0.1U_0402_16V7KVGA@C687 0.1U_0402_16V7KVGA@
C705 0.1U_0402_16V7KVGA@C705 0.1U_0402_16V7KVGA@
C685 0.1U_0402_16V7KVGA@C685 0.1U_0402_16V7KVGA@
C703 0.1U_0402_16V7KVGA@C703 0.1U_0402_16V7KVGA@
C683 0.1U_0402_16V7KVGA@C683 0.1U_0402_16V7KVGA@
C701 0.1U_0402_16V7KVGA@C701 0.1U_0402_16V7KVGA@

C723 0.1U_0402_16V7KVGA@C723 0.1U_0402_16V7KVGA@
C725 0.1U_0402_16V7KVGA@C725 0.1U_0402_16V7KVGA@
C719 0.1U_0402_16V7KVGA@C719 0.1U_0402_16V7KVGA@
C721 0.1U_0402_16V7KVGA@C721 0.1U_0402_16V7KVGA@
C694 0.1U_0402_16V7KVGA@C694 0.1U_0402_16V7KVGA@
C717 0.1U_0402_16V7KVGA@C717 0.1U_0402_16V7KVGA@
C692 0.1U_0402_16V7KVGA@C692 0.1U_0402_16V7KVGA@
C699 0.1U_0402_16V7KVGA@C699 0.1U_0402_16V7KVGA@
C690 0.1U_0402_16V7KVGA@C690 0.1U_0402_16V7KVGA@
C708 0.1U_0402_16V7KVGA@C708 0.1U_0402_16V7KVGA@
C688 0.1U_0402_16V7KVGA@C688 0.1U_0402_16V7KVGA@
C706 0.1U_0402_16V7KVGA@C706 0.1U_0402_16V7KVGA@
C686 0.1U_0402_16V7KVGA@C686 0.1U_0402_16V7KVGA@
C704 0.1U_0402_16V7KVGA@C704 0.1U_0402_16V7KVGA@
C684 0.1U_0402_16V7KVGA@C684 0.1U_0402_16V7KVGA@
C702 0.1U_0402_16V7KVGA@C702 0.1U_0402_16V7KVGA@

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

49.9_0402_1%

49.9_0402_1%

750_0402_1%

750_0402_1%

3

PEG_HTX_C_GRX_N0
PEG_HTX_C_GRX_N1
PEG_HTX_C_GRX_N2
PEG_HTX_C_GRX_N3
PEG_HTX_C_GRX_N4
PEG_HTX_C_GRX_N5
PEG_HTX_C_GRX_N6
PEG_HTX_C_GRX_N7
PEG_HTX_C_GRX_N8

PEG_HTX_C_GRX_N9
PEG_HTX_C_GRX_N10
PEG_HTX_C_GRX_N11
PEG_HTX_C_GRX_N12
PEG_HTX_C_GRX_N13
PEG_HTX_C_GRX_N14
PEG_HTX_C_GRX_N15

PEG_HTX_C_GRX_P0

PEG_HTX_C_GRX_P1

PEG_HTX_C_GRX_P2

PEG_HTX_C_GRX_P3

PEG_HTX_C_GRX_P4

PEG_HTX_C_GRX_P5

PEG_HTX_C_GRX_P6

PEG_HTX_C_GRX_P7

PEG_HTX_C_GRX_P8

PEG_HTX_C_GRX_P9
PEG_HTX_C_GRX_P10
PEG_HTX_C_GRX_P11
PEG_HTX_C_GRX_P12
PEG_HTX_C_GRX_P13
PEG_HTX_C_GRX_P14
PEG_HTX_C_GRX_P15

R796

R796
100K_0402_5%

100K_0402_5%

1 2

@

@

H_DIMMA_REF10
H_DIMMB_REF11

@

@

1 2

R797

R797
100K_0402_5%

100K_0402_5%

R136

R136

3.01K_0402_1% @

3.01K_0402_1% @
R139

R139

3.01K_0402_1% @

3.01K_0402_1% @
R138

3.01K_0402_1%

3.01K_0402_1%
R137

3.01K_0402_1%

3.01K_0402_1%

WW41 Recommend not pull down
PCIE2.0 Jitter is over on ES1

1 2

1 2

@R138

@

1 2

@R137

@

1 2

R690

R690
0_0402_5%

0_0402_5%

@

@

1 2

@

@

1 2

R695

R695
0_0402_5%

0_0402_5%

DMI_PTX_HRX_N[0..3] 15
DMI_PTX_HRX_P[0..3] 15

DMI_HTX_PRX_N[0..3] 15
DMI_HTX_PRX_P[0..3] 15

H_FDI_TXN[0..7] 15

H_FDI_TXP[0..7] 15

PEG_GTX_C_HRX_N[0..15] 23
PEG_GTX_C_HRX_P[0..15] 23

PEG_HTX_C_GRX_N[0..15] 23
PEG_HTX_C_GRX_P[0..15] 23

2

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18

H_RSVD17_R
H_RSVD18_R

AP25

AL25
AL24
AL22
AJ33

AG9
M27

H17
G25
G17

E31

E30

AM30
AM28
AP31

AL32

AL30
AM31
AN29
AM32
AK32
AK31
AK28

AJ28
AN30
AN32

AJ32

AJ29

AJ30
AK30

H16

B19
A19

A20
B20

AC9
AB9

A34
A33

C35
B35

L28
J17

U9
T9

C1
A3

J29
J28

JCPU1E

JCPU1E

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
SA_DIMM_VREF
SB_DIMM_VREF
RSVD11
RSVD12
RSVD13
RSVD14

CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
RSVD_TP_86

RSVD15
RSVD16

RSVD17
RSVD18

RSVD19
RSVD20

RSVD21
RSVD22

RSVD_NCTF_23
RSVD_NCTF_24

RSVD26
RSVD27

RSVD_NCTF_28
RSVD_NCTF_29

RSVD_NCTF_30
RSVD_NCTF_31

(CFD Only)
(CFD Only)

RESERVED

RESERVED

RSVD32
RSVD33

RSVD34
RSVD35

RSVD36

RSVD_NCTF_37

RSVD38
RSVD39

RSVD_NCTF_40
RSVD_NCTF_41

RSVD_NCTF_42
RSVD_NCTF_43

RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52

RSVD53
RSVD_NCTF_54
RSVD_NCTF_55
RSVD_NCTF_56
RSVD_NCTF_57

RSVD58

RSVD_TP_59
RSVD_TP_60

KEY
RSVD62
RSVD63
RSVD64
RSVD65

RSVD_TP_66
RSVD_TP_67
RSVD_TP_68
RSVD_TP_69
RSVD_TP_70
RSVD_TP_71
RSVD_TP_72
RSVD_TP_73
RSVD_TP_74
RSVD_TP_75

RSVD_TP_76
RSVD_TP_77
RSVD_TP_78
RSVD_TP_79
RSVD_TP_80
RSVD_TP_81
RSVD_TP_82
RSVD_TP_83
RSVD_TP_84
RSVD_TP_85

VSS

AJ13
AJ12

AH25
AK26

AL26
AR2

AJ26
AJ27

AP1
AT2

AT3
AR1

AL28
AL29
AP30
AP32
AL27
AT31
AT32
AP33
AR33
AT33
AT34
AP35
AR35
AR32

E15
F15
A2
D15
C15
AJ15
AH15

AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3

V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9

AP34

1

RSVD64_R
RSVD65_R

R313

R313
0_0402_5%

0_0402_5%

R312

R312
0_0402_5%

0_0402_5%

@

@

12

@

@

12

IC,AUB_CFD_rPGA,R1P0

IC,AUB_CFD_rPGA,R1P0
CONN@

CONN@

eDP Signals MAPPING
eDP Singal

eDP_TX0

PEG Singals

PEG_HTX_C_GRX_P15
eDP_TX#0 PEG_HTX_C_GRX_N15
eDP_TX1 PEG_HTX_C_GRX_P14
eDP_TX#1

A A

eDP_TX2
eDP_TX#2
eDP_TX3
eDP_TX#3
eDP_AUX
eDP_AUX#
eDP_HPD#

PEG_HTX_C_GRX_N14

PEG_HTX_C_GRX_P13

PEG_HTX_C_GRX_N13

PEG_HTX_C_GRX_P12

PEG_HTX_C_GRX_N12

PEG_GTX_C_HRX_P13

PEG_GTX_C_HRX_N13

PEG_GTX_C_HRX_P12

5

Lane Reversal
PEG_HTX_C_GRX_P0
PEG_HTX_C_GRX_N0
PEG_HTX_C_GRX_P1
PEG_HTX_C_GRX_N1
PEG_HTX_C_GRX_P2
PEG_HTX_C_GRX_N2
PEG_HTX_C_GRX_P3
PEG_HTX_C_GRX_N3
PEG_GTX_C_HRX_P2
PEG_GTX_C_HRX_N2
PEG_GTX_C_HRX_P3

H_FDI_FSYNC0
H_FDI_FSYNC1

H_FDI_INT
H_FDI_LSYNC0

H_FDI_LSYNC1

CheckList0.8 1.22
Auburndale Graphics Disable

4

R711 1K_0402_5%DIS@R711 1K_0402_5%DIS@

1 2

R705 1K_0402_5%DIS@R705 1K_0402_5%DIS@

1 2

R699 1K_0402_5%DIS@R699 1K_0402_5%DIS@

1 2

R710 1K_0402_5%DIS@R710 1K_0402_5%DIS@

1 2

R697 1K_0402_5%DIS@R697 1K_0402_5%DIS@

1 2

Security Classification

Security Classification

Security Classification

2009/08/10 2010/08/10

2009/08/10 2010/08/10

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/08/10 2010/08/10

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

CFG0 - PCI-Express Configuration Select

*1:Single PEG
0:Bifurcation enabled

CFG3 - PCI-Express Static Lane Reversal

*1 :Normal Operation
0 :Lane Numbers Reversed
15 -> 0, 14 -> 1, ...

Deciphered Date

Deciphered Date

Deciphered Date

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

Date: Sheet

CFG4 - Display Port Presence

*1:Disabled; No Physical Display Port
attached to Embedded Display Port
0:Enabled; An external Display Port
device is connected to the Embedded
Display Port

*:Default

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511
401762

401762

401762

1

C

C

C

460Tuesday, August 18, 2009

460Tuesday, August 18, 2009

460Tuesday, August 18, 2009

of

of

of

5

JCPU1B

H_COMP3
H_COMP2
H_COMP1
H_COMP0

SKTOCC#_R

@

@

PAD

PAD

T7

R741

1 2

0_0402_5%

0_0402_5%

R298

R298

1 2

0_0402_5%

0_0402_5%

R297
0_0402_5%

0_0402_5%
R317

0_0402_5%

0_0402_5%
R320

0_0402_5%

0_0402_5%

R322

1 2

0_0402_5%

0_0402_5%

H_VTTPWRGD

R86
0_0402_5%

0_0402_5%

R261

1 2

1.5K_0402_1%

1.5K_0402_1%

T7

R741

R297

1 2

R317

1 2

R320

1 2

R322

R86

1 2

R261

H_CATERR#

H_PECI_R

H_PROCHOT#

H_THERMTRIP#_R

H_CPURST#

H_PM_SYNC_R

H_CPUPWRGD_1

H_CPUPWRGD_0

PM_DRAM_PWRGD_R

PLT_RST#_R

12

R260

R260
750_0402_1%

750_0402_1%

D D

H_PECI18

H_PROCHOT#56

H_THERMTRIP#18

H_PM_SYNC15

C C

H_CPUPWRGD18

PM_DRAM_PWRGD15

H_VTTPWRGD53

H_PWRGD_XDP H_PWRGD_XDP_R

PLT_RST#17,21,34,38

2009/2/4
#414044 DG
Update Rev1.11

JCPU1B

AT23
AT24

G16

AT26

AH24

AK14

AT15

AN26

AK15

AP26

AL15

AN14

AN27

AK13

AM15

AM26

AL14

IC,AUB_CFD_rPGA,R1P0

IC,AUB_CFD_rPGA,R1P0
CONN@

CONN@

4

COMP3
COMP2
COMP1
COMP0

SKTOCC#

CATERR#

PECI

PROCHOT#

THERMTRIP#

RESET_OBS#

PM_SYNC

VCCPWRGOOD_1

VCCPWRGOOD_0

SM_DRAMPWROK

VTTPWRGOOD

TAPPWRGOOD

RSTIN#

MISC THERMAL

MISC THERMAL

DPLL_REF_SSCLK#

CLOCKS

CLOCKS

DDR3

MISC

DDR3

MISC

PWR MANAGEMENT

PWR MANAGEMENT

JTAG & BPM

JTAG & BPM

BCLK

BCLK#

BCLK_ITP

BCLK_ITP#

PEG_CLK

PEG_CLK#

DPLL_REF_SSCLK

SM_DRAMRST#

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

PM_EXT_TS#[0]
PM_EXT_TS#[1]

PRDY#
PREQ#

TCK
TMS

TRST#

TDO

TDI_M

TDO_M

DBR#

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

TDI

3

CLK_CPU_BCLK_R

A16

CLK_CPU_BCLK#_R

B16

CLK_CPU_ITP_R

AR30

CLK_CPU_ITP#_R

AT30

CLK_CPU_DMI_R

E16

CLK_CPU_DMI#_R

D16

CLK_CPU_DP_R

A18

CLK_CPU_DP#_R

A17

F6

SM_RCOMP_0

AL1

SM_RCOMP_1

AM1

SM_RCOMP_2

AN1

PM_EXTTS#0

AN15

PM_EXTTS#1_R

AP15

XDP_PRDY#

AT28

XDP_PREQ#

AP27

XDP_TCLK

AN28

XDP_TMS

AP28

XDP_TRST#

AT27

XDP_TDI_R

AT29

XDP_TDO_R

AR27

XDP_TDI_M

AR29

XDP_TDO_M

AP29

XDP_DBR#_R

AN25

AJ22
AK22
AK24
AJ24
AJ25
AH22
AK23
AH23

2009/2/4
Delete dampling resistor for
power noise and Layout space
issue

R225 100K_0402_5%@R225 100K_0402_5%@

R197 0_0402_5% R197 0_0402_5%

XDP_OBS0
XDP_OBS1
XDP_OBS2
XDP_OBS3
XDP_OBS4
XDP_OBS5
XDP_OBS6
XDP_OBS7

R720 0_0402_5% R720 0_0402_5%

1 2

R723 0_0402_5% R723 0_0402_5%

1 2

R657 0_0402_5% R657 0_0402_5%

1 2

R663 0_0402_5% R663 0_0402_5%

1 2

R717 0_0402_5% R717 0_0402_5%

1 2

R714 0_0402_5% R714 0_0402_5%

1 2

R703 0_0402_5%UMA@R703 0_0402_5%UMA@

1 2

R708 0_0402_5%UMA@R708 0_0402_5%UMA@

1 2

1 2

1 2

SM_DRAMRST# 10

R730 10K_0402_5% R730 10K_0402_5%

1 2

R726 10K_0402_5% R726 10K_0402_5%

1 2

R740 0_0402_5% R740 0_0402_5%

1 2

XDP_DBRESET#

CLK_CPU_BCLK 18
CLK_CPU_BCLK# 18

CLK_CPU_XDP
CLK_CPU_XDP#

CLK_CPU_DMI 14
CLK_CPU_DMI# 14

CLK_CPU_DP 14
CLK_CPU_DP# 14

2

+1.1VS_VTT

PM_EXTTS#0_1 10,11

XDP_DBRESET# 15,21

CLK_CPU_DP_R
CLK_CPU_DP#_R

JTAG MAPPING

1

R230 0_0402_5%DIS@R230 0_0402_5%DIS@

1 2

R238 0_0402_5%DIS@R238 0_0402_5%DIS@

1 2

+1.1VS_VTT

XDP_PRDY#
XDP_TMS
XDP_TDI_R
XDP_PREQ#
XDP_TCLK

XDP_TRST#

XDP_TDI_R XDP_TDI

XDP_TDI_M
XDP_TDO_R

Scan Chain
(Default)

CPU Only

GMCH Only

R191 51_0402_5%@R191 51_0402_5%@

1 2

R79 51_0402_5%@R79 51_0402_5%@

1 2

R680 51_0402_5%@R680 51_0402_5%@

1 2

R199 51_0402_5%@R199 51_0402_5%@

1 2

R74 51_0402_5%@R74 51_0402_5%@

1 2

R193 51_0402_5% R193 51_0402_5%

1 2

R672 0_0402_5% R672 0_0402_5%

1 2

R662 0_0402_5%@R662 0_0402_5%@

1 2

12

R667

R667
0_0402_5%

0_0402_5%

@

@

1 2

R671 0_0402_5%

R671 0_0402_5%

1 2

R192 0_0402_5%

R192 0_0402_5%

STUFF -> R653, R657, R662
NO STUFF -> R655, R660

STUFF -> R653, R655
NO STUFF -> R657, R660, R662

STUFF -> R660, R662
NO STUFF -> R653, R655, R657

XDP_TDOXDP_TDO_M

+3VALW

5

U49

U49

2

P

B B

PM_DRAM_PWRGD_R

A A

2009/4/13
Intel Suggestion by Desige guide V1.52

+1.5V_1

12

R334

R334

1.1K_0402_1%

1.1K_0402_1%

R337

R337
3K_0402_1%

3K_0402_1%

12

When implement S3 power reduction
not to pop R337
pop U49,R336,R335,R334...

5

4

Y

12

R336

R336

1.5K_0402_1%

1.5K_0402_1%
@

@

Change to 1.5K

12

R335

R335
750_0402_1%

750_0402_1%

@

@

B

1

A

G

NC7SZ08P5X_NL_SC70-5

NC7SZ08P5X_NL_SC70-5

3

@

@

H_VTTPWRGD_3.3

H_CATERR#
H_PROCHOT#
H_CPURST#

H_COMP0
H_COMP1
H_COMP2
H_COMP3

SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2

R330 49.9_0402_1% R330 49.9_0402_1%
R206 68_0402_5% R206 68_0402_5%
R207 68_0402_5%@R207 68_0402_5%@

R673 49.9_0402_1% R673 49.9_0402_1%
R249 49.9_0402_1% R249 49.9_0402_1%
R684 20_0402_1% R684 20_0402_1%
R689 20_0402_1% R689 20_0402_1%

R749 100_0402_1% R749 100_0402_1%
R748 24.9_0402_1% R748 24.9_0402_1%
R747 130_0402_1% R747 130_0402_1%

H_VTTPWRGD_3.3 53

1 2
1 2
1 2

1 2
1 2
1 2
1 2

1 2
1 2
1 2

+1.1VS_VTT

R96

R96
1K_0402_5%

1K_0402_5%

1

2

Issued Date

Issued Date

Issued Date

H_CPUPWRGD

PBTN_OUT#15,21,38

+1.1VS_VTT

C168

C168

0.1U_0402_16V4Z

0.1U_0402_16V4Z
@

@

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2
1 2

R93 0_0402_5%

R93 0_0402_5%

SMB_DATA_S321
SMB_CLK_S321

3

XDP_PREQ#
XDP_PRDY#

XDP_OBS0
XDP_OBS1

XDP_OBS2
XDP_OBS3

XDP_OBS4
XDP_OBS5

XDP_OBS6
XDP_OBS7

H_PWRGOOD_R
PBTN_OUT#_XDP

H_PWRGD_XDP

XDP_TCLK

Compal Secret Data

Compal Secret Data

2009/08/10 2010/08/10

2009/08/10 2010/08/10

2009/08/10 2010/08/10

Compal Secret Data

XDP Connector

JP5

JP5

1

GND0

3

OBSFN_A0

5

OBSFN_A1

7

GND2

9

OBSDATA_A0

11

OBSDATA_A1

13

GND4

15

OBSDATA_A2

17

OBSDATA_A3

19

GND6

21

OBSFN_B0

23

OBSFN_B1

25

GND8

27

OBSDATA_B0

29

OBSDATA_B1

31

GND10

33

OBSDATA_B2

35

OBSDATA_B3

37

GND12

39

PWRGOOD/HOOK0

41

HOOK1

43

VCC_OBS_AB

45

HOOK2

47

HOOK3

49

GND14

51

SDA

53

SCL

55

TCK1

57

TCK0

59

GND16

Deciphered Date

Deciphered Date

Deciphered Date

SAMTE_BSH-030-01-L-D-ACONN@

SAMTE_BSH-030-01-L-D-ACONN@

GND1
OBSFN_C0
OBSFN_C1

GND3

OBSDATA_C0
OBSDATA_C1

GND5

OBSDATA_C2
OBSDATA_C3

GND7
OBSFN_D0
OBSFN_D1

GND9

OBSDATA_D0
OBSDATA_D1

GND11
OBSDATA_D2
OBSDATA_D3

GND13

ITPCLK/HOOK4

ITPCLK#/HOOK5

VCC_OBS_CD

RESET#/HOOK6

DBR#/HOOK7

GND15

TD0

TRST#

TMS

GND17

2

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38

CLK_CPU_XDP

40

CLK_CPU_XDP#

42
44

H_RESET#_R

46

XDP_DBRESET#

48
50

XDP_TDO

52

XDP_TRST#

54

XDP_TDI

56

TDI

XDP_TMS

58
60

Title

Title

Title

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

401762

401762

401762

Date: Sheet

Date: Sheet

Date: Sheet

R89

R89
1K_0402_5%

1K_0402_5%

1 2
1 2

R92

R92
0_0402_5%

0_0402_5%

R87

1 2

R85

1 2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

@

@

H_CPURST#
PLT_RST#H_RESET#_R

R87
1K_0402_5%

1K_0402_5%
R85
51_0402_5%

51_0402_5%

+1.1VS_VTT
+3VS
+1.1VS_VTT

1

Leakage Issue

560Tuesday, August 18, 2009

560Tuesday, August 18, 2009

560Tuesday, August 18, 2009

of

of

of

C

C

C

5

JCPU1C

A10
C10

B10
D10
E10

F10

H10

G10

J10

AH5

AF5
AK6
AK7
AF6

AG5

AJ7
AJ6

AJ10

AJ9

AL10

AK12

AK8
AL7

AK11

AL8

AN8
AM10
AR11

AL11

AM9

AN9

AT11
AP12
AM12
AN12
AM13

AT14

AT12

AL13
AR14
AP14

AC3

AB2

AE1
AB3
AE9

C7
A7

A8
D8

E6

F7
E9
B7
E7
C6

G8
K7

J8
G7

J7

L7
M6
M8

L9

L6
K8
N8
P9

U7

JCPU1C

SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

SA_BS[0]
SA_BS[1]
SA_BS[2]

SA_CAS#
SA_RAS#
SA_WE#

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

DDR_A_D[0..63]10
DDR_A_DM[0..7]10

DDR_A_DQS#[0..7]10

DDR_A_DQS[0..7]10

DDR_A_MA[0..15]10

DDR_A_D0
DDR_A_D1

D D

C C

B B

DDR_A_BS010
DDR_A_BS110
DDR_A_BS210

DDR_A_CAS#10
DDR_A_RAS#10

DDR_A_WE#10

DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

DDR_A_BS0
DDR_A_BS1
DDR_A_BS2

DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#

SA_CK[0]
SA_CK#[0]
SA_CKE[0]

SA_CK[1]
SA_CK#[1]
SA_CKE[1]

SA_CS#[0]
SA_CS#[1]

SA_ODT[0]
SA_ODT[1]

SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]

SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

4

AA6
AA7
P7

Y6
Y5
P6

AE2
AE8

AD8
AF9

B9
D7
H7
M7
AG6
AM7
AN10
AN13

C9
F8
J9
N9
AH7
AK9
AP11
AT13

C8
F9
H9
M9
AH8
AK10
AN11
AR13

Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15

DDR_A_CLK0 10
DDR_A_CLK0# 10
DDR_A_CKE0 10

DDR_A_CLK1 10
DDR_A_CLK1# 10
DDR_A_CKE1 10

DDR_A_CS0# 10
DDR_A_CS1# 10

DDR_A_ODT0 10
DDR_A_ODT1 10

3

DDR_B_D[0..63]11

DDR_B_DM[0..7]11

DDR_B_DQS#[0..7]11

DDR_B_DQS[0..7]11

DDR_B_MA[0..15]11

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

DDR_B_BS011
DDR_B_BS111
DDR_B_BS211

DDR_B_CAS#11
DDR_B_RAS#11

DDR_B_WE#11

DDR_B_BS0
DDR_B_BS1
DDR_B_BS2

DDR_B_CAS#
DDR_B_RAS#
DDR_B_WE#

AF3

AG1

AK1
AG4
AG3

AH4

AK3

AK4
AM6
AN2

AK5

AK2
AM4
AM3

AP3
AN5

AT4
AN6
AN4
AN3

AT5

AT6
AN7

AP6

AP8

AT9

AT7

AP9

AR10
AT10

AB1

AC5
AC6

B5
A5
C3
B3
E4
A6
A4
C4
D1
D2
F2
F1
C2
F5
F3

G4

H6

G2

J6

J3
G1
G5

J2

J1

J5

K2

L3
M1

K5
K4

M4

N5

AJ3

AJ4

W5

R7

Y7

JCPU1D

JCPU1D

SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

SB_BS[0]
SB_BS[1]
SB_BS[2]

SB_CAS#
SB_RAS#
SB_WE#

2

SB_CK[0]

SB_CK#[0]

SB_CKE[0]

SB_CK[1]

SB_CK#[1]

SB_CKE[1]

SB_CS#[0]
SB_CS#[1]

SB_ODT[0]
SB_ODT[1]

SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

DDR SYSTEM MEMORY - B

DDR SYSTEM MEMORY - B

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]

SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

W8
W9
M3

V7
V6
M2

AB8
AD6

AC7
AD1

D4
E1
H3
K1
AH1
AL2
AR4
AT8

D5
F4
J4
L4
AH2
AL4
AR5
AR8

C5
E3
H4
M5
AG2
AL5
AP5
AR7

U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15

1

DDR_B_CLK0 11
DDR_B_CLK0# 11
DDR_B_CKE0 11

DDR_B_CLK1 11
DDR_B_CLK1# 11
DDR_B_CKE1 11

DDR_B_CS0# 11
DDR_B_CS1# 11

DDR_B_ODT0 11
DDR_B_ODT1 11

IC,AUB_CFD_rPGA,R1P0

IC,AUB_CFD_rPGA,R1P0
CONN@

CONN@

A A

Security Classification

Security Classification

Security Classification

2009/08/10 2010/08/10

2009/08/10 2010/08/10

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/08/10 2010/08/10

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

IC,AUB_CFD_rPGA,R1P0

IC,AUB_CFD_rPGA,R1P0
CONN@

CONN@

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

401762

401762

401762

660Tuesday, August 18, 2009

660Tuesday, August 18, 2009

660Tuesday, August 18, 2009

of

1

of

C

C

C

5

JCPU1F

JCPU1F

+CPU_CORE

WW15 MOW

48A Continuous 18A

AG35

VCC1

AG34

VCC2

AG33

VCC3

AG32

D D

C C

B B

A A

AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26

VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

1.1V RAIL POWER

1.1V RAIL POWER

CPU CORE SUPPLY

CPU CORE SUPPLY

POWER

POWER

CPU VIDS

CPU VIDS

SENSE LINES

SENSE LINES

Peak 21A

VTT0_1
VTT0_2
VTT0_3
VTT0_4
VTT0_5
VTT0_6
VTT0_7
VTT0_8

VTT0_9
VTT0_10
VTT0_11
VTT0_12
VTT0_13
VTT0_14
VTT0_15
VTT0_16
VTT0_17
VTT0_18
VTT0_19
VTT0_20
VTT0_21
VTT0_22
VTT0_23
VTT0_24
VTT0_25
VTT0_26
VTT0_27
VTT0_28
VTT0_29
VTT0_30
VTT0_31
VTT0_32

VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_43
VTT0_44

PSI#

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

PROC_DPRSLPVR

VTT_SELECT

ISENSE

VCC_SENSE

VSS_SENSE

VTT_SENSE

VSS_SENSE_VTT

4

AH14
AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15

AN33

AK35
AK33
AK34
AL35
AL33
AM33
AM35
AM34

H_VTTVID1

G15

H_VTTVID1 = low, 1.1V

H_VTTVID1 = high, 1.05V

AN35

VCCSENSE_CPU

AJ34

VSSSENSE_CPU

AJ35

B15

VSS_SENSE_VTT

A15

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C412

C412

2

10U_0805_6.3V6M

10U_0805_6.3V6M

C800

C800

<BOM Structure>

<BOM Structure>

330U_X_2VM_R6M

330U_X_2VM_R6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C413

C413

2

22U_0805_6.3V6M

22U_0805_6.3V6M

IMVP_IMON 56

R615 0_0402_5% R615 0_0402_5%

1 2

R614 0_0402_5% R614 0_0402_5%

1 2

R727 0_0402_5% R727 0_0402_5%

1

C386

C386

2

10U_0805_6.3V6M

10U_0805_6.3V6M

330U_X_2VM_R6M

330U_X_2VM_R6M

1

1

+

+

+

+

C799

C799

2

2

1

C414

C414

2

VTT_SENSE 53

1 2

3

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C381

C381

2

+1.1VS_VTT

C802

C802

@

@

330U_X_2VM_R6M

330U_X_2VM_R6M

+1.1VS_VTT

10U_0805_6.3V6M

10U_0805_6.3V6M

1

1

C411

C411

C408

C408

2

2

10U_0805_6.3V6M

10U_0805_6.3V6M

1

+

+

2

H_PSI# 56

CPU_VID0 56
CPU_VID1 56
CPU_VID2 56
CPU_VID3 56
CPU_VID4 56
CPU_VID5 56
CPU_VID6 56
H_DPRSLPVR 56

H_VTTVID1 53

1

C392

C392

2

10U_0805_6.3V6M

10U_0805_6.3V6M

1

2

VTT Rail

Auburndale +1.1VS_VTT=1.05V
Clarksfield +1.1VS_VTT=1.1V

1 2

R604 100_0402_1%

R604 100_0402_1%

VCCSENSE
VSSSENSE

1 2

R603 100_0402_1%

R603 100_0402_1%

+1.1VS_VTT

+CPU_CORE

10U_0805_6.3V6M

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

330U_D2_2.5VM_R6M

330U_D2_2.5VM_R6M

10U_0805_6.3V6M

1

C330

C330

2

+CPU_CORE

C232

C232

+1.1VS_VTT

C368

C368

CSC (Current Sense Configuration)
8/25

CPU_VID0

CPU_VID1

CPU_VID2

CPU_VID3

CPU_VID4

CPU_VID5

CPU_VID6

H_DPRSLPVR

H_PSI#

R605 1K_0402_1% R605 1K_0402_1%
R616 1K_0402_1%@R616 1K_0402_1%@

R606 1K_0402_1% R606 1K_0402_1%
R617 1K_0402_1%@R617 1K_0402_1%@

R607 1K_0402_1% R607 1K_0402_1%
R618 1K_0402_1%@R618 1K_0402_1%@

R608 1K_0402_1%@R608 1K_0402_1%@
R619 1K_0402_1% R619 1K_0402_1%

R259 1K_0402_1%@R259 1K_0402_1%@
R263 1K_0402_1% R263 1K_0402_1%

R609 1K_0402_1% R609 1K_0402_1%
R620 1K_0402_1%@R620 1K_0402_1%@

R610 1K_0402_1%@R610 1K_0402_1%@
R621 1K_0402_1% R621 1K_0402_1%

R611 1K_0402_1% R611 1K_0402_1%
R622 1K_0402_1%@R622 1K_0402_1%@

R612 1K_0402_1%@R612 1K_0402_1%@
R623 1K_0402_1% R623 1K_0402_1%

+CPU_CORE

VCCSENSE 56
VSSSENSE 56

2

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C365

C344

C344

2

10U_0805_6.3V6M

10U_0805_6.3V6M

(Place these capacitors between inductor and socket on Bottom)

+CPU_CORE

C401

10U_0805_6.3V6M

10U_0805_6.3V6M

4 x 330uF(6m ohm@100kHz)

1

+

+

2

C186

C186

330U_D2_2.5VM_R6M

330U_D2_2.5VM_R6M

TOP side (under inductor)

10U_0805_6.3V6M

10U_0805_6.3V6M

1

2

1

2

C774

1

+

+

@

@

2

+CPU-CORE
Decoupling
SPCAP,Polymer

MLCC 0805 X5R

1

C365

C384

2

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C397

C401

2

(Place these capacitors under CPU socket, top layer)

+CPU_CORE

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C772

C774

2

22U_0805_6.3V6M

22U_0805_6.3V6M

(Place these capacitors on CPU cavity, Bottom Layer)

+CPU_CORE

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C787

C787

2

22U_0805_6.3V6M

22U_0805_6.3V6M

C711

C711

330U_D2_2.5VM_R6M

330U_D2_2.5VM_R6M

1

C384

C398

2

1

C397

C335

2

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C772

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C792

C792

2

22U_0805_6.3V6M

22U_0805_6.3V6M

(Place these capacitors on CPU cavity, Bottom Layer)

1

+

+

330U_D2_2.5VM_R6M

330U_D2_2.5VM_R6M

2

C,uF
4X330uF 6m ohm/4

16X22uF
16X10uF 3m ohm/16

C349

C398

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

C402

C335

1

C773

C773

2

1

C791

C791

2

C221

C221

1

2

1

2

C771

ESR, mohm

3m ohm/12

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C333

C349

2

1

C402

C385

2

10U_0805_6.3V6M

10U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C771

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C790

C790

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

+

+

330U_D2_2.5VM_R6M

330U_D2_2.5VM_R6M

2

1

C333

C364

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

C385

C334

1

C770

C770

2

1

C789

C789

2

1

+

+

C259

C259

330U_D2_2.5VM_R6M

330U_D2_2.5VM_R6M

2

Stuffing Option

2X330uF

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C399

C364

2

1

C400

C334

2

10U_0805_6.3V6M

10U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C769

C769

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C788

C788

2

C196

C196

1

C399

2

1

C400

2

1

+

+

@

@

2

Security Classification

Security Classification

IC,AUB_CFD_rPGA,R1P0

IC,AUB_CFD_rPGA,R1P0
CONN@

CONN@

5

4

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/08/10 2010/08/10

2009/08/10 2010/08/10

2009/08/10 2010/08/10

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511
401762

401762

401762

1

C

C

C

of

of

of

760Tuesday, August 18, 2009

760Tuesday, August 18, 2009

760Tuesday, August 18, 2009

5

4

3

2

1

+VGFX_CORE

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C358

C358

C359

C359

@

@

@

D D

C795

330U_X_2VM_R6M

330U_X_2VM_R6M

C C

B B

C795

UMA@

UMA@

@

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

+

+

C406

C406
@

@

2

330U_X_2VM_R6M

330U_X_2VM_R6M

22U_0805_6.3V6M

1

1

C404

C404

C405

C405

@

@

@

@

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

+

+

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

C357

C357

C403

C403

UMA@

UMA@

UMA@

UMA@

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

12

R696

R696
0_0402_5%

0_0402_5%
DIS@

DIS@

+1.1VS_VTT

C415

C415

+1.1VS_VTT

C419

C419

1

2

1

2

10U_0805_6.3V6M

10U_0805_6.3V6M

1

1

C786

C786

C785

C785

UMA@

UMA@

UMA@

UMA@

2

2

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C416

C416
22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C420

C420
22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

2

JCPU1G

JCPU1G

AT21

VAXG1

AT19

VAXG2

AT18

VAXG3

AT16

VAXG4

AR21

VAXG5

AR19

VAXG6

AR18

VAXG7

AR16

VAXG8

AP21

VAXG9

AP19

VAXG10

AP18

VAXG11

AP16

VAXG12

AN21

VAXG13

AN19

VAXG14

AN18

VAXG15

AN16

VAXG16

AM21

VAXG17

AM19

VAXG18

AM18

VAXG19

AM16

VAXG20

AL21

VAXG21

AL19

VAXG22

AL18

VAXG23

AL16

VAXG24

AK21

VAXG25

AK19

VAXG26

AK18

VAXG27

AK16

VAXG28

AJ21

VAXG29

AJ19

VAXG30

AJ18

VAXG31

AJ16

VAXG32

AH21

VAXG33

AH19

VAXG34

AH18

VAXG35

AH16

VAXG36

J24

VTT1_45

J23

VTT1_46

H25

VTT1_47

K26

VTT1_48

J27

VTT1_49

J26

VTT1_50

J25

VTT1_51

H27

VTT1_52

G28

VTT1_53

G27

VTT1_54

G26

VTT1_55

F26

VTT1_56

E26

VTT1_57

E25

VTT1_58

IC,AUB_CFD_rPGA,R1P0

IC,AUB_CFD_rPGA,R1P0
CONN@

CONN@

15A

GRAPHICS

GRAPHICS

FDI PEG & DMI

FDI PEG & DMI

VAXG_SENSE

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]

GFX_VR_EN

GFX_DPRSLPVR

GFX_IMON

GRAPHICS VIDs

GRAPHICS VIDs

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6

3A

POWER

POWER

0.6A

VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18

DDR3 - 1.5V RAILS

DDR3 - 1.5V RAILS

VTT0_59
VTT0_60
VTT0_61
VTT0_62

VTT1_63
VTT1_64
VTT1_65

1.1V1.8V

1.1V1.8V

VTT1_66
VTT1_67
VTT1_68

VCCPLL1
VCCPLL2
VCCPLL3

AR22
AT22

AM22
AP22
AN22
AP23
AM23
AP24
AN24

AR25

GFXVR_DPRSLPVR_R

AT25
AM24

AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1

P10
N10
L10
K10

J22
J20
J18
H21
H20
H19

L26
L27
M26

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C438

C438

1U_0402_6.3V4Z

1U_0402_6.3V4Z

+1.1VS_VTT

1

C418

2

+1.8VS_VCCSFR

C337

C337

VCC_AXG_SENSE 54
VSS_AXG_SENSE 54

GFXVR_VID_0 54
GFXVR_VID_1 54
GFXVR_VID_2 54
GFXVR_VID_3 54
GFXVR_VID_4 54
GFXVR_VID_5 54
GFXVR_VID_6 54

R679 0_0402_5% R679 0_0402_5%

1 2

R198 1K_0402_5%DIS@R198 1K_0402_5%DIS@

1 2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

1

C436

C436

C472

C472

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

+1.1VS_VTT

1

C417

C417
10U_0805_6.3V6M

10U_0805_6.3V6M

2

C418
22U_0805_6.3V6M

22U_0805_6.3V6M

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

1

1

C348

C348

C331

C331

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

1

C466

C466

C434

C434

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

1

C345

C345

2

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C468

C468

2

1

2

GFXVR_EN 54
GFXVR_DPRSLPVR 54
GFXVR_IMON 54

1

1

C471

C471

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

R211

R211
0_0805_5%

0_0805_5%

1 2

C346

C346

22U_0805_6.3V6M

22U_0805_6.3V6M

1

+

+

C467

C467
330U_D2_2V_Y

330U_D2_2V_Y

2

+1.8VS

+1.5V_1

A A

Security Classification

Security Classification

Security Classification

2009/08/10 2010/08/10

2009/08/10 2010/08/10

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/08/10 2010/08/10

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

401762

401762

401762

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

860Tuesday, August 18, 2009

860Tuesday, August 18, 2009

860Tuesday, August 18, 2009

of

of

1

of

C

C

C

5

JCPU1H

JCPU1H

AT20

VSS1

AT17

VSS2

AR31

VSS3

AR28

VSS4

AR26

VSS5

AR24

VSS6

D D

C C

B B

AR23
AR20
AR17
AR15
AR12

AR9
AR6

AR3
AP20
AP17
AP13
AP10

AP7

AP4

AP2
AN34
AN31
AN23
AN20
AN17
AM29
AM27
AM25
AM20
AM17
AM14
AM11

AM8

AM5

AM2

AL34
AL31
AL23
AL20
AL17
AL12

AL9
AL6

AL3
AK29
AK27
AK25
AK20
AK17

AJ31
AJ23
AJ20
AJ17
AJ14
AJ11

AJ8

AJ5

AJ2
AH35
AH34
AH33
AH32
AH31
AH30
AH29
AH28
AH27
AH26
AH20
AH17
AH13

AH9
AH6
AH3

AG10

AF8
AF4
AF2

AE35

VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80

4

VSS

VSS

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30

3

JCPU1I

JCPU1I

K27

VSS161

K9

VSS162

K6

VSS163

K3

VSS164

J32

VSS165

J30

VSS166

J21

VSS167

J19

VSS168

H35

VSS169

H32

VSS170

H28

VSS171

H26

VSS172

H24

VSS173

H22

VSS174

H18

VSS175

H15

VSS176

H13

VSS177

H11

VSS178

H8

VSS179

H5

VSS180

H2

VSS181

G34

VSS182

G31

VSS183

G20

VSS184

G9

VSS185

G6

VSS186

G3

VSS187

F30

VSS188

F27

VSS189

F25

VSS190

F22

VSS191

F19

VSS192

F16

VSS193

E35

VSS194

E32

VSS195

E29

VSS196

E24

VSS197

E21

VSS198

E18

VSS199

E13

VSS200

E11

VSS201

E8

VSS202

E5

VSS203

E2

VSS204

D33

VSS205

D30

VSS206

D26

VSS207

D9

VSS208

D6

VSS209

D3

VSS210

C34

VSS211

C32

VSS212

C29

VSS213

C28

VSS214

C24

VSS215

C22

VSS216

C20

VSS217

C19

VSS218

C16

VSS219

B31

VSS220

B25

VSS221

B21

VSS222

B18

VSS223

B17

VSS224

B13

VSS225

B11

VSS226

B8

VSS227

B6

VSS228

B4

VSS229

A29

VSS230

A27

VSS231

A23

VSS232

A9

VSS233

2

VSS

VSS

NCTF

NCTF

VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7

AT35
AT1
AR34
B34
B2
B1
A35

H_NCTF1
H_NCTF2

H_NCTF6
H_NCTF7

1

@

@

PAD

PAD

T17

T17

@

@

PAD

PAD

T21

T21

@

@

PAD

PAD

T20

T20

@

@

PAD

PAD

T16

T16

IC,AUB_CFD_rPGA,R1P0

IC,AUB_CFD_rPGA,R1P0

IC,AUB_CFD_rPGA,R1P0
CONN@

CONN@

A A

Security Classification

Security Classification

Security Classification

2009/08/10 2010/08/10

2009/08/10 2010/08/10

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/08/10 2010/08/10

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

IC,AUB_CFD_rPGA,R1P0
CONN@

CONN@

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511
401762

401762

401762

1

C

C

C

960Tuesday, August 18, 2009

960Tuesday, August 18, 2009

960Tuesday, August 18, 2009

of

of

of

5

M1 Circuit

+1.5V

12

R410

R410

1K_0402_1%

1K_0402_1%

12

D D

C C

Layout Note:
Place near JDIMM1

B B

10U_0805_6.3V6M

10U_0805_6.3V6M

Layout Note:
Place near JDIMM1.203 & JDIMM1.204

A A

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C534

C534

C541

C541

2

+0.75VS

2

C814

C814

1

1U_0603_10V4Z

1U_0603_10V4Z

+1.5V

1U_0603_10V4Z

1U_0603_10V4Z

+V_DDR3_DIMM_REF

+V_DDR3_DIMM_REF

R409

R409
1K_0402_1%

1K_0402_1%

2009/04/13
For Arrandale ,it should be use M1 Circuit
For Clarksfield ,it should be use M3 Circuit
DG V1.52

Layout Note: Place these 4 Caps near Command
and Control signals of DIMMA

10U_0805_6.3V6M

1

C539

C539

2

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C819

C819

C822

C822

10U_0805_6.3V6M

10U_0805_6.3V6M

2

10U_0805_6.3V6M

1

C544

C544

2

1

1

C542

C542

2

2

10U_0805_6.3V6M

10U_0805_6.3V6M

2

2

C813

C813

1

1

1U_0603_10V4Z

1U_0603_10V4Z

10U_0805_6.3V6M

10U_0805_6.3V6M

C540

C540

1U_0603_10V4Z

1U_0603_10V4Z

2

C811

C811

1

5

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

DDR_A_DQS#[0..7]6

DDR_A_D[0..63]6

DDR_A_DM[0..7]6
DDR_A_DQS[0..7]6
DDR_A_MA[0..15]6

PCH_SMBCLK12,14,21,33,36

PCH_SMBDATA12,14,21,33,36

SM_DRAMRST#5

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C810

C810

2

1

C809

C809

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

PCH_SMBCLK
PCH_SMBDATA

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C808

C808

2

4

12

R823

R823
@

@
100K_0402_1%

100K_0402_1%

1

C807

C807

2

4

H_DIMMA_REF4

+V_DDR3_DIMM_REF

1

+

+

C563

C563
330U_D2_2V_Y

330U_D2_2V_Y

2

3

+1.5V

12

R504

R504
@

@
1K_0402_1%

1K_0402_1%

12

R541

R541
@

@
1K_0402_1%

1K_0402_1%

12

R566

R566
@

@
100K_0402_1%

100K_0402_1%

M3 Circuit

R429 0_0402_5%DIS@R429 0_0402_5%DIS@

1 2

S

S

RST_GATE

G

G

2

Q70

Q70

D

D

13

BSH111_SOT23

BSH111_SOT23
@

@

M1 Circuit

R430 0_0402_5%UMA@R430 0_0402_5%UMA@

1 2

1

C538

C538

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+1.5V

12

R502

R497 0_0402_5% R497 0_0402_5%

1 2

Q78

Q78

D

S

D

S

13

BSH111_SOT23

BSH111_SOT23
@

@

G

G

RST_GATE

2

RST_GATE11,18

R502
@

@
1K_0402_1%

1K_0402_1%

DIMM_DRAMRST#

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

C537

C537

2.2U_0805_16V4Z

2.2U_0805_16V4Z

2

2

DDR_A_CKE06

DDR_A_BS26

DDR_A_CLK06
DDR_A_CLK0#6

DDR_A_BS06

DDR_A_WE#6

DDR_A_CAS#6 DDR_A_ODT0 6

DDR_A_CS1#6

+3VS

1

C816

C816

2

2009/08/10 2010/08/10

2009/08/10 2010/08/10

2009/08/10 2010/08/10

3

R452 10K_0402_5% R452 10K_0402_5%

1

C815

C815

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

VREF_DQA
DDR_A_D0

DDR_A_D1
DDR_A_DM0
DDR_A_D2

DDR_A_D3
DDR_A_D8

DDR_A_D9
DDR_A_DQS#1

DDR_A_DQS1
DDR_A_D10

DDR_A_D11
DDR_A_D16

DDR_A_D17
DDR_A_DQS#2

DDR_A_DQS2
DDR_A_D18

DDR_A_D19
DDR_A_D24

DDR_A_D25
DDR_A_DM3
DDR_A_D26

DDR_A_D27

DDR_A_CKE0

DDR_A_BS2
DDR_A_MA12

DDR_A_MA9
DDR_A_MA8

DDR_A_MA5
DDR_A_MA3

DDR_A_MA1
DDR_A_CLK0

DDR_A_CLK0#
DDR_A_MA10

DDR_A_BS0
DDR_A_WE#

DDR_A_CAS#
DDR_A_MA13

DDR_A_CS1#

DDR_A_D32
DDR_A_D33

DDR_A_DQS#4
DDR_A_DQS4

DDR_A_D34
DDR_A_D35

DDR_A_D40
DDR_A_D41

DDR_A_DM5
DDR_A_D42

DDR_A_D43
DDR_A_D48

DDR_A_D49
DDR_A_DQS#6

DDR_A_DQS6
DDR_A_D50

DDR_A_D51
DDR_A_D56

DDR_A_D57
DDR_A_DM7
DDR_A_D58

DDR_A_D59

1 2

R451

+1.5V +1.5V

11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71

73
75
77
79
81
83
85
87
89
91
93
95
97

99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201

12

R451
10K_0402_5%

10K_0402_5%

Compal Secret Data

Compal Secret Data

Compal Secret Data

203
205

207

Deciphered Date

Deciphered Date

Deciphered Date

2

JDIMM1

JDIMM1

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS
DM0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
VSS
DQ26
DQ27
VSS

CKE0
VDD
NC
BA2
VDD
A12/BC#
A9
VDD
A8
A5
VDD
A3
A1
VDD
CK0
CK0#
VDD
A10/AP
BA0
VDD
WE#
CAS#
VDD
A13
S1#
VDD
TEST
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SA0
VDDSPD
SA1
VTT

GND1
GND2

FOX_AS0A626-U2SN-7F_204P

FOX_AS0A626-U2SN-7F_204P

CONN@

CONN@

VREF_CA

2

DQS0#

DQS0

DQ12
DQ13

RESET#

DQ14
DQ15

DQ20
DQ21

DQ22
DQ23

DQ28
DQ29

DQS3#

DQS3
DQ30

DQ31

CKE1

CK1#

RAS#

ODT0
ODT1

DQ36
DQ37

DQ38
DQ39

DQ44
DQ45

DQS5#

DQS5
DQ46

DQ47
DQ52

DQ53

DQ54
DQ55

DQ60
DQ61

DQS7#

DQS7
DQ62

DQ63

EVENT#

BOSS1
BOSS2

DQ4
DQ5

DQ6
DQ7

DM1

DM2

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDD

DM4

DM6

SDA

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS
VSS

VSS

VSS

VSS

VSS

CK1

BA1

VSS

VSS
VSS

VSS

VSS

VSS

VSS

VSS
VSS

VSS

VSS

VSS

VSS

SCL
VTT

1

2

DDR_A_D4

4

DDR_A_D5

6
8

DDR_A_DQS#0

10

DDR_A_DQS0

12
14

DDR_A_D6

16

DDR_A_D7

18
20

DDR_A_D12

22

DDR_A_D13

24
26

DDR_A_DM1

28

DIMM_DRAMRST#

30
32

DDR_A_D14

34

DDR_A_D15

36
38

DDR_A_D20

40

DDR_A_D21

42
44

DDR_A_DM2

46
48

DDR_A_D22

50

DDR_A_D23

52
54

DDR_A_D28

56

DDR_A_D29

58
60

DDR_A_DQS#3

62

DDR_A_DQS3

64
66

DDR_A_D30

68

DDR_A_D31

70
72

DDR_A_CKE1

74
76

DDR_A_MA15

78

A15
A14

A11

A7
A6

A4
A2

A0

S0#

NC

80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

206
208

DDR_A_MA14
DDR_A_MA11

DDR_A_MA7
DDR_A_MA6

DDR_A_MA4
DDR_A_MA2

DDR_A_MA0
DDR_A_CLK1

DDR_A_CLK1#
DDR_A_BS1

DDR_A_RAS#
DDR_A_CS0#

DDR_A_ODT0
DDR_A_ODT1

DDR_VREF_CA_DIMMA
DDR_A_D36

DDR_A_D37
DDR_A_DM4
DDR_A_D38

DDR_A_D39
DDR_A_D44DDR_A_D44

DDR_A_D45
DDR_A_DQS#5

DDR_A_DQS5
DDR_A_D46

DDR_A_D47
DDR_A_D52

DDR_A_D53
DDR_A_DM6
DDR_A_D54

DDR_A_D55
DDR_A_D60

DDR_A_D61
DDR_A_DQS#7

DDR_A_DQS7
DDR_A_D62

DDR_A_D63
PM_EXTTS#0_1

D_CK_SDATA
D_CK_SCLK

+0.75VS

DIMM_DRAMRST# 11

DDR_A_CKE1 6

DDR_A_CLK1 6
DDR_A_CLK1# 6

DDR_A_BS1 6
DDR_A_RAS# 6

DDR_A_CS0# 6

DDR_A_ODT1 6

R413 0_0402_5% R413 0_0402_5%

1 2

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

PM_EXTTS#0_1 5,11

D_CK_SDATA 11,12
D_CK_SCLK 11,12

C527

C527

1

2

+V_DDR3_DIMM_REF

1

C526

C526

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

DDR3 SO-DIMM A
Standard Type

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511

401762

401762

401762

1

C

C

C

of

of

of

10 60Tuesday, August 18, 2009

10 60Tuesday, August 18, 2009

10 60Tuesday, August 18, 2009

5

DDR_B_DQS#[0..7]6

DDR_B_D[0..63]6

DDR_B_DM[0..7]6

DDR_B_DQS[0..7]6

D D

C C

B B

10U_0805_6.3V6M

10U_0805_6.3V6M

1U_0603_10V4Z

1U_0603_10V4Z

A A

DDR_B_MA[0..15]6

PCH_SMBCLK12,14,21,33,36

PCH_SMBDATA12,14,21,33,36

Layout Note:
Place near JDIMM2

+1.5V

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C839

C839

1

C860

C860

2

2

10U_0805_6.3V6M

10U_0805_6.3V6M

Layout Note:
Place near JDIMM2.203 & JDIMM2.204

+0.75VS

C827

C827

C825

C825

2

2

1

1

1U_0603_10V4Z

1U_0603_10V4Z

1

C862

C862

C852

C852

2

10U_0805_6.3V6M

10U_0805_6.3V6M

1U_0603_10V4Z

1U_0603_10V4Z

C837

C837

C836

C836

2

1

1U_0603_10V4Z

1U_0603_10V4Z

5

PCH_SMBCLK
PCH_SMBDATA

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C845

C845

2

2

1

2009/04/13
For Arrandale ,it should be use M1 Circuit
For Clarksfield ,it should be use M3 Circuit
DG V1.52

1

1

C856

C856

2

2

10U_0805_6.3V6M

10U_0805_6.3V6M

C838

C838

1

10U_0805_6.3V6M

10U_0805_6.3V6M

2

2008/9/8 #400755
Calpella Clarksfield
DDR3 SO-DIMM
VREFDQ Platform
Design Guide Change Details

Layout Note: Place these 4 Caps near Command
and Control signals of DIMMA

0.1U_0402_16V4Z

1

C843

C843

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C844

C844

C842

C842

4

H_DIMMB_REF4

1

C841

C841

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

4

1

2

12

R824

R824
@

@
100K_0402_1%

100K_0402_1%

+V_DDR3_DIMM_REF

1

+

+

C855

C855
330U_D2_2V_Y

330U_D2_2V_Y

2

3

+1.5V

12

R546

R546
@

@
1K_0402_1%

C554

C554

DDR_B_CLK06
DDR_B_CLK0#6

1
C568

2

3

1K_0402_1%

12

R550

R550
@

@
1K_0402_1%

1K_0402_1%

1

2

1

C568

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

DDR_B_D0
DDR_B_D1

DDR_B_DM0
DDR_B_D2

DDR_B_D3
DDR_B_D8

DDR_B_D9
DDR_B_DQS#1

DDR_B_DQS1
DDR_B_D10

DDR_B_D11
DDR_B_D16

DDR_B_D17
DDR_B_DQS#2

DDR_B_DQS2
DDR_B_D18

DDR_B_D19
DDR_B_D24

DDR_B_D25
DDR_B_DM3
DDR_B_D26

DDR_B_D27

DDR_B_CKE0

DDR_B_BS2
DDR_B_MA12

DDR_B_MA9
DDR_B_MA8

DDR_B_MA5
DDR_B_MA3

DDR_B_MA1
DDR_B_CLK0

DDR_B_CLK0#
DDR_B_MA10

DDR_B_BS0
DDR_B_WE#

DDR_B_CAS#
DDR_B_MA13

DDR_B_CS1#

DDR_B_D32
DDR_B_D33

DDR_B_DQS#4
DDR_B_DQS4

DDR_B_D34
DDR_B_D35

DDR_B_D40
DDR_B_D41

DDR_B_DM5
DDR_B_D42

DDR_B_D43
DDR_B_D48

DDR_B_D49
DDR_B_DQS#6

DDR_B_DQS6
DDR_B_D50

DDR_B_D51
DDR_B_D56

DDR_B_D57
DDR_B_DM7
DDR_B_D58

DDR_B_D59

R773 10K_0402_5% R773 10K_0402_5%

1 2

1 2

R453 10K_0402_5%

R453 10K_0402_5%

2009/08/10 2010/08/10

2009/08/10 2010/08/10

2009/08/10 2010/08/10

M3 Circuit

R445 0_0402_5%

R445 0_0402_5%

1 2

DIS@

DIS@

Q77

Q77

D

S

D

S

13

BSH111_SOT23

BSH111_SOT23
@

@

G

G

RST_GATE

RST_GATE10,18

2

M1 Circuit

UMA@

UMA@

R446 0_0402_5%

R446 0_0402_5%

1 2

1

C553

C553

2.2U_0805_16V4Z

2.2U_0805_16V4Z

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

DDR_B_BS26

DDR_B_BS06

DDR_B_WE#6

DDR_B_CAS#6 DDR_B_ODT0 6

DDR_B_CS1#6

+3VS

C569

C569

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

Issued Date

Issued Date

Issued Date

+1.5V

1
3
5
7

9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71

73
75
77
79
81
83
85
87
89
91
93
95
97
99

101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203

205
207

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

JDIMM2

JDIMM2

VREF_DQ
VSS
DQ0
DQ1
VSS
DM0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
VSS
DQ26
DQ27
VSS

CKE0
VDD
NC
BA2
VDD
A12/BC#
A9
VDD
A8
A5
VDD
A3
A1
VDD
CK0
CK0#
VDD
A10/AP
BA0
VDD
WE#
CAS#
VDD
A13
S1#
VDD
TEST
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SA0
VDDSPD
SA1
VTT

GND1
GND2

TYCO_2-2013310-1_204P

TYCO_2-2013310-1_204P
CONN@

CONN@

2

DQ4
DQ5

DQS0#

DQS0

DQ6
DQ7

DQ12
DQ13

DM1

RESET#

DQ14
DQ15

DQ20
DQ21

DM2

DQ22
DQ23

DQ28
DQ29

DQS3#

DQS3
DQ30

DQ31

CKE1

VDD

VDD

VDD

VDD

VDD

CK1#

VDD

RAS#

VDD

ODT0

VDD

ODT1

VDD

VREF_CA

DQ36
DQ37

DM4

DQ38
DQ39

DQ44
DQ45

DQS5#

DQS5
DQ46

DQ47
DQ52

DQ53

DM6

DQ54
DQ55

DQ60
DQ61

DQS7#

DQS7
DQ62

DQ63

EVENT#

SDA

BOSS1
BOSS2

2

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS
VSS

VSS

VSS

VSS

VSS

CK1

BA1

VSS

VSS
VSS

VSS

VSS

VSS

VSS

VSS
VSS

VSS

VSS

VSS

VSS

SCL
VTT

1

+1.5V

2

DDR_B_D4

4

DDR_B_D5

6
8

DDR_B_DQS#0

10

DDR_B_DQS0

12
14

DDR_B_D6

16

DDR_B_D7

18
20

DDR_B_D12

22

DDR_B_D13

24
26

DDR_B_DM1

28

DIMM_DRAMRST#

30
32

DDR_B_D14

34

DDR_B_D15

36
38

DDR_B_D20

40

DDR_B_D21

42
44

DDR_B_DM2

46
48

DDR_B_D22

50

DDR_B_D23

52
54

DDR_B_D28

56

DDR_B_D29

58
60

DDR_B_DQS#3

62

DDR_B_DQS3

64
66

DDR_B_D30

68

DDR_B_D31

70
72

DDR_B_CKE1

74
76
78

A15

80

A14

82
84

A11

86

A7

88
90

A6

92

A4

94
96

A2

98

A0

100
102
104
106
108
110
112
114

S0#

116
118
120
122

NC

124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

206
208

DDR_B_MA15
DDR_B_MA14

DDR_B_MA11
DDR_B_MA7

DDR_B_MA6
DDR_B_MA4

DDR_B_MA2
DDR_B_MA0

DDR_B_CLK1
DDR_B_CLK1#

DDR_B_BS1
DDR_B_RAS#

DDR_B_CS0#
DDR_B_ODT0

DDR_B_ODT1

DDR_VREF_CA_DIMMB

DDR_B_D36
DDR_B_D37

DDR_B_DM4
DDR_B_D38

DDR_B_D39
DDR_B_D44

DDR_B_D45
DDR_B_DQS#5

DDR_B_DQS5
DDR_B_D46

DDR_B_D47
DDR_B_D52

DDR_B_D53
DDR_B_DM6
DDR_B_D54

DDR_B_D55
DDR_B_D60

DDR_B_D61
DDR_B_DQS#7

DDR_B_DQS7
DDR_B_D62

DDR_B_D63
PM_EXTTS#0_1

D_CK_SDATA
D_CK_SCLK

+0.75VS

DIMM_DRAMRST# 10

DDR_B_CKE1 6DDR_B_CKE06

DDR_B_CLK1 6
DDR_B_CLK1# 6

DDR_B_BS1 6
DDR_B_RAS# 6

DDR_B_CS0# 6

DDR_B_ODT1 6

R442 0_0402_5% R442 0_0402_5%

1 2

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

PM_EXTTS#0_1 5,10

D_CK_SDATA 10,12
D_CK_SCLK 10,12

C552

C552

1

C551

2

+V_DDR3_DIMM_REF

1

C551

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

DDR3 SO-DIMM B
Standard Type

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511

401762

401762

401762

11 60Tuesday, August 18, 2009

11 60Tuesday, August 18, 2009

11 60Tuesday, August 18, 2009

1

C

C

C

of

of

of

A

L34

+1.05VS

1 1

L34
FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805

1

C479

C479
10U_0805_10V4Z

10U_0805_10V4Z

2

12

10U_0805_10V4Z

10U_0805_10V4Z

B

+CLK_VDDSRC

1

C481

C481

2

1

C490

C490

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C487

C487

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

C

L39

+1.5VS

L39
FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805

1

C590

C590
10U_0805_10V4Z

10U_0805_10V4Z

2

@

@

D

+CLK_1.5VDD

12

@

@

10U_0805_10V4Z

10U_0805_10V4Z

C588

C588

1

@

@

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

E

+3VS

1

1

C496

C496

C589

2

C589

@

@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

@

@

F

L37

L37

FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805

1

C510

C510
10U_0805_10V4Z

10U_0805_10V4Z

2

12

+CLK_VDD

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C506

C506

2

10U_0805_10V4Z

10U_0805_10V4Z

G

1

1

C502

C502

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C507

C507

C497

C497

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

H

1

1

C485

C485

C488

C488

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

2

SCL
SDA

32
31
30
29
28
27
26
25

24
23
22
21
20
19
18
17

+3VS

+3VS

+CLK_VDDSRC

D_CK_SCLK
D_CK_SDATA
REF_0/CPU_SELCLK_BUF_DREF_96M_R

CLK_XTAL_IN
CLK_XTAL_OUT

CK505_PWRGD

CLK_BUF_CPU_BCLK_R
CLK_BUF_CPU_BCLK#_R

1 2

0_0402_5%

0_0402_5%

1 2

0_0402_5%

0_0402_5%

R481
R484

R388 33_0402_5% R388 33_0402_5%

Integrated 33ohm Resistor

R481

@R484

@

+CLK_VDD
+CLK_1.5VDD

1 2

0_0404_4P2R_5%

0_0404_4P2R_5%

R382

R382
10K_0402_5%

10K_0402_5%

CK505_PWRGD

2

G

G

Q29

Q29
2N7002_SOT23

2N7002_SOT23

CLK_XTAL_IN

CLK_XTAL_OUT

CLK_BUF_CPU_BCLK
CLK_BUF_CPU_BCLK#

1 4
2 3

RP14

RP14

+3VS

1 2
13

D

D

S

S

14.318MHZ_16PF_7A14300083

14.318MHZ_16PF_7A14300083

update PCB footprint

R383

R383
0_0402_5%

0_0402_5%

@

@

1 2

CLK_ENABLE# 56

22P_0402_50V8J

22P_0402_50V8J

Y1

Y1

22P_0402_50V8J

22P_0402_50V8J

1 2

D_CK_SCLK 10,11

D_CK_SDATA 10,11
CLK_BUF_ICH_14M 14

CLK_BUF_CPU_BCLK 14
CLK_BUF_CPU_BCLK# 14

VGATE 15,56

C495

C495

12

C491

C491

12

CPU_1PIN 30 CPU_0

133MHz

+CLK_VDD

H_STP_CPU#

+CLK_VDDSRC +CLK_VDD

R479

R479

1 2

0_0402_5%

0_0402_5%

R480

@R480

@

1 2

0_0402_5%

0_0402_5%

+CLK_VDD

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16

33

Clock Generator

U35

U35

VDD_USB_48
VSS_48M
DOT_96
DOT_96#
VDD_27
27MHZ
27MHZ_SS
USB_48

VSS_27M
SATA
SATA#
VSS_SRC
SRC_1
SRC_1#
VDD_SRC_IO
CPU_STOP#

TGND

SLG8SP587VTR_QFN32_5X5

SLG8SP587VTR_QFN32_5X5
<BOM Structure>

<BOM Structure>

IDT: 9LRS3199AKLFT, SA000030P00
SILEGO: SLG8SP587V(WF), SA00002XY10

PCH_SMBDATA14,21,33,36

IDT SA000030P00

PCH_SMBCLK14,21,33,36

REF_0/CPU_SEL

CKPWRGD/PD#

+3VS

2

1 3

D

D

+3VS

2

1 3

D

D

VDD_REF

XTAL_IN

XTAL_OUT

VSS_REF

VDD_CPU

CPU_0

CPU_0#

VSS_CPU

CPU_1

CPU_1#

VDD_CPU_IO

VDD_SRC

R389

R389

4.7K_0402_5%

4.7K_0402_5%

G

G

1 2

S

S

Q31

Q31
2N7002_SOT23

2N7002_SOT23

R390

R390

4.7K_0402_5%

4.7K_0402_5%

G

G

1 2

S

S

Q32

Q32
2N7002_SOT23

2N7002_SOT23

D_CK_SDATA

D_CK_SCLK

+CLK_1.5VDD

Integrated 33ohm Resistor

CLK_BUF_DREF_96M14
CLK_BUF_DREF_96M#14

2 2

CLK_BUF_PCIE_SATA14
CLK_BUF_PCIE_SATA#14

CLK_BUF_CPU_DMI14
CLK_BUF_CPU_DMI#14

CLK_BUF_DREF_96M
CLK_BUF_DREF_96M#

CLK_BUF_PCIE_SATA
CLK_BUF_PCIE_SATA#

CLK_BUF_CPU_DMI
CLK_BUF_CPU_DMI#

1 4
2 3

RP17 0_0404_4P2R_5%

RP17 0_0404_4P2R_5%

1 4
2 3

RP16 0_0404_4P2R_5%

RP16 0_0404_4P2R_5%

1 4
2 3

RP15 0_0404_4P2R_5%

RP15 0_0404_4P2R_5%

CLK_BUF_DREF_96M#_R

CLK_BUF_PCIE_SATA_R
CLK_BUF_PCIE_SATA#_R

CLK_BUF_CPU_DMI_R
CLK_BUF_CPU_DMI#_R

Integrated 33ohm Resistor

+3VS

Silego Have Internal Pull-Up

R384 10K_0402_5% R384 10K_0402_5%

1 2

3 3

H_STP_CPU#

IDT Have Internal Pull-Down

R395 10K_0402_5% R395 10K_0402_5%

1 2

(Default)

0 133MHz

1

REF_0/CPU_SEL

100MHz 100MHz

4 4

Security Classification

Security Classification

Security Classification

2009/08/10 2010/08/10

2009/08/10 2010/08/10

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

2009/08/10 2010/08/10

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

E

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

F

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511

401762

401762

401762

G

C

C

C

12 60Tuesday, August 18, 2009

12 60Tuesday, August 18, 2009

12 60Tuesday, August 18, 2009

of

of

of

H

5

+RTCVCC

close to RAM door

D D

+RTCVCC

close to RAM door

1 2

R222

R222
20K_0402_1%

20K_0402_1%

1 2

J4
10K_0603_5%

10K_0603_5%

C369

C369

1U_0603_10V6K

1U_0603_10V6K

1 2

1 2

R221

R221
20K_0402_1%

20K_0402_1%

1 2

J5
10K_0603_5%

10K_0603_5%

C370

C370

1U_0603_10V6K

1U_0603_10V6K

1 2

PCH_RTCRST#

RC Delay 18~25mS

@J4

@

PCH_SRTCRST#

RC Delay 18~25mS

@J5

@

32.768KHZ_12.5PF_Q13MC14610002

32.768KHZ_12.5PF_Q13MC14610002

+RTCVCC

INTVRMEN - Integrated SUS 1.1V VRM Enable
High - Enable Internal VRs

18P_0402_50V8J

18P_0402_50V8J

3
2

18P_0402_50V8J

18P_0402_50V8J

R220 1M_0402_5% R220 1M_0402_5%
R223 332K_0402_1% R223 332K_0402_1%

HDA for AUDIO

HDA_BITCLK_AUDIO41

HDA_SYNC_AUDIO41
HDA_RST#_AUDIO41

HDA_SDOUT_AUDIO41

If GPIO33 pull down, ME will not working.

C C

For factory update ME, pull down resistor pull
under door.

100K_0402_5%

100K_0402_5%

ME_EN38

100K_0402_5%

100K_0402_5%

+3VS

R287

R287
1K_0402_5%

1K_0402_5%

B B

R295

R295
10K_0402_5%

10K_0402_5%

PCH_JTAG_TMS

PCH_JTAG_TDO

PCH_JTAG_TDI

PCH_JTAG_RST#

A A

R321

R321

@

@

1 2

1 2

12

R728 51_0402_5%@R728 51_0402_5%@
R722 200_0402_5% R722 200_0402_5%
R725 100_0402_5% R725 100_0402_5%

R719 51_0402_5%@R719 51_0402_5%@
R716 200_0402_5% R716 200_0402_5%
R713 100_0402_5% R713 100_0402_5%

R718 51_0402_5%@R718 51_0402_5%@
R715 200_0402_5% R715 200_0402_5%
R712 100_0402_5% R712 100_0402_5%

R278 51_0402_5%@R278 51_0402_5%@
R304 20K_0402_5% R304 20K_0402_5%
R303 10K_0402_5% R303 10K_0402_5%

5

1 2

R655 33_0402_5%

R655 33_0402_5%

1 2

R660 33_0402_5%

R660 33_0402_5%

1 2

R653 33_0402_5%

R653 33_0402_5%

1 2

R665 33_0402_5%

R665 33_0402_5%

+3VS

12

R319

R319

ME_EN#

13

D

D

Q22

Q22

2

G

G

2N7002_SOT23

2N7002_SOT23

S

S

PCH_SPKR

Have internal PD

SERIRQ

1 2
1 2
1 2

1 2
1 2
1 2

1 2
1 2
1 2

1 2
1 2
1 2

HDA_BITCLK_PCH
HDA_SYNC_PCH
HDA_RST#_PCH
HDA_SDOUT_PCH

PCH_SPI_CLK_1
PCH_SPI_CLK_2
PCH_SPI_CS0#

PCH_SPI_MOSI_1
PCH_SPI_MOSI_2
PCH_SPI_MISO_1
PCH_SPI_MISO_2

+3V

+1.05VS

2008 Intel MOW36/MOW50

TDO:
Reserved on ES1 Sample
Mount R516, R517 on ES2 Sample

MP mount R689, R690,
R691, R692 and remove
others

PCH_SPI_MOSI

enable iTPM: SPI_MOSI High

PCH_JTAG_TCK

R277 4.7K_0402_5% R277 4.7K_0402_5%

CRB 1.0 Change to 4.7K

4

C768

C768

4
1

1 2

4

PCH_RTCX1

R692

R692

10M_0402_5%

10M_0402_5%

PCH_RTCX2

HDA_BITCLK_PCH
HDA_SYNC_PCH
PCH_SPKR
HDA_RST#_PCH

HDA_SDOUT_PCH

ME_EN#

PCH_JTAG_TCK

PCH_RTCRST#
PCH_SRTCRST#
SM_INTRUDER#
PCH_INTVRMEN

PCH_SPI_CLK
PCH_SPI_CS0#_R
PCH_SPI_CS1#_RPCH_SPI_CS1#

12

X2

X2

OSC

NC

OSC

NC

C766

C766

12

1 2
1 2

PCH_SPKR38,41

HDA_SDIN041

GPIO33 can not pull down
(manufacturing environments)

PCH_JTAG_TCK21
PCH_JTAG_TMS21

PCH_JTAG_TDI21

PCH_JTAG_TDO21

PCH_JTAG_RST#21

R739 0_0402_5% R739 0_0402_5%

1 2

R724 0_0402_5%@R724 0_0402_5%@

1 2

R735 15_0402_5% R735 15_0402_5%

1 2

R738 15_0402_5%@R738 15_0402_5%@

1 2

R736 15_0402_5% R736 15_0402_5%

1 2

R737 15_0402_5%@R737 15_0402_5%@

1 2

R734 33_0402_5% R734 33_0402_5%

1 2

R733 33_0402_5%@R733 33_0402_5%@

1 2

R732 1K_0402_5%@R732 1K_0402_5%@

1 2

3

12

PCH_SPI_MOSI
PCH_SPI_MISO

+3VS

+3VS

+3VS

U60A

U60A

REV1.0

B13
D13

C14
D17
A16
A14

A30
D29

P1

C30

G30

F30

E32

F32

B29

H32

J30

M3

K3
K1

J2
J4

BA2
AV3
AY3

AY1
AV1

R325 3.3K_0402_5%@R325 3.3K_0402_5%@
R326 3.3K_0402_5%@R326 3.3K_0402_5%@

R328 3.3K_0402_5% R328 3.3K_0402_5%

1 2

R329 3.3K_0402_5% R329 3.3K_0402_5%

1 2

REV1.0

RTCX1
RTCX2

RTCRST#
SRTCRST#
INTRUDER#
INTVRMEN

HDA_BCLK
HDA_SYNC
SPKR
HDA_RST#

HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3

HDA_SDO

HDA_DOCK_EN# / GPIO33
HDA_DOCK_RST# / GPIO13

JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
TRST#

SPI_CLK
SPI_CS0#
SPI_CS1#

SPI_MOSI
SPI_MISO

IBEXPEAK-M_FCBGA107

IBEXPEAK-M_FCBGA107
UMA@

UMA@

1 2
1 2

RTCIHDA

RTCIHDA

LPC

LPC

SATA

SATA

SATA0GP / GPIO21
SATA1GP / GPIO19

SPI JTAG

SPI JTAG

PCH_SPI_CS1#
SPI_WP2#
SPI_HOLD2#

PCH_SPI_CS0#
SPI_WP1#
SPI_HOLD1#

FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3

FWH4 / LFRAME#

LDRQ0#

LDRQ1# / GPIO23

SERIRQ

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

SATAICOMPO

SATAICOMPI

SATALED#

1
3
7
4

SPI ROM Footprint 150mil

Security Classification

Security Classification

Security Classification

2009/08/10 2010/08/10

2009/08/10 2010/08/10

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/08/10 2010/08/10

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

LPC_AD0

D33

LPC_AD1

B33

LPC_AD2

C32

LPC_AD3

A32

LPC_FRAME#

C34
A34

F34
AB9

AK7
AK6
AK11
AK9

AH6
AH5
AH9
AH8

AF11
AF9
AF7
AF6

AH3
AH1
AF3
AF1

AD9
AD8
AD6
AD5

AD3
AD1
AB3
AB1

AF16
AF15

T3

Y9
V1

U31

U31

1

CS#

3

WP#

7

HOLD#

4

GND

S IC FL 32M MX25L3205DM2I-12G SOP 8P

S IC FL 32M MX25L3205DM2I-12G SOP 8P
SA000021A00 @

SA000021A00 @

U32

U32

CS#
WP#
HOLD#
GND

S IC FL 32M MX25L3205DM2I-12G SOP 8P

S IC FL 32M MX25L3205DM2I-12G SOP 8P
SA000021A00

SA000021A00

Deciphered Date

Deciphered Date

Deciphered Date

R799

R799

@

@

1 2

0_0402_5%

0_0402_5%

SERIRQ

SATA_DTX_C_PRX_N0
SATA_DTX_C_PRX_P0
SATA_PTX_DRX_N0
SATA_PTX_DRX_P0

SATA_DTX_C_PRX_N1
SATA_DTX_C_PRX_P1
SATA_PTX_DRX_N1
SATA_PTX_DRX_P1

2/10 SATA2, SATA3 not support on HM55

SATA_DTX_C_PRX_N4
SATA_DTX_C_PRX_P4
SATA_PTX_DRX_N4
SATA_PTX_DRX_P4

SATA_COMP

PCH_SATALED#

SCLK

VCC

SCLK

SO

VCC

SI

SI

SO

8
6
5
2

8
6
5
2

R208 37.4_0402_1% R208 37.4_0402_1%

R272 10K_0402_5% R272 10K_0402_5%

PCH_GPIO21 21
PCH_GPIO19 21

+3VS

PCH_SPI_CLK_1
PCH_SPI_MOSI_1
PCH_SPI_MISO_1

LPC_AD0 38
LPC_AD1 38
LPC_AD2 38
LPC_AD3 38

LPC_FRAME# 38

LOCAL_DIM

SERIRQ 38

1 2

1 2

PCH_SATALED# 40

+3VS

PCH_SPI_CLK_2
PCH_SPI_MOSI_2
PCH_SPI_MISO_2

2

LOCAL_DIM 30

SATA_DTX_C_PRX_N0 33

SATA_DTX_C_PRX_P0 33
SATA_PTX_DRX_N0 33
SATA_PTX_DRX_P0 33

SATA_DTX_C_PRX_N1 33

SATA_DTX_C_PRX_P1 33
SATA_PTX_DRX_N1 33
SATA_PTX_DRX_P1 33

SATA_DTX_C_PRX_N4 37

SATA_DTX_C_PRX_P4 37
SATA_PTX_DRX_N4 37
SATA_PTX_DRX_P4 37

12

R269

R269

10K_0402_5%

10K_0402_5%

2

1

+3VS

R565

LOCAL_DIM

R565

@

@

1 2

20K_0402_5%

20K_0402_5%

SATA for HDD1

SATA for ODD

SATA for eSATA

+1.05VS

+3VS

+3VS

R292 10K_0402_5%@R292 10K_0402_5%@

1 2

R268 10K_0402_5%@R268 10K_0402_5%@

1 2

12

R307

R307
10K_0402_5%

10K_0402_5%

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

401762

401762

401762

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

13 60Tuesday, August 18, 2009

13 60Tuesday, August 18, 2009

13 60Tuesday, August 18, 2009

1

C

C

C

of

of

of

5

PCIE_DTX_C_PRX_N134
PCIE_DTX_C_PRX_P134

For PCIE LAN

For Wireless LAN

D D

For NEWCRAD

For Mini2

For CardReader

PCIE_PTX_C_DRX_N134
PCIE_PTX_C_DRX_P134

PCIE_DTX_C_PRX_N233
PCIE_DTX_C_PRX_P233
PCIE_PTX_C_DRX_N233
PCIE_PTX_C_DRX_P233

PCIE_DTX_C_PRX_N336
PCIE_DTX_C_PRX_P336
PCIE_PTX_C_DRX_N336
PCIE_PTX_C_DRX_P336

PCIE_DTX_C_PRX_N433
PCIE_DTX_C_PRX_P433
PCIE_PTX_C_DRX_N433
PCIE_PTX_C_DRX_P433

PCIE_DTX_C_PRX_N533
PCIE_DTX_C_PRX_P533
PCIE_PTX_C_DRX_N533
PCIE_PTX_C_DRX_P533

C751 0.1U_0402_16V7K C751 0.1U_0402_16V7K
C749 0.1U_0402_16V7K C749 0.1U_0402_16V7K

C752 0.1U_0402_16V7K C752 0.1U_0402_16V7K
C753 0.1U_0402_16V7K C753 0.1U_0402_16V7K

C740 0.1U_0402_16V7K C740 0.1U_0402_16V7K
C745 0.1U_0402_16V7K C745 0.1U_0402_16V7K

C750 0.1U_0402_16V7K C750 0.1U_0402_16V7K
C748 0.1U_0402_16V7K C748 0.1U_0402_16V7K

C747 0.1U_0402_16V7K C747 0.1U_0402_16V7K
C744 0.1U_0402_16V7K C744 0.1U_0402_16V7K

12
12

12
12

12
12

12
12

12
12

2/10 PCIE7, PCIE8 not support on HM55

C C

R562 0_0402_5% R562 0_0402_5%

1 2

R561 0_0402_5% R561 0_0402_5%

1 2

R323 0_0402_5% R323 0_0402_5%

1 2

R564 0_0402_5% R564 0_0402_5%

1 2

R563 0_0402_5% R563 0_0402_5%

1 2

R273 0_0402_5% R273 0_0402_5%

1 2

R156 0_0402_5% R156 0_0402_5%

1 2

R162 0_0402_5% R162 0_0402_5%

1 2

R235 0_0402_5% R235 0_0402_5%

1 2

R578 0_0402_5% R578 0_0402_5%

1 2

R579 0_0402_5% R579 0_0402_5%

1 2

R577 0_0402_5% R577 0_0402_5%

1 2

R576 0_0402_5% R576 0_0402_5%

1 2

EC_LID_OUT#
PCH_SMBCLK
PCH_SMBDATA

PCH_GPIO60
PCH_SML1CLK

PCH_SML1DAT
PCH_GPIO74

PCH_GPIO44
PCH_GPIO56
PCH_GPIO73

CLK_PCIE_READER#33
CLK_PCIE_READER33

1 2
1 2

1 2

5

CLK_PCIE_LAN#34

CLK_PCIE_LAN34

LAN_CLKREQ#34

CLK_PCIE_MINI1#33
CLK_PCIE_MINI133

MINI1_CLKREQ#33
PCH_GPIO1821

PCH_GPIO2021

CLK_PCIE_CARD#36
CLK_PCIE_CARD36

EXP_CLKREQ#36

CLK_PCIE_MINI2#33
CLK_PCIE_MINI233

+3VS

+3VS

For PCIE LAN

For Wireless LAN

For NEWCRAD

For Mini2

B B

For CardReader

MINI1_CLKREQ#
PCH_GPIO20

A A

PCH_GPIO25

R285 10K_0402_5% R285 10K_0402_5%
R275 10K_0402_5% R275 10K_0402_5%

9/1: Change to +3VS

R243 10K_0402_5% R243 10K_0402_5%

4

PCIE_DTX_C_PRX_N1
PCIE_DTX_C_PRX_P1

PCIE_PTX_DRX_N1
PCIE_PTX_DRX_P1

PCIE_DTX_C_PRX_N2
PCIE_DTX_C_PRX_P2

PCIE_PTX_DRX_N2
PCIE_PTX_DRX_P2

PCIE_DTX_C_PRX_N3
PCIE_DTX_C_PRX_P3

PCIE_PTX_DRX_N3
PCIE_PTX_DRX_P3

PCIE_DTX_C_PRX_N4
PCIE_DTX_C_PRX_P4

PCIE_PTX_DRX_N4
PCIE_PTX_DRX_P4

PCIE_DTX_C_PRX_N5
PCIE_DTX_C_PRX_P5

PCIE_PTX_DRX_N5
PCIE_PTX_DRX_P5

CLK_PCIE_LAN#_R
CLK_PCIE_LAN_R

PCH_GPIO73

CLK_PCIE_MINI1#_R
CLK_PCIE_MINI1_R

PCH_GPIO18

PCH_GPIO20

CLK_PCIE_CARD#_R
CLK_PCIE_CARD_R

PCH_GPIO25

CLK_PCIE_MINI2#_R
CLK_PCIE_MINI2_R

MINI2_CLKREQ#_1

CLK_PCIE_READER#_R
CLK_PCIE_READER_R

PCH_GPIO44

PCH_GPIO56

R704 10K_0402_5%

R704 10K_0402_5%

1 2

R682 2.2K_0402_5%

R682 2.2K_0402_5%

1 2

R246 2.2K_0402_5% R246 2.2K_0402_5%

1 2

R216 10K_0402_5% R216 10K_0402_5%

1 2

R241 2.2K_0402_5%

R241 2.2K_0402_5%

1 2

R234 2.2K_0402_5% R234 2.2K_0402_5%

1 2

R215 10K_0402_5% R215 10K_0402_5%

1 2

R256 10K_0402_5% R256 10K_0402_5%

1 2

R214 10K_0402_5% R214 10K_0402_5%

1 2

R316 10K_0402_5% R316 10K_0402_5%

1 2

4

3

U60B

U60B

REV1.0

BG30

BJ30

BF29

BH29

AW30

BA30
BC30
BD30

AU30
AT30
AU32
AV32

BA32
BB32
BD32
BE32

BF33
BH33
BG32

BJ32
BA34

AW34

BC34
BD34

AT34
AU34
AU36
AV36

BG34

BJ34
BG36

BJ36

AK48
AK47

P9

AM43
AM45

U4

AM47
AM48

N4

AH42
AH41

A8

AM51
AM53

M9

AJ50

AJ52

H6

AK53
AK51

P13

IBEXPEAK-M_FCBGA107

IBEXPEAK-M_FCBGA107
UMA@

UMA@

+3V

REV1.0

PERN1
PERP1
PETN1
PETP1

PERN2
PERP2
PETN2
PETP2

PERN3
PERP3
PETN3
PETP3

PERN4
PERP4
PETN4
PETP4

PERN5
PERP5
PETN5
PETP5

PERN6
PERP6
PETN6
PETP6

PERN7
PERP7
PETN7
PETP7

PERN8
PERP8
PETN8
PETP8

CLKOUT_PCIE0N
CLKOUT_PCIE0P

PCIECLKRQ0# / GPIO73

CLKOUT_PCIE1N
CLKOUT_PCIE1P

PCIECLKRQ1# / GPIO18

CLKOUT_PCIE2N
CLKOUT_PCIE2P

PCIECLKRQ2# / GPIO20

CLKOUT_PCIE3N
CLKOUT_PCIE3P

PCIECLKRQ3# / GPIO25

CLKOUT_PCIE4N
CLKOUT_PCIE4P

PCIECLKRQ4# / GPIO26

CLKOUT_PCIE5N
CLKOUT_PCIE5P

PCIECLKRQ5# / GPIO44

CLKOUT_PEG_B_N
CLKOUT_PEG_B_P

PEG_B_CLKRQ# / GPIO56

PCI-E*

PCI-E*

Controller

Controller

CLKOUT_DP_N / CLKOUT_BCLK1_N

From CLK BUFFER

From CLK BUFFER

Clock Flex

Clock Flex

SMBALERT# / GPIO11

SMBCLK

SMBDATA

SML0ALERT# / GPIO60

SML0CLK

SML0DATA

SML1ALERT# / GPIO74

SMBus

SMBus

PEG

PEG

CLKOUT_DP_P / CLKOUT_BCLK1_P

SML1CLK / GPIO58

SML1DATA / GPIO75

CL_DATA1

Link

Link

PEG_A_CLKRQ# / GPIO47

CLKIN_SATA_N / CKSSCD_N
CLKIN_SATA_P / CKSSCD_P

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

CL_RST1#

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P

CLKOUT_DMI_N
CLKOUT_DMI_P

CLKIN_DMI_N

CLKIN_DMI_P

CLKIN_BCLK_N
CLKIN_BCLK_P

CLKIN_DOT_96N
CLKIN_DOT_96P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

CL_CLK1

Project ID

ID0ID1

Project

JV

0

0

*

Future

1

0

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/08/10 2010/08/10

2009/08/10 2010/08/10

2009/08/10 2010/08/10

3

EC_LID_OUT#

B9

PCH_SMBCLK

H14

PCH_SMBDATA

C8

PCH_GPIO60

J14
C6
G8

PCH_GPIO74

M14

PCH_SML1CLK

E10

PCH_SML1DAT

G12

T13
T11
T9

PEG_CLKREQ#_R

H1

AD43
AD45

AN4
AN2

AT1
AT3

AW24
BA24

AP3
AP1

F18
E18

AH13
AH12

P41

J42

XTAL25_IN

AH51

XTAL25_OUT

AH53

XCLK_RCOMP

AF38

T45

PROJECT_ID1

P43

PROJECT_ID0

T42

N50

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

R166 90.9_0402_1% R166 90.9_0402_1%

Project Port ID

2

EC_LID_OUT# 38
PCH_SMBCLK 12,21,33,36
PCH_SMBDATA 12,21,33,36

+3V +3VS_DELAY

12

R264

R264
10K_0402_5%

10K_0402_5%
SG@

SG@

12

R342

10K_0402_5% R145 10K_0402_5% R145

R342

2.2K_0402_5%

2.2K_0402_5%
DIS@

DIS@

+1.05VS

MINI2_CLKREQ#33

CLK_PEG_VGA# 23
CLK_PEG_VGA 23

CLK_CPU_DMI# 5
CLK_CPU_DMI 5

CLK_CPU_DP# 5
CLK_CPU_DP 5

CLK_BUF_CPU_DMI# 12
CLK_BUF_CPU_DMI 12

CLK_BUF_CPU_BCLK# 12
CLK_BUF_CPU_BCLK 12

CLK_BUF_DREF_96M# 12
CLK_BUF_DREF_96M 12

CLK_BUF_PCIE_SATA# 12
CLK_BUF_PCIE_SATA 12

CLK_BUF_ICH_14M 12

CLK_PCI_FB 17

1 2

R150 10K_0402_5%@R150 10K_0402_5%@

1 2
1 2

R151 10K_0402_5%@R151 10K_0402_5%@

1 2

R165 10K_0402_5% R165 10K_0402_5%

1 2

2

1. Connect Directly
EXPRESS CARD, MINI1, MINI2

2. Level Shift1, Pull-Up to +3VS
CLOCK GEN, DIMM1, DIMM2

3. Level Shift2, Pull-Up to +3VS
LAN

4. Level Shift3, Pull-Up to +3VS
CPU & PCH XDP

+3VS_DELAY

12

@

@
R305

R305
10K_0402_5%

10K_0402_5%

2

G

G

1 3

D

D

PCH_SML1DAT EC_SMB_DA2

Q21

Q21
2N7002_SOT23

2N7002_SOT23
SG@

SG@

12

S

S

12

R341

R341

SG@

SG@

10K_0402_5%

10K_0402_5%

R793

R793
@

@

1 2

0_0402_5%

0_0402_5%

R104

R104

2.2K_0402_5%

2.2K_0402_5%
+3VS

2

G

G

1 3

D

D

+3VS

2

G

G

1 3

D

D

S

S

Q19

Q19
2N7002_SOT23

2N7002_SOT23

S

S

Q17

Q17
2N7002_SOT23

2N7002_SOT23

Layout guide 1.52 update

R571
0_0402_5%

0_0402_5%

12

R593

R593

1M_0402_5%

1M_0402_5%

UMA@

+3VS

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

UMA@

+3VS

+3VS

R348

R348

10K_0402_5%

10K_0402_5%

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511
401762

401762

401762

12

12

G

G

2

S

S

1 2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

1

DGPU_PWR_EN 18,21,40,45

12

R279

R279
10K_0402_5%

10K_0402_5%
@

@

EC_SMB_CK2PCH_SML1CLK

DIS@R571

DIS@

1 2

C681
27P_0402_50V8J

27P_0402_50V8J

1 2

Y4

Y4
25MHZ_20PF_7A25000012

25MHZ_20PF_7A25000012
UMA@

UMA@

1 2

1 2

C682

C682
27P_0402_50V8J

27P_0402_50V8J

R347

R347
10K_0402_5%

10K_0402_5%
@

@

Q23

Q23
2N7002_SOT23

2N7002_SOT23
@

@

13

D

D

R346

R346
0_0402_5%

0_0402_5%

UMA@C681

UMA@

UMA@

UMA@

1

+3V

EC_SMB_CK2 24,38

EC_SMB_DA2 24,38

12

PEG_CLKREQ# 24

R345

R345
10K_0402_5%

10K_0402_5%
@

@

MINI2_CLKREQ#_1

14 60Tuesday, August 18, 2009

14 60Tuesday, August 18, 2009

14 60Tuesday, August 18, 2009

of

of

of

C

C

C

5

DMI_HTX_PRX_N[0..3]4

DMI_HTX_PRX_P[0..3]4
DMI_PTX_HRX_N[0..3]4
DMI_PTX_HRX_P[0..3]4

DMI_HTX_PRX_N[0..3]
DMI_HTX_PRX_P[0..3]
DMI_PTX_HRX_N[0..3]
DMI_PTX_HRX_P[0..3]

4

3

2

1

D D

+3VS

R283 8.2K_0402_5%

R283 8.2K_0402_5%
R309 10K_0402_5%

R309 10K_0402_5%

+3V

R276 10K_0402_5%

R276 10K_0402_5%
R709 8.2K_0402_5%

R709 8.2K_0402_5%
R195 10K_0402_5%

C C

B B

A A

R195 10K_0402_5%
R245 1K_0402_5%

R245 1K_0402_5%
R252 10K_0402_5%

R252 10K_0402_5%

H_FDI_TXN[0..7]4
H_FDI_TXP[0..7]4

1 2

@

@

1 2

1 2
1 2
1 2
1 2

@

@

1 2

PM_CLKRUN#
XDP_DBRESET#

SUS_PWR_ACK
PCH_GPIO72
EC_SWI#
PCH_PCIE_WAKE#
PM_SLP_LAN#

10/2 Intel suggestion change to 10K

+3V

ACIN_BUF24,38

SYS_PWROK21

SYS_PWROK

5

H_FDI_TXN[0..7]
H_FDI_TXP[0..7]

+1.05VS

R656

R656

49.9_0402_1%

49.9_0402_1%
<BOM Structure>

<BOM Structure>

1 2

XDP_DBRESET#5,21

SYS_PWROK
VGATE

SYS_PWROK

EC_PWROK

LAN_RST#

R289 0_0402_5% R289 0_0402_5%
R288 0_0402_5%@R288 0_0402_5%@

SYS_PWROK

1 2

R315 100K_0402_5%

R315 100K_0402_5%

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

+3VS

4

Y

1 2

R296 10K_0402_5%

R296 10K_0402_5%

1 2

R311 10K_0402_5%

R311 10K_0402_5%

1 2

R698 10K_0402_5%

R698 10K_0402_5%

No used Integrated LAN,
connecting LAN_RST# to GND

12
12

PM_DRAM_PWRGD5

SUS_PWR_ACK38

PBTN_OUT#5,21,38

21

D17

D17

EC_SWI#38

5

U27

U27

2

P

B

1

A

G

NC7SZ08P5X_NL_SC70-5

NC7SZ08P5X_NL_SC70-5

3

DMI_HTX_PRX_N0
DMI_HTX_PRX_N1
DMI_HTX_PRX_N2
DMI_HTX_PRX_N3

DMI_HTX_PRX_P0
DMI_HTX_PRX_P1
DMI_HTX_PRX_P2
DMI_HTX_PRX_P3

DMI_PTX_HRX_N0
DMI_PTX_HRX_N1
DMI_PTX_HRX_N2
DMI_PTX_HRX_N3

DMI_PTX_HRX_P0
DMI_PTX_HRX_P1
DMI_PTX_HRX_P2
DMI_PTX_HRX_P3

DMI_COMP

XDP_DBRESET#

SYS_PWROK_R

12

R301 0_0402_5%

R301 0_0402_5%

LAN_RST#

PCH_RSMRST#

SUS_PWR_ACK

PBTN_OUT#

PCH_ACIN

PCH_GPIO72

EC_SWI#

EC_PWROK
VGATE

ME_PWROK

EC_PWROK 38
VGATE 12,56

4

U60C

U60C

BC24

DMI0RXN

BJ22

DMI1RXN

AW20

DMI2RXN

BJ20

DMI3RXN

BD24

DMI0RXP

BG22

DMI1RXP

BA20

DMI2RXP

BG20

DMI3RXP

BE22

DMI0TXN

BF21

DMI1TXN

BD20

DMI2TXN

BE18

DMI3TXN

BD22

DMI0TXP

BH21

DMI1TXP

BC20

DMI2TXP

BD18

DMI3TXP

BH25

DMI_ZCOMP

BF25

DMI_IRCOMP

T6

SYS_RESET#

M6

SYS_PWROK

B17

PWROK

K5

MEPWROK

A10

LAN_RST#

D9

DRAMPWROK

C16

RSMRST#

M1

SUS_PWR_DN_ACK / GPIO30

P5

PWRBTN#

P7

ACPRESENT / GPIO31

A6

BATLOW# / GPIO72

F14

RI#

IBEXPEAK-M_FCBGA107

IBEXPEAK-M_FCBGA107
UMA@

UMA@

REV1.0

REV1.0

FDI_FSYNC0

DMI

FDI

DMI

FDI

FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

System Power Management

System Power Management

SLP_LAN# / GPIO29

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7

FDI_INT

WAKE#

SLP_S4#

SLP_S3#

SLP_M#

TP23

PMSYNCH

BA18
BH17
BD16
BJ16
BA16
BE14
BA14
BC12

BB18
BF17
BC16
BG16
AW16
BD14
BB14
BD12

BJ14
BF13
BH13
BJ12
BG14

PCH_PCIE_WAKE#

J12

PM_CLKRUN#

Y1

PCH_GPIO61

P8

PCH_GPIO62

F3

E4

H7

P12

PM_SLP_M#

K8

PM_SLP_DSW#

N2

BJ10

PM_SLP_LAN#

F6

2009/08/10 2010/08/10

2009/08/10 2010/08/10

2009/08/10 2010/08/10

3

H_FDI_TXN0
H_FDI_TXN1
H_FDI_TXN2
H_FDI_TXN3
H_FDI_TXN4
H_FDI_TXN5
H_FDI_TXN6
H_FDI_TXN7

H_FDI_TXP0
H_FDI_TXP1
H_FDI_TXP2
H_FDI_TXP3
H_FDI_TXP4
H_FDI_TXP5
H_FDI_TXP6
H_FDI_TXP7

PCH_PCIE_WAKE# 33,34,36

PM_CLKRUN# 38

@

@

PAD

PAD

T8

T8

@

@

PAD

PAD

T10

T10

PM_SLP_S5# 38

PM_SLP_S4# 38

PM_SLP_S3# 38

@

@

PAD

PAD

T9

T9

@

@

PAD

PAD

T19

T19

H_PM_SYNC 5

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

H_FDI_INT 4
H_FDI_FSYNC0 4
H_FDI_FSYNC1 4
H_FDI_LSYNC0 4
H_FDI_LSYNC1 4

2

@

R676 0_0402_5%

R676 0_0402_5%

Q63

Q63
MMBT3906_SOT23-3

PCH_RSMRST#

R681

R681
10K_0402_5%

10K_0402_5%

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

MMBT3906_SOT23-3

12

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511
401762

401762

401762

@

12

123

C

C

E

E

B

B

1 2

R194 4.7K_0402_5%

R194 4.7K_0402_5%

D14A

D14A

1
2

BAV99DW-7_SOT363

BAV99DW-7_SOT363

D14B

D14B

4
5

BAV99DW-7_SOT363

BAV99DW-7_SOT363

6

3

1

EC_RSMRST# 38

12

R204

R204

2.2K_0402_5%

2.2K_0402_5%

15 60Tuesday, August 18, 2009

15 60Tuesday, August 18, 2009

15 60Tuesday, August 18, 2009

+3V

of

of

of

C

C

C

5

D D

R119 100K_0402_5% R119 100K_0402_5%

1 2

+3VS

11/21 intel JIM suggest Pull high at LVDS Conn

R110 2.2K_0402_5%@R110 2.2K_0402_5%@

1 2

R113 2.2K_0402_5%@R113 2.2K_0402_5%@

1 2

R111 10K_0402_5% R111 10K_0402_5%

1 2

R112 10K_0402_5% R112 10K_0402_5%

C C

B B

R590 2.2K_0402_5% R590 2.2K_0402_5%
R589 2.2K_0402_5% R589 2.2K_0402_5%

1 2
1 2
1 2

R580 150_0402_1% R580 150_0402_1%
R581 150_0402_1% R581 150_0402_1%
R582 150_0402_1% R582 150_0402_1%

IGPU_BKLT_EN

1 2
1 2
1 2

PCH_LCD_CLK
PCH_LCD_DATA
LCTLA_CLK
LCTLB_DATA
PCH_CRT_CLK
PCH_CRT_DATA

PCH_CRT_B
PCH_CRT_G
PCH_CRT_R

4

UMA@R163

UMA@

1 2

UMA@R153

UMA@

1 2

IGPU_BKLT_EN

PCH_LCD_CLK
PCH_LCD_DATA

LCTLA_CLK
LCTLB_DATA

LVDS_IBG

LVD_VREF

PCH_TXCLK­PCH_TXCLK+

PCH_TXOUT0­PCH_TXOUT1­PCH_TXOUT2-

PCH_TXOUT0+
PCH_TXOUT1+
PCH_TXOUT2+

PCH_TZCLK­PCH_TZCLK+

PCH_TZOUT0­PCH_TZOUT1­PCH_TZOUT2-

PCH_TZOUT0+
PCH_TZOUT1+
PCH_TZOUT2+

PCH_CRT_B
PCH_CRT_G
PCH_CRT_R

PCH_CRT_CLK
PCH_CRT_DATA

12

AB48

AB46

AP39
AP41

AT43
AT42

AV53
AV51

BB47
BA52
AY48
AV47

BB48
BA50
AY49
AV48

AP48
AP47

AY53
AT49
AU52
AT53

AY51
AT48
AU50
AT51

AA52
AB53
AD53

CRT_IREF

AD48
AB51

R143

R143
1K_0402_0.5%

1K_0402_0.5%

2/3 Change to 1K_0402_0.5% from Intel
Suggestion. (EDS 1.0 is incorrect)

PCH_ENVDD30

DPST_PWM30

PCH_LCD_CLK30

PCH_LCD_DATA30

R163

2.37K_0402_1%

2.37K_0402_1%
R153

0_0402_5%

0_0402_5%

PCH_TXCLK-30
PCH_TXCLK+30

PCH_TXOUT0-30
PCH_TXOUT1-30
PCH_TXOUT2-30

PCH_TXOUT0+30
PCH_TXOUT1+30
PCH_TXOUT2+30

PCH_TZCLK-30
PCH_TZCLK+30

PCH_TZOUT0-30
PCH_TZOUT1-30
PCH_TZOUT2-30

PCH_TZOUT0+30
PCH_TZOUT1+30
PCH_TZOUT2+30

PCH_CRT_B31
PCH_CRT_G31
PCH_CRT_R31

PCH_CRT_CLK31
PCH_CRT_DATA31

PCH_CRT_HSYNC31
PCH_CRT_VSYNC31

3

U60D

U60D

T48

L_BKLTEN

T47

L_VDD_EN

Y48

L_BKLTCTL
L_DDC_CLK

Y45

L_DDC_DATA
L_CTRL_CLK

V48

L_CTRL_DATA
LVD_IBG

LVD_VBG
LVD_VREFH

LVD_VREFL

LVDSA_CLK#
LVDSA_CLK

LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3

LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3

LVDSB_CLK#
LVDSB_CLK

LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3

LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3

CRT_BLUE
CRT_GREEN
CRT_RED

V51

CRT_DDC_CLK

V53

CRT_DDC_DATA

Y53

CRT_HSYNC

Y51

CRT_VSYNC

DAC_IREF
CRT_IRTN

IBEXPEAK-M_FCBGA107

IBEXPEAK-M_FCBGA107
UMA@

UMA@

DDPB_0N

DDPB_0P

DDPB_1N

DDPB_1P

DDPB_2N

DDPB_2P

DDPB_3N

DDPB_3P

DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P

DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

BJ46
BG46

BJ48
BG48

BF45
BH45

T51
T53

BG44
BJ44
AU38

BD42
BC42
BJ42
BG42
BB40
BA40
AW38
BA38

Y49
AB49

BE44
BD44
AV40

BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36

U50
U52

BC46
BD46
AT38

BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36

SDVO_TVCLKINN
SDVO_TVCLKINP

SDVO_STALLN
SDVO_STALLP

SDVO_INTN

SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN
DDPB_AUXP

DDPB_HPD

LVDS

LVDS

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN
DDPC_AUXP

DDPC_HPD

Digital Display Interface

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN
DDPD_AUXP

DDPD_HPD

CRT

CRT

REV1.0

REV1.0

PCH_DPB_HPD
PCH_DPB_N0

PCH_DPB_P0
PCH_DPB_N1
PCH_DPB_P1
PCH_DPB_N2
PCH_DPB_P2
PCH_DPB_N3
PCH_DPB_P3

2

R168 100K_0402_5%UMA@R168 100K_0402_5%UMA@

C715 0.1U_0402_16V7KUMA@C715 0.1U_0402_16V7KUMA@
C726 0.1U_0402_16V7KUMA@C726 0.1U_0402_16V7KUMA@
C697 0.1U_0402_16V7KUMA@C697 0.1U_0402_16V7KUMA@
C700 0.1U_0402_16V7KUMA@C700 0.1U_0402_16V7KUMA@
C727 0.1U_0402_16V7KUMA@C727 0.1U_0402_16V7KUMA@
C729 0.1U_0402_16V7KUMA@C729 0.1U_0402_16V7KUMA@
C710 0.1U_0402_16V7KUMA@C710 0.1U_0402_16V7KUMA@
C713 0.1U_0402_16V7KUMA@C713 0.1U_0402_16V7KUMA@

1 2

12
12
12
12
12
12
12
12

1

SDVO_SCLK 32
SDVO_SDATA 32

PCH_DPB_HPD 32
PCH_TMDS_D2# 32

PCH_TMDS_D2 32
PCH_TMDS_D1# 32
PCH_TMDS_D1 32
PCH_TMDS_D0# 32
PCH_TMDS_D0 32
PCH_TMDS_CK# 32
PCH_TMDS_CK 32

HDMI D2

HDMI D1

HDMI D0

HDMI CLK

+3VS_DELAY

12

R61

R61

2.2K_0402_5%

2.2K_0402_5%
@

@

DGPU_BKL_EN24

PWMSEL_1#30

A A

IGPU_PWM_SELECT#30

IGPU_BKLT_EN ENBKL

R90 0_0402_5%UMAO@R90 0_0402_5%UMAO@

U18

U18

2

1A

5

2A

1

1OE#

7

2OE#

SN74CBTD3306CPWR_TSSOP8

SN74CBTD3306CPWR_TSSOP8
SG@

SG@

1 2

VCC

GND

Reserved for UMA Only

R71 0_0402_5%DIS@R71 0_0402_5%DIS@

1 2

Reserved for DIS Only

5

+5VS

C176

SG@C176

SG@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1 2

8
3

1B

6

2B

4

ENBKLIGPU_BKLT_EN

ENBKLDGPU_BKL_EN

4

12

R78

R78
100K_0402_5%

100K_0402_5%

ENBKL 38

Security Classification

Security Classification

Security Classification

2009/08/10 2010/08/10

2009/08/10 2010/08/10

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/08/10 2010/08/10

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

401762

401762

401762

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

16 60Tuesday, August 18, 2009

16 60Tuesday, August 18, 2009

16 60Tuesday, August 18, 2009

of

of

1

of

C

C

C

5

+3VS

R148 8.2K_0402_5% R148 8.2K_0402_5%

1 2

R652 8.2K_0402_5% R652 8.2K_0402_5%

1 2

R650 8.2K_0402_5% R650 8.2K_0402_5%

1 2

R595 8.2K_0402_5% R595 8.2K_0402_5%

1 2

D D

C C

B B

R592 8.2K_0402_5% R592 8.2K_0402_5%
R147 8.2K_0402_5% R147 8.2K_0402_5%
R636 8.2K_0402_5% R636 8.2K_0402_5%
R634 8.2K_0402_5% R634 8.2K_0402_5%

R583 8.2K_0402_5% R583 8.2K_0402_5%
R584 8.2K_0402_5% R584 8.2K_0402_5%
R586 8.2K_0402_5% R586 8.2K_0402_5%
R587 8.2K_0402_5% R587 8.2K_0402_5%

R630 8.2K_0402_5% R630 8.2K_0402_5%
R628 8.2K_0402_5% R628 8.2K_0402_5%
R626 8.2K_0402_5% R626 8.2K_0402_5%
R146 8.2K_0402_5% R146 8.2K_0402_5%

R624 8.2K_0402_5% R624 8.2K_0402_5%
R625 8.2K_0402_5% R625 8.2K_0402_5%
R602 8.2K_0402_5% R602 8.2K_0402_5%
R613 8.2K_0402_5% R613 8.2K_0402_5%

1 2
1 2
1 2
1 2

1 2
1 2
1 2
1 2

1 2
1 2
1 2
1 2

1 2
1 2
1 2
1 2

CLK_PCI_LPC38

CLK_PCI_FB14

PCI_PIRQA#
PCI_PIRQG#
PCI_PIRQC#
PCI_SERR#

PCI_PLOCK#
PCI_PERR#
PCI_PIRQE#
PCI_STOP#

PCI_REQ0#
PCI_PIRQB#
PCI_PIRQF#
PCI_REQ3#

PCI_IRDY#
PCI_PIRQD#
DGPU_SELECT#
PCI_DEVSEL#

PCI_FRAME#
PCI_REQ1#
PCI_PIRQH#
PCI_TRDY#

R588 22_0402_5% R588 22_0402_5%

1 2

R141 22_0402_5% R141 22_0402_5%

1 2

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

PCI_REQ0#
PCI_REQ1#

DGPU_SELECT#30,31,32

DGPU_PWMSEL#30

PCI_RST#36

PLT_RST#5,21,34,38

DGPU_SELECT#
PCI_REQ3#

PCI_GNT0#
PCI_GNT1#

DGPU_PWMSEL#

PCI_GNT3#
PCI_PIRQE#

PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

PCI_RST#
PCI_SERR#

PCI_PERR#

PCI_IRDY#
PCI_DEVSEL#

PCI_FRAME#
PCI_PLOCK#
PCI_STOP#

PCI_TRDY#

PLT_RST#

CLK_PCI_LPC_R
CLK_PCI_FB_R

2008/1/6 2009MOW01 change to 22 ohm

Boot BIOS Strap

PCI_GNT#0 PCI_GNT#1 Boot BIOS Location

00

A A

01

10

11

*

A16 swap override Strap/Top-Block

Swap Override jumper

PCI_GNT#3

Low = A16 swap
High = Default

5

LPC

Reserved (NAND)

PCI

SPI

Have internal PU

Have internal PU

Have internal PU

PCI_GNT0#
PCI_GNT1#

PCI_GNT3#

4

U60E

U60E

H40

AD0

N34

AD1

C44

AD2

A38

AD3

C36

AD4

J34

AD5

A40

AD6

D45

AD7

E36

AD8

H48

AD9

E40

AD10

C40

AD11

M48

AD12

M45

AD13

F53

AD14

M40

AD15

M43

AD16

J36

AD17

K48

AD18

F40

AD19

C42

AD20

K46

AD21

M51

AD22

J52

AD23

K51

AD24

L34

AD25

F42

AD26

J40

AD27

G46

AD28

F44

AD29

M47

AD30

H36

AD31

J50

C/BE0#

G42

C/BE1#

H47

C/BE2#

G34

C/BE3#

G38

PIRQA#

H51

PIRQB#

B37

PIRQC#

A44

PIRQD#

F51

REQ0#

A46

REQ1# / GPIO50

B45

REQ2# / GPIO52

M53

REQ3# / GPIO54

F48

GNT0#

K45

GNT1# / GPIO51

F36

GNT2# / GPIO53

H53

GNT3# / GPIO55

B41

PIRQE# / GPIO2

K53

PIRQF# / GPIO3

A36

PIRQG# / GPIO4

A48

PIRQH# / GPIO5

K6

PCIRST#

E44

SERR#

E50

PERR#

A42

IRDY#

H44

PAR

F46

DEVSEL#

C46

FRAME#

D49

PLOCK#

D41

STOP#

C48

TRDY#

M7

PME#

D5

PLTRST#

N52

CLKOUT_PCI0

P53

CLKOUT_PCI1

P46

CLKOUT_PCI2

P51

CLKOUT_PCI3

P48

CLKOUT_PCI4

IBEXPEAK-M_FCBGA107

IBEXPEAK-M_FCBGA107
UMA@

UMA@

R123 1K_0402_5%@R123 1K_0402_5%@

1 2

R149 1K_0402_5%@R149 1K_0402_5%@

1 2

R585 1K_0402_5%@R585 1K_0402_5%@

1 2

4

REV1.0

REV1.0

3

NV_CE#0

AY9

NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3

NV_DQS0
NV_DQS1

NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8

NV_DQ9 / NV_IO9
NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11

NVRAM

NVRAM

NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15

NV_ALE
NV_CLE

NV_RCOMP

PCI

PCI

NV_RB#

NV_WR#0_RE#
NV_WR#1_RE#

NV_WE#_CK0
NV_WE#_CK1

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P

USB

USB

USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43

OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

BD1
AP15
BD8

AV9
BG8

AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6

BD3
AY6

AU2
AV7
AY8

AY5
AV11

BF5

H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24

B25
D25

N16
J16
F16
L16
E14
G16
F12
T15

NV_CE#1

NV_DQS0

NV_DQ0
NV_DQ1
NV_DQ2
NV_DQ3
NV_DQ4
NV_DQ5
NV_DQ6
NV_DQ7
NV_DQ8
NV_DQ9
NV_DQ10
NV_DQ11
NV_DQ12
NV_DQ13
NV_DQ14
NV_DQ15

NV_ALE
NV_CLE

NV_RCOMP
NV_RB#

NV_RE#_WR#0
NV_RE#_WR#1

NV_WE#_CK0
NV_WE#_CK1

USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5

USB20_N8
USB20_P8

USB20_N10
USB20_P10
USB20_N11
USB20_P11
USB20_N12
USB20_P12

USB_BIAS

USB_OC#0_R
USB_OC#1_R
USB_OC#2_R
USB_OC#3_R
USB_OC#4_R
USB_OC#5_R
USB_OC#6_R
USB_OC#7_R

2009/08/10 2010/08/10

2009/08/10 2010/08/10

2009/08/10 2010/08/10

3

NV_CE#0 22
NV_CE#1 22

NV_DQS0 22
NV_DQS1 22

NV_DQ0 22
NV_DQ1 22
NV_DQ2 22
NV_DQ3 22
NV_DQ4 22
NV_DQ5 22
NV_DQ6 22
NV_DQ7 22
NV_DQ8 22
NV_DQ9 22
NV_DQ10 22
NV_DQ11 22
NV_DQ12 22
NV_DQ13 22
NV_DQ14 22
NV_DQ15 22

NV_ALE 22
NV_CLE 22

R731 32.4_0402_1%

R731 32.4_0402_1%

1 2

NV_RB# 22
NV_RE#_WR#0 22

NV_RE#_WR#1 22
NV_WE#_CK0 22

NV_WE#_CK1 22

USB20_N0 37
USB20_P0 37
USB20_N1 37
USB20_P1 37
USB20_N2 37
USB20_P2 37
USB20_N3 30
USB20_P3 30
USB20_N4 33
USB20_P4 33
USB20_N5 33
USB20_P5 33

USB20_N8 37
USB20_P8 37

USB20_N10 36
USB20_P10 36
USB20_N11 39
USB20_P11 39
USB20_N12 36
USB20_P12 36

1 2

R188

R188

22.6_0402_1%

22.6_0402_1%

R664 0_0402_5% R664 0_0402_5%

1 2

R668 0_0402_5% R668 0_0402_5%

1 2

R253 0_0402_5% R253 0_0402_5%

1 2

R677 0_0402_5% R677 0_0402_5%

1 2

USB Conn.(HS) JUSB1
USB/B
eSATA USB Conn.
CMOS Camera (LVDS)
Mini Card(WLAN)
Mini Card(Mini2)

USB Conn.(HS) JUSB2

Bluetooth
Fingerprint
NEWCARD

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

DGPU_HOLD_RST#18

USB_OC#0 37
USB_OC#1 37
USB_OC#2 37
USB_OC#3_R 21
USB_OC#4 37
USB_OC#5_R 21
USB_OC#6_R 21
USB_OC#7_R 21

OC[0..3] use for EHCI 1
OC[4..7] use for EHCI 2

2

NV_ALE
NV_CLENV_DQS1

PLT_RST#

NC7SZ08P5X_NL_SC70-5

NC7SZ08P5X_NL_SC70-5

R765

R765

0_0402_5%

0_0402_5%

DIS@

DIS@

1 2

NC7SZ08P5X_NL_SC70-5

NC7SZ08P5X_NL_SC70-5

EHCI 1

EHCI 2

(For USB Port0)
(For USB Port1)
(For eSATA USB Port)

(For USB Port8)

2

1

+VCCQ_NAND

R721 1K_0402_5%@R721 1K_0402_5%@

1 2

R240 1K_0402_5%@R240 1K_0402_5%@

1 2

+3VS

5

U30

U30

2

P

B

1

U29

U29

2
1

VGA@

VGA@

A

+3VS

B
A

4

Y

G

3

5

3

12

R338

R338
100K_0402_5%

100K_0402_5%

P

Y

G

4

R340
100_0402_5%

100_0402_5%

12

R339

R339
100K_0402_5%

100K_0402_5%
VGA@

VGA@

VGA@R340

VGA@

1 2

PLT_RST_BUF# 33

PLTRST_VGA# 23

Danbury Technology Enabled

NV_ALE

High = Enabled

Low = Disabled

DMI Termination Voltage

NV_CLE

Title

Title

Title

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

401762

401762

401762

Date: Sheet

Date: Sheet

Date: Sheet

Set to Vss when LOW

Set to Vcc when HIGH

USB_OC#0_R
USB_OC#1_R
USB_OC#2_R
USB_OC#4_R

USB_OC#3_R
USB_OC#5_R
USB_OC#7_R
USB_OC#6_R

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

USB_OC#0_R 21
USB_OC#1_R 21
USB_OC#2_R 21
USB_OC#4_R 21

RP13

RP13

1 8
2 7
3 6
4 5

10K_1206_8P4R_5%

10K_1206_8P4R_5%

1

+3V

17 60Tuesday, August 18, 2009

17 60Tuesday, August 18, 2009

17 60Tuesday, August 18, 2009

of

of

of

C

C

C

5

4

3

2

1

+3VS

R644 10K_0402_5% R644 10K_0402_5%

1 2

R649 10K_0402_5% R649 10K_0402_5%

1 2

R271 10K_0402_5% R271 10K_0402_5%

1 2

R314 10K_0402_5% R314 10K_0402_5%

D D

C C

B B

1 2

R267 10K_0402_5% R267 10K_0402_5%

1 2

R274 10K_0402_5% R274 10K_0402_5%

1 2

R290 10K_0402_5% R290 10K_0402_5%

1 2

R293 10K_0402_5%UMAO@R293 10K_0402_5%UMAO@

1 2

R294 10K_0402_5% R294 10K_0402_5%

1 2

R270 10K_0402_5% R270 10K_0402_5%

1 2

R302 10K_0402_5% R302 10K_0402_5%

1 2

R173 10K_0402_5% R173 10K_0402_5%

1 2

+3V

R306 10K_0402_5% R306 10K_0402_5%

1 2

R247 10K_0402_5% R247 10K_0402_5%

1 2

R310 1K_0402_5% R310 1K_0402_5%

1 2

10/7 Not Use PCH_GPIO15 PU 1K to +3V

R308 10K_0402_5% R308 10K_0402_5%

1 2

R244 10K_0402_5% R244 10K_0402_5%

1 2

R262 10K_0402_5% R262 10K_0402_5%

1 2

R258 10K_0402_5% R258 10K_0402_5%

1 2

R333 10K_0402_5%VGA@R333 10K_0402_5%VGA@

1 2

R155 10K_0402_5%@R155 10K_0402_5%@

1 2

R291 10K_0402_5% R291 10K_0402_5%

1 2

R282 10K_0402_5%@R282 10K_0402_5%@

1 2

GPIO27 (Have internal Pull-High)
High: VCCVRM VR Enable
Low: VCCVRM VR Disable

High: CRT Plugged

CRT_DET

CRT_DET#31

2N7002_SOT23

2N7002_SOT23

DGPU_EDIDSEL#
PCH_GPIO6
DGPU_HOLD_RST#_R

CR_CPPE#
COLOR_ENG_EN_R
CR_WAKE#
DGPU_PWR_EN
PCH_GPIO37
PCH_GPIO48
PCH_TEMP_ALERT#

PCH_GPIO34
EC_SCI#

DGPU_PWROK_BUF40

PCH_GPIO57
EC_SMI#
PCH_GPIO15

PCH_GPIO28
CP_PE#
RST_GATE
PCH_GPIO45

DGPU_PWROK_BUF_R
PCH_GPIO35

PCH_GPIO27

+3VS

1 2
13

D

D

2

G

Q20

G

Q20

S

S

COLOR_ENG_EN30

PCH_GPIO37

R266

R266
10K_0402_5%

10K_0402_5%

DGPU_HOLD_RST#_R21

DGPU_HOLD_RST#17

CRT_DET21

DGPU_EDIDSEL#30

EC_SCI#38
EC_SMI#38

CP_PE#36

0_0402_5% UMA@

1 2

PCH_GPIO2821

DGPU_PWR_EN14,21,40,45

PCH_GPIO3721

CR_WAKE#33

RST_GATE10,11

R152

CR_CPPE#33

0_0402_5% UMA@
R152
0_0402_5%

0_0402_5%

PCH_SATA1_CE#37

(Rev:1.0 GPIO24 Only)

COLOR_ENG_EN

PCH_TEMP_ALERT#21,38

CRT_DET
DGPU_EDIDSEL#
PCH_GPIO6
EC_SCI#
EC_SMI#
CP_PE#
PCH_GPIO15
DGPU_HOLD_RST#_R

R224

R224

1 2

DGPU_PWROK_BUF_R

CR_CPPE#
PCH_SATA1_CE#
PCH_GPIO27
PCH_GPIO28
PCH_GPIO34
PCH_GPIO35
DGPU_PWR_EN
PCH_GPIO37

R804

@R804

@

1 2

0_0402_5%

0_0402_5%

CR_WAKE#
PCH_GPIO45
RST_GATE
PCH_GPIO48
PCH_TEMP_ALERT#
PCH_GPIO57

COLOR_ENG_EN_R

U60F

U60F

Y3

BMBUSY# / GPIO0

C38

TACH1 / GPIO1

D37

TACH2 / GPIO6

J32

TACH3 / GPIO7

F10

GPIO8

(GPIO8 Should not be Pull-Low)

K9

LAN_PHY_PWR_CTRL / GPIO12

T7

GPIO15

AA2

SATA4GP / GPIO16

F38

TACH0 / GPIO17

Y7

SCLOCK / GPIO22

H10

GPIO24

AB12

GPIO27

V13

GPIO28

M11

STP_PCI# / GPIO34

V6

SATACLKREQ# / GPIO35

AB7

SATA2GP / GPIO36

AB13

SATA3GP / GPIO37

V3

SLOAD / GPIO38

P3

SDATAOUT0 / GPIO39

H3

PCIECLKRQ6# / GPIO45

F1

PCIECLKRQ7# / GPIO46

AB6

SDATAOUT1 / GPIO48

AA4

SATA5GP / GPIO49

F8

GPIO57

A4

VSS_NCTF_1

A49

VSS_NCTF_2

A5

VSS_NCTF_3

A50

VSS_NCTF_4

A52

VSS_NCTF_5

A53

VSS_NCTF_6

B2

VSS_NCTF_7

B4

VSS_NCTF_8

B52

VSS_NCTF_9

B53

VSS_NCTF_10

BE1

VSS_NCTF_11

BE53

VSS_NCTF_12

BF1

VSS_NCTF_13

BF53

VSS_NCTF_14

BH1

VSS_NCTF_15

BH2

VSS_NCTF_16

BH52

VSS_NCTF_17

BH53

VSS_NCTF_18

BJ1

VSS_NCTF_19

BJ2

VSS_NCTF_20

BJ4

VSS_NCTF_21

BJ49

VSS_NCTF_22

BJ5

VSS_NCTF_23

BJ50

VSS_NCTF_24

BJ52

VSS_NCTF_25

BJ53

VSS_NCTF_26

D1

VSS_NCTF_27

D2

VSS_NCTF_28

D53

VSS_NCTF_29

E1

VSS_NCTF_30

E53

VSS_NCTF_31

IBEXPEAK-M_FCBGA107

IBEXPEAK-M_FCBGA107
UMA@

UMA@

GPIO

GPIO

NCTF

NCTF

CLKOUT_PCIE6N
CLKOUT_PCIE6P

CLKOUT_PCIE7N

MISC

MISC

CLKOUT_BCLK0_N / CLKOUT_PCIE8N
CLKOUT_BCLK0_P / CLKOUT_PCIE8P

CPU

CPU

RSVD

RSVD

REV1.0

REV1.0

CLKOUT_PCIE7P

PROCPWRGD

A20GATE

PECI

RCIN#

THRMTRIP#

TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8

TP9
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19

NC_1
NC_2
NC_3
NC_4
NC_5

INIT3_3V#

TP24

AH45
AH46

AF48
AF47

EC_GA20

U2

AM3
AM1
BG10

EC_KBRST#

T1
BE10
BD10

BA22
AW22
BB22
AY45
AY46
AV43
AV45
AF13
M18
N18
AJ24
AK41
AK42
M32
N32
M30
N30
H12
AA23
AB45
AB38
AB42
AB41
T39

(Have internal PD,

P6

Do not pull high)

TP24_SST

@

@

C10

EC_GA20 38

CLK_CPU_BCLK# 5
CLK_CPU_BCLK 5
H_PECI 5
EC_KBRST# 38
H_CPUPWRGD 5

WW46 Platform/Design Updates
2008/11/17 54.9 1% ->56 5%

PAD

PAD

T18

T18

12

R233 56_0402_5%

R233 56_0402_5%

+1.1VS_VTT

R239

R239

330_0402_5%@

330_0402_5%@

1 2

H_THERMTRIP#

H_THERMTRIP#THRMTRIP_PCH#

EC_GA20
EC_KBRST#

12

R232 56_0402_5%

R232 56_0402_5%

1

C

C

Q18

Q18

2

B

B

E

E

2SC2411K_SOT23

2SC2411K_SOT23

3

@

@

R286 10K_0402_5%

R286 10K_0402_5%

1 2

R284 10K_0402_5%

R284 10K_0402_5%

1 2

H_THERMTRIP# 5

+1.1VS_VTT

MAINPWROFF# 49

+3VS

A A

Security Classification

Security Classification

Security Classification

2009/08/10 2010/08/10

2009/08/10 2010/08/10

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/08/10 2010/08/10

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

401762

401762

401762

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

18 60Tuesday, August 18, 2009

18 60Tuesday, August 18, 2009

18 60Tuesday, August 18, 2009

of

of

1

of

C

C

C

5

4

3

2

1

+1.05VS

POWER

U60G

10U_0805_10V4Z

10U_0805_10V4Z

D D

All Ibex Peak-M Power rails with netnames +1.1VS and
+1.1V rails are actually +1.05VS and +1.05V rails

Intel suggest follow CRB 8/21

+1.05VS

1uH inductor, 405mA

DG 0.8 is 1uH Inductor (Page 291)

C C

10U_0805_10V4Z

10U_0805_10V4Z

C299

C299

Top Side

Have Internal VRM (DG0.8 Page 293)

+1.05VS

Near AN20

1

C314

2

C314

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C303

C303

1

2

1

2

Near AB24
Top Side

L70

@L70

@

1 2

1UH_CBC2012T1R0M_20%

1UH_CBC2012T1R0M_20%

C306

C306

1U_0402_6.3V4Z

1U_0402_6.3V4Z

Near AN35

Follow Intel suggestion 8/21

B B

+1.05VS

L71

1 2

1UH_CBC2012T1R0M_20%

1UH_CBC2012T1R0M_20%

1uH inductor, 405mA

Change to 0 ohm
for discrete

DG 0.8 is 1uH Inductor (Page 291)
Have Internal VRM (DG0.8 Page 293)

@L71

@

C294

C294

C763

C763
10U_0805_10V4Z

10U_0805_10V4Z
@

@

C298

C298

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C307

C307

Near AB24

10U_0805_10V4Z

10U_0805_10V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C313

C313

12

+VCCVRM

+VCCAPLL_FDI

1

+1.05VS

2

1

2

+1.05VS

+VCCAPLL_EXP

1

C759

C759
@

@

2

1

2

+3VS

U60G

AB24

VCCCORE[1]

AB26

VCCCORE[2]

AB28

VCCCORE[3]

AD26

VCCCORE[4]

AD28

VCCCORE[5]

AF26

VCCCORE[6]

AF28

VCCCORE[7]

AF30

VCCCORE[8]

AF31

VCCCORE[9]

AH26

VCCCORE[10]

AH28

VCCCORE[11]

AH30

VCCCORE[12]

AH31

VCCCORE[13]

AJ30

VCCCORE[14]

AJ31

VCCCORE[15]

AK24

VCCIO[24]

42mA

BJ24

VCCAPLLEXP

AN20

VCCIO[25]

AN22

VCCIO[26]

AN23

VCCIO[27]

AN24

VCCIO[28]

AN26

VCCIO[29]

AN28

VCCIO[30]

BJ26

VCCIO[31]

BJ28

VCCIO[32]

AT26

VCCIO[33]

AT28

VCCIO[34]

AU26

VCCIO[35]

AU28

VCCIO[36]

AV26

VCCIO[37]

AV28

VCCIO[38]

AW26

VCCIO[39]

AW28

VCCIO[40]

BA26

VCCIO[41]

BA28

VCCIO[42]

BB26

VCCIO[43]

BB28

VCCIO[44]

BC26

VCCIO[45]

BC28

VCCIO[46]

BD26

VCCIO[47]

BD28

VCCIO[48]

BE26

VCCIO[49]

BE28

VCCIO[50]

BG26

VCCIO[51]

BG28

VCCIO[52]

BH27

VCCIO[53]

AN30

VCCIO[54]

AN31

VCCIO[55]

AN35

VCC3_3[1]

AT22

VCCVRM[1]

BJ18

VCCFDIPLL

AM23

VCCIO[1]

IBEXPEAK-M_FCBGA107

IBEXPEAK-M_FCBGA107
UMA@

UMA@

POWER

1524mA

VCC CORE

VCC CORE

3208mA

PCI E*

PCI E*

6mA

69mA

CRTLVDS

CRTLVDS

HVCMOS

HVCMOS

DMI

DMI

NAND / SPI

NAND / SPI

FDI

FDI

REV1.0

REV1.0

VCCADAC[1]

VCCADAC[2]
VSSA_DAC[1]
VSSA_DAC[2]

300mA

VCCALVDS

VSSA_LVDS

59mA

VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]

VCC3_3[2]
VCC3_3[3]
VCC3_3[4]

35mA

VCCVRM[2]

61mA

VCCDMI[1]
VCCDMI[2]

156mA

VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
VCCPNAND[5]
VCCPNAND[6]
VCCPNAND[7]
VCCPNAND[8]
VCCPNAND[9]

85mA

VCCME3_3[1]
VCCME3_3[2]
VCCME3_3[3]
VCCME3_3[4]

+VCCADAC

AE50
AE52
AF53
AF51

AH38
AH39

AP43
AP45
AT46
AT45

AB34
AB35
AD35

1

C296

C296

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

AT24

AT16
AU16

AM16
AK16
AK20
AK19
AK15
AK13
AM12
AM13
AM15

AM8
AM9
AP11
AP9

12

+VCCA_LVDS

12

+VCCTX_LVDS

C280

C280

1

0.01U_0402_16V7K

0.01U_0402_16V7K
UMA@

UMA@

2

Near AB34

+VCCVRM

+VCC_DMI

1

C351

C351
1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

1

C347

C347

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

+3VS

1

C396

C396

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

0.01U_0402_16V7K

0.01U_0402_16V7K
C263

C263

R120

R120
0_0402_5%

0_0402_5%
@

@

R169

R169
0_0402_5%

0_0402_5%
DIS@

DIS@

Near AP43

C276

C276

0.01U_0402_16V7K

0.01U_0402_16V7K
UMA@

UMA@

+3VS

R183 0_0805_5%@R183 0_0805_5%@

1 2

R182 0_0805_5%@R182 0_0805_5%@

1 2

R189 0_0805_5% R189 0_0805_5%

1 2

Near AT16

Near AK13

Near AM8

1

2

1

2

R202 0_0805_5% R202 0_0805_5%

R205 0_0805_5%@R205 0_0805_5%@

1 2

R257 0_0805_5% R257 0_0805_5%

C264

C264

0.1U_0402_16V4Z

0.1U_0402_16V4Z

R132 0_0805_5%UMA@R132 0_0805_5%UMA@

1 2

C242

C242
UMA@

UMA@

1

22U_0805_6.3V6M

22U_0805_6.3V6M

2

1 2

1 2

1

2

Near AE50

+1.05VS
+1.5VS
+1.8VS

60mA

1 2

L23

1

MBK1608601YZF_2P

C230

C230
10U_0805_10V4Z

10U_0805_10V4Z

L27

0.1UH_MLF1608DR10KT_10%_1608

0.1UH_MLF1608DR10KT_10%_1608

0.1uH inductor, 200mA

DIS@

DIS@

1 2

R140

R140
0_0402_5%

0_0402_5%

+1.1VS_VTT

+1.05VS

+1.8VS+VCCQ_NAND

MBK1608601YZF_2P

600 ohm bead,350mA

2

+3VS

UMA@L27

UMA@

12

+3VS

L23

CRB 0.9 is 180 ohm @ 100MHz
DG0.8 is 600 ohm FB (Page 290)

+1.8VS

A A

Security Classification

Security Classification

Security Classification

2009/08/10 2010/08/10

2009/08/10 2010/08/10

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/08/10 2010/08/10

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511

SCHEMATICS,MB A5511
401762

401762

401762

1

C

C

C

19 60Tuesday, August 18, 2009

19 60Tuesday, August 18, 2009

19 60Tuesday, August 18, 2009

of

of

of